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2. Assertion (A): The output of a NOR gate is equal to the complement of OR of input variables.
Reason (R): A XOR gate is a universal gate.
A. Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is true, R is false
D. A is false, R is true
Answer: Option C
Explanation:
XOR gate is not a universal gate.
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B. 0
C. - 7
D. - 8
Answer: Option D
Explanation:
(a) and (d) both are option, But there is meaning to represent a positive number in 2's
complement form, we take complement representation for negative number only. Therefore most
appropriate number is "-8".
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5. In a D latch
A. data bit D is fed to S input and D to R input
B. data bit D is fed to R input and D to S input
C. data bit D is fed to both R and S inputs
D. data bit D is not fed to any input
Answer: Option A
Explanation:
B. 4
C. 8
D. 12
Answer: Option C
Explanation:
Total state = 2n = 24 = 16
Used state = 2n = 2 x 4 = 8
Unused state = 16 - 8 = 8.
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8. It is desired to display the digit 7 using a seven segment display. The LEDs to be turned on are
A. a, b, c
B. b, c, d
C. c, d, e
D. a, b, d
Answer: Option A
Explanation:
9. For a MOD-12 counter, the FF has a tpd = 60 ns The NAND gate has a tpd of 25 n sec. The clock
frequency is
A. 3.774 MHz
B. > 3.774 MHz
C. < 3.774 MHz
D. 4.167 MHz
Answer: Option A
Explanation:
For a proper working, the clock period should be equal to or greater than
tpd = Mod 12 - 4FFs = 4 x 60 = 240 nsec.
Total tpd = 240 + 25 = 265 nsec.
= fc
and fc = 3.774 MHz.
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12. An 8 bit data is to be entered into a parallel in register. The number of clock pulses required is
A. 8
B. 4
C. 2
D. 1
Answer: Option D
Explanation:
In a parallel in register only one pulse is needed to enter data.
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17. For the binary number 11101000, the equivalent hexadecimal number is
A. F 9
B. F 8
C. E 9
D. E 8
Answer: Option D
Explanation:
11 01000 = 128 + 64 + 32 + 8 = 232 in decimal = E 8 in hexadecimal.
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19. A XOR gate has inputs A and B and output Y. Then the output equation is
A. Y = AB
B. Y = AB + A B
C. Y = A B + A B
D. Y = A B + A B
Answer: Option C
Explanation:
XOR gate recognises odd number of 1's.
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20. Wired AND connection can be used in TTL with totem pole output.
A. True
B. False
Answer: Option B
Explanation:
F, No it cannot be used.
21. The Boolean expression for the circuit of the given figure
A. A {F + (B + C) (D + E)}
B. A [F + (B + C) (DE)]
C. A + F + (B + C) (D + E)]
D. A [F + (BC) (DE)]
Answer: Option A
Explanation:
B and C in parallel give B + C. Similarly D and E in parallel give D + E. (B + C) in series with (D
+ E) give (B + C) (D + E). Since F is in parallel we get F + (B + C) (D + E). Finally A is in series.
Therefore we get A[F + (B + C) (D + E)].
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24. A counter has N flip flops. The total number of states are
A. N
B. 2 N
C. 2N
D. 4 N
Answer: Option C
Explanation:
One flip-flop means 2 states and N flip-flops means 2N states.
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25. Out of S, R, J, K, Preset, Clear inputs to flip flops, the synchronous inputs are
A. S, R, J, K only
B. S, R, Preset, Clear only
C. Preset, Clear only
D. S, R only
Answer: Option A
Explanation:
Preset and clear inputs are not applied in any fixed sequence.
26. The Boolean expression A B is equivalent to
A. AB + AB
B. AB + AB
C. B
D. A
Answer: Option B
Explanation:
A B = AB + AB
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28. What will be minimum conversion rate in 6 bit dual slope A/D converter uses a reference of -6v
and a 1 MHz clock. It uses a fixed count of 40 (101000).
A. 9000
B. 9259
C. 1000
D. 1000
Answer: Option B
Explanation:
Minimum conversion rate
29. The minimum number of NAND gates required to implement the Boolean function A +AB + ABC
is equal to
A. 0
B. 1
C. 4
D. 7
Answer: Option A
Explanation:
A + AB +A B C = A + AB ( 1 + C) = A + AB = A(1 + B) = A.
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30. For the K map of the given figure, the simplified Boolean expression is
A. A C + A D + ABC
B. A B D + BC
C. A C D + AC
D. A C D + AC + BC
Answer: Option A
Explanation:
D. A [B (A + C)] D
Answer: Option D
Explanation:
In taking dual OR is replaced by AND and vice versa.
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33. The initial state of MOD-16 down counter is 0110. What state will it be after 37 clock pulses?
A. Indeterminate
B. 0110
C. 0101
D. 0001
Answer: Option D
Explanation:
A mod-16 counter goes through 16 states in one cycle of 16 Pulses.
It complete 2 cycles in 32 Pulses.
In the rest 5 Pulses, it moves down from 0110 = 610 - 510 = 110 or (001)2 .
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Answer: Option D
Explanation:
212 = 4096.
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35. If the inputs to a 3 bit binary adder are 1112 and 1112, the output will be 1102
A. True
B. False
Answer: Option B
Explanation:
111 + 111 = 1110.
36. Which display device resembles vacuum tube?
A. LED
B. LCD
C. VF
D. None of these
Answer: Option C
Explanation:
It is similar to triode.
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Explanation:
It operates on the principle of vacuum triode.
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39. In a 3 input NAND gate, the number of states in which output is 1 equals
A. 8
B. 1
C. 6
D. 5
Answer: Option B
Explanation:
Only one input, i.e., A = 1, B = 1 and C = 1 gives low output.
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40. In a mod-12 counter the input clock frequency is 10 kHz. The output frequency is
A. 0.833 kHz
B. 1.0 kHz
C. 0.91 kHz
D. 0.77 kHz
Answer: Option A
Explanation:
Mod-12 counter is divide by 12 counter. Output frequency =
= 0.833 kHz.
42. In digital circuits Schottky transistors are preferred over normal transistors because of their
44. A 4 bit parallel type A/D converter uses a 6 volt reference. How many comparators are required
and what is the resolution in volts?
A. 0.375 V
B. 15 V
C. 4.5 V
D. 10 V
Answer: Option A
Explanation:
No. of comparators = 2n - 1 = 24 - 1 = 15
.
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A. D/A converter
B. A/D converter
C. both D/A and A/D converter
D. neither D/A nor A/D converter
Answer: Option B
Explanation:
Analog input can have any value but digital value can have only 2N discrete levels (for N bits).
Hence quantization error in A/D conversion.
46. Which of these are universal gates?
A. Only NOR
B. Only NAND
C. Both NOR and NAND
D. NOR, NAND, OR
Answer: Option C
Explanation:
Both NAND and NOR are called universal gates.
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47. Out of latch and flip flop, which has clock input?
A. Latch only
B. Flip flop only
C. Both latch and flip flop
D. None
Answer: Option B
Explanation:
This the main difference between latch and flip-flop. Only flip-flop has clock input.
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Explanation:
Mod 4 counter has 4 states, 0 to 3.
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49. In the given figure shows a 4 bit serial in parallel out right shift register. The initial contents as
shown are 0110. After 3 clock pulses the contents will be
A. 0000
B. 0101
C. 1010
D. 1111
Answer: Option C
Explanation:
Output of XOR gate is input to register.
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