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Experiment No. 4
NAND & NOR gates
I.
II.
LEARNING OBJECTIVES:
1.
2.
3.
To
articulate
universal gates.
4.
the
characteristics
of
LEARNING CONTENTS
NOR Gate
The NOR gate is derived from the OR gate.
It
produces a high logic output when the inputs are all at
logic low level, and a low logic output when at least
one input is high logic level. Initially, this may not
appear easy to remember until one realizes that the NOR
gate is formed by an OR gate followed by an inverter.
As shown in the table, notice that the resulting output
is simply the complement of the OR gates.
NAND Gate
The NAND Gate produces a low logic output only
when all its inputs are high.
This is simply a
complement of the AND gate.
The NAND means NOT AND.
This only if characteristic makes the NAND gate one
of the most useful gates in logic design. As listed in
the truth table, notice that when one or more inputs
are low, the output is high. The output goes low only
when all inputs are high.
III. MATERIALS:
PROCEDURE:
1. Apply power to the 7427 and verify proper
operation of one of the 3-input gates by measuring
the output voltage level for each of the 8 inputsignal combinations as shown in Figure 4.1. Use
input voltage levels of 0 = 0V dc, 1 = +5V dc, and
use the measured output voltage levels to complete
the truth table in Table 4-1.
Figure 4.1
Truth Table 4-1
A
0
0
B
0
0
C
0
+5
D
+5
0
0
+5
0
0
0
+5
+5
0
+5
0
0
0
+5
0
+5
0
+5
+5
0
0
0
+5
+5
+5
+5
0
inputs
as an
as an
to the
+5
0
Figure 4.2
Table 4-2
A
B
C
0
0
0
0
+5
+5
+5
0
+5
+5
+5
+5
Figure 4.3
Table 4-3
A
B
C
0
0
0
+5
+5
0
+5
+5
Figure 4.4
Table 4-4
A
B
C
D
0
0
0
0
0
+5
0
+5
0
0
+5
+5
+5
0
0
+5
0
+5
+5
+5
0
+5
+5
+5
+5
Figure 4.5
Table 4-5
A
B
C
0
0
0
+5
+5
0
+5
+5
10.
Connect three of the NAND gates as shown in
Figure 4.6 and complete the truth table in table
4-6 to verify operation as an OR function.
Figure 4.6
Truth Table 4-6
A
B
C
0
0
0
+5
+5
0
+5
+5
11.
Using Multisim / Proteus software simulate
the circuit in figure 4.2, 4.3, 4.5 and 4.6.
Observe their outputs.
Does it produce the same
II.
EVALUATION:
1.
Implement
the
logic
circuit
that
has
the
expression x= (AB . (C+D)) using only Nor and
Nand Gates.
Sketch your logic circuit here.
2.
VI.
OBSERVATION:
Input
B
0
0
1
1
0
0
1
1
Input
C
0
1
0
1
0
1
0
1
Output
D
0
1
0
0
0
0
0
0
the
the
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VII. CONCLUSION:
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