Karol Zdebel

0892519
CIS * 2030 Assignment 3
October 26th 2015

1.

Name the addressing modes for the source and destination operands in the following
instructions.
a) MOVE.W $1234, $8000
Source: Absolute Short Addressing
Destination: Absolute Long Addressing
b) MOVE.W #$1234, $4568
Source: Immediate Addressing
Destination: Absolute Short Addressing
c) MOVE.W D0, D2
Source: Data Register Direct Addressing
Destination: Data Register Direct Addressing
d) MOVE.W D0, $1234
Source: Data Register Direct Addressing
Destination: Absolute Short Addressing
e) MOVE.W D0, (A0)
Source: Data Register Direct Addressing
Destination: Address Register Indirect Addressing

2.

Convert the instructions in question 1 to machine language. Remember to show your work.
a) MOVE.W $1234, $8000
0011001111111000
Bits 0-2 are the source register which is 000 since it is a short word. Bit 3-5 are the mode
which for absolute short is 111. Bits 6-8 are the same as bits 3-5 since the mode is the same
for both absolute addressing modes. Bits 9-11 are 001 since $8000 represents absolute long
register. Bits 12-15 represent the MOVE.W instruction.
b) MOVE.W #$1234, $4568
0011000111111100
Bits 0-2 are the source register which is 001 since the source is an immediate value. Bits 3-5
are the mode which for immediate addressing is 111. Bits 6-8 are the same as bits 3-5 since
the mode is the same for both absolute and immediate addressing. Bits 9-11 are 000 since
moving to $4568 is considered absolute short addressing. Bits 12-15 represent the MOVE.W
instruction.
c) MOVE.W D0, D2
0011010000000000
Bits 0-2 represent the source which is the 0th data register(000), bits 3-5 represent the data
register direct mode which is 000, and same goes for bits 6-8. Bits 9-11 represent the 2nd
data register (010). Bits 12-15 represent the instruction MOVE.W.
d) MOVE.W D0, $1234
0011000111000000
Bits 0-2 (000) represent the source register which is D0. Bits 3-5 represent the source mode
which for a data register is 000. Bits 6-8 represent the mode for the destination which is 111.
Bits 9-11 represent the destination register which is 000 for absolute short addressing.
e) MOVE.W D0, (A0)
0011000010000000
Bits 0-2 (000) represent the source register which is 000. Bits 3-5 (000) represent the source
mode which is 000 for direct addressing. Bits 6-8 represent the destination mode which for
indirect addressing is 010. Bits 9-11(000) represent the destination register or the register
number which is 000 in this case (A0).

3.

Sort the instructions in question 1 from fastest to the slowest and clearly explain why.
MOVE.W D0, D2 = 4(1/0)
-This instruction is the fastest since only one read cycle is required and therefore the
instruction can be performed in 4 clock periods.
MOVE.W D0, (A0) = 8(1/1)
-This instruction is has the 2nd fastest execution time since one read cycle and one write
cycle is required, resulting in 8 clock periods.
MOVE.W D0, $1234 = 12(1/2)
-This instruction has the 3rd fastest execution time since two read cycles and one write cycle
is required to perform the instruction resulting in 12 clock periods.
MOVE.W #$1234, $4568 = 16(3/1)
-This instruction has the 4th fastest execution time since three read cycles and one write
cycle is required to perform the instruction resulting in 16 clock periods.
MOVE.W $1234, $8000 = 24(5/1)
-This instruction has the slowest execution time since 5 read cycles and 1 write cycle is
required to perform the instruction resulting in 24 clock periods.

4.

Under what conditions will the effect of the following instructions be the same?
MOVE.L D6, $90C2
-No condition needed
MOVE.L D6, -7(A1)
-Address register A1 must contain the value $000090C2 + $7 which is $000090C9.
MOVE.L D6, (A2)
-Address register A2 must contain the value $000090C2
MOVE.L D6, -(A3)
-Address register A3 must contain the address $000090C2 + $4 which is $000090C6

MOVE.L D6, (A4)+

-

Address register A4 must contain the address $90C2

MOVE.L D6, 6(A5,A5.L)

5.

Address register A5 must contain the address $485B since:

90C2/2 -6 = $485B

Why does the 68K ISA include both signed and unsigned branches? Explain.
The 68K ISA includes both signed and unsigned branches in order to allow for the comparing
of values without a sign bit and with a sign bit. Values without a sign bit can be larger than
values with a sign bit in terms of positive numbers. This can be useful if large addresses are
being compared and the high order bit is set. A comparison of two addresses in signed mode
where one or both of the addresses have the high order bit set may produce an inaccurate result.
This same comparison with an unsigned branch will indeed produce the right result.

6.

Assume the instruction BNE HERE is in memory location $FF1234 and the label HERE
represents the instruction at address $FF12C0. Compute the offset (displacement) for this
instruction. Will the offset be stored as an 8-bit or 16-bit value by a typical assembler? Why?
Offset is $FF1234 - $FF12C0 = $8C but more precisely -$8C
The offset will be stored as a 16 bit value by a typical assembler since -8C is not within
[-128,127], which is the maximum 8 bits signed can store.

7.

Assume the instruction BCS HERE is in memory location $809A and the label HERE
represents the instruction at address $8050. Compute the offset (displacement) for this
instruction. Will the offset be stored as an 8-bit or 16-bit value by a typical assembler? Why?
The offset will be $809A $8050 which is $4A, or 74 in decimal. Since the value is within
[-128,127] the offset will be stored as an 8 bit value by a typical assembler.

8.

Write a sequence of instructions that causes a branch to the label LOOP, if the address in A1 is
less than or equal to the address in A2.
ORG
CMPA
BLS
TRAP

$8000
(A2),(A1)
LOOP
#14

LOOP //Code here

TRAP #14

9.

Write a sequence of instructions that causes a branch to the label ELSE, if the signed word in
D3 is greater than $1234.
ORG
CMPI
BGT
TRAP

$8000
#$1234,D3 ;Asssuming a value already exists at D3
ELSE
#14

ELSE //Code here

TRAP #14
10. Write the instruction that causes a branch to OVERFLOW if an immediately previous
instruction has generated a result with unsigned overflow.
ORG
$8000
MOVE.B #$FF,D1
ADD.B
#$FF,D1
BVS
OVERFLOW
//Some code here
TRAP
#14

11. Assume that D0 = $12345678 before the following instruction executes: CMPI.B #$E4,D0.
What values do D0 and the condition code contain after the instruction executes? Show your
work.
D0 will contain the same value $12345678 since the CMPI instruction only sets the CCR flags
but does not change the actual value inside the data register. The condition code register on the
other hand will contain 01011. The only flags will be the negative, carry and overflow.
This is the result of the calculation of 78+(-E4), which in binary is
0 0111 1000
-0 1110 0100
------------------1 0110 1100 = $6C
Since a borrow occurred at the most left bit the carry flag will be set. Since the sign bit is a 1,
the N will be flagged. Also because a borrow has to occur from outside of the 8 bits (2 bytes),
the overflow flag will be flagged.
12. The condition-code register contains $0B. Indicate yes or no if the following branches will
occur. Show your work when computing the values of the branch conditions. (The branch
conditions can be found on page 96 of your textbook.)
BGT Label
Yes since negative, overflow, and not zero are flagged.
NV!Z + !N!V!Z
T + F = TRUE
BGE Label
Yes since the overflow flag and negative flag are present
NV + !N!V
T + F = TRUE
BLE Label
No since zero isnt flagged, negative isnt flagged, and overflow is not flagged.
Z + N!V + !NV
F + F + F = FALSE

BLT Label
No since neither negative and not overflow or not negative and overflow are in the condition
code register.
N!V + !NV
F + F = False
BHI Label
No since the carry flag is present.
!C !Z
F T = FALSE
BHS Label
No since the carry flag is present
BLS Label
Yes since both carry and zero are flagged
BLO Label
Yes since carry is flagged.

13. Translate the following high-level construction into 68000 assembly language:
char Ch; /* 8 bits */
int A; /* 32 bits */
unsigned short condition; /*16 bits */
.
.
if( (Ch > g) AND (Ch < m)) OR ((A>=0) AND (A<=100))
condition = 1;
else
condition = 0;
Start by creating a control-flow graph, as per the instructions given in class. Also, remember to
use short-circuit evaluation.

ORG

$8000

START:
CLR
CLR

A
CH

;Clear address
;Clear address

CMPI.B
BLE
CMPI.B
BGE
MOVE.B
TRAP

#'g',CH
OR
#'m',CH
OR
#1,C
#14

;Compare g and m to CH, branch to OR if the first

;or second statement does not match

OR

CMP.L
BLT
CMP.L
BGT
MOVE.B
TRAP

#0,A
ELSE
#100,A
ELSE
#1,C
#14

;Compare 0 to A and 100 to A if A is not between

;the two, than go to else since if conditions
;cannot be met

ELSE

MOVE.B
TRAP

#0,C
#14

Data
CH
A
C

ORG
DS.B
DS.L
DS.W

$9000
1
1
1

END

START

;Set C to 0

;Create variables

14. Consider the 68000 program below:

start
loop

done
list
index
sum

ORG
MOVEA.L
CLR.W
MOVE.L
BEQ.S
ADD.W
SUBQ.B
BRA
MOVE.W
TRAP
ORG
DC.W
EQU
DS.W
END

$8000
#list,A0
D2
#index,D1
done
(A0)+,D2
#1,D1
loop
D2,(A0)
#14
$9000
1,2,3,4,5,-6,7,8
(*-list)/2
1
start

What does the program do? Be concise. Once the program completes, what are the 32-bit
values in D2, A0, and D1? Express your answers in hexadecimal. How many times does the
BRA loop instruction execute? How many bytes of 68000 memory does index consume? Do
not use Easy68K to answer this problem. Rather, gain practice for the exam by working
(tracing) through the code by hand.
The program starts by moving the starting address of list into address register A0. The program
than puts the number of words that exist within list into the data register 1. The program than
loops 8 times, once for every word inside list, adding each word inside list into data register 2
(D2). The program than branches to done where the value inside D2, which is 24 in decimal is
moved to the memory address one word after the end of list which is $9010.
D2 = $00000018
A0 = $00009010
D1 = $00000000
BRA Loop executes a total of 8 times
Index consumes 8 bytes of 68000 memory since 8 words exist from the beginning of list until
the end, and index is calculated to be those 16 bytes divided by 2, equating to 8 bytes.