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Modelling of SOI-LDMOS Transistor

The LDMOS model is build on the basis of MM20 MOSFET model.


This model describes the characteristics of the MOSFET where the drain and source of the device are
at longer distance than the conventional MOSFET.
Next step in this model is to extend this structure by including the drift region through which the
high voltage performance characteristics are obtained.

MM20 model includes the channel region and the drift region which is the basic structure of
LDMOS region 1 and region 2.

Now in order to include the high voltage operation region that is the drift region which is under no
gate control is modeled by using the MM40 MOSFET model which includes the required region.
Thus the three regions are now model and the LDMOS basic model is obtained.

Basic High voltage MOSFET strategy is shown below

The LDMOS model thus can be modeled as a mosfet in conjunction with the resistor which is to
model the drift region and the diode part which is formed between base and channel region, these are
shown in the below figure.

The design that was modelled to study the characteristics of LDMOS is shown below
The LDMOS has a channel length of 1.8um and it is Silicon on insulator LDMOS with insulator as
silicon dioxide

The V-I characteristics of the shown ldmos are obtained and by changing parameters like the channel
length , oxide and gate length.
The graphs of Vds vs Id and Vgs vs Id for two oxides and two different channel lengths are obtained.
The two oxides used are halfnioum oxide and silicon dioxide.
The two channel lengths are 1.8um and 2.2 um.

Results

The below graph show the Vds vs Id graph with channel length of 1.8um and two different oxide
materials i.e. SiO2 and HfO2. Vgs voltages are 5v and 10v.

The below graph show the Vds vs Id graph with channel length of 2.2 um and two different oxide
materials i.e. SiO2 and HfO2, Vgs voltages are 5v and 10v.

The below graph show the Vgs vs Id graph with channel length of 1.8 um and two different oxide
materials i.e. SiO2 and HfO2, Vds voltages are 5v and 10v.

The below graph show the Vgs vs Id graph with channel length of 2.2um and two different oxide
materials i.e. SiO2 and HfO2, Vds voltages are 5v and 10v.

The circuit level model of the LDMOS is shown below

Thus the LDMOS is modelled by considering the charge equations and including the quasi-saturation
effect

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