Beruflich Dokumente
Kultur Dokumente
NCP 322/323-1
MIDTERM PROJECT
EET |
PROBLEM
Design a 3bit logic circuit that will display PROUD_EE in seven segment
display using decoder.
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
USING MULTIPLEXER
FOR A
I0
I1
I2
VCC
VCC
FOR B
I0
I1
I2
I3
VCC
PAGE 1
FOR C
I0
I1
I2
I1
I2
I0
I1
I2
I3
VCC
VCC
I3
FOR E AND F
FOR D
I0
I3
VCC
FOR G
I0
I1
I2
I3
PAGE 2
USING DECODER
JUSTIFICATION
PAGE 3
DIPTRACE
(FRONT)
PCB LAYOUT
(FRONT)
(BACK)
(BACK)
PAGE 4
PAGE 0