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dBm
We can now calculate the required gain, since we now know its placement with respect to
the number of bits within the ADCs noise floor. The sign bit does not contribute the
systems dynamic range; therefore it is subtracted from the digital accuracy of the ADC.
Vnoise= 2.5/2/212-1-1)
= 1.7263 mVrms
Radar Handbook, Skolnik, Merrill, 2nd edition, McGraw Hill, New York, TK6575.R262 1990, ISBN 007-057913-X
Pnoise= 10log((1.726310-3)2/50/0.001)
= -42.2472 dBm
dBm
dB
Where Fin is the maximum input frequency and Tjitter is the r.m.s. jitter content.
Jitter will not only exist within the digitizing clock, it will exist within the analog
waveforms within the sonar design itself. The total effects of clock and analog jitter are
effectively a r.m.s. summation.
There are no electrical designs that are jitter free iterations. Jitter is a timing variance
due to power supplies noise, component chemistry and varying digital thresholds. The
effects of jitter may not immediately apparent in a system through monitoring of analog
and digital waveforms, unless the problems are excessively critical. Jitter is most notably
assessed by a loss in signal processing gain, which should appear with data set averaging
seen within a Fourier Transform. This is calculated with respect to the following formula:
Signal Processing Gain= 10log(number of averaged samples)
dB
Outside of using high-speed designs to fight the effects of jitter, digitization should be
made at the lowest intermediate frequency as practically possible. The effects of phase
noise within an electronics design are an outward a sign that jitter is a concern.
dB
If the input frequency for an AD9240 is 2 MHz, the device has an equivalent noise figure
of 51 dB. For anyone familiar with RF systems, this order of merit would be staggering.
It obviously explains why an adequate gain structure is needed before an ADC to
minimize its performance degradation upon the receiver design. This result is reflected
within the Friis equation that relates noise figure degradation in terms of the receivers
topology2.
NF system = 10 log (F system) dB
F system (noise factor) = F1 + (F2-1)/G1 + (F3-1)/G1G2 + . Fn-1/(G1G2Gn)
In addition to the case of a noise figure model, an ADC also processes an equivalent third
order intercept point (IP) for analyzing the effects of intermodulation distortion. The
intercept point is calculated in the following manner:
Intercept point= [Harmonic suppression/(N-1)] + Input Power
The most common IP used within RF calculations references the third order intercept
point or IP3. The IP is a measure of the effectiveness of the ADCs track and hold
amplifier and is valid over the relevant frequency range and for analog input values
within 10 dB of the converters full-scale (FS) range. When the analog level is less than
10 dBFS, the nonlinearities of the encoder tend to dominate and the intercept point
concept is invalid.
The most common test for an assessment of intermodulation (IMD) distortion within an
RF system employs two-tone signal injection. These signals are relatively close in
proximity, as the following example suggests.
If two tones are injected into the input of the AD9240 at a level of 10 dBm (-8 dBFS), at
frequencies of 2.3 and 2.4 MHz, the relevant IMD spurs are at 2.2 and 2.5 MHz.
Referencing the product specification; they should appear to be 88 dB down (-80 dBm).
The converters IP3 is therefore:
2
Modern Communications Systems, Smith, Jack, pg 80, McGraw Hill, New York, TK6553.S5595 1986,
ISBN 0-07-058730-2