TECHNICAL NOTE

NDK FRANCE

PIERCE OSCILLATOR (Logic gate / unbufferised / MOS type)

Rb
Rd
C1
C2

Biasing Resistor
Damping Resistor
Foot Capacitor
Foot Capacitor

Integrated Circuit

- Rb is used to polarize the C-MOS gate in its linear area around Vdd/2.
- Rd is used to control Drive Level but induced effect is reduction of Oscillation
Margin.
Load Capacitance :

CLQuartz =

C1.C 2
+ Cs
C1 + C 2

Rb

Where Cs is equivalent Stray capacitances from PCB and Integrated

Circuit. Generally a good approximation is Cs 5pF.
Resistors & Capacitors :
Common values are :
Rb = 470k ~ 1M
Rd = 0 ~ 4.7 k (depends on oscillation margin & DL)
C1 = 0* ~ around 20pF (depends on real frequency & oscillation margin)
C2 = 0* ~ around 20pF (depends on real frequency & oscillation margin)
* "0" when integrated in IC.

Rd

Q
C1

C2

Recommendations :
Rb = 1 M / Rd=0 (before oscillation margin test)
C1 = C2 : around 4.7pF (before oscillation margin test)

NDK FRANCE Imeuble le Triptyque 12 avenue Ampere 77420 Champs sur Marne France
Tel : +33 1 60 95 00 00 Fax : +33 1 60 95 82 00 ndk@fr.ndk.com

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Technical contact : Mr G. Vergne