\documentclass{report}

\usepackage[english]{babel}
\usepackage{blindtext}
\usepackage[utf8]{inputenc}
\usepackage{fancyhdr}
\usepackage{graphicx}
\usepackage[export]{adjustbox}
\usepackage[document]{ragged2e}
\graphicspath{ {C:/Users/Austin/Desktop/} }
\usepackage{geometry}
\geometry {a4paper,
total={8.5in,11in},
left=1in,
top=1in,bottom=1in,right=1in
}
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\rhead{FeRAM}
\lhead{Govt. Model Engineering College}
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\begin{document}
\chapter{Introduction}
\large{}

The ideal memory will possess following properties such as random access, fast
read and fast write operation and unlimited usage with non-volatility. Conventional
non-volatile memory has limited endurance i.e. the number of read/write cycles
before material fatigue kicks in and the memory becomes non-functional. None of
existing memories such as DRAM, SRAM and Flash can satisfy the requirements of

ideal memory. DRAM and SRAM do not contain non-volatility. On the other hand,
Flash neither satisfies fast write operation, nor satisfies the unlimited usage. To put
this in perspective, if a system requires access to non-volatile memory once every
second then conventional Flash memory will wear out in less than two days. In the
same situation FRAM would last for well over 300 years, which is pretty infinite.
Ramtron is the first semiconductor company to make the combined breakthroughs
necessary in materials processing and design to manufacture solid state
ferroelectric memory devices. The result of these achievements is a process which
merges ferroelectrics to silicon to create ferroelectric random access memories
(FRAM memories) with significant benefits compared to existing products.
\section{Ferroelectric material}
Ferroelectric materials show spontaneous electrical polarization that can be
reversed in sense by an applied external electric field. Ferroelectric effect is not a
new discovery. As early as 1921 J. Valasek discovered the phenomenon of
spontaneous polarization on Rochelle Salt (NaKC4H4O6.4H2O) and used the term
ferroelectric to emphasize the analogy between the non-linear hysteretic
dielectric properties of Rochelle Salt and the magnetic behavior of ferromagnetic
iron. Spontaneous polarization means that electric dipoles in the material align
themselves along electric field lines when an electric field is applied to a specimen
and remain in aligned position even if the field is subsequently removed. Applying
the opposite polarity causes the dipoles to switch and align in the opposite
direction. Because ferroelectric materials exhibit at least two stable states that can
be switched back and forth, it should be feasible to build a ferroelectric memory
device that can store information in digital form. Note that ferroelectric material,
despite its name, does not necessarily contain iron.

\chapter{FRAM Technology}
\section{Initial Challenges}
Early attempts (in 1950s \& 1960s) to build ferroelectric memory had failed for
various reasons, the major one being a lack of a well-defined and stable coercive
field, which resulted in eventual loss of data due to half select pulses applied to
unselected cells in the cross-point array architecture. Fatigue or wear out was also
problem in that the amount of available signal depended upon the number of
polarization reversals.
Another obstacle to creation of a ferroelectric memory was lack of a deposition
technique that could achieve high quality submicron films. Early ferroelectric
memories employed bulk material that resulted in switching thresholds of tens or
thousands of volts and switching speeds in the range of microseconds to
milliseconds rendering the technology incompatible with integrated circuit
technology.
A further limitation to practical memory applications was the limited endurance
(decreasing signal charge as a function of switching cycles) of most ferroelectric

materials. Endurance varies widely and can range from a few cycles to $\geq$ 109
cycles depending on the material chosen and subsequent processing.
The attempts to build a ferroelectric memory had essentially been abandoned in the
early 1970s and the industry has taken a different route towards satisfying the need
for non-volatile memories. Volatile semiconductor memories such as dynamic RAMs
or static RAMs have effectively displaced magnetic core memories. However, nonvolatility is quite often an important requirement which is accomplished in many
cases by battery back-up at the board or system level. However, for many
applications non-volatility on component level is preferred. The fact that not one but
many different forms of non-volatile memory components exist today, illustrates
clearly that no one single technology can satisfy all requirements.

\section{Ferroelectric Thin Film Technology}

The ferroelectric effect is the ability of a material to return an electrical polarization
in the absence of an applied electric field. This stable polarization results from
alignment of internal dipoles within the Perovskite crystal units in the ferroelectric
material. Application of an electric field that exceeds the coercive field of the
material will cause this alignment, while reversal of the field reverses the alignment
of these internal dipoles. A simplified model of a unit of a ferroelectric crystal is
shown in \ref{fig:1}. An externally applied electric field will move the center atom
into one of the two stable positions shown based upon the direction of the field.
Once the external field is removed, the atom remains in a stable position. Since no
external electric field or current is required for the ferroelectric thin film material to
remain polarized in either state, a memory device can be built storing digital
(binary) data that will not require power to retain information stored within it.
\begin{figure}
\centering
\includegraphics{1}
\caption{Perovskite Crystal Unit Cell}
\label{fig:1}
\end{figure}
Of the many hundreds or even thousands of known ferroelectric materials, only few
are suited for switching applications and can be integrated into semiconductor
technology. To be commercially feasible the ferroelectric material has to have good
retention and endurance, adequate dielectric breakdown for submicron layers, a
coercive field compatible with five-volt operation and a signal charge of at least
5uC/cm2. The Curie temperature should be sufficiently above the highest storage
temperature and inherent switching speeds should be in nanosecond range. The
deposition technique should be compatible with standard semiconductor

processing. The ferroelectric thin film material which incorporates all of the above
properties is lead-zirconate-titanate (PZT).
\begin{figure}
\centering
\includegraphics[width=1.0\textwidth]{2}
\caption{Perovskite structure of tetragonal Pb(ZrTi)03. The Zr or Ti ion has two
stable states along a stretched axis of the unit cell. }
\label{fig:2}
\end{figure}

\section{FRAM Operation}
The basic storage element is a ferroelectric capacitor. The capacitor can be
polarized up or down by applying a field. The ferroelectric capacitor symbol
indicates that the capacitance is variable and is not a traditional linear capacitor. If
a ferroelectric capacitor is not switched when an electric field is applied (no change
in polarization), it behaves like a linear capacitor. If it is switched, there is an
additional charge induced, hence the capacitance must increase. The ferroelectric
capacitor is combined with an access transistor, a bit line, and a plate line to form
the memory cell.

\begin{figure}
\centering
\includegraphics[width=0.5\textwidth]{3}
\caption{Ferroelectric Capacitor Polarization.}
\label{fig:3}
\includegraphics[width=0.5\textwidth]{4}
\caption{F-RAM Memory Cell.}
\label{fig:4}
\end{figure}

\section{Read Operation}
The static state of the cell is Bit Line low, Plate Line low, Word Line low as shown
in \ref{fig:1}. The access begins by applying voltage to the Word Line and the Plate
Line. This applies a field across the ferroelectric capacitor and the ferroelectric

capacitor switches. The induced charge (Qs) is shared with the parasitic Bit Line
capacitance (Cbit) and the switched ferroelectric capacitor (Cs). The voltage on the
bit line, therefore, is proportional to the ratio of the capacitances Cs/Cbit (Cs
includes a small contribution from transistor and interconnect parasitics). Had the
polarization been up in this sequence, the capacitor would not switch and there
would be no additional charge induced. The charge induced in the switched
capacitor is at least two times greater than the charge available in the unswitched
capacitor (Qu). \newline
\begin{centre}
\centering
Qs $\geq$ 2Qu \newline
\end{centre}
Therefore, the switched capacitance (Cs) is at least twice the unswitched
capacitance (Cu). \newline
\begin{centre}
\centering
Cs $\geq$ 2Cu\newline
\end{centre}
\begin{figure}
\centering
\includegraphics[width=0.3\textwidth]{5}
\includegraphics[width=0.3\textwidth]{6}
\includegraphics[width=0.3\textwidth]{7}
\caption{Memory Cell Access Sequence}
\label{fig:7}
\end{figure}
It follows that the Bit Line voltage for the switched case is at least two times greater
than the Bit Line voltage for the unswitched case. The sensing scheme is very
similar to the techniques used in DRAMs. The Bit Line voltage is simply compared to
a reference that is above the unswitched value and below the switched value. The
sense amp drives the Bit Lines to the rails and the output of the sense amp is either
high or low (1 or 0). The access is completed in less than 100ns.
At the end of the access the Bit Lines are set high for the switched case and set low
for the unswitched case. The cycle is completed by bringing the Plate Line low,
which restores the state of the switched terms and then the Bit Line is precharged
to 0V. The restore/precharge period is also very fast, less than 100ns. The minimum

achievable access/cycle times are primarily driven by the capacitance of the

memory cell. The time it takes to switch the ferroelectric capacitor is nearly
instantaneous and, therefore, switching mechanisms does not contribute to the
overall cycle time.

\section{Write Operation}
The device is written by applying a voltage +V which is greater than the coercive
voltage of the structure. Under the influence of the electric field, the dipoles are
aligned in one direction. The device is read by again applying a voltage V across the
device. If the dipoles are oriented in the direction of the electric field a current pulse
is generated that corresponds to the charging current of the capacitor. This current
is proportional to the linear dielectric constant of the material.
If, however, the dipoles are oriented in the opposite direction. a larger current pulse
is generated that is the sum of the charging current of the capacitor and the
switching current caused by flipping the dipoles in the opposite direction. A logic 0
or 1 can be detected depending on whether or not the switching current due to the
change of dipole orientation is present. In other words, the difference between
switched or non-switched charge is the signal charge which is sensed in a fashion
similar to DRAMs. Therefore, similar to the operation of a dynamic RAM, reading a
ferroelectric capacitor is always destructive and the information has to be written
back to the device after every read cycle. In contrast to the ferroelectric Field Effect
Transistor, the ferroelectric capacitor is not sensitive to mobile charge movement.
The information is preserved even after the device is fully compensated and the
voltage across the device has decayed to zero. The alignment of the dipoles is not
altered and can be detected by pulsing the device.
Most of the time delay is caused by parasitics and inadequate instrumentation. The
inherent switching time of PZT is of the order of 1ns. Secondly, the signal charge is
large, of the order of 15uC/cm2. This renders the technology highly scalable. Also, in
a dynamic RAM implementation, a (1x1u) ferroelectric capacitor will develop a bit
line voltage differential of about 200mv, which is well above the detection limit.

\chapter{FRAM - Characteristics \& Features}

\begin{figure}[h]
\centering
\includegraphics[width=0.3\textwidth]{8}
\label{fig:8}
\end{figure}

\section{5 Great Features:}

{\bfseries Non-volatility} \vspace{5mm}

Even when not powered, the stored information can be retained.\newline

Battery-free (Eco product).\vspace{5mm}

{\bfseries Fast Write Speed} \vspace{5mm}

Over-writable just like SRAM.\newline

Rewrite command is not required.\newline

No waiting time for erase/write operation.\newline

Writing time: 1/2,500 of EEPROM.\vspace{5mm}

{\bfseries High Read/Write Cycle Endurance} \vspace{5mm}

o
Guarantee the endurance of Max. 1013 (=10 trillion) read/write
cycles.\newline
o

Endurance: more than 10 million times of EEPROM.\vspace{5mm}

{\bfseries Lower power consumption} \vspace{5mm}

No booster circuit for write operation.\newline

o
Power consumption at write: less than 1/13 of EEPROM (2Mbit products, 2Kbit
write for a second).\newline
o

No data retention current to keep the data.\vspace{5mm}

{\bfseries High Security} \vspace{5mm}

A high difficulty of illegal analysis because of FRAM cell structure.\newline

\section{Characteristics}
\subsection{Data retention characteristics}
The figure below depicts data retention characteristics. As time (t) elapses, the
polarization charge (Q) decreases (deterioration). This characteristic determines the
data retention capability of non-volatile memory. This characteristic can be
acceleration tested by temperature. This characteristic is greatly affected by
materials. From a design standpoint, this characteristic can be improved by
optimizing the write voltage to the ferroelectric capacitor. Fujitsu Semiconductor
designs FRAM circuits to maintain the polarization charge in order to improve
retention performance.

\begin{figure}[h]
\centering
\includegraphics[width=0.7\textwidth]{9}
\caption{Data retention characteristics}
\label{fig:9}
\end{figure}
\subsection{Fatigue characteristics}
A fatigue characteristic refers to the tendency for the amount of polarization (Q) to
decrease (be degraded) as a result of repeated polarization reversal. The graph
below shows this tendency. The horizontal axis of the graph (the number of cycles)
indicates the number of times polarization is reversed. The fatigue characteristic is
highly dependent on the operating voltage, so the degradation is slower at lower
operating voltages. The fatigue characteristic can therefore be further improved by
future reduction in the voltage ratings of FRAM devices.
\begin{figure}[h]
\centering
\includegraphics[width=0.7\textwidth]{10}
\caption{Fatigue characteristics}
\label{fig:10}
\end{figure}

\section{Comparison between FRAM and other Memories}

\begin{figure}[h]

\centering
\includegraphics[width=0.9\textwidth]{11}
\label{fig:11}
\end{figure}

\chapter{FRAM Advantages \& Disadvantages}

\section{Advantages}
\begin{figure}[h]
\centering
\includegraphics[width=0.7\textwidth]{12}
\label{fig:12}
\end{figure}
Fujitsu Semiconductor's FRAM offers several advantages compared to non-volatile
memories like EEPROM or flash memories. For example, compared to conventional
non-volatile memories, FRAM consumes much less power and have faster write
speed. They use less than 1/140th the power of EEPROM for writing, and FRAM's
write speed is faster than 1/40,000th the EEPROM's. It's the similar speed to SRAM
and DRAM. Furthermore, FRAM is almost infinite read/write cycle endurance memory
device that can be written many more times than EEPROM or flash memories.
Whereas EEPROM and flash memories can be written one million times (106 times),
FRAM can be written one trillion time (1012 times), or one million-fold more.
Another unique feature of FRAM is its different cell structure, which offers excellent
tamper-proofing at the device level to protect from unauthorized data reading.
Ordinary memories preserve data depending on whether an electrical charge is
present in the storage area of the memory cells. Changes in the electrical charge
can thus be scanned by third parties, allowing unauthorized access to the stored
data. FRAM, which records data through polarization, whereby an electrical field
changes the direction of the molecules of their constituent material, is less exposed
to this risk.
FRAM has already won international recognition for its strong device-level security
which prevents unauthorized access to data. FRAM has been certified EAL4+, the
highest ranking for consumer appliances in the EAL (Evaluation Assurance Level)
system governed by international standard ISO/IEC 15408, by the French Ministry of
Defense's DCSSI (Direction Centrale de la Scurit des Systmes d'Information).
Because it is known to be very robust, FRAM performs very well at high temperature
ranges.

More and more applications call for extended or industrial temperature components,
and FRAM
fits well into this space. It has been shown to retain its data for more than 10 years
at 850C.

\section{Disadvantages}

Cost per bit of flash memory is orders of magnitude lower than that of
FeRAM.\newline

Low density: Materials tend to stop being ferroelectric when they are too
small.\newline

FRAM may undergo fatigue.\newline

Fatigue: Increase of minimum writing voltage due to loss of polarization after

extensive cycling. Fatigue caused by repeated reversals of polarization occurs not
only in writing cycles but also in reading cycles, because there is a reversal in the
polarization in a cycle process of operation from reading from a FRAM memory cell
to rewriting in it because the reading is destructive to data. Accordingly, the number
of reversals in the polarization of a FRAM is specified as a number of times of
possible access to the memory cells, whether they are in read or write
cycles.\newline

Storage capacity of FRAM much lower compared to conventional memory.

\chapter{FRAM Applications}
Because FRAM is a fast type of memory with low power requirements, it has many
applications in small consumer devices like handheld phones, PDAs, power meters
and security systems. FRAM is also expected to replace EEPROM and SRAM memory
for several applications and become a key component in the wireless field.
\vspace{5mm}

{\bfseries 1. Power failure }

Any nonvolatile memory can retain a configuration. However, if the configuration

changes and power failure is a possibility, the higher write endurance of F-RAM
allows changes to be recorded without restriction. Any time the system state
changes, it writes the new state. This avoids writing to memory on power down
when the available time is short and power is disappearing. \vspace{5mm}

{\bfseries 2. RF/ID}

In the area of contactless memory, F-RAM provides an ideal solution. Since RF/ID
memory is powered by an RF field, and the available energy in the field declines
exponentially with distance, low energy access is critical. The tag must be close
enough to the field to induce the minimum amount of energy to write and it must
extract the energy while in the field. Applications that require writes (e.g. debit
cards, tags used in manufacturing processes) benefit from improved write distance,
lower sensitivity to motion (time in the field), and lower RF power required for the
transmitter /receiver.\vspace{5mm}

{\bfseries 3. High noise environments }

Writing to EEPROM in a noisy environment can be challenging. When severe noise or

power fluctuations are present, the long write time of EEPROM creates a window of
vulnerability (measured in milliseconds) during which the write can be corrupted.
The probability of errors is proportional to the size of the window. A write transaction
window for F-RAM is less than 200ns.\vspace{5mm}

{\bfseries 4. Diagnostic/Maintenance}

In a sophisticated system, the operating history and system state during a failure is
important knowledge. Troubleshooting or maintenance is expedited when this
information has been recorded. Due to the high write endurance, F-RAM makes an
ideal system log. Diverse systems from workstations to industrial process control
can benefit from this approach. \vspace{5mm}

{\bfseries 5. Smart Cards}

A smart card is a plastic card about the size of a credit card, with an embedded
microchip that can be loaded with data, used for telephone calling, electronic cash
payments, and other applications, and then periodically refreshed for additional use.
A Smart Card is an IC card that contains a microcomputer, storage circuit, and RF
circuit. The ferroelectric RAM (FRAM) has been developed as a nonvolatile memory
that satisfies the above requirements. An FRAM embedded in an LSI must operate
as a low-voltage peripheral logic IC. We have developed a new FRAM sensing
scheme that can read bit-line potentials close to the GND potential.
\vspace{5mm}

Currently or soon, you may be able to use a smart card to: \newline


Dial a connection on a mobile telephone and be charged on a per-call
basis. \newline

Establish your identity when logging on to an Internet access provider or to

an online bank.\newline

Pay for parking at parking meters or to get on subways, trains, or

buses.\newline

Give hospitals or doctors personal data without filling out a form.\newline

Make small purchases at electronic stores on the Web (a kind of cyber

cash).\newline

Buy gasoline at a gasoline station \vspace{5mm}

Fujitsu has developed Smart Cards and other high-security devices that use secure
ferroelectric RAM (FRAM) memory. This type of memory has an anti-tampering
function and is used to keep the keys and parameters needed for
encryption/decryption algorithms, modify the keys and parameters for application
services, store a high-speed calculation table for encryption/decryption systems,
and support a firewall between applications. Contactless Smart Cards in particular
have rapidly come into wide use because they are easy to use, can perform highspeed processing, and can be used in a wide variety of applications.\vspace{5mm}

{\bfseries 6. Entertainment }

Digital car radios are gaining in popularity. Such radios can download station
information and store it in nonvolatile memory. The uncertainty of changes in this
data makes it risky to use a limited endurance memory such as EEPROM. A common
work-around is to maintain such download data in RAM and write it when power is
turned off. This requires the use of a large capacitor which can maintain power on
the EEPROM while it is written. While inexpensive, these capacitors are physically
bulky and undesirable in ever shrinking electronic radios. Matsushita designed a
16K FRAM into their in-car entertainment systems. The FM25C160 saves system
board space by eliminating components and allowing a reduced capacitor size,
which would not be possible with alternative memory solutions.

\chapter{FRAM Future Scope}

Like the DRAM, the FRAM is easy to design and can store a large volume of data. On
the other hand, the FRAM has the high processing speed of the SRAM and the nonvolatility (capability to retain data when the power supply is cut) of flash memory

devices. With all these strong points, the FRAM is being hailed as reaching the
ultimate technological limit of memory chips.
Future technologies that will determine the success or failure of the FRAM in the
marketplace include greater integration (1T/1C, multi-layer metal circuitry), better
packaging and read/write cycles of at least ten billion.
The major driving factor for the ferroelectric RAM market is its advantages over
other conventional memory technologies. Moreover, due to increasing
developments in the electronic handheld devices, FRAM is expected to witness
healthy demand in near future. Rising demand for fast memory operations in
security systems and smart card applications is another factor contributing to the
demand for ferroelectric RAM. Due to its fast operations, FRAM is likely to be used
widely in data storage applications and other applications such as wireless sensors
deployment. However, low density of FRAM as compared to the conventional
volatile as well as non-volatile memories is a significant aspect that may hamper
the growth of the ferroelectric RAM market. The storage capacity of ferroelectric
RAM is much lower as against that of conventional memory. Thus, these memories
are majorly used where speed of operation is more important than the data storage
requirement.

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