5

Wistron-SKLU Schematics
Brook_SLU
2015-06-29
REV : -1M

DY : None Installed
UMA: UMA only installed
DIS: DISCRTE OPTIMUS installed

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:

Cover Page

Document Number

Brook_SLU

Monday, July 06, 2015

Sheet
1

Rev

1M
1

of

105

Project code:
Brook SL 17 --> 4PD058010001
PCB P/N:14277
Revision: SC

CHARGER

HPA02224RGRR-1-GP
INPUTS
OUTPUTS
AD+

44

DCBATOUT

BT+

SYSTEM DC/DC
RT6575D
INPUTS

3D3V_AUX_S5
5V_AUX_S5
DCBATOUT 5V_S5
3D3V_S5

VRAM
DDR3 900 4Gb

78-81

LCD

DDR3L 1333/1600 Channel A

eDPx4

55

DDR3

Intel CPU
HDMI 1.4b

GPU
N16-GT

DDR3L 1333/1600 Channel B

Skylake U

HDMI

57

Slot 1

12

Slot 2

46,47
ISL95813HRZ-GP
33
INPUTS
OUTPUTS

13

DCBATOUT VCC_CORE

DDR3L SUS

76-86

DPC
RTD2168

DDI

SKL PCH-LP

RT8231AGQW-GP
INPUTS
OUTPUTS

CRT PORT
56

56

USB2.0 x 2

IO PORT

0D675V_S0

6 USB 3.0 ports

USB2.0 x 2

USB3.0 x 1

USB3.0 x 1

35

High Definition Audio

66

CPU 1D0V_S5

USB Charger
TPS2544 36

RT8231AGQW-GP
INPUTS
OUTPUTS

3 SATA ports

USB2.0 x1

USB3.0 x 1

35

PCIe / USB2.0

LPC I/F

WLAN + BT

CPU 1.8V_S5

61

55

USB2.0 x 1

LAN

PCIe x 1

RTL8111G(S)

RJ45
31

38

USB3.0 x 1

CardReader

USB2.0 x1

RTS5170

mSATA
(NGFF)

SATA/ PCIe x 4

HDD

SATA x 2

SATA3.0

33

ODD

HDA

SPEAKER

29

HD Audio Codec
ALC255

SPI

63

60

OUTPUTS

1D8V_S5

1D8V_S0

5V_S5

5V_S0

3D3V_S5

3D3V_S0

1V_S5

1V_VCCIO
1V_VCCST

60

Touch PAD (PTP)

I2C

TPM

LPC BUS

NPCT650 91

65

PCB LAYER

29

SPI Flash
25
8MB

L1:Top
L2:VCC
L3:Signal
L4:Signal
L5:GND
L6:Signal

LPC debug port

68

CONBO JACK

40

INPUTS

27

53

DCBATOUT 1D8V_S5

32

Switches
3D Camera
(optional)

RT8068AZQWID-GP-U
INPUTS
OUTPUTS

ACPI 5.0

Camera

52

DCBATOUT 1D0V_S5

6 PCIE ports

USB3.0 x 1

51

DCBATOUT 1D35V_S3

10 USB 2.0/1.1 ports

USB2.0 x1

CPU Core Power

28W (UMA)
15W (DIS)

PCIe x 4, DDI

45

OUTPUTS

I2C
SPI

KBC

VD_IN

ENE9028,ENE9038
24

Thermistor
26

SMBus

29

Charger

29
KB BACKLIGHT

Keyboard

DMIC X2

65

HPA02224

44

65

25

FAN

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
C
Date:
5

Block Diagram

Document Number

Brook_SLU

Monday, July 06, 2015

Sheet

Rev

1M
2

of

105

Main Func = CPU

HDMI

CRT

56
56
56
56

E55
F55
E58
F58
F53
G53
F56
G56

HDMI_DATA_CPU_N2
HDMI_DATA_CPU_P2
HDMI_DATA_CPU_N1
HDMI_DATA_CPU_P1
HDMI_DATA_CPU_N0
HDMI_DATA_CPU_P0
HDMI_DATA_CPU_N3
HDMI_DATA_CPU_P3

C50
D50
C52
D52
A50
B50
D51
C51

DDI_VGA_DATA_CPU_N0
DDI_VGA_DATA_CPU_P0
DDI_VGA_DATA_CPU_N1
DDI_VGA_DATA_CPU_P1

SKYLAKE_ULT

DDI1_TXN[0]
DDI1_TXP[0]
DDI1_TXN[1]
DDI1_TXP[1]
DDI1_TXN[2]
DDI1_TXP[2]
DDI1_TXN[3]
DDI1_TXP[3]
DDI2_TXN[0]
DDI2_TXP[0]
DDI2_TXN[1]
DDI2_TXP[1]
DDI2_TXN[2]
DDI2_TXP[2]
DDI2_TXN[3]
DDI2_TXP[3]

DDI

EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP

HDMI

L13
L12

14,57 HDMI_CLK_CPU
14,57 HDMI_DATA_CPU

N7
N8

6 DDPC_CDA
1V_VCCIO
14 DDPD_CDA
R301
1 24D9R2F-L-GP
2

N11
N12
E52

EDP_RCOMP

GPP_E18/DDPB_CTRLCLK
GPP_E19/DDPB_CTRLDATA

DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP

Strap

GPP_E20/DDPC_CTRLCLK
GPP_E21/DDPC_CTRLDATA

Strap

GPP_E22/DDPD_CTRLCLK
GPP_E23/DDPD_CTRLDATA

Strap

GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN

EDP_RCOMP
SKYLAKE-GP-U1

EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL

DISPLAY SIDEBANDS

eDP

1 OF 20

CPU1A
57
57
57
57
57
57
57
57

C47
C46
D46
C45
A45
B45
A47
B47

eDP_TX_CPU_N0
eDP_TX_CPU_P0
eDP_TX_CPU_N1
eDP_TX_CPU_P1
eDP_TX_CPU_N2
eDP_TX_CPU_P2
eDP_TX_CPU_N3
eDP_TX_CPU_P3

E45
F45

55
55
55
55
55
55
55
55

20150209 SC Jack

eDP_AUX_CPU_N 55
eDP_AUX_CPU_P 55

3D3V_S5

B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13

PCH_DPC_AUXN 56
PCH_DPC_AUXP 56

EC_SMI# 1

CRT

R302
10KR2F-L1-GP
2
DY

R303 move to RN602

EC_SMI#
EC_SCI#

HDMI_DET_CPU 57
DP_HPD_CPU 56
EC_SMI# 24
EC_SCI# 6,24
eDP_HPD_CPU 55

eDP

eDP_BLEN_CPU 24
eDP_BLCTRL_CPU 55
eDP_VDDEN_CPU 55

eDP_BLEN_CPU

R304
1 100KR2F-L3-GP
2

071.SKYLA.000U

(#543016) eDP_RCOMP Guideline

Signal

Trace
Width

Isolation
Spacing

Resistor
Value

eDP_RCOMP

20 mils

25 mils

24.9 1%

Length
Max = 100 mils

Design Guideline:
Skylake processor signal eDP_RCOMP should be connected to the VCCIO rail via a single 24.9 1% resistor.

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_(DISPLAY)
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
3

of

105

Main Func = CPU

DDR3L ball type: Interleaved Type
D

2 OF 20

CPU1B
SKYLAKE_ULT

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31

AL71
AL68
AN68
AN69
AL70
AL69
AN70
AN71
AR70
AR68
AU71
AU68
AR71
AR69
AU70
AU69
AF65
AF64
AK65
AK64
AF66
AF67
AK67
AK66
AF70
AF68
AH71
AH68
AF71
AF69
AH70
AH69
BB65
AW65
AW63
AY63
BA65
AY65
BA63
BB63
BA61
AW61
BB59
AW59
BB61
AY61
BA59
AY59
AT66
AU66
AP65
AN65
AN66
AP66
AT65
AU65
AT61
AU61
AP60
AN60
AN61
AP61
AT60
AU60

DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[12]
DDR0_DQ[13]
DDR0_DQ[14]
DDR0_DQ[15]
DDR1_DQ[0]/DDR0_DQ[8]
DDR1_DQ[1]/DDR0_DQ[9]
DDR1_DQ[2]/DDR0_DQ[10]
DDR1_DQ[3]/DDR0_DQ[11]
DDR1_DQ[4]/DDR0_DQ[12]
DDR1_DQ[5]/DDR0_DQ[13]
DDR1_DQ[6]/DDR0_DQ[14]
DDR1_DQ[7]/DDR0_DQ[15]
DDR1_DQ[8]/DDR0_DQ[24]
DDR1_DQ[9]/DDR0_DQ[25]
DDR1_DQ[10]/DDR0_DQ[26]
DDR1_DQ[11]/DDR0_DQ[27]
DDR1_DQ[12]/DDR0_DQ[28]
DDR1_DQ[13]/DDR0_DQ[29]
DDR1_DQ[14]/DDR0_DQ[30]
DDR1_DQ[15]/DDR0_DQ[31]
DDR0_DQ[16]/DDR0_DQ[32]
DDR0_DQ[17]/DDR0_DQ[33]
DDR0_DQ[18]/DDR0_DQ[34]
DDR0_DQ[19]/DDR0_DQ[35]
DDR0_DQ[20]/DDR0_DQ[36]
DDR0_DQ[21]/DDR0_DQ[37]
DDR0_DQ[22]/DDR0_DQ[38]
DDR0_DQ[23]/DDR0_DQ[39]
DDR0_DQ[24]/DDR0_DQ[40]
DDR0_DQ[25]/DDR0_DQ[41]
DDR0_DQ[26]/DDR0_DQ[42]
DDR0_DQ[27]/DDR0_DQ[43]
DDR0_DQ[28]/DDR0_DQ[44]
DDR0_DQ[29]/DDR0_DQ[45]
DDR0_DQ[30]/DDR0_DQ[46]
DDR0_DQ[31]/DDR0_DQ[47]
DDR1_DQ[16]/DDR0_DQ[48]
DDR1_DQ[17]/DDR0_DQ[49]
DDR1_DQ[18]/DDR0_DQ[50]
DDR1_DQ[19]/DDR0_DQ[51]
DDR1_DQ[20]/DDR0_DQ[52]
DDR1_DQ[21]/DDR0_DQ[53]
DDR1_DQ[22]/DDR0_DQ[54]
DDR1_DQ[23]/DDR0_DQ[55]
DDR1_DQ[24]/DDR0_DQ[56]
DDR1_DQ[25]/DDR0_DQ[57]
DDR1_DQ[26]/DDR0_DQ[58]
DDR1_DQ[27]/DDR0_DQ[59]
DDR1_DQ[28]/DDR0_DQ[60]
DDR1_DQ[29]/DDR0_DQ[61]
DDR1_DQ[30]/DDR0_DQ[62]
DDR1_DQ[31]/DDR0_DQ[63]
SKYLAKE-GP-U1

DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR1_DQSN[0]/DDR0_DQ[2]
DDR1_DQSP[0]/DDR0_DQ[2]
DDR1_DQSN[1]/DDR0_DQ[3]
DDR1_DQSP[1]/DDR0_DQ[3]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR CH - A

DDR_VTT_CNTL

AU53
AT53
AU55
AT55

M_A_CLK#0 12
M_A_CLK0 12
M_A_CLK#1 12
M_A_CLK1 12

BA56
BB56
AW56
AY56

M_A_CKE0 12
M_A_CKE1 12

AU45
AU43
AT45
AT43

M_A_CS#0 12
M_A_CS#1 12
M_A_DIMA_ODT0 12
M_A_DIMA_ODT1 12

BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54

M_A_A5
M_A_A9
M_A_A6
M_A_A8
M_A_A7

AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52

M_A_A13

AM70
AM69
AT69
AT70
AH66
AH65
AG69
AG70
BA64
AY64
AY60
BA60
AR66
AR65
AR61
AR60

M_A_DQS_DN0
M_A_DQS_DP0
M_A_DQS_DN1
M_A_DQS_DP1
M_B_DQS_DN0
M_B_DQS_DP0
M_B_DQS_DN1
M_B_DQS_DP1
M_A_DQS_DN2
M_A_DQS_DP2
M_A_DQS_DN3
M_A_DQS_DP3
M_B_DQS_DN2
M_B_DQS_DP2
M_B_DQS_DN3
M_B_DQS_DP3

M_A_A5 12
M_A_A9 12
M_A_A6 12
M_A_A8 12
M_A_A7 12
M_A_BS2 12
M_A_A12 12
M_A_A11 12
M_A_A15 12
M_A_A14 12

M_A_A12
M_A_A11
M_A_A15
M_A_A14

M_A_A13 12
M_A_CAS# 12
M_A_W E# 12
M_A_RAS# 12
M_A_BS0 12
M_A_A2 12
M_A_BS1 12
M_A_A10 12
M_A_A1 12
M_A_A0 12
M_A_A3 12
M_A_A4 12

M_A_A2
M_A_A10
M_A_A1
M_A_A0
M_A_A3
M_A_A4

M_A_DQS_DN0
M_A_DQS_DP0
M_A_DQS_DN1
M_A_DQS_DP1
M_B_DQS_DN0
M_B_DQS_DP0
M_B_DQS_DN1
M_B_DQS_DP1
M_A_DQS_DN2
M_A_DQS_DP2
M_A_DQS_DN3
M_A_DQS_DP3
M_B_DQS_DN2
M_B_DQS_DP2
M_B_DQS_DN3
M_B_DQS_DP3

12
12
12
12
13
13
13
13
12
12
12
12
13
13
13
13

AW50
AT52
AY67
AY68
BA67
AW67

V_SM_VREF_CNT 12
M_VREF_DQ_DIM0 12
M_VREF_DQ_DIM1 13
SM_PGCNTL

071.SKYLA.000U

3D3V_S0

1D35V_S3

R401
220KR2F-GP

<Core Design>

SM_PGCNTL

Wistron Corporation

DDR_PG_OUT 51

Q401
DMN5L06K-7-GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

84.05067.031

20141023 Jack

Size
A3

2nd = 084.00138.0A31

Date:
5

CPU_(DDR)
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
4

of

105

Main Func = CPU

M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AY39
AW39
AY37
AW37
BB39
BA39
BA37
BB37
AY35
AW35
AY33
AW33
BB35
BA35
BA33
BB33
AU40
AT40
AT37
AU37
AR40
AP40
AP37
AR37
AT33
AU33
AU30
AT30
AR33
AP33
AR30
AP30
AY31
AW31
AY29
AW29
BB31
BA31
BA29
BB29
AY27
AW27
AY25
AW25
BB27
BA27
BA25
BB25
AU27
AT27
AT25
AU25
AP27
AN27
AN25
AP25
AT22
AU22
AU21
AT21
AN22
AP22
AP21
AN21

DDR0_DQ[32]/DDR1_DQ[0]
DDR0_DQ[33]/DDR1_DQ[1]
DDR0_DQ[34]/DDR1_DQ[2]
DDR0_DQ[35]/DDR1_DQ[3]
DDR0_DQ[36]/DDR1_DQ[4]
DDR0_DQ[37]/DDR1_DQ[5]
DDR0_DQ[38]/DDR1_DQ[6]
DDR0_DQ[39]/DDR1_DQ[7]
DDR0_DQ[40]/DDR1_DQ[8]
DDR0_DQ[41]/DDR1_DQ[9]
DDR0_DQ[42]/DDR1_DQ[10]
DDR0_DQ[43]/DDR1_DQ[11]
DDR0_DQ[44]/DDR1_DQ[12]
DDR0_DQ[45]/DDR1_DQ[13]
DDR0_DQ[46]/DDR1_DQ[14]
DDR0_DQ[47]/DDR1_DQ[15]
DDR1_DQ[32]/DDR1_DQ[16]
DDR1_DQ[33]/DDR1_DQ[17]
DDR1_DQ[34]/DDR1_DQ[18]
DDR1_DQ[35]/DDR1_DQ[19]
DDR1_DQ[36]/DDR1_DQ[20]
DDR1_DQ[37]/DDR1_DQ[21]
DDR1_DQ[38]/DDR1_DQ[22]
DDR1_DQ[39]/DDR1_DQ[23]
DDR1_DQ[40]/DDR1_DQ[24]
DDR1_DQ[41]/DDR1_DQ[25]
DDR1_DQ[42]/DDR1_DQ[26]
DDR1_DQ[43]/DDR1_DQ[27]
DDR1_DQ[44]/DDR1_DQ[28]
DDR1_DQ[45]/DDR1_DQ[29]
DDR1_DQ[46]/DDR1_DQ[30]
DDR1_DQ[47]/DDR1_DQ[31]
DDR0_DQ[48]/DDR1_DQ[32]
DDR0_DQ[49]/DDR1_DQ[33]
DDR0_DQ[50]/DDR1_DQ[34]
DDR0_DQ[51]/DDR1_DQ[35]
DDR0_DQ[52]/DDR1_DQ[36]
DDR0_DQ[53]/DDR1_DQ[37]
DDR0_DQ[54]/DDR1_DQ[38]
DDR0_DQ[55]/DDR1_DQ[39]
DDR0_DQ[56]/DDR1_DQ[40]
DDR0_DQ[57]/DDR1_DQ[41]
DDR0_DQ[58]/DDR1_DQ[42]
DDR0_DQ[59]/DDR1_DQ[43]
DDR0_DQ[60]/DDR1_DQ[44]
DDR0_DQ[61]/DDR1_DQ[45]
DDR0_DQ[62]/DDR1_DQ[46]
DDR0_DQ[63]/DDR1_DQ[47]
DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]

DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[3]
DDR1_MA[4]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]

AN45
AN46
AP45
AP46

M_B_CLK#0 13
M_B_CLK#1 13
M_B_CLK0 13
M_B_CLK1 13

AN56
AP55
AN55
AP53

M_B_CKE0 13
M_B_CKE1 13

BB42
AY42
BA42
AW42

M_B_CS#0 13
M_B_CS#1 13
M_B_DIMB_ODT0 13
M_B_DIMB_ODT1 13

AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52

M_B_A5
M_B_A9
M_B_A6
M_B_A8
M_B_A7

BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47

M_B_A13

BA38
AY38
AY34
BA34
AT38
AR38
AT32
AR32
BA30
AY30
AY26
BA26
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18

M_B_A12
M_B_A11
M_B_A15
M_B_A14

M_B_A2
M_B_A10
M_B_A1
M_B_A0
M_B_A3
M_B_A4

M_B_A5 13
M_B_A9 13
M_B_A6 13
M_B_A8 13
M_B_A7 13
M_B_BS2 13
M_B_A12 13
M_B_A11 13
M_B_A15 13
M_B_A14 13

M_B_A13 13
M_B_CAS# 13
M_B_W E# 13
M_B_RAS# 13
M_B_BS0 13
M_B_A2 13
M_B_BS1 13
M_B_A10 13
M_B_A1 13
M_B_A0 13
M_B_A3 13
M_B_A4 13

M_A_DQS_DN4
M_A_DQS_DP4
M_A_DQS_DN5
M_A_DQS_DP5
M_B_DQS_DN4
M_B_DQS_DP4
M_B_DQS_DN5
M_B_DQS_DP5
M_A_DQS_DN6
M_A_DQS_DP6
M_A_DQS_DN7
M_A_DQS_DP7
M_B_DQS_DN6
M_B_DQS_DP6
M_B_DQS_DN7
M_B_DQS_DP7

M_A_DQS_DN4
M_A_DQS_DP4
M_A_DQS_DN5
M_A_DQS_DP5
M_B_DQS_DN4
M_B_DQS_DP4
M_B_DQS_DN5
M_B_DQS_DP5
M_A_DQS_DN6
M_A_DQS_DP6
M_A_DQS_DN7
M_A_DQS_DP7
M_B_DQS_DN6
M_B_DQS_DP6
M_B_DQS_DN7
M_B_DQS_DP7

12
12
12
12
13
13
13
13
12
12
12
12
13
13
13
13

DDR3 COMPENSATION AND RESET SIGNALS

1D35V_S3

R506
470R2F-GP

20140922
B

SM_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

1 R501
1 R502
1 R503

2 121R2F-GP
2 80D6R2F-L-GP
2 100R2F-L3-GP

1 R504
2
0R0402-PAD-1-GP

DDR3_DRAMRST#

12,13

SM_DRAMRST#

DDR CH - B

#543016

071.SKYLA.000U

DY
SC10P50V2JN-L1-GP

EC501

SKYLAKE-GP-U1

SKYLAKE_ULT

M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13

3 OF 20

CPU1C

Layout Note:
Design Guideline:
SM_RCOMP keep routing length less than 500 mils.

20141126 Jack
Brook_SLU
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_(DDR)
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

of

105

1M

Main Func = PCH

3D3V_S0
RN602

1
2
3
4

DDPC_CDA
EC_SCI#
TOUCH_DET#
PSW _CLR#

8
7
6
5

SRN2K2J-4-GP

PSW _CLR#

20150302 SC Jack

Pass Word Clear

R604
10KR2F-L1-GP
2
1

TOUCH_S_RST#

G601
GAP-OPEN

DY

20150302 SC Jack

22,76,79 DGPU_HOLD_RST#

6 OF 20

CPU1F
LPSS

3D3V_S5

EC_SCI# 3,24

ISH

DDPC_CDA

SKYLAKE_ULT

1
2

RN601

4
3

55 TOUCH_DET#
38 CCD_PW R_EN#

RTC_DET#
GPU_EVENT#

14 GPP_B18/GSPI0_MOSI

SRN10KJ-L-GP

2 R603
1
CCD_PW R_ENR
0R0402-PAD-1-GP
GPP_B18/GSPI0_MOSI

AN8
AP7
AP8
AR7

RTC_DET#
PSW _CLR#
DGPU_PW R_EN#
GPP_B22/GSPI1_MOSI

AM5
AN7
AP5
AN5

R602
1 ODD_PW R_EN_N
0R2J-L-GP

AB1
AB2
W4
AB3

25 RTC_DET#
86 DGPU_PW R_EN#
14 GPP_B22/GSPI1_MOSI

1
2
C

RN603

4
3

DGPU_PW R_EN#
DGPU_HOLD_RST#

24,60 ODD_PW R_EN

DY

SRN10KJ-L-GP

20150302 SC Jack
20150302 SC Jack

LPSS_UART2_RXD
LPSS_UART2_TXD
LPSS_UART2_RTS#
LPSS_UART2_CTS#

20141119 Jack

Touch Panel

55 I2C0_DATA_CPU
55 I2C0_CLK_CPU

AH9
AH10

3D3V_S0

1
2
3
4

RN609

U7
U6
U8
U9

65 I2C1_DATA_CPU
65 I2C1_CLK_CPU

Touch Pad

AD1
AD2
AD3
AD4

AH11
AH12
8
7
6
5

I2C0_DATA_CPU
I2C0_CLK_CPU
I2C1_DATA_CPU
I2C1_CLK_CPU

AF11
AF12

GPP_B15/GSPI0_CS#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI

GPP_D9/ISH_SPI_CS#
GPP_D10/ISH_SPI_CLK
GPP_D11/ISH_SPI_MISO
GPP_D12/ISH_SPI_MOSI

Strap

GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL

Strap

GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL

GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS#
GPP_C11/UART0_CTS#

GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL

GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#

GPP_D13/ISH_UART0_RXD/SML0BDATA
GPP_D14/ISH_UART0_TXD/SML0BCLK
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#

TOUCH_S_RST# 55

M4
N3
N1
N2
AD11
AD12
C

GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#

GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL

GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6

GPP_F4/I2C2_SDA
GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA
GPP_F7/I2C3_SCL

U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13

20141027 Jack

DGPU_DUAL2
DGPU_PRESENT
MIC_DET
GPU_EVENT#

GC6_FB_EN_MCP

R605 1

GSENSOR_INT# 69

20150225 SC Jack
GPU_EVENT# 79
GC6_FB_EN 79,86

0R0402-PAD-1-GP

GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL
SKYLAKE-GP-U1

SRN2K2J-4-GP

P2
P3
P4
P1

20141021 Jack

071.SKYLA.000U

3D3V_S0
B

SINGLE

R606
10KR2F-L1-GP

UMA

DY

2
3
4

R608
10KR2F-L1-GP

940_DAUL RANK

DGPU_PRESENT

DGPU_DUAL2

R615
10KR2F-L1-GP

R607
10KR2F-L1-GP

DUAL

PX

DGPU_PRESENT
H:UMA
L:DIS

MIC_DET

1
DB2

5V_S5

R609
10KR2F-L1-GP

940_SINGLE RANK
2

20.F1897.004
20150225 SC Jack

LPSS_UART2_TXD
LPSS_UART2_RXD

MIC_DET
H:SINGLE MIC
L:DUAL MIC

N16S-GT 940 VBIOS (DGPU_DUAL2)

H:DAUL RANK
L:SINGLE RANK

R614
10KR2F-L1-GP

DY
DY

3D3V_S0

3D3V_S0

3D3V_S0

LPSS_UART2_RXD
LPSS_UART2_TXD
LPSS_UART2_RTS#
LPSS_UART2_CTS#

1
2
149K9R2F-L-GP
2
149K9R2F-L-GP
2
DY
149K9R2F-L-GP
2
DY
49K9R2F-L-GP

R610
R611
R612
R613

20141022 Jack

20150202 SC Jack

ACES-CON4-37-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

20141121 Jack
Title
Size
A3
Date:
5

CPU_(LPSS/ISH)
Brook_SLU

Document Number

Monday, July 06, 2015

Sheet
1

Rev

1M
of

105

Main Func = CPU

1V_CPU_CORE

CPU POWER 1 OF 4

AK32
AB62
P62
V62
H63
G61
AC63
AE63
AE62
AG62
AL63
AJ62

VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43

SKYLAKE_ULT

VCCG0

VCC_SENSE
VSS_SENSE

VCCG1
VIDALERT#
VIDSCK
VIDSOUT

VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62

VCCSTG_G20
VCC_OPC_1P8_H63

G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43

1V_CPU_CORE
RN703

E32
E33

VCC_SENSE
VSS_SENSE

VCC_SENSE 46
VSS_SENSE 46

B63 VIDALERT#_CPU
A63 VIDSCK_CPU
D64 VIDSOUT_CPU

2
1

3
4

R1

K32

VCC_A30
VCC_A34
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30

R2

A30
A34
A39
A44
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
G30

12 OF 20

CPU1L

1V_CPU_CORE

SRN100F-1-GP

20150302 SC Jack

1V_VCCSTG

G20

Layout Note:
1. Place close to CPU
2. VCC_SENSE/ VSS_SENSE
impedance=50 ohm
3. Length match<25mil

VCCSTG(ICCMAX.=0.04A)

VCC_OPC_1P8_G61
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO
VCCEOPIO
VCCEOPIO_SENSE
VSSEOPIO_SENSE
SKYLAKE-GP-U1

1V_VCCIO

1V_VCCSTG
1 R709
2
0R0402-PAD-1-GP

071.SKYLA.000U

1V_VCCST

1 R727

DY1

R732

2 R726

256R2J-L1-GP
254D9R2F-L1-GP
1100R2F-L3-GP

VIDALERT#_CPU_R
VIDSCK_CPU_R
VIDSOUT_CPU_R

VIDALERT#_CPU

1 R728

2 220R2J-L2-GP

VIDSCK_CPU

1 R729

2 0R0402-PAD-1-GP

VIDSCK_CPU_R

VIDSOUT_CPU

1 R730

2 0R0402-PAD-1-GP

VIDSOUT_CPU_R

VIDALERT#_CPU_R

46

46
46

CLOSE CPU

SVID_543016:

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

CPU_POWER1
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
7

of

105

Main Func = CPU

13 OF 20

CPU1M
1V_VCCGT

A48
A53
A58
A62
A66
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69

J70
J69

46 VCCGT_SENSE
46 VSSGT_SENSE

1V_VCCGT

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

1V_VCCGT

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

SKYLAKE_ULT

VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66

VCCGT_SENSE
VSSGT_SENSE
SKYLAKE-GP-U1

1V_VCCIO

CPU POWER 2 OF 4

VCCGTX_SENSE
VSSGTX_SENSE

1D35V_S3

N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62

14 OF 20

CPU1N
CPU POWER 3 OF 4

AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51

1D35V_S3

20150306 SC Jack

SKYLAKE_ULT

1V_VCCSTG

A18

1D35V_S3

A22
1V_VCCSFR

AL23
K20
K21

1 R808
2
0R0402-PAD-1-GP

VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

1V_VCCST

AM40

1V_VCCST

VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21

VCCIO_SENSE
VSSIO_SENSE

AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66

VSSSA_SENSE
VCCSA_SENSE
SKYLAKE-GP-U1

AK28
AK30
AL30
AL42
AM28
AM30
AM42

1V_VCCSA

AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22

20141118 Jack

H21
H20

VSSSA_SENSE 46
VCCSA_SENSE 46
C

071.SKYLA.000U
1V_VCCSA

RN805

4
3

1
2

R1
R2

VCCSA_SENSE
VSSSA_SENSE

SRN100F-1-GP

20150325 SC

AK62
AL61

071.SKYLA.000U

RN804

4
3

R1
R2

1
2

VCCGT_SENSE
VSSGT_SENSE

SRN100F-1-GP

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_POWER1
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
8

of

105

Main Func = PCH

3D3V_1D8V_VCCPGPPA

Imax 8.28A

1D0V_S5

15 OF 20

CPU1O
CPU POWER 4 OF 4

AB19
AB20
P18

2.57A
1V_DCPDSW
1D0V_S5

AF18
AF19
V20
V21
AL1

3.6A

K17
L1
N15
N16
N17
P15
P16
K15
L15
V15
AB17
Y18

3D3V_S5
0.09A
C

0.2A
3D3V_S5

3D3V_S5
1D0V_S5

AJ19

0.1A

AJ16

3.5A

AF20
AF21
T19
T20

1D0V_S5

20141201 SB Jack

AD17
AD18
AJ17

AJ21
AK20
N18

VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE

1.8V Only

DCPDSW_1P0

VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG

VCCPRIM_3P3_V19

VCCMPHYAON_1P0
VCCMPHYAON_1P0

VCCPRIM_1P0_T1
VCCATS_1P8

VCCMPHYGT_1P0_N15
VCCMPHYGT_1P0_N16
VCCMPHYGT_1P0_N17
VCCMPHYGT_1P0_P15
VCCMPHYGT_1P0_P16

VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14

VCCAMPHYPLL_1P0
VCCAMPHYPLL_1P0

DCPRTC
VCCCLK1

VCCAPLL_1P0
VCCCLK2
VCCPRIM_1P0_AB17
VCCPRIM_1P0_Y18

VCCCLK3

VCCDSW_3P3_AD17
VCCDSW_3P3_AD18
VCCDSW_3P3_AJ17

VCCCLK4

VCCHDA

VCCCLK6

VCCSPI

2
R901 1
0R0402-PAD-1-GP

ESPI

SKYLAKE_ULT

VCCCLK5

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

AK15
AG15
Y16
Y15
T16
AF16
AD15

3D3V_1D8V_VCCPGPPA
3D3V_S5

1D8V_S5
3D3V_S5

V19

AA1

1D0V_S5
0.27A

1D8V_S5

AK17

3D3V_S5

AK19
BB14

3D3V_RTC_AUX

BB10

DCPRTC

A14
K19

20150415 -1

eSPI_508740:

3D3V_S5

T1

3D3V_S5

1D0V_S5
0.1A

L21
N20

0.1A

L19

0.1A

A10
AN11
AN13

V0.85A_VID0
V0.85A_VID1

1
1

TP2101
TP2102

VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCPRIM_3P3_AJ21
VCCPRIM_1P0_AK20
VCCAPLLEBB
SKYLAKE-GP-U1

071.SKYLA.000U

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_(POWER1)
Brook_SLU

Document Number

Monday, July 06, 2015

Sheet
1

Rev

1M
of

105

Main Func = CPU

1V_CPU_CORE

2
1
2

1
2
1

C1010

2
1

2
1
2

C1013
SC22U6D3V5MX-L3-GP

C1012
SC22U6D3V5MX-L3-GP

C1011
SC22U6D3V5MX-L3-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

EC1002

C1009

1V_CPU_CORE
C

EC1001

1
1

DY

C1008

2
2

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

DY

C1007

SC22U6D3V5MX-L3-GP

PC1024

SC22U6D3V5MX-L3-GP

1
SC22U6D3V5MX-L3-GP

PC1023

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

PC1022

PC1021

PC1020

PC1019

PC1018

SC22U6D3V5MX-L3-GP

PC1017

C1006

SC1U10V2KX-L1-GP

PC1016

C1005

SC1U10V2KX-L1-GP

PC1015

C1004

SC1U10V2KX-L1-GP

PC1014

SC1U10V2KX-L1-GP

PC1013

C1003

C1002

C1001

1
2

1
2

PC1012
SC22U6D3V5MX-L3-GP

1
2

PC1011
SC22U6D3V5MX-L3-GP

1
2

PC1010
SC22U6D3V5MX-L3-GP

1
2

SC22U6D3V5MX-L3-GP

1
2

SC22U6D3V5MX-L3-GP

1
2

SC22U6D3V5MX-L3-GP

1
2

SC22U6D3V5MX-L3-GP

1
2

SC22U6D3V5MX-L3-GP

PC1009

SC10U6D3V3MX-L-GP

PC1008

SC10U6D3V3MX-L-GP

SC22U6D3V5MX-L3-GP

PC1007

SC10U6D3V3MX-L-GP

PC1006

SC10U6D3V3MX-L-GP

PC1005

SC10U6D3V3MX-L-GP

PC1004

IccMax current = 3.5 A

SC10U6D3V3MX-L-GP

SC22U6D3V5MX-L3-GP

PC1003
SC22U6D3V5MX-L3-GP

PC1002
SC22U6D3V5MX-L3-GP

PC1001

1D35V_S3

22U 0805 x 22

IccMax current = 28 A

20150616 -1M

1
2

1
2

C1028

C1029
SC1U10V2KX-L1-GP

C1027

SC1U10V2KX-L1-GP

C1026

SC1U10V2KX-L1-GP

C1025

SC1U10V2KX-L1-GP

C1024

SC1U10V2KX-L1-GP

C1023

SC1U10V2KX-L1-GP

C1022

SC1U10V2KX-L1-GP

C1021

SC1U10V2KX-L1-GP

C1020

SC10U6D3V3MX-L-GP

CLOSE CPU AL23

C1019

IccMax = 2.73 A

1V_VCCIO

SC10U6D3V3MX-L-GP

CLOSE CPU A22

C1018

1V_VCCSFR

C1017

1V_VCCSTG

IccMax = 0.12 A

SC1U10V2KX-L1-GP

1D35V_S3

SC1U10V2KX-L1-GP

CLOSE CPU A18

IccMax = 0.26 A

SC1U10V2KX-L1-GP

CLOSE CPU AM40

C1016
SC1U10V2KX-L1-GP

C1015
SC1U10V2KX-L1-GP

SC10U6D3V3MX-L-GP

C1014

1V_VCCST

IccMax = 0.04 A

IccMax = 0.04 A
1D35V_S3

Brook_SLU

CLOSE CPU K20,K21

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_(Power CAP1)
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
10

of

105

Main Func = CPU

VCCSA

1V_VCCSA

IccMax current = 31 A
20141203 SB Jack

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

PC1152

1
1

EC1101

EC1103

EC1104

DY

1
2

20141203 SB Jack

EC1102

PC1128

20141203 SB Jack

PC1151

PC1153
SC22U6D3V5MX-L3-GP

1
2

1
2
1V_VCCGT

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

PC1157

DY

SCD1U16V2KX-L-GP

DY

PC1150

20150616 -1M

SCD1U16V2KX-L-GP

1
2

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

PC1127

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

2
2

SC22U6D3V5MX-L3-GP

PC1126

PC1125

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

2
2

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

2
2

PC1124

2
1

2
1

2
1

PC1123

PC1120

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

PC1119

PC1118

SC22U6D3V5MX-L3-GP

PC1117

PC1116

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC10U6D3V3MX-L-GP

PC1115

PC1114

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

2
1

PC1113

SC22U6D3V5MX-L3-GP

2
1

PC1112

PC1122

PC1149

SCD1U16V2KX-L-GP

PC1111

PC1121

PC1148

SCD1U16V2KX-L-GP

1V_VCCSA

PC1110

SC22U6D3V3MX-1-GP

PC1109

SC22U6D3V5MX-L3-GP

PC1108

PC1107

PC1106

PC1105

ICCMAX.=5A

PC1104

PC1103

PC1102

PC1101

GT

1V_VCCGT

20150616 -1M

1D0V_S5

3D3V_S5

1
2

1
2

CLOSE CPU AL1

C1120

CLOSE CPU BB10

C1115

C1119

CLOSE CPU AK19

C1118

CLOSE CPU AK17

C1117

C1116

1
2

1
2

CLOSE CPU T16

CLOSE CPU A10

C1103

SC1U10V2KX-L1-GP

DY

SCD1U16V2KX-L-GP

CLOSE CPU Y16

C1114

SC1U10V2KX-L1-GP

DY

DY

1D8V_S5

SCD1U16V2KX-L-GP

CLOSE CPU AG15

C1113

C1121

3D3V_RTC_AUX

SC1U10V2KX-L1-GP

DY

CLOSE CPU N18

3D3V_S5

SC1U10V2KX-L1-GP

CLOSE CPU V19

C1112

SC1U10V2KX-L1-GP

DY

3D3V_S5

SC1U10V2KX-L1-GP

CLOSE CPU AJ19

C1110
SC1U10V2KX-L1-GP

C1108

3D3V_S5

3D3V_S5

SC1U10V2KX-L1-GP

3D3V_S5

CLOSE CPU AF20

C1111

1
1
2

1
2

1
2

1
2

CLOSE CPU K15

DY

SCD1U16V2KX-L-GP

DY

C1109

DCPRTC

SC1U10V2KX-L1-GP

DY

1V_DCPDSW

SC1U10V2KX-L1-GP

CLOSE CPU N15

C1107

C1106

1D0V_S5

SC1U10V2KX-L1-GP

CLOSE CPU K17

C1105

1D0V_S5

SC1U10V2KX-L1-GP

CLOSE CPU AF18

C1104

1D0V_S5

SC1U10V2KX-L1-GP

DY

SC22U6D3V5MX-L3-GP

CLOSE CPU AB19

C1102

SC1U10V2KX-L1-GP

DY

1D0V_S5

SC1U10V2KX-L1-GP

C1101

1D0V_S5

SC1U10V2KX-L1-GP

1D0V_S5

SC1U10V2KX-L1-GP

1D0V_S5

CLOSE CPU AA1

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_(Power CAP2)
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
11

of

105

Main Func = DDR SODIMM

DM1

DY

DY

DY

DY

C1230S

C1229S

C1228S

C1211S

C1210S

C1209S

C1208S

1
2

C1207S

DY

DY

DY

SA_DIMM_VREFDQ

Layout Note:
Place these Caps near DIMM1.

V_SM_VREF_CNT

1
1

R1221
24D9R2F-L-GP

C1247
SC22U6D3V5MX-L3-GP
2

DY

1D35V_S3

DY

C1221
SC1U10V2KX-L1-GP

1
2

C1220
SC1U10V2KX-L1-GP
2
1

1
2

1
2

C1216
SC1U10V2KX-L1-GP

DY

C1257
SCD022U16V2KX-3GP

R1219
1K8R2F-GP

0D675V_VREF_S0

DY

Layout Note:

R1212
1K8R2F-GP
2

Place these caps

close to VTT1 and
VTT2.

R1215
22R2F-GP 1

M_VREF_DQ_DIM0

R1213
1K8R2F-GP

M_VREF_DQ_DIMMA

C1256
SCD022U16V2KX-3GP

62.10024.S21
2nd = 62.10024.M31

4th = 62.10017.I31

R1214
24D9R2F-L-GP
2

R1220
1 2R2F-GP2

M_VREF_CA_DIMMA

3rd = 62.10024.Q61
C1204
SCD1U16V2KX-L-GP

R1218
1K8R2F-GP

DY

C1227

1
2

C1226

DY

C1223

C1224

C1225

C1219

C1213

1D35V_S3

C1212

+V_VREF_PATH1

close to dimm

VTT1
VTT2
SKT_DDR 204P SMD
DDR3-204P-262-GP-U

1D35V_S3

C1215
SC1U10V2KX-L1-GP

1
2

C1217
SCD1U16V2KX-L-GP

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206

C1203
SCD1U16V2KX-L-GP

1D35V_S3

+V_VREF_PATH3

203
204

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

DY

C10U6D3V3MX-L-GP

RESET#

0D675V_VREF_S0

DY

77
122
125

SC1U10V2KX-L1-GP

M_VREF_DQ_DIMMA

VREF_CA
VREF_DQ

20140919

197
201

C10U6D3V3MX-L-GP

30

5,13 DDR3_DRAMRST#

ODT0
ODT1

TS#_DIMM0_1

199

SC1U10V2KX-L1-GP

126
1

198

3D3V_S0

DY

PCH_SMBDATA 13,18,69
PCH_SMBCLK 13,18,69
3D3V_S0

C10U6D3V3MX-L-GP

All VREF traces should

have width=20mil;
spacing=20 mil

116
120

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

R1211
10KR2F-L1-GP
1
2

TS#_DIMM0_1
200
202

SC1U10V2KX-L1-GP

Layout Note:

M_A_DIMA_ODT0
M_A_DIMA_ODT1

M_VREF_CA_DIMMA
M_VREF_DQ_DIMMA

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Thermal EVENT

C10U6D3V3MX-L-GP

4 M_A_DIMA_ODT0
4 M_A_DIMA_ODT1

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

20140919

SC1U10V2KX-L1-GP

20140926 JACK

12
29
47
64
137
154
171
188

NC#1
NC#2
NC#/TEST

M_A_CLK1 4
M_A_CLK#1 4

11
28
46
63
136
153
170
187

C10U6D3V3MX-L-GP

Place these caps

close to DM1 PIN126

M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7

SA0
SA1

102
104

SC1U10V2KX-L1-GP

M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7

10
27
45
62
135
152
169
186

EVENT#
VDDSPD

M_A_CLK0 4
M_A_CLK#0 4

C10U6D3V3MX-L-GP

4
4
4
4
5
5
5
5

M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7

SDA
SCL

M_A_CKE0 4
M_A_CKE1 4

101
103

SC1U10V2KX-L1-GP

C1201
SCD1U16V2KX-L-GP

M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_A_CS#0 4
M_A_CS#1 4

73
74

C10U6D3V3MX-L-GP

4
4
4
4
5
5
5
5

CK1
CK1#

BA0
BA1

M_A_RAS# 4
M_A_WE# 4
M_A_CAS# 4

114
121

SC1U10V2KX-L1-GP

M_VREF_CA_DIMMA

CK0
CK0#

110
113
115

C10U6D3V3MX-L-GP

M_A_DQ5
M_A_DQ1
M_A_DQ7
M_A_DQ3
M_A_DQ0
M_A_DQ4
M_A_DQ2
M_A_DQ6
M_A_DQ13
M_A_DQ12
M_A_DQ14
M_A_DQ15
M_A_DQ8
M_A_DQ9
M_A_DQ11
M_A_DQ10
M_A_DQ16
M_A_DQ17
M_A_DQ19
M_A_DQ18
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ36
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ32
M_A_DQ37
M_A_DQ39
M_A_DQ38
M_A_DQ41
M_A_DQ40
M_A_DQ47
M_A_DQ46
M_A_DQ44
M_A_DQ45
M_A_DQ43
M_A_DQ42
M_A_DQ49
M_A_DQ53
M_A_DQ51
M_A_DQ55
M_A_DQ48
M_A_DQ52
M_A_DQ50
M_A_DQ54
M_A_DQ56
M_A_DQ57
M_A_DQ62
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ59
M_A_DQ58

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

CS0#
CS1#
CKE0
CKE1

NP1
NP2

SC1U10V2KX-L1-GP

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

M_A_DQ5
M_A_DQ1
M_A_DQ7
M_A_DQ3
M_A_DQ0
M_A_DQ4
M_A_DQ2
M_A_DQ6
M_A_DQ13
M_A_DQ12
M_A_DQ14
M_A_DQ15
M_A_DQ8
M_A_DQ9
M_A_DQ11
M_A_DQ10
M_A_DQ16
M_A_DQ17
M_A_DQ19
M_A_DQ18
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ36
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ32
M_A_DQ37
M_A_DQ39
M_A_DQ38
M_A_DQ41
M_A_DQ40
M_A_DQ47
M_A_DQ46
M_A_DQ44
M_A_DQ45
M_A_DQ43
M_A_DQ42
M_A_DQ49
M_A_DQ53
M_A_DQ51
M_A_DQ55
M_A_DQ48
M_A_DQ52
M_A_DQ50
M_A_DQ54
M_A_DQ56
M_A_DQ57
M_A_DQ62
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ59
M_A_DQ58

NP1
NP2
RAS#
WE#
CAS#

109
108

4 M_A_BS0
4 M_A_BS1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79

C1214
SC1U10V2KX-L1-GP

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

4 M_A_A0
4 M_A_A1
4 M_A_A2
4 M_A_A3
4 M_A_A4
4 M_A_A5
4 M_A_A6
4 M_A_A7
4 M_A_A8
4 M_A_A9
4 M_A_A10
4 M_A_A11
4 M_A_A12
4 M_A_A13
4 M_A_A14
4 M_A_A15
4 M_A_BS2

Note:
SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30

Place these caps

close to DM1 PIN1
A

20140926 JACK

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

DDR3-SODIMM1
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
12

of

105

Main Func = DDR SODIMM

Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34

DM2

DY

DY

C1312

DY

C1335

C1330

DY

DY

C1336

1
2

C1334

C1333

C1318

1
2

DY

C1316

C1332

DY

C1329

C1331

C1317

C1314

C1315

DY

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206

C1327

C1313

DY

Layout Note:
Place these Caps near DIMM2.

1
2

C1323
SC1U10V2KX-L1-GP

DY

DY

C1321
SC1U10V2KX-L1-GP
2
1

C1319
SC1U10V2KX-L1-GP

1
2

1
2

C1320
SC1U10V2KX-L1-GP

0D675V_VREF_S0

DY

C1303
SC22U6D3V5MX-L3-GP

DY

1D35V_S3

R1304
1K8R2F-GP

M_VREF_DQ_DIMMB

3rd = 62.10024.Q71

R1305
1
2R2F-GP

4th = 62.10017.I21

R1307
1K8R2F-GP

C1302
SCD1U16V2KX-L-GP

M_VREF_DQ_DIM1

2nd = 62.10024.M51

Place Close DIMM2

Layout Note:
close to dimm

62.10024.S61

C1328
SCD022U16V2KX-3GP
+V_VREF_PATH2

R1306
24D9R2F-L-GP
2

2
1
2

1D35V_S3

DY

C1322
SC1U10V2KX-L1-GP

1
2

DY

TS#_DIMM1_1

1D35V_S3

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

SC10U6D3V3MX-L-GP

C1301
SCD1U16V2KX-L-GP

VTT1
VTT2
SKT_DDR 204P SMD
DDR3-204P-263-GP-U

3D3V_S0

R1303
10KR2F-L1-GP
1
2

SC1U10V2KX-L1-GP

203
204

Layout Note:
Place these caps
close to DM2 PIN1

RESET#

0D675V_VREF_S0

20140919

Thermal EVENT
C1311
SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

M_VREF_DQ_DIMMB

VREF_CA
VREF_DQ

DY

SC1U10V2KX-L1-GP

30

5,12 DDR3_DRAMRST#

ODT0
ODT1

77
122
125

SA1_DIMB

SC10U6D3V3MX-L-GP

All VREF traces should

have width=20mil;
spacing=20 mil

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

20140919

199
197
201

PCH_SMBDATA 12,18,69
PCH_SMBCLK 12,18,69
3D3V_S0

TS#_DIMM1_1

SC1U10V2KX-L1-GP

Layout Note:

126
1

M_VREF_CA_DIMMA
M_VREF_DQ_DIMMB

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

198

SC10U6D3V3MX-L-GP

116
120

5 M_B_DIMB_ODT0
5 M_B_DIMB_ODT1

20140926 JACK

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

200
202

SC1U10V2KX-L1-GP

12
29
47
64
137
154
171
188

NC#1
NC#2
NC#/TEST

M_B_CLK1 5
M_B_CLK#1 5

11
28
46
63
136
153
170
187

SC10U6D3V3MX-L-GP

M_B_DQS_DP1
M_B_DQS_DP0
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7

SA0
SA1

102
104

SA1_DIMB

SC1U10V2KX-L1-GP

M_B_DQS_DP1
M_B_DQS_DP0
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7

10
27
45
62
135
152
169
186

VDDSPD

M_B_CLK0 5
M_B_CLK#0 5

SC10U6D3V3MX-L-GP

4
4
4
4
5
5
5
5

M_B_DQS_DN1
M_B_DQS_DN0
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7

SDA
SCL
EVENT#

101
103

SC1U10V2KX-L1-GP

C1308
SCD1U16V2KX-L-GP

M_B_DQS_DN1
M_B_DQS_DN0
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

R1302
10KR2F-L1-GP

M_B_CKE0 5
M_B_CKE1 5

SC10U6D3V3MX-L-GP

Place these caps

close to DM2 PIN126
B

4
4
4
4
5
5
5
5

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_B_CS#0 5
M_B_CS#1 5

73
74

SC1U10V2KX-L1-GP

Layout Note:

CK1
CK1#

BA0
BA1

3D3V_S0

M_B_RAS# 5
M_B_WE# 5
M_B_CAS# 5

114
121

SC10U6D3V3MX-L-GP

M_VREF_CA_DIMMA

M_B_DQ8
M_B_DQ12
M_B_DQ10
M_B_DQ11
M_B_DQ9
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ4
M_B_DQ0
M_B_DQ6
M_B_DQ3
M_B_DQ5
M_B_DQ1
M_B_DQ7
M_B_DQ2
M_B_DQ20
M_B_DQ19
M_B_DQ17
M_B_DQ22
M_B_DQ18
M_B_DQ21
M_B_DQ23
M_B_DQ16
M_B_DQ29
M_B_DQ28
M_B_DQ30
M_B_DQ31
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ39
M_B_DQ33
M_B_DQ32
M_B_DQ34
M_B_DQ38
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ45
M_B_DQ44
M_B_DQ47
M_B_DQ46
M_B_DQ49
M_B_DQ51
M_B_DQ50
M_B_DQ55
M_B_DQ52
M_B_DQ53
M_B_DQ48
M_B_DQ54
M_B_DQ56
M_B_DQ58
M_B_DQ60
M_B_DQ59
M_B_DQ57
M_B_DQ61
M_B_DQ62
M_B_DQ63

CK0
CK0#

110
113
115

M_B_DQ8
M_B_DQ12
M_B_DQ10
M_B_DQ11
M_B_DQ9
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ4
M_B_DQ0
M_B_DQ6
M_B_DQ3
M_B_DQ5
M_B_DQ1
M_B_DQ7
M_B_DQ2
M_B_DQ20
M_B_DQ19
M_B_DQ17
M_B_DQ22
M_B_DQ18
M_B_DQ21
M_B_DQ23
M_B_DQ16
M_B_DQ29
M_B_DQ28
M_B_DQ30
M_B_DQ31
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ39
M_B_DQ33
M_B_DQ32
M_B_DQ34
M_B_DQ38
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ45
M_B_DQ44
M_B_DQ47
M_B_DQ46
M_B_DQ49
M_B_DQ51
M_B_DQ50
M_B_DQ55
M_B_DQ52
M_B_DQ53
M_B_DQ48
M_B_DQ54
M_B_DQ56
M_B_DQ58
M_B_DQ60
M_B_DQ59
M_B_DQ57
M_B_DQ61
M_B_DQ62
M_B_DQ63

CS0#
CS1#
CKE0
CKE1

NP1
NP2

SC1U10V2KX-L1-GP

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

NP1
NP2
RAS#
WE#
CAS#

109
108

5 M_B_BS0
5 M_B_BS1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

5 M_B_A0
5 M_B_A1
5 M_B_A2
5 M_B_A3
5 M_B_A4
5 M_B_A5
5 M_B_A6
5 M_B_A7
5 M_B_A8
5 M_B_A9
5 M_B_A10
5 M_B_A11
5 M_B_A12
5 M_B_A13
5 M_B_A14
5 M_B_A15
5 M_B_BS2

Brook_SLU

20140926 JACK

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

DDR3-SODIMM2
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
13

of

105

STRAP RESISTORS SHOULD BE PLACED CLOSE TO SOC

SHOULD BE PLACED OUTSIDE KOZ AREA

SSID = STRAP

Display Port
B Detected

Description
GPIO

GPP_E19

Display Port
C Detected

Reserved

GPP_E21

SPI0_MISO

Boot BIOS
strap bit BBS

No reboot
GPP_B18

Flash descriptor
security override

GPP_B22

Display Port
D Detected

HDA_SDO

GPP_E23

3D3V_S0
3D3V_S5
3D3V_S0

3D3V_S0

R1441
10KR2J-3-GP

1
R1407
1KR2J-L2-GP

R1408
1KR2J-L2-GP

R1443
10KR2J-3-GP

DY

DY

1
2

DY
2

DY

RN1401
SRN2K2J-5-GP

Schematic

4
3

3D3V_S0

SPI_SO_CPU
HDMI_DATA_CPU 3,57
HDMI_CLK_CPU 3,57

GPP_B18/GSPI0_MOSI

GPP_B22/GSPI1_MOSI

6
DDPD_CDA

High

Detected

Detected

Enable

LPC

Disable

Detected

Low

Not Detected

Not Detected

Disable

SPI

Enable

Not Detected

internal pull-down

internal pull-down

internal pull-down

eSPI or LPC

Reserved

TLS Confidentiality

SPI0_MOSI

SPI0_IO2

SPI0_IO3

GPP_C2

3D3V_S5

DY

GPP_B23

3D3V_S5

R1437
1KR2F-L1-GP

3D3V_S5

R1438
10KR2J-3-GP

R1439
10KR2J-3-GP

R1440
150KR2J-GP

DY

DY

DY

Schematic

R1436
1KR2F-L1-GP

R1435
10KR2J-3-GP

DY

GPP_C5

3D3V_S5

R1415
1KR2J-L2-GP

3D3V_S5

Reserved

3D3V_S5
2

3D3V_S0

Reserved

GPP_B14

Reserved

GPIO

internal pull-down

Top Swap
Override

Description

internal pull-up

internal pull-down

internal pull-down

18

20150112 SC Jack
HDA_SPKR

17,27

SPI_SI_CPU

18

SPI_WP_ROM_R

25

SPI_HOLD_ROM_R

25

GPP_C2/SMBALERT#

18

GPP_C5/SML0ALERT#

High

Enable

Enable

eSPI

Low

Disable

Disable

LPC

internal pull-down

internal pull-up

internal pull-up

internal pull-up

internal pull-down

internal pull-down

18

GPP_B23/SML1ALERT#

18

internal pull-down

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

(Reserved)_SODIMM _SODIMM4
Rev
Brook_SLU
1M

Document Number

Monday, July 06, 2015

Sheet
1

14

of

105

Main Func = PCH

8 OF 20

CPU1H
SKYLAKE_ULT
SSIC / USB3

PCIE/USB3/SATA

dGPU

LAN

76 PEG_RX_CPU_N0
76 PEG_RX_CPU_P0
76 PEG_TX_CON_N0
76 PEG_TX_CON_P0

PX
PX

C1507
C1509

1
1

2 SCD22U10V2KX-L1-GP PEG_TX_CPU_N0
2 SCD22U10V2KX-L1-GP PEG_TX_CPU_P0

H13
G13
B17
A17

76
76
76
76

PEG_RX_CPU_N1
PEG_RX_CPU_P1
PEG_TX_CON_N1
PEG_TX_CON_P1

PX
PX

C1510
C1508

1
1

2 SCD22U10V2KX-L1-GP PEG_TX_CPU_N1
2 SCD22U10V2KX-L1-GP PEG_TX_CPU_P1

G11
F11
D16
C16

76 PEG_RX_CPU_N2
76 PEG_RX_CPU_P2
76 PEG_TX_CON_N2
76 PEG_TX_CON_P2

PX
PX

C1513
C1514

1
1

2 SCD22U10V2KX-L1-GP PEG_TX_CPU_N2
2 SCD22U10V2KX-L1-GP PEG_TX_CPU_P2

H16
G16
D17
C17

76
76
76
76

PEG_RX_CPU_N3
PEG_RX_CPU_P3
PEG_TX_CON_N3
PEG_TX_CON_P3

PX
PX

C1515
C1516

1
1

2 SCD22U10V2KX-L1-GP PEG_TX_CPU_N3
2 SCD22U10V2KX-L1-GP PEG_TX_CPU_P3

G15
F15
B19
A19

31
31
31
31

PCIE_RX_CPU_N5
PCIE_RX_CPU_P5
PCIE_TX_CPU_N5
PCIE_TX_CPU_P5

F16
E16
C19
D19
G18
F18
D20
C20

61,89 PCIE_RX_CPU_N6
61,89 PCIE_RX_CPU_P6
61 PCIE_TX_CPU_N6
61 PCIE_TX_CPU_P6

WLAN

60
60
60
60

HDD1

F20
E20
B21
A21

SATA_RX_CPU_N0
SATA_RX_CPU_P0
SATA_TX_CPU_N0
SATA_TX_CPU_P0

G21
F21
D21
C21

60 SATA_RX_CPU_N1
60 SATA_RX_CPU_P1
60 SATA_TX_CPU_N1
60 SATA_TX_CPU_P1

ODD

E22
E23
B23
A23
F25
E25
D23
C23

20141013 Jack

R1504 1
99 XDP_PRDY#
99 XDP_PREQ#

2 100R2F-L3-GP

PEG_RCOMPN_CPU
PEG_RCOMPP_CPU

D56
D61
BB11

PIRQA#

E28
E27
D24
C24
E30
F30
A25
B25

63 PCIE_RX_CPU_N11
63 PCIE_RX_CPU_P11
63 PCIE_TX_CPU_N11
63 PCIE_TX_CPU_P11
63 SATA_RX_CPU_N2
63 SATA_RX_CPU_P2
63 SATA_TX_CPU_N2
63 SATA_TX_CPU_P2

SSD/PCIE
SSD/SATA

F5
E5

USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP

PCIE1_RXN/USB3_5_RXN
PCIE1_RXP/USB3_5_RXP
PCIE1_TXN/USB3_5_TXN
PCIE1_TXP/USB3_5_TXP

USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP

PCIE2_RXN/USB3_6_RXN
PCIE2_RXP/USB3_6_RXP
PCIE2_TXN/USB3_6_TXN
PCIE2_TXP/USB3_6_TXP

USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP

PCIE3_RXN
PCIE3_RXP
PCIE3_TXN
PCIE3_TXP

USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP

PCIE4_RXN
PCIE4_RXP
PCIE4_TXN
PCIE4_TXP

USB2N_1
USB2P_1

PCIE5_RXN
PCIE5_RXP
PCIE5_TXN
PCIE5_TXP

USB2N_2
USB2P_2
USB2N_3
USB2P_3

PCIE6_RXN
PCIE6_RXP
PCIE6_TXN
PCIE6_TXP

USB2N_4
USB2P_4

PCIE7_RXN/SATA0_RXN
PCIE7_RXP/SATA0_RXP
PCIE7_TXN/SATA0_TXN
PCIE7_TXP/SATA0_TXP

USB2

USB2N_5
USB2P_5
USB2N_6
USB2P_6

PCIE8_RXN/SATA1A_RXN
PCIE8_RXP/SATA1A_RXP
PCIE8_TXN/SATA1A_TXN
PCIE8_TXP/SATA1A_TXP

USB2N_7
USB2P_7
USB2N_8
USB2P_8

PCIE9_RXN
PCIE9_RXP
PCIE9_TXN
PCIE9_TXP

USB2N_9
USB2P_9

PCIE10_RXN
PCIE10_RXP
PCIE10_TXN
PCIE10_TXP

USB2N_10
USB2P_10
USB2_COMP
USB2_ID
USB2_VBUSSENSE

PCIE_RCOMPN
PCIE_RCOMPP

GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

PROC_PRDY#
PROC_PREQ#
GPP_A7/PIRQA#
PCIE11_RXN/SATA1B_RXN
PCIE11_RXP/SATA1B_RXP
PCIE11_TXN/SATA1B_TXN
PCIE11_TXP/SATA1B_TXP
PCIE12_RXN/SATA2_RXN
PCIE12_RXP/SATA2_RXP
PCIE12_TXN/SATA2_TXN
PCIE12_TXP/SATA2_TXP

GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#

SKYLAKE-GP-U1

3D3V_S0

H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15

USB30_RX_CPU_N1 35,89
USB30_RX_CPU_P1 35,89
USB30_TX_CPU_N1 35
USB30_TX_CPU_P1 35

USB3.0

USB30_RX_CPU_N2 38
USB30_RX_CPU_P2 38
USB30_TX_CPU_N2 38
USB30_TX_CPU_P2 38

3D CAMERA

USB30_RX_CPU_N3 35,89
USB30_RX_CPU_P3 35,89
USB30_TX_CPU_N3 35
USB30_TX_CPU_P3 35

USB3.0

E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2

USB2.0

USB_CPU_PN1 66
USB_CPU_PP1 66

USB2.0 (IO BD)

USB_CPU_PN2 35
USB_CPU_PP2 35
USB_CPU_PN3 66
USB_CPU_PP3 66
USB_CPU_PN4 61,89
USB_CPU_PP4 61,89

BT

USB_CPU_PN5 55
USB_CPU_PP5 55

Touch Screen

USB_CPU_PN6
USB_CPU_PP6

AF8
AF9

55
55

USB_CPU_PN7 33
USB_CPU_PP7 33

AG1
AG2

A9
C9
D9
B9

Pair

Device

USB3.0 Port0

USB2.0

USB3.0 Port1

USB2.0 (IO BD)

USB3.0 Port2

USB3.0 Port3

BT

TOUCH SCREEN

CCD

CCD

Card Reader

Card Reader

NC

10

NC

20150213 SC Jack

AH7
AH8
AB6
AG3
AG4

USB Table

USB_CPU_PN0 36
USB_CPU_PP0 36

1
2

USBID
USBVSEN
1 R1503

USBCOMP
USBID
USBVSEN

RN1506

4
3

2 113R2F-GP
SRN1KJ-7-GP

USB_OC#

3D3V_S5
R1502
10KR2F-L1-GP
1
2

J1
J2
J3

SATA_ODD_DA#
DEVSLP 63

H2
H3
G4

SATAGP0

H1

SATA_LED#

SATA_ODD_PRSNT#

SATAGP2

60

60

R1517
10KR2F-L1-GP
1
SATA_ODD_DA# 2

20150116 SC Jack
20141021 Jack

3D3V_S0

DY

20141212 SB Jack

071.SKYLA.000U

Layout Note:
3D3V_S0

R1516
10KR2F-L1-GP
2
1

1. Trace Width: 4 mils min (breakout) 12-15 mils (trace)

Note: Must maintain low DC resistance routing (<0.1 ohm).
2. Isolation Spacing: At least 12 mils to any adjacent
high speed I/O.

PIRQA#

SATAGP0
SATA_LED#
SATA_ODD_PRSNT#
SATAGP2

1
2
3
4

RN1505

8
7
6
5

20150609 -1M Jack

M.2 auto detection
Q1902

SRN10KJ-12-GP
SATAGP2

XDP_PREQ#

20141021 Jack

DY

MSATA_PEDET 63

2N7002K-2-GP
B

84.2N702.J31
2ND = 84.2N702.031
3rd = 84.2N702.W31

SC10P50V2JN-L1-GP

EC1501

Baseline

20141126 Jack

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

CPU_(PCIE/SATA/USB)
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
15

of

105

Main Func = PCH

C1601 1

XTL_24M_X1_CPU

SC15P50V2JN-L-GP

X1601
XTAL-24MHZ-81-GP

R1602
1MR2F-L-GP

82.30004.841
2nd = 82.30004.641
3rd = 082.30019.0041
C1602 1

XTL_24M_X2_CPU
10 OF 20

CPU1J

SC15P50V2JN-L-GP

CLOCK SIGNALS

B42
A42
AT7

31 LAN_CLK_CPU#
31 LAN_CLK_CPU
31 LAN_CLKREQ_CPU#

LAN
WLAN
NGFF

D41
C41
AT8

61,89 W LAN_CLK_CPU#
61,89 W LAN_CLK_CPU
61,89 W LAN_CLKREQ_CPU#

D40
C40
AT10

63 MSATA_CLK_CPU#
63 MSATA_CLK_CPU
63 MSATA_CLKREQ_CPU#

SRCCLKREQ4#

B40
A40
AU8

SRCCLKREQ5#

E40
E38
AU7

CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
GPP_B5/SRCCLKREQ0#

SKYLAKE_ULT

CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
GPP_B6/SRCCLKREQ1#

CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P

CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
GPP_B7/SRCCLKREQ2#

GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT

CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
GPP_B8/SRCCLKREQ3#

XCLK_BIASREF
RTCX1
RTCX2

CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
GPP_B9/SRCCLKREQ4#

SRTCRST#
RTCRST#

F43
E43
BA17

20141017 Jack
1

SUSCLK

E37
E35

XTL_24M_X1_CPU
XTL_24M_X2_CPU

E42

XCLK_BIASREF

AM18
AM20

XTL_32K_X1_CPU
XTL_32K_X2_CPU

AN18
AM16

SRTC_RST#
RTC_RST#

TP1601
TPAD14-OP-GP

3D3V_RTC_AUX

1D0V_S5

1 R1603

RN1601

1
2

4
3

22K7R2F-GP
SRN20KJ-1-GP

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5#

RN1608

RTC_RST#

84.2N702.J31
2ND = 84.2N702.031
3rd = 84.2N702.W31

For AFR

SRN10KJ-L-GP

XTAL-32D768KHZ-67-GP

C1603
SC5P50V2CN-2GP

2
1

2
1

G1601
GAP-OPEN

RTC Reset

C1605

C1604
SC5P50V2CN-2GP

SRCCLKREQ4#
SRCCLKREQ5#

20141015 Jack

20150309 SC Jack

82.30001.G11
2nd = 82.30001.B21

24 RTCRST_ON
RTC_RST#_R

20150206 SC Jack

C1606

EC1607

Q1603
2N7002K-2-GP

DY

X1602

SRN10KJ-12-GP
RN1606
1
4
2
3

PEG_CLKREQ_CPU#
LAN_CLKREQ_CPU#
W LAN_CLKREQ_CPU#
MSATA_CLKREQ_CPU#

8
7
6
5

20150225 SC Jack

1
2
3
4

1
10MR2J-L-GP

SC1U6D3V3KX-L1-GP

close to PCH

3D3V_S0

2 R1615

SC1U6D3V3KX-L1-GP

XTL_32K_X2_CPU

DY
SC10P50V2JN-L1-GP

TVL-0402-01-AB1-1-GP

071.SKYLA.000U

EC1601
XTL_32K_X1_CPU
SKYLAKE-GP-U1

D42
C42
AR10

76 PEG_CLK_CPU#
76 PEG_CLK_CPU
76 PEG_CLKREQ_CPU#

GPU PEG BUS

R1621
2K2R2J-L1-GP

R1618
100KR2F-L3-GP

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

MCP_CLOCK
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

1M

Sheet
1

16

of

105

Main Func = PCH

RN1701
D

27
27
27
27

1
2
3
4

HDA_RST#_CODEC
HDA_SYNC_CODEC
HDA_BITCLK_CODEC
HDA_SDOUT_CODEC

8
7
6
5

HDA_RST#_CPU
HDA_SYNC_CPU
HDA_BITCLK_CPU
HDA_SDOUT_CPU

SRN33J-7-GP-U

20150226 SC Jack
7 OF 20

CPU1G
AUDIO

R1709
1KR2F-L1-GP
1
2

24 ME_UNLOCK
27 HDA_SDIN0_CPU

HDA_SYNC_CPU
HDA_BITCLK_CPU
HDA_SDOUT_CPU
HDA_RST#_CPU

BA22
AY22
BB22
BA21
AY21
AW22
J5
AY20
AW20
AK7
AK6
AK9
AK10

20150121 SC Jack
H5
D7

29 DMIC_CLK0_CON
29 DMIC_DATA0_CON

D8
C8
AW5

14,27 HDA_SPKR
B

SKYLAKE_ULT

HDA_SYNC/I2S0_SFRM
HDA_BLK/I2S0_SCLK
HDA_SDO/I2S0_TXD
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK
GPP_D23/I2S_MCLK
I2S1_SFRM
I2S1_TXD

Strap

SDIO/SDXC

GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP

GPP_F1/I2S2_SFRM
GPP_F0/I2S2_SCLK
GPP_F2/I2S2_TXD
GPP_F3/I2S2_RXD

GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL

GPP_D19/DMIC_CLK0
GPP_D20/DMIC_DATA0

SD_RCOMP

GPP_D17/DMIC_CLK1
GPP_D18/DMIC_DATA1

GPP_F23

GPP_B14/SPKR

AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9

FW_GPIO 38

DGPU_DUAL1
R1701

AB7

SD_RCOMP 1

2 200R2F-L1-GP

AF13

Strap
B

SKYLAKE-GP-U1

071.SKYLA.000U

3D3V_S5
1

N16V-GM 920 VBIOS (DGPU_DUAL1)

H:DAUL RANK
L:SINGLE RANK

R1702
10KR2F-L1-GP
2

920_DAUL RANK
DGPU_DUAL1
1

<Core Design>
R1703
10KR2F-L1-GP

Wistron Corporation

920_SINGLE RANK

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

20150202 SC Jack

CPU_(AUDIO/SDIO/SDXC)

Size
A4

Document Number

Rev

Brook_SLU

Date: Monday, July 06, 2015

5

Sheet

1M
17

of
1

105

Main Func = PCH

3D3V_S0

14 SPI_SI_CPU

5 OF 20
SPI - FLASH

R1806
R1807
R1808
R1809
R1810

1
1
1
1
1

215R2F-2-GP
215R2F-2-GP
215R2F-2-GP
215R2F-2-GP
215R2F-2-GP

SPI_CLK_CPU
SPI_WP_CPU
SPI_HOLD_CPU

AV2
AW3
AV3
AW2
AU4
AU3
AU2
AU1

SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#

SMBUS, SMLINK
SKYLAKE_ULT

Strap

Strap

Strap

SPI - TOUCH

M2
M3
J4
V1
V2
M1

3D3V_S0

RN1801

4
3

GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#

Strap

LPC

C LINK

H_RCIN#
INT_SERIRQ

G3
G2
G1

SRN10KJ-L-GP

SERIRQ PH:
PDG: 8.2k
CRB: 10k

SML1_DATA
SML1_CLK
SML0_DATA_CPU
SML0_CLK_CPU

RN1807
SRN2K2J-4-GP
8
1
7
2
6
3
5
4

SMB_CLK
SMB_DATA

3
4

3D3V_S5

CPU1E

1
2

R1818
8K2R2F-1-GP
1
2

Internal Pull-Up
and Pull-Down
Mark
P+
Pull-Up
PPull-Down

14 SPI_SO_CPU

24,25 SPI_CLK_ROM
24,25 SPI_SO_ROM
24,25 SPI_SI_ROM
25 SPI_WP_ROM
25 SPI_HOLD_ROM
24,25 SPI_CS_CPU_N0

PM_CLKRUN#_EC

AW13

24 H_RCIN#

AY11

24,91 INT_SERIRQ

CL_CLK
CL_DATA
CL_RST#

GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#

GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A14/SUS_STAT#/ESPI_RESET#

R7
R8
R10

SMB_CLK
SMB_DATA

R9
W2
W1

SML0_CLK_CPU
SML0_DATA_CPU

W3
V3
AM7

SML1_CLK
SML1_DATA

DM1&2 and G-SENSOR

GPP_C2/SMBALERT#

14

GPP_C5/SML0ALERT#

AY13
BA13
BB13
AY12
BA12
BA11

LPC_AD_CPU_P0_R
LPC_AD_CPU_P1_R
LPC_AD_CPU_P2_R
LPC_AD_CPU_P3_R

AW9
AY9
AW11

LPC_CLK_CPU_P0
LPC_CLK_CPU_P1

14

SML1_CLK 24,79
SML1_DATA 24,79
GPP_B23/SML1ALERT#

14

RN1811
2
1
SRN2K2J-5-GP

KBC

LPC_FRAME#_CPU
ESPI_RST# 24,91

3D3V_S0

24,68,91

RN1810
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#

GPP_A0/RCIN#

3
4
PM_CLKRUN#_EC

24,91

SKYLAKE-GP-U1

SMB_DATA

071.SKYLA.000U
R1811

2 22R2J-L1-GP

2
1

3D3V_S0

SRN10KJ-L-GP

GPP_A6/SERIRQ

LPC_CLK_KBC

24
68

LPC_CLK_CPU_P0

R1804

2 22R2J-L1-GP

LPC_CLK_DBG

LPC_CLK_CPU_P1

R1805

2 22R2J-L1-GP

LPC_CLK_TPM 91

84.2N702.A3F
2nd = 75.00601.07C

Q1801

PCH_SMBDATA 12,13,69

2N7002KDW-GP

PCH_SMBCLK

12,13,69

SMB_CLK

LPC_AD_CPU_P0_R

1 R1820

LPC_AD_CPU_P0

24,68,91

LPC_AD_CPU_P1

24,68,91

LPC_AD_CPU_P2

24,68,91

LPC_AD_CPU_P3

24,68,91

0R0402-PAD-1-GP
B

LPC_AD_CPU_P1_R

1 R1821

0R0402-PAD-1-GP

LPC_AD_CPU_P2_R

1 R1822

0R0402-PAD-1-GP

LPC_AD_CPU_P3_R

1 R1823

0R0402-PAD-1-GP

20150414 -1

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

LPC,SPI,SMBUS,CLINK
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
18

of

105

Main Func = PCH

9 OF 20

CPU1I
D

CSI-2

A36
B36
C38
D38
C36
D36
A38
B38
C31
D31
C33
D33
A31
B31
A33
B33
C

A29
B29
C28
D28
A27
B27
C27
D27

SKYLAKE_ULT

CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3

CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3

CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7

CSI2_COMP
GPP_D4/FLASHTRIG

CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11

E13
B7

CSI2_COMP

1 R1901 2
100R2F-L3-GP

EMMC

GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP

SKYLAKE-GP-U1

C37
D37
C32
D32
C29
D29
B26
A26

AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1

AM2
AM3
AP4
AT1

EMMC_RCOMP1 R1902 2
200R2F-L1-GP

071.SKYLA.000U

Brook_SLU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU_(CS-2/EMMC)

Size
A4

Document Number

Date: Monday, July 06, 2015

5

Rev

Brook_SLU

Sheet

1M
19

of
1

105

Main Func = PCH

GPP_A13-15 pin(LPC/eSPI):

3D3V_S5
XDP_DBRESET#

R2007
2 10KR2F-L1-GP
1
R2009
2 10KR2F-L1-GP
1

20150114 SC Jack
PM_SUSWARN#
PM_PWRBTN#

EC2005

20141016 Jack

EC2006

TVL-0402-01-AB1-1-GP

TVL-0402-01-AB1-1-GP

DY

DY
2

DY

PLT_RST#

EC2004
SC10P50V2JN-L1-GP

SRN10KJ-12-GP

DY

AC_PRESENT
PCIE_WAKE#
BATLOW#
GPD2/LAN_WAKE#

8
7
6
5

RN2004

1
2
3
4

PLT_RST#
1

20141127 Jack
R2014
10KR2F-L1-GP
2

XDP_DBRESET#

PM_SUSWARN#

DY

PROCPWRGD

20150114 SC Jack

DY
3D3V_RTC_AUX

R2019
1 1MR2F-L-GP
2

SM_INTRUDER#

3D3V_S5

24,31,40,61,63,68,89,91

SC10P50V2JN-L1-GP

EC2003

TPAD14-OP-GP TP1709

24 SYS_PWROK
40 PCH_PWROK

1 R2008
1 R2006

PM_RSMRST#

PLT_RST#

XDP_DBRESET#
PM_RSMRST#

DY

20150414 -1
2
EXT_PWR_GATE#
20KR2J-L2-GP

R2010
2 10KR2F-L1-GP
1

PM_RSMRST#

R2011
2 10KR2J-L-GP
1

PM_PCH_PWROK

24,31,61,63

PCIE_WAKE#

AN10
B5
AY17
A68
B65
B6
BA20
BB20

PM_SUSWARN#
PM_SUSACK#

AR13
AP11
BB15
AM15
AW17
AT15

GPP_B13/PLTRST#
SYS_RESET#
RSMRST#

SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#

PROCPWRGD
VCCST_PWRGD
SYS_PWROK
PCH_PWROK
DSW_PWROK

GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#

GPP_A13/SUSWARN#/SUSPWRDNACK
GPP_A15/SUSACK#
WAKE#
GPD2/LAN_WAKE#
GPD11/LANPHYPC
GPD7/USB2_WAKEOUT#

DY

GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#

SKYLAKE_ULT

SKYLAKE-GP-U1

PM_PCH_PWROK

DY

SYSTEM POWER MANAGEMENT

SYS_PWROK
PM_PCH_PWROK
PCH_DPWROK

GPD2/LAN_WAKE#

11 OF 20

CPU1K

PROCPWRGD
VCCST_PWRGD

2 0R0402-PAD-1-GP
2 0R0402-PAD-1-GP

20141126 Jack
1
R1731

SC10P50V2JN-L1-GP

R2017
1 0R2J-L-GP
2

PM_SUSACK#
1

DY
EC2001

3D3V_S0

GPP_A11/PME#
INTRUDER#
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#

AT11
AP15
BA16
AY16

PM_SLP_S3# 24,40,53
PM_SLP_S4# 24,40,51

AN15
AW15
BB17
AN16
BA15
AY15
AU13
AU11
AP16
AM10
AM11

BATLOW#

PM_PWRBTN# 24,89
AC_PRESENT 24

SM_INTRUDER#
EXT_PWR_GATE#
DGPU_PWROK

24,85,86

071.SKYLA.000U

3D3V_S5

3D3V_AUX_S5

1
R2024
1KR2F-L1-GP

R2021

DY
2

SC10P50V2JN-L1-GP

EC2002

24,40 ALL_SYS_PWRGD

2
4K7R2J-L-GP

R2020
1 10KR2F-L1-GP
2

#543016 Rev0.7
1. VCCST_PWRGD is only 1.0 V tolerant.
2. VCCST_PWRGD must go low during Sx pwr states, regardless of the voltage level of VCCST

VCCST_PWRGD

20141126 Jack

R2004
1 100KR2F-L3-GP
2

20150413 -1 Jack
3

PM_RSMRST#

3V_5V_POK_C

2N7002KDW-GP

84.2N702.A3F
2nd = 75.00601.07C

R2001
1KR2F-L1-GP
1

1 R2002

RSMRST#_KBC 24
1V_VCCST

3V_5V_POK 45,53
3D3V_S0

0R0402-PAD-1-GP

20150414 -1

Q2003

24,40 ALL_SYS_PWRGD

DY

DY

3V_5V_POK_#

Q2001
4

R2022
1KR2F-L1-GP

R2005
10KR2F-L1-GP

D
S

VCCST_PWRGD_S

2N7002K-2-GP

R2023
1 0R2J-L-GP
2 VCCST_PWRGD

DY

84.2N702.J31
2ND = 84.2N702.031
3rd = 84.2N702.W31

20150113 SC Jack
B

VCCST_PWRGD / HWM201:

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

CPU_(POWER MANAGEMENT)
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
20

of

105

Main Func = PCH

16 OF 20

CPU1P
GND 1 OF 3

17 OF 20

CPU1Q
D

A5
A67
A70
AA2
AA4
AA65
AA68
AB15
AB16
AB18
AB21
AB8
AD13
AD16
AD19
AD20
AD21
AD62
AD8
AE64
AE65
AE66
AE67
AE68
AE69
AF1
AF10
AF15
AF17
AF2
AF4
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH6
AH63
AH64
AH67
AJ15
AJ18
AJ20
AJ4
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AK8
AL2
AL28
AL32
AL35
AL38
AL4
AL45
AL48
AL52
AL55
AL58
AL64

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKYLAKE_ULT

SKYLAKE-GP-U1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58

AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV1
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA10
BA14
BA18
BA2
BA23
BA28
BA32
BA36
F68
BA45

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKYLAKE_ULT

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

18 OF 20

CPU1R

GND 2 OF 3

F8
G10
G22
G43
G45
G48
G5
G52
G55
G58
G6
G60
G63
G66
H15
H18
H71
J11
J13
J25
J28
J32
J35
J38
J42
J8
K16
K18
K22
K61
K63
K64
K65
K66
K67
K68
K70
K71
L11
L16
L17

BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41

GND 3 OF 3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SKYLAKE_ULT

SKYLAKE-GP-U1

L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21

071.SKYLA.000U

071.SKYLA.000U
SKYLAKE-GP-U1

071.SKYLA.000U

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_(VSS)
Brook_SLU

Document Number

Monday, July 06, 2015

Sheet
1

Rev

1M
21

of

105

Main Func = CPU

1V_VCCST

THERMTRIP#_CPU

1
1

2
2

PROCHOT#_CPU_R
THERMTRIP#_CPU
1SKTOCC#

TP2202

D63
A54
C65
C63
A65
C55
D55
B54
C56

20150120 SC Jack

A6
A7
BA5
AY5

55,89 TOUCH_INT#
65 TP_IN#
6,76,79 DGPU_HOLD_RST#

1
2

RN2201

4
3

SRN49D9F-GP
RN2202
4
3

1
2

CPU_POPIRCOMP
PCH_POPIRCOMP

EDRAM_OPIO_RCOMP
EOPIO_RCOMP

AT16
AU16
H66
H65

CATERR#
PECI
PROCHOT#
THERMTRIP#
SKTOCC#

1V_VCCSTG

20141126 Jack

SKYLAKE_ULT

JTAG

PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#

CPU MISC

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP
SKYLAKE-GP-U1

4 OF 20

CPU1D
CATERR#_CPU

499R2F-2-GP 1 R2203

TP_IN#

H_THERMTRIP# 40

DY

3D3V_S0
R2204
10KR2F-L1-GP
1
2

49D9R2F-L1-GP

2
24 PECI_EC
24,44,46 PROCHOT#_CPU

1 R2220

THERMTRIP#_CPU
R2202

0R0402-PAD-1-GP
R2201
1KR2F-L1-GP

[PECI] and [PROCHOT#]

Impedance control: 50 ohm

EC2201

20141028 Jack

SC10P50V2JN-L1-GP

R2219
1KR2F-L1-GP

1V_VCCST
1V_VCCSTG

DY

PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX

B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59

PROC_TCK 99
PROC_TDI 99

PCH_JTAG_TDO

R2209

PROC_TMS 99
PROC_TRST# 99

2 51R2J-L1-GP

DY

PCH_JTAG_TCK 99
PCH_JTAG_TDO 99
PROC_TCK

R2210

2 51R2J-L1-GP

DY

071.SKYLA.000U

SRN49D9F-GP

R2212 move to RN603

H_THERMTRIP#

DY

20150128 SC Jack

EC2202
TVL-0402-01-AB1-1-GP

PROCHOT#_CPU

EC2203
TVL-0402-01-AB1-1-GP

DGPU_HOLD_RST#

EC2204
TVL-0402-01-AB1-1-GP

20150325 SC

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_(JTAG/CPU SIDE BAND)

Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
22

of

105

Main Func = CPU

19 OF 20

CPU1S
RESERVED SIGNALS-1

99 CFG3

CFG4

CFG4

R2305
1KR2F-L1-GP

E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66

R2301

1 49D9R2F-L1-GP
2

CFG_RCOMP

E60

E8

99 ITP_PMODE

AY2
AY1
D1
D3
K46
K45
AL25
AL27
C71
B70
F60
A52
BA70
BA68
20 OF 20

CPU1T

J71
J68

SKYLAKE_ULT
SPARE

AW69
AW68
AU56
AW48
C7
U12
U11
H11

RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11

SKYLAKE-GP-U1

RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52

F6
E3
C11
B11
A11
D12
C12
F52

TPAD14-OP-GP TP2312
TPAD14-OP-GP TP2313

1
1

RSVD_TP_F65
RSVD_TP_G65

F65
G65
F61
E61

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

SKYLAKE_ULT

RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
TP5
TP6
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2

CFG[16]
CFG[17]

RSVD_B3
RSVD_A3

CFG[18]
CFG[19]

RSVD_AW1
CFG_RCOMP
RSVD_E1
RSVD_E2

ITP_PMODE
RSVD_AY2
RSVD_AY1

RSVD_BA4
RSVD_BB4

RSVD_D1
RSVD_D3

RSVD_A4
RSVD_C4

RSVD_K46
RSVD_K45

TP4
RSVD_A69
RSVD_B69

RSVD_AL25
RSVD_AL27

RSVD_AY3
RSVD_C71
RSVD_B70

RSVD_D71
RSVD_C70

RSVD_F60
RSVD_C54
RSVD_D54

RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68

TP1
TP2

RSVD_J71
RSVD_J68

VSS_AY71
ZVM#

VSS_F65
VSS_G65

RSVD_AW71
RSVD_AW70

RSVD_F61
RSVD_E61

SKYLAKE-GP-U1

MSM#
PROC_SELECT#

BB68
BB69
AK13
AK12
BB2
BA3
AU5
AT5
D5
D4
B2
C2
B3
A3
AW1
E1
E2

BA4
BB4
A4
C4
BB5
A69
B69
AY3
D71
C70
C54
D54
AY4
BB3
AY71
AR56

VSS_AY71

1 R2302

0R0402-PAD-1-GP

AW71
AW70
AP56
C64

1V_VCCST
PROC_SELECT#

R2303
1 100KR2F-L3-GP
2

071.SKYLA.000U

071.SKYLA.000U

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_RESERVED,CFG
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
23

of

105

SSID = KBC
20140919

For EC power consumption reserver

3D3V_AUX_KBC

VCC_LPC(Pin9)

3D3V_AUX_S5

PLT_RST#

1 R2404

R2460
0R0603-PAD-1-GP-U
47KR2J-L2-GP

3D3V_AUX_KBC

OPMODE (Pin70): PU (Default:eSPI)

OPMODE(Default/Internal PU):

Close to the EC
3D3V_AUX_KBC_AVCC

U2402

DAC

GPIO3C/DA0
GPIO3D/OPMODE/DA1
GPIO3E/DA2
GPIO3F/DA3

AVCC

0R0402-PAD-1-GP

ECRST#

18,91 PM_CLKRUN#_EC

30
31

61 E51_TXD
61 E51_RXD

20141021 Jack

3D3V_AUX_S5

R2441
330KR2J-L-GP

64,65,89

2 R2444

KBC_PWRBTN#

39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54

65,89 KROW16
65,89 KROW17

81
82

65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89

KBC_PWRBTN#_R

GPIO0F/PWM0
GPIO10/PWM1
GPIO11/PWM2
GPIO19/PWM3/WDT_LED_ALT

GPIO4A/SMBD_CLK/PSCLK1/SCL2
GPIO4B/SMBD_DAT/PSDAT1/SDA2
GPIO4C/PSCLK2/SCL3
PS2
GPIO4D/PSDAT2/SDA3
GPIO4E/PSCLK3/KSO18
GPIO4F/PSDAT3/KSO19

PWM

GPIO52/WP#/KSO20
GPIO30/KSI0/SER_TXD/TRAP2
GPIO31/KSI1
GPIO32/KSI2
GPIO33/KSI3
GPIO34/KSI4/EDICS
GPIO35/KSI5/EDICLK
GPIO36/KSI6/EDIDI
GPIO37/KSI7/EDIDO
GPIO20/KSO0/TRAP_TCK
GPIO21/KSO1/TRAP0
GPIO22/KSO2/TRAP1
GPIO23/KSO3/TRAP_EN
GPIO24/KSO4
GPIO25/KSO5
GPIO26/KSO6
GPIO27/KSO7
GPIO28/KSO8
GPIO29/KSO9
GPIO2A/KSO10
GPIO2B/KSO11
GPIO2C/KSO12
GPIO2D/KSO13
GPIO2E/KSO14
GPIO2F/KSO15

VCC3

SHDI

GPIO60/SHICS#
GPIO61/SHICLK
GPIO62/SHIDO

VC

GPIO78/ADC8/VCIN0/SHIDI
GPIO67/VCOUT0
GPIO65/ADC9/VCIN1
GPIO66/PROCHOT#/VCOUT1

GPIO50/LOCK#
GPIO53/CAPSLED#
GPIO54/WDT_LED
GPIO55/SCROLED#
GPIO56/RSMRST#
GPIO63/POWER_FAIL0/FANFB2
GPIO64/FANFB3

IKB

GPIO69
GPIO6B/GWG

GWG

GPIO68/IO2_SHR_ROM
GPIO6A/IO3_SHR_ROM

77
78
79
80
83
84
85
86
87
88

SML1_CLK 18,79
SML1_DATA 18,79
BAT_SCL 43,44 <
BAT_SDA 43,44

ODD_PWR_EN_R
Charger_Boost_Status#

DY

R2453 2

1 0R2J-L-GP
2 R2449 1
0R0402-PAD-1-GP

90

-BATTER /CHARGER

FUN_OFF# 65
EC_TP_IN# 65
ODD_PWR_EN 6,60
PWR_CHG_BM# 44
EC_TPCLK 65
EC_TPDATA 65
ME_UNLOCK

97
98
99

< ---CPU/GPU

C2421S

20141015 Jack

VCC_IO2

44 AC_IN#
KBC_PWRBTN#_R
20,89 PM_PWRBTN#

110
112
114
115

VCC0

GPIO5B/MISO_SHR_ROM
GPIO5C/MOSI_SHR_ROM
GPIO58/SPICLK_SHR_ROM
GPIO5A/SPICS#_SHR_ROM

1.8_3.3V

GPIO79/AC_IN#
GPIO7A/GPXIOD02/EC_EN#
GPIO7B/PBIN/PWRBTN#
GPIO7C/GPXIOD04

VCC_IO2

SHR_ROM

GPIO7D/IO2_ROM_EXPD
GPIO7E/IO3_ROM_EXPD

PLC

VCC0

84.T3906.A11

2nd = 84.03906.F11
3rd = 84.T3906.E11

ECRST#_Q
3D3V_AUX_S5

4
3
SRN10KJ-L-GP

3D3V_AUX_KBC
SRN4K7J-8-GP

4
3

BAT_SCL
BAT_SDA

1
2

SML1_CLK
SML1_DATA

RN2406

ECRST#

DY

D2401

R2451
10KR2J-3-GP

AZ5125-02S-R7G-GP

75.05125.07D
2nd = 75.08212.07D

VD_IN1 26
VD_OUT1 26
VD_IN2 26

PROCHOT#_EC

89
91
92
93
95
100
101

swap D2401 1/29

WLAN_PERST# 61
BAT_IN# 43,44,89
CHARGE_LED 64
DC_BATFULL 64
RSMRST#_KBC 20
AMP_MUTE# 27
S5_ENABLE 40,89

106
108

SYS_PWROK
DC_Protect_EC

105
107

20
44

eDP_BLEN_CPU 3
AC_PRESENT 20

GPIO0 High Active

20141015 Jack
Q2401

PROCHOT#_EC

G
D

SYS_PWROK(S0_PWR_GOOD) ==DELAY 99ms

124

PROCHOT#_CPU

22,44,46

R2407
100KR2F-L3-GP

3D3V_AUX_KBC

2N7002K-2-GP

84.2N702.J31
2ND = 84.2N702.031
3rd = 84.2N702.W31

C2423
SCD1U16V2KX-L-GP

1 R2403
SPI_SO_KBC
1 R2405
SPI_SI_KBC
1 R2411
SPI_CLK_KBC
SPI_CS_KBC_N0 1 R2412

2 0R0402-PAD-1-GP
2 0R0402-PAD-1-GP
2 0R0402-PAD-1-GP
2 0R0402-PAD-1-GP

116
117

SPI_SO_ROM 18,25
SPI_SI_ROM 18,25
SPI_CLK_ROM 18,25
SPI_CS_CPU_N0 18,25
WIFI_RF_EN

20141107 Jack
R2401
5V_CHARGER_EN

1 10KR2F-L1-GP
2

S5_ENABLE

1 10KR2F-L1-GP
2

R2402

61

GPIO57/XCLK32K/MOSI_ROM_EXPD
GPIO5D/XCLKI/MISO_ROM_EXPD
GPIO5E/XCLKO/SPICS#_ROM_EXPD
GPIO59/SPICLK_ROM_EXPD

GND
GND
GND
GND
GND
AGND

GPIO7F/PECI
VCC

121
122
123
127
118
125

BLUETOOTH_EN 61,89
USB_PWR_EN# 35,66
USB_CHAR_CT1 36
CHG_ON# 44
H_PECI_KBC
3D3V_AUX_KBC

R2448

43R2F-2-GP

PECI_EC

20140925 JACK

20141009 Jack

22

R2452

AD_OFF

1KR2F-L1-GP

113
94
35
24
11
69

RN2405

1
2

26,40 PURE_HW_SHUTDOWN#

KB9038QA-GP-U1

C2414S

DY

ROM_EXPD

PECI
ECRST#
Q2403
MMBT3906-4-GP

C2413S

RTCRST_ON 16
BLON_OUT 55
AD_OFF 43

109
104
102
103

119
120
126
128

C2426S

Touch Pad

1.8_3.3V

C2425S

GPIO48/KSO16
GPIO49/KSO17

3D3V_RTC_AUX

111

C2424S

17

470R2F-GP

G2402
GAP-OPEN

LPC

96

CD1U16V2KX-L-GP

FAN_TACH1

VCC3

GPIO44/SCL0
GPIO45/SDA0
GPIO46/IEDI_SCL/SCL1_BATMGR
GPIO47/IEDI_SDA/SDA1_BATMGR

SM

CD1U16V2KX-L-GP

10KR2F-L1-GP

KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KROW9
KROW10
KROW11
KROW12
KROW13
KROW14
KROW15

65,89
65,89
65,89
65,89
65,89
65,89
65,89
65,89

3D3V_S0

KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7

55
56
57
58
59
60
61
62

79

WLAN_PCIE_WAKE#
61
LAN_PCIE_WAKE#
31
3D3V_AUX_KBC

1.8_3.3V

GPIO16/TXD/SER_TXD/LPC_TXD
GPIO17/RXD/SER_CLK/LPC_CLK/PBOUT

GPIO12/FANPWM0
GPIO13/FANPWM1
GPIO14/FANFB0
GPIO15/FANFB1

DGPUHOT

CD1U16V2KX-L-GP

26
27
28
29

45 5V_CHARGER_EN
36 USB_CHARGER_EN
26,89 FAN_TACH1
20,31,61,63 PCIE_WAKE#

R2457

21
23
25
34

15
19
17
18

CD1U16V2KX-L-GP

KB_BL_PWMR

GPIO08/I_CLK_EPB/PROCHOT2#/SCL4
SM / ESB GPIO0D/RLC_TX2/SDA4
GPIO0B/ESBCLK/SCL5
GPIO0C/ESBDAT/SDA5

VCC2

CD1U16V2KX-L-GP

1 R2413 2
0R0402-PAD-1-GP

R2455
6K2R2F-GP

1.8_3.3V

GPIO0A/OWM/RLC_RX2
GPIO0E/SCI#
GPIO18/POWER_FAIL1 MISC
GPIO1A/NUMLED#
ECRST#
GPIO1D/CLKRUN#

CD1U16V2KX-L-GP

27 KBC_BEEP
65 KB_BL_PWM
64 PWRLED
64 STDBY_LED

16
20
32
36
37
38

ECSCI#_KBC

ECSCI#_KBC

PM_SLP_S3#
PM_SLP_S4#

20,40,53
20,40,51

OPMODE

67 LID_CLOSE#

VCC2
VCC2

22
33

R2438

1 R2466

3,6 EC_SCI#

EC_AGND

DY

R2465

20,40

FAN1_DAC 26
USB_CHAR_SEL 36
WLAN_PWR_EN# 61
PTP_PWR_EN# 65

DY(eSPI)

ESPI_RST#

ESPI
0R2J-L-GP 1

3 EC_SMI#

2 0R0402-PAD-1-GP

ASM(LPC)

EC9038

100KR2J-1-GP

ALL_SYS_PWRGD

1 R2450

OPMODE

EC9028

20,85,86

C2418S

68
70
71
72

DGPU_PWROK

C2417S

ESPI_RST#_R
3D3V_AUX_KBC

BLM15AG121SN-1GP

44

20R2J-L-GP

AD_IA

PCB_VER_AD
ADT_TYPE_AD
MODEL_ID_AD

1 R2423

ESPI

63
64
65
66
75
76
73
74

ASM

ADC

67

DY

DY

AVCC

GPIO38/AD0
GPIO39/AD1
GPIO3A/AD2
GPIO3B/AD3
GPIO42/AD4
GPIO43/AD5
GPIO40/CIR_RX/AD6
GPIO41/CIR_RLC_TX/AD7

ASM

EC9038

1.8_3.3V
VCC _ LPC

EC9028

1.8_3.3V

GPIO00/GA20/ESPI_GPIO
GPIO01/KBRST#/ESPI_ALERT#
GPIO02/SERIRQ/ESPI_GPIO
LFRAME#/ESPI_CS#
LAD3/ESPI_IO3
GPIO04/ESPI_CS2#/ESPI_GPIO
LAD2/ESPI_IO2
LPC / eSPI
LAD1/ESPI_IO1
LAD0/ESPI_IO0
PCICLK/ESPICLK
GPIO05/PCIRST#/WP2/ESPI_GPIO
GPIO07/I_CLK_EHB/ESPI_RST#

R2436

VCC_LPC

CD1U16V2KX-L-GP

KBC

R2435

1
2
3
4
5
6
7
8
10
12
13
14

CD1U16V2KX-L-GP

18 H_RCIN#
18,91 INT_SERIRQ
18,68,91 LPC_FRAME#_CPU
18,68,91 LPC_AD_CPU_P3
65 KB_BL_DET
18,68,91 LPC_AD_CPU_P2
18,68,91 LPC_AD_CPU_P1
18,68,91 LPC_AD_CPU_P0
18 LPC_CLK_KBC
20,31,40,61,63,68,89,91
PLT_RST#
18,91 ESPI_RST#

LPC/eSPI:

3D3V_AUX_KBC
L2406

VCC_LPC
D

VCC_LPC

20150415 -1

R2435
0R0402-PAD-1-GP

RN2412

1
2

KB_BL_PWM
FUN_OFF#

C2415
SC1U10V2KX-L1-GP

4
3

L2401

BLM15AG121SN-1GP

SRN10KJ-L-GP

20141117 Jack
EC_AGND
EC_AGND

3D3V_AUX_KBC

BAT_IN#
CHG_ON#

1
2

RN2404

4
3

SRN100KJ-6-GP

3D3V_AUX_KBC

20141015 Jack

3D3V_AUX_KBC

R2424
64K9R2F-1-GP

R2431
76K8R2F-GP

MODEL_ID

PCB_VER_AD

20150630 -1M

MODEL_ID_AD
R2437
100KR2F-L3-GP

R2426
100KR2F-L3-GP

EC_AGND
EC_AGND

3D3V_AUX_KBC

R2425
100KR2F-L3-GP

45W

ADT_TYPE_AD
R2430
100KR2F-L3-GP

90W/45W

EC_AGND

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Size
A1
Date:
5

EC CONTROLLER
Document Number
Brook_SLU
Monday, July 06, 2015
1

Sheet

24

Rev

1M
of

105

Main Func = SPI Flash

20141117 Jack

DY

1 R2508 2
3K3R2F-2-GP

3D3V_S5

C2502
SCD1U16V2KX-L-GP

C2501
SC10U6D3V3MX-L-GP

3D3V_S5

14 SPI_HOLD_ROM_R
14 SPI_W P_ROM_R

3D3V_S5
U2501

18,24 SPI_CS_CPU_N0
18,24 SPI_SO_ROM
18 SPI_W P_ROM

1 R2506

1
2
3
4

2 0R0402-PAD-1-GP

CS#
SO
IO2
VSS

8
7
6
5

VCC
IO3
SCLK
SI

0R0402-PAD-1-GP

1 R2507

SPI_HOLD_ROM 18
SPI_CLK_ROM 18,24
SPI_SI_ROM 18,24

GD25B64BSIGR-GP

072.25B64.0001
2nd = 72.25647.00A
3rd = 072.25Q64.0F01
4th = 72.25Q64.K01

SPI FLASH ROM (8M byte) for PCH

SPI ROM Equal length need to less than 500mil

SPI FLASH ROM (8M byte)

1st=072.25B64.0001(Gigadevice GD25B64BSIGR)
2nd=72.25647.00A (MXIC MX25L6473EM2I)
3rd=072.25Q64.0F01 (MICRON N25Q064A13ESED0F)
4rd=72.25Q64.K01 (WINBOND W25Q64FVSSIQ)

Main Func = RTC

3D3V_AUX_S5

1 R2503 2
1K5R2F-2-GP

3D3V_RTC_VCC

20150209 SC Jack
1 R2505 2
45K3R2F-L-GP

3D3V_RTC_AUX

Width=20mils

R2502
1KR2F-L1-GP
2
1 3D3V_RTC_PW R 2

1
2
NP1
NP2

RTC1

PWR
GND
NP1
NP2

D2501
1
3D3V_AUX_S5_R

DY

BAS40CW -GP

83.00040.E81

C2503
SC1U6D3V3KX-L1-GP

RTC BATTERY
1st= 23.22065.001
2nd= 23.20068.001

2nd = 83.00040.T81
3rd = 83.00040.K81

BAT-060003HA002M213ZL-GP-U1

62.70014.001
2nd = 20.F2316.002

20140923

3rd = 62.70001.061

<Core Design>

Q2505

G
D

R2504
10MR2J-L-GP

Wistron Corporation

RTC_DET# 6

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

S
2N7002K-2-GP

Title

84.2N702.J31
2ND = 84.2N702.031
3rd = 84.2N702.W31

Size
A3
Date:

Flash(KBC+PCH)/RTC

Document Number

Brook_SLU
Monday, July 06, 2015

Sheet
1

Rev

1M
25

of

105

Main Func = Thermal Sensor

5V_FAN1_S0

2nd = 83.R5003.H8H

FAN_TACH1_C

2
3

3D3V_S0

CH551H-30PT-GP

ACES-CON3-10-GP-U

83.R5003.C8F
2nd = 83.R5003.H8H

20.F1621.003
2nd = 020.F0283.0003

83.R5003.C8F

D2602
24,89 FAN_TACH1

FAN1

D2601
CH551H-30PT-GP

C2602
SCD1U16V2KX-L-GP

C2603
SC4D7U25V5KX-L2-GP

*Layout* 15 mil

3D3V_AUX_S5

R2603
10KR2F-L1-GP

5V_S0

C2613
SC2D2U10V3KX-L-GP

DY

15V_FAN1_S0
FAN1_DAC_R

0R3J-L1-GP

2 R2615
C2608
SC100P50V2JN-L-GP

8
7
6
5

GND
GND
GND
GND

5V_S0

1 R2616 2
0R0402-PAD-1-GP

FAN1_DAC 24

20150116 SB Jack

5V_FAN1_S0

C2607
SCD1U16V2KX-L-GP

FON#
VIN
VOUT
VSET

AP2113MTR-G1-GP

VD_IN1 24
RT2601
NTC-100K-11-GP-U

U2603

1
2
3
4

R2611
16KR2F-GP

FON1#

3D3V_S0

3D3V_AUX_S5

R2606
2KR2F-L1-GP

DY

Q2603

R2612
16KR2F-GP

DY

DY

G
C2606

C2609
SC100P50V2JN-L-GP

C2610
SCD1U16V2KX-L-GP

R2608
10KR2J-L-GP

TVL-0402-01-AB1-1-GP

RT2602
NTC-100K-11-GP-U

DY

VD_OUT1 24

0R0402-PAD-1-GP

24,40 PURE_HW _SHUTDOW N#

VD_IN2 24

DY

1 R2610

THERM_SYS_SHDN#_R

D
IMVP_PW RGD_G

2N7002K-2-GP

84.2N702.J31
2ND = 84.2N702.031
3rd = 84.2N702.W31

R2609 1

VR_RDY

40,46

0R0402-PAD-1-GP

20150611 -1M

Brook_SLU
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

G788P81/Fan Controllor P2793

Date:
5

Document Number

Brook_SLU
Monday, July 06, 2015

Sheet
1

Rev

1M
26

of

105

G2703

SSID = AUDIO

5V_S0

2
GAP-CLOSE
G2701
2
GAP-CLOSE

1 R2719

5V_PVDD
G2702

2nd = 75.08212.07D
24 AMP_MUTE#

EAPD#

0R0402-PAD-1-GP
49

R2708 is need to
connect.To prvent
the beep sound

AUD_SPK_L+

20141009 Jack

ALC255-CG-GP-U

1 C2705
1
SC2D2U10V3KX-L-GP
SC10U6D3V3MX-L-GP

Place close to Pin 26

3V_MIC2V
RN2703
2
1

3
4

LINE1_VREFO_L
LINE1_VREFO_R

SRN4K7J-8-GP

24
23
22
21
20
19
18
17
16
15
14
13

3
4

CPVDD
CBN
CPVEE

36
35
34
33
32
31
30
29
28
27
26
25

20141030 Jack

CBP
LINE2-L_PORT-E-L
AVSS2
LINE2-R_PORT-E-R
LDO2-CAP
LINE1-L_PORT-C-L
AVDD2
LINE1-R_PORT-C-R
PVDD1
VD33_STB
SPK-OUT-L+
MIC_CAP
SPK-OUT-LMIC2-R_PORT-F-R/SLEEVE
SPK-OUT-RMIC2-L_PORT-F-L/RING
SPK-OUT-R+ 071.00255.0003
MONO-OUT
PVDD2
SPDIFO/FRONT_JD_JD3/GPIO3
PDB
MIC2/LINE2_JD_JD2
SPDIF-OUT/GPIO2
HP/LINE1_JD_JD1
GND

5V_S0

AUD_AGND

Layout Note:

RN2702
SRN2K2J-5-GP

3D3V_S5
C2723
1
LINE1_L
C2724
1
LINE1_R
V3D3_STB
MIC_CAP C2713 1

2SC4D7U6D3V3KX-L-GP
AUD_HP1_JACK_L2
2SC4D7U6D3V3KX-L-GP AUD_HP1_JACK_R2
1 R2712 2 0R0402-PAD-1-GP
2SC10U6D3V3MX-L-GP
AUD_AGND

2
1

37
38
39
40
41
42
43
44
45
46
47
48

1 R2755 2
0R0603-PAD-1-GP-U

5V_PVDD2

SELEEVE 29
RING2 29

1 R2713

AUD_SENSE_A

200KR2F-L-3-GP

AUD_HP1_JD#

29

Layout Note:
3D3V_S0

Place close to Pin 13

ED2701
AZ5125-02S-R7G-GP

R2722
AUD_SENSE_A

Layout Note:

100KR2F-L3-GP

75.05125.07D

3D3V_AUDIO_DVDD

C2719

1 R2714

2nd = 75.08212.07D

0R0402-PAD-1-GP

Width>40mil, to improve Headpohone Crosstalk noise

Change it to sharp will be better.
Add 2 vias (>0.5A) when trace layer change.

20141009 Jack

29 DMIC_DATA_CON

1
SCD1U16V2KX-L-GP

0R0603-PAD-1-GP-U

C2720
SC10U6D3V3MX-L-GP
2

Close to Pin1

1 R2720

3D3V_S0

SC10U6D3V3MX-L-GP
2

1
2

3
AUD_HP1_JACK_R2

C2716
SCD1U16V2KX-L-GP

Close to LOUT1
AUD_HP1_JACK_L2

C2717
SC10U6D3V3MX-L-GP

2nd = 75.08212.07D

75.05125.07D

DVDD_IO

3D3V_AUDIO_DVDD

C2718
1 LDO3_CAP

3D3V_S0
D2705
AZ5125-02S-R7G-GP

75.05125.07D

AUD_SPK_L-

LDO2_CAP

1D5V_AVDD_S0
5V_PVDD
29 AUD_SPK_L+
29 AUD_SPK_L29 AUD_SPK_R29 AUD_SPK_R+
5V_PVDD
1 R2754 2

D2704
AZ5125-02S-R7G-GP

Close to LOUT1

SC10U6D3V3MX-L-GP
2

C2711

C2710

DVDD
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
DC_DET
SDATA-OUT
BCLK
LDO3-CAP
SDATA-IN
DVDD-IO
SYNC
RESET#
PCBEEP

CBP
C2712

AUD_AGND

5V_PVDD2

C2702

CPVDD
CBN
CPVEE
HPOUT-R_PORT-I-R
HPOUT-L_PORT-I-L
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO
VREF
LDO1-CAP
AVDD1
AVSS1

U2701

SC10U6D3V3MX-L-GP
2
1

C2703

SC4D7U6D3V3KX-L-GP

C2715

0R0402-PAD-1-GP

C2714

R2711
100KR2F-L3-GP

SC10U6D3V3MX-L-GP

0R0402-PAD-1-GP
3D3V_S0

LINE1_VREFO_L
LINE1_VREFO_R

1D5V_AVDD_S0

1
2

1
2

1D5V_S0

SC2D2U10V3KX-L-GP

SC10U10V5KX-L1-GP

SCD1U16V2KX-L-GP

1 R2748

1 R2766

SC2D2U10V3KX-L-GP

C2704

AUD_VREF
LDO1_CAP

Close pin36

20141015 Jack

20150121 SC Jack

AUD_AGND

SCD1U16V2KX-L-GP

29 AUD_HP1_JACK_L2

R2730
10KR2F-L1-GP

29 AUD_HP1_JACK_R2

AUD_SPK_R-

KBC_BEEP 24
HDA_SPKR 14,17

SRN47K-2-GP-U

3V_MIC2V

C2701
SC4D7U6D3V3KX-L-GP

Close pin40

1
2

SCD1U16V2KX-L-GP

AUD_AGND

AUDIO_PC_BEEP

29 DMIC_CLK_CON
2

4
3

KBC_BEEP_C

AUD_AGND close to codec IC

AUD_SPK_R+

3D3V_S0

C2706

20141009 Jack

1
2
3
4
5
6
7
8
9
10
11
12

RN2704

Close to Pin41

C2725
AUDIO_PC_BEEP

AUD_AGND

Close to Pin46

C2707

placed nearby codec PIN12

2
GAP-CLOSE

1
C2708
SC10U10V5KX-L1-GP

C2709
SCD1U16V2KX-L-GP

0R0603-PAD-1-GP-U

D2703
AZ5125-02S-R7G-GP

17 HDA_SDOUT_CODEC
B

17 HDA_BITCLK_CODEC

75.05125.07D

17 HDA_SDIN0_CPU

2nd = 75.08212.07D

1
R2718

2
HDA_SDIN0_CODEC
33R2J-L1-GP

17 HDA_SYNC_CODEC
17 HDA_RST#_CODEC

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2

Audio Codec ALC255

Date:
5

Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

27

of

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

Audio AMP_1001

Size
A4

Document Number

Brook_SLU
Monday, July 06, 2015

Date:
5

Sheet

Rev

1M
28

of
1

105

Speaker

SPK1

1 R2915
1 R2916
1 R2917

2 0R0603-PAD-1-GP-U
2 0R0603-PAD-1-GP-U
2 0R0603-PAD-1-GP-U

AUD_SPK1_L+_CON
AUD_SPK1_R-_CON
AUD_SPK1_R+_CON

2
3
4

AUD_SPK1_R-_CON

89

AUD_SPK1_R+_CON

89

EC2901 1

2 SC22P50V2JN-L-GPDY

EC2902 1

2 SC22P50V2JN-L-GPDY

EC2915 1

2 SC22P50V2JN-L-GPDY

EC2920 1

2 SC22P50V2JN-L-GPDY

Layout Note:

6
ACES-CON4-17-GP-U1

ED2901
AZ5125-02S-R7G-GP

ED2902
AZ5125-02S-R7G-GP

2nd = 75.08212.07D

2nd = 75.08212.07D

DY

20.F1621.004

DY

AUD_SPK1_L+_CON 89

AUD_SPK1_R+_CON

AUD_SPK1_R+_CON

AUD_SPK1_L-_CON

2 0R0603-PAD-1-GP-U

1 R2914

20150609 -1M

AUD_SPK1_L-_CON 89

AUD_SPK1_R-_CON

AUD_SPK1_R-_CON

27 AUD_SPK_L+
27 AUD_SPK_R27 AUD_SPK_R+

AUD_SPK1_L+_CON

AUD_SPK1_L-_CON
AUD_SPK1_L+_CON

5
27 AUD_SPK_L-

AUD_SPK1_L-_CON

SSID = AUDIO

2nd = 020.F0155.0004

Trace width=40mil

AFTP TESTPOINT

20141016 Jack

Combo Jack

3D3V_S0

1 R2910

AUD1

27 RING2
27 AUD_HP1_JACK_L2

Q2901

DY

DY

1
SC10U6D3V3MX-L-GP

R2901
100KR2J-4-GP

27 AUD_HP1_JACK_R2
27 SELEEVE

ER2912 1
1 R2921

2 57D6R2F-GP
2 0R0402-PAD-1-GP

AUD_HP1_JD#_TYPE
AUD_HP1_JD#_R
AUD_HP1_JACK_R1
SELEEVE_R

84.2N702.J31

2nd = 84.2N702.031
3rd = 84.2N702.W31

R2906
0R0402-PAD-1-GP

AUD_AGND

5
6
2
4
MS
AUDIO-JK506-GP-U

AUD_HP1_JD#_TYPE

AUD_HP1_JD#_R

AUD_HP1_JD#_R

AUD_HP1_JACK_R1
AUD_HP1_JACK_L1

AUD_AGND

RING2_R

EC2921
EC2922
EC2912
EC2913
EC2914

89

AUD_HP1_JACK_R1

89

AUD_HP1_JACK_L1

89

1
1
1
1
1

2
2
2
2
2

SC22P50V2JN-L-GP
SC22P50V2JN-L-GP
SC22P50V2JN-L-GP
SC22P50V2JN-L-GP
SC22P50V2JN-L-GP

022.10002.0951
C

RING2_R 89

SELEEVE_R
0527_SB

DY AUD_AGND
DY
DY
DY
DY

89

2N7002K-2-GP

DY

3
1

Audio(IP/NK comb)

AUD_HP1_JD#_TYPE

DY

27

2
C

AUD_HP1_JD#

R2905
10KR2J-L-GP

D
C2902

RING2_R
AUD_HP1_JACK_L1

AUD_HP1_JD#_R

2 0R0402-PAD-1-GP
2 57D6R2F-GP

0R0402-PAD-1-GP

1 R2920
ER2913 1

SELEEVE_R 89

AUD_HP1_JD#_TYPE

AUD_HP1_JD#_TYPE

89

AFTP TESTPOINT
3D3V_S0

DUAL MIC=082.40011.0001
R2923
0R2J-L-GP

MIC2

1
2
3

MIC2_EN
DMIC_DATA_R

ENHANCE
CS
GND

6
5
4

VDD
DATA
CLK

DMIC_DATA_CON_R
DMIC_CLK_CON_R

3D3V_S0

R2926 1

0R2J-L-GP

DMIC_DATA0_CON

DY
2

R2925 1

0R2J-L-GP

R2909 1

DMIC_CLK0_CON

0R2J-L-GP

DMIC_CLK_CON

27

DMIC_DATA_CON

27

MICROPHONE-105-GP-U
DMIC_DATA_CON_R

082.40011.0001

MICROPHONE-105-GP-U

DMIC_CLK_CON
DMIC_DATA_R

DUAL

EC2905

SC4D7P50V2BN-GP

DMIC_DATA_R1
DMIC_CLK_CON_R1

3D3V_S0

DY

EC2904

DUAL

6
5
4

VDD
DATA
CLK

SC4D7P50V2BN-GP

ENHANCE
CS
GND

DY
SC4D7P50V2BN-GP

DY
EC2903

MIC1

1 0R2J-L-GP

2 R2912 1
0R2J-L-GP

DMIC_CLK_CON_R1

20141208 SB Jack

1
2
3

2 R2911

17

SINGLE

17

R2919
0R2J-L-GP

SINGLE
1

R2924
0R2J-L-GP

DMIC_CLK_CON_R

DY

DUAL

20150121 SC

SINGALE MIC
=082.40006.0001 (1ST)
=082.40002.0031 (2ND)
=082.40011.0011 (3RD)

082.40011.0001

DY

EC2907

SC4D7P50V2BN-GP

EC2908

2
3
4

DY
SC4D7P50V2BN-GP

3D3V_S0
CLK_CON_MIC3
DATA_CON_MIC3

R2927 1

DY 0R2J-L-GP

DMIC_DATA0_CON

DY 0R2J-L-GP

DMIC_CLK0_CON

R2928 1

R2918 1
0R2J-L-GP
2 R2922 1
0R2J-L-GP

DY

DMIC_CLK_CON

27

DY

DMIC_DATA_CON

27

17
17

R2913

DY

1
0R2J-L-GP

DMIC_DATA_R

DUAL

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

20141015 Jack

Speaker/HPMIC

Date:
5

Brook_SLU

EC2906

PTW O-CON4-9-GP-U1

20150121 SC

DMIC_DATA_R1

2
5

MIC3

SC4D7P50V2BN-GP

CLK_CON_MIC3
DATA_CON_MIC3

Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
29

of

105

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

Sheet

1M
30

of
1

105

C3122
SC12P50V2JN-3GP
2
1
X3101
LAN_XTAL_25M_IN

DY
1

LAN_XTAL_25M_OUT

4
D

R3109
1MR2J-L3-GP

R3108
2K49R2F-2-L-GP

1
2

RSET

C3123
SC15P50V2JN-L-GP
2
1

XTAL-25MHZ-181-GP

82.30020.G71
2nd = 82.30020.D41
3rd = 082.30005.0231

U3101

1V_LAN_VDD10

22

3D3V_LAN_VDD33

23

15 PCIE_TX_CPU_P5
15 PCIE_TX_CPU_N5

1
SCD1U16V2KX-L-GP
1
SCD1U16V2KX-L-GP

2 C3133 PCIE_TX_LAN_P5
2 C3134 PCIE_TX_LAN_N5

13
14

15 PCIE_RX_CPU_P5
15 PCIE_RX_CPU_N5

2
SCD1U16V2KX-L-GP
2
SCD1U16V2KX-L-GP

1 C3136 PCIE_RX_LAN_P5
1 C3135 PCIE_RX_LAN_N5

17
18

16 LAN_CLK_CPU
16 LAN_CLK_CPU#

12

16 LAN_CLKREQ_CPU#
20,24,40,61,63,68,89,91

15
16

PLT_RST#

19

AVDD10
AVDD10
AVDD10

MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3

AVDD33
AVDD33
DVDD10
VDDREG

CKXTAL1
CKXTAL2

HSIP
HSIN

REGOUT
RSET

HSOP
HSON
REFCLK_P
REFCLK_N

LED0
LED1/GPO
LED2
ISOLATE#
LANWAKE#

1
2
4
5
6
7
9
10

MDI0+
MDI0MDI1+
MDI1MDI2+
MDI2MDI3+
MDI3-

28
29

LAN_XTAL_25M_IN
LAN_XTAL_25M_OUT

24
31

REGOUT
RSET

32
32
32
32
32
32
32
32

20141203 SB Jack
3D3V_S5

11
32

3D3V_S5

3
8
30

IOAC
IOAC

27
26
25
20
21

GND

R3117
1 0R2J-L-GP
2

LAN_W AKE#_R
ISOLATEB
LAN_W AKE#_R

LAN_PCIE_W AKE# 24

R3116
1 0R2J-L-GP
2

CLKREQ#
PERST#

R3115
10KR2F-L1-GP

1V_LAN_VDD10
1V_LAN_VDD10
1V_LAN_VDD10

33

PCIE_W AKE# 20,24,61,63

NON-IOAC

RTL8111H-CG-1-GP

071.8111H.0003
Layout:
For RTL8111G(S)
* Place C3121 to C3124 close to each VDD10 pin--3, 8,

20150106 SC Jack

3D3V_S0

1 R3101

REGOUT
R3110
1KR2F-L1-GP

1
2

1
2

1
2

1
2

1
2

C3114
SCD1U16V2KX-L-GP

20141030 Jack
1
2

1
2

1
2

1
2

1
2
1

C3108

C3115
SC4D7U6D3V3KX-L-GP

C3124
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

C3126

SCD1U16V2KX-L-GP

C3107
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

1 R3104

DY

C3125

3D3V_LAN_VDD33

0R0805-PAD-1-GP-U
C3116
SC4D7U6D3V3KX-L-GP

C3130
SC1U10V2KX-L1-GP

3D3V_S5

C3127
SCD1U16V2KX-L-GP

R3113
15K4R2F-GP

C3102
SCD1U16V2KX-L-GP

ISOLATEB

1V_LAN_VDD10

0R0603-PAD-1-GP-U

C3124: colse to Pin8

C3125 close to Pin30
C3126: close to Pin3
C3127: close to Pin22

DY
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation

C3108.C3115: close to Pin32

C3107.C3116: close to Pin11

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:

LAN(RTL8111)

Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
31

of

105

SSID = LAN
XF3201
XRF_TDC1
31 MDI3-

RJ45_8

16

RJ45_3

RJ45_1

18

MCT2

17

RJ45_6

RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8

31 MDI2+

31 MDI2-

19

RJ45_4

21

MCT3

20

RJ45_5

22

RJ45_1

24

MCT4

23

RJ45_2

1:1

14

1:1

MCT1

11

RJ45

31 MDI1-

SCD1U16V2KX-L-GP

RJ45_7

15

31 MDI1+

C3218

13

10

1:1

1:1

12

31 MDI3+

31 MDI0+

1
2

31 MDI0-

9
1

CHASSIS#9
MDO0+

AFTP TESTPOINT

2
3
4
5
6
7
8
10

RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8

MDO0MDO1+
MDO2+
MDO2MDO1MDO3+
MDO3CHASSIS#10
RJ45
RJ45-8P-196-GP-U

RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8

89
89
89
89
89
89
89
89

022.10001.00F1
2nd = 022.10001.0F21

XFORM-24P-63-GP

5V_S5

68.89240.30D
2nd = 68.IH601.301
3rd = 068.24101.3011

MCT4
MCT3
MCT2
MCT1

8
7
6
5
RN3212
SRN75J-1-GP

20150624 -1M

1
2
3
4

4
I/O3
I/O2
3

I/O4

VDD
GND

I/O1
1

075.09904.0A7C
2nd = 075.01256.007C

DY

DY

DY

DY

DY

DY

DY

MCT_R

31 MDI131 MDI1+

C3217
SC100P3KV8JN-2-GP

DY

SC6D8P50V2CN-GP

U3201
AZC099-04S-2-GP

31 MDI3+
31 MDI3-

EC3207

SC6D8P50V2CN-GP

EC3208

SC6D8P50V2CN-GP

EC3206

SC6D8P50V2CN-GP

EC3205

SC6D8P50V2CN-GP

EC3204

SC6D8P50V2CN-GP

EC3203

SC6D8P50V2CN-GP

EC3209

SC6D8P50V2CN-GP

EC3210

MDI3+

MDI3-

MDI2+

MDI2-

MDI1+

MDI1-

MDI0+

MDI0-

5V_S5

20150224 SC Jack

I/O2

I/O3

U3202
AZC099-04S-2-GP

075.09904.0A7C
2nd = 075.01256.007C

VDD

I/O4
I/O1

GND
2

20150624 -1M

31 MDI2+
31 MDI231 MDI031 MDI0+

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

(LAN+VGA) CONNECTOR

Document Number

Brook_SLU

Monday, July 06, 2015

Sheet
1

Rev

1M
32

of

105

8
9
10
11
12
13
14

SD_W P
SD_DATA1
SD_DATA0
SD_CD#

SP1
SP2
SP3
SP4
SP5
SP6
SP7

C3301
1
SC1U10V2KX-L1-GP

V1.8

24

3D3V_S0

3D3V_CARD_S0

5
6

VREG

23
7

71.05170.003

V18

DM
DP

2
3

USB_CPU_PN7_R
USB_CPU_PP7_R

RREF

3V3_IN
CARD_3V3

RREF
GPIO0

1 R3303
1 R3304

2 0R0402-PAD-1-GP
2 0R0402-PAD-1-GP

USB_CPU_PN7 15
USB_CPU_PP7 15

R3301
2 6K19R2F-GP
1

17

3D3V_CARD_S0

SDREG

CARD1

XD_D7
XD_CD#

C3302
SC1U10V2KX-L1-GP

GND

25

15
16
18
19
20
21
22

U3301
RTS5170-GR-GP

SP8
SP9
SP10
SP11
SP12
SP13
SP14

SD_CLK_R

1 R3302

SD_CLK

C3307
SC4D7P50V2BN-GP

SD_DATA0
SD_DATA1
SD_DATA2
SD_DATA3

0R0402-PAD-1-GP

3D3V_S0

SD_DATA2
SD_DATA3
SD_CMD
SD_CLK_R

2
5
10
11

SD_CMD
SD_CLK
SD_CD#
SD_W P

7
8
9
1

DY

3D3V_CARD_S0

VDD

NP1
NP2

CMD
CLK
CD
WP

12
13
14
15

DAT0
DAT1
DAT2
CD/DAT3

VSS
VSS

NP1
NP2
12
13
14
15
3
6

SKT-SDCARD-56-GP

062.10002.0251

1SD_CD#
2

1SD_WP
2

1SD_CMD
2

1 SD_DATA3
2

1 SD_DATA2
2

DY

SC22P50V2JN-L-GP
C3314

DY

SC22P50V2JN-L-GP
C3313

DY

SC22P50V2JN-L-GP
C3312

DY

SC22P50V2JN-L-GP
C3311

DY

SC22P50V2JN-L-GP
C3310

DY

SC22P50V2JN-L-GP
C3309

SC22P50V2JN-L-GP
C3308

DY

1 SD_DATA1

20141023 Jack
1 SD_DATA0

1
2

1
2

1
2

C3306
SCD1U16V2KX-L-GP

DY

SC4D7U6D3V3KX-L-GP
C3305

SCD1U10V2KX-L1-GP
FC3301

C3304
SCD1U16V2KX-L-GP

SC4D7U6D3V3KX-L-GP
C3303

89 SD_CLK
89 SD_CMD
89 SD_W P

20141103 Jack

89 SD_CD#
89 SD_DATA0
89 SD_DATA1

89 SD_DATA2
89 SD_DATA3

SD_CLK
SD_CMD
SD_W P
SD_CD#
SD_DATA0
SD_DATA1

SD_DATA2
SD_DATA3

AFTP TESTPOINT

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

Card Reader IC+Reader Conn

Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
33

of

105

Brook_SLU
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

USB2.0 CONN
Document Number

Rev

Brook_SLU
Monday, July 06, 2015

Sheet
1

1M
34

of

105

USB 3.0 Connector

Pin definition
1

Low Active 2A
5V_USB30

5V_S5
U3501

1
2
3
C3502

SY6288DAAC-GP

074.06288.009B
2nd = 074.00524.0C9F
3rd = 074.02822.009F
24,66 USB_PW R_EN#

C3503
SC100U6D3V6MX-GP

C3501
SC1U10V2KX-L1-GP

C3504
SC100U6D3V6MX-GP

OUT
GND
OC#

EN#

IN

SCD1U16V2KX-L-GP

5
D

5V_USB30_CHARGER

POWER

USB 2.0 D-

USB 2.0 D+

GND

StdA_SSRX-

StdA_SSRX+

GND

StdA_SSTX-

StdA_SSTX+

SuperSpeed RX

SuperSpeed TX

AFTP TESTPOINT
5V_USB30_CHARGER

EL3501
36 USB_CHAR_PN0
36 USB_CHAR_PP0

USB_CON_PN0

USB_CON_PP0
USB30_TX_CON_P1

68.01012.201
2nd = 68.00396.001

EU3501
15,89 USB30_RX_CPU_N1
15,89 USB30_RX_CPU_P1
15 USB30_TX_CPU_N1
15 USB30_TX_CPU_P1

SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP 2

2
1

1 C3508
C3509

LINE_1
LINE_2
GND
LINE_3
LINE_4

NC#10
NC#9
GND
NC#7
NC#6

10
9
8
7
6

USB_CON_PP0
USB30_RX_CPU_P1

USB30_RX_CPU_N1
USB30_RX_CPU_P1

USB30_RX_CPU_N1
USB30_TX_CON_N1
USB30_TX_CON_P1

USB_CON_PN0 89
USB_CON_PP0 89

13

CHASSIS

USB30_RX_CPU_P1
USB30_RX_CPU_N1

8
2
7
3
6
4
5
11

USB30_TX_CON_N1
USB_CON_PN0

1
2
3
4
5

CHASSIS

USB30_TX_CON_P1 89
USB30_TX_CON_N1 89

USB_CON_PN0
USB_CON_PP0

USB2

10
9
1

MCM1012B900FBP-GP-U

USB30_TX_CON_P1
USB30_TX_CON_N1

USB30_RX_CPU_P1 15,89
USB30_RX_CPU_N1 15,89

USB30_TX_CON_P3
USB30_TX_CON_N3

USB30_TX_CON_P3 89
USB30_TX_CON_N3 89

USB_CON_PN2
USB_CON_PP2

12
CHASSIS

USB30_RX_CPU_P3
USB30_RX_CPU_N3

CHASSIS

SKT-USB13-251-GP

USB30_RX_CPU_P3 15,89
USB30_RX_CPU_N3 15,89

022.10005.02L1

AZ1045-04F-R7G-GP

USB_CON_PN2 89
USB_CON_PP2 89

75.01045.073
2nd = 075.00550.0071

20150624 -1M
EU3503
USB_CON_PN2

EL3502
15 USB_CPU_PN2
15 USB_CPU_PP2

USB_CON_PN2
USB_CON_PN0

USB_CON_PP2

MCM1012B900FBP-GP-U

I/O1

I/O4

GND

VDD

I/O2

I/O3

USB_CON_PP2

5
4

5V_S5
USB_CON_PP0

AZC099-04S-2-GP

68.01012.201
2nd = 68.00396.001

075.09904.0A7C
2nd = 075.01256.007C

20150624 -1M

5V_USB30

USB1
EU3502
USB30_TX_CON_P3
15,89 USB30_RX_CPU_N3
15,89 USB30_RX_CPU_P3
15 USB30_TX_CPU_N3
15 USB30_TX_CPU_P3

SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP 2

2
1

1 C3511
C3510

1
2
3
4
5

LINE_1
LINE_2
GND
LINE_3
LINE_4

NC#10
NC#9
GND
NC#7
NC#6

10
9
8
7
6

USB30_RX_CPU_N3
USB30_RX_CPU_P3
USB30_TX_CON_N3
USB_CON_PN2

USB30_TX_CON_N3
USB30_TX_CON_P3

USB_CON_PP2
USB30_RX_CPU_P3

AZ1045-04F-R7G-GP
USB30_RX_CPU_N3

75.01045.073
2nd = 075.00550.0071

10
9
1

CHASSIS

CHASSIS

CHASSIS

CHASSIS

8
2
7
3
6
4
5
11

13

12
SKT-USB13-251-GP

022.10005.02L1

20150624 -1M

Brook_SLU

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

USB3.0 CONN
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
35

of

105

20150225 SC Jack
5V_S5
D

R3602

4
3

DY 10KR2F-L1-GP

USB_CHAR_CT2
USB_CHAR_CT3

10
11

USB_CPU_PP0 15
USB_CPU_PN0 15

To PCH

USB_CHAR_PP0 35
USB_CHAR_PN0 35

To Connector

DY

EC3603

GND
GND

DP_IN
DM_IN

3
2

12

ILIM_SEL
ILIM_LO
ILIM_HI

6
7
8
24 USB_CHAR_CT1

OUT

9
13

ST_R 1

USB_CHAR_ILIM_LO
USB_CHAR_ILIM_HI

DP_OUT
DM_OUT

14
17

1 33KR2F-2-GP
1 23K2R2F-GP

NC#9
FAULT#

1
IN

2 R3607
2 R3604

CTL1
CTL2
CTL3

24 USB_CHAR_SEL

4
15
16

EN

EC3604

SC1KP50V2KX-1GP

SCD1U16V2KX-L-GP

U3603

24 USB_CHARGER_EN
C

5V_USB30_CHARGER

RN3601
SRN10KJ-L-GP

C3605

1
2

1
2

C3604
DY
SCD1U16V2KX-L-GP

SC10U10V5KX-L1-GP

TPS2544RTER-GP

74.02544.073

20150324 -1

Brook_SLU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

USB CHARGER

Size
A4

Document Number

Date:
5

Rev

Brook_SLU
Monday, July 06, 2015

Sheet

1M
36

of
1

105

Brook_SLU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

Reserved

Size
A4

Document Number

Date:
5

Rev

Brook_SLU
Monday, July 06, 2015

Sheet

1M
37

of
1

105

3D3V_S0
U3801

2
1

3D_Camera

SC1U10V2KX-L1-GP

3D_Camera

SCD01U50V2KX-L-GP

SC1U10V2KX-L1-GP

C3819

C3813

3D_Camera

C3812

1
13
R3827 2
R3811 2

1
10KR2F-L1-GP
3D_Camera U3RE_EQ1
1
10KR2F-L1-GP
U3RE_EQ2
DY

2
17

R3814 2
R3815 2

1
10KR2F-L1-GP
1
10KR2F-L1-GP

4
15

R3855 2
R3813 2

1
10KR2F-L1-GP
3D_Camera U3RE_DE1
1
10KR2F-L1-GP
3D_Camera U3RE_DE2

3
16

R3825 2

1
10KR2F-L1-GP

5
14

DY
DY

DY

RR1
RR2

U3RE_EN_RXD

7
24

VCC
VCC
EQ1
EQ2
OS1
OS2
DE1
DE2

DEVICE_TX1DEVICE_TX1+
HOST_TX2HOST_TX2+
HOST_RX1HOST_RX1+
DEVICE_RX2DEVICE_RX2+

23
22

USB3_UTXN0
USB3_UTXP0

11
12

2
USB3_URXN_UP_C SCD1U16V2KX-L-GP
2
USB3_URXP_UP_C SCD1U16V2KX-L-GP

8
9

1 C3850
1 C3851

USB30_RX_CPU_N2 15
USB30_RX_CPU_P2 15

3D_Camera
3D_Camera
C3848

2
USB3_UTXN0_UP_C SCD1U16V2KX-L-GP
2
USB3_UTXP0_UP_C SCD1U16V2KX-L-GP

1
1 C3849

USB30_TX_CPU_N2 15
USB30_TX_CPU_P2 15

3D_Camera
3D_Camera

20
19

USB3_URXN0
USB3_URXP0
C

EN_RXD
RSVD

GND
GND
GND
GND
GND

NC#7
NC#24

6
10
18
21
25

HPA02232ARGER-GP

3D_Camera
71.02232.003

3D3V_S0

20141013 Jack

3D Camera Power

20150409 -1 Jack

R3818
10KR2F-L1-GP
1
2 3D_Camera

5V_S0

5V_CAMERA_S0

U3RE_EN_RXD

DY

RR2

3D_Camera

R3829
10KR2F-L1-GP

Q3801

6 CCD_PW R_EN#

3D3V_S0

3D_Camera

C3807

3D_Camera

U3802

S
4

3DCAMERA_EN

DY

U3RE_EQ1

CAM1

2N7002K-2-GP

11

84.2N702.J31
2ND = 84.2N702.031
3rd = 84.2N702.W31

1
1
10KR2F-L1-GP

R3822 2

1
10KR2F-L1-GP

R3823 2

1
10KR2F-L1-GP

DY

U3RE_EQ2

DY

U3RE_DE1

DY

U3RE_DE2

2
3
4
5
6
7
8
9
10

CCD_UTXN0
CCD_UTXP0

DY

3D_Camera
C3846 1
C3847 1

FW _GPIO35

2
SCD1U16V2KX-L-GP
2
SCD1U16V2KX-L-GP
2

USB3_UTXN0
USB3_UTXP0

3D_Camera

R3836 1
0R0402-PAD-1-GP

FW _GPIO 17

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

20141022 Jack

IPEX-CON10-1-GP

20.K0329.010

20141128 Jack

FW _GPIO35

3D_Camera
A

3D_Camera
20140926 change to low enable by Brian

5V_CAMERA_S0

12

Preserve schematic

Brook_SLU

DY

3D3V_S0

SC10P50V2JN-L1-GP

EC3801

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

20141016 Jack

R3828 2

1
10KR2F-L1-GP

FW _GPIO
Size
A3

DY

Date:
5

C3814
SC10U25V5KX-L-GP

3D_Camera

074.06288.009B
2nd = 074.00524.0C9F
3rd = 074.02822.009F

R3838

USB3_URXN0
USB3_URXP0

100KR2J-4-GP

R3821 2

EN#

1
2
3

OUT
GND
OC#

SY6288DAAC-GP

1
10KR2F-L1-GP

R3820 2

IN

1
10KR2F-L1-GP

R3826 2

RR1

DY

SC1U10V2KX-L1-GP

1
10KR2F-L1-GP

5V_S0
R3824 2

USB Redriver

Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

38

of

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom
Date:
5

Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet

1M
39

of

105

20150413 -1 Jack

Power Sequence

20150413 -1 Jack

Q4001

5V_S5

DY
ALL_SYS_PWRGD

RN4001
2

PCH_PWROK

20
53 1D5V_S0_PWRGD

0R0402-PAD-1-GP
1

C3601
SCD01U50V2KX-L-GP

1
2

20,24

BAS16-6-GP

83.00016.K11
2nd = 83.00016.H11

4
3

5V_4001

PWR_VDDQ_PG

20,24
51

SRN10KJ-L-GP
C3602

20141016 Jack

DY

ALL_SYS_PWRGD

TVL-0402-01-AB1-1-GP

PM_SLP_S3#

2
0R2J-L-GP

D4001

20,24,53

R4017
1

1 R4019

26,46 VR_RDY

1 R4018

2N7002KDW-GP

DY

84.2N702.A3F
2nd = 75.00601.07C

VR_EN 46

0R0402-PAD-1-GP

Q4003

20150611 -1M

5V_4003

DY
ALL_SYS_PWRGD

20,24

1D5V_S0_PWRGD

53

2N7002KDW-GP

20150629 -1M

84.2N702.A3F
2nd = 75.00601.07C

ANNIE Run Power

1D0V_S5
2

5V_S5

3D3V_S0

VTT_PWR

U4002

1V_VCCST

3D3V_S5
U4001

SC1U10V2KX-L1-GP

DY

20150420 -1

15
14
13
12
11
10
9
8

VTT_CT_1V

1
2

C4017
SC33P50V2JN-3GP

C4036

5V_S0

GND
VOUT1#14
VOUT1#13
SS1
GND
SS2
VOUT2#9
VOUT2#8

VIN1#1
VIN1#2
EN1
BIAS
EN2
VIN2#6
VIN2#7

C4013

APL3523AQBI-TRG-GP

DY

74.03523.A73
2nd = 074.05016.0093

C4019
SC33P50V2JN-3GP

DY

20150420 -1
C

DY
C4010
SCD1U16V2KX-L-GP

1
2

1
2

DY

SC33P50V2JN-3GP
2

DY

2nd = 074.05016.0093

C4007
SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

C4034

5V_S0

VTT_CT_5VC

C4018

C4006

20141022 Jack
VTT_CT_3D3VC

74.03523.A73
C4033

PM_SLP_S4#_R

15
14
13
12
11
10
9
8

GND
VOUT1#14
VOUT1#13
SS1
GND
SS2
VOUT2#9
VOUT2#8

VIN1#1
VIN1#2
EN1
BIAS
EN2
VIN2#6
VIN2#7

APL3523AQBI-TRG-GP

0R0402-PAD-1-GP

SC22U6D3V3MX-1-GP

1
2
3
4
5
6
7

VTT_PWR

SC1U10V2KX-L1-GP

1 R4001

20,24,51 PM_SLP_S4#

1
2
3
4
5
6
7

3D3V_S0

SC1U10V2KX-L1-GP

5V_S5

C4012
SCD1U16V2KX-L-GP

0R0402-PAD-1-GP

1 R4012

20,24,53 PM_SLP_S3#

20141022 Jack

20150608 -1M Jack

5V_S5

1D0V_S5
U4004
VOUT#8
VOUT#7
VOUT#6
GND

0R0402-PAD-1-GP

E
C
2

2
1

074.08939.0093
2ND = 074.01335.0093

C4039

22

84.02222.V11
2nd = 84.02222.X11

SCD1U16V2KX-L-GP
C4004

APE8939GN3-GP

C4038

Q4002
MMBT2222A-3-GP

H_PWRGD_R
R4010
2K2R2J-L1-GP

2
PLT_RST#

20,24,31,61,63,68,89,91

1V_VCCIO

C4041
SC10U6D3V3MX-L-GP

H_THERMTRIP#

R4009
1 4K7R2J-L-GP
2

C1U10V2KX-L1-GP

C4040
SC10U6D3V3MX-L-GP

VIN
C4037S

8
7
6
5

VIN
VIN
VBIAS
EN

VCCSTG_EN_R

SC10U6D3V3MX-L-GP

1 R4006

SC10U6D3V3MX-L-GP

20,24,53 PM_SLP_S3#

1
2
3
4

BAS16-6-GP
2
3

PURE_HW_SHUTDOWN#

24,26

45 3V_5V_EN

D4002
R4011
200KR2J-L1-GP

DY
1

EC4010
SC47P50V2JN-3GP

DY

83.00016.K11
2nd = 83.00016.H11
R3612
2 2KR2F-L1-GP
1

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

20150629 -1M
S5_ENABLE 24,89

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:

Power Plane Enable & SEQUENCE

Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

40

of

105

Brook_SLU

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DS3

Size
A4

Document Number

Rev

Brook_SLU
Monday, July 06, 2015

Date:
5

Sheet

1M
41

of
1

105

Brook_SLU

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

DCIN JACK
Document Number

Rev

Brook_SLU
Monday, July 06, 2015

Sheet
1

1M
42

of

105

12V_BT+_connector

Battery Insert
1

T2

T3

T4

20150630 -1M

T6
SW -TACT-6P-71-GP

T2

DY

EC4301

T5

T6

T3

T4

TVL-0402-01-AB1-1-GP

9
1
1
2
3
4

24,44,89 BAT_IN#
24,44 BAT_SCL
24,44 BAT_SDA

8
7
6
5

89

BI

BAT_IN#_1
BATA_SCL_1
BATA_SDA_1

SRN33J-7-GP-U

062.40001.0451

SW -TACT6-1-GP-U

2
3
4
5
6
7
8
10

62.40009.D51

20150611 -1M

2nd = 62.40009.B71

3D3V_RTC_AUX

ACES-CON8-53-GP

DY
D4301
AZ5125-02S-R7G-GP

20.F2132.008
2nd = 020.F0043.0008

DY

75.05125.07D

PR4309
10MR2J-L-GP

3rd = 20.F2464.008

2nd = 75.08212.07D

BATT1

PN4301

T5

T1

1
2

RESET1

T1

Battery Connector

SCD1U25V2KX-L-GP

BI_RST

PR4301
1MR2J-L3-GP

SW 1

PC4301

3D3V_RTC_AUX

BIS
BIS

Battery Reset

BI

BI_RST

PQ4301
DMN5L06K-7-GP

84.05067.031
C

89 BATA_SCL_1

20150417 -1

20141013 Jack

2nd = 084.00138.0A31

20150106 SB Jack

89 BATA_SDA_1

BIS

PR4306
0R2J-L-GP

LAB

20150120 SC Jack

PU4302
TPCC8131-GP

19V_AD_JK
B

1 S
2 S
3 S

DCIN1
24 AD_OFF

PD4310
P6SMBJ20A-GP

PW R_ADJK_EN

R1

2
R2
LTC024EUB-FS8-GP

84.00024.01K
2nd = 84.02303.01K

2nd = 84.01303.01K

PW R_AD+_2

LTA024EUB-FS8-GP

PR4304
100KR2F-L3-GP

Brook_SLU

83.P6SMB.AAG
2nd = 083.00020.00AG

8
7
6
5

1
2

1
2
A

20.F0818.006

84.00024.A1K

PC4305
SCD1U50V3KX-L-GP

ACES-CON6-40-GP

PC4306
SC1U50V5ZY-1-GP-U

R1

PC4304

D
D
D
D

R2

PQ4303

1
PQ4304

19V_AD_JK

2
3
4
5
6

Adaptor in to generate DCBATOUT

200KR3F-GP

PR4305

SC1U50V5ZY-1-GP-U

ANNIE solution

19V_AD+

84.08131.037
2nd = 84.07403.037

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

DC IN/BATT CONN
Document Number

Rev

Brook_SLU
Monday, July 06, 2015

Sheet
1

1M
43

of

105

4
1
2
1

1
2

1
2

5
6
7
8
3
2
1

20141020 Jack

PC4423

PC4422

1
2

1
2

5
6
7
8
1

3
2
1

PC4421

SCD1U25V2KX-L-GP

4
PC4419

DY

PC4420

SC10U25V5KX-L-GP

1
2
PR4424
7D5R2F-GP

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37

SC10U25V5KX-L-GP

PWR_CHG_SRN

PU4405
SM3319NSQAC-TRG-GP

D01R3721F-GP-U

SC10U25V5KX-L-GP

12

AD_IA 24

PR4403
D01R3721F-GP-U
1
2

CHG_AGND
24 AC_IN#
CHG_AGND
PC4431
2

PR4412
100KR2F-L3-GP

3D3V_S0
2

DC_PROTECT

S
2N7002K-2-GP

DC_PROTECT

DC_PROTECT

DC_PROTECT

PR4418
52K3R2F-L-GP

BATT_OCPUVP_ILIM

R4

DC_PROTECT

DC_PROTECT

DC_PROTECT

1 PR4451 2
3

BATT_OCPUVP_ASSERT

0R0402-PAD-1-GP

BATT_OCPUVP_RESET

Battery UVP

DY
PC4426
SCD01U50V2KX-L-GP

R5

R6

6 Cell (3S2P)

9V

165K

71.5K

4 Cell (4S1P)

12V

110K

71.5K

3D3V_S0
A

DC_PROTECT
R7

Battery OVP

BATT_OCPUVP_OVPSET

2
24 DC_Protect_EC

1 PR4440 2

=>

DC_PROTECT

BATT_OCPUVP_ACT
PR4436
71K5R2F-1-GP

0R0402-PAD-1-GP

R8

=>

6 Cell (3S2P)

R7

R8

14V

80.6K

71.5K

4 Cell (4S1P) 17.6V

51.1K

71.5K

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DC_PROTECT
Title

84.2N702.A3F
2nd = 75.00601.07C

2N7002KDW-GP

Layout Note:
1. Place PR4403, PG4409 and PG4411 near to BTY connector
2. Place PC4429, PC4430 and PC4431 near to PU4407

Battery UVP setting

79

1 PR4441 2
0R0402-PAD-1-GP

DGPUHOT#
AC_Protect_R

52.3K

0R0402-PAD-1-GP

PQ4408

22,24,46 PROCHOT#_CPU

R6

PR4435
43K2R2F-L-GP

52.3K

165K

BATT_OCPUVP_ACT

2N7002KDW-GP

71.5K

4A

DC_PROTECT

BATT_OCPUVP_UVPSET

1
PR4434
71K5R2F-1-GP

PQ4410
4

84.2N702.A3F
2nd = 75.00601.07C

AC_Protect

R4

7A

4 Cell (4S1P)

DC_PROTECT

R3

6 Cell (3S2P)

R5

DC_PROTECT

1 PR4452 2

AC_Protect_R1

=>

3D3V_S0

PR4433
110KR2F-L-GP

PR4447
100KR2F-L3-GP
2
1 PWR_BAT_UVPMON_BT+_R

1 PR4445 2
0R0402-PAD-1-GP

Battery OVP setting

Size
Custom
Date:

Battery OCP setting

PC4418
SC1U10V2KX-L1-GP

DC_PROTECT

DC_PROTECT DC_PROTECT

Bmon+_A

Battery OCP

BATT_OCPUVP_ASSERT
BATT_OCPUVP_RESET
BATT_OCPUVP_OVPSET
BATT_OCPUVP_UVPSET

22,24,46 PROCHOT#_CPU
3D3V_S0

2
SCD1U25V2KX-L-GP

Bmon-_A

R3

PR4432
165KR2F-L-GP

84.2N702.J31
2ND = 84.2N702.031
3rd = 84.2N702.W31

10
9
8
7
6

Deglicth Time Setting

125K -> Deglitch time : 5us
375K -> Deglitch time : 15us

CSN
PROCHOT#
RESET
OVSET
UVSET

RT9553AGQW-GP
PR4450
124KR2F-GP

DC_PROTECT
PR4449
10KR2F-L1-GP

PQ4413
24,43,89 BAT_IN#

CSP
VCC
ILIM
EN
TIMER

AC adapter detect current :

Ac input current = 20 x ( Vacp - Vacn ) / 10mohm

1
2
3
4
5

BATT_OCPUVP_VCC
BATT_OCPUVP_ILIM
BATT_OCPUVP_EN
BATT_OCPUVP_TIMER

DC_PROTECT

PC4430

2N7002KDW-GP

84.2N702.A3F
2nd = 75.00601.07C

GND

PC4415
SC1U10V2KX-L1-GP

PU4407

SCD1U25V2KX-L-GP

3D3V_S0
PR4414
100KR2F-L3-GP

DC_PROTECT

Bmon-_A

24

11

PWR_CHG_ILIM

CHG_ON#

PWR_CHG_ACOK

AC_IN#

PG4411

PC4429
1

SCD1U25V2KX-L-GP

3D3V_S0

Bmon+_A

PR4446
2D2R2F-GP
1
2

PQ4406
4

3D3V_S0

DC_PROTECT

5V_S5

PG4409

PWR_CHG_SRN_A
PC4412
SCD1U25V2KX-L-GP

GAP-CLOSE-PWR

12V_BT+_connector
12V_BT+
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

PC4416
SCD1U25V2KX-L-GP

GAP-CLOSE-PWR

DY

20150609 -1M
SC220P50V2JN-3GP
PC4411

PG4413
GAP-CLOSE-PWR-3-GP

Battery I Sense

PWR_CHG_SRP_A

0R0402-PAD-1-GP

21

1 PR4413 2

PWR_CHG_IOUT

IOUT

GND

ACOK#

HPA02224RGRR-1-GP

14

GND

CHG_AGND
PR4405
10KR2F-L1-GP

8K45R2F-2-GP
PR4428

1
PWR_CHG_DATA
GAP-CLOSE-PWR-3-GP

PWR_CHG_SRP

PR4425
10R2F-L1-GP
1
2

12V_BT+

PR4417
1

BT+_R

68.4R710.20D
2nd = 68.4R71C.10K

13

CHG_AGND
24,43 BAT_SDA

PL4401
1
2
IND-4D7UH-88-GP

PWR_CHG_LG

BM#

2
PG4410

15

PC4413
SC3300P50V2KX-1GP

S
S
S

11

CHG_AGND
1
PWR_CHG_CLK
GAP-CLOSE-PWR-3-GP

DY

PG4404
GAP-CLOSE-PWR-3-GP

ILIM
SRN

24 PWR_CHG_BM#

2
PG4408

Charger Current=1.4~3.6A

PG4403
GAP-CLOSE-PWR-3-GP

SRP

10

SRN100KJ-L-GP

24,43 BAT_SCL

PWR_CHG_PH

PWR_CHG_HG

19

SDA

PR4426
100KR2J-4-GP
PWR_CHG_ILIM
AC_IN#
PWR_CHG_ACOK

18

PC4406

EA40-HW -1
CYNTEC. 7*7*3
DCR: 37~40mOhm
Idc : 5.5 A , Isat : 10A

D
D
D
D

3D3V_AUX_S5
PWR_CHG_BM#

PC4417
SCD047U25V2KX-GP

SCD1U25V2KX-L-GP

DY
3D3V_AUX_S5

LODRV

16

SCL

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37

PC4425

PWR_CHG_BOOT

PHASE

17

2
SC1U10V2KX-L1-GP

1
2

CMPIN

PWR_CHG_CMPIN
PWR_CHG_CLK

PC4405

DY

HIDRV

PWR_CHG_ILIM

8
7
6
5

CMPOUT

adapter 65W and 90W

PWR_CHG_DATA
AC mode (default:120% ):
set up the value by PR4401 and PR4407

20150415 -1

BTST

3D3MR2J-GP

CHG_AGND

1
2
3
4

CHG_AGND

RN4415

ACP

1
2
1
PR4401
100KR2F-L3-GP

R2

2
ACDET

REG
PR4402

1 PR4408 2PWR_CHG_BOOT_A K
A
0R0603-PAD-1-GP-U
RB520S-30-3-GP

83.1R003.I8F
2nd = 83.R2003.B8M
3rd = 083.02035.008F

74.02224.073

100K(64.10035.L3L)

AC_Protect

PWR_CHG_ACN

1
2

60.4K(64.60425.6DL)

10KR2F-L1-GP PWR_CHG_ACDET 6

10m(64.R0105.7FL)

60.4K(64.60425.6DL)
100K(64.10035.L3L)

PC4410
SCD01U50V2KX-L-GP

20m(64.R0205.7FL)

90W

PR4431

PR4407
60K4R2F-GP

R1

VCC

PU4404
SM3319NSQAC-TRG-GP

S
S
S

PR4404
PR4407
PR4401

45W

20

PC4409

PWR_CHG_REGN

PD4403

SCD1U25V2KX-L-GP

PU4403
PWR_CHG_IOUT

20141020 Jack

PWR_CHG_REGN

20150609 -1M

CHG_AGND

SC4D7U25V5KX-L2-GP

CHG_AGND

CHG_AGND

D
D
D
D

PC4401
SCD47U25V3KX-1GP

20150624 -1M

SC4D7U25V5KX-L2-GP

PWR_CHG_VCC

PR4415
10R5J-GP

PC4404
SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP

PR4410
49K9R2F-L-GP

19V_DCBATOUT

PC4402

84.2N702.A3F
2nd = 75.00601.07C

PR4406
316KR2F-GP

PR4411
470KR2J-L1-GP

2
SCD1U25V2KX-L-GP

ACN

1
PC4403

GAP-CLOSE-PWR-3-GP

DY

2N7002KDW-GP

19V_AD+

PR4409
0R2J-L-GP
1
2

GAP-CLOSE-PWR-3-GP

8
7
6
5

19V_AD+

PG4402

PWR_CHG_ACP

PWR_CHG_ACOK

D
D
D
D

PG4401

AD+_G_1

1 S
2 S
3 S

D01R3721F-GP-U

2
1
PQ4401

12V_BT+

84.08131.037
2nd = 84.07403.037
2

PR4421

PR4422
10KR2F-L1-GP

DC_IN_D

PU4402
TPCC8131-GP

19V_DCBATOUT

PR4404
1

AD+_G_2
2

PR4423
10KR2F-L1-GP

DY

EC4414

90W/45W
1
2
3

S
S
S

100KR2F-L3-GP

8 D
7 D
6 D
5 D
SCD1U25V2KX-L-GP

SC10U25V5KX-L-GP

DY

EC4415

AD+_TO_SYS

84.08131.037
2nd = 84.07403.037

19V_AD+

SSID = Charger

PU4401
TPCC8131-GP

CHARGER HPA02224
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet

1M
44

of

105

3D3V_S5

PWR_3D3V

19V_DCBATOUT

19V_DCBATOUT

PWR_DCBATOUT_3D3V

PWR_DCBATOUT_5V

PG4501
GAP-CLOSE-PWR
1
2

PG4506
GAP-CLOSE-PWR
1
2

PG4510
GAP-CLOSE-PWR
1
2

PG4502
GAP-CLOSE-PWR
1
2

PG4507
GAP-CLOSE-PWR
1
2

PG4511
GAP-CLOSE-PWR
1
2

PG4503
GAP-CLOSE-PWR
1
2

PG4508
GAP-CLOSE-PWR
1
2

PG4512
GAP-CLOSE-PWR
1
2

PG4504
GAP-CLOSE-PWR
1
2

PG4509
GAP-CLOSE-PWR
1
2

PG4513
GAP-CLOSE-PWR
1
2

PG4505
GAP-CLOSE-PWR
1
2

5V_S5
PG4515
GAP-CLOSE-PWR
1
2

PWR_5V

PG4516
GAP-CLOSE-PWR
1
2
PG4517
GAP-CLOSE-PWR
1
2
PG4518
GAP-CLOSE-PWR
1
2
PG4519
GAP-CLOSE-PWR
1
2

PG4514
GAP-CLOSE-PWR
1
2

20141022 Jack

PG4520
GAP-CLOSE-PWR
1
2

PWR_DCBATOUT_3D3V

PWR_DCBATOUT_5V

19V_DCBATOUT

68.2R210.20B
2nd = 68.2R21B.10J

14

PWR_5V_BYP1

PWR_5V_FB1

EN2

EN1

5
6
7
8

CS2

CS1

PWR_5V_EN1

PWR_5V_CS1

PWM 5V OCP

19

VCLK

21

GND

20150414 -1

PGOOD

1
2

PG4532

PG4531

PC4520

PT4501
ST150U6D3VDM-28-GP

077.51571.0001

20141013 Jack

Close to FB1 Pin (pin2)

3
3D3V_AUX_S5

PG4533
GAP-CLOSE-PWR-3-GP
1
2

R1

PG4534
5V_AUX_S5
GAP-CLOSE-PWR-3-GP
1
2

PR4515
15K4R2F-GP

PWR_5V_LDO5

PWR_3D3V_LDO3

R2

PR4520
10KR2F-L1-GP

1 PR4523 2

20,53 3V_5V_POK

Vout = 2 * ( 1 + R1/R2 )
= 2 * ( 1 + 6.8K / 10K)
= 3.36V

0R0402-PAD-1-GP

PC4527

20150325 SC

PR4519
100KR2F-L3-GP

DY

PC4526
SC10U10V5KX-L1-GP

PR4522
100KR2F-L3-GP

SC4D7U6D3V3KX-L-GP

DY

3D3V_S5
1

3D3V_AUX_S5

PR4517
10KR2F-L1-GP

R2

R1

PR4512
6K8R2F-2-GP

13

LDO3

56KR2F-GP
PR4502

LDO5

PWR_3D3V_5V_PG

3
2
1

20

PWR_3D3V_CS2
PR4501
69K8R2F-GP

S
S
S

Close to FB2 Pin (pin4)

PWR_3D3V_EN2

S
S
S

PWM 3D3V OCP

PU4506
SM3319NSQAC-TRG-GP

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37

SCD1U25V2KX-L-GP

FB1

PWR_5V_LG1

GAP-CLOSE-PWR-3-GP

FB2

5
6
7
8

15

8
7
6
5
D
D
D
D

BYP1

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37
1
2
3

PU4505
SM3319NSQAC-TRG-GP

20141022 Jack

PWR_5V

PL4501

GAP-CLOSE-PWR-3-GP

1
2
IND-2D2UH-46-GP-U

PWR_3D3V_FB2_A

PWR_5V_PH1

LGATE1

18

PC4502

Design Current : 7A
OCP : 12A

PWR_3D3V_FB2

LGATE2

PWR_5V_HG1

11

PHASE1

16

PWR_3D3V_LG2

UGATE1

PHASE2

PR4509
2D2R3F-L-GP
2 PWR_5V_BOOT1_A
PWR_5V_BOOT1 1

68.2R210.20B
2nd = 68.2R21B.10J

UGATE2

MagLayer. 6.86 x 6.47 x 3.0mm

DCR: 18~20 mOhm
Idc : 8A , Isat : 14A

17

PWR_5V_FB1_A

PG4530

12
VIN

PWR_3D3V_PH2

3
2
1

2
8
7
6
5
D
D
D
D
1 S
2 S
3 S

1
2
IND-2D2UH-46-GP-U

BOOT1

1
2

1
SCD1U50V3KX-L-GP
2

10

BOOT2

PC4518
SCD1U50V3KX-L-GP

D
D
D
D

PWR_3D3V_HG2

GAP-CLOSE-PWR-3-GP

PC4519
SCD1U25V2KX-L-GP

PR4508
2D2R3F-L-GP
2 PWR_3D3V_BOOT2
PWR_3D3V_BOOT2_A 1

PC4515

SCD1U50V3KX-L-GP

PC4522

SC4D7U25V5KX-L2-GP

S
S
S

PC4517
SCD1U50V3KX-L-GP

PL4502

20141013 Jack

074.06575.0A43
4

PU4507
SM3319NSQAC-TRG-GP

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37
MagLayer. 6.86 x 6.47 x 3.0mm
DCR: 18~20 mOhm
Idc : 8A , Isat : 14A

PWR_3D3V

077.51571.0001

PU4501
RT6575DGQW-GP

D
D
D
D

PU4504
SM3319NSQAC-TRG-GP

Design Current : 5A
OCP : 9A

PT4502
ST150U6D3VDM-28-GP

PC4513

DY

SC4D7U25V5KX-L2-GP

PC4511

20150414 -1

SCD1U50V3KX-L-GP

SC10U25V5KX-L-GP

SC10U25V5KX-L-GP

PC4509

20150414 -1

PG4521
GAP-CLOSE-PWR
1
2
PC4501

20150414 -1

Vout = 2 * ( 1 + R1/R2 )
= 2 * ( 1 + 15.4K / 10K)
= 5.08 V

PWM 5V En
PWR_5V_EN1

1 PR4521 2

5V_CHARGER_EN

24

0R0402-PAD-1-GP

PWM 3D3V En
PWR_3D3V_EN2 1 PR4527 2

3V_5V_EN 40

0R0402-PAD-1-GP

Vin POR threshold , Rising :4.6 V ; Failing : 3.7 V

EN threshold Logic-High : 1.6 V
EN threshold Logic-Low : 0.4 V

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

RT6575D_5V/3D3V
Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

45

of

105

Main Func = CPU_CORE

1V_VCCST
D

1V_VCCST

1
1
1

PR4604
PR4605
PR4606

PC4602
SCD1U25V2KX-L-GP

PR4603
1KR2F-3-GP

DY

VCCST/RPU2

2
2
2

DY
100R2F-L3-GP
75R2F-2-GP
45D3R2F-L-GP

VIDSOUT_CPU_R

3D3V_S0

2
1

2PWR_VCCSA_ISUMN_P_2
1
2

2
1

2PWR_VCCSA_ISUMN_P_1
2
1

1
2

2
1

VSSSA_SENSE 8

0R0402-PAD-1-GP

2 PR4601

VCCSA_SENSE

PC4621
2
1

PWR_VCORE_PWM 47
PWR_VCORE_FCCM# 47

PC4620
SCD01U50V2KX-1GP

DY

SC680P50V2KX-2GP
PC4601
1
2
SC2K2P50V2KX-L-GP

20141216 SB Jack
1

PC4624
SC33P50V2JN-3GP

20150617 -1M

20150309 SC

1PC4629
SC330P50V2KX-3GP

PR4644
133KR2F-L-GP

PR4648
243R2F-L1-GP
1
2

2PWR_VCORE_ISUMN_RC
1

PR4649
0R0402-PAD-1-GP
2

PR4651
1KR2F-L1-GP

PR4652
11KR2F-L-GP

47

NTC-10K-26-GP-U
PR4650
B=3370K

Place near Phase1 choke

2K61R2F-1-GP
PR4653
1

PC4635
SCD01U50V2KX-L-GP

PWR_VCORE_ISUMN_P_1

2PWR_VCORE_ISUMN_P_2
1
2

PC4631
SCD1U25V2KX-L-GP

PWR_VCORE_ISUMN

PWR_VCORE_ISUMP

2 PR4659 1DY
100R2F-L1-GP-U

2 PR4668

PC4643

1PWR_VCORE_FB_RC2
PWR_VCORE_FB2

PC4641

PR4660
1K3R2F-1-GP

47

20150414 -1
2 SCD01U50V2KX-L-GP

1
VSS_SENSE 7

0R0402-PAD-1-GP

DY

PC4642
SC1KP50V2KX-1GP
2 PR4667

1
VCC_SENSE

0R0402-PAD-1-GP
PR4663 1
1V_CPU_CORE
100R2F-L1-GP-U

DY 2

Brook_SLU

1
PC4644
SCD01U50V2KX-1GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DY

20141216 SB Jack

Title

20150414 -1

20150309 SC
Size
A2
Date:

1
2

PWR_VCCSA_FB1

2PWR_VCCSA_COMP_RC

2
1PWR_VCORE_FB1 1

1PWR_VCORE_COMP1
2
2

1
2

2
1

1
1PWR_VCORE_NTC1
2

1
1
2

1
2KR2F-L1-GP

DY

2K49R2F-2-L-GP

PR4654
NTC-470K-8-GP-U

PR4638

PR4640 1

ISL95859HRTZ-GP-U

PC4637 1

SC2K2P50V2KX-L-GP

PR4655
27K4R2F-GP

PC4640

1
2
1

1
2

DY

PR4658
301R2F-GP

PR4657
2KR2F-L1-GP

SC330P50V2KX-3GP

SC330P50V2KX-3GP

20150309 SC

SC2K2P50V2KX-L-GP

PR4661
80K6R2F-GP

2K87R2F-1-GP

PC4638

2 PR4602

PWR_VCCSA_PWM 50
PWR_VCCSA_FCCM 50

20141216 SB Jack

PC4639
SC18P50V2JN-1-GP

PC4613 1

PR4627 1
100R2F-L1-GP-U

PC4634
SCD1U25V2KX-L-GP

PR4662
10KR2F-L1-GP

50

SCD01U50V2KX-L-GP

DY

DY 2

PWR_VCCSA_ISUMNB
PWR_VCCSA_ISUMP
PWR_VCCSA_RTN
PWR_VCCSA_FB
PWR_VCCSA_COMP
PWR_VCCSA_IMON

PC4632
SC2K2P50V2KX-L-GP

Place near high side MOSFET of Phase1

PR4618
11KR2F-L-GP

2
1

1
2

30
29
28
27
26
25
24
23
22
21

PWM_C
FCCM_C
ISUMN_C
ISUMP_C
RTN_C
FB_C
COMP_C
IMON_C
PWM_A
FCCM_A

PR4656

B=3370K

Place near Phase1 choke

PWR_VCCSA_ISUMP

PC4611
SC2K2P50V2KX-L-GP

40
39
38
37
36
35
34
33
32
31

PC4626

11
12
13
14
15
16
17
18
19
20

GND

DY

PR4611
NTC-10K-26-GP-U

PR4625
2K61R2F-1-GP

PR4637
1K69R2F-2-GP
1
2

48 PWR_VCCGT_FCCM#
48 PWR_VCCGT_PWMA

B=3940K

DY

20141216 SB Jack

48 PWR_VCCGT_ISUMN

PC4633
SCD1U25V2KX-L-GP

PC4608
SCD033U25V2KX-GP

PR4629
78K7R2F-GP

20141216 SB Jack

PC4605
SCD068U25V2KX-GP

DY

50

0R0402-PAD-1-GP

074.95859.0033

PWR_VCORE_IMON
PWR_VCORE_NTC
PWR_VCORE_COMP
PWR_VCORE_FB
PWR_VCORE_RTN
PWR_VCORE_ISUMP
PWR_VCORE_ISUMNA

2
1
2

1
2
1
2

100KR2F-L3-GP

PR4645
PR4647
0R0402-PAD-1-GP

PR4635

SCD022U16V2KX-3GP

PR4646
NTC-10K-26-GP-U

PWR_VCCGT_ISUMN_P_1
PC4630
SCD1U25V2KX-L-GP

PR4643
11KR2F-L-GP

5V_S5
PR4642
280R2F-1-GP

DY

PSYS
IMON_B
NTC_B
COMP_B
FB_B
RTN_B
ISUMP_B
ISUMN_B
ISEN1_B
ISEN2_B

1KR2F-L1-GP

B=3370K

PWR_VCCGT_ISUMN_P_2

Place near Phase1 choke

PC4628
SCD01U50V2KX-L-GP

PC4625
SCD022U16V2KX-3GP

PR4641
2K61R2F-1-GP

DY
41

PC4623
SC2K2P50V2KX-L-GP

20150414 -1

1PWR_VCCGT_ISUMN_RC
1

SCD01U50V2KX-L-GP
48 PWR_VCCGT_ISUMP

2
2
2
PR4669
0R2J-L-GP

1
2
3
4
5
6
7
8
9
10

DY

PR4613
0R2J-L-GP

PC4616
PR4632
PC4617
SC1KP50V2KX-1GP
301R2F-GP
SC1KP50V2KX-L-1-GP
DY
2
1PWR_VCCSA_FB_RC
1
2 PWR_VCCSA_FB2

FCCM_B
PWM1_B
PWM2_B
IMON_A
NTC_A
COMP_A
FB_A
RTN_A
ISUMP_A
ISUMN_A

0R0402-PAD-1-GP
1 PR4639 2 DY
100R2F-L1-GP-U
2
PC4622 1

PSYS
PWR_VCCGT_IMON
PWR_VCCGT_NTC
PWR_VCCGT_COMP
PWR_VCCGT_FB
PWR_VCCGT_RTN
PWR_VCCGT_ISUMP
PWR_VCCGT_ISUMNB
PWR_VCCGT_ISEN1
PWR_VCCGT_ISEN2

PR4636
100R2F-L3-GP

PR4620
392R2F-GP

PR4628
63K4R2F-2-GP

VR_ENABLE
VR_READY
VR_HOT#
SCLK
ALERT#
SDA
VCC
VIN
PROG1
PROG2

PWR_VCCGT_FB_RC2

20150309 SC

1 PR4666 2

8 VSSGT_SENSE

PU4601

PC4618
SC680P50V2KX-2GP

PC4619
SC1KP50V2KX-1GP

DY

2 PR4614 1DY
0R2J-L-GP

20150309 SC

PR4633
1K91R2F-1-GP
1
2

PWR_VCCGT_FB2

0R0402-PAD-1-GP

2KR2F-L1-GP

PC4615
SCD01U50V2KX-1GP

1 PR4665 2

8 VCCGT_SENSE

PR4630

SC680P50V2KX-2GP

2
1

PR4631 DY
1
2
100R2F-L1-GP-U

1K8R2F-GP
1

PWR_VCCGT_FB1

PWR_VCORE_VRHOT#
PWR_VCORE_SCLK
PWR_VCORE_ALERT#
PWR_VCORE_SDIO
PWR_VCORE_VCC
PWR_VCORE_VIN
PWR_VCORE_PROG1
PWR_VCORE_PROG2

SC6800P25V2KX-1GP

DY
1V_VCCGT

PR4626
1

PC4614
2

SCD22U25V3KX-GP

2 SC18P50V2JN-1-GP

10R2F-L1-GP
0R0402-PAD-1-GP
49D9R2F-L1-GP

20150309 SC

PC4606

20150309 SC

PWR_VCCGT_COMP1

PC4607
SC1U10V3KX-4GP-U

VR/RS2

PC4612
1

40 VR_EN

NTC-470K-8-GP-U
PR4621
1
2
27K4R2F-GP
PC4610 1

PR4615
1KR2F-3-GP

1
1
1

1PWR_VCCGT_NTC1

PR4610
1R2J-GP

PWR_VCCSA_ISUMN_RC

PR4616
10KR2F-L1-GP
2
1

PR4617
2

PR4622
PR4623
PR4624

B=3940K

1
PR4612
0R0402-PAD-1-GP

26,40 VR_RDY

Place near high side MOSFET of Phase1

PWR_VCCSA_ISUMN

PR4609
10KR2F-L1-GP

2 SC330P50V2KX-3GP

PC4603
SCD1U25V2KX-L-GP

19V_DCBATOUT 5V_S5

PC4604 1

PR4608
88K7R2F-GP
1
2

VIDALERT#_CPU_R

20150309 SC

VIDSCK_CPU_R

PR4607
1
2
100R2F-L3-GP

22,24,44 PROCHOT#_CPU

CPU_VCORE(1/3)
Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

46

of

105

Main Func = CPU_CORE

PW R_DCBATOUT_VCORE
PW R_DCBATOUT_VCORE

PG4701
GAP-CLOSE-PW R
1
2

PC4705

PC4704

1
2

1
2

PC4703

SC10U25V5KX-L-GP

PG4704
GAP-CLOSE-PW R
1
2

PC4702

SC10U25V5KX-L-GP

20150616 -1M

PC4701

SC10U25V5KX-L-GP

PG4703
GAP-CLOSE-PW R
1
2

SC10U25V5KX-L-GP

DY

PG4702
GAP-CLOSE-PW R
1
2

SC10U25V5KX-L-GP

PT4705
SE47U25VM-17-GP

19V_DCBATOUT

PG4705
GAP-CLOSE-PW R
1
2
PG4706
GAP-CLOSE-PW R
1
2

20141022 Jack
PW R_DCBATOUT_VCORE

5V_S5
C

PC4706
SC1U10V2KX-L1-GP

5V_S5

PR4704
2D2R2F-GP
2
1

PW R_VCORE_BOOT

PR4705
2D2R3F-L-GP
1
2PW R_VCORE_BOOT_RC

BOOT

DY

5V_S5_R

GL#24
GL#19

PL4701

1
2
COIL-D15UH-2-GP

68.R1510.20A

2nd = 68.R1510.10H

24
19

PG4707

SIC532CD-T1-GE3-GP

PG4708

077.53371.0031
2nd = 79.3371V.6CL

PR4701
0R0402-PAD-1-GP

PR4708
3K65R2F-1-GP

PT4701
SE330U2D5VM-19-GP

PW R_VCORE_ISUMN_G

PW R_VCORE_ISUMP_G

20141212 SB Jack

GAP-CLOSE-PWR-3-GP

23
20
18
17
11
10
9

NC#3

PW R_VCORE_SW

GAP-CLOSE-PWR-3-GP

PR4703
0R2J-L-GP

PWM

PW R_VCORE_PHASE

16
15
14
13
12

22

PW R_VCORE_PW M_R

VSWH#16
VSWH#15
VSWH#14
VSWH#13
VSWH#12

1V_CPU_CORE

2 PR4702 1

FCCM_PS4#

0R0402-PAD-1-GP
5V_S5

46 PW R_VCORE_PW M

PW R_VCORE_FCCM#_R

PGND
PGND
PGND
PGND
PGND
PGND
PGND

46 PW R_VCORE_FCCM#

2 PR4706 1

PC4707
SCD22U25V3KX-GP
1
2

PHASE
0R0402-PAD-1-GP

Cyntec. 6.8mm x7.6mmx4.0mm

DCR: 0.66m Ohm+/-7%
Idc : 36A , Isat : 45A

21
PVCC

6
7
8

2
VCC

PU4701

VIN
VIN
VIN

PC4708
SC1U10V2KX-L1-GP

PW R_VCORE_VCC_R

46 PW R_VCORE_ISUMP

46 PW R_VCORE_ISUMN

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_VCORE(2/3)
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet
1

1M
47

of

105

Main Func = CPU_CORE

19V_DCBATOUT
PW R_DCBATOUT_VCCGTA
PG4801
GAP-CLOSE-PW R
1
2
PW R_DCBATOUT_VCCGTA

PG4802
GAP-CLOSE-PW R
1
2
PG4803
GAP-CLOSE-PW R
1
2

1
2

1
2

PC4807
SC1U10V2KX-L1-GP

PG4806
GAP-CLOSE-PW R
1
2

PR4804
1

PW R_VCCGT_BOOTA

PC4806

PC4805

1
2

1
2

PC4804

SC10U25V5KX-L-GP

PC4809
SC1U10V2KX-L1-GP

PC4803

SC10U25V5KX-L-GP

PW R_VCCGT_VCCDA

PC4802

SC10U25V5KX-L-GP

PG4805
GAP-CLOSE-PW R
1
2

SC10U25V5KX-L-GP

PR4803
2D2R2F-GP
2
1

SC10U25V5KX-L-GP

PG4804
GAP-CLOSE-PW R
1
2

5V_S5

5V_S5

2PW R_VCCGT_BOOTA_RC

2D2R3F-L-GP

4
BOOT

Cyntec. 6.8mm x7.6mmx4.0mm

DCR: 0.66m Ohm+/-7%
Idc : 36A , Isat : 45A

PW R_VCCGT_PW MA_RA

22

FCCM_PS4#
PWM

0R0402-PAD-1-GP

VSWH#16
VSWH#15
VSWH#14
VSWH#13
VSWH#12

16
15
14
13
12

68.R1510.20A

24
19

PG4808

PW R_VCCGT_ISUMP_GA

SIC532CD-T1-GE3-GP

PG4809

PR4808
3K65R2F-1-GP

PR4809
10R2F-L1-GP

PT4801
SE330U2D5VM-19-GP

077.53371.0031

PW R_VCCGT_ISUMN_GA

20141212 SB Jack

GAP-CLOSE-PWR-3-GP

23
20
18
17
11
10
9

GL#24
GL#19

GAP-CLOSE-PWR-3-GP

PR4817
0R2J-L-GP

NC#3

5V_S5_1

1V_VCCGT

1
2
COIL-D15UH-2-GP

PGND
PGND
PGND
PGND
PGND
PGND
PGND

DY

1V_VCCGT

PL4801

2nd = 68.R1510.10H

5V_S5

1
PC4808

2 PR4802 1

46 PW R_VCCGT_PW MA

2 PR4806 1
PW R_VCCGT_FCCM#_RA
0R0402-PAD-1-GP

PW R_VCCGT_PHASEDA
SCD22U25V3KX-GP
PW R_VCCGT_SW A

46 PW R_VCCGT_FCCM#

PHASE

2nd = 79.3371V.6CL

21
PVCC

6
7
8

VCC

PU4801

VIN
VIN
VIN

20141022 Jack

46 PW R_VCCGT_ISUMP

46 PW R_VCCGT_ISUMN

Confirm with EE:

22uF/0805 total 26pcs

Brook_SLU
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

CPU_VCCGT(3/3)
Document Number

Rev

Brook_SLU
Monday, July 06, 2015

Sheet
1

1M
48

of

105

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

VCCGTUS
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

1M
Sheet

49

of

105

Main Func = CPU_CORE

D

19V_DCBATOUT
DCBATOUT_+VCCSA
PG5002
GAP-CLOSE-PW R
1
2
PG5003
GAP-CLOSE-PW R
1
2

20141022 Jack

1
2

1
2

S
S
S

Cyntec. 6.6mmx7.3mm x3.0mm

DCR: 2.5~3m Ohm
Idc : 23A , Isat : 34A

3
2
1

PC5005
SCD22U25V3KX-GP

PC5004

5
6
7
8

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37

PU5001
SM3319NSQAC-TRG-GP

PC5003

SCD1U25V2KX-L-GP

2PW R_VCCSA_BST_RC

PC5002

SC10U25V5KX-L-GP

D
D
D
D

PW R_VCCSA_BST

SC10U25V5KX-L-GP

PR5001
2D2R3F-L-GP

DCBATOUT_+VCCSA

PU5002

46

COIL-D47UH-6-GP

S
S
S

3
2
1

PG5011

PG5001
GAP-CLOSE-PWR-3-GP

PW R_VCCSA_DRVL

084.03317.0A37
2ND = 84.07506.037
3RD = 84.08065.B37

20150421 -1

PC5001
SC2D2U10V3KX-L-GP

GAP-CLOSE-PWR-3-GP

074.95808.0A73

PU5003
SM3317NSQAC-TRG-GP

5V_S5

D
D
D
D

ISL95808HRZ-T-GP

20141009 Jack

68.R4710.20F
2nd = 68.R4710.10V
5
6
7
8

GND

PW R_VCCSA_FCCM

1V_VCCSA

PWR_VCCSA_ISUMN_R

PHASE
FCCM
VCC
LGATE

PW R_VCCSA_SW

UGATE
BOOT
PWM
GND

PL5001

PW R_VCCSA_DRVH

8
7
6
5

46 PW R_VCCSA_PW M

1
2
3
4

PWR_VCCSA_ISUMP_R

PW R_VCCSA_DRVH
PW R_VCCSA_BST

PR5003
3K65R2F-1-GP

PR5004
0R0402-PAD-1-GP

46 PW R_VCCSA_ISUMP

46 PW R_VCCSA_ISUMN

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VCCSA

Size
A3

Document Number

Date:
5

Brook_SLU

Monday, July 06, 2015

Rev

1M
Sheet
1

50

of

105

19V_DCBATOUT

PWR_DCBATOUT_VDDQ
PG5117
GAP-CLOSE-PWR
1
2

PWR_1D35V

PG5118
GAP-CLOSE-PWR
1
2

VID
Logic-High = 0.75V
Logic-Low = 0.3V

PG5121
GAP-CLOSE-PWR
1
2
PG5122
GAP-CLOSE-PWR
1
2
PG5123
GAP-CLOSE-PWR
1
2

5V_S5

PC5102
SC1U10V2KX-L1-GP

PG5124
GAP-CLOSE-PWR
1
2

PWR_DCBATOUT_VDDQ

PG5120
GAP-CLOSE-PWR
1
2

20141022 Jack
PR5107
5D1R2F-GP
2
1

PWR_VDDQ_VID

1D35V_S3
PG5119
GAP-CLOSE-PWR
1
2

D
D
D
D

15

PWR_VDDQ_LG

3
2
1

Vout Setting
Vout = Vref * ( 1 + R1/R2 )
= 0.675 * ( 1 + 20K / 20K)
= 1.35V

VID vs Vref Table

VID Logic-High => Vref = 0.675 V
VID Logic-Low => Vref = 0.75 V
note. Vref can only be changed form
0.675v to 0.75v after power-on

1
2

PC5118

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom
Date:

PR5117
20KR2F-L3-GP

SC10U6D3V3MX-L-GP

PC5117
SC10U6D3V3MX-L-GP

20141022 Jack

DY
2

PG5114
GAP-CLOSE-PWR
1
2

PC5115
SC18P50V2JN-1-GP

PWR_VDDQ_VTT

PG5113
GAP-CLOSE-PWR
1
2

PC5114

2
PC5116
SCD033U16V2KX-GP

Vout = 0.675V
Iomax = 1.2A
0D675V_VREF_S0

1
2

R2

S3

PC5113

DY
1

VTTREF
PWR_VDDQ_VTTREF

PWR_VTT_EN

0R0402-PAD-1-GP

PR5116
20KR2F-L3-GP

R1

GND

GND
3

21
1 PR5119 2

4 DDR_PG_OUT

4
1D35V_S3

PC5101

1
2

FB

VTTSNS

PWR_VDDQ_FB

PC5112

SCD1U16V2KX-L-GP

S5

DY

VTT

PWR_VDDQ_VDDQ

PC5111

SC22U6D3V5MX-L3-GP

PC5106
SCD1U16V2KX-L-GP

PC5110

SC22U6D3V5MX-L3-GP

VDDQ

PWR_VDDQ_EN

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37
S
S
S

PG5101
GAP-CLOSE-PWR
2
1

SC22U6D3V5MX-L3-GP

14

SC22U6D3V5MX-L3-GP

PGND

PU5103
SM3319NSQAC-TRG-GP

SC22U6D3V5MX-L3-GP

Close to output cap pin1, not

inside of the output cap

0R0402-PAD-1-GP

68.1R01B.10K
2nd = 68.1R010.20I

VLDOIN

VTTGND

PWR_1D35V

PHASE

S3

LGATE

20

PL5101
IND-1UH-94-GP-U
1
2

S5

UGATE

TON

PWR_VDDQ_VTT

1 PR5108 2

20,24,40 PM_SLP_S4#

3
2
1

12

11
VID

PGOOD

PC5109
SC10U6D3V3MX-L-GP

Design Current : 6 A
OCP : 9 A

19

PWR_VDDQ_PH

D
D
D
D

PG5116
GAP-CLOSE-PWR
1
2

16

20141022 Jack

PC5105

PWR_VDDQ_HG

PC5108
SCD1U50V3KX-L-GP
PWR_VDDQ_BOOT_A

PWR_VTT_EN

17

PWR_VDDQ_VLDOIN

1D35V_S3

PWR_VDDQ_EN

BOOT

PR5112
2D2R3F-L-GP

PG5115
GAP-CLOSE-PWR
1
2

PWR_VDDQ_BOOT

5
6
7
8

20141022 Jack

10

PWR_VDDQ_TON

VDD

CS

13

PWR_VDDQ_PG

074.08231.0073
18

PC5104

S
S
S

PR5113
620KR2F-GP
2
1

PWR_DCBATOUT_VDDQ

40 PWR_VDDQ_PG

PU5101
RT8231AGQW-GP

PU5102
SM3319NSQAC-TRG-GP

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37

DY

2
5
6
7
8

0R0402-PAD-1-GP
PC5107
SC1U10V2KX-L1-GP

PR5110
324KR2F-1-GP

PC5103

5V_S5

SCD1U25V2KX-L-GP

PR5111
10KR2F-L1-GP

1 PR5109 2

SC4D7U25V5KX-L2-GP

3D3V_S5

PWR_VDDQ_VDD

SC4D7U25V5KX-L2-GP

PWR_VDDQ_CS

OCP setting

VDDQ/VTT
Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

51

of

105

19V_DCBATOUT

PWR_DCBATOUT_1D0V
PG5201
GAP-CLOSE-PWR
1
2

PG5202
GAP-CLOSE-PWR
1
2

VID
Logic-High = 0.75V
Logic-Low = 0.3V

20141022 Jack
PR5207
5D1R2F-GP
2
1

PWR_1D0V_VID

5V_S5

PC5202
SC1U10V2KX-L1-GP

PWR_DCBATOUT_1D0V

20141225 SB Jack

16

PWR_1D0V_PH

15

PWR_1D0V_LG

3
2
1
1

VTTREF
PC5216
SCD033U16V2KX-GP

PC5214

PC5213

DY
PC5215
SC18P50V2JN-1-GP

2
1
2

R2

S3

PR5216
9K76R2F-1-GP

R1

PWR_1D0V_VTTREF

0R0402-PAD-1-GP

20141225 SB Jack

PWR_1D0V_S3_EN

GND

GND
21

1 PR5219 2

1
2
B

FB

VTTSNS

PC5201

SCD1U16V2KX-L-GP

20141029 Jack

VTT

4
1D0V_S5

PC5212

SC22U6D3V5MX-L3-GP

PWR_1D0V_FB

PC5211

SC22U6D3V5MX-L3-GP

S5

PWR_1D0V_VDDQ

PC5210

SC22U6D3V5MX-L3-GP

DY

S
S
S

20141114 Jack

VDDQ
20

084.03317.0A37
2ND = 84.07506.037
3RD = 84.08065.B37

PG5209
GAP-CLOSE-PWR
2
1

SC22U6D3V5MX-L3-GP

PGND

PU5203
SM3317NSQAC-TRG-GP

SC22U6D3V5MX-L3-GP

VTTGND

Close to output cap pin1, not

inside of the output cap

14

0R0402-PAD-1-GP
PC5206
SCD1U16V2KX-L-GP

68.1R01B.10K
2nd = 68.1R010.20I
1

PHASE

VLDOIN

S3

Jack

1D0V_S5

PL5201
IND-1UH-94-GP-U
1
2

S5

UGATE

D
D
D
D

53 1D8V_S5_PWRGD

PWR_1D0V_S5_EN

3
2
1

12

11
VID

TON

LGATE

1 PR5208 2

Design Current :6A

OCP : 9 A
20141022

19

PGOOD

PWR_1D0V_VLDOIN

PWR_1D0V_S3_EN

PWR_1D0V_HG

PC5208
SCD1U50V3KX-L-GP
PWR_1D0V_BOOT_A

17

PWR_1D0V_S5_EN

BOOT

PR5212
2D2R3F-L-GP

5
6
7
8

VDD

13
CS
TP5201

10

PWR_1D0V_TON

PWR_1D0V_BOOT

2
5
6
7
8

1
2

1
2

TPAD14-OP-GP

PWR_1D0V_PG

074.08231.0073
18

PC5205

S
S
S

PR5213
620KR2F-GP
2
1

PWR_DCBATOUT_1D0V

PU5201
RT8231AGQW-GP

PU5202
SM3319NSQAC-TRG-GP

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37

PC5204

SCD1U25V2KX-L-GP

PC5207
SC1U10V2KX-L1-GP

PC5203

SC4D7U25V5KX-L2-GP

5V_S5

0R0402-PAD-1-GP

D
D
D
D

DY

PR5211
10KR2F-L1-GP

1 PR5209 2

PWR_1D0V_VDD

PR5210
383KR2F-1-GP

SC4D7U25V5KX-L2-GP

PWR_1D0V_CS
3D3V_S5

OCP setting

PR5217
20KR2F-L3-GP

Vout Setting
Vout = Vref * ( 1 + R1/R2 )
= 0.675 * ( 1 + 9.76K / 20K)
= 1.004 V

VID vs Vref Table

VID Logic-High => Vref = 0.675 V
VID Logic-Low => Vref = 0.75 V
note. Vref can only be changed form
0.675v to 0.75v after power-on

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom
Date:
5

RT8231_1D0V
Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

52

of

105

PG5301
GAP-CLOSE-PW R
1
2

PW R_1D8V_S5_FB

RT9025-25ZSP-1-GP

R1

1D8V_S5_PW RGD 52

PR5303
12K7R2F-GP

PC5305
SC22P50V2JN-L-GP

PC5301

20141022 Jack

PR5302
2D2R2F-GP
1
2

Power Good

PC5306

DY

9
8
7
6
5

GND
GND
ADJ
VOUT
NC#5

PGOOD
EN
VIN
VDD

1
2

1
2

1
2

1
2
3
4

SC10U6D3V3MX-L-GP

20150325 SC

1D8V_S5_PW RGD
PW R_1D8V_S5_EN
PW R_1D8V_S5_PVDD
PW R_1D8V_S5_VDD

SC10U6D3V3MX-L-GP

PR5305
1KR2F-L1-GP

PG5304
GAP-CLOSE-PW R
1
2

PU5301

PC5304
SC10U6D3V3MX-L-GP

5V_S5

SC10U6D3V3MX-L-GP

3D3V_S5

1D8V_S5
PG5303
GAP-CLOSE-PW R
1
2

74.09025.D3D

DY
PC5303

PW R_1D8V

PG5302
GAP-CLOSE-PW R
1
2

PD = (Vin Vout ) x Iout

= ( 3.3 - 1.8 ) x 0.3A
= 0.45W
PD de-rating(%) = 0.45W/1.33W = 33.8%

20141022 Jack
3D3V_S5

1D8V_S5

PW R_1D8V_S5_FB

R2

0R0402-PAD-1-GP

Enable
EN_Logic-High = 1.4V
EN_Logic-Low = 0.8V

PC5307
SC1U10V2KX-L1-GP

DY

Vout Setting
Vout = 0.8 * ( 1 + R1/R2 )
= 0.8 * ( 1 + 12K7 / 10K)
= 1.816V

20141015 Jack
20141022 Jack
PG5306
GAP-CLOSE-PW R
1
2

R18K87R2F-2-GP

PR5309

DY

PC5308

SC22P50V2JN-L-GP

20141022 Jack

20150113 SC Jack

PR5308
10KR2F-L1-GP

R2

1
PR5311
1KR2F-L1-GP

2
1
A

PC5320
SCD1U16V2KX-L-GP

Enable
EN_Logic-High = 1.4V
EN_Logic-Low = 0.8V

SC1U10V2KX-L1-GP

PC5310

0R0402-PAD-1-GP

PC5312

PW R_1D8V_S0_FB

3D3V_S0

PW R_1D8V_S0_EN

PC5311

PW R_1D8V_S0_FB

RT9025-25ZSP-1-GP

9
8
7
6
5

GND
GND
ADJ
VOUT
NC#5

PGOOD
EN
VIN
VDD

1
2
3
4

SC10U6D3V3MX-L-GP

1D5V_S0_PW RGD
PW R_1D8V_S0_EN
PW R_1D8V_S0_PVDD
PW R_1D8V_S0_VDD

DY
SC10U6D3V3MX-L-GP

PC5313

PR5310
2D2R2F-GP
1
2

1 PR5306 2

PG5309
GAP-CLOSE-PW R
1
2

PU5304

DY

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

5V_S5

PC5309

1D5V_S0
PG5308
GAP-CLOSE-PW R
1
2

74.09025.D3D

PG5307
GAP-CLOSE-PW R
1
2

PW R_1D5V_S0

3D3V_S5

1D5V_S0

20,24,40 PM_SLP_S3#

PD = (Vin Vout ) x Iout

= ( 3.3 - 1.8 ) x 0.3A
= 0.45W
PD de-rating(%) = 0.45W/1.33W = 33.8%

20141113 Jack

PR5304
10KR2F-L1-GP

PW R_1D8V_S5_EN

SC1U10V2KX-L1-GP

PC5302

1 PR5301 2

20,45 3V_5V_POK

1D5V_S0_PW RGD 40

Power Good

Vout Setting
Vout = 0.8 * ( 1 + R1/R2 )
= 0.8 * ( 1 + 8K87 / 10K)
= 1.5096V
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

RT8068_1D8V
Document Number

Brook_SLU

Monday, July 06, 2015

Rev

1M
Sheet
1

53

of

105

Brook_SLU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

Reserved

Size
A4

Document Number

Brook_SLU
Monday, July 06, 2015

Date:
5

Rev

1M
Sheet

54

of
1

105

Main Func = LCD

TOUCH_INT#

DY

TOUCH_S_RST#_R

1
2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

eDP_TX_CON_P0
eDP_TX_CON_N0

C5506
C5507

1
1

2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

C5517
C5518

1
1

2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

eDP_TX_CON_P2
eDP_TX_CON_N2

C5519
C5520

1
1

2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

eDP_TX_CON_P3
eDP_TX_CON_N3
eDP_HPD_CON
3D3V_LCDVDD_PW R

C5521
C5522

1
1

2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

eDP_TX_CON_P1
eDP_TX_CON_N1

1 R5501

TS_USB_CON_N
TS_USB_CON_P

F5501

eDP_TX_CPU_P2 3
eDP_TX_CPU_N2 3
eDP_TX_CPU_P3 3
eDP_TX_CPU_N3 3
3D3V_LCDVDD_S0

1 0R2J-L-GP

TS_USB
TOUCH_DET# 6

C5502

69.50007.A31
2nd = 69.50007.A41

TS_I2C

R5515

2 33R2J-L1-GP

TOUCH_S_RST# 6

20150225 SC Jack

3D3V_CAMERA_S0

USB_CON_PP6
USB_CON_PN6

1
POLYSW -1D1A24V-GP-U

C5504

TOUCH_INT# 22,89

TS

20141030 Jack

19V_DCBATOUT

19V_DCBATOUT_LCD

eDP_TX_CPU_P1 3
eDP_TX_CPU_N1 3

2 R5526

TS

1
2
33R2J-L1-GP
2
R5522 1
TS_S0
33R2J-L1-GP

R5521

eDP_TX_CPU_P0 3
eDP_TX_CPU_N0 3

0R0805-PAD-1-GP-U
TOUCH_DET#_R
TOUCH_S_RST#_R
TOUCH_INTR#

Inverter Power

eDP_AUX_CPU_P 3
eDP_AUX_CPU_N 3

1
1

C5501
C5505

SCD1U50V3KX-L-GP

eDP_AUX_CON_P
eDP_AUX_CON_N

20141016 Jack

SC4D7U25V5KX-L2-GP

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

2
41

SC10P50V2JN-L1-GP

LCD1

DY
EC5501

SC10P50V2JN-L1-GP

EC5502

eDP_BLEN_CON
eDP_HPD_CON

1
2

RN5513

4
3

BLON_OUT 24
eDP_HPD_CPU

SRN1KJ-7-GP
eDP_BLEN_CON
eDP_BLCTRL_CON

R5520

2
33R2J-L1-GP

eDP_BLCTRL_CPU

eDP_HPD_CON
eDP_BLEN_CON

19V_DCBATOUT_LCD

1
2

RN5514

4
3

SRN100KJ-6-GP

42
EL5504
STAR-CON40-1-GP

20.K0809.040

USB_CON_PN6

2nd = 20.K0678.040

TS_I2C
1
R5523
1
R5524

USB_CON_PP6

20150225 SC Jack

USB_CPU_PP6 15
USB_CPU_PN6 15

MCM1012B900FBP-GP-U

68.01012.201
2nd = 68.00396.001

2 0R2J-L-GP
2 0R2J-L-GP

I2C0_DATA_CPU
I2C0_CLK_CPU

6
6

USB_CON_PP6 89
USB_CON_PN6 89

TS_I2C
4

TS_USB_CON_N

TS_USB_CON_N 89
TS_USB_CON_P 89

TS_USB

EU5501

USB_CPU_PP5 15

USB_CON_PN6

USB_CPU_PN5 15

EL5503
MCM1012B900FBP-GP-U

68.01012.201
2nd = 68.00396.001

T-COM Power

2
3

TS_USB_CON_N

20141015 Jack

3D3V_CAMERA_S0 89

I/O1

I/O4

GND

VDD

I/O2

I/O3

USB_CON_PP6

5V_S0

AZC099-04S-2-GP

1 R5745

TS

C5515

C5516

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Date:
4

89

<Core Design>

Size
A3

20141015 Jack
5

89

AFTP TESTPOINT

TS
2

C5514

74.09724.09F
2ND = 74.03514.07F

C5513

69.48001.081
2ND = 69.50011.081

89

eDP_BLCTRL_CON

0R3J-L1-GP

RT9724GB-GP
R5509
100KR2F-L3-GP

TS
5V_S0

POLYSW -1D1A6V-9-GP-U

eDP_BLEN_CON

F5510

eDP_HPD_CON

SCD1U16V2KX-L-GP

SC10U10V5KX-L1-GP

VIN#4

3D3V_CAMERA_S0

SCD1U16V2KX-L-GP

VIN#5

3D3V_S0

1 R5744

DY0R3J-L1-GP

SC10U10V5KX-L1-GP

EN
GND
VOUT

SC4D7U6D3V3KX-L-GP

3 eDP_VDDEN_CPU

C5512

Camera Power

3D3V_S0

U5501

1
2
3

TS_S0

3D3V_S0

SC1U10V2KX-L1-GP

C5509

C5508
SCD1U16V2KX-L-GP

SC4D7U6D3V3KX-L-GP

20150624 -1M

Layout 40 mil

eDP_TX_CON_P2 89
eDP_TX_CON_N2 89
eDP_AUX_CON_P 89
eDP_AUX_CON_N 89
eDP_TX_CON_P0 89
eDP_TX_CON_N0 89
3D3V_LCDVDD_PW R 89
eDP_TX_CON_P1 89
eDP_TX_CON_N1 89
TOUCH_INT# 22,89

075.09904.0A7C
2nd = 075.01256.007C

3D3V_LCDVDD_S0

C5511

TS_S0 89
eDP_TX_CON_P3 89
eDP_TX_CON_N3 89

Touch panel Power

TS_USB_CON_P

TOUCH_DET#_R 89
TOUCH_S_RST#_R 89

TS_USB_CON_P

LCD CONN
Document Number

Brook_SLU

Monday, July 06, 2015

Rev

1M
Sheet
1

55

of

105

DP_HPD_CPU

DP_HPD_CPU

20141029 Jack

L5601

CRT_RED

C5604
SC10P50V2JN-L1-GP

CRT_RED_CON

BLM18BB470SN1D-GP

L5604

CRT_BLUE

close to pin20

RN5610
SRN150J-1-GP

3D3V_S0

DDI_VGA_DATA_C_P0
DDI_VGA_DATA_C_N0

29
30

DDI_VGA_DATA_C_P1
DDI_VGA_DATA_C_N1

31
32

20140926 Rober

17
18
28

4
6

CRT_DDCCLK_CON
CRT_DDCDATA_CON

1
2
3
4

1
2
3
4

SMB_SCL
SMB_SDA

RN5612

3
4

20150302 SC Jack

VSYNC
HSYNC

LDO_EN

RED_P
RED_N

AUX_P
AUX_N
LANE0P
LANE0N
LANE1P
LANE1N
XI/CKIN
XO
RRX

GREEN_P
GREEN_N
BLUE_P
BLUE_N
POL1_SDA
POL2_SCL
GND_DAC
GND

7
8

CRT_VSYNC
CRT_HSYNC

15
16

CRT_RED

12
13

CRT_GREEN

10
11

CRT_BLUE

22
23

SCD1U16V2KX-L-GP

5V_CRT_S0

5V_HDMI_S0

D5601
CH551H-30PT-GP

R5605

POL1_SDA
POL1_SCL

CRT_VSYNC
RN5601
SRN2K2J-5-GP

2
36R2F-1-GP

C5601
SC10P50V2JN-L1-GP

14
33

CRT_DDCDATA_CON

R5606

CRT_HSYNC

RTD2168-CGT-GP
36R2F-1-GP

2
B

CRT_VSYNC_CON

CRT_HSYNC_CON
C5602
SC10P50V2JN-L1-GP

CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_RED_CON
CRT_GREEN_CON
CRT_BLUE_CON
CRT_VSYNC_CON
CRT_HSYNC_CON

close to pin19

83.R5003.C8F
2nd = 83.R5003.H8H

CRT_DDCCLK_CON
R5610
12KR2F-L-GP

C5622
SC2D2U10V3KX-L-GP

VDD_DAC_33

1D2V_VCCK_S0

C5623

SRN4K7J-8-GP

VCCK_12

2
1

RRX

DP_HPD_CPU

2
3

26
27

VGA_SCL
VGA_SDA

3 DDI_VGA_DATA_CPU_P1
3 DDI_VGA_DATA_CPU_N1

DP_AUX_CON_P
DP_AUX_CON_N

20150122 SC Jack

3 DDI_VGA_DATA_CPU_P0
3 DDI_VGA_DATA_CPU_N0

2
2SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
2
2SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
2
2SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP

SMB_SCL
SMB_SDA

21

LDO_EN

1
C5615 1
C5614
1
C5613 1
C5612
1
C5611 1
C5610

HPD

AVCC_12

1
2

3D3V_DAC_S0

19

C5609
SC10P50V2JN-L1-GP

those compoent need to close

AVCC_33

DVCC_33
DVCC_33

CRT_BLUE_CON

4
3

1D2V_VCCK_S0

3 PCH_DPC_AUXP
3 PCH_DPC_AUXN

25
5
20

3D3V_S0

C5608
RN5611
SRN150J-1-GP

U5601
3D3V_AVCC_S0 24

2
BLM18BB470SN1D-GP

8
7
6
5

close to pin9

SC10P50V2JN-L1-GP

C5621
SCD1U16V2KX-L-GP

L5603

C5617 PBY100505T-600Y-N-GP
SCD1U16V2KX-L-GP

1D2V_VCCK_S0

2
1

C5619
SC10U10V5KX-L1-GP

close to pin25

C5607
SC10P50V2JN-L1-GP

close to pin5

L5605

3D3V_DAC_S0

BLM18BB470SN1D-GP

Reserved for external 1.2V

CRT_GREEN_CON

close to pin24

C5606
SC10P50V2JN-L1-GP

1D2V_VCCK_S0

SCD1U16V2KX-L-GP
LDO_EN

CRT_GREEN
C5620
SCD1U16V2KX-L-GP

L5602

C5616 PBY100505T-600Y-N-GP
SCD1U16V2KX-L-GP

8
7
6
5

C5603

C5618
SC10U10V5KX-L1-GP

R5611
4K7R2J-L-GP

3D3V_S0

3D3V_AVCC_S0 1

Embedded LDO

Select VCCK_V12 source from external 1.2V or

embedded LDO

3D3V_S0

C5605
SC10P50V2JN-L1-GP

R5617
100KR2F-L3-GP

VGA RTD2168

SSID = Display

CRT_DDCDATA_CON 89
CRT_DDCCLK_CON 89
CRT_RED_CON 89
CRT_GREEN_CON 89
CRT_BLUE_CON 89
CRT_VSYNC_CON 89
CRT_HSYNC_CON 89

Mode Configure Table(Power On Latch)

EEPROM MODE
B

3D3V_S0
U5602

1
2
3
4

AFTP TESTPOINT

A0
A1
A2
GND

DY

VCC
WP
SCL
SDA

8
7
6
5

POL1_SCL
POL1_SDA

3D3V_S0
CAT24C128YI-GT3-GP

RN5602
5V_CRT_S0

CRT1

SCD01U50V2KX-L-GP

9
C5632

1
2

CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_RED_CON
CRT_GREEN_CON
CRT_BLUE_CON
CRT_VSYNC_CON
CRT_HSYNC_CON

12
15
1
2
3
14
13

VCC_CRT

NC#4
NC#11

DDCDATA_ID1
DDCCLK_ID3
CRT_RED
CRT_GREEN
CRT_BLUE
VSYNC
HSYNC

GND
GND
GND
GND
GND
GND
GND

4
3

VEDOR CHECK

POL1_SCL
POL1_SDA

SRN4K7J-8-GP

4
11

In EEPROM mode,an additional EEPROM is

needed.
EEPROM should configure with
following conditions.
1- EEPROM
with a size of 16K-Byte
ROM or EEPROM mode: connect to PCH SMBUS
2- EEPROM device should be 2-byte
addressing device
3- Slave address should configure as
0xA8

20150415 -1

5
6
7
8
10
16
17

RTD2168 Supports three operation mode for systemdesign.

Reserve 4.7K resistor pull high/low for mode selection
ROM ONLY Mode: PIN22 pull low, PIN23 pull high
EP Mode: PIN22 pull high, PIN23 pull low
EEPROM Mode: PIN22 pull high, PIN23 pull high

D-SUB-15-155-GP-U

Brook_SLU
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

20.20984.015
2nd = 20.20938.015

Title
Size
A3
Date:

VGA RTD2168
Document Number

Brook_SLU
Monday, July 06, 2015

Rev

1M
Sheet
1

56

of

105

HDMI Level Shifter & CONNECTOR

SSID = VIDEO

HDMI CONN
5V_HDMI_S0

5V_S0

20141015 Jack
1

3 HDMI_DATA_CPU_N1
3 HDMI_DATA_CPU_P1
3 HDMI_DATA_CPU_N2
3 HDMI_DATA_CPU_P2

HDMI_DATA_C_N0
HDMI_DATA_C_P0

C5703
C5704

1
1

HDMI_DATA_C_N1
HDMI_DATA_C_P1

C5705
C5706

1
1

HDMI_DATA_C_N2
HDMI_DATA_C_P2

C5707
C5708

1
1

2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

HDMI_CLK_CON_N3
HDMI_CLK_CON_P3

NON_LS
2 SCD1U16V2KX-L-GP
NON_LS
2 SCD1U16V2KX-L-GP
NON_LS
NON_LS

5V_HDMI_S0

HDMI_DATA_CON_N0
HDMI_DATA_CON_P0

2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

HDMI_DATA_CON_P0
HDMI_DATA_CON_N0
HDMI_DATA_CON_P1
HDMI_DATA_CON_N1
HDMI_DATA_CON_P2
HDMI_DATA_CON_N2

HDMI_DATA_CON_N1
HDMI_DATA_CON_P1

NON_LS
2 SCD1U16V2KX-L-GP
NON_LS
2 SCD1U16V2KX-L-GP
NON_LS
NON_LS

HDMI_CLK_CON_P3
HDMI_CLK_CON_N3

Close to HDMI Connector

2
2
2
2
2
2
2
2

7
9
4
6
1
3

TMDS_DATA0+
TMDS_DATA0TMDS_DATA1+
TMDS_DATA1TMDS_DATA2+
TMDS_DATA2-

1 R5729

HDMI_DET_CON

HDMI_HPD_B

NON_LS

Q5701
MMBT3904-4-GP

84.T3904.C11
2ND = 84.03904.P11
3rd = 84.03904.L06

NON_LS

R5718
20KR2F-L3-GP

DY

HDMI_DET_CPU

022.10025.00A1
2nd = 22.10296.211

NON_LS

HDMI_PLL_GND

Close to Level Shift

R5717
10KR2J-L-GP

SKT-HDMI23-133-GP-U

NON_LS
NON_LS
NON_LS
NON_LS
NON_LS
NON_LS
NON_LS
NON_LS

150KR2J-L1-GP

20
21
22
23

GND
GND
GND
GND

69.48001.081
2ND = 69.50011.081

3D3V_S0
D

14

RESERVED#14

TMDS_CLOCK_SHIELD
TMDS_CLOCK+
HDMI
TMDS_CLOCK(A_Type)

HDMI_CLK_CON
HDMI_DATA_CON

13
17
19

CEC
DDC/CEC_GROUNG
HOT_PLUG_DETECT

TMDS_DATA0_SHIELD
TMDS_DATA1_SHIELD
TMDS_DATA2_SHIELD

11
10
12

470R2F-GP
470R2F-GP
470R2F-GP
470R2F-GP
470R2F-GP
470R2F-GP
470R2F-GP
470R2F-GP

15
16

SCL
SDA

HDMI_CLK_CON_N3
1

R5701
R5704
R5706
R5707
R5709
R5710
R5711
R5708

+5V_POWER

8
5
2

HDMI_DATA_CON_N2
HDMI_DATA_CON_P2

1
1
1
1
1
1
1
1

18

1
1

C5701
C5702

NON_LSR5735 10R2J-L-GP 2
NON_LSR5734 10R2J-L-GP 2
0R2J-L-GP 2
NON_LSR5737 11
2
NON_LSR5736 0R2J-L-GP

HDMI_DATA_C_N3
HDMI_DATA_C_P3

POLYSW-1D1A6V-9-GP-U

C5733
SCD1U16V2KX-L-GP

3 HDMI_DATA_CPU_N0
3 HDMI_DATA_CPU_P0

NON_LS
NON_LS
NON_LS
NON_LS

3 HDMI_DATA_CPU_N3
3 HDMI_DATA_CPU_P3

HDMI1

0R2J-L-GP 2
R5732 1
1
2
R5733 0R2J-L-GP
0R2J-L-GP 2
1
R5739
1
2
R5738 0R2J-L-GP

Close to HDMI Connector

F5701

5V_HDMI_S0
HDMI_DET_CON

ER5701
180R2J-1-GP

2nd = 84.2N702.031
3rd = 84.2N702.W31

ER5702
180R2J-1-GP

DY
2

5V_S0

HDMI_DATA_CON_N0

84.2N702.J31

NON_LS

DY
HDMI_CLK_CON_P3

Q5702
2N7002K-2-GP

HDMI_DATA_CON_P0

HDMI_DATA_CON_N1
ER5703
180R2J-1-GP

LS

3D3V_S0

4K7R2J-L-GP 2

3D3V_S0

4K7R2J-L-GP 2

3D3V_S0

4K7R2J-L-GP 2

3D3V_S0

LS

DY
DY

1 R5730 PS8201_ISET

DY

1 R5712

3D3V_S0

20
31

1D5V_S0

3
3
3
3
3
3

1D5V_S0

HDMI_DATA_CPU_P0
HDMI_DATA_CPU_N0
HDMI_DATA_CPU_P1
HDMI_DATA_CPU_N1
HDMI_DATA_CPU_P2
HDMI_DATA_CPU_N2

LS

1
2

1
2

C5714
SCD01U50V2KX-L-GP

LS

C5712
SCD01U50V2KX-L-GP

LS

C5713
SCD01U50V2KX-L-GP

LS

C5711
SCD1U16V2KX-L-GP

LS

C5709
SCD1U16V2KX-L-GP

C5710
SCD1U16V2KX-L-GP

SCD01U50V2KX-L-GP

SCD1U16V2KX-L-GP

C5715

3 HDMI_DATA_CPU_P3
3 HDMI_DATA_CPU_N3

LS

40

1D5V_S0

19

LS

11

3D3V_S0

1 R5715

1 R5714

DY

C5716

2
1

U5701

1 R5713 PS8201_PRE
4K7R2J-L-GP 2

4K7R2J-L-GP 2

HDMI_DATA_CON_N2
1 R5726 PS8201_EQ

LS

C5724
C5723
C5726
C5725
C5728
C5727

1
1
1
1
1
1

C5722
C5721

1
1

2
2
2
2
2
2

LS
LS
LS
LS
LS2
LS2
LS
LS

SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP

HDMI_DATA_CPU_P0_C
HDMI_DATA_CPU_N0_C
HDMI_DATA_CPU_P1_C
HDMI_DATA_CPU_N1_C
HDMI_DATA_CPU_P2_C
HDMI_DATA_CPU_N2_C

SCD1U16V2KX-L-GP HDMI_CLK_CPU_P3_C
SCD1U16V2KX-L-GP HDMI_CLK_CPU_N3_C

9
10

13
PS8201_EN
PS8201_DDCBUF 14
PS8201_EQ 17
PS8201_CFG 23

R5721
4K02R2F-GP

6
7
4
5
1
2

LS

PS8201_REXT

18
12
15
37
34

1D5V_S0
3D3V_S0

ER5704
180R2J-1-GP

VDD33

OUT_CKN
OUT_CKP

VDD15
VDD15
VDD15

HDMI_DATA_CON_P0
HDMI_DATA_CON_N0
HDMI_DATA_CON_P1
HDMI_DATA_CON_N1
HDMI_DATA_CON_P2
HDMI_DATA_CON_N2

DY

HDMI_CLK_CON
HDMI_DATA_CON
HDMI_DET_CON
5V_HDMI_S0

SCL_SRC
SDA_SRC
HPD_SRC
I2C_CTL_EN

IN_CKP
IN_CKN

25
24
27
26
30
29
32
33
28

SCL_SNK
SDA_SNK
HPD_SNK

IN_D0P
IN_D0N
IN_D1P
IN_D1N
IN_D2P
IN_D2N

HDMI_CLK_CON_N3
HDMI_CLK_CON_P3
HDMI_DATA_CON_P2

OUT_D0P
OUT_D0N
OUT_D1P
OUT_D1N
OUT_D2P
OUT_D2N

VDD15

21
22

38
39
3

HDMI_HPD_E

I2C_CTL_EN

16

PRE

DCIN_EN/SCL_CTL
DDCBUF/SDA_CTL

36

PD#

EQ/I2C_ADDR
CFG

R5723

1 R5722

2 0R0402-PAD-1-GP

2 4K7R2J-L-GP

DY

3D3V_S0

20150611 -1M

HDMI_CLK_CPU
HDMI_DATA_CPU
HDMI_DET_CPU

20150609 -1M

D5701
BAW56-5-GP

PS8201_PRE

PS8201_PD# R5725

DY 2 4K7R2J-L-GP

3D3V_S0

35
41

GND
GND

REXT

DY

LS

1 R5731

NC#12
NC#15
NC#37
NC#34

83.00056.Q11

4K7R2J-L-GP 2

1 R5724 PS8201_CFG

1 R5728 PS8201_DDCBUF

4K7R2J-L-GP 2

3D3V_S0

DY

5V_DDC_HDMI2

4K7R2J-L-GP 2

HDMI_DATA_CON_P1

4K7R2J-L-GP 2

DY

1 R5727 PS8201_EN

DY

5V_DDC_HDMI1

3D3V_S0

4K7R2J-L-GP 2

4
3

3D3V_S0

RN5701
SRN2K2J-5-GP

3D3V_S0

PS8201_ISET
PS8201ATQFN40GTR2-A0-GP

NON_LS

I2C_CTL_EN

1 R5716

1
2

LS

Q5703
3,14 HDMI_CLK_CPU
3,14 HDMI_DATA_CPU

0R0402-PAD-1-GP

20150609 -1M

HDMI_CLK_CON
HDMI_DATA_CON

1
2N7002KDW-GP

84.2N702.A3F
2nd = 75.00601.07C

AFTP TESTPOINT
HDMI_DATA_CON_P0
HDMI_DATA_CON_N0

HDMI_DATA_CON_P1
HDMI_DATA_CON_N1
HDMI_DATA_CON_P2
HDMI_DATA_CON_N2
HDMI_CLK_CON_P3
HDMI_CLK_CON_N3

HDMI_DATA_CON_P0
HDMI_DATA_CON_N0

89
89

HDMI_DATA_CON_P1
HDMI_DATA_CON_N1

89
89

HDMI_DATA_CON_P2
HDMI_DATA_CON_N2

89
89

HDMI_CLK_CON_P3
HDMI_CLK_CON_N3

HDMI_CLK_CON
HDMI_DATA_CON
HDMI_DET_CON

HDMI_CLK_CON 89
HDMI_DATA_CON 89
HDMI_DET_CON

89
<Core Design>

Wistron Corporation

89
89

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:

HDMI Level Shifter/Connector

Document Number

Rev

Brook_SLU

Monday, July 06, 2015

1M
Sheet

57

of

105

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet

58

of
1

105

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

DVI

Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet

59

of
1

105

SSID = SATA

EU6001
SATA_TX_HDD_P0
SATA_TX_HDD_N0

SATA HDD Connector

HDD1

P1
P2
P3

P7
P8
P9
C6026
SCD1U16V2KX-L-GP

15 SATA_TX_CPU_P0
15 SATA_TX_CPU_N0
15 SATA_RX_CPU_P0
15 SATA_RX_CPU_N0

SCD01U50V2KX-L-GP 1
SCD01U50V2KX-L-GP 1

2 C6024 SATA_TX_HDD_P0
2 C6031 SATA_TX_HDD_N0

S2
S3

SCD01U50V2KX-L-GP 1
SCD01U50V2KX-L-GP 1

2 C6030 SATA_RX_HDD_P0
2 C6027 SATA_RX_HDD_N0

S6
S5

16
17
NP1
NP2

V5
V5
V5

P13
P14
P15

C6028
SC10U10V5KX-L1-GP

5V_S0

V3_3
V3_3
V3_3

V12
V12
V12

GND
GND
GND
GND
GND
GND
GND
GND

TX+
TX-

SATA_RX_HDD_N0
SATA_RX_HDD_P0

16
17
NP1
NP2

1
2
3
4
5

LINE_1
LINE_2
GND
LINE_3
LINE_4

NC#10
NC#9
GND
NC#7
NC#6

10
9
8
7
6

SATA_TX_HDD_P0
SATA_TX_HDD_N0
SATA_RX_HDD_N0
SATA_RX_HDD_P0

AZ1045-04F-R7G-GP

75.01045.073
2nd = 075.00550.0071

20150624 -1M

S1
S4
S7
P4
P5
P6
P10
P12

RX+
P11
RXDAS/DSS
SATA_HDD
SKT-SATA7P-15P-159-GP-U1

HDD_INT2

69

20150106 SC Jack

022.10019.0001
2nd = 022.10019.0021

AC coupling caps near connector<100 mils

3rd = 022.10019.0031
4th = 022.10019.0061

SATA ODD Connector

ODD1

21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
22

SATA_TX_ODD_P1
SATA_TX_ODD_N1

15 SATA_RX_CPU_P1
15 SATA_RX_CPU_N1
15 SATA_TX_CPU_N1
15 SATA_TX_CPU_P1

SATA_RX_CPU_P1 SCD01U50V2KX-L-GP 1
SATA_RX_CPU_N1 SCD01U50V2KX-L-GP 1

2 C6033 SATA_RX_ODD_P1
2 C6034 SATA_RX_ODD_N1

SATA_TX_CPU_N1 SCD01U50V2KX-L-GP 1
SATA_TX_CPU_P1 SCD01U50V2KX-L-GP 1

2 C6025 SATA_TX_ODD_N1
2 C6029 SATA_TX_ODD_P1

SATA_RX_ODD_N1
SATA_RX_ODD_P1

1 R6003

15 SATA_ODD_PRSNT#

PRSNT#

0R0402-PAD-1-GP

5V_ODD_S0

AC coupling caps near connector<100 mils

1 R6002

15 SATA_ODD_DA#

20R2J-L-GP

DA#

NON-IOAC
3D3V_S0

ACES-CON20-29-GP

20.K0637.020
20150417 -1

R6001
10KR2F-L1-GP
5V_S0

5V_ODD_S0

NON-IOAC

IOAC

1 R6022

DA#
0R5J-5-GP

84.2N702.A3F
2nd = 75.00601.07C

G524B1T11U-GP

DY

074.00524.0B9F

High Active 2A
6,24 ODD_PW R_EN

C6015
SC10U25V5KX-L-GP

SATA_ODD_DA#

20141015 Jack

AFTP TESTPOINT
20141015 Jack

C6005

1
2
3

SC1U10V2KX-L1-GP
2

OUT
GND
OC#

2
4

EN

SCD1U16V2KX-L-GP

IOAC

IN

C6006
Q6001
2N7002KDW -GP

DY

IOAC

6,24 ODD_PW R_EN

U6002
R6018
10KR2F-L1-GP

ODD_PWRGT#

SATA_ODD_PRSNT#

SATA_TX_ODD_P1
SATA_TX_ODD_N1
SATA_RX_ODD_N1
SATA_RX_ODD_P1
PRSNT#
DA#

Brook_SLU

Wistron Corporation

SATA_TX_ODD_P1 89
SATA_TX_ODD_N1 89

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

SATA_RX_ODD_N1 89
SATA_RX_ODD_P1 89

Title

PRSNT# 89

Size
A3

DA#

89

Date:

HDD / ODD
Document Number

Brook_SLU

Monday, July 06, 2015

Rev

1M
Sheet

60

of

105

SSID = Wireless

Mini Card Connector(802.11a/b/g/n)

3D3V_IOAC

W LAN1

3D3V_IOAC

C6104

1
2

2
4
6
8
10
12
14
16
18
20
22

SCD1U16V2KX-L-GP

C6103
SC10U6D3V3MX-L-GP

C6102
SCD1U16V2KX-L-GP

20150421 -1
R6116

24 E51_TXD

GAP-OPEN-PW R-2-GP
R6117
1
2

24 E51_RXD

E51_TXD_R
E51_RXD_R

GAP-OPEN-PW R-2-GP
W LAN_RST#
24,89 BLUETOOTH_EN
24 W IFI_RF_EN

1 R6114

W IFI_RF_EN_CON

0R0402-PAD-1-GP

NON-IOAC
PLT_RST#

R6104
2
1
0R2J-L-GP

24 W LAN_PERST#

R6105
2
1
0R2J-L-GP

20,24,31,40,63,68,89,91

IOAC

3D3V_IOAC
W LAN_RST#

32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76

20141203 SB Jack

NP2

NP1
GND
USB_D+
USB_DGND
SDIO_CLK
SDIO_CMD
SDIO_DAT0
SDIO_DAT1
SDIO_DAT2
SDIO_DAT3
SDIO_WAKE
SDIO_RESET

NGFF_KEY_E_75P

NP2

3_3VAUX
3_3VAUX
LED#1
PCM_CLK
PCM_SYNC
PCM_IN
PCM_OUT
LED#2
GND
UART_WAKE
UART_RX

UART_TX
UART_RTS
UART_CTS
CLINK_RESET
CLINK_DATA
CLINK_CLK
COEX3
COEX2
COEX1
SUSCLK_32KHZ
PERST0#
RESERVED#54/W_DISABLE#2
W_DISABLE#1
NFC_I2C_SM_DATA
NFC_I2C_SM_CLK
NFC_I2C_IRQ/MGPIO5
GPIO0_NFC_RESET#/MGPIO7
RESERVED#66
RESERVED#68
RESERVED#70
3_3VAUX
3_3VAUX
76
SKT-NGFF75P-66-GP

GND
PETP0
PETN0
GND
PERP0
PERN0
GND
REFCLKP0
REFCLKN0
GND
CLKREQ0#
PEWAKE0#
GND
RESERVED#59/2ND_LANE_PETP1
RESERVED#61/2ND_LANE_PETN1
GND
RESERVED#65/2ND_LANE_PERP1
RESERVED#67/2ND_LANE_PERN1
GND
RESERVED#71
RESERVED#73
GND
77

NP1
D

1
3
5
7
9
11
13
15
17
19
21
23
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77

USB_CPU_PP4 15,89
USB_CPU_PN4 15,89

PCIE_TX_W LAN_P6 C6107 1

PCIE_TX_W LAN_N6 C6113 1

2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

PCIE_RX_CPU_P6 15,89
PCIE_RX_CPU_N6 15,89
W LAN_CLK_CPU 16,89
W LAN_CLK_CPU# 16,89
PCIE_W AKE#R

W LAN_CLKREQ_CPU#

16,89
3D3V_IOAC
C

IOAC
R6115

IOAC

2
10KR2F-L1-GP

R6108

2
0R2J-L-GP
R6111
1
2
0R2J-L-GP

PCIE_W AKE#R

062.10007.0161
2nd = 062.10003.0401

W IFI_RF_EN_CON

PCIE_TX_CPU_P6 15
PCIE_TX_CPU_N6 15

W LAN_PCIE_W AKE# 24
PCIE_W AKE# 20,24,31,63

NON-IOAC

W LAN_RST#

DY

20141203 SB Jack
EC6110

DY
SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

EC6111

3D3V_S0

3D3V_IOAC

3D3V_S5
B

R6110 1

NON_IOAC

IOAC

C6106
SC1U10V2KX-L1-GP

20141016 Jack

2 0R3J-L1-GP

U6103

5
4

24 W LAN_PW R_EN#

IN
EN#

89 PCIE_TX_W LAN_P6
89 PCIE_TX_W LAN_N6

IOAC
OUT
GND
OC#

1
2
3

W LAN_RST#

89 W LAN_RST#
24,89 BLUETOOTH_EN

PCIE_W AKE#R

89 PCIE_W AKE#R
SY6288DAAC-GP

074.06288.009B
2nd = 074.00524.0C9F
3rd = 074.02822.009F

W IFI_RF_EN_CON

89 W IFI_RF_EN_CON

AFTP TEST POINT

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

Mini Card-WLAN
Document Number

Brook_SLU

Monday, July 06, 2015

Rev

1M
Sheet
1

61

of

105

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

Wireless Charging
Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet

62

of
1

105

Mini Card Connector(mSATA)

SSID = mSATA

3D3V_S0

3D3V_MSATA_S0

1 R6301

0R0805-PAD-1-GP-U

20141014 Jack

Baseline Baseline Baseline Baseline Baseline

3D3V_MSATA_S0

1 R6312

20,24,31,61 PCIE_W AKE#

16 MSATA_CLKREQ_CPU#
20,24,31,40,61,68,89,91 PLT_RST#

1 R6308

2
MSATA_PCIE_W AKE#_C
0R0402-PAD-1-GP
2
MSATA_RST#
0R0402-PAD-1-GP

R6328
DEVSLP

15 DEVSLP

2
0R2J-L-GP

DEVSLP_R

DY

20150116 SC Jack

TPAD14-OP-GP
MSATA_RST#

MSATA_PCIE_W AKE#_C

DY

EC6315
TVL-0402-01-AB1-1-GP

20141016 Jack

DAS/DSS#

NP2
76
3_3VAUX
3_3VAUX
3_3VAUX
SUSCLK_32KHZ
NC#58
NC#56
PEWAKE#/NC#54
CLKREQ#/NC#52
PERST#/NC#50
NC#48
NC#46
NC#44
NC#42
NC#40
DEVSLP
NC#36
NC#34
NC#32
NC#30
NC#28
NC#26
NC#24
NC#22
NC#20
3_3VAUX
3_3VAUX
3_3VAUX
3_3VAUX
DAS/DSS#
NC#8
NC#6
3_3VAUX
3_3VAUX

NP1
77
GND
GND
GND
PEDET(OC_PCIE/GND_SATA)
NC#67
GND
REFCLKP
REFCLKN
GND
PERP0/SATA_A+
PERN0/SATA_AGND
PETP0/SATA_BPETN0/SATA_B+
GND
PERP1
PERN1
GND
PETP1
PETN1
GND
PERP2
PERN2
GND
PETN2
PETP2
GND
PERP3
PERN3
GND
PETN3
PETP3
GND
GND
NGFF_KEY_M 75P

Baseline

NP1
77
75
73
71
69
67
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

DY

R6304
1MR2F-L-GP

R6303
0R2J-L-GP

Baseline
2

NP2
76
74
72
70
68
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

SKT-MINI67P-14-GP

Baseline
2

SC10P50V2JN-L1-GP

EC6316

TP6302

MSATA1

MSATA_PEDET 15
3D3V_MSATA_S0

1
2

1
2

C6313
SC10U6D3V3MX-L-GP

C6308
SC10U6D3V3MX-L-GP

C6307
SC10U6D3V3MX-L-GP

C6306
SCD1U16V2KX-L-GP

C6305
SCD1U16V2KX-L-GP

3D3V_MSATA_S0

MSATA_PEDET

20141013 Jack
SATA_TX_MSATA_P2
SATA_TX_MSATA_N2
SATA_RX_MSATA_N2
SATA_RX_MSATA_P2
PCIE_TX_MSATA_P11
PCIE_TX_MSATA_N11

Baseline
C6309
C6310

1
1

Baseline

2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

1 R6309
1 R6310

Baseline
C6312
C6311

1
1

2 0R0402-PAD-1-GP
2 0R0402-PAD-1-GP

MSATA_CLK_CPU 16
MSATA_CLK_CPU# 16
SATA_TX_CPU_P2 15
SATA_TX_CPU_N2 15
SATA_RX_CPU_N2 15
SATA_RX_CPU_P2 15

2 SCD1U16V2KX-L-GP
2 SCD1U16V2KX-L-GP

Baseline

PCIE_TX_CPU_P11 15
PCIE_TX_CPU_N11 15
PCIE_RX_CPU_P11 15
PCIE_RX_CPU_N11 15

20141013 Jack

062.10003.0431

2nd = 062.10003.0721
3rd = 062.10003.0731

20150611 -1M
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

mSTAT

Size
A3

Document Number

Date:
5

Brook_SLU

Monday, July 06, 2015

Rev

1M
Sheet
1

63

of

105

Main Func = Power BTN

20140924

Power button
1

24,65,89 KBC_PW RBTN#

2
SW 2
SW -TACT-4P-71-GP

LAB

62.40089.441
2nd = 62.40009.E51
3rd = 62.40056.041
4th = 62.40009.D71

4
6

Main Func = Battery LED

20150113 SC Jack
LED1
R6406
C

STDBY_LED#_Q

Power Button_LED

FRONT_PW RLED#_Q

2 820R2F-GP

STDBY_LED#_R

5V_S5

Orange

Q6402

24 PW RLED

1 R6405

2 680R2F-GP

FRONT_PW RLED#_R

Blue

FRONT_PW RLED#_Q

R1

LED-BO-9-GP-U

R2
LTC043ZUB-FS8-GP

84.00043.011
2nd = 84.00143.D1K

LED2
R6408

3rd = 84.05143.011
4th = 084.05233.001H

CHARGE_LED#_Q

2 820R2F-GP

CHARGE_LED#_R

DC_BATFULL#_Q

1 R6409

2 680R2F-GP

DC_BATFULL#_R

5V_AUX_S5

Orange
1

Power STDBY_LED

Blue

Q6405

3
1

24 STDBY_LED

LED-BO-9-GP-U

STDBY_LED#_Q

R1
2
R2
LTC043ZUB-FS8-GP

84.00043.011
2nd = 84.00143.D1K

3rd = 84.05143.011
4th = 084.05233.001H

Battery LED2(DC_BATFULL)
Q6407

3
1

24 DC_BATFULL

DC_BATFULL#_Q

R1

2
R2
LTC043ZUB-FS8-GP

84.00043.011
2nd = 84.00143.D1K

3rd = 84.05143.011
4th = 084.05233.001H

Battery LED1(CHARGE)
Q6408

3
24 CHARGE_LED
A

CHARGE_LED#_Q

R1
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Core Design>
application without get Wistron permission

2
R2
LTC043ZUB-FS8-GP

84.00043.011
2nd = 84.00143.D1K

Wistron Corporation

3rd = 84.05143.011
4th = 084.05233.001H

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:

LED Bard/Power Button

Document Number

Brook_SLU
Monday, July 06, 2015

Rev

1M
Sheet
1

64

of

105

Precision Touch Pad

3D3V_TP_S3

I2C Addr. = 0X2C (Synaptics)

1
2

3D3V_TP_S3

RN6503
SRN4K7J-8-GP

3D3V_TP_S3

R6506
100KR2F-L3-GP

TP_IN#_R

RN6502
SRN33J-5-GP-U
1
4
2
3

24 EC_TPCLK
24 EC_TPDATA

EC_TP_CLK_C
EC_TP_DATA_C
I2C1_DATA_TP
I2C1_CLK_TP
TP_IN#_R

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031
3rd = 84.2N702.W31

TP_IN#_R

EC6508

KB_BL_DET_R

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

3D3V_S5

KB_LED_PWM_D EC6511
KBC_PWRBTN#
EC6503
SC10P50V2JN-L1-GP

EC6512

U6502

DY

DY

SC10P50V2JN-L1-GP

SC10P50V2JN-L1-GP

DY

2N7002KDW-GP

5
4

TPAD_PWRCTL

DY

20141125 Jack

3D3V_TP_S3

IN

OUT
GND
OC#

EN#

1
2
3

SY6288DAAC-GP
R6505
0R0402-PAD-1-GP

074.06288.009B
2nd = 074.00524.0C9F
3rd = 074.02822.009F

PTP_PWR_EN# 24

6 I2C1_DATA_CPU
3D3V_S5

I2C1_DATA_TP

20141016 Jack
EC6505
SC10P50V2JN-L1-GP

R6520
2

Internal KeyBoard Connector

29

28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

KROW0 24,89
KROW1 24,89
KROW2 24,89
KROW3 24,89
KROW4 24,89
KROW5 24,89
KROW6 24,89
KROW7 24,89
KROW8 24,89
KROW9 24,89
KROW10 24,89
KROW11 24,89
KROW12 24,89
KROW13 24,89
KROW14 24,89
KROW15 24,89
KROW16 24,89
KROW17 24,89

TP_IN#_R
TP_LID_CLOSE#

AFTP TEST POINT

PTP_PWR_EN#

10KR2F-L1-GP

KB_BL

5V_S0

KB_BL1
6
4
3
2

KB_BL_DET_R

KB_LED_PWM_D

R6504
1

100KR2F-L3-GP

KB_BL

KB_BL_DET 24

R6502
200KR2F-L-3-GP
2

KB_BL

20.K0382.004
2nd = 20.K0465.004
3rd = 20.K0422.004

KB_BL

KCOL7

KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6

24,89
24,89
24,89
24,89
24,89
24,89
24,89
24,89

I2C1_DATA_TP
I2C1_CLK_TP

89 TP_IN#_R
89 TP_LID_CLOSE#

DY

PTWO-CON4-9-GP-U1
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7

89 I2C1_DATA_TP
89 I2C1_CLK_TP

C6501

Q6501
2N7002K-2-GP

SCD1U16V2KX-L-GP

020.K0173.0028

KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KROW9
KROW10
KROW11
KROW12
KROW13
KROW14
KROW15
KROW16
KROW17

30

KB1
ACES-CON28-10-GP

20150410 -1

20141106 Jack

EC_TP_CLK_C
EC_TP_DATA_C

DY

89 EC_TP_CLK_C
89 EC_TP_DATA_C

84.2N702.A3F
2nd = 75.00601.07C

C6504
SC4D7U6D3V3KX-L-GP

EC6510

20.K0667.008
2nd = 20.K0665.008

C6509

I2C1_CLK_TP

DY

TP_LID_CLOSE# EC6509

1
2
5

DY

SC10P50V2JN-L1-GP

SC4D7U6D3V3KX-L-GP

DY

EC_TP_DATA_C EC6507

RN6505
SRN2K2J-5-GP
Q6503

DY

EC6506

4
3

3D3V_S0

1
9

TP_LID_CLOSE#

EC_TP_CLK_C

2
0R0402-PAD-1-GP

ACES-CON8-40-GP

3D3V_TP_S3

6 I2C1_CLK_CPU

1 R6524

24 FUN_OFF#

2
0R0402-PAD-1-GP

1 R6512

24 EC_TP_IN#

10
8
7
6
5
4
3
2

D
22 TP_IN#

TPAD1

3D3V_S0

4
3

Q6502

DY

84.2N702.J31

2nd = 84.2N702.031
3rd = 84.2N702.W31
S

KBC_PWRBTN# 24,64,89

C6502
SCD1U16V2KX-L-GP

24 KB_BL_PWM

DY

Brook_SLU
KB_BL_DET_R
KB_LED_PWM_D

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

KB_BL_DET_R 89

Wistron Corporation

KB_LED_PWM_D 89

AFTP TEST POINT

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom

Key Board/Touch Pad

Document Number

Rev

1M

Brook_SLU

Date: Monday, July 06, 2015

5

Sheet
1

65

of

105

Low Active 2A
RDSon = 80m (Typ)

5V_S5

5V_USB

U6601
1
2
3

EN#

OUT
GND
OC#

SY6288DAAC-GP
2

074.06288.009B
2nd = 074.00524.0C9F
3rd = 074.02822.009F

24,35 USB_PWR_EN#

C6604

C6603

DY

SC10U10V5KX-L1-GP

C6609
SC1U10V2KX-L1-GP

IN

SCD1U16V2KX-L-GP

5V_USB
USBBD1
17
1

68.01012.201
2nd = 68.00396.001
EL6601
15 USB_CPU_PP1
15 USB_CPU_PN1

15 USB_CPU_PP3
15 USB_CPU_PN3

MCM1012B900FBP-GP-U
EL6602
3
4
2

USB_CON_PP1_C
USB_CON_PN1_C
USB_CON_PP3_C
USB_CON_PN3_C

MCM1012B900FBP-GP-U

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18

68.01012.201
2nd = 68.00396.001

PTWO-CON16-1-GP

20.K0429.016

20150121 SC Jack

2nd = 20.K0460.016

USB_CON_PN1_C 89
USB_CON_PP1_C 89
USB_CON_PN3_C 89
USB_CON_PP3_C 89

Brook_SLU

Wistron Corporation

AFTP TESTPOINT

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

Key Board/Touch Pad

Size
A4

Document Number

Brook_SLU
Monday, July 06, 2015

Date:
5

Rev

1M
Sheet

66

of
1

105

3D3V_AUX_S5

DY
2

C6701
SCD1U16V2KX-L-GP

LIDSW1

1 R6701

24 LID_CLOSE#

LID_CLOSE#_1

1
2
3

VSS
VDD
OUT

100R2F-L3-GP
S-5716ACDL0-M3002-GP

DY

74.05716.07B
2nd = 074.09246.007B

C6702
SCD047U16V2KX-1-GP

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

Security Guard connector

Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet

67

of
1

105

3D3V_S0
DBG1
11
1
18,24,91 LPC_AD_CPU_P0
18,24,91 LPC_AD_CPU_P1
18,24,91 LPC_AD_CPU_P2
18,24,91 LPC_AD_CPU_P3
18,24,91 LPC_FRAME#_CPU
20,24,31,40,61,63,89,91 PLT_RST#

18 LPC_CLK_DBG

2
3
4
5
6
7
8
9
10

12
ACES-CON10-1-GP-U1

LAB

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A4
Date:
5

Dubug connector
Document Number

Brook_SLU
Monday, July 06, 2015
2

Rev

1M
Sheet

68

of
1

105

Note
- no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can

SSID = User.Interface

G Sensor
D

3D3V_S0

0R0402-PAD-1-GP

6 GSENSOR_INT#
12,13,18 PCH_SMBCLK

60 HDD_INT2

1 R6911

1 R6912

2
0R2J-L-GP

ADC3
GND
INT1
RES
INT2

2
1

DY

GSENSOR

1
2

1
PCH_SMBCLK

C6902
SCD1U16V2KX-L-GP

LIS3DHTR-GP

20150213 SC Jack
PCH_SMBDATA

R6910
10KR2F-L1-GP

G_SA0

GSENSOR
R6908
10KR2F-L1-GP
GSENSOR_INT2

GSENSOR
1

1
2
3
4
5

C6901

R6906
10KR2F-L1-GP

DY
B

R6907
10KR2F-L1-GP

G_CS

3D3V_S0

R6905
10KR2F-L1-GP

GSENSOR

GSENSOR

3D3V_S0

3D3V_S0

VDD_IO
NC#2
NC#3
SCL/SPC
GND

8
7
6

DY

20150106 SC Jack

20150213 SC Jack

GSENSOR

U6901

VDD
ADC2
ADC1
13
12
11
10
9

GSENSOR_INT#_R

CS
SDO/SA0
SDA/SDI/SDO

12,13,18 PCH_SMBDATA

G_CS
G_SA0

GSENSOR

R6909
10KR2F-L1-GP

SCD22U10V2KX-L1-GP

14
15
16

3D3V_S0

SDO="H"; address="3Ah"
*SDO="L"; address="38h"
*CS="H"; mode="I2C"
CS="L"; mode="SPI"

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

G-SENSOR
Document Number

Brook_SLU

Monday, July 06, 2015

Rev

1M
Sheet
1

69

of

105

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Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

Hall Sensor
Document Number

Brook_SLU
Monday, July 06, 2015

Rev

1M
Sheet
1

70

of

105

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Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thunderbolt (1/5)

Size
Custom
Date:
5

Document Number

Brook_SLU
Monday, July 06, 2015

Rev

1M
Sheet
1

71

of

105

Wistron Confidential document, Anyone can not

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A

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Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thunderbolt (2/5)

Size
Custom
Date:
5

Document Number

Rev

1M

Brook_SLU
Monday, July 06, 2015

Sheet
1

72

of

105

Wistron Confidential document, Anyone can not

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application without get Wistron permission
A

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thunderbolt (3/5)

Size
Custom
Date:
5

Document Number

Rev

1M

Brook_SLU
Monday, July 06, 2015

Sheet
1

73

of

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thunderbolt (4/5)

Size
Custom
Date:
5

Document Number

Rev

1M

Brook_SLU
Monday, July 06, 2015

Sheet
1

74

of

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (5/5)

Size
A4

Document Number

Brook_SLU
Monday, July 06, 2015

Date:
5

Rev

1M
Sheet

75

of
1

105

1D0V_VGA_S0

2
1
1

PEG_TX_CON_P2
PEG_TX_CON_N2

2 SCD22U10V2KX-L1-GP PEG_RX_CON_P3
2 SCD22U10V2KX-L1-GP PEG_RX_CON_N3

15 PEG_TX_CON_P3
15 PEG_TX_CON_N3

PEG_TX_CON_P3
PEG_TX_CON_N3

AE9
AF9
AC12
AB12
AG9
AG10
AB13
AC13
AF10
AE10
AD14
AC14
AE12
AF12

AC15
AB15

AB16
AC16
AF13
AE13
AD17
AC17
AE15
AF15
AC18
AB18
AG15
AG16
AB19
AC19
AF16
AE16
AD20
AC20
AE18
AF18
AC21
AB21
B

AG18
AG19
AD23
AE23
AF19
AE19

AG21
AG22

PEX_RX2
PEX_RX2#

1
2

1
2

1
2

1
2

Power current=0.79A

PEX_TX3
PEX_TX3#
PEX_RX3
PEX_RX3#
PEX_TX4
PEX_TX4#
PEX_RX4
PEX_RX4#

3D3V_AON_S0

NC FOR GF119

PEX_TX5
PEX_TX5#
PEX_RX5
PEX_RX5#
PEX_TX6
PEX_TX6#
PEX_RX6
PEX_RX6#

PEX_PLL_HVDD_1
PEX_PLL_HVDD_2
PEX_SVDD_3V3

210mA

AA8
AA9
AB8

PEX_TX7
PEX_TX7#
PEX_RX7
PEX_RX7#

PX
C7623

C7624

PX
C7625

Near GPU

100nF(X5R)
K0402 1

PEX_TX8
PEX_TX8#

PX

4.7uF(X5R)
K0603 2

PEX_RX8
PEX_RX8#
PEX_TX9
PEX_TX9#

VDD_SENSE

PEX_RX9
PEX_RX9#

GND_SENSE

F2
F1

NVVDD_SENSE

85

NVGND_SENSE

85

PEX_TX10
PEX_TX10#
PEX_RX10
PEX_RX10#
PEX_TX11
PEX_TX11#
PEX_RX11
PEX_RX11#
PEX_TX12
PEX_TX12#
PEX_RX12
PEX_RX12#
PEX_TX13
PEX_TX13#
PEX_RX13
PEX_RX13#

DY
R7610
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

AF22
AE22

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

200R2F-L1-GP
2

100nF(X7R) 1uF(X5R)
K0402 1
K0603 1
PEX_PLLVDD_1
PEX_PLLVDD_2

4.7uF(X5R)
K0805 1

1D0V_VGA_S0

AA14
AA15

PEX_TX14
PEX_TX14#
PEX_RX14
PEX_RX14#
TESTMODE

AD9

TESTMODE

PEX_TX15
PEX_TX15#

C7626

PX

Under GPU

PEX_RX15
PEX_RX15#

PX
R7605
2K49R2F-2-L-GP

N16S-GM-S-A2-GP

PX

PX

Near GPU

C7628

PX

PEX_TERMP
1

PEX_TERMP

AF25

C7627

SC4D7U6D3V3KX-L-GP

AG24
AG25

PEX_TX2
PEX_TX2#

SC1U10V2KX-L1-GP

AE21
AF21

PEX_RX1
PEX_RX1#

AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27

SCD1U16V2KX-L-GP

AF24
AE24

PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14

PEX_TX1
PEX_TX1#

SCD1U16V2KX-L-GP

AG12
AG13

C7617
C7620

AF7
AE7
AD11
AC11

PX

15 PEG_TX_CON_P2
15 PEG_TX_CON_N2
15 PEG_RX_CPU_P3
15 PEG_RX_CPU_N3

PEG_TX_CON_P1
PEG_TX_CON_N1

2 SCD22U10V2KX-L1-GP PEG_RX_CON_P2
2 SCD22U10V2KX-L1-GP PEG_RX_CON_N2

PEX_RX0
PEX_RX0#

1
1

C7607

22uF(X5R)
M0805 4

C7621
C7622

AG6
AG7
AB10
AC10

10uF(X5R)
M0805 4

SC4D7U6D3V3KX-L-GP
2
1

PX
PX

15 PEG_TX_CON_P1
15 PEG_TX_CON_N1
15 PEG_RX_CPU_P2
15 PEG_RX_CPU_N2

PEG_TX_CON_P0
PEG_TX_CON_N0

2 SCD22U10V2KX-L1-GP PEG_RX_CON_P1
2 SCD22U10V2KX-L1-GP PEG_RX_CON_N1

PX

PEG_RX_CPU_P3
PEG_RX_CPU_N3

1
1

C7606

PEX_TX0
PEX_TX0#

15 PEG_RX_CPU_P1
15 PEG_RX_CPU_N1

C7610
C7609

PEX_REFCLK
PEX_REFCLK#

Near GPU

SC4D7U6D3V3KX-L-GP
2
1

PX
PX

15 PEG_TX_CON_P0
15 PEG_TX_CON_N0

AC9
AB9

Under GPU

PEG_RX_CPU_P2
PEG_RX_CPU_N2

2 SCD22U10V2KX-L1-GP PEG_RX_CON_P0
2 SCD22U10V2KX-L1-GP PEG_RX_CON_N0

AA22
AB23
AC24
AD25
AE26
AE27

PX
PX

AE8
AD8

16 PEG_CLK_CPU
16 PEG_CLK_CPU#
1
1

PEX_CLKREQ#

NC FOR GM108

PEG_RX_CPU_P1
PEG_RX_CPU_N1

C7601
C7611

PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6

PEX_RST#

NC FOR GF117/GK208/GM108

PX
PX

PEX_WAKE#

1
PEG_RX_CPU_P0
PEG_RX_CPU_N0

AC6

PX

SC22U6D3V5MX-L3-GP

2nd = 84.2N702.031 2N7002K-2-GP

3rd = 84.2N702.W31 84.2N702.J31
15 PEG_RX_CPU_P0
15 PEG_RX_CPU_N0

AC7

C7605

SC10U25V5KX-L-GP

PEG_CLKREQ#_1

PX

SC10U25V5KX-L-GP

79 VGA_RST#
S

C7604
SC4D7U6D3V3KX-L-GP

AB6

PX
C7603

PX

SC1U10V2KX-L1-GP

R7655
10KR2F-L1-GP

16 PEG_CLKREQ_CPU#

1/14 PCI_EXPRESS

Q7601
G

PX

C7602
SC1U10V2KX-L1-GP

PX

1 OF 14

GPU1A

3D3V_AON_S0

VGA_RST#

PX
R7606
10KR2F-L1-GP

R7604
0R2J-L-GP

Non-GC6
1

6,22,79 DGPU_HOLD_RST#

Wistron Confidential document, Anyone can not

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application without get Wistron permission

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Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

GPU (PEG)

Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

76

of

105

4 OF 14
5 OF 14

GPU1H
5/14 IFPC

V7
D

W7

IFPAB_PLLVDD_1
IFPA_TXD1#
IFPA_TXD1

IFPAB_PLLVDD_2

Y6

IFPA_IOVDD

IFPA_TXD3#
IFPA_TXD3
IFPB_TXC#
IFPB_TXC

NC FOR GF117/GM108

W6

NC FOR GF117/GM108

IFPA_TXD2#
IFPA_TXD2

IFPB_IOVDD

M7
N7

PX

AA5
AA4
AB4
AB5
P6

IFPB_TXD4#
IFPB_TXD4
IFPB_TXD5#
IFPB_TXD5
IFPB_TXD6#
IFPB_TXD6
IFPB_TXD7#
IFPB_TXD7

AB2
AB3

IFPC_IOVDD

DP

I2CW_SDA
I2CW_SCL

IFPC_PLLVDD_1
IFPC_PLLVDD_2

AA2
AA3
AA1
AB1

7/14 IFPEF
GF119/GK208

DVI/HDMI

Y3
Y4

IFPC_AUX_I2CW_SDA#
IFPC_AUX_I2CW_SCL

TXC
TXC

IFPC_L3#
IFPC_L3

TXD0
TXD0

IFPC_L2#
IFPC_L2

TXD1
TXD1

IFPC_L1#
IFPC_L1

TXD2
TXD2

IFPC_L0#
IFPC_L0

AD2
AD3

NC

J7

K7
R3
R2
R1
T1

K6

IFPEF_RSET

T3
T2

C3

H6

6/14 IFPD

U6

J6

DVI/HDMI

AD5
AD4
T7

I2CX_SDA
I2CX_SCL

IFPD_PLLVDD_2

IFPF_IOVDD

DP

IFPD_AUX_I2CX_SDA#
IFPD_AUX_I2CX_SCL

TXC
TXC

TXC
TXC

IFPE_L3#
IFPE_L3

TXD0
TXD0

TXD0
TXD0

IFPE_L2#
IFPE_L2

TXD1
TXD1

TXD1
TXD1

IFPE_L1#
IFPE_L1

TXD2
TXD2

TXD2
TXD2

IFPE_L0#
IFPE_L0

IFPE_AUX_I2CY_SDA#
IFPE_AUX_I2CY_SCL

PX

IFPD

NC FOR GF117/GM108

N16S-GM-S-A2-GP

IFPD_IOVDD

TXC
TXC

IFPD_L3#
IFPD_L3

TXD0
TXD0

IFPD_L2#
IFPD_L2

TXD1
TXD1

IFPD_L1#
IFPD_L1

TXD2
TXD2

IFPD_L0#
IFPD_L0

HPD_E

HPD_E

GPIO17

K3
K2
M3
M2
M1
N1

GPIO18

C2

GF119/GK208
DVI-DL

DVI-SL/HDMI

DP

I2CZ_SDA
I2CZ_SCL

IFPF_AUX_I2CZ_SDA#
IFPF_AUX_I2CZ_SCL

H4
H3
C

P4
P3
R5
R4

IFPF

T5
T4

J1
K1

NC FOR GF117

TXC
TXC

IFPF_L3#
IFPF_L3

TXD3
TXD3

TXD0
TXD0

IFPF_L2#
IFPF_L2

TXD4
TXD4

TXD1
TXD1

IFPF_L1#
IFPF_L1

U4
U3

TXD5
TXD5

TXD2
TXD2

IFPF_L0#
IFPF_L0

V4
V3

J5
J4
K5
K4
L4
L3
M5
M4

NC FOR GK208

HPD_F

GF117
NC

J3
J2

NC FOR GK208

IFPD_PLLVDD_1

B3

R6

IFPE_IOVDD

GF119/GK208

IFPD_RSET

DP

I2CY_SDA
I2CY_SCL

IFPEF_PLLVDD_2

IFPE
GPIO15

DVI-SL/HDMI

I2CY_SDA
I2CY_SCL

IFPEF_PLLVDD_1

N3
N2

6 OF 14

GPU1I

AD1
AE1

NC FOR GF117/GM108

IFPAB

N5
N4

N16S-GM-S-A2-GP

R7

GPIO14

DVI-DL

GF117

GF117
NC

7 OF 14

GPU1J

GF119/GK208

IFPC_RSET

NC FOR GF117/GM108

IFPA_TXD0#
IFPA_TXD0

T6

NC FOR GF117/GM108

IFPAB_RSET

AC4
AC3

NC FOR GF117/GM108

IFPA_TXC#
IFPA_TXC

IFPC

NC FOR GF117/GM108

4/14 IFPAB

NC FOR GF117/GK208/GM108

GPU1G

AA6

GPIO19

F7

NC FOR GF117

D4
N16S-GM-S-A2-GP

PX

3 OF 14

GPU1K

N16S-GM-S-A2-GP

3/14 DACA
GF117/GM108
B

W5
AE2
AF2

NC

DACA_VDD
DACA_VREF

GF117

GM108/GK208

NC
NC

I2CA_SCL
I2CA_SDA

NC
NC

DACA_HSYNC
DACA_VSYNC

RN7701

B7
A7

TSEN_VREF
NC

DACA_RSET

I2CA_SCL
I2CA_SDA

1
2

4
3

PX

SRN1K8J-GP

NC

DACA_RED

NC

DACA_GREEN

NC

DACA_BLUE

GM108
GF117

AE3
AE4

PX

AG3
AF4
AF3

GK208

N16S-GM-S-A2-GP

PX

Brook_SLU

Wistron Confidential document, Anyone can not

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Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

GPU (DIGITALOUT)

Document Number

Brook_SLU

Monday, July 06, 2015

Sheet
1

Rev

1M
77

of

105

PX
FBA_CMD28
FBA_CMD28
2 OF 14

GPU1B

F19
C14
A16
A22
P25
W22
AB27
T27

FBA_DQSN0
FBA_DQSN1
FBA_DQSN2
FBA_DQSN3
FBA_DQSN4
FBA_DQSN5
FBA_DQSN6
FBA_DQSN7

F3

1
2

FBA_CMD9
FBA_CMD9

FB_CLAMP

PX

4
3

PX

R7869
10KR2F-L1-GP

FBA_CMD11
FBA_CMD11

1
2

1D5V_VGA_S0
RN7804
4 SRN100J-3-GP
3
1D5V_VGA_S0

1
2

4
3

1
2

SRN100J-3-GP
RN7808 SRN100J-3-GP
4
3

FBA_CMD12
FBA_CMD12
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

1
2

FBA_CMD23
FBA_CMD23

PX

1
2

SRN100J-3-GP
4
3

PXRN7818
SRN100J-3-GP
RN7819 SRN100J-3-GP
4
3

1D5V_VGA_S0

2
1
2

4
3

PXRN7820
FBA_CMD29
FBA_CMD29

SRN100J-3-GP
SRN100J-3-GP
4
3

RN7821
PX
1

1D5V_VGA_S0

1D5V_VGA_S0

4
3

FBA_CMD22
FBA_CMD22

1
2

4
3

PX

RN7822
SRN100J-3-GP

1D5V_VGA_S0
SRN100J-3-GP
4
3

RN7811

1
2

1D5V_VGA_S0

4
3

PX1

1D5V_VGA_S0

PX
1D5V_VGA_S0
1
2

FBA_CMD6
FBA_CMD6

4
3

RN7812
SRN100J-3-GP

PX

PX

PX

D18
C18
D17
D16
T24
U24
V24
V25

81,82
81,82
83,84
83,84

PX
C7805

C7801

PX
C7811

PX

PX
C7804
SCD1U16V2KX-L-GP

FBA_WCK01
FBA_WCK01#
FBA_WCK23
FBA_WCK23#
FBA_WCK45
FBA_WCK45#
FBA_WCK67
FBA_WCK67#

FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#

C7803

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

D24
D25
N22
M22

C7802

SCD1U16V2KX-L-GP

FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#

1D5V_VGA_S0

2 60D4R2F-GP
2 60D4R2F-GP

DY R7822 1
DY R7823 1

FBA_DEBUG0
FBA_DEBUG1

F22
J22

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

1D5V_VGA_S0

SCD1U16V2KX-L-GP

FBA_DEBUG0
FBA_DEBUG1

1D5V_VGA_S0

FBA_DEBUG0
FBA_DEBUG1

1D5V_VGA_S0
1D5V_VGA_S0

B19

NC#B19

97mA

1D0V_VGA_S0

100nF(X7R)
K0402 3

PX

30ohm@100MHz ESR=0.01

L7801
1

FB_PLLA_DLLA_VDD

P22

PX

C7825

PX

PX

1
C7824

PX

SCD1U16V2KX-L-GP

C7823

SCD1U16V2KX-L-GP

FB_VREF_PROBE

H22

GF117

MPZ1608S300AT-GP
SCD1U16V2KX-L-GP

FB_DLLAVDD

F16

FB_PLLAVDD_1

FB_PLLAVDD

D23

FBA_CMD10
FBA_CMD10

RN7817

1D5V_VGA_S01D5V_VGA_S0

NC

FB_PLLAVDD_2

FB_VREF

1
2

RN7809
PXSRN100J-3-GP

FBA_CMD14
FBA_CMD14

4
3

1D5V_VGA_S0
1
2

FBA_CMD8
FBA_CMD8

GF117/GF119
GK208

NC

FBA_CMD7
FBA_CMD7

FBA_CMD4
FBA_CMD4

SRN100J-3-GP
RN7810 SRN100J-3-GP
4
3

1
2

1D5V_VGA_S0

1D5V_VGA_S0

4
3

PXRN7807

81,82
82
81
81,82
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
83,84
84
83
83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,82,83,84
81,83
81,82,83,84
81,82,83,84
82,84

SRN100J-3-GP
4
3

RN7816
SRN100J-3-GP

FBA_CMD5
FBA_CMD5

SCD1U16V2KX-L-GP

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

C27
C26
E24
F24
D27
D26
F25
F26
F23
G22
G23
G24
F27
G25
G27
G26
M24
M23
K24
K23
M27
M26
M25
K26
K22
J23
J25
J24
K27
K25
J27
J26

RN7815

1
2

PX

1D5V_VGA_S0

1
2

1D5V_VGA_S0

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

1
2

1D5V_VGA_S0

4
3

PX

FBA_CMD30
FBA_CMD30

4
3

PX

PXRN7805

GF119

TP7801

PX
FBA_CMD13
FBA_CMD13

1D5V_VGA_S0

1D5V_VGA_S0
FBA_CMD21
FBA_CMD21

1
2

FBA_CMD25
FBA_CMD25

SRN100J-3-GP
4
3

1
2

1D5V_VGA_S0

RN7814
SRN100J-3-GP

SRN100J-3-GP

PX RN7806

SRN100J-3-GP
4
3

1D5V_VGA_S0

PXRN7803
FBA_CMD26
FBA_CMD26

1
2

PX

PX
FBA_CMD15
FBA_CMD15

PX RN7813

FBA_CMD24
FBA_CMD24

RN7802
SRN100J-3-GP

E19
C15
B16
B22
R25
W23
AB26
T26

FB_CLAMP

GF119

SCD1U16V2KX-L-GP

FBA_DQS0
FBA_DQS1
FBA_DQS2
FBA_DQS3
FBA_DQS4
FBA_DQS5
FBA_DQS6
FBA_DQS7

NC

FBA_CMD27
FBA_CMD27

1D5V_VGA_S0

81,82
81,82
81,82
81,82
83,84
83,84
83,84
83,84
81,82
81,82
81,82
81,82
83,84
83,84
83,84
83,84

D19
D14
C17
C22
P24
W24
AA25
U25

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

2/14 FBA

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

SCD1U16V2KX-L-GP

81,82
81,82
81,82
81,82
83,84
83,84
83,84
83,84

E18
F18
E16
F17
D20
D21
F20
E21
E15
D15
F15
F13
C13
B13
E13
D13
B15
C16
A13
A15
B18
A18
A19
C19
B24
C23
A25
A24
A21
B21
C20
C21
R22
R24
T22
R23
N25
N26
N23
N24
V23
V22
T23
U22
Y24
AA24
Y22
AA23
AD27
AB25
AD26
AC25
AA27
AA26
W26
Y25
R26
T25
N27
R27
V26
V27
W27
W25

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

1D5V_VGA_S0

1D5V_VGA_S0

81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
81,82
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84
83,84

SRN100J-3-GP
4
3

RN7801

1
2

C7826
SC22U6D3V5MX-L3-GP

22uF(X5R)
K0805 1

Under GPU

Near GPU

N16S-GM-S-A2-GP

PX

FBCLK Termination placed near each VRAM

at board edge side

FBA_CMD19
FBA_CMD16
FBA_CMD0
FBA_CMD3
FBA_CMD20

FBA_CLK0

PX
1

PX
1

PX
1

PX
1

PX

PX

R7805
162R2F-GP

PX

FBA_CLK1#

R7808
R7809
R7810
R7811
R7812
10KR2F-L1-GP10KR2F-L1-GP10KR2F-L1-GP10KR2F-L1-GP10KR2F-L1-GP

R7804
162R2F-GP
2

FBA_CLK1

Memory ODTx, CKEx and RST Termination

FBA_CLK0#

Brook_SLU

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

CHECK N16 Design guide P.98 Table 6-7

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GPU (VRAM I/F)

Size
A2
Date:
5

Document Number

Rev

Brook_SLU

Monday, July 06, 2015

Sheet

1M
78

of

105

47uF(X5R)
1

PX

1
2

VIDEO_CLK_XTAL_SS

SRN1K8J-GP

3D3V_AON_S0

GPIO16
GPIO20
GPIO21

GK208
GPIO16
GPIO20
GPIO8

GPIO8

4
3

GF117

HASONIC

82.30034.A61

HARMONY

82.30034.351

NC

NC

1
R7912

86

DGPUHOT#
VGA_CORE_PSI_R

1 R7916

VGA_CORE_VID

DGPUHOT# 44

VGA_CORE_PSI

20150226 SC Jack

85
Q7904
1 R7928

24 DGPUHOT

DGPUHOT_R

E9

1 R7947

SYS_PEX_RST_MON#

4
3

3D3V_7905

3D3V_S0

PX

C7933
SC15P50V2JN-L-GP

2nd = 84.2N702.031
3rd = 84.2N702.W31
6,86 GC6_FB_EN

DY

3D3V_AON_S0

20150226 SC Jack

GC6_FB_EN

0R0402-PAD-1-GP

GPIO0_GFX

R7960
10KR2F-L1-GP

GC6_20
2

PX
Q7903

SMBC_THERM_NV

18,24 SML1_DATA

PX

84.2N702.J31

1 R7959

1
2

Q7907
2

C7935
SC15P50V2JN-L-GP

DGPUHOT#

27MHZ_OUT_R

82.30034.351
2nd = 82.30034.A61

2N7002K-2-GP

R7950
10KR2F-L1-GP

GC6_20
1

XTAL-27MHZ-46-GP

DGPU_HOLD_RST#
VRAM_VREF_CTL

84.2N702.A3F
2nd = 75.00601.07C

2N7002KDW-GP

PX

0R0402-PAD-1-GP

SRN10KJ-L-GP

VGA_RST#GC6

GPU_PEX_RST_HOLD#

RN7912

GPU_PEX_RST_HOLD#

PX

85

2
2

27MHZ_OUT
R7913
1KR2F-L1-GP

X7901

2
1MR2J-L3-GP

PX

27MHZ_IN

GC6_20

DY

3
4
SRN10KJ-L-GP

Q7905
VGA_RST#GC6

B10

GPIO5_GC6_PWR_EN

D5
E6
C4

CEC

DGPU_HOLD_RST#

C10 XTAL_OUTBUFF

N16S-GM-S-A2-GP

THERM_OVER#
VGA_GPIO9
VRAM_VREF_CTL

GC6_20

6,22,76 DGPU_HOLD_RST#

XTAL_OUT

RN7915
2
1

XTAL_OUTBUFF
VIDEO_CLK_XTAL_SS

0R0402-PAD-1-GP

PX

XTAL_OUTBUFF

XTAL_IN

PX

N16S-GM-S-A2-GP

SMBC_THERM_NV
SMBD_THERM_NV

GF117/GM108

PX

0R0402-PAD-1-GP

GPIO16
GPIO20
GPIO21

NC

GF119/GK208

XTAL_SSIN

C11

GPIO0_GFX
GPIO6_GFX

GF119

NC
NC
NC

A10

PLLVDD

VID_PLLVDD

GM108

1
2

1
2

50ohm TRACE

Crystal 27MHz

0825-Anthony
C6
B2
D6
C7
F9
A3
A4
B6
A6
F8
C5
E7
D7
B4

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13

GK208
GM108
OVERT
OVERT

RN7901
SRN2K2J-5-GP

0825-Anthony

SRN1K8J-GP
RN7903
2
3
1
4

I2CB_SCL
I2CB_SDA

CORE_PLLVDD
SP_PLLVDD

N6

Under GPU

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#

PX

C9
C8

I2CB_SCL
I2CB_SDA

9/14 XTAL_PLL

L6
M6

PX

9 OF 14

GPU1M

PX

R7907
10KR2F-L1-GP
2

THERMDP

C7938

AE5
AD6
AE6
AF6
JTAG_TRST# AG4

NC
NC

PX

F12

I2CC_SCL
I2CC_SDA

GF117

THERMDN

Near GPU

SMBC_THERM_NV
SMBD_THERM_NV
RN7902
1
4
2
3

C7937

I2CC_SCL
I2CC_SDA
E12

1
2
3
4

2
1
A9
B9

C7932

PX

SCD1U16V2KX-L-GP

20150226 SC Jack
D9
D8

I2CS_SCL
I2CS_SDA

PX

C7934

SC10U6D3V3MX-L-GP

8 OF 14

PX

8/14 MISC1

100nF(X7R)
K0402 2
SP_VID_PLLVDD

SC22U6D3V5MX-L3-GP

GPU1N
D

0826-Anthony

PX

10uF(X5R)
K0805 1

SCD1U16V2KX-L-GP

RN7905
SRN10KJ-6-GP

PX

L7903
PX
MHC1608S301NBP-GPM0805
2

68.00335.161
2nd = 68.00214.391
3rd = 68.00206.171

8
7
6
5

3
4

1D0V_VGA_S0

RN7911
SRN100KJ-6-GP

Near GPU

112mA

3D3V_AON_S0

SML1_CLK 18,24

SMBD_THERM_NV

2N7002KDW-GP

84.2N702.A3F
2nd = 75.00601.07C

3D3V_7907

2N7002KDW-GP

84.2N702.A3F
2nd = 75.00601.07C
3D3V_AON_S0
Q7906

GC6_20

G
D

GPU_EVENT# 6

GPIO6_GFX

2N7002K-2-GP
1 R7925

VGA_RST#GC6

84.2N702.J31

3D3V_AON_S0

VGA_RST# 76

2nd = 84.2N702.031
3rd = 84.2N702.W31

RN7914
1
2

0R0402-PAD-1-GP

4
3

GPIO6_GFX
VGA_RST#GC6

4.99Kohm
10Kohm
15Kohm
20Kohm
24.9Kohm
30.1Kohm
34.8Kohm
45Kohm

64.49915.6DL
64.10025.L0L
64.15025.6DL
64.20025.6DL
64.24925.6DL
64.30125.6DL
64.34825.6DL
64.45325.6DL

SRN10KJ-L-GP

GC6_20

3D3V_AON_S0

3D3V_VGA_S0

20150226 SC Jack

10 OF 14

GPU1L

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

NC FOR

DY

920

DY

920

C1

920
F6

F4
R7948
40K2R2F-GP

F5

0826-Anthony
R7939
24K9R2F-L-GP

STRAP5
BUFRST#

MULTI_STRAP_REF0_GND

920

GM108

VRAM_StrapGND

R7946
45K3R2F-L-GP

PX

ROM_SI
ROM_SO
ROM_SCLK

R7938
4K99R2F-L-GP

920
2

B12
A12
C12

R7937
4K99R2F-L-GP

VRAM_StrapVCC

D1
D2
E4
E3
D3

ROM_SI
ROM_SO
ROM_SCLK

D12

1
R7945
4K99R2F-L-GP

R7944
10KR2F-L1-GP

1
R7952
34K8R2F-1-GP
2

R7951
10KR2F-L1-GP
2

ROM_CS#

2
1

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

R7936
2KR2F-L1-GP

VMON_IN0
VMON_IN1

MULTI_STRAP_REF0_GND

MULTI_STRAP_REF1_GND

GF117
GK208
GM108
NC

NC
GF117
GK208
GM108

PGOOD
GF119

R7940
4K99R2F-L-GP

R7941
4K99R2F-L-GP

940

940
2

DY

DY

920

DY

E10
F10

R7934
10KR2F-L1-GP

1
R7935
10KR2F-L1-GP
2

R7933
10KR2F-L1-GP
2

R7932
10KR2F-L1-GP

940/920
2

10/14 MISC2

R7931
49K9R2F-L-GP

D11
D10

0822-Anthony

GPIO8
MULTI_STRAP_REF2_GND

NC

R7953
3D3V_AON_S0

MULTI_STRAP_REF0_GND

10KR2F-L1-GP

N16S-GM-S-A2-GP
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

PX

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GPU (GPIO/STRAP)
Size
A2
Date:
5

Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

79

of

105

1V_VGA_CORE_S0
GPU1E

PX

11 OF 14

PX

C8007

C8008

C8003

PX

C8002

PX

C8006

1
2

1
2

1
2

PX

SC4D7U6D3V3KX-L-GP

C8005

SC4D7U6D3V3KX-L-GP

PX

SC4D7U6D3V3KX-L-GP

Under GPU

C8004

SC4D7U6D3V3KX-L-GP

PX

SC4D7U6D3V3KX-L-GP

C8017

SC4D7U6D3V3KX-L-GP

PX

SC4D7U6D3V3KX-L-GP

C8013

SC4D7U6D3V3KX-L-GP

PX

SC4D7U6D3V3KX-L-GP

C8010
SC4D7U6D3V3KX-L-GP

4.7uF(X5R)
K0603 10

11/14 NVVDD

PX

K10
K12
K14
K16
K18
L11
L13
L15
L17
M10
M12
M14
M16
M18
N11
N13
N15
N17
P10
P12
P14
P16
P18
R11
R13
R15
R17
T10
T12
T14
T16
T18
U11
U13
U15
U17
V10
V12
V14
V16
V18

PX

2
1

1
2

1
2

PX

PX

PX

C8037

PX
2

1
2

1
2

C8016

C8035
SC4D7U6D3V3KX-L-GP

PX

C8036
SC4D7U6D3V3KX-L-GP

Under GPU

C8015

PX

SC1U10V2KX-L1-GP

PX

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

C8014

SC1U10V2KX-L1-GP

1uF(X5R)
K0402 4

PX

C8011
SC4D7U6D3V3KX-L-GP

PX

Near GPU

C8012
SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

4.7uF(X5R)
K0805 5

C8009

VDD_001
VDD_002
VDD_003
VDD_004
VDD_005
VDD_006
VDD_007
VDD_008
VDD_009
VDD_010
VDD_011
VDD_012
VDD_013
VDD_014
VDD_015
VDD_016
VDD_017
VDD_018
VDD_019
VDD_020
VDD_021
VDD_022
VDD_023
VDD_024
VDD_025
VDD_026
VDD_027
VDD_028
VDD_029
VDD_030
VDD_031
VDD_032
VDD_033
VDD_034
VDD_035
VDD_036
VDD_037
VDD_038
VDD_039
VDD_040
VDD_041

GPU1F

N16S-GM-S-A2-GP

PX

C8038

C8039
2

1
2

C8033

PX

SC22U6D3V5MX-L3-GP

C8026

PX

SC22U6D3V5MX-L3-GP

C8023

PX

SC22U6D3V5MX-L3-GP

Near GPU

PX

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

C8019

SC22U6D3V5MX-L3-GP

C8018

PX

SC22U6D3V5MX-L3-GP

22uF(X5R)
M0805 1

Power current=26A
PX

Power current=60mA

G8
G9
G10
G12

PX

Under GPU

GND_001
GND_005
GND_006
GND_007
GND_008
GND_009
GND_010
GND_011
GND_012
GND_013
GND_014
GND_002
GND_015
GND_016
GND_017
GND_018
GND_019
GND_020
GND_021
GND_022
GND_023
GND_024
GND_003
GND_025
GND_026
GND_027
GND_028
GND_029
GND_030
GND_031
GND_032
GND_033
GND_034
GND_004
GND_035
GND_036
GND_037
GND_038
GND_039
GND_040
GND_041
GND_042
GND_043
GND_044
GND_045
GND_046
GND_047
GND_048
GND_049
GND_050
GND_051
GND_052
GND_053
GND_054
GND_055
GND_056
GND_057
GND_058
GND_059
GND_060
GND_061
GND_062
GND_063
GND_064
GND_065
GND_066
GND_067
GND_068
GND_069
GND_070

M13
M15
M17
N10
N12
N14
N16
N18
P11
P13
P15
P17
P2
P23
P26
P5
R10
R12
R14
R16
R18
T11
T13
T15
T17
U10
U12
U14
U16
U18
U2
U23
U26
U5
V11
V13
V15
V17
Y2
Y23
Y26
Y5

GND_071
GND_072
GND_073
GND_074
GND_075
GND_076
GND_077
GND_078
GND_079
GND_080
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095
GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112

AA7
AB7

GND_F
GND_H

12/14 FBVDDQ

PX

B26
C25
E23
E26
F14
F21
G13
G14
G15
G16
G18
G19
G20
G21
L22
L24
L26
M21
N21
R21
T21
V21
W21

Near GPU

3D3V_AON_S0

C8024

12 OF 14

GPU1D
C8022

PX

C8025
SC1U10V2KX-L1-GP

PX

SCD1U16V2KX-L-GP

* nc on substrate

NC#G1
NC#G2
NC#G3
NC#G4
NC#G5
NC#G6
NC#G7

C8042
SC4D7U6D3V3KX-L-GP

POWER CHANNELS

PX

Near GPU

N16S-GM-S-A2-GP

FBVDDQ_01
FBVDDQ_02
FBVDDQ_03
FBVDDQ_04
FBVDDQ_05
FBVDDQ_06
FBVDDQ_07
FBVDDQ_08
FBVDDQ_09
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27

GF117
GF119
GK208

0.1uF(X7R)
K0402 1

Power current=1.37A

1D5V_VGA_S0

H24
H26
J21
K21

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18

C8030

1uF(X7R)
K0603 2

PX

C8031

C8032

PX
1D5V_VGA_S0

Under GPU

CHECK N16 Design guide P.96 6.1.7 GPU Driver Calibration

4.7uF(X5R)
K0603 2

FB_CAL_PD_VDDQ

C8034

FB_CAL_TERM_GND

PX

FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

PX

1
R8001

2
40D2R2F-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

N16S-GM-S-A2-GP

PX

Near GPU

10uF(X5R)
M0805 1

PX
R8002

42D2R2F-GP
2
1

SC22U6D3V5MX-L3-GP

SC10U25V5KX-L-GP

PX

C8040

FB_CAL_PU_GND

D22

51D1R2F-GP
2
1

0.1uF(X7R)
K0402 2

PX

C8029

PX

SC4D7U6D3V3KX-L-GP

PX

SC4D7U6D3V3KX-L-GP

PX

C8028

SC1U10V2KX-L1-GP

N16S-GM-S-A2-GP

C8027

SC1U10V2KX-L1-GP

PX

SCD1U16V2KX-L-GP

NC#W1
NC#W2
NC#W3
NC#W4

NC#V1
NC#V2

SCD1U16V2KX-L-GP

W1
W2
W3
W4

1uF(X5R)
K0402 1

NC#V5
NC#V6

CONFIGURABLE

V1
V2

3D3V_VGA_S0

3V3AUX

G1
G2
G3
G4
G5
G6
G7

Under GPU

V5
V6

VDD33_1
VDD33_2
VDD33_3
VDD33_4

PX

C8021
2

2
1GPU_NC_F11 F11

GM108

3V3_AON
3V3_AON

TP8001

NC#AD10
NC#AD7

1uF(X5R)
K0603 1

SC1U10V2KX-L1-GP

14/14 XVDD/VDD33

AD10
AD7

C8020

SCD1U16V2KX-L-GP

PX

14 OF 14

GPU1C

SCD1U16V2KX-L-GP

SC4D7U6D3V3KX-L-GP

C8041

0.1uF(X7R)
K0402 2

13 OF 14

PX

13/14 GND

A2
AB17
AB20
AB24
AC2
AC22
AC26
AC5
AC8
AD12
AD13
A26
AD15
AD16
AD18
AD19
AD21
AD22
AE11
AE14
AE17
AE20
AB11
AF1
AF11
AF14
AF17
AF20
AF23
AF5
AF8
AG2
AG26
AB14
B1
B11
B14
B17
B20
B23
B27
B5
B8
E11
E14
E17
E2
E20
E22
E25
E5
E8
H2
H23
H25
H5
K11
K13
K15
K17
L10
L12
L14
L16
L18
L2
L23
L25
L5
M11

PX

Brook_SLU

R8003

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GPU (POWER/GND)
Size
A2
Date:
5

Document Number

Rev

1M

Brook_SLU

Monday, July 06, 2015

Sheet
1

80

of

105

1D5V_VGA_S0

VRAM_A

1D5V_VGA_S0

VRAM1

VRAM_A
VRAM2

78,82,83,84 FBA_CMD29
78,82,83,84 FBA_CMD13
78,83 FBA_CMD27

VRAM_A

VRAM_A
C8107

R8105
1K33R2F-GP

CKE
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML
WE#
CAS#
RAS#

VRAM3_VREFD

VRAM_A
C8117

B1
B9
D1
D8
E2
E8
F9
G1
G9

VRAM3_VREFC

VRAM_A
C8119

H5TC4G63AFR-11C-GP

72.05463.D0U

FOR VRAM2

VRAM_A
1

VRAM_A

VRAM_A
C8111

VRAM_A
C8112

VRAM_A
C8113

VRAM_A
C8114
SC1U10V2KX-L1-GP

C8110

C8106

C8105

VRAM_A

L3
K3
J3

CK
CK#

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

SC1U10V2KX-L1-GP

D3
E7

L9
L1
J9
J1

SC1U10V2KX-L1-GP

C8104

K9

SCD1U16V2KX-L-GP

VRAM_A

78,82,83,84 FBA_CMD28
78,82,83,84 FBA_CMD15
78,82,83,84 FBA_CMD11

J7
K7

SCD1U16V2KX-L-GP

C8103

SC1U10V2KX-L1-GP

VRAM_A

SC1U10V2KX-L1-GP

C8101

SCD1U16V2KX-L-GP

VRAM_A

BA0
BA1
BA2

1D5V_VGA_S0

FOR VRAM1
SC1U10V2KX-L1-GP

C8109

SCD1U16V2KX-L-GP

1D5V_VGA_S0

VRAM_A
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

C8115

VRAM_A

78,82 FBA_CMD3
78,82 FBA_DQM3
78,82 FBA_DQM0

VRAM3_VREFC

VRAM_A

78,82 FBA_CLK0
78,82 FBA_CLK0#

FBA_CMD2 78
FBA_CMD20 78,82,83,84

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1D5V_VGA_S0

R8106
1K33R2F-GP

82 VRAM3_VREFC

M2
N8
M3

FBA_CMD0 78,82

L2
T2

C8102

K1

SCD01U50V2KX-L-GP

B1
B9
D1
D8
E2
E8
F9
G1
G9

VRAM_A

NC#L9
NC#L1
NC#J9
NC#J1

FBA_DQS0 78,82
FBA_DQSN0 78,82

R8103
1K33R2F-GP

VRAM_A

CS#
RESET#

FBA_DQS3 78,82
FBA_DQSN3 78,82

F3
G3

VRAM3_VREFD

82 VRAM3_VREFD

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

ODT
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7

78,82
78,82
78,82
78,82
78,82
78,82
78,82
78,82

R8102
1K33R2F-GP

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

C7
B7

1
L9
L1
J9
J1

VRAM_A

FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14

78,82
78,82
78,82
78,82
78,82
78,82
78,82
78,82

FBA_D31
FBA_D25
FBA_D30
FBA_D24
FBA_D29
FBA_D27
FBA_D28
FBA_D26

78,82,83,84
R8104
78,82,83,84
243R2F-L1-GP
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84

D7
C3
C8
C2
A7
A2
B8
A3

VRAM_A

1D5V_VGA_S0

72.05463.D0U

1D5V_VGA_S0

DQSL
DQSL#

FBA_D5
FBA_D1
FBA_D7
FBA_D0
FBA_D4
FBA_D3
FBA_D6
FBA_D2

FBA_CMD2 78
FBA_CMD20 78,82,83,84

L2
T2

1D5V_VGA_S0

DQSU
DQSU#

VREFDQ
VREFCA
ZQ

FBA_CMD0 78,82

H5TC4G63AFR-11C-GP

1D5V_VGA_S0

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

E3
F7
F2
F8
H3
H8
G2
H7

SCD01U50V2KX-L-GP

WE#
CAS#
RAS#

H1
M8
L8

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

K1

SCD01U50V2KX-L-GP

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML

L3
K3
J3

78,82,83,84 FBA_CMD28
78,82,83,84 FBA_CMD15
78,82,83,84 FBA_CMD11

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CKE

D3
E7

78,82 FBA_DQM2
78,82 FBA_DQM1

NC#L9
NC#L1
NC#J9
NC#J1

CK
CK#

K9

78,82 FBA_CMD3

CS#
RESET#

BA0
BA1
BA2

J7
K7

78,82 FBA_CLK0
78,82 FBA_CLK0#

VRAM3_VREFD
VRAM3_VREFC
VRAM_ZQ4

FBA_DQS1 78,82
FBA_DQSN1 78,82

SCD01U50V2KX-L-GP

M2
N8
M3

78,82,83,84 FBA_CMD29
78,82,83,84 FBA_CMD13
78,83 FBA_CMD27

F3
G3

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7

FBA_DQS2 78,82
FBA_DQSN2 78,82

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14

A1
A8
C1
C9
D2
E9
F1
H2
H9

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

ODT

C7
B7

78,82
78,82
78,82
78,82
78,82
78,82
78,82
78,82

78,82,83,84
R8101
78,82,83,84
243R2F-L1-GP 78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84
78,82,83,84

DQSL
DQSL#

FBA_D17
FBA_D22
FBA_D16
FBA_D23
FBA_D19
FBA_D21
FBA_D18
FBA_D20

2
1
C

VRAM_A

DQSU
DQSU#

VREFDQ
VREFCA
ZQ

D7
C3
C8
C2
A7
A2
B8
A3

H1
M8
L8

VRAM3_VREFD
VRAM3_VREFC
VRAM_ZQ3

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

FBA_D11 78,82
FBA_D13 78,82
FBA_D8 78,82
FBA_D15 78,82
FBA_D10 78,82
FBA_D14 78,82
FBA_D9 78,82
FBA_D12 78,82

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

E3
F7
F2
F8
H3
H8
G2
H7

B2
D9
G7
K2
K8
N1
N9
R1
R9

1D5V_VGA_S0

VRAM_A

VRAM_A

C8118

Wistron Corporation

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

C8116

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom
Date:

GPU-VRA1,2 (1/4)

Document Number

Brook_SLU
Monday, July 06, 2015

Sheet
1

Rev

1M
81

of

105

1D5V_VGA_S0
1D5V_VGA_S0

DY_VRAM_B

DY_VRAM_B

VRAM4

VRAM3

A1
A8
C1
C9
D2
E9
F1
H2
H9
81 VRAM3_VREFD
81 VRAM3_VREFC

H1
M8
L8

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQSU
DQSU#

VREFDQ
VREFCA
ZQ

DQSL
DQSL#

VRAM_ZQ2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

DY_VRAM_B 78,81,83,84 FBA_CMD9

R8204
1

243R2F-L1-GP

78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84

FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12

M2
N8
M3

78,81,83,84 FBA_CMD29
78,81,83,84 FBA_CMD6
78,84 FBA_CMD30

J7
K7

78,81 FBA_CLK0
78,81 FBA_CLK0#

K9

78,81 FBA_CMD3

D3
E7

78,81 FBA_DQM2
78,81 FBA_DQM1

L3
K3
J3

78,81,83,84 FBA_CMD25
78,81,83,84 FBA_CMD15
78,81,83,84 FBA_CMD11

ODT
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7

CS#
RESET#

NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BA0
BA1
BA2
CK
CK#
CKE

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML
WE#
CAS#
RAS#

E3
F7
F2
F8
H3
H8
G2
H7

FBA_D13 78,81
FBA_D11 78,81
FBA_D15 78,81
FBA_D8 78,81
FBA_D12 78,81
FBA_D9 78,81
FBA_D14 78,81
FBA_D10 78,81

D7
C3
C8
C2
A7
A2
B8
A3

FBA_D22
FBA_D17
FBA_D23
FBA_D16
FBA_D20
FBA_D18
FBA_D21
FBA_D19

C7
B7
F3
G3

A1
A8
C1
C9
D2
E9
F1
H2
H9

78,81
78,81
78,81
78,81
78,81
78,81
78,81
78,81

FBA_DQS2 78,81
FBA_DQSN2 78,81

81 VRAM3_VREFD
81 VRAM3_VREFC

FBA_DQS1 78,81
FBA_DQSN1 78,81

K1

VRAM_ZQ1

DY_VRAM_B
78,81,83,84 FBA_CMD9
R8206

FBA_CMD0 78,81

L2
T2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

H1
M8
L8

DQSU
DQSU#

VREFDQ
VREFCA
ZQ

DQSL
DQSL#

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

FBA_CMD1 78
FBA_CMD20 78,81,83,84

B2
D9
G7
K2
K8
N1
N9
R1
R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

L9
L1
J9
J1
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

78,81,83,84
243R2F-L1-GP
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84
78,81,83,84

FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12

78,81,83,84 FBA_CMD29
78,81,83,84 FBA_CMD6
78,84 FBA_CMD30
78,81 FBA_CLK0
78,81 FBA_CLK0#
78,81 FBA_CMD3

B1
B9
D1
D8
E2
E8
F9
G1
G9

78,81 FBA_DQM3
78,81 FBA_DQM0
78,81,83,84 FBA_CMD25
78,81,83,84 FBA_CMD15
78,81,83,84 FBA_CMD11

ODT

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7

M2
N8
M3

CS#
RESET#

NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BA0
BA1
BA2

J7
K7

CK
CK#

K9

CKE

D3
E7

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML

L3
K3
J3

WE#
CAS#
RAS#

E3
F7
F2
F8
H3
H8
G2
H7

FBA_D1
FBA_D5
FBA_D0
FBA_D7
FBA_D2
FBA_D6
FBA_D3
FBA_D4

D7
C3
C8
C2
A7
A2
B8
A3

78,81
78,81
78,81
78,81
78,81
78,81
78,81
78,81

FBA_D25
FBA_D31
FBA_D24
FBA_D30
FBA_D26
FBA_D28
FBA_D27
FBA_D29

C7
B7

78,81
78,81
78,81
78,81
78,81
78,81
78,81
78,81

FBA_DQS3 78,81
FBA_DQSN3 78,81

F3
G3

FBA_DQS0 78,81
FBA_DQSN0 78,81

K1

FBA_CMD0 78,81

L2
T2

FBA_CMD1 78
FBA_CMD20 78,81,83,84

L9
L1
J9
J1

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9

H5TC4G63AFR-11C-GP
H5TC4G63AFR-11C-GP

72.05463.D0U

1
2

1
2

1
2

1
2

1
2

1
2

2
1

SC1U10V2KX-L1-GP

DY_VRAM_B

Brook_SLU

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

C8216

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom
Date:

SC1U10V2KX-L1-GP

C8211

SC1U10V2KX-L1-GP

C8210

SCD1U16V2KX-L-GP

FOR VRAM4

1D5V_VGA_S0

C8217

DY_VRAM_B
DY_VRAM_B
DY_VRAM_BDY_VRAM_B DY_VRAM_B
C8212
C8213
C8214
SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

C8203
SCD1U16V2KX-L-GP

DY_VRAM_B

1D5V_VGA_S0

FOR VRAM3

DY_VRAM_B
DY_VRAM_B
DY_VRAM_BDY_VRAM_B DY_VRAM_B
C8204
C8205
C8206
C8201
SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

1D5V_VGA_S0

C8209

DY_VRAM_B

C8215

DY_VRAM_B

1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

72.05463.D0U

GPU-VRAM3,4 (2/4)

Document Number

Brook_SLU

Monday, July 06, 2015

Sheet
1

Rev

1M
82

of

105

VRAM5

D3
E7
L3
K3
J3

78,81,82,84 FBA_CMD28
78,81,82,84 FBA_CMD15
78,81,82,84 FBA_CMD11

R8304
243R2F-L1-GP

FBA_CMD18 78
FBA_CMD20 78,81,82,84
1D5V_VGA_S0

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BA0
BA1
BA2
CK
CK#
CKE

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML
WE#
CAS#
RAS#

L9
L1
J9
J1

NC#L9
NC#L1
NC#J9
NC#J1

VRAM_A

R8302
1K33R2F-GP

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

84 VRAM7_VREFD

VRAM7_VREFD

VRAM_A
VRAM_A

R8303
1K33R2F-GP

78,84 FBA_CMD19
R8323
1K33R2F-GP

84 VRAM7_VREFC

VRAM7_VREFC

VREFDQ
VREFCA
ZQ

DQSL
DQSL#

78,84 FBA_DQM6
78,84 FBA_DQM5

ODT

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7

M2
N8
M3

CS#
RESET#

NC#L9
NC#L1
NC#J9
NC#J1

J7
K7

CK
CK#

K9

CKE

D3
E7

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML

2
2

L3
K3
J3

WE#
CAS#
RAS#

78,84
78,84
78,84
78,84
78,84
78,84
78,84
78,84

FBA_DQS6 78,84
FBA_DQSN6 78,84

F3
G3

FBA_DQS5 78,84
FBA_DQSN5 78,84

K1

FBA_CMD16 78,84

L2
T2

FBA_CMD18 78
FBA_CMD20 78,81,82,84

L9
L1
J9
J1
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9

VRAM7_VREFD

VRAM_A
C8317

H5TC4G63AFR-11C-GP

72.05463.D0U

VRAM7_VREFC

1D5V_VGA_S0

FOR VRAM5

FOR VRAM6

VRAM_A

VRAM_A

Brook_SLU

1
2

1
2

C8314

C8327

VRAM_A

VRAM_A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

1
2

1
2

1
2

1
2

1
2

1
2

1
2

VRAM_A

VRAM_A

C8313

VRAM_A

SC1U10V2KX-L1-GP

VRAM_A

C8312

SC1U10V2KX-L1-GP

VRAM_A

C8311

SC1U10V2KX-L1-GP

VRAM_A

C8310

SCD1U16V2KX-L-GP

VRAM_A

C8305
SCD1U16V2KX-L-GP

1D5V_VGA_S0

C8304

SC1U10V2KX-L1-GP

1D5V_VGA_S0

C8303

SC1U10V2KX-L1-GP

VRAM_A

C8302

SC1U10V2KX-L1-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

VRAM_A

C8301

SCD1U16V2KX-L-GP

C8309

SCD1U16V2KX-L-GP

1D5V_VGA_S0

C8315

Wistron Corporation

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

VRAM_A

C8319
2

C8316
2

FBA_D52
FBA_D50
FBA_D55
FBA_D51
FBA_D53
FBA_D48
FBA_D54
FBA_D49

SCD01U50V2KX-L-GP

SCD01U50V2KX-L-GP

VRAM_A

78,81,82,84 FBA_CMD28
78,81,82,84 FBA_CMD15
78,81,82,84 FBA_CMD11

C7
B7

78,84
78,84
78,84
78,84
78,84
78,84
78,84
78,84

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BA0
BA1
BA2

C8322

1K33R2F-GP

72.05463.D0U

78,84 FBA_CLK1
78,84 FBA_CLK1#

VRAM_A

H5TC4G63AFR-11C-GP

1D5V_VGA_S0

FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14

78,81,82,84 FBA_CMD29
78,81,82,84 FBA_CMD13
78,81 FBA_CMD27

VRAM_A
R8324

1D5V_VGA_S0

78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84

C8318
SCD01U50V2KX-L-GP

1D5V_VGA_S0

B1
B9
D1
D8
E2
E8
F9
G1
G9

DQSU
DQSU#

D7
C3
C8
C2
A7
A2
B8
A3

FBA_D44
FBA_D43
FBA_D45
FBA_D40
FBA_D47
FBA_D42
FBA_D46
FBA_D41

SCD01U50V2KX-L-GP

78,84 FBA_DQM7
78,84 FBA_DQM4

VRAM_A

L2
T2

H1
M8
L8

E3
F7
F2
F8
H3
H8
G2
H7

78,84 FBA_CMD19

FBA_CMD16 78,84

K9

K1

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

J7
K7

78,84 FBA_CLK1
78,84 FBA_CLK1#

CS#
RESET#

FBA_DQS4 78,84
FBA_DQSN4 78,84

M2
N8
M3

78,81,82,84 FBA_CMD29
78,81,82,84 FBA_CMD13
78,81 FBA_CMD27

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7

VRAM7_VREFD
VRAM7_VREFC
VRAM_ZQ8

FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14

ODT

FBA_DQS7 78,84
FBA_DQSN7 78,84

F3
G3

1
C

R8301
78,81,82,84
243R2F-L1-GP
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84
78,81,82,84

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

C7
B7

A1
A8
C1
C9
D2
E9
F1
H2
H9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQSL
DQSL#

78,84
78,84
78,84
78,84
78,84
78,84
78,84
78,84

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VREFDQ
VREFCA
ZQ

FBA_D59
FBA_D62
FBA_D58
FBA_D63
FBA_D57
FBA_D60
FBA_D56
FBA_D61

VRAM6
B2
D9
G7
K2
K8
N1
N9
R1
R9

DQSU
DQSU#

D7
C3
C8
C2
A7
A2
B8
A3

78,84
78,84
78,84
78,84
78,84
78,84
78,84
78,84

H1
M8
L8

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

FBA_D34
FBA_D38
FBA_D35
FBA_D39
FBA_D32
FBA_D36
FBA_D33
FBA_D37

A1
A8
C1
C9
D2
E9
F1
H2
H9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VRAM_A

1D5V_VGA_S0
E3
F7
F2
F8
H3
H8
G2
H7

B2
D9
G7
K2
K8
N1
N9
R1
R9

VRAM_A

VRAM_A

1D5V_VGA_S0

VRAM7_VREFD
VRAM7_VREFC
VRAM_ZQ7

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM_A

Size
Custom
Date:

GPU-VRAM7,8 (4/4)

Document Number

Rev

1M

Brook_SLU
Monday, July 06, 2015

Sheet

83
1

of

105

H1
M8
L8

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQSU
DQSU#

VREFDQ
VREFCA
ZQ

DQSL
DQSL#

243R2F-L1-GP
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12

M2
N8
M3

78,81,82,83 FBA_CMD29
78,81,82,83 FBA_CMD6
78,82 FBA_CMD30

J7
K7

78,83 FBA_CLK1
78,83 FBA_CLK1#

K9

78,83 FBA_CMD19

D3
E7

78,83 FBA_DQM7
78,83 FBA_DQM4

L3
K3
J3

78,81,82,83 FBA_CMD25
78,81,82,83 FBA_CMD15
78,81,82,83 FBA_CMD11

VRAM8

ODT
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7

CS#
RESET#

NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BA0
BA1
BA2
CK
CK#
CKE

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML
WE#
CAS#
RAS#

E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C7
B7

FBA_D38
FBA_D34
FBA_D39
FBA_D35
FBA_D37
FBA_D33
FBA_D36
FBA_D32

78,83
78,83
78,83
78,83
78,83
78,83
78,83
78,83

FBA_D62
FBA_D59
FBA_D63
FBA_D58
FBA_D61
FBA_D56
FBA_D60
FBA_D57

78,83
78,83
78,83
78,83
78,83
78,83
78,83
78,83

B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9

FBA_DQS7 78,83
FBA_DQSN7 78,83

F3
G3

83 VRAM7_VREFD
83 VRAM7_VREFC

FBA_DQS4 78,83
FBA_DQSN4 78,83

DY_VRAM_B
2

A1
A8
C1
C9
D2
E9
F1
H2
H9

R8401

1D5V_VGA_S0

K1

FBA_CMD16 78,83
R8402
243R2F-L1-GP

L2
T2

FBA_CMD17 78
FBA_CMD20 78,81,82,83

VRAM_ZQ5

DY_VRAM_B

VRAM7
B2
D9
G7
K2
K8
N1
N9
R1
R9

DY_VRAM_B

DY_VRAM_B

1D5V_VGA_S0

83 VRAM7_VREFD
83 VRAM7_VREFC

L9
L1
J9
J1
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83
78,81,82,83

FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12

78,81,82,83 FBA_CMD29
78,81,82,83 FBA_CMD6
78,82 FBA_CMD30
78,83 FBA_CLK1
78,83 FBA_CLK1#
78,83 FBA_CMD19

B1
B9
D1
D8
E2
E8
F9
G1
G9

78,83 FBA_DQM6
78,83 FBA_DQM5
78,81,82,83 FBA_CMD25
78,81,82,83 FBA_CMD15
78,81,82,83 FBA_CMD11

VRAM_ZQ6

H1
M8
L8
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
M2
N8
M3
J7
K7
K9
D3
E7
L3
K3
J3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

E3
F7
F2
F8
H3
H8
G2
H7

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

D7
C3
C8
C2
A7
A2
B8
A3

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C7
B7

DQSU
DQSU#

VREFDQ
VREFCA
ZQ

CKE

WE#
CAS#
RAS#

B1
B9
D1
D8
E2
E8
F9
G1
G9

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML

FBA_CMD17 78
FBA_CMD20 78,81,82,83

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CK
CK#

L9
L1
J9
J1

NC#L9
NC#L1
NC#J9
NC#J1

BA0
BA1
BA2

78,83
78,83
78,83
78,83
78,83
78,83
78,83
78,83

FBA_CMD16 78,83

L2
T2

CS#
RESET#

FBA_D50
FBA_D52
FBA_D51
FBA_D55
FBA_D49
FBA_D54
FBA_D48
FBA_D53

FBA_DQS5 78,83
FBA_DQSN5 78,83

K1

ODT
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
NC#M7

78,83
78,83
78,83
78,83
78,83
78,83
78,83
78,83

FBA_DQS6 78,83
FBA_DQSN6 78,83

F3
G3

DQSL
DQSL#

FBA_D43
FBA_D44
FBA_D40
FBA_D45
FBA_D41
FBA_D46
FBA_D42
FBA_D47

H5TC4G63AFR-11C-GP
H5TC4G63AFR-11C-GP

72.05463.D0U

72.05463.D0U
B

1
2

1
2

1
2

1
2

C8414

DY_VRAM_B

DY_VRAM_B

DY_VRAM_B

DY_VRAM_B

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

C8413

SC1U10V2KX-L1-GP

C8412

SC1U10V2KX-L1-GP

C8411

SC1U10V2KX-L1-GP

C8410

DY_VRAM_B

DY_VRAM_B

1
2

FOR VRAM8

C8406
SC1U10V2KX-L1-GP

DY_VRAM_B

C8405
SC1U10V2KX-L1-GP

DY_VRAM_B

C8404
SC1U10V2KX-L1-GP

C8403

DY_VRAM_B

DY_VRAM_B

1D5V_VGA_S0

FOR VRAM7
SCD1U16V2KX-L-GP

C8401
SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

DY_VRAM_B
C8409

SC10U6D3V3MX-L-GP

C8415

DY_VRAM_B

1D5V_VGA_S0

1D5V_VGA_S0
1D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom
Date:

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

C8417

DY_VRAM_B
C8416

Brook_SLU

DY_VRAM_B

GPU-VRAM7,8 (4/4)

Document Number

Rev

1M

Brook_SLU
Monday, July 06, 2015

Sheet
1

84

of

105

PG8502
GAP-CLOSE-PWR
1
2

PWR_DCBATOUT_VGA_CORE

PG8503
GAP-CLOSE-PWR
1
2

2
3
4
10

9
5V_S0
8
1
PR8523
2D2R3J-2-GP
2

84.00920.037

Muxless

PR8501
499KR2F-1-GP
2 PWR_VGA_CORE_TON

Muxless
13

DGPU_PWROK
3

PWR_VGA_CORE_EN

Muxless

LGATE1

PR8510
Muxless
1
2 PWR_VGA_CORE_BOOT1_1
1
2
PWR_VGA_CORE_BOOT1
0R0603-PAD-1-GP-U

20

PWR_VGA_CORE_PHASE1

19

PWR_VGA_CORE_LGATE1

8
7

PWR_VGA_CORE_REFADJ
PR8522
20KR2F-L3-GP

Muxless

VID

UGATE2

VREF

BOOT2

REFIN

PHASE2

REFADJ

LGATE2

14

1 PR8519 2 PWR_VGA_CORE_UGATE2_R
PWR_VGA_CORE_UGATE2
0R0603-PAD-1-GP-U

15

PWR_VGA_CORE_BOOT2 1 PR8511 2

16

PWR_VGA_CORE_PHASE2

PWR_VGA_CORE_SS

6
11

SS

VSNS

17

PWR_VGA_CORE_LGATE2

12

PWR_VGA_CORE_VSNS

GND

RGND

10

PWR_VGA_CORE_RGND

PC8505

21

DY

PC8516
SCD1U50V3KX-L-GP

2PWR_VGA_CORE_VREF_R
2KR2F-L1-GP

SC1000P50V3JN-GP-U
1

Muxless

OCP setting

PC8523
SC2700P50V2KX-1-GP

1
2

PWR_DCBATOUT_VGA_CORE

Muxless Muxless

0R0603-PAD-1-GP-U

PR8508

PC8512

Muxless

PWR_VGA_CORE_RGND

2
3
4
10

1
9

7
6
5

Muxless
PC8521

PC8513
SC10U25V5KX-L-GP

PWR_VGA_CORE_VID

PWR_VGA_CORE_REFIN

Muxless

Muxless

PU8505

PWR_VGA_CORE_VREF

PR8506
20KR2F-L3-GP

PHASE1

PWR_VGA_CORE_BOOT2_1

1 DY 2
PC8501
SCD1U10V2KX-L-GP

EN
PSI

Design Current
= 26A
OCP> 39A

PR8524
9K31R2F-GP

PC8511
SCD1U50V3KX-L-GP

SC10U25V5KX-L-GP

PWR_VGA_CORE_RGND

BOOT1

PWR_VGA_CORE_UGATE1

Muxless

1
DY 2
PC8503
SC1000P50V3JN-GP-U
C

PGOOD

SCD1U50V3KX-L-GP

79 VGA_CORE_PSI
1 PR8507 2
0R0402-PAD-1-GP

UGATE1

79 VGA_CORE_VID

2nd = 68.R2410.101

0R0603-PAD-1-GP-U

TON

PR8502
2D2R2F-GP
2

68.R2410.20A
1 PR8518 2PWR_VGA_CORE_UGATE1_R

Cyntec. 6.6 X 7.6 X 4.0 mm

DCR: 1 mohm
Idc : 25A , Isat : 27A

FDMS3600-02-RJK0215-COLAY-GP

84.00920.037
2nd = 84.03664.037

Muxless

PL8502
COIL-D24UH-GP
1

3rd = 84.08S36.037

20,24,86

20150616 -1M

PL8501
COIL-D24UH-GP

Muxless

3rd = 84.08S36.037

PC8507
SCD1U16V2KX-L-GP

Muxless

18

74.08812.073

PU8501
RT8812AGQW-GP

Muxless

PWR_DCBATOUT_VGA_CORE

2nd = 84.03664.037
1

PC8502
SCD1U50V3KX-L-GP
2
1PWR_VGA_CORE_TON_1

PVCC

SE47U25VM-17-GP

VGA_PVCC

DY

Cyntec. 6.6 X 7.6 X 4.0 mm

DCR: 1 mohm
Idc : 25A , Isat : 27A 1V_VGA_CORE_S0

FDMS3600-02-RJK0215-COLAY-GP

Muxless

20141022 Jack

PG8508
GAP-CLOSE-PWR
1
2

PG8507
GAP-CLOSE-PWR
1
2

7
6
5

PG8506
GAP-CLOSE-PWR
1
2

PC8520
SCD1U50V3KX-L-GP

PU8503
1

Muxless

PC8509
SC10U25V5KX-L-GP

Muxless

PG8505
GAP-CLOSE-PWR
1
2

PT8502

SC10U25V5KX-L-GP

PC8508

Muxless Muxless

PG8504
GAP-CLOSE-PWR
1
2

PG8501 PWR_DCBATOUT_VGA_CORE
GAP-CLOSE-PWR
1
2

19V_DCBATOUT

Muxless

68.R2410.20A
2nd = 68.R2410.101
1V_VGA_CORE_S0

1
PR8512
100R2F-L3-GP

Muxless

1
1
PC8519
SC22P50V2JN-L-GP

DY

1 PR8520 2

PX
DGPU_PWROK
PWR_VGA_CORE_EN

PWR_VGA_CORE_EN

PC8517

DY SC47P50V2JN-3GP

87

86 DGPU_PWR_EN

PC8525
SCD1U50V3KX-L-GP

077.53371.0031

NVGND_SENSE

PT8508
SE330U2D5VM-19-GP

077.53371.0031
2nd = 79.3371V.6CL

76
B

PR8513
100R2F-L3-GP

Muxless
2

1
2

SRN10KJ-L-GP
PR8560
0R3J-L1-GP
DY 2
1

PT8507
SE330U2D5VM-19-GP

0R0402-PAD-1-GP

4
3

1
2

76

2nd = 79.3371V.6CL

Muxless

RN8512

NVVDD_SENSE

0R0402-PAD-1-GP

20150119 SC Jack

PWR_VGA_CORE_RGND

PWR_VGA_CORE_RGND

3D3V_VGA_S0

Muxless

Muxless

1 PR8521 2
PC8522
SC47P50V2JN-3GP

SCD01U50V2KX-L-GP

PC8504

DY

Muxless

1V_VGA_CORE_S0
PR8509
18KR2F-GP

Muxless

1
DGPU_PWR_EN_D1
3
2

DY
PD8201
BAW56-5-GP

1V_VGA_CORE_S0

1
2

RN8515

4
3

PWR_VGA_CORE_VSNS
PWR_VGA_CORE_RGND

SRN100J-3-GP

PX

20150119 SC Jack

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
5

VGA_CORE
Document Number

Rev

Brook_SLU

Monday, July 06, 2015

1M
Sheet

85

of

105

RT8231 for VGA_1D5V(For VRAM GDDR3)

PWR_VGA_DCBATOUT_1D5V
19V_DCBATOUT
PG8601
GAP-CLOSE-PWR
1
2
PG8602
GAP-CLOSE-PWR
1
2

VID
Logic-High = 0.75V
Logic-Low = 0.3V
PR8601
5D1R2F-GP
2
1

5V_S5

PX

PC8601
SC1U10V2KX-L1-GP

PWR_VGA_DCBATOUT_1D5V

PX

R2

PWR_1D5V_VTTREF

PX

PC8612

PC8611

PX

PC8613

PX

PC8610

PC8614

PX
PC8605
SCD033U16V2KX-GP

PC8606
SC18P50V2JN-1-GP

DY

PR8610
20KR2F-L3-GP

1
2

PX

PC8615

VTTREF

PR8609
24K9R2F-L-GP

R1

GND

GND
3

21

20141022 Jack

SCD1U25V2KX-L-GP

1D5V_VGA_S0

PX

PX

SC22U6D3V5MX-L3-GP

PWR_VGA1D5V_FB

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37

SC22U6D3V5MX-L3-GP

PWR_VGA1D5V_VDDQ

PU8603
SM3319NSQAC-TRG-GP

SC22U6D3V5MX-L3-GP

PG8603
GAP-CLOSE-PWR
1
2

PX

SC22U6D3V5MX-L3-GP

Close to output cap pin1, not

inside of the output cap

S
S
S

VTTSNS

FB

PWR_VGA1D5V_LG

14

PX

VTT

15

1D5V_VGA_S0

68.1R01B.10K
2nd = 68.1R010.20I

SC22U6D3V5MX-L3-GP

PGND

2
5
6
7
8

PWR_VGA1D5V_PH

16

D
D
D
D

20141029 Jack

PX

PL8601
IND-1UH-94-GP-U

VLDOIN

VTTGND

Design Current : 4A
OCP : 7 A

PX

PHASE

VDDQ

PX

12

11

S3

20

PX

S5

LGATE

PWR_VGA1D5V_HG

1 PWR_VGA1D5V_VLDOIN 19

UGATE

PWR_VGA1D5V_BOOT_A 1

5
6
7
8

PWR_VGA1D5V_S3_EN 7
TP8601

17

PGOOD
TON

PC8603
SCD1U50V3KX-L-GP

3
2
1

DGPU_CORE_PWROK

PWR_VGA1D5V_BOOT

10

PWR_VGA1D5V_TON

VDD

CS

1 PR8605 2
TPAD14-OP-GP

VID

13

PWR_VGA1D5V_PG

PX

18

S
S
S

PR8608
620KR2F-GP
2
1

4
PR8603
2D2R3F-L-GP

074.08231.0073
BOOT

PC8607

3
2
1

1
2

1
2

PU8602
SM3319NSQAC-TRG-GP

084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37

PU8601
RT8231AGQW-GP

PWR_VGA_DCBATOUT_1D5V

0R0402-PAD-1-GP

PC8602
SC1U10V2KX-L1-GP

PX

PC8609

SCD1U25V2KX-L-GP

PX

D
D
D
D

PX

PC8608

5V_S5

0R0402-PAD-1-GP

SC4D7U25V5KX-L2-GP

PX

PR8606
10KR2F-L1-GP

1 PR8602 2

PWR_VGA1D5V_VDD

PR8622
324KR2F-1-GP

SC4D7U25V5KX-L2-GP

PWR_VGA1D5V_CS
3D3V_S5

PX
2

PX

OCP setting

PWR_VGA1D5V_VID

PX

20141022 Jack

PX

Vout Setting
Vout = Vref * ( 1 + R1/R2 )
= 0.675 * ( 1 + 24.9K / 20K)
= 1.515 V

VID vs Vref Table

VID Logic-High => Vref = 0.675 V
VID Logic-Low => Vref = 0.75 V
note. Vref can only be changed form
0.675v to 0.75v after power-on

3D3V_S0 to 3D3V_VGA_S0
1D0V_S5 to 1D0V_VGA_S0

20141022 Jack
B

Muxless

1D0V_VGA_S0

3D3V_AON_S0

NON_GC6

C8606
SCD1U16V2KX-L-GP

GC6_20

VIN
VIN

VOUT
GND
EN

1
2
3

GC6_PWRCTL

PX

C8609
SC1U10V2KX-L1-GP

1
2

Muxless

AP2821KTR-G1-GP

74.02821.07F

Muxless

20141202 SB Jack

R8603
0R0402-PAD-1-GP
2

DY

DY

GAP-CLOSE-PWR
C8614

1
0R2J-L-GP

U8604

GC6_20

C8610
SC4D7U6D3V3KX-L-GP

PG8615
1
2

SC22U6D3V3MX-1-GP

DY

GAP-CLOSE-PWR
C8607
SCD1U16V2KX-L-GP

Muxless

3D3V_VGA_S0

PR8619
2

PG8614
1
2

1
2

1
2

20150420 -1

C8603
SC330P50V2KX-3GP

Muxless

2nd = 074.05016.0093
SC1U10V2KX-L1-GP

DY

C8605

74.03523.A73

C8604

3D3V_S0

GAP-CLOSE-PWR

20141013 Jack
SC330P50V2KX-3GP

C8608
SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP

SC1U10V2KX-L1-GP

DY

C8602

3D3V_AON_S0

VTT_CT_3VC_1

APL3523AQBI-TRG-GP
C8612

PG8616
1
2

1D05V_VGA_OUT2
VTT_CT_105VC_2

15
14
13
12
11
10
9
8

GND
VOUT1#14
VOUT1#13
SS1
GND
SS2
VOUT2#9
VOUT2#8

VIN1#1
VIN1#2
EN1
BIAS
EN2
VIN2#6
VIN2#7

DGPU_PWR_EN

1
2
3
4
5
6
7

DGPU_PWROK_R

U8601

5V_S0

3D3V_S0

1D0V_S5

GPIO5_GC6_PWR_EN 79

3D3V_S0

Q8605

DY

R8614

NON_GC6

1
0R2J-L-GP

Muxless
1 PR8612 2

20,24,85 DGPU_PWROK

DGPU_PWR_EN

DGPU_PWR_EN 85

DGPU_PWROK_R

D8601
3

0R0402-PAD-1-GP

DGPU_CORE_PWROK

S
2

6,79 GC6_FB_EN

2N7002K-2-GP

84.2N702.J31

BAT54C-12-GP

2nd = 84.2N702.031
3rd = 84.2N702.W31

DGPU_CORE_PWROK

87

0R0402-PAD-1-GP
C8611

R8602
10KR2F-L1-GP

Muxless

R8613
100KR2F-L3-GP

GC6_20
2

DGPU_PWR_EN_G

1 PR8611 2

6 DGPU_PWR_EN#

SC1KP50V2KX-L-1-GP

CG6_20

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom

DISCRETE VGA POWER

Document Number

Rev

Brook_SLU

Date: Monday, July 06, 2015

5

1M
Sheet

86

of

105

1D0V_VGA_S0

GC6_20

GC6_20
220R3F-1-GP

1 R8701

Q8701

1D0V_VGA_S0_DIS

PWR_VGA_CORE_EN#

PWR_VGA_CORE_EN#

1V_VGA_CORE_S0_DIS 1 R8702

1V_VGA_CORE_S0

2N7002KDW-GP

GC6_20
2

220R3F-1-GP

84.2N702.A3F
2nd = 75.00601.07C
C

3D3V_S0

R8705
100KR2J-4-GP

Q8703

GC6_20

GC6_20
G

85 PWR_VGA_CORE_EN

PWR_VGA_CORE_EN#

S
2N7002K-2-GP

84.2N702.J31
2nd = 84.2N702.031
3rd = 84.2N702.W31

1D5V_VGA_S0

GC6_20

GC6_20R8703
220R3F-1-GP 2

20150120 SC Jack

Q8702
1

1D5V_VGA_S0_DIS

86 DGPU_CORE_PWROK

3D3V_S0

3D3V_S0_DIS
1

2N7002KDW-GP

R8704

2 100KR2J-4-GP

GC6_20

84.2N702.A3F
2nd = 75.00601.07C

Brook_SLU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

DISCHARGE

Size
A4

Document Number

Brook_SLU
Monday, July 06, 2015

Date:
5

Rev

1M
Sheet

87

of
1

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Switchable GFX LCD(2/2)

Size
A4

Document Number

Brook_SLU
Monday, July 06, 2015

Date:
5

Rev

1M
Sheet

88

of
1

105

Check test point

3D3V_S0
3D3V_AUX_S5
3D3V_S5
5V_S5
D

20,24 PM_PWRBTN#

TP8901

TP8902

TP8903

TP8904

TP8905

TP8906

TPAD14-OP-GP
TPAD14-OP-GP
TPAD14-OP-GP
TPAD14-OP-GP
TPAD14-OP-GP

29 AUD_HP1_JD#_R
29 AUD_HP1_JACK_R1
29 AUD_HP1_JACK_L1

20,24,31,40,61,63,68,91

PLT_RST#

TP8907

TPAD14-OP-GP

AFTP54

AFTP94

AFTP55

29 RING2_R
29 SELEEVE_R

24,40 S5_ENABLE

29 AUD_HP1_JD#_TYPE

33 SD_CLK
33 SD_CMD
33 SD_WP

AFTP95

AFTP56

AFTP96

33 SD_CD#
33 SD_DATA0
33 SD_DATA1

TPAD14-OP-GP

33 SD_DATA3
3D3V_CARD_S0

Comobo JACK

20141103 Jack

AFTP57

AFTP100

AFTP97

AFTP130

AFTP98

65 EC_TP_CLK_C
65 EC_TP_DATA_C
65 I2C1_DATA_TP
65 I2C1_CLK_TP
65 TP_IN#_R

AFTP131

AFTP99

AFTP132

AFTP147

AFTP148

65 TP_LID_CLOSE#

33 SD_DATA2

Test PointDimm Door

3D3V_TP_S3

1
1

AFTP86
AFTP87

1
1

AFTP88
AFTP89

AFTP90

AFTP91

AFTP92

AFTP93

60 SATA_TX_ODD_P1
60 SATA_TX_ODD_N1
60 SATA_RX_ODD_N1
60 SATA_RX_ODD_P1
60 PRSNT#
60 DA#
5V_ODD_S0

TP connector

1
1

AFTP144
AFTP160

1
1

AFTP162
AFTP163

AFTP164

AFTP165

AFTP166

AFTP161

ODD connector

SD Cardeaader
1

AFTP14

AFTP16

AFTP17

61 WIFI_RF_EN_CON

5V_S0
24,26 FAN_TACH1

FAN1 connector

1
1

19V_AD_JK
19V_AD_JK

AFTP38
AFTP39

1
1

15,61 USB_CPU_PP4
15,61 USB_CPU_PN4

AFTP40
AFTP41

61 PCIE_TX_WLAN_P6
61 PCIE_TX_WLAN_N6
15,61 PCIE_RX_CPU_P6
15,61 PCIE_RX_CPU_N6

DCIN1 connector

16,61 WLAN_CLK_CPU
16,61 WLAN_CLK_CPU#
29 AUD_SPK1_L-_CON
29 AUD_SPK1_L+_CON

AFTP18

AFTP19

AFTP20

AFTP21

29 AUD_SPK1_R-_CON
29 AUD_SPK1_R+_CON
C

24,43,44

BAT_IN#

43 BATA_SDA_1

SPK connector

43

BI

AFTP42

AFTP43

AFTP44

AFTP45

1
1

AFTP46
AFTP47

66 USB_CON_PN1_C
66 USB_CON_PP1_C
66 USB_CON_PN3_C
66 USB_CON_PP3_C
5V_USB

AFTP22

AFTP24

1
1

AFTP48
AFTP49

AFTP23

AFTP25

AFTP26

AFTP27

AFTP68
AFTP69

1
1

AFTP70
AFTP71

1
1

AFTP72
AFTP73

1
1

AFTP74
AFTP75

24,61 BLUETOOTH_EN

16,61 WLAN_CLKREQ_CPU#
61 PCIE_WAKE#R

12V_BT+_connector
12V_BT+_connector

AFTP146

1
1

61 WLAN_RST#

43 BATA_SCL_1

3D3V_IOAC
3D3V_IOAC

WLAN connector

USB CONNECTOR
65 KB_BL_DET_R
65 KB_LED_PWM_D
5V_S0

AFTP78

AFTP80

AFTP81

1
1

AFTP82
AFTP83

1
1

AFTP84
AFTP85

24,64,65

55 eDP_TX_CON_P0
55 eDP_TX_CON_N0
32 RJ45_1
32 RJ45_2
32 RJ45_3
32 RJ45_4
32 RJ45_5
32 RJ45_6
B

32 RJ45_7
32 RJ45_8

AFTP30

AFTP31

55 eDP_TX_CON_P1
55 eDP_TX_CON_N1

AFTP32

55 eDP_HPD_CON

AFTP33

55 eDP_BLEN_CON

AFTP34

AFTP35

AFTP36

AFTP37

55 eDP_BLCTRL_CON
19V_DCBATOUT_LCD
19V_DCBATOUT_LCD
55 3D3V_LCDVDD_PWR

RJ1 connector

1
1

AFTP52
AFTP53

1
1

AFTP58
AFTP59

AFTP60

AFTP61

AFTP62

1
1

AFTP63
AFTP64

AFTP65

1
1

55 eDP_TX_CON_N2
55 eDP_TX_CON_P2
55 eDP_TX_CON_N3
55 eDP_TX_CON_P3
55 USB_CON_PP6
55 USB_CON_PN6
55 TS_USB_CON_N
55 TS_USB_CON_P
55 3D3V_CAMERA_S0
55 TS_S0

1
1

AFTP141
AFTP142

1
1

AFTP139
AFTP140

1
1

AFTP133
AFTP134

1
1

AFTP135
AFTP136

AFTP137

AFTP138

AFTP143

AFTP159

AFTP103

35 USB30_TX_CON_P1
35 USB30_TX_CON_N1
35 USB_CON_PN0
35 USB_CON_PP0
15,35 USB30_RX_CPU_P1
15,35 USB30_RX_CPU_N1
5V_USB30_CHARGER

24,65 KROW0
24,65 KROW1
24,65 KROW2
24,65 KROW3
24,65 KROW4
24,65 KROW5
24,65 KROW6
24,65 KROW7
24,65 KROW8
24,65 KROW9
24,65 KROW10
24,65 KROW11
24,65 KROW12
24,65 KROW13
24,65 KROW14
24,65 KROW15
24,65 KROW16
24,65 KROW17

USB BOARD

AFTP50
AFTP51

AFTP102

AFTP76

24,65
24,65
24,65
24,65
24,65
24,65
24,65
24,65

1
1

AFTP101

LEDKB connector

BAT1 connector

55 eDP_AUX_CON_P
55 eDP_AUX_CON_N

KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7

KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KROW9
KROW10
KROW11
KROW12
KROW13
KROW14
KROW15
KROW16
KROW17

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

AFTP104
AFTP105
AFTP106
AFTP107
AFTP108
AFTP109
AFTP110
AFTP111
AFTP112
AFTP113
AFTP114
AFTP115
AFTP116
AFTP117
AFTP118
AFTP119
AFTP120
AFTP121

KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7

1
1
1
1
1
1
1
1

AFTP122
AFTP123
AFTP124
AFTP125
AFTP126
AFTP127
AFTP128
AFTP129

KBC_PWRBTN#

35 USB_CON_PN2
35 USB_CON_PP2
15,35 USB30_RX_CPU_P3
15,35 USB30_RX_CPU_N3
5V_USB30

5V_USB30_CHARGER
5V_USB30

AFTP184
AFTP185

1
1
1

AFTP186
AFTP187
AFTP194

1
1
1

AFTP198
AFTP188
AFTP189

1
1

AFTP190
AFTP191

1
1

AFTP192
AFTP193

AFTP196

AFTP197

1
1

AFTP200
AFTP201

1
1

AFTP195
AFTP199

AFTP158

H5
HS1

55 TOUCH_S_RST#_R
55 TOUCH_DET#_R

AFTP66
AFTP67

AFTP182
AFTP183

1
1

AFTP157
1

KB connector

35 USB30_TX_CON_P3
35 USB30_TX_CON_N3

1
1

22,55 TOUCH_INT#

AFTP145

PX

H1
HT9X9B9X9R33-S-GP
H6

HS2

HT9X9B9X9R33-S-GP
H2

34.4YG18.101
1

PX

HT9X9B9X9R33-S-GP
H7

STF236R128H101-2-GP

eDP connector

34.4YG18.101

STF236R128H101-2-GP
1
HT9X9B9X9R33-S-GP
1

56 CRT_DDCDATA_CON

56 CRT_DDCCLK_CON
56 CRT_RED_CON
56 CRT_GREEN_CON
56 CRT_BLUE_CON

56 CRT_HSYNC_CON
5V_CRT_S0

AFTP152

AFTP149

AFTP153

AFTP150

56 CRT_VSYNC_CON

HS3

AFTP79
57 HDMI_DATA_CON_P0
57 HDMI_DATA_CON_N0
57 HDMI_DATA_CON_P1
57 HDMI_DATA_CON_N1
57 HDMI_DATA_CON_P2
57 HDMI_DATA_CON_N2

AFTP151

AFTP155

AFTP156

AFTP167
AFTP168

1
1

AFTP169
AFTP170

1
1

AFTP171
AFTP172

1
1

57 HDMI_CLK_CON_P3
57 HDMI_CLK_CON_N3

AFTP173
AFTP174

1
1

57 HDMI_CLK_CON
57 HDMI_DATA_CON

AFTP177
AFTP178

H3

HOLE355X355R111-S1-GP

34.4Y802.011

AFTP179
H4

2nd = 34.4Y802.101

HT9X9B9X9R33-S-GP

HS4
1

AFTP180

H9

STF217R115H101-GP
1

AFTP181

HT9X9B9X9R33-S-GP
HS7

CRT connector

HT9X9B9X9R33-S-GP
H8

STF217R115H101-GP

57 HDMI_DET_CON

5V_HDMI_S0

AFTP154

1
1

HDMI CONNECTOR

HOLE355X355R111-S1-GP

DY

34.4Y802.011
2nd = 34.4Y802.101
HS5

H22

STF217R134H152-1-GP

STF217R115H101-GP

34.4CQ01.001

HS6

HOLE
1
19V_DCBATOUT

SCD1U25V2KX-L-GP 1

19V_DCBATOUT

SCD1U25V2KX-L-GP 1

2EC4401

DY

2EC4402

19V_DCBATOUT

SCD1U25V2KX-L-GP 1

2EC4403

19V_DCBATOUT

SCD1U25V2KX-L-GP 1

2EC4404

19V_DCBATOUT

SCD1U25V2KX-L-GP 1

2EC4405

DY

34.4Y802.011
2nd = 34.4Y802.101
1

SPR1
H21

STF236R128H101-2-GP

SPRING-57-GP

34.4YG18.101

SPR2

Baseline

HOLE

SPRING-57-GP

H20
<Core Design>
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

HOLE
Title
Size
A2
Date:

UNUSED PARTS/EMI Capacitors

Document Number

Rev

Brook_SLU

Monday, July 06, 2015

1M
Sheet

89

of

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Custom

NFC
Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet
1

90

of

105

3D3V_S0

3D3V_S5 3D3V_S0

TPM

TPM

R9106
0R2J-L-GP

1
2

U9101
10
19
24

VSBD

18,24,68 LPC_FRAME#_CPU
18,24 INT_SERIRQ
18,24 ESPI_RST#
18 LPC_CLK_TPM
20,24,31,40,61,63,68,89 PLT_RST#

R9102
10R2J-L-GP 2DY

LPC_AD_CPU_P0
LPC_AD_CPU_P1
LPC_AD_CPU_P2
LPC_AD_CPU_P3

LPCPD#

R9104
4K7R2J-L-GP

TPM

3D3V_S0

TPM

18,24,68
18,24,68
18,24,68
18,24,68

TPM_PP

TPM
1

DY

R9103
4K7R2J-L-GP

R9105
0R2J-L-GP

SCD1U16V2KX-L-GP

DY

TPM

C9104
1

SCD1U16V2KX-L-GP

C9103
1

SCD1U16V2KX-L-GP

C9102
1

SCD1U16V2KX-L-GP

C9101

3D3V_S0

5
22
27
28
21
16
26
23
20
17

VDD
VDD
VDD

SDA/GPIO0/XOR_OUT
SCL/GPIO1
GPX/GPIO2
GPIO3/BADD
CLKRUN#/SINT#/GPIO4
PP

VSB

LFRAME#/SCS#
SERIRQ
LPCPD#
LCLK/SCLK
LRESET#/SPI_RST#/SRESET#
LAD0/MISO
LAD1/MOSI
LAD2/SPI_IRQ#
LAD3

TEST
NC#3
NC#12
NC#13
NC#14
GND
GND
GND
GND

1
2
6
9
15
7

PM_CLKRUN#_EC 18,24

TPM_PP

8
3
12
13
14
4
11
18
25

NPCT650AA0WX-GP
B

TPM

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPM

Size
A4

Document Number

Brook_SLU
Monday, July 06, 2015

Date:
5

Rev

1M
Sheet

91

of
1

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Finger Print

Size
A4

Document Number

Brook_SLU
Monday, July 06, 2015

Date:
5

Rev

1M
Sheet

92

of
1

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

Express Card
Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet

93

of
1

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

Smart Card socket

Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet

94

of
1

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

Switchable GFX eDP

Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet

95

of
1

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

Bottom Docking
Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet

96

of
1

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A4
Date:
A

Inter LAN WG1217LM

Document Number

Brook_SLU
Monday, July 06, 2015
D

Rev

1M
Sheet

97

of
E

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A

LAN Switch
Document Number

Brook_SLU

Date: Monday, July 06, 2015

5

Rev

1M
Sheet

98

of
1

105

Main Func = Debug

1
1

TP9911
TP9901

TP9915

TP9938

22 PROC_TCK

1
1

TP9904
TP9902

22 PROC_TDI

1
1

TP9908
TP9903

22 PROC_TMS

1
1

TP9937
TP9905

22 PROC_TRST#

1
1

TP9939
TP9906

1
1

TP9940
TP9936

TP9907

15 XDP_PREQ#
15 XDP_PRDY#

23 CFG3

23 ITP_PMODE

22 PCH_JTAG_TDO
22 PCH_JTAG_TCK

TPAD14-OP-GP
TPAD14-OP-GP

TPAD14-OP-GP

TPAD14-OP-GP

TPAD14-OP-GP
TPAD14-OP-GP
TPAD14-OP-GP
TPAD14-OP-GP

TPAD14-OP-GP
TPAD14-OP-GP
B

TPAD14-OP-GP
TPAD14-OP-GP
TPAD14-OP-GP
TPAD14-OP-GP
TPAD14-OP-GP

Brook_SLU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU_XDP

Size
A4

Document Number

Brook_SLU
Monday, July 06, 2015

Date:
5

Rev

1M
Sheet

99

of
1

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A4

table of content
Document Number

Brook_SLU

Date: Monday, July 06, 2015

Rev

1M
Sheet

100

of

105

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

Change History
Document Number

Brook_SLU
Monday, July 06, 2015

Rev

1M
Sheet
1

101

of

105

Intel-Power Up Sequence

-7
AC
Adapter in

19V_AD+
43

3D3V_S5
3D3V_RTC_AUX

AD_OFF_R

SWITCH

RTC_RST#

(AC mode)

-4a

43

EN

3V_5V_EN

3D3V_AUX_S5/5V_AUX_S5
ECRST#

3D3V_AUX

3V_5V_EN

1D8V_S5

RT9025

-4c

-5

3D3V_AUX

5V_CHARGER_EN

-3c

53

3V_5V_POK

5V_S5/3D3V_S5
AD+

3V_5V_EN

PGOOD

RT6575D

DCBATOUT

SWITCH

5V_AUX

-4b

PM_RSMRST#

-2

VIN

44

3V_5V_POK

5V_AUX

5V_S5

-5
5V_S5

5V_CHARGER_EN

EN

(5V_S5)

45

PM_SUSWARN#

3V_5V_POK

-3b

-7

KBC_PWRBTN#

-7_AC

Battery

BT+

HPA02224
Charger

43

PM_PWRBTN#

-1

52

-4b
3D3V_AUX_KBC

DC
3V_5V_POK

1D0V_S5
RT8231

-2

5V_CHARGER_EN

AC_PRESENT

(AC mode) (DC mode)

-3a

3D3V_S5

(3D3V_S5)

3V_5V_EN

-2

-6
44

AC_IN

KBC_PWRBTN#

GPE4

PM_SLP_S4#
PM_PWRBTN#

GPD1

PM_SLP_S3#

PM_SLP_A#

GPE0

GPC4

1b

KBC
KB9028

GPB7
GPG6

GPD0

GPI7

Delay 99ms

GPD5

PM_RSMRST#

RSMRST#

PM_PWRBTN#

SKYLAKE_U
CPU

PWRBTN#

1c

24

PM_SLP_S4#

SYS_PWROK

VCCST
1D35V_S3

5a

PM_SLP_S4#

ALL_SYS_PWRGD

PM_SLP_S3#

13

14
PLTRST#

PCH_PWOK

5b

PWR_VTT_EN

12

0D675V_VREF_S0
PM_SLP_S3#
1V_VCCSTG
1V_VCCIO

5V_S5

1V_VCCSA

DDR_VTT_CNTL

VIN

PWR_VTT_EN

S3

1D5V_S0_PWRGD
VR_EN

DCBATOUT

PWR_VDDQ_EN

1V_CPU_CORE

S5

VTT

RT8231

5a

VOUT
VTTREF

51
DGPU_PWR_EN#(Discrete only)

PGOOD

0D675V_VREF_S0

1D35V_S3

VCC_CORE

OUTPUT

VR_EN

VR
ISL95857
VR_ON

11

PGOOD

PWR_VDDQ_VTTREF

IMVP_PWRGD

46

1D35V_S3_PWRGD

3D3V_S5

3D3V_VGA_S0(Discrete only)

3D3V_AON_S0(Discrete only)

VIN

5b

PWR_VGA_CORE_EN(Discrete only)
B

10

VIN

3V_5V_EN

DGPU_PWROK(Discrete only)

EN

RT9025

VOUT
PGOOD

1D8V_S5
1D8V_S5_PWRGD
B

53

7a

1D0V_VGA_S0(Discrete only)
1D5V_VGA_S0(Discrete only)
3D3V_S5

5V_S0

7
VIN

5b
PM_SLP_S3#

EN

RT9025

VOUT
PGOOD

1D5V_S0

DGPU_PWR_EN

1D5V_S0_PWRGD

53

TPS22966

3D3V_AON_S0

SWITCH

A
7a

DGPU_PWROK_R

1D5V_S0_PWRGD

1D0V_VGA_S0
86

ALL_SYS_PWRGD

5V_S5

VCCST_PWRGD
PM_SLP_S3#

VR_EN
1V_CPU_CORE

OUTPUT

CLKIN_BCLK Stable
TPS22966

VR_RDY

DCBATOUT

VIN

5b
3D3V_S5

CLK_CPU_BCLK

DCBATOUT

7
5V_S0

SWITCH 40

CPU CORE Power

<3ms

TPS22966

3D3V_VGA_S0

3D3V_S0

SWITCH 40

RT8812
en

OUTPUT

D
PGOOD

DGPU_CORE_PWROK

D
DGPU_CORE_PWROK

RT8231
en

85

1D0V_S5
H_CPUPWRGD

SYS_PWROK

5b
ALL_SYS_PWRGD

To KBC delay 99ms to PCH

PM_SLP_S4#

1D5V_VGA_S0

F
PGOOD

1D5V_VGA_PG

86

PCH_PWROK

VIN

1V_VGA_CORE_S0

TPS22966 1V_VCCST
SWITCH 40

PLT_RST#
VCC
VCCGT

1D0V_S5

5b
PM_SLP_S3#

M5938

Brook_SLU

Wistron Corporation

1V_VCCIO

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

SWITCH 40

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Title

Power Sequence

Size
A1

Document Number

Date:

Monday, July 06, 2015

Brook_SLU

Rev

1M
Sheet

102

of

105

Adapter

DCBATOUT

+AD

SIC532CD

TPCC8103

RT8231

CPU_CORE

RT8812

1D35V_S3

RT8231

5V_S5

SY6288DAAC

SY6288DAAC

5V_USB3.0

5V_USB2.0

1V_VGACORE_S0

1D5V_VGA_S0

3D3V_S0

M5938ARD1U

1V_VCCIO

RT6575DGQW

1D0V_S5

1V_VCCGT

0D675V_VREF_S0

Charger
HPA02224

Battery

5V_USB30
CHARGER

RT8231

SIC532CD

TPCC8103

G3703R41D

TPS22966DPUR

1V_VCCST

TPS22966DPUR

1D0V_VGA_S0

3D3V_AON_S0

3D3V_S5

G524B

TPS22966DPUR

5V_S0

3D3V_S0

3D3V_SUS
For DS3

G524B

SY6288DAAC

3D3V_S3

3D3V_IOAC

For PTP

TLV70215

1D5V_S0

For IOAC

AP2821

RT9724GB

3D3V_VGA_S0

LCDVDD

For GC6

Power Shape
A

Regulator

LDO

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU
A

Switch

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

Power Block Diagram

Document Number

Brook_SLU
Monday, July 06, 2015

Rev

1M
Sheet
1

103

of

105

PCH SMBus Block Diagram

KBC SMBus Block Diagram

3D3V_S5

3D3V_S0

3D3V_TP_S3

3D3V_S0

RAM 1 & 2
SMBCLK
SMBDATA

SMB_CLK

PCH_SMBCLK

SMB_DATA

PCH_SMBDATA

SCL

TouchPad Conn.

SDA

3D3V_S5

PSDAT3

2N7002SPT

PSCLK3

EC_TPDATA

TPDATA

EC_TPCLK

TPCLK

3D3V_AUX_KBC
SML1_CLK

SML1CLK

SML1_DATA

SML1DATA

To KBC
3D3V_S0

3D3V_S5

Battery Conn.
SCL1_BATMGR

3D3V_S0

SDA1_BATMGR

GPU
2

SML0CLK
SML0DATA

G-SENSOR

SML0_CLK

SML1_CLK_G

SML0_DATA

SML1_DATA_G

3D3V_S0

BAT_SCL

BATA_SCL_1

BAT_SDA

BATA_SDA_1

KBC
KB9028

SCL
SDA

DAT_SMB

HPA02224
SCL
SDA

5V_S0

2N7002SPT

CLK_SMB

CPU
3D3V_S0

DDPB_CTRLCLK
DDPB_CTRLDATA

HDMI_CLK_CPU

HDMI_CLK_CON

HDMI_DATA_CPU

HDMI_DATA_CON

3D3V_S5

HDMI CONN

2N7002SPT

SCL0
SDA0

SML1_CLK
SML1_DATA

SCL
SDA

PCH

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A2
Date:
A

SMBUS BLOCK DIAGRAM

Document Number

Rev

Brook_SLU

Monday, July 06, 2015

1M
Sheet

104

of

105

Thermal Block Diagram

Audio Block Diagram

AUD_SPK1_L-

SPK-OUT-L-

AUD_SPK1_L+

SPK-OUT-L+

THEM Resistor

SPK-OUT-R-

THEM Resistor
2N7002 D
S

AUD_SPK1_R-

Codec
ALC255

PURE_HW_SHUTDOWN#
3D3V_S0

HPOUT-L/PORT-T-L

PWM4
FAN1_ADB

HPOUT-R/PORT-T-R

HP
OUT

MIC2-L/PORT-F-L

5V

MIC2-R/PORT-F-R
SENSE_A

VIN

FAN Control IC
5V_FAN1

FAN_TACH1

SPEAKER

AUD_SPK1_R+

SPK-OUT-R+

KBC
KB9028QA

FAN Conn.

DMIC-CLK

VIN

DMIC

DMIC-DATA

DMIC

Brook_SLU

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

THERMAL/AUDIO BLOCK DIAGRAM

Size
Custom
Date:
A

Document Number

Rev

Brook_SLU
Monday, July 06, 2015

Sheet
E

1M
105

of

105