Beruflich Dokumente
Kultur Dokumente
BY
FEBRUARY 2012
BY
ii
FEBRUARY 2012
DECLARATION
I declare that this project work described in this report represents my original work and has not
been submitted to any university or similar institution for any degree.
--------------------------------------------
UE/10104/07
Signature/Date
iii
APPROVAL PAGE
This is to certify that this project was carried out by ITODO, FRIDAY VICTORY
(UE/10104/07) which met the requirement of the College of Engineering; University of
Agriculture, Makurdi, for the award of Bachelor in Engineering (B.Engr.) Degree.
Approved by:
Project Supervisor:
(Dr J. A. ENOKELA)
Signature/Date
Project Coordinator:
(Engr N. S. Tarkaa)
Signature/Date
Head of Department:
(Dr Jonathan A. Enokela)
Signature/Date
External Examiner
Signature/Date
iv
DEDICATION
This project is dedicated to God almighty for granting me the knowledge, support and protection
throughout my whole life to this moment and to my late father Mr. Itodo Friday.
ACKNOWLEDGMENT
Gods support through this career cannot be quantified; I owe everything to Him for His infinite
mercy and immeasurable love over me. If not because of Him, it would not have been possible
for me to successfully complete this program.
The contribution of my mother Mrs. Mary Onoja Itodo is all-directional, it therefore pleases my
heart to give her thanks and may the almighty God bless her for her enamors support.
It gives me a great joy to use this opportunity to thank my able supervisor, Dr. J.A.Enokela, of
Electrical/Electronic Engineering Department, University of Agriculture Makurdi for his careful
supervisory roles played in this work. His advice and guidance to this work can never be
forgotten. I appreciate all staff of Electrical/Electronic Engineering Department for their
individual and collective contributions to my academic up-bringing.
I thank Dr. Onoja.F.Ameh whom has stood by me from my childhood till this defining moment
of my life cum Mr. Kennedy Iwundu and Mr. Simon Onuh for their immense and immeasurable
contribution to my life in all entireties.
I am grateful to my beloved family members: my uncle Mr. J. A.Onoja, for his fatherly advice
and support. Appreciation is extended to my brother Mr.U.F. Itodo and my good friend Miss
Berikisu Musa for their unending contribution to the success of this work
Finally, I would like to appreciate every other person who contributed in one way or the other to
the successful completion of this project work.
The acknowledgement is not exhaustive but for time and space, I say thank you all.
vi
ABSTRACT
Frequent faults in underground cables due to breakdown of the paper or polymer plastic
insulation due to chemical action, reaction or even poor workmanship during installation and
the difficulty in locating the approximate fault area has long been a serious engineering
problem. Most underground faults are located by unearthing the entire length of armoured cable
to enable visual inspection to be carried out. In case where visual inspection is not helpful, the
entire length of such a cable is replaced. This method is not only expensive but also, long outage
of a cable from service results in heavy loss of revenue to the power distribution company,
production loss of industries as well as unpleasant condition to the general public, since the
consumers are left without electricity for the whole period taken to unearth the cable and carryout necessary repairs. To salvage these challenges, an efficient instrument capable of locating
the fault in minimum possible time and restoring the supply, that is, the digital underground
cable fault locator is designed and constructed. This research work will help in easy
identification and location of underground cable fault without unearthing the entire length of
cable before repair or replacing the entire cable due to difficulties in detecting or locating the
fault. It will also help to reduce loss of revenue due to damage in trying to locate or detect fault
and long power down time will be reduced as minimum time will be used to restore supply. In
the design and construction of digital underground cable fault locator, the locator circuit is
designed to use the sectionalizing test method to locate the fault distance. Its main limitation is
the fact that measurement and monitoring must be conducted at regular uninterrupted intervals
of 10m following the underground mapping of the trouble spot. The device is program based
and uses microcontroller as the interface between the input section of the device (detector circuit
and the analogue to digital converter which comprises the comparators and the pull-up resistor
configured in the ACTIVE LOW arrangement) and the output of the device which is a seven
segment LED display.
TABLE OF CONTENT
vii
Cover page
Title page
ii
Certification-
--
iii
Approval page -
iv
Dedication
Acknowledgement
--
vi
Abstract
--
vii
Table of Content
viii
List of Figures -
List of Tables -
xii
CHAPTER ONE
Introduction -
11
2.3
12
2.3.1
Thumping Method
13
2.3.2
Sectionalizing-
13
2.4
13
15
CHAPTER TWO
2.1
2.2
2.4.1
xi
Earth fault-
viii
2.4.2
16
2.4.3
16
2.5
17
2.5.1
17
2.5.2
18
2.5.2.1
Lm393 Comparator
19
2.5.3
Pic16f84a Microcontroller-
21
2.5.3.1
22
2.5.3.2
Memory Organization -
24
2.5.3.3
Microcontroller Board
24
2.5.3.4
25
2.5.3.5
26
2.5.3.6
The Registers- -
27
2.5.3.7
28
2.5.3.7
Status Register
29
2.5.3.8
29
2.5.3.9
30
2.5.3.10
32
2.5.3.11
Programming Concepts-
34
ix
2.5.3.12
36
2.5.3.13
The XOR-Trick.
37
2.5.3.14
Power requirements -
38
2.5.4
38
2.6
39
Detector Circuit.
42
3.2
43
3.3
Inputs -
46
3.4
Output -
48
3.4.1
49
3.5
53
56
4.2 MPLAB
57
4.3
60
4.4
Simulator
61
4.5
MPLAB Programming
64
4.6
69
4.7
72
73
74
77
81
82
82
Reference
xi
LIST OF FIGURES
Figure
Page
Fig.2.1 Anatomy of typical single phase underground cable -
15
15
15
16
16
16
Fig.2.8; Shows the block diagram of the digital underground cable fault locator - -
17
17
18
19
20
21
--
23
24
25
26
39
40
41
42
44
xii
46
47
48
49
52
58
58
59
59
60
60
61
63
63
64
65
65
65
66
66
67
67
67
xiii
68
68
68
69
70
71
72
72
73
73
74
74
75
76
76
77
81
xiv
LIST OF TABLES
Table
Page
12
28
29
30
32
35
35
37
37
Table 3.1 On/Off status in the common cathode abcdefg seven segment display for 0-9
50
51
xv
CHAPTER ONE
INTRODUCTION
The power industry has been developing in a challenging and competitive environment due
to, the ongoing restructuring and deregulation. This structural change has required the electric
utilities to reduce operating costs and optimize usage and maintenance of electrical assets
without sacrifice the quality and reliability of the power delivered to the customers.
Underground distribution systems are valuable assets of electric utilities, which supply power
to the end customers at low voltages. Many of the system components, particularly
underground cables, fail over time, in part due to the deterioration of the insulating materials
used in their structure. Studies reveal that cable failure rates in power systems continue to
worsen as the cable ages [1].
In the past, analogue system was used to detect and locate faults. However, the need for
improvement has made it necessary to shift from analogue to digital system of fault detection
and location. This shift requires developing new tools and methods to detect and locate faults
of underground distribution systems including power cables.
In addition to degrading system reliability, cable failures cost substantial amounts of money
for the utilities as replacing or repairing a cable is a very costly process. Quick detection and
location of cable faults within a minimum time would undoubtedly be a great benefit to the
utilities enabling them to avoid catastrophic failures, unscheduled outages, and thus loss of
revenues. This project presents a tool, digital underground cable fault locator (DUCFL) and a
methodology for such a location system known as sectionalisation.
Thus, the research will help to enhance the quality and reliability of the power or signal
delivered to the customers and also reduces cost of services to the customers.
This project will also help researchers for future work.
1.4 AIMS AND OBJECTIVES OF THE STUDY
At the end of this study, a digital underground cable fault locator would have been
Designed
Constructed
Able to locate underground cable fault and display the results using digital methods.
or aluminium will be justified based upon an analysis using life, environmental, and cost
factors. The need for mechanical flexibility requires that conductors be stranded, and the
NEC makes this mandatory for cables larger than No. 8 AWG installed in raceways. The
installation of conductors larger than 500 kcmil is not economical, and such large cables
should be used only under exceptional circumstances. Large ampacities can be served by
parallel or multiple circuits. Three 15 kV, single conductor, non-metallic-jacketed cables
larger than No. 4/0 AWG will require use of ducts larger than the standard four-inch size (i.e.
three single conductor cables making up a three-phase circuit and each having individual
overall diameters greater than 1.25 inches will need to be installed in a duct larger than four
inches). One three conductor cable is more costly than three single conductor cable, and use
of multiple-conductor cable will be restricted to special conditions.
Metallic-armoured cable is such a special condition.
b. Insulation and jacket material. The type of insulation used will be dependent upon the
voltage level and type of service required. Factors affecting selection will be the effects of the
surrounding environment, the importance of the load in regard to operation of the installation,
and whether peak loading is continuous or intermittent.
(1) Medium-voltage cable. Cable will be specified as 133 percent insulation level
(ungrounded) which allows greater margin for voltage surges, insulation deterioration, and
fault clearing time than does the use of the 100 percent insulation level (grounded). When
marking guide specifications, refer to NFPA 70, which currently limits the minimum size to
No. 1 AWG at 133 percent insulation for 15 kV to 28 kV systems and No. 2 AWG at 133
percent insulation for 8 kV to 15 kV systems. Medium-voltage cable above 3 kV will be
shielded.
(a) Non-metallic-jacketed cable. Non-metallic jacketed cable will be used, except where
circumstances warrant other coverings. Insulation will be either cross linked-polyethylene
(XLP) for short life requirements, or ethylene-propylene-rubber (EPR) for long life
requirements, in accordance with NEMA WC-7 and WC-8.
This option allows the use of cables which are available as stock items in small quantities. In
some environments, however, the selection of other jacket materials may be necessary
because properties of some jacket materials may not provide adequate cable protection.
Special shielding or coverings will not be specified, unless the designer has checked that the
4
footage installed for each different cable diameter is large enough for manufacturers to make
the special runs required.
(b) Metallic-armoured cable. Armoured cable is justified only when cable is installed under
water (submarine cables) and sometimes when installed in cable trays or trenches. Armored
cable will have XLP or EPR insulation covered with a thermoplastic core covering and then
provided with interlocked-metal tape armour. A non-metallic jacket is required for
underground installations, where corrosion and moisture protection is required, for
installations in outdoor cable trays, or for submarine cables. Submarine cable may also
require a lead covering. Cable having steel armour will be three-conductor type to avoid the
high hysteresis and eddy current losses which can result when single-conductor cable is used.
(c) Lead-covered cable. Lead-covered cables will not be used, unless extenuating
circumstances prevail such as for submarine cable. The lead covering is both more costly and
more difficult to handle. The use of laminated insulation such as for paper-insulated-leadcovered (PILC) or for varnished-cambric-lead-covered (VCLC) instead of the solid or
extruded dielectrics such as cross linked-polyethylene (XLP) or ethylene propylene- rubber
(EPR) is not approved. In addition, these cables have lower temperature ratings.
(2) Low-voltage cables. Cables suitable for below grade installations are listed in the NEC.
Insulation will be either XLP (NEMA WC 7) or EPR (NEMA WC 8) and jackets or other
protection will be in accordance with the applicable Underwriters Laboratories (UL)
specification covering that NEC type. Use of metal-clad (MC) cable will be limited as
previously discussed for metallic armoured cable. The use of the less expensive Moistureand-Heat-Resistant Thermoplastic (THWN) or Moisture-and-Heat-Resistant Cross-Linked
Synthetic Polymer (XHHW) is not recommended for underground work as their thinner
insulation has been designed for interior usage.
Moisture-and-Heat Resistant Thermoplastic (THW) wiring does have the same thickness of
insulation
as
Heat-Resistant
Rubber
(RHH)/Moisture-and-Heat
Resistant
Rubber
c. Cable ampacity. The current carrying capacities of cable will be in accordance with
ampacities given in the NEC and IEEE/ICEA publications. There are many factors taken into
account in determining these allowable ampacities such as operating temperatures, soil
effects, shielding losses, and conductor configurations, but the variables which cause the
most concern are circuit loading and location in a duct bank. Because of load diversity, peak
demands for cables in a duct bank will not occur concurrently in most cases. This diversity
factor will be taken into account when computations expected heat build-up in a duct bank.
Heat dissipation from a cable is also influenced by the position occupied by the cable in a
duck bank. Cables in duck bank corners dissipate heat more effectively than cables in interior
ducts, because of the greater soil dissipating area and the smaller heat contribution from
neighbouring cables. Calculations of the position effect indicate that, to equalize operating
temperatures, full load ratings of cables appropriate for isolated (one-way) ducts should be
decreased for multiple duct banks. For example, in an eight-way-duct bank the recommended
full-load percentage decrease for each corner duct is 95 percent and for each interior duct is
83 percent giving an average load percentage decrease of 89 percent. This rerating still allows
provision for loads in excess of the normal feeder capacity usually found on military
installations, as the summation of feeder capacities is generally from three to eight times the
overall capacity of a main electric supply station.
In communication systems, cables commonly consist of numerous pairs of paper-insulated
wire, encased in a lead sheath; the individual pairs of wire are intertwined to minimize induce
interference with other circuits in the same cable. To avoid electrical interference from
external circuits, cables used in radio broadcasting are often shielded with a winding of metal
braid, which is grounded. The development of the coaxial cable was an important advance in
the communications field. This type of cable consists of several copper tubes; each tube
contains a wire conductor that extends along its centre. The entire cable is sheathed in lead
and is generally filled with nitrogen under pressure to prevent corrosion. Because the coaxial
cable has a broad frequency range, it is valuable in transmission of carrier-current telephone.
For safety purpose, cables are laid underground; originally channel will be dug into the
ground along the route of a pre-planned network where a four-inch earthenware pipe would
be laid. Depending on the needs of the network, either a wide or thin cable would be pulled
through the pipe by rope; leaving some spare space for future use, spare rope was left in the
ducts for future cables, which today are frequently fibre optics. Fenect and other techniques
(sometimes the old ways are the best) blocked cable ducts can be a problem, especially if the
6
blockage is 60 feet away from an opening. The best way to shift the obstruction is to attack
the duct like blocked drain with a very long pole.
Means for a method of laying electrical cable underground and providing a high conductivity
environment therefore, consisting of a cable flow machine plus means to fill the evacuated
tube in which the cable is laid and buried 600mm below the surface. The diameter of the duct
depends on what size cable that will be installed. Cable faults such as short circuit faults,
open circuit faults, earth faults and high resistance joint and splices are traced by faulting
circuits indicators.
In the design of digital underground cable fault locator, the detector reads up the resistance of
the faulty underground cable which is proportional to its length at fault and feeds this
analogue signal to the digital integrated circuits which comprises the comparator, PIC
microcontroller and the digital display driver. The concept of digital data manipulation has
made a dramatic impact on our society. One has long grown accustomed to the idea of digital
computers, evolving steadily from mainframe and mini computers. More significant,
however, is a continuous trend towards digital solutions in all other areas of electronics.
Instrumentation was one of the first noncompeting domains where the potential benefits of
digital data manipulation over analogue processing were recognized. Early digital electronics
systems were based on magnetically controlled switches (or relays). They were mainly used
in the implementation of very simple logic networks. The age of digital electronic computing
only started in full with the introduction of the vacuum tube [2].
The first truly successful IC logic family, TTL (Transistor-Transistor Logic) was pioneered in
1962 [30]. Other logic families were devised with higher performance in mind. Examples of
these are the current switching circuits that produced the first sub nanosecond digital gates
and culminated in the ECL (Emitter-Coupled Logic) family [36]. TTL had the advantage,
however, offering a higher integration density and was the basis of the first integrated circuit
revolution. MOS digital integrated circuits started to take off in full in the early 1970s.
Remarkably, the first MOS logic gates introduced was of the CMOS variety [37], and this
trend continued till the late 1960s, the complexity of these devices for two more decades.
Interestingly enough, power consumption concerns are rapidly becoming dominant in CMOS
design as well and this time alleviates the problem.
Integration density and performance of integrated circuits have gone through an astounding
revolution in the last couple of decades. In the 1960s, Gordon Moore then with fair child
7
corporation and later cofounder of Intel predicted that the number of transistors that can be
integrated on a single die would grow exponentially with time. This prediction, later called
Moores law, has proven to be amazingly visionary [36].
CHAPTER TWO
BACKGROUND OF THE DESIGN
2.1 ANATOMY OF UNDERGROUND DISTRIBUTION CABLES
The core component of any underground system is the cable that supplies power from the
source to the load. The longevity and reliability along with desired safety and aesthetic issues
of underground cables have made underground distribution systems an unprecedented
substitute for overhead distribution lines. Underground cables have been designed for various
applications and voltage levels and extensive improvements in design process have been
achieved. Today pressurized cables are available up to 765 KV and even 1100 KV through
the gradual advancements in materials and manufacturing processes [7]. For primary
distribution systems, cables are typically designed with the following major components,
conductor, conductor shield, insulation, insulation shield, concentric neutral, and jacket.
These components are illustrated in figure 2.1.
The conductor can be either aluminium or copper in solid or stranded form. The selection of a
conductor type depends on ampacity, voltage, physical properties, flexibility, shape, and
economics [2], however it is recommended to use solid or stranded-filled conductors for
reliability [1]. Conductor shields and insulation shields synergistically provide a uniform
cylindrical surface next to the cable insulation to establish the most uniform possible
distributions of electrical stress. Research performed on cable failures has shown that
existence and development of voids or protrusions near the conductor shield-insulation
interface played an important role in the failure process [1]. This region experiences
9
extremely high electrical stresses and these irregularities help boost a non-uniform electrical
field, stressing the cable insulation and eventually causing it to fail. The extruded conductor
shield is a layer of semiconducting material, used to prevent excessive electrical stress in
voids between the conductors.
Insulation can be of a variety of materials such as EPR1, XLPE2, paper, and TRPE3
compounds, whose thickness is a function of cable voltage rating such that the higher the
voltage rating, the thicker the insulation. The extruded insulation shield also consists of a
semi-conductive layer similar to the conductor shield. The function of the insulation shield is
to confine the electric field within the cable, symmetrically distribute electrical stress, reduce
the hazard of shock, limit radio interference, and protect cable induced potential when
connected to overhead lines [8]. The shield may be a metallic tape or a non-metallic tape,
drain wires, or concentric neutral wires. The outer shield is normally connected to ground.
Concentric neutral conductors serve as the metallic component of the insulation shield and as
a conductor for the neutral return current [2]. Due to some mechanical and electrical
considerations, concentric neutral conductors are built from copper even if the central cable
conductor is aluminium.
The cable jacket is the outermost layer of the cable. The purpose of the jacket is to provide
mechanical, thermal, chemical, and environmental protection. It can be made of polyethylene,
polyvinyl chloride, nylon, as well as other plastics. Certain cables use a sheath or armour
instead of a jacket, which provide a much better protection to the cable than a jacket [2].
The first widely accepted concentric neutral cables were unjacketed. The bare concentric
neutral (BCN) cables were directly buried exposing the concentric neutral conductors to the
surrounding soil and consequently provided very effective ground. This design was desired
from a personnel safety point of view in case of a dig-in. Due to the presence of a low
resistance path through neutral conductors, adequate fault current could be conducted to
operate protective devices. The low resistance between the neutral and earth would also
reduce the touch potential at the dig-in site, significantly [1].
Despite the numerous advantages of BCN cables, major durability problems hindered their
wide instalment in underground systems. Soon engineers found that cable moisture and/or
concentric neutral corrosion played a major role in increasing the failure rate of unjacketed
underground cables. Due to the lack of a protective jacket, BNC cables were subject to
corrosion. Once corroded, the only neutral current path was through ground rods which were
10
a totally unsatisfactory condition from the safety and reliability stand point. Therefore,
jacketed concentric cables (JCN) achieved wide acceptance with a special attention to system
grounding.
It is worth mentioning that while U.S utilities installed BCN cables, European and Japanese
utilities installed only jacketed cables and as a result these utilities have experienced much
higher reliability than in the United States. Today, the U.S utilities mainly use jacketed cables
which are also use in Nigeria. [1].
2.2
From a field application point of view, the existing methods can be categorized into the
following classes [10]: i) Thumping method ii) Methods based on sectionalisation. The
following sections discuss these methods with particular attention to the advantages and disadvantages of each method.
2.3.1 THUMPING METHOD
When a high voltage is supply to a faulted cable, the resulting higher-current arc makes a
noise loud enough for you to hear above ground. This method has its drawback as it requires
a current on the order of tens of thousand of amps at voltages as high as 25kV to make an
underground noise loud enough for you to hear above ground.
The heating from this high current often causes some degradation of the cable insulation.
Moderate testing may produce no noticeable effects, sustained or frequent testing can cause
the cable insulation to degrade to an unacceptable conduction.
2.3.2 SECTIONALIZING
Sectionalisation method is risk reducing cable reliability, because it depends on physically
cutting and splicing the cable into successively smaller sections which will narrow down the
search for a fault.
For example, on a 9m length, you would cut the cable into two 4.5m sections and measure
both ways with the digital underground cable fault locator
The defective section shows a lower IR than the good section. You would repeat this divide
and conquer procedure until reaching a short enough section of cable to allow repair of the
fault from voltage divider.
2.4 DEFINITION OF UNDERGROUND CABLE FAULTS
Underground cable incipient faults are the primary causes of catastrophic failures in the
distribution systems. These faults develop in the extruded cables from gradual deterioration
of the solid insulation due to the persisting stress factors. The initial incipient activity is
caused by the electrical stresses applied to the voids or protrusions near the conductor shield
insulation interference. This region undergoes an extremely high electrical stresses and such
irregularities serve as stress amplifiers when they produce a non-uniform electrical field.
Once initiated, the gradual damage propagates locally through the insulation in the form of a
13
tree and the incipient process develops. The aging in the insulation can progress due to the
contribution of electrical stresses in the form of partial discharges i.e. electrical trees or from
the presence of moisture in the form of water trees. Electrical trees are swift whereas the
propagation time of the water trees is expressed in years [10]. Water trees fail the cable when
they convert to electrical trees as a result of heat generation or under other stress factors.
Once this happens, the time to failure is normally short because the initiated electrical tree
propagates rapidly through the already weakened dielectric. The only window for detection is
during the conversion process [8].
Electrochemical trees are also likely to develop which are believed to be due to the presence
of chemicals in the region [1]. Regardless of the type of aging mechanism, the term incipient
fault encompasses the insulation treeing process from inception to completion before leading
to a catastrophic failure. From a macroscopic perspective, underground cable faults refer to
the abnormalities associated with any type of deterioration phenomena manifested in the
underground cable electrical signals.
14
2.4.1 EARTH FAULT: This is the most common of all. It occurs when the conductor is in
contact with the lead sheath and thereby transferring charges to the general mass of the earth
and the fault resistance may be low or high. Earth fault normally encountered in real life are:
-
Conductors
Conductors
Conductors
15
Conductors
Resistor
2.4.2 Short circuit fault: This fault is less common than the earth fault and is usually found
in combination with an earth. This fault occurs as a result of damaged insulation and can
result in overheating of conductors and often causes sparking or arcing at the point where it
occurs [5]. It can be any of the following:
-
Short circuiting
Fig. 2.6: Double line short circuit fault
-
16
Detector
Circuit
Fig.2.8; The block diagram of the digital underground cable fault locator
Vs
R1
cable About 100R
R3
Vo
U2A
A2
1
2
4
R4
GND
8
U3A
A3
1
2
4
R5
GND
8
U4A
A4
1
2
R2
GND
R6
GND
Ref
GND
17
to the length of a cable ( ), R1 varies with the point at which the fault is detected on the
cable. By voltage divider rule,
0 =
2
2.1
1 + 2
Where, R1 is the resistance of the faulty conductor from the probe terminal to the location of
the fault.
From equation (2.1), R1 (resistance of the measured cable) determines the output signal
(voltage) that will be fed into the digital/analogue converter.
The resistance of a cable is proportional to its length, L and inversely proportional to its cross
sectional area, A.
. 2.2
Or
=
2.3
18
The principle of operation is based on the comparator principle to determine whether or not
to turn on a particular bit of the binary number output.
The resistor net and comparators provide an input to the combinational logic circuit, so the
conversion time is just the propagation delay through the network - it is not limited by the
clock rate or some convergence sequence. It is the fastest type of ADC available, but requires
a comparator for each value of output (63 for 6-bit, 255 for 8-bit, etc.) Such ADCs are
available in IC form up to 8-bit and 10-bit flash ADCs (1023 comparators) are planned.
Also called the parallel A/D converter, this circuit is the simplest to understand. It is formed
of a series of comparators, each one comparing the input signal to a unique reference voltage.
The comparator outputs connect to the inputs of a PIC 16F84A microcontroller.
As the analogue input voltage exceed the reference voltage at each comparator, the
V(volt)
V(volt)
Analog input
Time
-1
Time
LM393 COMPARATOR
The LM393 series are dual independent precision voltage comparators capable of single or
split supply operation. These devices are designed to permit a common mode
rangetoground level with single supply operation. Input offset voltage specifications as
low as 2.0 mV make this device an excellent selection for many applications in consumer,
automotive, and industrial electronics [22].
A dedicated voltage comparator chip such as LM393 is designed to interface with a digital
logic interface (to a TTL or a CMOS). The output is a binary state often used to interface real
19
world signals to digital circuitry. If there is a fixed voltage source from, for example, a DC
adjustable device in the signal path, a comparator is just the equivalent of a cascade of
amplifiers. When the voltages are nearly equal, the output voltage will not fall into one of the
logic levels, thus analogue signals will enter the digital domain with unpredictable results. To
make this range as small as possible, the amplifier cascade is high gain. The circuit consists
of mainly bipolar transistors except perhaps in the beginning stage which will likely be field
effect transistors. For very high frequencies, the input impedance of the stages is low. This
reduces the saturation of the slow, large P-N junction bipolar transistors that would otherwise
lead to long recovery times. Fast small Schottky diodes, like those found in binary logic
designs, improve the performance significantly though the performance still lags that of
circuits with amplifiers using analogue signals. Slew rate has no meaning for these devices.
For applications in flash ADCs the distributed signal across 8 ports matches the voltage and
current gain after each amplifier, and resistors then behave as level-shifters[20][22].
The LM393 accomplishes this with an open collector output. When the inverting input is at a
higher voltage than the non inverting input, the output of the comparator connects to the
negative power supply [20].When the non inverting input is higher than the inverting input,
the output is 'floating' (has a very high impedance to ground) [36][37].
With a pull-up resistor and a 0 to +5V power supply, the output takes on the voltages 0 or +5
and can interface with TTL logic:
else 0
.
20
21
following RA is the bit number (0 to 4). So, we have one 5-bit directional port where each
bit can be configured as Input or Output.
RB0 to RB7
RB is a second bidirectional port. It behaves in exactly the same way as RA, except there are
8 - bits involved.
VSS and VDD.
These are the power supply pins. VDD is the positive supply, and VSS is the negative
Supply or 0V. The maximum supply voltage that you can use is 6V, and the minimum is 2V
OSC1/CLK IN and OSC2/CLKOUT: these pins are where we connect an external clock, so
that the microcontroller has some kind of timing.
MCLR
This pin is used to erase the memory locations inside the PIC (i.e. when we want to reprogram it).
In normal use it is connected to the positive supply rail.
INT.
This is an input pin which can be monitored. If the pin goes high, we can cause the program
to restart, stop or execute any other single function we desire.
T0CK1.
This is another clock input, which operates an internal timer. It operates in isolation to the
main clock.
2.5.3.1 PINS ON PIC16F84A MICROCONTROLLER HAVE THE FOLLOWING
MEANING:
Pin no.1
RA2
Pin no.2
RA3
Pin no.3
RA4
this pin.
Pin no.4
Pin no.5
Vss
Pin no.6
RB0
Pin no.7
RB1
Pin no.8
RB2
Pin no.9
RB3
The PIC16F84A belongs to the mid-range family of the PICmicro microcontroller devices
[28]. A block diagram of the device is shown in Fig.2.11
There are two memory blocks in the PIC16F84A.These are the program memory and the data
memory. Each block has its own bus, so that access to each block can occur during the same
oscillator cycle.sss
2.5.3.3 MICROCONTROLLER BOARD
The simplest way of making microcontroller board is by connecting power supply, reset
circuit and oscillator circuit to PIC 16F84A. Such a configuration can be shown as:
24
OSCILLATOR CIRCUIT
For simplicity, an RC oscillator can be used. However, if timer needs accurate time then use
crystal oscillator. Connection for RC oscillator is at pin 15 while crystal oscillator use both
pin 15 and 16. In this case only the input of the microcontrollers clock oscillator is used,
which means that the clock signal with the Fosc/4 frequency will appear on the OSC2 pin.
This frequency is the same as the operating frequency of the microcontroller, i.e. represents
the speed of instruction execution [26][27].
In applications where great time precision is not necessary, resonant frequency of RC
oscillator depends on supply voltage rate, resistance R, capacity C and working temperature.
It should be mentioned here that resonant frequency is also influenced by normal variations in
process parameters, by tolerance of external R and C components, etc.
RESET CIRCUIT
Reset circuit is important for after on power circuit, stabilize voltage source at fix length of
time and stabilize voltage for PIC 16F84A [26][25].
Reset is used for putting the microcontroller into a 'known' condition. That practically means
that microcontroller can behave rather inaccurately under certain undesirable conditions. In
order to continue its proper functioning it has to be reset, meaning all registers would be
placed in a starting position. Reset is not only used when microcontroller does not behave the
way we want it to, but can also be used when trying out a device as an interrupt in program
execution, or to get a microcontroller ready when loading a program.
In order to prevent from bringing a logical zero to MCLR pin accidentally (line above it
means that reset is activated by a logical zero), MCLR has to be connected via resistor to the
positive supply pole. Resistor should be between 5 and 10K. This kind of resistor, whose
function is to keep a certain line on a logical one as a preventive, is called a pull up.
The most important reset sources are a) and b). The first one occurs each time a power supply
is brought to the microcontroller and serves to bring all registers to a starting position initial
state. The second one is a product of purposeful bringing in of a logical zero to MCLR pin
during normal operation of the microcontroller. This second one is often used in program
development [17].
During a reset, RAM memory locations are not being reset. They are unknown during a
power up and are not changed at any reset. Unlike these, SFR registers are reset to a starting
position initial state. One of the most important effects of a reset is setting a program counter
(PC) to zero (0000h), which enables the program to start executing from the first written
instruction.
While the 12805/12509 microcontroller family has an internal 4MHz oscillator, other PICs
require external circuitry before they will spring to life. In situation where timing is noncrucial, the simple resistor-capacitor oscillator suffices. In fact these two components are
probably the simplest way of getting a 16F84A started.
2.5.3.6 THE REGISTERS
A register is a place inside the PIC that can be written to, read from or both. Table 2.2 below
shows the register file map inside the PIC16F84A [14].
27
Bank 0
Bank 1
Address
00h
INDF
INDF
80h
01h
TMR0
OPTION
81h
02h
PCL
PCL
82h
03h
STATUS
STATUS
83h
04h
FSR
FSR
84h
05h
PORTA
TRISA
85h
06h
PORTB
TRISB
86h
07h
87h
08h
EEDATA
EECON1
88h
09h
EEADR
EECON2
89h
0Ah
PCLATH
PCLATH
8Ah
0Bh
INTCON
INTCON
8Bh
0Ch
GPR
8Ch
registers
68 bytes
Notice that some SFRs, such as the STATUS register and INTCON register, appear in both
banks and can be accessed from either Bank 0 or Bank 1.
2.5.3.7 PROGRAMMING THE MICROCONTROLLER.
The registers are split into two; Bank0 and Bank1. Bank1 is used to control the actual
operation of the PIC, for example to tell the PIC which bits of PORTA are inputs and which
are output. Bank0 is used to manipulate data. An example is as follows: Let us say we want to
make one bit on PORTA high. First we go to Bank1 to set the particular bit, or pin, on
PORTA as output. We then come back to Bank0 and send a logic high (1) to that pin.
The most common registers in Bank1 that are going to be used are the STATUS, TRISA,
TRISB. The first allows us to select which pins on PORTA are outputs and which are inputs,
28
TRISB allows us to select which pins on PORTB are output and which are input. The
STATUS (SELECT) register in Bank0 allows us to switch to Bank1.
2.5.3.7
STATUS REGISTER.
Table 2.3; The status register of PIC16F84A
R=Readable bit
W=Writable bit
To change from Bank 0 to Bank 1, we tell STATUS register on address03h of the register.
We do this by setting bit 5 of the STATUS register to 1. To switch to Bank 0, we set bit 5
of the STATUS register to 0.
This is one of the most important registers within a PIC chip in relation to programming. The
bits 0 to bit 2 are the status results from the ALU (Arithmetic Logic Unit), bits 3.4 are reset
status, and the remaining 3 relate to the bank selection [17].
The C flag, bit 0, is set to 1 whenever the results of an operation results in a carry from the
MSB.
The DC flag, bit 1 is set to 1 if the Z flag, bit 2, is set in the result of arithmetic or logical
operation results in all bits being 0 and vice versa for 1, using BTFSS and BTFSC
respectively for a it test.
2.5.3.8
These are located at addresses 85h and 86h respectively. To program a pin to be an output an
input, we simply send a 0 or a 1 to the relevant bit in the register. Now, this can either be
done in binary, or hex.
So, on Port A we have 5 pins, and hence 5 bits. If I wanted to set one of the pins to input, I
send a 1 to the relevant bit. If I wanted to set one of the pins to an output, I set the relevant
29
bit to 0. The bits are arrange in exactly the same way as the pins, in other words bit 0 is
RA0, bit 1 is RA1, bit 2 is RA2 and so on. Lets take an example. If I wanted to set RA0,
RA3 and RA4 as outputs, and RA1 and RA2 as inputs, I send this: 00110 (06h). Note that
bit zero is on the right, as shown in table 2.4 below [17][26].
Table 2.4; graphical illustration of port A
Port A Pin
RA4
RA3
RA2
RA1
RA0
Bit Number
Binary
30
First, we need to switch from Bank 0 to Bank 1. We do this by setting the STATUS register,
which is at address 03h, bit 5 to 1.
BSF 03h, 5
The BSF Means Bit Set F. The letter F means that we are going to use a memory location, or
register. We are using two numbers after this instruction 03h, which is the STATUS
register address, and the number 5 which corresponds to the bit number. So, what we are
saying is Set bit 5 in address 03h to 1.
We are now in Bank 1.
MOVLW b11111
We are putting the binary value 11111 (the letter b means the number is in binary) into our
general purpose register W. We could of course have done this in hex, in which case our
instruction would be:
MOVLW 1Fh
Or
MOVLW 0X1F
Either works. The MOVLW means Move Literal Value into W, which in English means
put the value that follows directly into the W register.
Now we need to put this value onto our TRISA register to set up the port:
MOVWF 85h
This instruction means Move the Contents of W into the Register Address That Follows, in
this case the address points to TRISA.
Our TRISA register now has the value 11111 or shown graphically:
31
RA4
RA3
RA2
RA1
RA0
Binary
Input/output
Now we have set up our Port A pins, we need to come back to Bank 0 to manipulate any
data.
BCF 03h, 5
This instruction does the opposite of BSF. It means Bit Clear F. The two numbers that
follow are the address of the register, in this case the STATUS register, and the bit number, in
this case bit 5. So what we have done now is set bit 5 on our STAUS register to 0
We are now back in Bank 0.
Here is the code in a single block:
BSF
03h,5
MOVLW
1Fh
MOVWF
85h
BCF
2.5.3.10
03h, 5
Go
;
;
to
Bank
Put
11111
into
Move
00110
onto
TRISA
The Assembly language programming has four fields which are the Label field (e.g.
START), Operand field, operation-code(op-code) and Comment fields [28].
Labels
Labels provide the easiest way of controlling the program flow. They are used to mark
particular lines in the program where jump instruction and appropriate subroutine are to be
executed.
32
Comments: Explain the purpose of the program, type of chip, clock type and
frequency, Date and authors name, etcBe descriptive about program but
not too lengthy.
;---------------------------------------------------*
;
Description
*
*
;---------------------------------------------------*
Header: Header contain instruction information of the type of chip and the
base of number system
;---------------------------------------------------*
List
p=16f84
Radix
hex
;---------------------------------------------------*
Initialization: Here, you define ports, variables
;--------------------------------------------------*
Porta equ
0x05
Portb equ
0x06
;--------------------------------------------------*
The above code tell the chip that porta is define at Hex address 05 and portb at 06
Program: You insert your program codes here
;----------------------------------------------------------------*
33
The end statement tell the assembler that this is the end of the program
;----------------------------------------------------------------*
End
;----------------------------------------------------------------*
The symbol ; will tell the assembler to ignore everything after it on that
particular line.
2.5.3.11
PROGRAMMING CONCEPTS
34
Operands Description
Bcf
f, b
Bsf
f, b
Btfss
f, b
Test bit b of file f, skip the next instruction if the bit is set.
This is a conditional branch instruction.
Clrf
Clear file f
Goto
Movf
f, d
Movlw
Movwf
Xorwf
f, d
Description
35
2.5.3.12
Bit Test f Register Skip if Set. If the result of the test is 0 then the next instruction is carried
out, else it is replaced with NOP.
Let us assume we have an operation that would normally result in the carry bit being set in
the status register. We could use the BTFSS instruction to test the Status Register
Loop
BTFSS 03, 0
; testing bit0 of SR
Goto Loop
Movf
porta, w
Sublw
0x05
Btfss
Status, 2
Goto
code here
; If not
Goto
code here
; if Yes...
; subtract N from W
36
Flag Tested
W=N
Z Set
W /= N
Z Clear
(not Equal)
W <= N
C Set
W>N
C Clear
Input B
A^B
The
XOR
function
is
used
to
detect
MATCH
between
two
files.
To find out if two numbers are the same, they are XOR-ed together. Since each binary digit
(bit) will be the same, the result will be (0000 0000). For example, if we have two files:
b00010011'
and b'0001 0011' bit 0 in each file is '1' bit1 in each file is "1" bit 2 in each
file is "0" etc. In fact all bits are the same. When all bits are the same, this will SET the zero
flag in the Status (03) file and by testing bit 2 (the z flag) you can include an instruction in
37
your
program
to
skip
the
next
instruction
when
the
bit
is
set.
xorwf motor
btfss status,2
goto
not same
goto
same
38
Maximum current that each microcontroller pin can receive or give is limited.
Therefore, if several displays are connected to the microcontroller then so called Low
current LEDs limited to only 2mA should be used.
Display segments are usually marked with letters from a to g, but there is no fast rule
indicating display pins they are connected to. For this reason, it is very important to
check connection prior to start writing a program or designing a device.
A multi digit number must be split into units, tens etc. in a specialized subroutine.
Then each of these digits must be stored in a specific byte. Digits get recognizable
appearance for humans by performing a simple procedure called masking.
In other words, a binary number is replaced with a different combination of bits. For
example, digit 8 (0000 1000) is replaced with the binary number 0111 1111 in order
to activate all LEDs displaying this digit. The only diode remaining inactive here is
reserved for the decimal point [21][27].
2.6
This is the most common voltage regulator that is still used in embedded system designs.
LM7805 voltage regulator is a linear regulator that reduces input DC voltage to 5v which is
used to power the microcontroller and the entire circuit [29].
39
Features
Output Current up to 1A
Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24V
Thermal Overload Protection
Short Circuit Protection
Output Transistor Safe Operating Area Protection
They can come in several types of packages. For output current up to 1A there may be two
types of packages: TO-220 (vertical) and D-PAK (horizontal).
40
CHAPTER THREE
DESIGN AND ANALYSIS
The digital underground cable fault locator is made up of four building blocks;
Detector circuit
Analogue-to-Digital converter/input.
Microcontroller
Detector
Circuit
41
3.1
DETECTOR CIRCIUT.
U6
LM7805CT
T1
LINE
VREG
VOLTAGE
COMMON
V1
9V
R1
cable About 100R
GND
Vo
T2
R2
100
Ref
GND
42
GND
The locator circuit which operates on voltage divider rule is made up of two probe terminals
T1 and T2 as shown in figure 3.2 and is fed by an input Vs.
By voltage divider rule VO =
2
2 +1
Where, Rx is the resistance of the faulty conductor from the probe terminal to the location of
the fault. The design is base on an underground cable with cross-sectional area of 35Sq.mm
having the resistivity of 3.5 10-4m.The device is also design to locate fault using
sectionalisation technique every 10m length.
The resistance of a cable is proportional to its length, L and inversely proportional to its
cross-sectional area.
i.e. =
3.5 104 10
=
= 100
35 106 2
3.2
This comprises the switch circuit of the comparator and the ACTIVE LOW resistor
arrangement which induces a logic state of HIGH (1) and LOW (0) as shown in figure 3.3.
The principle of operation is based on the comparator operation to determine whether or not
to turn ON or remain OFF. At the point where the reference voltage (V1, V2, V3) exceeds or
equal the analogue input, the comparator output will not be switched ON. Similarly, at the
point where the analogue input, Vo
comparators output will be turned ON. In other words, the comparator is acting like a switch
[24].
43
VCC
5V
R1
cable About 100R
R3
R7 R9
1k 1k
1k
8
R8
1k
U2A
A2
1
2
R4
1k
LMV393M
GND
U3A
A3
1
2
R5
1k
LMV393M
GND
U4A
A4
1
2
R2
100
R6
1k
GND
GND
Ref
LMV393M
GND
5(3)
4
= 3.75
2 =
5 (2)
= 2.50
4
3 =
5 (1)
= 1.25
4
44
45
VCC
5V
R3
10k
R1
10k
R2
10k
U1
17
18
1
2
3
RA0
RA1
RA2
RA3
RA4T0CKI
4
16
MCLR
OSC1CLKIN
VSS
VDD
RB0INT
RB1
RB2
RB3
RB4
RB5
RB6
RB7
OSC2CLKOUT
14
6
7
8
9
10
11
12
13
15
PIC16F84A
S1
C2
30pF
Key = Space
GND
C1
1F
GND
GND
3.3
INPUTS
Inputs to a PIC have the same 5V logic requirements, and just as outputs can be 'sink' or
'source', so the inputs can be active 'high' or active 'low'. Basically this is just a variation on
the same theme - but, depending on the actual input device, you may be forced to use a
particular method [17].
46
Active LOW
Active HIGH
47
U6
VCC
LM7805CT
5v
LINE
R10
1k
R7
1k
VOLTAGE
R8 R12
1k 1k R13
1k
VREG
V1
9V
COMMON
U2A
GND
GND
3
1
2
U1
4 LMV393M
17
18
1
2
3
GND
8
U4A
RA0
RA1
RA2
RA3
RA4T0CKI
4 MCLR
16 OSC1CLKIN
1
2
VSS
VDD
RB0INT
RB1
RB2
RB3
RB4
RB5
RB6
RB7
OSC2CLKOUT
14
6
7
8
9
10
11
12
13
15
PIC16F84A
4 LMV393M
GND
8
U3A
3
1
2
4
LMV393M
GND
Output
The project design is to locate underground cable fault and we have adopted
sectionalization method of test for the probe terminals I the range of every 10m. Open and
Short circuit fault will likely be encountered. In respect to this, the design is to make the
output to indicate Open, Short and Correct or Complete circuit condition by a sign of O,
S, and C respectively.
48
The seven segment display will be used to show result for our output interface with the
microcontroller PORTB.
3.4.1 SEVEN SEGMENT DISPLAY
This is used to show the result or display results on port B for indicating the state of faults
underground.
If the microcontroller port is connected to a display so as that bit 0 activates segment a, bit 1
activates segment b, bit 2 segment c etc., then table below shows appropriate binary mask
for each digit
49
Table 3.1 On/Off status in the common cathode abcdefg seven segment display for 0-9
Digits
to
display
Display Segments
Dp
In addition to digits (0-9), there are some letters of alphabet - a, c, e, j, f, u, h, l, b, c, d, o, r, tthat can also be displayed by masking.
In case that common anode displays are used, all ones contained in the table above should be
replaced with zeros and vice versa.
It is possible to represent hexadecimal unambiguously by using a mixture of letter cases
(AbCdEF is typical) and using a representation of 6 that has the top segment illuminated.
This is frequently used to output hexadecimal codes for troubleshooting purposes. Short
messages giving status information (e.g. "no disc" on a CD player) are also commonly
represented on 7-segment displays. In the case of such messages it is not necessary for every
letter to be represented, merely for a word as a whole to be readable.
A single byte can encode the full state of a 7-segment-display. The most popular bit
encodings are gfedcba and abcdefg - both usually assume 0 is off and 1 is on.
50
0x3F
0x7E
On On On on
On On Off
0x06
0x30
off
0x5B
0x6D
On On Off on
On Off On
0x4F
0x79
On On On on
Off Off On
0x66
0x33
off
0x6D
0x5B
On off
On on
Off On On
0x7D
0x5F
On off
On on
On On On
0x07
0x70
0x7F
0x7F
On On On on
On On On
0x6F
0x7B
On On On on
Off On On
0x77
0x77
On On On off On On On
0x7C
0x1F
off
off
On on
On On On
0x39
0x4E
On off
Off on
On On Off
0x5E
0x3D
off
On On on
On Off On
0x79
0x4F
On off
Off on
0x71
0x47
On off
Off off On On On
On On off Off On On
On On On
In the case of the project, code 0x7Eh, 0x5Bh and 0x4E will be used to output on the seven
segment display for O symbolizing Open Circuit, 5 symbolizing Short Circuit and C
symbolizing Correct or Complete Cable respectively since seven segment display with
abcdefg arrangement or format will be used.
51
The circuit diagram for the digital underground cable fault locator is shown in Fig.3.8
U6
LM7805CT
LINE
VREG
VOLTAGE
V1
9V
COMMON
GND
R1
cable About 100R
R7 R9
1k 1k
R2
1k
8
R8
1k
R13
1k
GND
U2A
CK
3
1
U5
R3
1k
LMV393M
GND
U3A
RA0
RA1
RA2
RA3
RA4T0CKI
4 MCLR
16 OSC1CLKIN
1
2
R4
1k
U1
17
18
1
2
3
5
4
LMV393M
GND
U4A
VSS
VDD
RB0INT
RB1
RB2
RB3
RB4
RB5
RB6
RB7
OSC2CLKOUT
PIC16F84A
S1
Key = Space
AB CDE FGH
14
6
7
8
9
10
11
12
13
15
R15
100
R16R17R18R19R20 R21R22
100
100
100
100
100100
100
2
4
R6
100
R5
1k
GND
GND
Ref
C1
1F
LMV393M
C2
30pF
GND
GND
GNDGND
GND
52
3.5
The program is written in Assembly language which avails the opportunity to use the LABEL
field to mark conditions for our cable test indicating lines in the program where jump
instructions and appropriate subroutines are to be executed and the COMMENT field which
enable us to give proper description to the function of each common line.
From the ACTIVE LOW arrangement of PORTA of the microcontroller, it is expected to
have a bit pattern or a logic state of b00011 or 0x03h for short circuit condition, b01111
or 0x0Fh for correct cable and b11111 or 0x1Fh for an Open Circuit Condition.
Below is the program;
The addresses for the SFR (Special Function Register ) are automatically defined once the
processor files are loaded using INC directive.
STATUS
equ
03h
TRISA
equ
85h
PORTA
equ
05h
; Address of Port A
TRISB
equ
086h
PORTB
equ
06h
; Address of Port B
ORG 0x00
Start
BSF
STATUS, 5
; Goto Bank1
MOVLW
0x1F
MOVWF
TRISA
MOVLW
0x00
MOVWF
TRISB
BCF
STATUS, 5
; Go back to Bank0
53
SHORT
CLRF
PORTA
CLRF
PORTB
MOVLW
0x03
XORWF
PORTA,0
CORRECT
BTFSS
STATUS,2
GOTO
CORRECT
MOVLW
0x5B
; Cable is short-circuited
MOVWF
PORTB
GOTO
SHORT
; Loop continuously
MOVLW
0x0F
XORWF
PORTA, 0
OPEN
BTFSS
STATUS, 2
GOTO
OPEN
MOVLW
0x4E
; Cable is correct
MOVWF
PORTB
GOTO
CORRECT
; Loop continuously
MOVLW
0x1F
XORWF
PORTA, 0
54
STATUS, 2
GOTO
SHORT
MOVLW
0x7E
MOVWF
PORTB
GOTO
OPEN
; Loop continuosly
END
55
CHAPTER FOUR
PROGRAM TESTING AND HARDWARE CONSTRUCTION
56
Requirements:
- Development tools: MPLAB IDE (version 8.60)
- Programmer: Intelligent Universal programmer
- Dataman programmer software
4.2 MPLAB
MPLAB Integrated Development Environment (IDE) is a Windows program package which
enables easy program writing as well as easy program development. It is best to describe it as
development environment for a standard program language designed for PC programming.
MPLAB technically simplifies some operations consisting of a lot of parameters, which, until
the IDE environment* appeared, were executed from the command line. However, tastes are
different and there are some programmers who prefer standard editors and command line
compilers. Every program written in MPLAB is clear, but there are also help documentationjust in case.
MPLAB consists of several parts:
The program which sorts data files of the same project into one group (Project
Manager);
Simulator used to simulate the operation of a program loaded into the microcontroller.
Besides, there are also built in programmers such as PICStart Plus and ICD (In Circuit
Debugger) that can be used to program software into PIC microcontroller device.
57
58
59
60
4.4
SIMULATOR
A simulator is a part of MPLAB environment which provides better insight into the
61
Starts program execution at full speed. In this example, the simulator executes the program at
full (normal) speed until it is halted by clicking the icon below.
Pauses program execution. Program can continue executing step by step or at full speed
again.
Starts program execution at optional speed. The speed of execution is set in dialog
Debugger/Settings/Animation/Real-time Updates.
Starts step-by-step program execution. Instructions are executed one after another.
Furthermore, clicking on this icon enables you to step into subroutines and macros.
This icon has the same function as the previous one except it has the ability to step into
subroutines.
Resets microcontroller. By clicking this icon, the program counter is positioned at the
beginning of the program and simulation can start [31].
62
Similar to real environment, the first thing that should be done is to reset the microcontroller
using the option DEBUGGER > RESET or by clicking reset icon. As the consequence of
this, a green line is positioned at the beginning of the program and program counter PCL is
cleared to zero. Refer to the window Special Function Registers shown in Fig.4.8.
63
After all variables and registers of interest become available on the simulator working area,
the process of simulation can start.
The next instruction may be either Step into or Step over depending on whether you want to
step into subroutine or not. The same instructions may be set by using keyboard- pushbuttons <F7> or <F8> (generally, all important instructions have the corresponding
pushbuttons on the keyboard).
4.5
MPLAB PROGRAMMING
Files will now be added to project by right-clicking on Source Files in the Workspace
(window with the title <muc.mcw>) and selecting Add Files...
64
65
Click on the programmer icon. The output window should state that the device is
programmed
66
Hit Next and then hit Finish. Go to Menu->Projecnt->Add New File to Project
.
Fig.4.19; MPLab IDE menu window
Browse and find your project directory.
To use MPLAB for an Assembly program, save a file with the .asm extension. MPLAB will
open the file.
67
68
4.6
At this stage, it is expected that the Dataman programmer software has been installed. Once
the software is written, the code is compiled to check for syntactical errors.
The first important step in the Burning processing is building the project. Before building
the
Project, one is sure the configuration bits are set appropriately by selecting Configure _
Configuration Bits. Then select Project _ Build All or hit Ctrl + F10 to build the project.
The output window will print the results of each step in the build process.
One will probably receive some warning or advisory messages. If the build process was
successful the output window should print a Memory Usage Map that looks like the
following:
BUILD SUCCEEDED: Sat Nov 18 01:34:23 Memory Usage Map:
69
Program space:
CODE used 21h (33) of 800h words (1.6%)
CONST used 0h (0) of 800h words (0.0%)
ENTRY used 0h (0) of 800h words (0.0%)
STRING used 0h (0) of 800h words (0.0%)
Data space:
BANK0 used 3h (3) of 60h bytes (3.1%)
BANK1 used 0h (0) of 50h bytes (0.0%)
COMBANK used 0h (0) of 10h bytes (0.0%)
EEPROM space:
EEDATA used 0h (0) of 100h bytes (0.0%)
ID Location space:
IDLOC used 0h (0) of 4h bytes (0.0%)
Configuration bits:
CONFIG used 0h (0) of 1h word (0.0%)
Summary:
Program space used 21h (33) of 800h words (1.6%)
Data space used 3h (3) of B0h bytes (1.7%)
EEPROM space used 0h (0) of 100h bytes (0.0%)
ID Location space used 0h (0) of 4h bytes (0.0%)
Configuration bits used 0h (0) of 1h word (0.0%).
When building project a large amount of files are created and stored in the project directory.
The most important file created is the hexadecimal file as shown in Fig.4.24
Below is the picture of universal programmer used for the burning [33];
or press Alt + P to program your PIC microcontroller. You should see a progress bar at the
centre of the screen.
4.7
A project directory was created and named cable fault locator.asm so that MPLab IDE can be
used for assembly program. Fig 4. Shows the screenshot of the result of the compilation from
clicking the Biuld Toolbar button
72
73
74
This is the file that will be burned into the PIC microcontroller. This HEX file was copied
and into the computer connected to the available programmer (Intelligent Universal
Programmer). The PIC microcontroller was placed in the black ZIF socket and the silver
lever was placed in the down position to clamp onto the I/O pins as shown in Fig.4.32 below
75
76
LIST p=16F84A
LIST
; P16F84A.INC Standard Header File, Version 2.00 Microchip Technology, Inc.
NOLIST
; This header file defines configurations, registers, and other useful bits of
; Information for the PIC16F84 microcontroller. These names are taken to match
; the data sheets as closely as possible.
;
;
;
;
;
;==========================================================================
;
;
Revision History
77
;==========================================================================
;==========================================================================
;
;
Verify Processor
;
;==========================================================================
IFNDEF __16F84A
MESSG "Processor-header file mismatch. Verify selected processor."
ENDIF
;==========================================================================
;
;
Register Definitions
;
;==========================================================================
W
F
EQU
EQU
H'0000'
H'0001'
INDF
EQU
H'0000'
TMR0
EQU
H'0001'
PCL
EQU
H'0002'
STATUS
EQU
H'0003'
FSR
EQU
H'0004'
PORTA
EQU
H'0005'
PORTB
EQU
H'0006'
EEDATA
EQU
H'0008'
EEADR
EQU
H'0009'
PCLATH
EQU
H'000A'
INTCON
EQU
H'000B'
OPTION_REG
EQU
H'0081'
TRISA
EQU
H'0085'
TRISB
EQU
H'0086'
EECON1
EQU
H'0088'
EECON2
EQU
H'0089'
IRP
EQU
H'0007'
78
RP1
EQU
H'0006'
RP0
EQU
H'0005'
NOT_TO
EQU
H'0004'
NOT_PD
EQU
H'0003'
EQU
H'0002'
DC
EQU
H'0001'
EQU
H'0000'
GIE
EQU
H'0007'
EEIE
EQU
H'0006'
T0IE
EQU
H'0005'
INTE
EQU
H'0004'
RBIE
EQU
H'0003'
T0IF
EQU
H'0002'
INTF
EQU
H'0001'
RBIF
EQU
H'0000'
NOT_RBPU
EQU
H'0007'
INTEDG
EQU
H'0006'
T0CS
EQU
H'0005'
T0SE
EQU
H'0004'
PSA
EQU
H'0003'
PS2
EQU
H'0002'
PS1
EQU
H'0001'
PS0
EQU
H'0000'
EEIF
EQU
H'0004'
WRERR
EQU
H'0003'
WREN
EQU
H'0002'
WR
EQU
H'0001'
RD
EQU
H'0000'
;==========================================================================
;
RAM Definition
;==========================================================================
__MAXRAM H'CF'
__BADRAM H'07', H'50'-H'7F', H'87'
;==========================================================================
;
Configuration Bits
;==========================================================================
_CP_ON
EQU
H'000F'
_CP_OFF
EQU
H'3FFF'
79
_PWRTE_ON
EQU
H'3FF7'
_PWRTE_OFF
EQU
H'3FFF'
_WDT_ON
EQU
H'3FFF'
_WDT_OFF
EQU
H'3FFB'
_LP_OSC
EQU
H'3FFC'
_XT_OSC
EQU
H'3FFD'
_HS_OSC
EQU
H'3FFE'
_RC_OSC
EQU
H'3FFF'
LIST
__CONFIG
start
ORG
0x00
BSF
0x03,5
3FFB
MOVLW 0x1F
MOVWF 0x85
MOVLW 0x00
MOVWF 0x86
SHORT
BCF
0x03,5
CLRF
0x06
MOVLW 0x03
XORWF 0x05,0
BTFSS
0x03,2
GOTO
CORRECT
MOVLW 0x5B
MOVWF 0x06
GOTO
SHORT
0x03,2
GOTO
OPEN
MOVLW 0x4E
MOVWF 0x06
GOTO
OPEN
CORRECT
MOVLW 0x1F
XORWF 0x05,0
BTFSs
0x03,2
GOTO
SHORT
MOVLW 0x7E
MOVWF 0x06
GOTO
OPEN
END
80
The following is the list of the components used alongside the microcontroller for the bread
boarding and testing;
9 pieces of
1k Resistor
10k Resistor
10
100 Resistor
LM393 Comparator
After bread boarding and testing to be sure of the workability of the circuit, the result was
satisfactory and thus; transferred to the Vero board using soldering iron and lead.
81
CHAPTER FIVE
CONCLUSIONS AND FUTURE WORK
5.1 CONCLUSIONS
In this project, a methodology (sectionalisation) for an efficient, non-destructive digital
underground cable fault locator (DUCFL) was developed. The device can detect underground
cable faults such as short circuit and open circuit and also indicates a correct cable when the
cable is normal.
The digital cable fault locator is a precision instrument and easy to use. For sensing the data,
the instrument is provided with two terminals which are to be connected to the cable under
test. The built-in microcontroller with the locator circuit and analogue to digital converter
circuit collects analyses the data and spontaneously display the result (the particular type of
fault on the line) in digital format on the seven segment LED display unit within 10m range.
The digital underground cable fault locator developed was able to perform as expected on the
field and available fault scenarios. Its main limitation is the fact that the measurements and
monitoring must be conducted at regular uninterrupted intervals of 10m following the
underground mapping of the trouble spot.
82
REFERENCE
[1] Underground Distribution System Design and Installation Guide, Washington D.C.:
National Rural Electric Cooperative Association, 1993.
[2] W. F. Buddy, The basics of power cables, IEEE Transactions on Industry Applications,
vol. 30, no. 3, pp. 506 509, May June 1994.
[3] S. Y. King and N. A. Halfter, Underground Power Cables, New York: Longman Inc.,
1982.
[4] M. J. Mousavi and K. L Butler-Purry, Study of thermal aging effects on distribution
transformer solid insulation, in Proceedings of 34th North American Power Symposium,
Tempe, AZ, Oct. 2002, pp. 160-167.
[5] J. Densley, Ageing mechanisms and diagnostics for power cables an overview, IEEE
Electrical Insulation Magazine, vol. 17, no. 1, January February, 2001, pp. 14 - 22.
[6] Evaluation and Qualification of Electrical Insulation Systems, IEC Standard 60505, 1999.
[7] N. H. Malik, A. A. Al-Arainy, and M. I. Qureshi, Electrical Insulation in Power Systems,
New York: Marcel Dekker, 1998.
[8] N. Srinivas, and N. Ahmed, Condition assessment of distribution and transmission class
voltage cable systems, in 2003 IEEE 10th International Conference on Transmission and
Distribution Construction, Operation and Live-Line Maintenance, Orlando, FL, Apr. 2003,
pp. 194-201.
[9] G. J. Paoletti and A. Golubev, Partial discharge theory and technologies related to
medium-voltage electrical equipment, IEEE Transactions on Industry Applications, vol.
37, no. 1, pp. 90 103, Jan. Feb. 2001
[10] S. M. Miri and A. Privette, A survey of incipient fault detection and location techniques
for extruded shielded power cables, presented at the 26th Annual Southeastern Symposium
on System Theory, Athens, OH, Mar. 20-22, 1994, pp.402 405.
[11] W. E. Anderson, J. D. Ramboz, and A. R. Ondrejka, The detection of incipient faults in
transmission cables using time domain reflectometry techniques: Technical challenges,
IEEE Transactions on Power Apparatus and Systems, vol. PAS-101, no. 7, pp. 19281934,
July 1982.
[12] DTE Energy, Technologies, accessed on May 2005. [Online]. Available:
http://www.dtetech.com/technologies/cablewise/
83
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[33] www.best-microcontroller-projects.com/programming-microcontrollers-in-c.html;
accessed 14th October 2011.
[34] www.electricaltesting.co.uk/underground-cable-fault; accessed 4th March 2011
[35] www.valuetester.com/cable-fault-locator; accessed 4th March
[36] Paul Scherz: Practical Electronics for inventors, 1st edition, McGraw-Hill Companies,
2000.
[37]Francols Horlin and Andre Bourdoux: Digital Integrated circuit, 2nd edition, A John
Wiley and Sons Ltd. 2008.
85