Ha72500 TH

Interscan Navigation
Systems Pty. Ltd
Training
Handbook
DME Equipment
LDB-102
Handbook
HA72500-TH
LDB-102
DISTANCE MEASURING EQUIPMENT
TRAINING HANDBOOK
HANDBOOK
HA72500-TH
Interscan Navigation Systems

Pty Ltd
ABN 28 091 922 315
HA72500-TH
TRAINING HANDBOOK
for
DISTANCE MEASURING EQUIPMENT (DME) LDB-102
Type series A72500
This handbook consists of a selection of material from the standard equipment

handbook, specially chosen for use a student training notes and is intended to be
used only for this purpose; it does not contain information on, and is not intended
to be used as a basis for, equipment maintenance and alignment.
The material consists of the following standard handbook sections:
TABLE OF CONTENTS
SECTION 1
BRIEF SPECIFICAT ION and SPECIFICATION
SECTION 2
TECHNICAL DESCRIPTION
SECTION 4
MAINTENANCE PROCEDURES
APPENDIX A
OPERATING INSTRUCTIONS
CIRCUIT AND WIRING DIAGRAMS
All references occurring in the included text refer to the relevant section in the
standard handbook, which should be consulted if more detailed information is
required.
HA72500-TH
TABLE of CONTENTS
Section 1
Brief Specification
Section 2
Technical Description
Section 4
Maintenance Procedures
Appendix A
Operating Instructions
Circuit and Wiring Diagrams
HA72500-TH
LIST OF DRAWINGS
DRAWING TITLE
1A69737
1A69758
2A69758
1A69873
1-3A72500
1A72505
2A72505
1A72510
1A72511
1A72512
1A72514
1A72515
1A72516
1A72517
1A72518
1A72519
1A72520
1A72521
1A72522
1A72523
1A72524
1A72526
1A72530
1A72531
1A72532
1A72533
1A72534
1A72535
1A72540
1A72541
1A72542
1A72544
1A72545
2A72545
1A72547
2A72547
1A72549
2A72549
1A72550
1A72552
1A72553
1A72555
1A72556
1A72557
Attenuator
CIRCUIT
Power Supply System, Single AC
INTERWIRING
Power Supply System, Dual AC
INTERWIRING
250W RF Amplifier
CIRCUIT
LDB-102 DME 1kW System
BLOCK DIAGRAM
Rack Assembly, Single 1kW DME
INTERWIRING (3 sheets)
Transponder Wiring
INTERWIRING
Rack Assembly, Dual 1kW DME
Monitor Module
INTERWIRING
Main PWB Assembly, Monitor Module
CIRCUIT (14 sheets)
Peak Power Monitor
CIRCUIT
Test Interrogator
INTERWIRING
Main PWB Assembly, Test Interrogator
CIRCUIT (5 sheets)
RF Generator
CIRCUIT
RF Filter
CIRCUIT
Modulator and Detector
CIRCUIT
Reply Detector
CIRCUIT
Receiver Video
INTERWIRING
Main PWB Assembly, Receiver Video
CIRCUIT (5 sheets)
RF Source
CIRCUIT
IF Amplifier
CIRCUIT (2 sheets)
RF Amplifier
CIRCUIT
Main PWB Assembly, Transponder Power Supply CIRCUIT
Transmitter Driver
INTERWIRING
Pulse Shaper PWB Assembly
CIRCUIT (2 sheets)
Exciter
CIRCUIT
Medium Power Driver
CIRCUIT
Power Modulation Amplifier
CIRCUIT
1kW RF Power Amplifier
CIRCUIT
1kW PA Power Supply
INTERWIRING
Control and Status PWB Assembly
CIRCUIT (2 sheets)
DC-DC Converter PWB Assembly
CIRCUIT
1kW PA Connector PWB Assembly
CIRCUIT
RF Panel - Single DME
CIRCUIT
RF Panel - Dual DME
CIRCUIT
RF Panel PWB Assembly - Single DME
CIRCUIT
RF Panel PWB Assembly - Dual DME
Power Distribution Panel - Single DME
CIRCUIT
Power Distribution Panel - Dual DME
CIRCUIT
Control and Test Unit
CTU Processor PWB Assembly
CIRCUIT (5 sheets)
CTU Front Panel PWB Assembly
CIRCUIT (2 sheets)
RCMS Interface PWB Assembly
CIRCUIT (2 sheets)
Transponder Subrack Motherboard
CIRCUIT
External I/O PWB Assembly
CIRCUIT
DRAWING
NUMBER
69737-3-24
69758-3-23
69758-3-28
69873-3-09
72500-2-26
72505-2-06
72505-2-37
72505-2-17
72510-3-06
72511-1-01
72512-3-01
72514-3-04
72515-1-01
72516-2-01
72517-4-02
72518-2-01
72519-3-01
72520-3-04
72521-1-01
72522-3-01
72523-1-01
72524-3-01
72526-1-01
72530-3-03
72531-1-01
72532-2-01
72533-3-01
72534-3-01
72535-1-07
72540-1-03
72541-1-01
72542-1-01
72544-1-01
72545-3-04
72545-3-05
72547-1-01
72549-3-06
72549-3-16
72550-1-03
72552-1-02
72553-1-02
72555-1-02
72556-2-01
72557-1-01
EMERGENCY CARDIOPULMONARY RESUSCITATION FOR

UNCONSCIOUS PATIENT.
STAY WITH VICTIM CALL FOR HELP AND COMMENCE
RESUSCITATION.
AIRWAY:
Clear the airway. Quickly turn victim
on side and remove foreign material
from mouth. Place neck and jaw in
correct positions.
Check breathing and listen to breath, watch for

chest movement. If breathing, leave victim on
side and keep the airway clear.
BREATHING:
If not breathing, quickly turn the victim Check circulation, carotid pulse. If present,
on his back and commence expired air continue expired air resuscitation at a rate of 15
per minute. Check the
resuscitation. mouth or mouth to nose,
circulation after 1 minute
using jaw lift
and then every 2
method to open
minutes. If breathing
airway. Give 5
returns, place the victim
full ventilations
on side and keep the
in ten seconds.
airway clear.
CIRCULATION:
Check carotid pulse. If absent, begin external cardiac compression. Place the heel of one
hand on the lower half of the sternum and lock the other hand to the first by grasping
wrist or interlocking fingers. Keep fingers off the chest.
One Operator:
2 ventilations,
15 compressions,
4 cycles per
minute.
Two Operators:
1 ventilation,
5 compressions,
12 cycles per
minute.
CHECK PROGRESS
GET HELP
- If effective
Carotid pulse felt with each
compression.
Skin will become pinker.
In metropolitan areas, dial 000 and ask

for ambulance service. In country
areas, contact your local ambulance
service.
National Heart Foundation of Australia

PE3 (rev) 1984
S:\Engineering\Handbooks\Common\NHF-CPR.doc
HA72500
SECTION 1
SECTION 1
BRIEF DESCRIPTION AND SPECIFICATION
1-i
HA72500
SECTION 1
TABLE of CONTENTS
1.
BRIEF DESCRIPTION AND SPECIFICATION........................................... 1-1

1.1
FUNCTIONAL DESCRIPTION
1-1
1.1.1 Introduction ................................................................................................ 1-1
1.1.2 Application ................................................................................................. 1-1
1.2
SYSTEM OPERATION
1-1
1.2.1 Introduction ................................................................................................ 1-1
1.2.2 Distance Measuring Function..................................................................... 1-1
1.2.3 DME Pulse Generation .............................................................................. 1-2
1.2.4 System Squitter.......................................................................................... 1-2
1.2.5 Maximum Reply Rate................................................................................. 1-2
1.2.6 Identification Message ............................................................................... 1-3
1.2.7 Range and Echo ........................................................................................ 1-3
1.2.8 Remote Control and Monitoring System..................................................... 1-3
1.3
PERFORMANCE SPECIFICATION
1-3
1.4
DOCUMENTATION
1-10
1-ii
HA72500
SECTION 1
LIST of FIGURES
Figure 1-1
DME Principle .......................................................................................1-2
LIST of TABLES
Table 1-1
Table 1-2
Performance Characteristics Summary.....................................................1-4

Controls and Indicators .............................................................................1-7
1-iii
HA72500
SECTION 1
1. BRIEF DESCRIPTION AND SPECIFICATION

1.1
FUNCTIONAL DESCRIPTION
1.1.1
Introduction
This document describes the Distance Measuring Equipment (DME) series LDB-102
type A72500. It contains information which includes equipment description, alignment
procedures, installation and operation instructions, component parts lists, and circuit
diagrams.
The LDB-102 is designed and manufactured to meet the requirements laid down by the
International Civil Aviation Organisation (ICAO) authority for this type of equipment. The
LDB-102 is fully solid state, and uses digital techniques to minimise the number of
adjustable controls.
1.1.2
Application
The DME system is a navigational system which provides slant-range distance

information between aircraft and a ground station.
The system consists of a transmitter/receiver (interrogator) in the aircraft, and a
receiver/transmitter (transponder) ground station. The interrogator transmits
interrogation pulses to the transponder, which on receipt of the interrogation pulses is
triggered to transmit a sequence of reply pulses which have a predetermined time delay.
The time difference between interrogation and reply is measured in the interrogator and
translated into a distance measurement which is presented on a digital display in the
aircraft cockpit; this display is continuously updated.
1.2
SYSTEM OPERATION
1.2.1
Introduction
This section describes the operating principles of the DME and the options available for
remote control of the equipment.
1.2.2
Distance Measuring Function
The DME system provides each aircraft with up-to-date information regarding the slantrange distance between the aircraft and the selected DME ground station. By using the
correct airborne equipment h is also possible for the interrogating aircraft to establish the
rate of closure and the flight time to a ground station.
The DME system has a transmitter/receiver (interrogator) in the aircraft and a
receiver/transmitter (transponder) operating as the ground beacon. The UHF DME
operates in the L band, from 962 MHz to 1213 MHz. This band is divided into 126
10MHz channels for interrogation, and 126 1 MHz channels for transponder replies with
the interrogation frequency and reply frequency always differing by 63 MHz. The number
of channels available is doubled by the use of X and Y channels which define the pulse
separation for the interrogation and reply pulses.
Initially, the airborne equipment is set to the correct frequency for the desired ground
station. The interrogator transmits pairs of pulses at the interrogation frequency at a
repetition rate of approximately 120 pulse-pairs per second (pp/s) (this is called
'searching' mode). The transponder, having identified these pulses as valid
interrogations, introduces a 50 microsecond delay after each interrogating pulse-pair and
transmits reply pulse-pairs at the reply frequency. The airborne interrogator
automatically compares the lapsed time between transmission and reception, subtracts
the 50 microsecond delay, and displays the result in nautical miles. Once the
1-1
HA72500
SECTION 1
interrogator receives replies to its interrogations, the interrogator 'locks' onto the reply
pulses and reduces its transmitted repetition rate to approximately 30 pp/s (this is called
'tracking' mode).
Figure 1-1
1.2.3
DME Principle
DME Pulse Generation
The RF pulses transmitted by both the interrogator and the ground transponder consist
of a pair of 'Gaussian-shaped' pulses; the separation between pulses depends on
whether an X channel or a Y channel has been selected. The duration of the pulses is in
all cases a nominal 3.5 microseconds as measured at the half-amplitude point. The
pulse separation for X channels, for both interrogation and reply pulses, is 12
microseconds; for Y channels the pulse separation is 36 microseconds for interrogation
pulses, and 30 microseconds for reply pulses. The channel frequencies and spacings for
all channels are shown in Appendix L.
1.2.4
System Squitter
Airborne DME receivers require a continuous stream of random pulses to ensure correct
operation; however, unless there are interrogating aircraft present, the airborne receivers
may not receive the required minimum pulse rate. To ensure that the airborne receivers
always receive at least a minimum pulse rate, the DME transponder will generate 'extra'
pulses in a random fashion at a minimum pulse rate of 945 pp/s. These extra random
pulse-pairs are called squitter. At the time when no aircraft are interrogating, only the
squitter is being transmitted, at an average rate of 945 pp/s; however, as the number of
authentic interrogations increases the squitter rate is reduced, and becomes zero when
the live interrogation rate reaches 945 pp/s.
1.2.5
Maximum Reply Rate
As the pulse rate of the interrogations increases, a limit is reached where the
transponder will not allow further interrogations to be serviced. This limit is reached at a
reply rate of approximately 2800 pp/s, above which the transponder would become
overloaded. To avoid overloading, the transponder detects the high rate of replies and
1-2
HA72500
SECTION 1
causes the receiver automatic gain control to limit the gain of the receiver until the
weaker, more distant, aircraft are excluded from the transponder, thus lowering the
transponder loading. Should the system reply rate still exceed the 2800 pp/s limit, video
output pulses are randomly suppressed to limit the maximum reply rate to 2800 pp/s.
1.2.6
Identification Message
Each operational DME is identified by a 2-character or 3-character Morse code message

which is transmitted every 40 seconds. Each identification code (ident) is unique and
identifies a specific DME site. The identification message code is programmed by preset
controls within the equipment, and can be readily altered if the ident is required to be
changed.
Frequently, DME is collocated with ILS or VOR equipment and for this reason the DME
may operate either as a master or as a slave for the generation and transmission of the
station identification message. When the DME is operating as a slave unit, any failure of
the external ident generator will cause the DME to internally generate and transmit the
ident in place of the failed unit.
1.2.7
Range and Echo
The normal slant range for a DME system operating in the ultra high frequency band is
approximately 200 nautical miles (370 km) for good conditions at maximum transponder
sensitivity. This maximum range may be seriously degraded, however, by the terrain
surrounding the installation and by the maximum demands of interrogating aircraft.
A major contributing factor to distance accuracy degradation is the effect of echoes on
the interrogation pulses arriving at the transponder. The shortest path is the direct line
between the aircraft and ground transponder and thus the wave front taking this path
arrives first. Other wave fronts may reflect off the terrain, buildings, and other objects,
and thus arrive at any indeterminate time after the arrival of the direct pulse. Should the
first pulse of a pulse-pair suffer such echo conditions it is possible that a reflection could
arrive at the DME antenna at the same time as the direct second pulse of the
interrogating pulse-pair; and the two pulses may arrive in any phase relationship. It is
possible under these conditions for the second pulse of a pulse-pair to undergo
distortion leading either to cancellation or to a shift in timing such that the transponder
cannot recognise the receipt of a valid pulse-pair.
Short distance echo suppression is included within the LDB-102 to minimise the
problems associated with such reflections. As well, long distance echo suppression is
included to eliminate recognition of echoes that are synchronised with the interrogation
pulses but arrive in the order of up to 320 microseconds late.
1.2.8
Remote Control and Monitoring System
The Remote Control and Monitoring System (RCMS) has a relay-based interface to the
DME, providing on/off control and operational status monitoring. The operator console at
the central she permits control of the DME in the same manner as that provided on the
DME control panel.
1.3
PERFORMANCE SPECIFICATION
The performance parameters of the major system functions and the location and
functions of all system controls and indicators are given in Table 1-1 and Table 1-2
following.
1-3
HA72500
Table 1-1
CHARACTERISTIC
Power Supply
Requirements
Environmental
Condition Limits
SECTION 1
Performance Characteristics Summary

PARAMETER
VALUE/LIMITS
Voltage
Current drain (normal operation, 27.0 volts
DC)
Single 1 kW, Single Monitor
at 945 Hz (squitter rate)
at 2800 Hz (maximum traffic)
Dual 1 kW, Dual Monitor
at 945 Hz (squitter rate)
at 2800 Hz (maximum traffic)
21 to 28 volts
Temperature (indoor equipment)

Relative humidity (indoor equipment)
Antenna
Frequency and
Pulse
Characteristics
Transmitter
Operating frequency
(set by installed crystals)
Pulse spacing (microseconds)
Transmit
X channels
Y channels
Decode
X channels
Y channels
Transmitter power
(measured at rack connector)
Low power
High power
Frequency accuracy
Transmitter pulse count
Minimum
Maximum
Note that interrogation has precedence
over squitter. Squitter pulses are only
generated if the reply rate to authentic
interrogation is less than 945 pulse-pairs
per second
Pulse shape
Width
Rise time
Fall time
Spectrum
Ident
Rate
Internal generator
Repeat interval
Dot duration
Dash duration
Transmitted ident
6 amperes
12 amperes
7 amperes
13 amperes
-10 to 60 degrees C
95% (to 45 degrees C)
50% (45 to 60 degrees C)
-40 to 70 degrees C (100% RH)
Can be set to any of 252 channels
in the 962-1213 MHz band
12.00.1
30.00.1
12.01.0
36.01.0
> 150 watts peak

> 1 kW peak
+0.002%
945 pulse-pairs/second
2800 pulse-pairs/second
3.5 0.5 microseconds

DME (N)
1350 25 pulse-pairs/second
40 seconds nominal
0.13 seconds nominal
Equals 3 dots
th
Every 4 internally generated or
externally provided from associated
navaid
1-4
HA72500
CHARACTERISTIC
Receiver
SECTION 1
PARAMETER
VALUE/LIMITS
Receiver triggering level
-91 dBm at cabinet connector
Adjacent channel
rejection
80 dB
Spurious rejection
80 dB
IF rejection
80 dB
Frequency stability
System time delay
Test Interrogator
and Monitor
+0.002% kHz
X channel
35 to 50 microseconds
Y channel
50 to 56 microseconds
Accuracy
For interrogation signal levels

between -81 dBm and -10 dBm at
cabinet connector and throughout
the range of service conditions the
bias error shall not exceed +0.5
microseconds
These modules continuously interrogate the transponder and monitor its reply
and initiate an alarm for the following fault conditions:
REPLY DELAY
Alarm limits can be set in 0.1 microseconds steps up
to +1.0 microseconds
SPACING
Alarm limits can be set in 0.1 microseconds steps up
to +1.0 microseconds
EFFICIENCY
Alarms when efficiency drops to 60%
REPLY RATE
Alarms when reply rate fails below 833 pulse-pairs
per second or exceeds 3000 pulse-pairs per second
PULSE WIDTH
Alarms if not in range 3.0 to 4.0 microseconds
PULSE RISE TIME
Alarms if greater than 3.0 microseconds
PULSE FALL TIME
Alarms if greater than 3.5 microseconds
POWER OUTPUT
Alarm point can be set to between 1 dB and 6 dB
below nominal level
IDENT
Alarms when ident is absent for more than a period
which can be set to be between 2 and 128 seconds in
1 second steps
MONITOR
The monitor checks its failure circuitry on reply delay
and reply spacing parameters. It initiates an alarm if it
passes a faulty reply
Injection levels of test
Efficiency monitoring: -85 dBm
interrogations into
Reply delay monitoring: -70 dBm
receiver
1-5
HA72500
CHARACTERISTIC
AC Mains Power
Supply
SECTION 1
PARAMETER
Output voltage
range
Normal operation
VALUE/LIMITS
21-28 volts, adjustable
Test operation
18-33 volts. adjustable

30 amperes maximum
200,210,220,230,240,250,260
volts +10%
Input frequency
48 to 65 Hz
Line regulation
1 % for +15% variation
Load regulation
0.45V over range 0 to 30 amperes
Noise and ripple
200 mV peak to peak
Variation of output voltage with temperature Within 0.2V over temperature
range
Transient response
0-20 amperes
Less than 2 volts; 50 milliseconds
recovery
20-0 amperes
Less than 2 volts; 200
milliseconds recovery
Efficiency
70% at 27 volts, 10 amperes
Overcurrent protection
Current limits can be set over the
range 20 amperes to 30 amperes
Reverse voltage protection
Fuse
Ambient temperature range
-10 to +60 degrees C
Voltage
24 volts nominal
Capacity (discharged at 10-hour rates to
105 AH (for specified operating
1.85 volts per cell - AS1981)
time)
Operating time
At maximum
6.5 hours - dual DME
transponder reply
7.0 hours - single DME
rate
At squitter reply rate 12 hours minimum - dual DME
14 hours minimum - single DME
Output current rating
input voltage
Battery Supply
1-6
HA72500
Table 1-2
SECTION 1
Controls and Indicators
UNIT/MODULE
CONTROLTYPE
Control Panel
Pushbutton with
LED indicators
Rotary switch
10 positions
110
LED indicators
FUNCTION
SELECT MAIN
(3 buttons)
SETTINGS or INDICATION
OFF/RESET (Alarms)
Yellow
NO1
Green
NO2
Green
MONITOR ALARM
INHIBIT
Red
(toggle action)
(NORMAL)
MAINTENANCE (mode)
ON
Red
(toggle action)
(OFF)
SOURCE (of control)
LOCAL
Yellow
(2 buttons)
REMOTE
Green
Green
RECYCLE (after shutdown) ON
(toggle action)
(OFF)
ALARM DELAY
Delay in seconds from fault appearing
until the CTU takes action.
STATUS
ALARM REGISTER
(indicates alarm status at
last TRANSFER/
SHUTDOWN action by the
equipment)
POWER
TEST
(switches not in NORMAL
position)
NO 1 ON
NO 2 ON
NORMAL
TRANSFER
SHUTDOWN
MAINTENANCE
DELAY
SPACING
EFFICIENCY
TX RATE
RF POWER
IDENT
PULSE SHAPE
ANTENNA
PRIMARY
SECONDARY
MONITOR
CTU
AC PWR NORM
BATT CHG 1
BATT CHG 2
BATT LOW
MODULES
ANT RELAY
Green
Green
Green
Yellow
Red
Red
Red
Red
Red
Red
Red
Red
Red
Red
Red
Red
Red
Red
Green
Green
Green
Red
Red
Red
1-7
HA72500
UNIT/MODULE
CONTROLTYPE
Test Facility
Pushbuttons
SECTION 1
FUNCTION
Five pushbuttons, the functions of which are definable by the bottom
line of the TEST FACILITY display. Through a menu of options, the
following information can be selected by these pushbuttons to be
displayed on the top line of the TEST FACILITY display.
Parameters
Spacing
Transmitter pulse spacing
Delay
PwrOut
Effncy
Signal Levels
D. Rate
Tx. Rate
Width
Rise
Fall
Vcal
Rcal
Tcal
RV.Osc
RV.RF
TD.Drv
TD.Mod
PA.Mod
PA.Drv
PA.0ut
TI RF
Power Supply Voltages Aux.24V
PA.HT
TP.15V
TP.18V
Drv.HT
Status
MON PS
RV PS
Tl PS
RV TRIG
Reply delay
RF power out
Reply efficiency, when
maintenance mode is OFF.
When maintenance mode is
ON, a sub-menu under this
choice gives access to
(Reply) Efficiency (normal
levels)
(Reply) Efficiency (high level)
(Reply) Efficiency (low level)
Decoded pulse rate
Transmitted pulse rate
Transmitted pulse width
Transmitted pulse rise time
Transmitted pulse fall time
Voltage measurement calibration
Rate measurement calibration
Time measurement calibration
Receiver video local oscillator
Receiver video transmitter RF
drive
Transmitter driver RF output
Transmitter driver modulation
1 kW RF amplifier modulator
output
1 kW RF amplifier driver output
1 kW RF amplifier final output
Test interrogator interrogation
Auxiliary 24 volts supply
Power amplifier high tension
supply
Transponder power supply:
15 volts output
18 volts output
high tension output
Monitor power supply status
Receiver video power supply
status
Test interrogator power supply
status
Receiver video trigger signal to
transmitter driver
1-8
HA72500
SECTION 1
UNIT/MODULE
CONTROLTYPE
Test Facility
Pushbuttons
(continued)
(continued)
Pushbutton
Pushbutton
FUNCTION
Miscellaneous (only
Reset
Restart count set to zero
available if
Alarm1
Modifies alarm register display
MAINTENANCE mode
so that only those alarms due
not selected)
to Transponder 1 are displayed
Alarm2
Modifies alarm register display
so that only those alarms due
to Transponder 2 are displayed
LEDTst
Turns on all LEDs on the CTU
front panel
Version
CTU software version identity
Ident Source (for speaker)
Mon1
Monitor module 1
Mon2
Monitor module 2
2440 Hz
2240 Hz tone
OFF
Off
Source Selection
Ch1
Selects the test
(only available if
interrogator/monitor module to
Ch2
MAINTENANCE mode
use for parameter, level and
is selected)
power supply voltage
measurements
Delay
Delay upper and lower limits
Fault Limits
(only available if
Spacing
Spacing upper and lower limits
MAINTENANCE mode Effncy
Efficiency lower limit
is selected)
Tx.Rate
Transmitted pulse rate upper
and lower limits
Ant.Pwr
Antenna power lower limit
ESC(APE)
Returns to topmost menu
Sets interrogation rate of test interrogator.
TI RATE
Selected rate is displayed on top right hand
(only available if
MAINTENANCE mode corner of the TEST FACILITY display.
is selected)
1 kHz
Toggle action between
rates of 1 kHz and the
normal rate (50 Hz for
dual, 100 Hz for single)
10 kHz
Rate of 10 kHz while
button held pressed.
1-9
HA72500
1.4
SECTION 1
DOCUMENTATION
Equipment Serial Numbers

All equipment assemblies have individual serial numbers allocated. These are used to
record the history of the equipment.
Modification Records
The modification status of all equipment is controlled with a modification register, and a
modification record is attached to each item of equipment. Navaid users are not normally
notified of any change of modification status as equipments with differing modification
status are functionally interchangeable.
Modification Bulletins
During the production life of equipment, design changes may be made to alter or
improve particular performance characteristics. These changes are documented on a
Technical Service Bulletin (TSB) which will be forwarded to users as appropriate.
Type Numbering System
All manufactured equipments; and subassemblies are identified by a 7-digit type
number.
For navaid equipments the type number has the form YAXXXXX, in which:
'XXXXX is a 5-figure number which is unique to the particular assembly.
Y is a prefix digit which identifies a particular variant of assembly type 'XXXXX.
A signifies that the equipment is avionics equipment.
All correspondence relating to manufactured items should quote the applicable,

complete type number.
1-10
HA72500
SECTION 2
SECTION 2
TECHNICAL DESCRIPTION
2-i
HA72500
SECTION 2
TABLE of CONTENTS
2.
TECHNICAL DESCRIPTION ...................................................................... 2-1

2.1
SYSTEM DESCRIPTION
2-1
2.1.1 Principles of Operation............................................................................... 2-1
2.1.2 Signal Flow ................................................................................................ 2-1
2.1.3 Mechanical Description .............................................................................. 2-5
2.1.4 Rack Wiring................................................................................................ 2-7
2.2
SUBSYSTEM DESCRIPTIONS
2-7
2.2.1 Introduction ................................................................................................ 2-7
2.2.2 Transponder Subsystem ............................................................................ 2-7
2.2.3 Control and Test Subsystem ...................................................................... 2-8
2.2.4 Power Supply Subsystem .......................................................................... 2-9
2.3
MODULE DESCRIPTIONS
2-12
2.3.1 Introduction .............................................................................................. 2-12
2.3.2 RF Panel Single DME 1A72545 and RF Panel Dual DME 2A72545 ........ 2-12
2.3.3 Receiver Video 1A72520.......................................................................... 2-15
2.3.4 Transmitter Driver 1A72530 ..................................................................... 2-30
2.3.5 Transponder Power Supply 1A72525....................................................... 2-39
2.3.6 2.3.6 1kW RF Power Amplifier Assembly 1A72535 .................................. 2-41
2.3.7 1kW PA Power Supply 1A72540 .............................................................. 2-44
2.3.8 Test Interrogator 1A72514 ....................................................................... 2-47
2.3.9 Monitor Module 1A72510 ......................................................................... 2-60
2.3.10 Control and Test Unit 1A72550 ................................................................ 2-86
2.3.11 Power Distribution Panel Single DME 1A72549 and Power Distribution Panel
Dual DME 2A72549............................................................................................ 2-98
2.3.12 AC Power Supply 3A71130...................................................................... 2-99
2.3.13 Power Supply System Dual AC 2A/3A69758.......................................... 2-100
2.3.14 Transponder Subrack 1A72513.............................................................. 2-101
2.3.15 CTU Subrack 1A72506 .......................................................................... 2-101
2.3.16 External I/O PWB Assembly 1A72557.................................................... 2-101
2.3.17 1kW PA Power Supply Frame 1A72503................................................. 2-102
2-ii
HA72500
SECTION 2
LIST of FIGURES
Figure 2-1
Figure 2-2
Figure 2-3
Figure 2-4
Figure 2-5
Figure 2-6
Figure 2-7
Figure 2-8
Figure 2-9
Figure 2-10
Figure 2-11
Figure 2-12
Figure 2-13
Figure 2-14
Figure 2-15
Figure 2-16
Figure 2-17
Figure 2-18
Figure 2-19
Figure 2-20
Figure 2-21
Figure 2-22
Figure 2-23
Figure 2-24
Figure 2-25
Figure 2-26
Figure 2-27
Figure 2-28
Figure 2-29
Figure 2-30
Figure 2-31
Figure 2-32
Figure 2-33
Figure 2-34
Figure 2-35
Figure 2-36
Figure 2-37
Figure 2-38
Figure 2-39
Figure 2-40
Block Diagram Single 1kW DME ...........................................................2-3

Block Diagram Dual 1kW DME..............................................................2-4
Layout of DME LDB-102 Single 1kW Rack............................................2-5
Layout of DME LDB-102 Dual 1kW Rack ..............................................2-6
Transponder Subsystem Diagram.........................................................2-8
Control and Test Subsystem Diagram...................................................2-9
Single 1kW DME Power Distribution ...................................................2-10
Dual 1kW DME Power Distribution......................................................2-11
Directional Coupler 1A69755...............................................................2-13
Directional Coupler 2A69755...............................................................2-14
Waveforms for Interrogation Pulse Processing....................................2-18
Ident Keyer Waveforms.......................................................................2-22
Transmitter Driver Block Diagram .......................................................2-30
Shaped Pulse Generation Waveforms ................................................2-33
1kW RF Power Amplifier Block Diagram .............................................2-42
CTU Bus Timing - Read ......................................................................2-49
CTU Bus Timing - Write ......................................................................2-49
Modulator and Detector Waveforms ....................................................2-56
Delay Monitor......................................................................................2-62
Delay Monitor Waveforms ...................................................................2-62
Spacing Monitor ..................................................................................2-64
Spacing Monitor Waveforms ...............................................................2-64
Efficiency Monitor................................................................................2-66
Rate Monitor .......................................................................................2-67
Ident Monitor .......................................................................................2-69
Effective Radiated Power Monitor .......................................................2-71
Antenna Integrity Monitor ....................................................................2-72
Width Monitor Waveforms ...................................................................2-74
Pulse Shape Monitor ...........................................................................2-75
Rise Time Monitor Waveforms ............................................................2-76
Fall Time Monitor Waveforms..............................................................2-77
Level Monitor ......................................................................................2-78
Fault Line Driver..................................................................................2-79
CTU Block Diagram ............................................................................2-86
CTU Processor Board Block Diagram .................................................2-88
CTU Front Panel Board Block Diagram...............................................2-94
RCMS Interface Board Block Diagram ................................................2-97
Single Power Distribution Panel Block Diagram ..................................2-99
Dual Power Distribution Panel Block Diagram.....................................2-99
Power Supply System Dual AC 2A69758 Layout ..............................2-100
LIST of TABLES
Table 2-1
Table 2-2
28
Table 2-3
Summary of Controls and Indicators: RF Panel (Dual) ............................2-15

Summary of Front Panel Controls and Indicators : Receiver Video Module.2Summary of Internal Controls : Receiver Video Module ..........................2-29
2-iii
HA72500
SECTION 2
Table 2-4 Pulse Shaper Board Test Points .............................................................2-35

Table 2-5 Summary of Front Panel Controls and Indicators : Transmitter Driver.....2-37
Table 2-6 Summary of Internal Controls : Transmitter Driver ..................................2-38
Table 2-7 Summary of Front Panel Controls and Indicators : Transponder Power
Supply 2-40
Table 2-8 Summary of Internal Controls : Transponder Power Supply ....................2-41
Table 2-9 Summary of Front Panel Controls and Indicators : PA Power Supply......2-46
Table 2-10
Summary of Internal Controls : PA Power Supply ...............................2-46
Table 2-11
Summary of Front Panel Controls and Indicators : Test Interrogator
Module 2-58
Table 2-12
Summary of Internal Controls: Test Interrogator Module .....................2-59
Table 2-13
Summary of Front Panel Controls and Indicators : Monitor Module .....2-83
Table 2-14
Summary of Internal Controls : Monitor Module...................................2-84
Table 2-15
Ident PLD Outputs: MA_IDENT_IN_1,2, MA_IDENT_OUT,
IDENT_TONE_TRANSFORMER, DET_IDENT_KEY .........................................2-90
Table 2-16
Ident PLD Output: IDENT+ CPU_TONE..............................................2-90
Table 2-17
Ident PLD Output: IDENT_ON.............................................................2-91
Table 2-18
CTU Processor Board LED Indicators .................................................2-91
Table 2-19
CTU Processor Board Links................................................................2-92
Table 2-20
CTU Processor Board D19 and D24 Inputs.........................................2-92
Table 2-21
CTU Processor Board D18 and D23 Outputs ......................................2-93
Table 2-22
CTU Front Panel Address Map ...........................................................2-95
Table 2-23
CTU Front Panel Switch Scanner and Coder Output...........................2-96
Table 2-24
RCMS Interface Address Map.............................................................2-97
2-iv
HA72500
SECTION 2
2. TECHNICAL DESCRIPTION
2.1
SYSTEM DESCRIPTION
2.1.1
Principles of Operation
The LDB-102 series DME equipment is available in several standard configurations,

depending on RF power, duplication and primary power requirements.
It is available as either a single equipment or dual equipment configuration; each of
these may be fitted with either low power or high power RF amplifiers. The basic
transponder provides modulation and RF drive to a power amplifier assembly which
raises the power output to either 200 watts or 1kW
Single Transponder - Single Monitor
The basic transponder assembly consist of five modules, a control panel, an RF
distribution panel (mounted behind the control panel), and a DC distribution panel. Low
power and high power amplifier assemblies fed by a driver amplifier boosts the peak
power to more than 200 watts for the low power version and more than 1kW for the high
power version.
Aircraft interrogation signals from the antenna pass through the RF panel to the receiver
and video circuits which process the signals. If the signals are valid interrogations, then
a reply is initiated through the RF power amplifiers and RF panel back to the antenna for
transmission.
A test interrogator, in conjunction with a monitor, continuously interrogates the
transponder to check that it is performing correctly. These signals pass through the
transponder in the same manner as those from aircraft, but now the replies are coupled
from the beacon output and processed by the monitor to verify that the DME signal
parameters are within tolerance. The monitor itself is automatically checked for correct
operation.
An AC mains power supply, which converts the incoming AC supply voltage to a nominal
24 volts DC suitable for the rack as well as charging and standby battery bank, can be
included.
Dual Transponder - Dual Monitor
To provide this configuration, a second transponder assembly of five modules is added
along with a second RF power amplifier (200 watts or 1kW).
Additionally, a single RF panel is replaced by a dual version. A dual 1kW DME has the
AC power supply/battery charger located outside the basic equipment rack.
2.1.2
"
Signal Flow
REFER Figure 2-1 for Single 1kW DME

Figure 2-2 for Dual 1kW DME
Block Diagram 72500-2-26
The following description refers to a 1kW single system, the signal flow in a dual system
being essentially the same for each of the transponders in the system.
Figure 2-1 and Figure 2-2 show simplified block diagrams of the basic single and dual
configurations. A more detailed block diagram is shown in Drawing 72500-2-26
Interrogation signals from an aircraft are received by the DME antenna which is
connected to the RF panel in the DME equipment. In this assembly, the signals pass
through a directional coupler and circulator to the preselector filter. The circulator
2-1
HA72500
SECTION 2
prevents the transmitter output from coupling directly into the receiver. The preselector,
comprising three coupled resonant cavities tuned to the receive frequency, reject the IF
image frequency, rejects unwanted spurious frequencies and gives further attenuation to
the transmitter output frequency. The interrogation signals then pass to the receiver
video module.
The receiver video module detects and decodes on-channel interrogations and encodes
the synchronous reply trigger pulse pair. Random reply pulse pairs are added, if
necessary, to the synchronous replies to maintain a minimum reply rate of 915 Hz. The
maximum reply rate is limited to a nominal 2800 Hz by reducing receiver sensitivity. The
keyed identification signal (ident) occurs every 40 seconds, the 'mark' of the ident
replacing normal reply pulses with a 1350 Hz pulse train.
Receiver output reply pulse pairs trigger the modulation generator in the transmitter
driver module, producing RF pulses which are connected to the 1kW RF power amplifier
module. The excitation frequency for the transmitter driver is provided by the local
oscillator in the receiver video module.
The output from the power amplifier is connected back to the RF panel, where it passes
through the circulator and directional coupler to the antenna for the reply transmission to
the aircraft. In a dual system, the RF panel includes a coaxial transfer relay to connect
either of the transponders to the antenna, the other being terminated in a dummy load.
The equipment also has a test interrogator and a monitor. These units are used together
to check the performance of the DME. The test interrogator continuously interrogates the
DME in a similar manner to an aircraft. This invokes the transponder to generate reply
pulses; these are detected and processed by the monitor to verity that the signal
parameters of the replies being generated by the transponder are within acceptable
limits.
The test interrogators inject monitoring interrogating signals via a directional coupler in
the main antenna line, and operate at a combined PRF of 100 Hz. In a dual system, two
test interrogators are interconnected to prevent the interrogation of one falling in the
transponder dead-time produced by the other. Efficiency is monitored at an RF level of
-85 dBm, and transponder delay and reply pulse separation at an RF level of -70 dBm by
successive interrogations. The signals pass through the circulator and preselector to the
receiver video, where they are processed.
Transponder output pulses are sampled in the directional coupler and detected in the
reply detector of the test interrogator module. Processing within the test interrogator
separates out the synchronous replies from all other non-synchronous replies and
squitter.
The monitor module processes output signals from the test interrogator and provides a
pass or fail signal to the control and test unit for each monitored parameter. The monitor
itself is periodically checked by a self-test function initiated by the control and test unit;
this confirms that the monitor is capable of registering a fault for the two primary
parameters of reply delay and pulse spacing.
2-2
HA72500
Figure 2-1
SECTION 2
Block Diagram Single 1kW DME
2-3
HA72500
Figure 2-2
SECTION 2
Block Diagram Dual 1kW DME
2-4
HA72500
2.1.3
SECTION 2
Mechanical Description
The LDB-102 DME is designed to be mounted in a standard 483 mm (19-inch) rack. The
dimensions of the rack for both single and dual DME racks are 1800 mm high by 560
mm wide by 560 mm deep.
The bulk of the electronics is contained within five modules each of 6 rack units height
(267 mm) which plug into the transponder subrack and are secured by holding screws to
the rack frame.
Figure 2-3
Layout of DME LDB-102 Single 1kW Rack
2-5
HA72500
Figure 2-4
SECTION 2
Layout of DME LDB-102 Dual 1kW Rack
The CTU Subrack (1A72506) houses the Control and Test Unit (1A72550) and the
Power Distribution Panel (1A72549). The CTU subrack is screwed to the rack and is 6
rack units (267 mm) high.
Behind the CTU subrack is the RF Panel (1A72545 for single configuration or 2A72545
for dual), on which is mounted the directional coupler(s), preselector(s), circulators and
other RF circuitry.
In 1kW transponders the 1kW RF Power Amplifier (1A72535) and the 1kW PA Power
Supply (1A72540) are both screwed to the rack. They together occupy a 6-unit (267 mm)
high space, with the 1kW power amplifier at the back of the rack and the 1kW PA power
supply at the front of the rack. The 1kW PA power supply is located on hinges which
swing down to give easy access to the unit. The 1kW amplifier, consisting of a
modulating 180-watt stage and ten 250W RF amplifiers together with their associated
splitters and combiners, is mounted on a heat sink which is screwed to the rear of the
rack. A DC-DC converter, which supplies the power amplifier, is mounted on the inside
of the front panel, which swings back to give access to the components.
The AC power supply/battery charger, when fitted, occupies 8 rack units (356 mm)
height, and is 437 mm deep. In a single transponder station, this supply is normally
2-6
HA72500
SECTION 2
mounted in the bottom part of the main equipment rack. In a dual transponder, two of
these supplies are mounted in a separate rack as Dual AC Power Supply 2A/3A69758.
If standby batteries are used, these are housed in a separate, ventilated enclosure which
may be either inside or outside the main equipment shelter.
The physical layout of the 1kW dual transponder, dual monitor, AC supply version is
shown in Figure 2-4.
2.1.4
"
Rack Wiring
REFER Rack Interwiring (Single 1kW DME) 72505-2-06

Rack Interwiring (Dual 1kW DME) 72505-2-17
Rack interwiring is shown in these drawings, which each consist of three sheets:
Sheet 1 shows RF cable interwiring.
Sheet 2 shows signal interwiring.
Sheet 3 shows power interwiring.
2.2
SUBSYSTEM DESCRIPTIONS
2.2.1
Introduction
To enable easier understanding of the LDB-102 DM E system the description is split into
three subsections - Transponder Subsystem, Control and Test Subsystem and the
Power Supply Subsystem. For further information on nay individua modules, refer to
Section 2.3 of this handbook.
2.2.2
"
Transponder Subsystem
REFER Interwiring Diagram 72505-2-37

The Transponder Subsystem consists of five modules mounted in the Transponder
Subrack (1A72513); these are the Receiver/Video (1A72520), Transmitter Driver
(1A72530), Transponder Power Supply (1A72525), Test Interrogator (1A72514) and the
Monitor Module (1A72510), the 1kW RF Amplifier (1A72535); and the RF Panel
(1A72545 for single, 2A72545 for dual). The transponder subrack interwiring is shown in
Drawing 72505-2-37, and is identical for both single and dual configurations.
The basic transponder functions are provided by the receiver/video, transmitter driver
and the 1kW RF power amplifier.
The receiver/video module receives and decodes interrogations and encodes replies.
When a valid interrogation is decoded, a pair of TX Modulation Trigger signals is sent to
the transmitter driver. In a 1kW station, for each TX Modulation Trigger sent to the
transmitter driver a shaped modulation pulse and a square pulse of RF, at the station
frequency, are generated in the transmitter driver and both fed to the 1kW RF power
amplifier.
The transponder power supply generates +15 volts, +18 volts and +HT to power the
transmitter driver.
The RF panel provides filtering of the input interrogation signals, coupling of the transmit
and receive paths to the antenna, and connection of the test interrogation and reply
signals of the test interrogator. In a dual system, it also provides for switching of the
active transponder to the antenna.
2-7
HA72500
Figure 2-5
SECTION 2
Transponder Subsystem Diagram
The test interrogator operates as an independent unit simulating aircraft interrogation

pulses. The transponder treats these pulses as normal interrogations and responds
accordingly, allowing the test interrogator to extract operational parameters from the
transponder. The test interrogator can measure each of the parameters for display on
the CTU.
The monitor accepts from the test interrogator signals representing the operational
parameters of the transponder and compares them to preset values stored on the
monitor module main board. If any of the parameters are found to be in error, the fault is
indicated to the CTU, which takes appropriate action.
The test interrogator also contains the monitor fault limit test circuitry which (under
control from the CTU) can measure the range over which parameters measured by the
monitor indicate acceptance or failure.
2.2.3
Control and Test Subsystem
The Control and Test Subsystem of the LDB-102 DME monitors, controls and tests
various functions within the DME.
The Control and Test Unit (CTU) monitors the operation of the active transponder. If a
fault is indicated in any of the monitored parameters, then the CTU can shut down the
beacon (or cause a transfer to the second transponder in the case of a dual transponder
beacon).
The CTU also contains a comprehensive test facility to allow rapid assessment of
performance. By keypad selection, each of the main DME parameters, including
important signal levels and status conditions can be displayed. The CTU controls the
test interrogator and monitor module(s) in performing the tests.
The CTU also controls and monitors the Remote Control and Monitoring System
(RCMS) interface which interfaces outside equipment to the DME. The RCMS interface
is accessible on the External I/O PWB (1A72557) for ease of connection.
2-8
HA72500
Figure 2-6
SECTION 2
Control and Test Subsystem Diagram
2.2.4
Power Supply Subsystem
2.2.4.1
Single DME Power Distribution
The single DME is supplied with nominal 240 volts 50 Hz mains AC which powers a
battery charger (Power Supply 3A71130) mounted at the bottom of the transponder rack.
This supplies a regulated +27 volts to the rack's battery terminals, to which batteries may
be connected and charged. The battery terminals are also connected to the distribution
panel (through a diode to protect against battery reversal) which distributes the supply
through circuit breakers to the rest of the DME circuitry.
The CTU and the transponder are powered through a 5A circuit breaker. The CTU
power (+24V_AUX) is routed via the external I/O board. The transponder power
(+24V_D) is connected directly to the transponder through the main power wiring loom.
The CTU converts the incoming +24 volts to +5 volts by use of a DC/DC converter,
which is mounted on the CTU module metalwork. The CTU +5 volts is distributed to the
CTU Main PWB Assembly 1A72552, CTU Front Panel PWB Assembly 1A72553, RCMS
Interface PWB Assembly 1A72555.
The transponder draws its power from the +24V_D. The Test Interrogator 1A72514,
Monitor Module 1A72510, and the Receiver Video 1A72520 all have separate linear
voltage regulators converting the +24V_D to +15 volts and +5 volts. The Transmitter
Driver 1A72530, however, is powered from the Transponder Power Supply 1A72525
which consists of a +15 volts and a +18 volts linear regulator and a DC/DC converter to
generate +HT. The +24V_AUX is used for switching and test mode indication.
The 1kW PA Power Supply 1A72540 has its own circuit breaker (20A). This power
supply generates 1kW_HT by use of a DC/DC converter. 1kW_HT is fed to the 1kW
Power Amplifier 1A72535.
2-9
HA72500
Figure 2-7
2.2.4.2
SECTION 2
Single 1kW DME Power Distribution
Dual DME Power Distribution
The dual DME is supplied by a Dual AC Power Supply 2A69758. This consists of two AC
Power Supplies 3A71130 mounted in a rack adjacent to the transponder rack. The two
separate +27 volts DC outputs of these supplies are connected to the rack's battery
terminals, to which batteries may be connected and charged.
The battery terminals are also connected to the distribution panel (through diodes to
protect against battery reversal) which distributes the supply through circuit breakers to
the rest of the DME transponder circuitry.
The CTU is powered through a 5A circuit breaker as described in Section 2.2.4.1.
Each transponder has its own 5A circuit breaker, so a fault in one transponder does not
affect the other. Each transponder is connected to the distribution panel through the
main power wiring loom as described in Section 2.2.4.1.
Each 1kW PA Power Supply 1A72540 has its own 20A circuit breaker so a fault in one
does not affect the other. +24V_AUX is supplied to the 1kW PA power supplies for
switching and indication purposes.
2-10
HA72500
Figure 2-8
SECTION 2
Dual 1kW DME Power Distribution
2-11
HA72500
SECTION 2
2.3
MODULE DESCRIPTIONS
2.3.1
Introduction
Section 2.3 contains functional and circuit descriptions for the modules and other
assemblies comprising the DME. The material is arranged in hierarchical fashion, with
each description at module level being immediately followed by sub-sections describing
the elements of that module.
2.3.2
2A72545
"
RF Panel Single DME 1A72545 and RF Panel Dual DME
REFER Circuit Diagram 72545-3-04 (Single DME)

Circuit Diagram 72545-3-05 (Dual DME)
The RF panel is physically mounted behind the CTU at the back of the rack. Unrestricted
access to the panel can be gained by opening the back door of the rack.
The RF panel mounts all the antenna feed and coupling components permitting short
feeder lengths from the output RF amplifier to maintain low RF loss and leakage. All
fixed coaxial wiring is accomplished in semirigid or flexible semirigid cable which also
assists in low RF leakage and low loss.
In the case of a single transponder DME (see drawing 72545-3-04), the RF panel has
mounted upon it a directional coupler (W3), a circulator (W1), and a receiver preselector
filter (Z1). For a dual transponder system an extra preselector filter. circulator, directional
coupler and transfer relay are added to enable independent operation of transponders
with antenna and dummy load changeover facilities (see drawing 72545-3-05). Switch
S1 (on the RF panel board in a dual DME) permits local operation of the changeover
relay (No. 2 to antenna), no operation (No. 1 to antenna) or remote operation under
control of the changeover logic in the CTU (normal).
Reply signals from the transmitter travel via a circulator and directional coupler to the
antenna. The circulator (W1 or W2), prevents the high power from the transmitter from
damaging the input circuitry of the receiver. The circulator also directs received
interrogation signals from the antenna to the receiver.
The directional coupler (W3 in the single system, W4 in the dual system) couples power
from the transmitter into the reply detector section of the test interrogator where the reply
pulses are measured for their critical parameters. In addition, the directional coupler
injects test interrogator interrogation pulses into the transponder receiver.
An extra pair of connections is available on the directional coupler, labelled FWD PORT
A and REV PORT A, which may be used for observing the conditions on the antenna
line.
In the case of a dual system (see drawing 72545-3-05), there is a further pair of
connectors on W4 to enable both test interrogators to test the on-air system. The second
directional coupler W3 and the 50 ohm load enable one transponder to be isolated and
tested off-air while the other transponder is fully operational. The test interrogator
associated with the transponder under test may have its reply detector and signal
generator cables removed from W4 and re-connected to the appropriate positions on
W3, thus allowing independent operation and testing of the two transponders.
2.3.2.1
"
Preselector Filter 1A72546
REFER Circuit Diagrams 72545-3-04 or 72545-3-05

The preselector filter is located on the RF panel in the receiver signal path between the
antenna circulator and connector to the receiver video. The filter consists of three
2-12
HA72500
SECTION 2
quarter-wave cavity sections of high Q and having an insertion loss of typically 1.5 dB at
the receive frequency.
As well as rejecting image and intermediate frequency signals, the filter also rejects any
reflections from the transmitter which may occur due to antenna system mismatches.
Within the pass-band, the filter presents a 50 ohms load to the circulator, and at the
transmit frequency the attenuation is at least 70 dB.
It is tunable over the frequency band 950 to 1220 MHz.
2.3.2.2
"
Directional Coupler 1A69755
REFER Circuit Diagram 72545-3-04

This four coupled port directional coupler is used for monitoring and test signal injection
into the antenna feeder of a single DME beacon. It is also used in a dual beacon to
interrogate and monitor the off-line transponder for test purposes. It is mounted on the
RF panel.
The 50 ohms stripline design involves the through-line, one forward and reverse
unterminated coupled line and two forward only coupled lines internally resistively
terminated. Each coupler is designed for a 30 dB nominal coupling with at least 15 dB
directivity over the DME frequency band.
Figure 2-9
2.3.2.3
"

This six coupled port directional coupler is used for monitoring and test signal injection
into the antenna feeder of a dual DME beacon and is mounted on the RF panel with the
1A69755 type.
The 50 ohms stripline design is essentially the same as the four-port 1A69755, with two
more forward coupled ports added.
In the dual DME system there are two test interrogator test signals to be injected into the
antenna feeder and two replies to be monitored, hence the extra coupler ports.
2-13
HA72500
Figure 2-10
2.3.2.4
SECTION 2
50 Ohm Termination 1A69757
This is a component of the RF Panel Dual DME 2A72545 and is fitted to provide a
termination for the RF output of the second transponder when the second transponder is
in maintenance.
Physically, it is a 50 ohms 150 watts (average) resistor fixed to a base plate and which
terminates a short length of semirigid cable; the loose end of the cable has a SMA
connector fitted. A protection cover is fitted over the unit and the base plate is bolted to
the RF panel, which acts as a heat dissipator.
2.3.2.5
"
RF Panel PWB Assembly Single DME 1A72547

The RF Panel PWB Assembly Single DME 1A72547 is used in the RF Panel Single
DME 1A72545 to allow connection of the antenna integrity input to the DME. This input
is protected from lightning primarily by the gas discharge tube V3, with secondary
protection provided by R1 and V2. R2 provides the reference resistance for the antenna
integrity circuit on the monitor module.
2.3.2.6
"
RF Panel PWB Assembly Dual DME 2A72547

The RF Panel PWB Assembly Dual DME 2A72547 is used in the RF Panel Dual DME
2A72545 to allow connection of the antenna integrity device to the DME. This input is
protected from lightning primarily by the gas discharge tube V3, with secondary
protection provided by R1 and V2. R2 provides the reference resistance for the antenna
integrity circuit on the monitor module.
It is also used in control of the antenna relay K1 (see circuit diagram 72545-3-05) by
setting the position of S1. This switch can be set to one of three positions:
a.
If switch S1 is in the up (TPNDR 2) position, relay K1 on the RF Panel

2A72545 is energised and the output of Transponder 2 RF power amplifier is
connected to the antenna. The output of Transponder 1 RF power amplifier is
connected to the 50 Ohm Load 1A69757.
b.
If switch S1 is in the centre (TPNDR 1) position, relay K1 is not energised and

the output of Transponder 1 RF power amplifier is connected to the antenna.
The output of Transponder 2 RF power amplifier is connected to the 50 Ohm
Load 1A69757.
c.
If S1 is in the down position (NORMAL) the setting of the relay K1 is

determined by the input Antenna-Relay-Control from the CTU. If this input is
high (+ 24 volts) then Transponder 1 is connected to the antenna with
2-14
HA72500
SECTION 2
Transponder 2 terminated, and if this input is low (0 volts) then Transponder 2

is connected to the antenna as in with Transponder 1 terminated.
Table 2-1
Summary of Controls and Indicators: RF Panel (Dual)

CONTROL/INDICATION FUNCTION DETAILS
TYPE
Toggle
switch,
centre off
2.3.3
"
LEGEND
FUNCTION/SETTING/INDICATION
TPNDR2
The output of Transponder 2 is fed directly to the antenna.

The output of Transponder 1 is terminated in the 50 ohms load.
TPNDR1
The output of Transponder 1 is fed directly to the antenna.

The output of Transponder 2 is terminated in the 50 ohms load.
NORMAL
The CTU controls which transponder output is fed to the

antenna.
Receiver Video 1A72520

The Receiver Video module provides the main receiver functions and contains the Main
PWB Assembly Receiver Video 1A72521, RF Source 1A72522, RF Filter 1A72517, IF
Amplifier 1A72523 and RF Amplifier 1A72524.
The received signal is passed from the antenna into the RF panel and preselector filter
on to the receiver. A circulator in the RF panel is used to isolate the receiver from the
transmitter while allowing the use of a common antenna. The cavity-tuned preselector
rejects the image signal and provides initial selectivity for the receiver.
The receiver video module amplifies and detect on-channel interrogations and provides
trigger pulse-pairs for the transmitter modulator for International Morse Code
identification, interrogation replies and squitter. A continuous wave (CW) RF output at
the local oscillator frequency is provided as excitation for the transmitter.
The RF source generates the RF signal required for both the receiver local oscillator and
the transmitter. A single-crystal oscillator operating at a frequency of one-twelfth of the
DME transmit channel frequency generates a signal which is buffered and then
frequency multiplied in three stages to produce the required signal frequency.
The RF amplifier is designed as a broadband micro-stripline amplifier system. It
amplifies the low level signal received from the antenna and, in a separate stage,
amplifies and splits the local oscillator signal into two signals each at an approximate
level of +11 dBm. One of these signals is used as the local oscillator injection frequency
for the receiver mixer, while the other is fed to the transmitter driver as the excitation
signal. The mixer stage utilises a double balanced diode mixer circuit and produces an
intermediate frequency signal at 63 MHz.
The IF amplifier board provides the main 63 MHz IF amplifier which consists of a dualgate FET amplifier stage followed by a successive detection logarithmic output amplifier
chain. Gain control is provided by developing a DC bias to control the FET amplifier
stage. This controlling DC bias is manually and automatically set to reduce CW
response and to reduce the transponder sensitivity during over-interrogation.
The demodulated video output of the logarithmic amplifier stages is broadband and does
not discriminate against adjacent channels.
A second mixer circuit converts the amplified 63 MHz RF signal to 9.25 MHz where it is
amplified and passed through narrowband tuned circuits which provide rejection to all
adjacent channel signals. This narrowband signal is AM-demodulated and is used both
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as an on-channel gating pulse and to develop the AGC voltages to control the dual-gate
FET amplifier stage.
Both the logarithmic output pulse and the on-channel pulse are fed into the receiver
video main PWB assembly for decoding and processing.
In the main PWB assembly the signals from the IF amplifier detectors are detected and
processed. Pulses arriving at the logarithmic pulse input without corresponding onchannel pulses are ignored as spurious or adjacent channel noise. The remaining onchannel logarithmic pulses are passed on to a half-amplitude finder circuit for accurate
time referencing. The pulses are then decoded for correct pulse spacing.
On receiving and detecting a valid pulse-pair the transponder then enters a
programmable wait period before generating an appropriate pulse-pair for transmission
as reply pulses. Transponder delay time is referenced to the 50% amplitude point on the
leading edge of the first interrogation pulse.
As a result of reflection, genuine interrogation pulses which appear to be valid may be
received, having been delayed due to a longer transmission path. These signals could
trigger a misleading reply; to prevent this happening a dead time is introduced, following
a successful interrogation, to block out any such signals.
All pulses for transmission are generated in the receiver video. All critical pulse durations
and time delays are produced by programmable counters and shift registers for which
the clocking frequency is derived from a crystal oscillator. Site-dependent programming
is set by switches.
The ident message is stored on four 8-way DIL switches on the main board. Depending
on the appropriate external connections the ident may act as either master or slave.
When operating as a slave to an associated VHF navaid, the external ident has priority.
If the external ident should fail the internal ident generator automatically takes over.
Squitter is generated in a pseudo-random time sequence at an average frequency of
945 Hz and is transmitted as standard pulse-pairs with random time spacing.
For all transmissions, replies to interrogation have priority over squitter and the ident
message has priority over reply pulses, however reply pulses may occur in the 'space'
period of the ident message.
Short distance echo suppression is selected by an ON/OFF switch mounted on the
board. Its function is to allow decoding of an interrogation when the inter-pulse space is
filled with signals which are reflections of the first pulse. It operates by removing video
signals from the input of the amplitude finder just prior to the arrival of the second
interrogation pulse thereby effectively clearing a space for the second pulse.
Long distance echo suppression is also selected by an ON/OFF switch mounted on the
board. Its function is to inhibit decoding of an interrogation pulse-pair which is produced
by a distant reflector such that it arrives after the dead time has expired. It operates by
increasing the dead time to an adjustable value for those interrogations which exceed a
preset signal level. This provides a better compromise in traffic handling capability than
would be achieved by simply increasing the dead time for all interrogation signal levels.
2.3.3.1
"
Main PWB Assembly Receiver Video 1A72521
2.3.3.1.1
Pulse Processing
Delayed interrogation pulses from the log video input at XN2:5 and the on-channel video
pulses at XN2:2 arrive at D50 in a phase relationship that permits the on channel pulses
to change the address of the analogue multiplexer in time to allow the log video pulse to
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pass through to the follower-amplifier N7b. In the process, the arriving log video pulse is
added on to a DC pedestal voltage of approximately 0.5 volts; N7a clamps the baseline
of the log input signal to +1.5 volts (at the junction of R49 and R36) which is 0.5 volts
above the reference input to D50.
If the log video input pulse is a result of noise or adjacent channel signals, there will be
no accompanying on-channel pulse and D50 will ignore the log video input. This method
recognises valid input pulses and maintains the logarithmic shape of these pulses as
they are passed to the half-height and timing detectors.
2.3.3.1.2
Half-height and Timing Detection
An adjustable (R45, 6 dB OFFSET) constant current source V15 feeds into the output of
N7b. This current flowing through R44 produces an input to N6:5 which is DC offset with
respect to the waveform applied to N5:4 input. Amplifier N6:7 and delay line D38 provide
a unity-gain time-delayed signal to the other input of N5:5. Thus the signal at XT6 has
been offset by a DC voltage equivalent to 6 dB pulse amplitude, as well as being
delayed by a period equal to half the duration of the standard input pulse.
Due to the offset in amplitude and the delay applied to the pulse at XT6 the half-height
point of the delayed pulse corresponds to the maximum point of the original pulse at
XT13. This will always occur for all logarithmic-shaped pulses of standard duration
regardless of amplitude and thus the comparator output N5:12 will always identify the
half-height point by going low at this time.
As N5:12 goes low, the D-type flip-flop D26:3 is clocked with the D input pin 5 high due
to the on-channel pulse still being present. D26:1 generates a pulse of 2.5 microseconds
duration which is determined by the 14-stage shift register D25, clocked at 5.5296 MHz.
The pulse at D26:1 is loaded into the shift registers D21, D22, D23, D24. This window,
2.5 microseconds wide, passes down the shift registers to coincide with the next valid
input pulse. The shift registers are varied in length depending upon X or Y channel
selection. In the case of X channel operation it will take approximately 13.2
microseconds for a pulse to arrive at D20:5, whereas in the case of Y channel operation
the shift registers are configured to delay the pulse by approximately 37.2 microseconds
before operating D20:5. The SELECT DECODER MODE switch S5 is used to select X
or Y channel operation and is set on installation for the type of operation required.
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Figure 2-11
Waveforms for Interrogation Pulse Processing
At the time when a valid first pulse of a pulse-pair is emerging from the shift register, the
second pulse will have operated D26:1 and enabled D20:3 via the gate D41:4 thus
triggering the monostable at D20:5 by the leading edge of the delayed first pulse. The
positive-going pulse generated at XA3 indicates that a valid interrogation pulse-pair has
been decoded. Because D20:5 is enabled for 2.5 microseconds, coincidence can occur
at 12.0 1.2 microseconds for X channels, and at 36.0 1.2 microseconds for Y
channels.
2.3.3.1.3
Dead Time
After a valid pulse-pair has been received (as indicated by the pulse generated at XA3)
the counter D40 is loaded with the binary number set in to the SET DEAD TIME switch
S7. D40 will count to zero at the clock rate of 86.4 kHz determined by D49 and the
5.5296 MHz clock. During the down-count of D40, pulse-pair decoder pulses are
inhibited by the output of D41:3, thus creating the beacon dead time. Switch S7 sets the
dead time in multiples of the 86.4 kHz clock period; that is, 11.5 7 microseconds. Due to
the random timing of the interrogation pulses in relation to the 86.4 kHz clock, the dead
time will vary between approximately (2.5 + (n-1) x 11.57) microseconds and (2.5 + n x
11.57) microseconds where 'n' is the number set on switch S7.
2.3.3.1.4
Short Distance Echo Suppression
The purpose of the SDES is to allow the decoding of an interrogation when the space
between the pulses is filled with signals which are echoes of the first pulse. This may be
used at sites which have large nearby reflectors which cause strong echo signals with
amplitude comparable to that of the direct signal. The echo suppression operates by
removing signals from the half-amplitude detector just prior to the arrival of the second
pulse. This allows the decoder to recognise the presence of the second pulse and
thereby initiate a reply to the interrogation.
When SDES is selected, by switch S8, the delayed first pulse produced at D22:10 (2.5
microseconds duration) is used to disable D50. Following the trailing edge of the SDES
pulse, D50 is again enabled to allow decoding of the second pulse. For X channels the
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SECTION 2
SDES pulse trailing edge occurs approximately 10 microseconds down the shift register.
After a further delay of approximately 1.8 microseconds in the half-amplitude finder, a
pulse is generated with the correct separation to form a decodable pair. For Y channels,
the pulse trailing edge occurs approximately 34 microseconds down the shift register.
The fast-attack slow-release time constant provided by V20, R55 and C79 disables the
2.5 microsecond pulse at D26:1 for approximately 1.5 microseconds after each pulse
terminates. This prevents the generation of SDES pulses with zero gap between them,
which situation could cause inhibiting decoding if the trailing edge of one SDES pulse
was about to generate the artificial second pulse only to be inhibited by a following
SDES pulse.
2.3.3.1.5
Long Distance Echo Suppression
In a similar fashion to SDES, the long distance echo suppression (LDES) function will
eliminate echo pulses with long delays. LDES is only initiated after receiving a valid
pulse-pair and with the LDES switch S9 set ON, Counter D39 will be set by the pulse
from D20:6 and will count the LDES PERIOD set on switch S6. D39 derives its clock,
43.2 kHz, from the divider D49 and the 5.5296 MHz crystal oscillator. The function of
LDES is to inhibit decoding of an interrogation pulse-pair which is produced by a distant
reflector such that it arrives after the dead time has expired. It operates by increasing the
dead time by (if set to be longer than the normal dead time) an adjustable period
(determined by switch S6) for those interrogations which exceed a preset level set by
R46, LDES LEVEL and compared in N5:10. This provides a better compromise in traffic
handling capability than would be achieved by simply increasing the dead time for all
interrogation signal levels.
Switch S6 sets the LDES period in multiples of the 43.2 kHz clock; that is, 23.15
microseconds. Due to the random timing of the interrogation pulses in relation to the
43.2 kHz clock, the LDES period will vary between approximately (2.5 + (n-1) x 23.15)
microseconds and (2.5 + n x 23.15) microseconds where 'n' is the number set on switch
S6.
2.3.3.1.6
Beacon Delay
On recognition of a valid pulse-pair, monostable INPUT D2:a is enabled by DOUBLE

PULSE DECODER OUT pulse (observable on XA3) and D2:6 changes state at the next
failing edge of the 5.5296 MHz clock pulse, synchronising this pulse with the 5.5296
MHz clock. The SET BEACON DELAY COARSE switch S1 and the SET BEACON
DELAY FINE switch S2 set the beacon delay time by adjusting the length of the shift
register D13, D42 and D31. Both of these switches are mounted on the front panel of the
receiver video module, and are operator accessible. Monostable output D2:10 assists to
re-adjust the phase of the shift register output pulses to be coincident with the clock. The
output pulse from the beacon delay timer chain comes from D31:10 and appears at the
multiplexer D12 which is configured as a priority selection gate.
2.3.3.1.7
Reply Pulse-pair Generation
The dual 4-channel analogue multiplexer D12 has two outputs (pins 13 and 3) each of
which can be switched to be connected to one of four inputs, depending on the selection
logic. As pin 6 is tied permanently low, the address (selection) conditions at pins 10 and
9 determine which inputs are connected to the outputs.
These two address selection lines are controlled by D11:12 (Address 0, pin 10) which is
the select interrogation counter, and by D47:3 (Address 1, pin 9) which is the ident input
control. These two inputs then determine which of the three output conditions will occur interrogation reply, squitter, or ident.
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Address 01 selects squitter pulses, 00 selects interrogation pulses, and 11 selects ident
pulses. When a double pulse decode occurs, D11 is asynchronously loaded to a count
of 12. D11 counts down to 0 at a clock rate of approximately 173 kHz, and clamps at a
count of 0 by feedback from pin 12 to pin 4. The interrogation select pulse applied to
D12:10 is approximately 70 microseconds in duration and drives D12 to accept the
output pulse, D31:10, from the beacon delay timer.
Reply pulses have a lower priority than ident pulses, but a higher priority than squitter.
Thus, provided that there is no ident mark transmission in progress and D11 is counting,
the multiplexer D12 will have address 00 selected, which will allow the delay timer pulse
from D31:10 to enable D3:13 and the delay shift registers D32, D33 and D34. These
shift registers generate the reply pulse separation time. The pulse generated by D3:10 is
used as the first pulse of the pulse-pair and passes via V1 and D4:12 as the trigger
pulse to the transmitter driver. The same pulse from D3:10 is delayed by the shift
registers D32, D33 and D34 to create the second pulse in D35:10 at the failing edge of
the clock. The time delay created by the shift registers may be varied by the switches S3
and S4. The REPLY PULSE SEPARATION switch S3 allows the delay to be altered in
steps of approximately 180 nanoseconds, whereas the SELECT ENCODER MODE
switch S4 provides for the selection of a 12-microsecond delay for X channel operation
or a 30-microsecond delay for Y channel operation.
2.3.3.1.8
Identification Message (Ident)
The ident message is a 2-character or 3-character Morse code signal with a 1350 Hz
tone and having a 'dot' period of 0.125 seconds. The tone frequency is derived from the
5.5296 MHz clock, thus assuring accuracy of the tone frequency. The ident message is
set by four 8-bit SPST switches (S13, S14, S15, S16).
The counter D49 divides the 5.5296 MHz clock to produce the 1350 Hz clocking
frequency which is used as the Morse code tone as well as a clock for the ident timing
circuits.
The ident keyer circuit generates a repeated Morse code identification signal of up to
three characters. The characters are built up by setting switches to place the 'dot' and
'dash' elements in the required sequence.
The speed at which the identification signal is transmitted is set by the frequency of the
oscillator circuit associated with D44:5. The frequency can be varied by altering the
CODE SPEED preset R37.
The repetition rate of the ident signal is determined by the frequency of the oscillator
circuit associated with D44:9. The rate can be varied by altering the REPTN RATE
preset, R39.
The required sequence of dots and dashes is provided by circuitry associated with D36,
D45 and D37. The arrangement of common binary lines to the demultiplexers D45 and
D37 in conjunction with the steering circuitry implemented with D51 and D53 enables
one of the demultiplexers D45 and D37 in turn, while inhibiting the other demultiplexer.
The 4-bit binary counter D36 generates the binary code corresponding to decimal 0
through 15. Thus a high (15 volts) is stepped along first from D45:4 through to D45:13,
and then through D37 and, depending on the settings of switches S13 to S16, the high is
applied to either the 'dots' bus or the 'dashes' bus.
The detailed operation of the keyer can be seen with reference to Figure 2-12 which
shows the signals present at various circuit points for the generation of the letters UN
(dot-dot-dash dash-dot). The sequence is started by the asynchronous start pulse which
is produced at D29:12 by dividing the frequency of the repetition oscillator D44:9 by 15.
The start pulse initialises the sequence by setting D51:1 high and by loading counter
D36 with a count of 15. This enables the first output D45:4 which may be switched by
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SECTION 2
S15/S16 to the dot or dash line to give the first desired code element. With a dot
selected, a high level will be produced at the code output for one full clock cycles when
D51:2 goes high.
When D51:2 is clocked low on the next clock pulse the generation of a 'dot-length' space
is automatically inserted after the first element.
The next clock pulse from D44:5 clocks D36 to its next state for the generation of the
next code element, and the sequence is repeated.
With a dash selected by closure of S1 6 to the dash position, the dash bus will be high,
which will preload the dash timer D43 with a decimal 3 causing the output to remain high
for three dot periods.
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HA72500
Figure 2-12
SECTION 2
Ident Keyer Waveforms
The space between letters (see line labelled STATE in Figure 2-12) is formed by leaving
both the dot and dash switches in the 'off' position. This allows a space equivalent to
three dot elements to be generated between letters of the code word.
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The line labelled COUNTER D36 STATE in Figure 2-12 traces the counter zero 15,14,
etc, states and the progression of the high along the demultiplexer output.
At the end of the character generation sequence D37:13 is activated and an inhibit
signal is applied to D43:4, stopping the operation of the keyer until the next start pulse is
received.
Where a VOR and a DME beacon are collocated they may be operated in either
'independent' mode or 'associated' mode. D30 is a divide-by-4 counter controlling the
switching of D19 such that three consecutive ident code sequences from D52:3 are
switched to MASTER IDENT OUT and the fourth ident code sequence is switched to
D48:9 for INTERNAL IDENT.
2.3.3.1.9
Squitter
Squitter is generated as a pseudo-random set of pulses at an average rate of 945 Hz

and is transmitted at the lowest priority, being preceded by the ident message and reply
pulses. As the interrogation pulse rates increase to 945 Hz, the squitter becomes totally
inhibited.
Squitter is generated by the action of D15 and D16 operating at different clock rates
(from D49:12 and D49:1 respectively) and the arranged 'disorder` of the parallel load
lines into D15. D16 is a 5-stage Johnson counter clocked at 1.35 kHz. The10 outputs go
high, in turn, for one clock period. D15, an 8-bit, parallel-in, serial-out shift register, is
clocked at 10.8 kHz and is loaded at a rate of 1350 Hz with the end bit always being
zero, and with the other inputs loaded no bit (3/10 of the time) with 1 bit (7/10 of the
time), in the disordered pattern, from D16. This produces the required pseudo-random
pulse rate.
2.3.3.1.10
Minimum Reply Rate
D14:11 is enabled by the absence of decoded interrogation pulses in D20:7 and D2:7
and on receipt of a random pulse (squitter) causes D5 to output a pulse via D17:10 to
D12.
In the absence of both a select interrogation pulse and an ident mark, D12 will
automatically select the squitter input and enable the reply pulse generator logic to
transmit the squitter pulse.
As reply pulses are detected on D2:3, D5 will increment its count with each pulse,
requiring one squitter pulse to occur to decrement the count to zero before transmitting
the next squitter pulse. In this way each reply pulse will replace a squitter pulse and, at a
reply rate of 945 Hz, no squitter will be transmitted. In the case where a reply pulse
occurs simultaneously with a squitter pulse, D14:9 will be inhibited and the reply pulse
will be transmitted; one squitter pulse will be lost to the counter D5.
2.3.3.1.11
Over Interrogation
Accepted interrogation pulses trigger D2:6, and its inverted output D2:7 is used as a
clock for D6 which is configured as a self-reloading divide-by-three counter. D18 is also
self-loaded, each time a terminal count is reached, inhibiting a 'roll-over' of the count. D1
8 counts up with each squitter pulse and down with each third reply pulse; thus if the
reply rate exceeds three times the squitter rate, reply pulses are inhibited by D3:6 and
the beacon delay registers are reset. Both D6 and D18 remain jammed at a count of 0,
inhibiting reply pulses until a squitter pulse from D14:9 increments D18 to a count of 1.
Three more reply pulses are then transmitted. In this situation the squitter pulses are
used as a reference pulse rate only, and the maximum reply rate is held at a nominal 3
times 945 Hz, or 2835 per second.
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When this over-interrogation condition exists the output pulses from D18:7 provide two
output signals; one, via buffer D4:9 and XN1:9a, to the test interrogator to switch to high
signal level interrogation for monitoring, and another via XN2:7 to the W amplifier to
desensitise the receiver, thus discriminating against weaker interrogations from distant
aircraft. Once the receiver gain reduction has achieved control of the interrogation rate
the video inhibiting via D3a, as described above, ceases. If XT22 and XT21 are bridged
the receiver gain reduction is prevented and maximum response rate control is provided
by the video inhibit method. This latter method treats all aircraft equally, giving each the
maximum possible response rate for the interrogating conditions.
2.3.3.1.12
Output Inhibit
The TX MODULATOR TRIGS output at XN1:13c is suppressed at power switch-on,

during transfer relay operate time, and (if the non-active transponder) during warm
standby.
Suppression is provided by a 5 volts logic level applied to XN1:29b which tristates the
output, inhibiting the trigger pulses to the modulator and stopping transmitter output
pulses.
The primary fault signals REPLY-DEL_FLT_1/2 and PULSE_SPAC_FLT_1/2, when low,
indicate that there is a fault in the primary parameters. If both REPLY_DEL_FLT_1 and
REPLY_DEL_FLT_2 or both PULSE_SPAC_FLT_1 and PULSE_SPAC_FLT_2 are low,
then the counter D8 begins counting the clock pulses produced by the RC oscillator of
D8:9, 10, 11. When output 9, D8:15, goes high (after about 70 seconds) the oscillator of
D8 is disabled, causing D8 counter to hold its count. The high input on D4:15 inhibits
TX_MODULATION_TRIGS. The action of the inhibit will be disabled when the input
signal INHIBIT_DISABLE is low.
This inhibited state will hold until power is removed from the module. XN1:9c is a disable
for this circuit and is connected to the TRANSPONDER DC POWER switch in the power
supply module. When this switch is in the ON position, which is the usual position during
maintenance, the inhibit circuit is disabled.
2.3.3.1.13
Replies Inhibited Indicator
This front panel LED indicator lights to indicate whenever replies are inhibited. For no
replies the LED is on continuously. As an indicator of over-interrogation it flashes at a
rate of eight flashes per second, driven by the square wave connected via V5
modulating the output from the ident speed generator D18:7.
2.3.3.1.14
Miscellaneous
The RF level and the local oscillator level are buffered and scaled by N10 before being
fed to the monitor for measurement. Each of the RF levels is also available for
monitoring on the front panel.
The +15V rail is monitored by a window comparator consisting of N2 and, N4. RV_PS is
high when +15 V is between 13.0 and 16.5 volts, and low when +15V is outside these
limits.
2.3.3.2
"
RF Source 1A72522

This unit is designed to produce the signal required for excitation of the transmitter
stages and the first mixer stage of the receiver. It provides an output of approximately +4
dBm to the receiver RF amplifier board where further amplification and signal splitting
occurs, as described in Section 2.3.3.4.
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The signal generation is accomplished by the use of a crystal oscillator operating in the
frequency range of 80 to 101.5 MHz, one-twelfth of the required signal frequency. The
crystal oscillator output is buffered and then multiplied in three stages to produce the
operating signal frequency.
The oscillator stage V1 incorporates a fifth-overtone crystal G1 in series resonance in
the feedback path.
Feedback from V1 emitter is passed through the series resonant crystal to create selfexcitation to the transistor via a damped base tank circuit comprising of L1, C2 and C11.
The tuned circuit L1, C2 and C111, as well as correcting phase shifts around the
feedback loop, also ensures that the fifth-overtone crystal operates without any tendency
to change mode.
An inductor, L6, is connected across the crystal and is selected to resonate with the
crystal holder and crystal stray capacitances to form a parallel tuned circuit at the
operating frequency. This prevents the stray capacitance acting as a separate feedback
path which could cause parasitic oscillation and instability.
Base bias for the oscillator stage V1 is derived by the resistor chain R2, R23 and R3 and
L1. The transistor is operated at a low level of drive to enhance overall stability.
The output from the oscillator is taken from the collector of V1 via C6 to the emitter of the
grounded-base buffer-amplifier stage V2 which isolates the loading effects of the
following multiplier stage from affecting the operation of the crystal oscillator. Capacitor
C8 is adjusted for maximum drive into V3.
The first stage of multiplication is a self-biased multiply-by-three circuit using a heavily
driven transistor V3 with its collector tuned by C12 to three times the oscillator
frequency. Self biasing reduces the conduction angle and raises the efficiency of this
stage.
Transistor V4 operates as a multiply-by-two circuit with its collector circuit tuned to twice
its input frequency or six times the oscillator frequency. This stage uses a small forward
bias voltage on the base circuit which is reduced automatically as drive is increased due
to the increased voltage drops occurring across R15 and R16 as drive increases.
Capacitor C18 tunes the collector circuit of V4.
The final multiplier stage operates in a similar fashion to the previous stage; however,
the final stage uses a microwave transistor (V5) as a multiply-by-two and produces the
required operating frequency in its collector circuit. Tuning of this stage is accomplished
by capacitor C26.
2.3.3.3
"
IF Amplifier 1A72523

The 63 MHz intermediate frequency signal originates in the RF amplifier mixer stage and
is connected to the input of the IF amplifier at XC1 via a 50 ohms coaxial cable. The lownoise dual-gate FET stage of the IF amplifier V2 operates as an AGC-controlled
amplifier with the two tuned circuits of L7 and L5 providing the necessary bandwidth for
rejecting large out-of-band signals, increasing the signal-to-noise ratio, and providing
inter-stage impedance matching.
Manual gain control is applied to the input stage via a preset gain control R29, which is
adjusted to give a threshold sensitivity of -94 dBm. In addition, delayed AGC is applied
via N9 in such a manner as to reduce the transponder gain when the interrogation rate
exceeds the preset limit of 2800 per second or in the presence of in-band high-levelcarrier received signal. The AGC threshold for CW signals is set by the SET AGC control
R15. The range of automatic gain control is in excess of 50 dB and the receiver
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SECTION 2
functions normally over this range of gain reduction provided the pulse signal level is
sufficiently above the CW level.
Following the input amplifier stage the signal is amplified and successively detected in a
cascaded set of logarithmic (log) intermediate frequency amplifiers. The eight amplifiers
are divided into two groups of three, coupled via a single parallel resonant circuit which
serves to increase the overall signal-to-noise ratio by restricting the bandwidth and a
group of two (N1, N2) in parallel. To match the amplifier chain to the dynamic range of
the input signal (-90 dBm to -10 dBm), N1 has its input attenuated so that it provides its
required contribution to the log detection law at high signal levels without increasing the
overall gain at low signal levels. Amplifier N1 provides amplifier N3 with the required bias
potential from its pin 7 connection; N6 supplies the bias potential for the second group of
amplifiers; each amplifier is DC coupled. The detected log output from the amplifiers is
then amplified in the transistor stage V5 and then delayed 1.6 microseconds in the delay
line D1 before reaching the video output of the IF amplifier. The value of the delay
compensates for the additional delay to the on-channel pulses in passing through the
narrowband filter L3 and L6.
The 63 MHz output from the log amplifier chain at N8:3 is mixed in the dual-gate FET
mixer circuit of V1 with a 53.75 MHz signal generated by the third-overtone crystal
oscillator circuit of V4.
The output of the mixer circuit is a 9.25 MHz signal which is filtered by a narrowband
filter comprising L3 and L6. L6 includes an inbuilt amplitude detector, and the video
output pulses are applied to the input of a voltage comparator N10a. The reference input
to this stage is a voltage set by the ON CHANNEL THRESHOLD preset R50. R50 is set
to slice the signal just above the noise level, and 15 volts logic pulses are produced at
the ON CHANNEL OUT terminal.
As the 63 MHz intermediate frequency amplifier has a bandwidth of several MHz,
adjacent channel signals could be mistaken as valid interrogation pulses; however, the
narrowband 9.25 MHz circuit will only pass signals that are on-channel and although the
demodulated video pulses do not carry easily definable timing information, these pulses
are used to identity the valid log interrogation pulses by coincidence.
Linear regulator N11 derives +6 volts DC for log amplifier operation from the 15 volts
supply.
2.3.3.4
"
RF Amplifier 1A72524

The RF amplifier is a broadband micro-stripline amplifier system which:
amplifies the signal received by the DME antenna via the Preselector Filter
1A72546;
amplifies and splits the signals from the RF Source 1A72522 into two +11 dBm
signals; and
mixes the amplified received signal with an amplified signal from the RF source
to produce a 63 MHz intermediate frequency signal.
The RF signal stage uses V1 in a common-emitter amplifier in a micro-stripline matching

network. The AC-coupled input from the preselector filter, at XC1, feeds a teeimpedance transformer comprising a series micro-strip inductance and chip capacitor C2
to ground to achieve matching of the base input impedance.
Base bias current is supplied via a quarter-wave micro-strip inductance from the
collector voltage source and is zener referenced to maintain a constant collector current.
The collector also draws its current via a length-tuned inductor and the collector
2-26
HA72500
SECTION 2
impedance is matched to the load impedance presented by the mixer by a series length
of micro-stripline. Capacitor C5 AC-couples the double-balanced mixer load to V1.
The signal from the RF source, which is input via connector XC3, is used as a local
oscillator injection signal for the mixer as well as the low power signal for exciting the
transmitter stages. The RF source input from XC3 is fed through a 50 ohms microstrip
track. A level detector provides a signal for monitoring purposes. A tee-impedance
transformer matches the base input impedance of V4. Bias is applied to V4 in the same
manner as for V1, via a quarter-wave choke.
The collector circuit incorporates a parallel micro-strip inductor pre-tuned by the bypass
chip capacitor C11 and the impedances are transformed by a series capacitor into the
50 ohms wireline hybrid 3 dB coupler, W1. W1 splits the RF power between the outputs
XC4 (RF output to the transmitter) and the micro-stripline feed to the mixer U1. Both
output levels are approximately +11 dBm, and are sensed by the level detector circuit V8
to provide a signal for monitoring purposes.
The double-balanced mixer U1 is supplied as a module and is not field repairable. The
input RF signal from V1 and the RF signal from the RF source are mixed in U1 to
produce the 63 MHz IF signal which is fed out via XC2 into the IF amplifier at a nominal
50 ohms impedance.
2.3.3.5
"
RF Filter 1A72517

The RF filter is a lumped element filter used to reduce spurious frequency outputs from
the RF source, before the signal is used as local oscillator for the receiver and source for
the transmitter; it is tunable from 950 to 1220 MHz.
The filter is a two-stage, high Q, parallel tuned circuit with, 50 ohms auto transformer
input and output matching and inductive inter-stage coupling. The inductors are formed
as short tinned copper wire elements and the tuning capacitor is a glass dielectric
concentric type.
2-27
HA72500
Table 2-2
Module
SECTION 2
Summary of Front Panel Controls and Indicators : Receiver Video

LEGEND
REPLIES INHIBITED Flashes on and off when the receiver video is being overinterrogated.
On continuously when replies are inhibited.
Red LED
TEST
Indicates that the IDENT switch is not in the NORMAL position.
Green LED
DC POWER ON
Indicates that DC power is applied to the module.
16-position
BEACON DELAY
COARSE
Sets the Delay parameter of the receiver video.
switches
FINE
16-position
REPLY PULSE
Sets the Spacing parameter of the receiver video.
switch
SEPARATION
Toggle switch, IDENT
NORMAL
Normal mode of operation.
centre off
OFF
No ident is generated.
CONTINUOUS Ident is generated continuously.
Toggle switch, INHIBIT
All interrogations are inhibited.
spring loaded to INTERROGATIONS
centre off
TEST REPLY RATE Transponder replies are inhibited and squitter reduced to 810 Hz.
MONITOR
Test jack
SDES PULSE
Buffered output from the double pulse decoder, which gives the short
distance echo suppression pulse to the on-channel gating logic (15
volts, 2.5 microseconds wide. one pulse per correctly decoded pulse
pair).
Test jack
LDES PULSE
Buffered output from the dead time suppressor showing the period of
long distance echo suppression and when it is active (15 volts,
selectable length, selectable trigger level).
Test jack
DOUBLE PULSE
Buffered output of the double pulse decoder indicating a pulse pair
DECODER OUT
has been correctly decoded (15 volts, 2.5 microseconds wide, one
pulse per each valid interrogation).
Test jack
DEAD TIME
Buffered output from the dead time generator, shows the period of
dead time and when it is active (15 volts. selectable length).
Test jack
TRIGS TO
Buffered output from the double pulse encoder buffer to the
MODULATOR
transmitter driver This output is normally high, and goes low during
TX MODULATION TRIGGERS (0-15 volts, 2.5 microseconds wide
pulses in pulse pairs separated by 12 or 36 microseconds; minimum
rate 945 PPPS, maximum rate 3000 PPPS).
Test jack
LOCAL OSC LEVEL DC output proportional to the drive level out of the RF source.
Test jack
+15V
Buffered output from the +15V regulator.
Test jack
EARTH
Common earth of all supply voltages and outputs.
Test jack
EARTH
Test jack
RFLEVEL
DC output proportional to the output TX RF DRIVE.
Test jack
ON CHANNEL
Buffered output of the narrow band detected on-channel gate from
VIDEO
the IF amplifier (15 volts pulses forming an envelope around the
detected log video pulses, normally 3 microseconds wide).
Test jack
EARTH
Test jack
DETECTED LOG
Buffered output from the wideband logarithmic amplifiers of the IF
VIDEO
amplifier.
TYPE
Yellow LED
2-28
HA72500
Table 2-3
SUBASSY
1A72521
Main PWB
Assembly,
Receiver
Video
1A72522
RF Source
SECTION 2
Summary of Internal Controls : Receiver Video Module

TYPE
CONTROL FUNCTIONS
LEGEND
REF
Preset
resistor
Preset
resistor
Preset
resistor
R37
CODE SPEED
R39
CODE REPTN
R45
ADJUST 6 dB
OFFSET
Preset
resistor
Slide switch
R46
S4
LONG DISTANCE
ECHO SUPP LEVEL
SELECT ENCODER
MODE
Slide switch
S5
MODE SELECT
DECODER
16-way rotary S6
switch
16-way rotary S7
switch
Slide switch
S8
SDES
Slide switch
S9
LDES
8-way switch
S13 CODE ELEMENT

to
S16
C8, 12. 18. 26
Variable
capacitors
Variable
inductor
1A72523
Variable
IF Amplifier capacitor
Preset
resistors
SET LDES PERIOD

SET DEAD TIME
Varies the ident code speed, which is set to 8

Hz.
Varies the ident repetition rate, which is set to
1.5 Hz.
Set to 0.24 volts during factory test, but may
need to be varied at module test level (see
Sections 3.3.8, 3.4.17).
Varies the LDES DC level.
X Selects X mode operation for the encoder.
Y Selects Y mode operation for the encoder.
X Selects X mode operation for the decoder.
Y Selects Y mode operation for the decoder.
Sets the LDES period in multiples of 12.15
microseconds.
Sets the dead time period in multiples of 11.57
microseconds
ON
Enables SDES operation.
OFF
Disables SDES operation.
ON
Enables LDES operation.
OFF
Disables LOES operation.
Set the ident Morse code characters.
Used to align the RF source to the operating

reply frequency (see Section 3.4.18)
L1
C1
Used to align the IF amplifier (see Section

3.4.19).
R15, 29 50
2-29
HA72500
2.3.4
"
SECTION 2
Transmitter Driver 1A72530

The transmitter driver mounts the pulse shaper and RF amplifier stages. When used as
a driver for the 1kW RF power amplifier it produces rectangular reply pulses generated
in response to trigger pulses from the receiver video module.
Front-panel test jacks are available for measurement of selected pulse shaper
parameters and indicators are provided for TEST and DC POWER ON status.
The interconnections of the subassemblies within the module are shown in Drawing
72530-3-03. The subassemblies, each with its own circuit diagram, are described
individually in the following sections.
Within the transmitter driver there are four subunits; these are the exciter, the medium
power amplifier, the power modulation amplifier, and the pulse shaper.
The three amplifiers form an amplifier chain; the RF output from the RF amplifier in the
receiver video module is input to the exciter section of this amplifier chain at a level of 10
mW. This signal is successively amplified and modulated by the amplifier chain to
produce the required pulse shape and timing characteristics. The final output from the
power modulation amplifier consists of RF pulses, produced in response to trigger
pulses from the receiver video module, at a level of 50 watts.
Figure 2-13
Transmitter Driver Block Diagram
2-30
HA72500
2.3.4.1
"
SECTION 2
2.3.4.1 Pulse Shaper PWB Assembly 1A72531

The pulse shaper controls the modulation characteristics of the transmitter amplifiers. It
does this by producing modulation pulses that are accurately controlled in shape,
duration, and time. Pulse production and timing are both controlled by the receiver video,
which produces modulation trigger pulses to initiate pulse generation and a 5.5296 MHz
signal which is used as the pulse shaper clock signal. The second major function of the
pulse shaper is to provide control and adjustment of high tension and bias supplies to
the three amplifier assemblies.
The inputs to the pulse shaper are:
a. Modulation trigger signal from the receiver video (XN1:8c).
b. 5.5296 MHz clock signal from the receiver video (XN1:8a, XN1:8b).
c. Provision for input from an external temperature sensor, which could be used to
determine the DC pedestal level of the high level modulation pulse outputs
(XN1:26c, XN1:27a). The external temperature sensor would be a forward biased
diode thermally joined to the power transistor heat sink and connected in parallel
with V13. (This external sensor is not used in this equipment; adequate
temperature compensation is achieved by the on-board sensor V13 responding
to ambient temperature changes only.)
d. Provision for a detected RF input to be switch-selected to be the source from
which the automatic level control of the high level modulation pulses is derived
(XN1:26a, XN1:26b).
e. Modulated detected signal from the power modulation amplifier at X2:16, which is
used to derive the driver pulse level reference voltage.
f.
Supply voltages for the transmitter driver stages, all routed from the transponder
power supply: high tension supply (XN1:2a,b,c); +18 volts supply (XN1:6a,b,c);
+15 volts supply (XN1:9a,b,c).
g. Auxiliary +24 volts supply (XN1:3a,b,c).

The outputs of the pulse shaper are of two main types - modulation pulses, and
adjustable supply voltages for the amplifier assemblies. The outputs are:
a. A receiver suppression pulse, which is supplied to the receiver video to suppress
receive functions during pulse transmission from the transmitter (XN1:10b).
b. To the exciter:
1. A rectangular modulation pulse signal 1W PULSE which provides the low-level
modulation of the transmitter (XN2:10).
2. Adjustable DC voltage EXCITER DC which supplies the collector voltage for V5
and V6 (XN2:8).
3. DC supplies for Class A operation of V1; these are collector voltage VC1
(XN2:6) and bias voltage BIAS 1 (XN2:2).
c. To the medium power driver:
1. High tension supply +HT (XN2:14).
2. V1 collector voltage MED PD COLL; this can be switch-selected to be either an
adjustable DC level or a shaped modulation pulse signal (XN2:12). In
2-31
HA72500
SECTION 2
configurations which do not use the 1kW amplifier, this latter arrangement
provides for the high-level modulation in the system.
d. To the power modulation amplifier:
1. High tension supply +HT (XN2:20).
2. Adjustable DC voltage POWER MOD AMP DC which supplies the collector
voltage for V1 (XN2:18).
e. In system configurations having 1kW outputs, high-level shaped pulse signal
supplied to the modulating stages in the associated 1kW RF amplifiers (XN1:25a,
XN1:25b).
f.
Reference voltage TO_TX_LVL (XN1:28b) which is fed to the monitor module

and CTU for measurement and comparison purposes.
The leading edge of the shaped modulation pulse is generated by a six-segment

adjustable-slope integrator. The durations of the segments are timed by a 5.5296 MHz
clock derived from the receiver video. The trailing edge is symmetrically generated by
discharging the integrator in reverse order. Because the same generator is used for both
pulses of a pair, reply separation of the RF pulses is equal to that determined by the
receiver video. Further, the timing of segments by the transponder clock ensures the
stability of the beacon reply.
Automatic peak pulse level control is applied as a slow acting feedback loop derived
either from the detected RF envelope of the 1kW output pulses of the transmitter or
direct from the high-level output of the pulse shaper.
In the quiescent state, awaiting the arrival of a modulator trigger pulse, the output of the
monostable D6:7 is high. This is the reset state of the pulse generating circuit. The high
output at D6:7:
a. sets the output of the D7, D4:12 divide-by-four flip-flops to low;
b. turns the bilateral switch D4:1, 2 on, thus setting the integrator output N1:1 to
zero;
c. inhibits the analogue multiplexer D1 from operating; and
d. sets the up/down flip-flop D5:2 output to high, which turns the bilateral switch
D4:10. 11 on, grounding the input to the multiplexer, and resets the up/down
counter D2 to the count up mode.
The carry out signal from D2:7 is high in the reset state when counting up. This signal is
applied to D6:3, and sets the monostable D6:6 in the ready state for a trigger pulse.
On receipt of a negative-going trigger pulse at XN1:8c, D6:7 goes low. When D6:7 goes
low:
a. the reset signal is removed from D7:7;
b. the reset is removed from the BCD counter D2:9, enabling it to begin counting;
c. the reset is removed from the up/down flip-flop D5:4;
d. the inhibit is removed from the analogue multiplexer D1:6; and
e. the initialisation bilateral switch D4:1, 2 is turned off, enabling integration to
begin.
2-32
HA72500
Figure 2-14
SECTION 2
Shaped Pulse Generation Waveforms
During the period that the D6:7 is low, the flip-flops D7 inject a 1.3824 MHz signal into
the BCD counter D2:15 which in turn feeds the BCD signal into the analogue multiplexer
D1. The D1 output levels that drive the integrator are individually adjustable to give the
required slope for each segment of the pulse; the first segment (produced by D1:14, 15)
is adjusted by the BASE level adjustment R3, the second segment by R5, through to the
sixth segment (produced by D1:4) which is adjusted by the APEX level adjustment R13.
When the counter D2 reaches a count of 7, the AND gate D3:1 changes state to high
which places a high on the preset enable (D2:1) of the BCD counter D2 and also places
a high on the J input of the up/down flip-flop D5:6. The next positive-going edge of the
D7:15 flip-flop output causes the up/down flip-flop D5:2 to change state. D5:2 goes low
and sends D2:10 low; this sets the counter D2 to the count down mode.
The state change of D5:2 also turns the bilateral switches D4:10, 11 off and D4:8, 9 on
and removes the preset signal from D2:1, allowing D2 to count down on the next clock
pulse.
When the D5:2 state change occurred, after the 7 count, D3:1 went low, which latched
the D5:2 up/down flip-flop output by putting a low on D5:6.
The bilateral switch D4:8, 9 turning on places approximately +10 volts on the multiplexer
D1:3 input. As the counter counts down it addresses the multiplexer in the reverse order,
discharging the integrating capacitor and producing a symmetrical waveform. When a
count of zero is reached D2:7 goes low, which places a low on the clear of the
monostable D6:1 The output D6:7 then goes high, and the system resets awaiting
another trigger pulse.
The failing edge of the modulator pulse is determined by the discharge of the integrator,
and the relationship between leading edge charge and failing edge discharge
characteristics can be set by the INTEGRATOR BALANCE adjustment R17.
2-33
HA72500
SECTION 2
Following the integrator, the pulse is injected into a two-stage filter network. The pulse
amplitude is variable by the MOD PULSE AMPLITUDE adjustment R58. Because the
RF amplifiers require a threshold voltage before modulation occurs, a pedestal voltage is
added which is variable by the PEDESTAL VOLTAGE adjustment R53. Provision is
made for the pedestal level to be determined by an input from an external temperature
sensor (XN1:26c, XN1:27a) consisting of a forward biased diode thermally joined to the
power transistor heat sink in parallel with V13; this is not employed in this equipment and
the reference voltage for N4:3 is derived from the voltage divider R63, R65, V13 which is
on-board mounted and compensates for ambient temperature variations only. The pulse
and the pedestal voltage are added together in V16. The pulse and pedestal voltage is
then amplified in the modulation amplifier comprising V10, V11, V5. The modulation
pulse output is accessible at test point XA3 and can be applied either to the associated
1kW RF amplifier (in high-power systems) via XN1:25a, XN1:25b, or to the medium
power driver (in low-power systems) via XN2:12. The modulation input to the medium
power driver is controlled by the MED COLL switch S4, and can be either the modulation
pulse or a variable DC voltage as set by the MED POWER DRIVER DC adjustment
R115.
The circuitry comprising N2 and associated components forms a video detector and
automatic level control circuit. The level is adjustable using ALC LEVEL R62. The ALC
source selection switch S3 allows the level control voltage to be derived either from the
modulator pulse output at N3:1, or from an external pulse detection circuit. The level
control voltage is accessible at test point XT3. The loop can be disabled by the ALC
LOOP switch S2; in the OPEN position this applies a +10 volts to the integrator, N1,
input via R40.
The two monostables D8 turn off the bilateral switch D4:3, 4 to induce a reduction in the
gain of the modulator amplifier for the second of the X channel pulses because the
effective gain of the RF transistors increases slightly for the second pulse when the
pulses are of 12 microseconds spacing. The gain reduction does not function on a Y
channel, because the pulses are spaced at 30 microseconds and the RF transistors treat
each pulse as an isolated event.
The rectangular RECTANGULAR MODULATION PULSE pulse signal is derived from
theD6 monostable. The two-stage common emitter amplifier V20 and V19 drives a
complementary pair of transistors V18 and V17 which operate together as buffers to
isolate the driver circuitry from the capacitive input of the FET transistor V23. The
transistor V18 conducts during the rising edge of the pulse and V17 conducts on the
failing edge providing a path to ground. C30 and R82 decouple the load of V23 from the
HT supply; R73 reduces the Q of the gate circuit to prevent oscillation, and R83
references the gate to 0V whenever V17 and V18 are both OFF. The RECTANGULAR
MODULATION PULSE is accessible at test point XT4 and at test jack XA1, and is output
to drive the second stage of the exciter via XN2:10. Components V31, C48 and R136
comprise a pulse stretching circuit, to extend the rectangular waveform pulse for use in
the receiver video module as receiver suppression.
Transistor V29 and associated components supply base and collector bias to the exciter
input stage V1. V21, V22, V25 and V30 provide the adjustable collector voltage supplies
for the amplifiers; R97 is the EXCITER DC adjustment for the collector voltage supplied
to V5 and V6 in the exciter; R115 is the MED POWER DRIVER DC adjustment for the
control voltage supplied to the medium power driver; R69 is the POWER MOD AMP DC
adjustment for the control voltage supplied to the power modulation amplifier.
Board test points are provided as shown in Table 2-4. The test points mounted on the
edge of the board are positioned to be accessible as front panel jacks on the transmitter
driver.
2-34
HA72500
SECTION 2
Table 2-4
LOCATION
On Pulse
Shaper
Board
Pulse Shaper Board Test Points

REF
LEGEND
XT1, 2
XT3
XT4
XT5
(EARTH)
(ALC)
SQUARE MODULATION
(PWR MOD AMP DC)
XT6, 8
XT7
XT9
XT10
XT11
(EARTH)
(EXCITER DC)
(MED PWR DRV DC)
(VC1)
(TD_TX_LVL)
XT12
XA1
XA2
Board edge
(front panel XA3
jacks on
XA4
Transmitter XA5
Driver)
XA6
XA7
(TD_MOD_LVL)
SQUARE MODULATION
FUNCTION GENERATOR
SHAPED MODULATION
+15 VOLTS
DRIVER LEVEL
EARTH
EARTH
SIGNAL
Earth
Loop control voltage
Pulse to exciter via XN2:10
DC control voltage to power modulation amplifier
via XN2:18
Earth
Supply voltage to exciter via XN2:8
DC control voltage for medium power driver
Collector voltage to exciter, first stage, via XN2:6
Detected RF output level from the transmitter
driver
Detected modulation pulse level
Modulation pulse to exciter
Output to the pulse-shaping integrator
Shape modulation pulse
Supply input to board
Detected RF output from transmitter driver
The DRIVER DC POWER switch S1 is mounted as a front-panel control, in the

NORMAL position it connects the +8 volts supply to V29 to generate the bias and
collector voltages for the input stage of the exciter; in the OFF position the supply is
disconnected, and the amplifier chain is disabled.
The green POWER ON indicator H1 is lit whenever the +15 volts board supply is
present. The red TEST indicator H2 is supplied from the +24 volts auxiliary voltage line;
this indicator lights when the DRIVER DC POWER switch S1 is set to the OFF position.
Both indicators are mounted to be visible as front-panel indicators on the transmitter
driver.
The output levels of the shape modulation pulse and the detected driver in are fed to
peak rider circuitry which holds the peak value of the pulse. This DC level is fed to the
monitor module for measurement by the CTU.
Detected driver in has its own bootstrap return to negate the capacitance in the line
between the detector and the pulse shaper.
2.3.4.2
"
Exciter 1A72532

The exciter employs three cascaded stages. The first stage (V1) operates in class A
condition, and is maintained in this condition by a regulator located on the pulse shaper
board. The regulator circuit measures the collector current of V1 and maintains it at
approximately 100 mA by controlling the base bias of V1. The base bias for V1 enters at
XN1:9 and the collector current enters at XN1:5. The base bias circuit is decoupled and
reaches the base via RF choke L1. The collector current is similarly decoupled and
reaches the collector via L2. Microstrip circuits match the 50 ohms input at XC1 to the
transistor base, and match the output impedance of the transistor to the 50 ohms load
presented by the input of the 90-degree hybrid coupler W1.
2-35
HA72500
SECTION 2
The input power level to the class A stage V1 is 10 mW and it delivers to W1 typically
100 mW. The ferrite beads on L1 and L2 keep the Q of the decoupling circuits low over a
broad band of frequencies.
The transistors of the next two stages each operate between pairs of 90 degree
couplers. Operated in this way, both the input and output impedances of these stages
approximate to 50 ohms. The transistors V3 and V4 of the second stage operate in class
AB condition, their biases being supplied via the RF chokes L5 and L7.
The collectors of V3 and V4 are supplied with a rectangular pulse from a common pulse
source of adjustable amplitude located on the pulse shaper. This pulse amplitude may
be adjusted from 8 volts to 18 volts. The pulsing of the collectors results in the second
stage delivering RF pulses of approximately 1 watt peak power to the input of the 90
degree hybrid coupler W2.
The third stage operates in class C condition, the bases of transistors V5 and V6 being
returned to ground through L9 and L11. In this third stage microstrip circuits are again
used to match the transistors V5 and V6 to their 90 degree hybrid couplers. The output
impedance of the 90 degree coupler W3 appears as a 50 ohms source to the third stage,
and the input impedance of the 90 degree hybrid W4 appears as a 50 ohms load. The
common DC collector supply voltage to the transistors V5 and V6 is adjustable on the
pulse shaper board from 15 volts to 30 volts. The third stage being driven by pulsed RF
at its input delivers corresponding pulses at its output. As used in the transmitter chain of
stages, the peak pulse power output from the exciter is typically 4 watts at XC2.
Wire loops labelled CURRENT TEST POINT on the circuit diagram allow the magnitude
and shape of the current pulses to be measured or observed on an oscilloscope using a
current probe. Adjustable trimmer capacitors are provided for the input circuits of all
three stages and for the output circuits of the first and the third stages. These trimmer
capacitors are adjusted at the factory to give an essentially flat response over the DME
frequency band (960 to 1220 MHz). The alignment procedure for the exciter, involving
the setting of the pulse amplitude to the second stage and the DC supply voltage to the
third stage, are carried out at the assigned operating frequency.
2.3.4.3
"
Medium Power Driver 1A72533

The medium power driver consists of two parts - an RF amplifier section and a
modulator section - and is mounted in a metal diecast box. The input signal to the
medium power driver comes from the Exciter 1A72532. A microstrip circuit matches the
50 ohms PULSE IN circuit at XC1 to the input impedance of the transistor V1. A second
microstrip circuit matches the output impedance of the transistor to the 50 ohms PULSE
OUT XC2. The transistor operates in class C.
The transistor collector is supplied with either a DC supply or a pulsed voltage,
depending on the role of the amplifier. In a 1kW transponder this stage operates with DC
on its collector, whereas in a 100 watt transponder this stage is the high-level modulated
stage. If DC is used its level may be adjusted from 15 volts to 30 volts. If pulse
modulation is used the pulse amplitude may be adjusted up to 30 volts.
The transistor V3 in the modulating circuit is a source follower. The transistors V4 and
V5 buffer the circuits on the pulse shaper against the input capacitance of V3 when the
medium power driver is used in the pulse modulated role. The inductors L1 and L2
function as RF chokes.
The amplifier operates over the frequency range 962 to 1213 MHz without retuning. The
output power at the operating frequency is controlled by setting the DC collector supply
or the peak voltage of the modulation pulse.
2-36
HA72500
SECTION 2
The capacitors C15, C16 and the resistors R6, R7, R8 act to fitter the current pulses
from the HT supply. The peak pulse power of the input pulse is approximately 4 watts,
and the pulse power at the output XC2 is typically 20 watts.
2.3.4.4
"
Power Modulation Amplifier 1A72534

The RF pulse input to the power modulation amplifier at XC1 from the medium power
driver is via a short length of semirigid transmission line which operates as a balun
converting the unbalanced input coaxial circuits at the module connector to a balanced
circuit at the entry points on the microstrip circuit. The amplifier uses a balanced
transistor. Microstrip circuits together with some fixed and variable capacitors match the
input and output impedances of the transistor to the 50 ohms balanced impedances
presented by the baluns.
A modulator detected signal, derived from a coupling and detector circuit (V2) is output
via XN1:A to the pulse shaper, where it is used to derive a driver pulse level reference
voltage.
The transistor V3 in the modulation circuit is a source follower. The transistors V4 and
V5 buffer the circuits on the pulse shaper against the input capacitance of V3 when used
in the pulse modulated role. The inductors L2 and L3 function as RF chokes.
When used as a modulator its output power is set by adjustment of the input rectangular
pulse power and the amplitude of the video modulation pulse, applied to its collector.
Table 2-5
Driver
TYPE
Green LED
Red LED
Summary of Front Panel Controls and Indicators : Transmitter

LEGEND
FUNCTION/SETT1NG/INDICATION
DC POWER ON
Indicates that 15 volts output from the transponder power supply is
applied to the module.
TEST
Indicates that the DRIVER DC POWER switch is not in the NORMAL
position or that internal switches S2 and S3 are not in the correct
positions.
RF OUTPUT
Adjusts the RF output from the DME, when the ALC loop is closed.
Variable
resistor
Toggle switch DRIVER DC
POWER
Test jack
Test jack
Test jack
SQUARE PULSE
MODULATION
FUNCTION
GENERATOR
SHAPED PULSE
MODULATION
+15V
DRIVER LEVEL
Test jack
Test jack
EARTH
EARTH
Test jack
Test jack
OFF
Turns off the pulse modulation to the second stage of

the exciter.
NORMAL
Normal operation.
A buffered low-level modulation pulse output representing the signal
from the pulse shaper to the second stage of the exciter.
The buffered output of the pulse-shaping integrator on the pulse
shaper.
A buffered high-level modulation output representing the signal from
the pulse shaper to the modulation stage.
The buffered input +15V supply.
A buffered signal representing the output RF pulses from the
module.
2-37
HA72500
SECTION 2
Table 2-6
Summary of Internal Controls : Transmitter Driver
SUBASSY
TYPE
1A72531
Preset
Pulse
resistors
Shaper PWB
Assembly
REF
R3. 5, 7, PULSE SHAPE

9, 11,
13
R17
INTEGRATOR
BALANCE
R36
BACK PORCH
R52
PEDESTAL
VOLTAGE
R54
2ND PULSE
EOUALISING
R58
MOD PULSE
AMPLITUDE
R62
ALC LEVEL
R69
R85
R97
R115
Toggle
switch
1A72532
Exciter
CONTROL FUNCTIONS
LEGEND
S1
POWER MOD
AMP DC
1W PULSE
EXCITER DC
MED POWER
DRIVER DC
DRIVER DC
POWER
These vary the slope of the segments of the function

generator output from base (R3) to apex (R13).
Adjusts the balance of the function generator
integrator.
Adjusts the spacing between the modulation pulses.
Adjusts the DC level of the shaped modulation pulse.
Adjusts the height of the second pulse of the pulse
pair to equalise it with the height of the first pulse.
Adjusts the amplitude of the shaped modulation
pulse.
With S2 (ALC LOOP) in its closed position, adjusts
the shaped modulation pulse amplitude.
Adjusts the power modulation amplifier DC level.
Adjusts the pulse modulation amplitude.
Adjusts the exciter DC level.
Adjusts the medium power driver DC level.
OFF
NORMAL
Power supply to exciter is off.

Power supply to the exciter is under
CTU control.
Slide switch S2
ALC LOOP
CLOSED
Automatic level control is enabled.
OPEN
Automatic level control is disabled.
Slide switch S3
ALC
VIDEO
ALC maintains shaped modulation
pulse amplitude.
DETECTED
ALC maintains output level from the
RF
1kW RF power amplifier.
Slide switch S4
MED PD COLL DC
Selects a DC voltage as the collector
supply for the medium power driver in
high power (1kW) mode.
MODULATION Selects the shaped modulation pulse
as the collector supply for the
medium power driver in low power
(250 W) mode.
Variable
C5, 15, 17. 21, 26, 30, 33, Used to align the exciter (see Section 3.4.25),
capacitors 34.
2-38
HA72500
2.3.5
SECTION 2
Transponder Power Supply 1A72525
This assembly comprises the Main PWB Assembly Transponder Power Supply 1A72526
mounted on a supporting frame; the board functions are described in the following
section.
2.3.5.1
"
Main PWB Assembly Transponder Power Supply 1A72526

This power supply is used to generate the voltage supplies required by the Transmitter
Driver 1A72530. These voltages are +15 volts, +18 volts, and HT (42-50 volts). The front
panel TRANSPONDER DC POWER switch enables the transponder (transmitter driver
and receiver video) to be turned ON, OFF, or to NORMAL; in this latter condition the
transponder is controlled by the CTU via XN1:30b.
Commands to turn the power supply on, either from the control panel or the front panel
switch, will result in the relay K1 being operated by the action of V11 being turned on.
With K1 operated, contacts K1a and K1b will close, supplying the transponder with +24
volts and supplying +24 volts to the internal regulators and inverter.
The ON position on the front panel TRANSPONDER DC POWER switch is provided so
that power may be applied to a failed system for maintenance. Normally, if a primary
fault has occurred and the power has remained on, circuitry in the monitor module(s) will
(after a time delay) inhibit pulse-pairs from leaving the receiver video module. However,
the ON position of TRANSPONDER DC POWER activates INHIBIT DISABLE line at
XN1:9c to enable the faulty system to be operated for fault diagnosis.
The input +24 volts supply is available for monitoring on the front panel using a high
impedance voltmeter between the test jacks +24V IN (XA1) and EARTH (XA4). Also the
input +24 volts supply current may be monitored, again with a high impedance voltmeter
connected across + SUPPLY CURRENT (XA7) and - SUPPLY CURRENT (XA8). In this
case a measured voltage of 100 mV corresponds to a supply current of 1 ampere.
The HT, +18 volts, and +15 volts supplies may be monitored at the front panel, at test
jacks HT (XA2), +18V (XA5) and +1 5V (XA3) respectively.
The +15 volts supply is produced by a 3-terminal regulator V1, with its input supplied
from the switched +24 volts rail. The 3-terminal regulator is current limited. Its output is
used within the power supply as a reference voltage for generating the +18 volts supply
and for powering N1.
The +18 volts supply is designed using discrete components. V3 and V4 are connected
as a differential error amplifier with the reference voltage, derived from the +15 volts
supply via R7 and R11, connected to the base of V4. The +18 volts output voltage is
sensed by V3 via the resistive divider R16 and R10. These two resistive dividers
determine the output voltage from the regulator. The output voltage of this regulator is
within the range 17.5 to 18.5 volts.
Zener diode V6 provides a regulated 5 volts to the current-limiting transistor V8.
The current limiter operates in the following manner. In the normal working condition of
the supply (non-overload state), V8 is forward biased and the voltage drop across V8
(0.3 volts), applied to the emitter-base junction of VS, is not sufficient to turn it on. When
the regulator output current reaches the predetermined overload value (approximately
170 mA), the voltage drop across R20, R21 added to the 0.3 volts already present turns
V5 on and its collector current raises the base voltage of V7, overriding the normal
voltage regulating action, to limit the output current from the supply.
2-39
HA72500
SECTION 2
The HT supply is developed by a switched mode inverter which steps up the voltage
from the switched +24 volts supply. A power MOSFET V22 is used as a pulse-widthmodulated switch operating into a transformer whose output is rectified, filtered and
controlled at a constant voltage.
A constant switching frequency is generated by N1, the frequency (40 kHz) being
determined by R34 and C24. A sample of the output voltage presented at pin 1 of N1 is
compared with the reference sample at pin 2. The circuit automatically adjusts the width
of the on-pulse at pins 11, 14 so that the energy delivered from the secondary of the
transformer is just sufficient to maintain a consistent DC out voltage. The HT voltage is
set using the HT VOLTAGE adjustment R26.
Input current overload protection is provided as follows. An override control on the pulse
width generated in N1 is available through pin 9. When pin 9 is open circuit, control of
the pulse width is through pin 1 only. As the resistance to ground at pin 9 is lowered, the
maximum length of the pulse is progressively shortened, until it drops below 1
microsecond. As the input current increases from the supply, so does the magnitude of
the current pulses through V22. The resistor R40 is chosen so that at a predetermined
overload current, the peaks of the voltage pulses across R40 just turn off V26. As V26
turns off, V25 turns on to provide a current path from pin 9 to ground, bringing the
current limiting action of the circuit into play.
The transistors V20 and V1 8 charge and discharge respectively the input capacitance of
V22, while the turn-off spike at its drain is controlled at a safe level by V12, V19 in
combination, by V13, C16 and R28 in combination, and by C15 and R25 in combination.
Table 2-7
Power Supply
Summary of Front Panel Controls and Indicators : Transponder

TYPE
LEGEND
Green LED POWER ON
Indicates that power is applied to the module.
Red LED
TEST
Indicates that the TRANSPONDER DC POWER switch is not in the
NORMAL position.
Toggle
All supply outputs are on, regardless of CTU commands.
TRANSPONDER ON
switch,
This is required during testing and maintenance.
DC POWER
centre off
OFF
All power supply outputs are off.
NORMAL
Power supply outputs are under CTU control.
Test jack
+24VIN
The input voltage from the power supply/battery.
Test jack
HT
HT output to the Transmitter Driver 1A72530.
Test jack
+15V
+15 volts output to the Transmitter Driver 1A72530.
Test jack
EARTH
Ground reference for +24V IN, HT, +18V and +15V, which is connected
to the power +24V IN return.
Test jack
+18V
+18 volts output to the Transmitter Driver 1A72530.
Test jack
SWITCHED +24V The switched +24 volts output.
Test jack
SUPPLY
These test jacks are connected to either side of a resistor in series with
CURRENT+
the input +24V IN. The + jack is connected to the higher voltage side of
the resistor, and the - jack to the lower voltage side (100 mV/ampere).
Test jack
SUPPLY
CURRENT-
2-40
HA72500
Table 2-8
SUBASSY
SECTION 2
Summary of Internal Controls : Transponder Power Supply

TYPE
1A72526
Preset
Main PWB
resistor
Assembly,
Transponder
Power Supply
2.3.6
"
REF
R26
CONTROL FUNCTIONS
LEGEND
HT VOLTAGE
Sets the HT output voltage to the transmitter

driver.
2.3.6 1kW RF Power Amplifier Assembly 1A72535

The 1kW RF power amplifier assembly is located at the rear of the rack behind the 1kW
PA power supply which provides the power amplifier's HT supply.
The elemental electrical operations of the 1kW power amplifier are:
Formation of the initial shaped pulse by the power modulation amplifier.
The first power amplification of the shaped pulses by the broadband amplifier
pair A1, A2.
Eight-way power division of the output of the A1, A2 pair by the power divider.
A second broadband amplification of each eighth-part of power by the amplifiers

A3, A4 .... A10, which form the output amplifier.
Recombination of the amplified outputs by the power combiner.
Passage of the power through the circulator to the output point XC2.
Containment of the RF energy to within the amplifier metal housing by the filters
on the 1kW PA connector assembly.
Provision of the main component of the supply current pulse to the amplifier from
a reservoir capacitor bank.
2-41
HA72500
Figure 2-15
SECTION 2
1kW RF Power Amplifier Block Diagram
The pulses leaving the power modulation amplifier consist of a shaped portion above a
pedestal. The pedestal provides the turn-on power for the following broadband
amplification. The initial pulse is modified by passage through the amplifier to emerge at
XC2 with the characteristic DME Gaussian shape.
Formation of the initial shaped pulse takes place in the following manner. A rectangular
RF power pulse of typically 50 watts enters the Power Modulation Amplifier 1A72534 at
XC1 and drives the emitter of the transistor in the modulation amplifier. The collector
voltage pulse enters the amplifier at XN1:c and modulates the power modulation
amplifier to deliver at its output a pulse consisting of a shaped portion on a rectangular
pedestal. The pulse power drive, the collector pulse shape and amplitude, are all
adjusted to produce the required initial pulse shape. These adjustments are made from
the transmitter driver.
The first power amplification of the pulse takes place in the amplifier pair A1, A2 in the
1kW RF power amplifier. Here the 250W amplifiers A1, A2 are connected between
90-degree hybrid couplers on the combiner and divider assemblies. This arrangement
has the property of providing a near 50 ohms resistive input impedance to the hybrid
coupler W5 and a near 50 ohms resistive output impedance from the hybrid coupler W1,
provided always that the impedances of the two transistors remain the same, even
though the actual match at each transistor may deteriorate.
2.3.6.1
"
Power Divider 1A72536

In the power divider, power division by four is obtained as a division by two, using the
Wilkinson divider circuit shown schematically on the power divider in Drawing
72535-1-07, followed by the two further divisions again using the Wilkinson circuit. The
2-42
HA72500
SECTION 2
division by eight is completed using the 90-degree hybrid circuits labelled W2, W3, W4
and W5 on the power divider. The resistors R1, R2 and R3 provide isolation between the
output ports of the Wilkinson circuits; the resistors R5, R6, R7 and R8 on the 90-degree
hybrids absorb reflected power from the transistor circuits.
A coupling and detector circuit creates a driver detected signal output at XC11.
The second broadband amplification of each eighth-part of power is obtained by pairs of
amplifiers A3, A4; A5, A6; A7, A8, A9 and A10 which operate between 90 degree
'hybrids in the same way as just described for the amplifier pair A1, A2, though at a
higher power level.
2.3.6.2
"
Power Combiner 1A72537

The recombining of the powers is accomplished in the power combiner circuit, through
processes which are the reverse of those described for the power divider. A coupling
circuit and detector creates an output detected signal output at XC12. The combined
power is passed to the output through the circulator W1. The resistive load R1
connected to the circulator provides a 50 ohms resistive load for the 1kW amplifier in the
event of a fault effectively removing its load - for example, disconnection of the DME
antenna.
A group of 20 capacitors form the capacitor bank which provides a reservoir from which
the current pulse requirements of the amplifier are supplied, thus largely confining the
current pulse paths to the amplifier ground plane.
2.3.6.3
"
250W RF Amplifier 1A69873

This amplifier is the basic building block of the 1kW RF power amplifier, and operates
with a constant DC collector supply of 50 volts to raise the peak input power pulse of 50
watts to, typically, a 250 watts peak output power pulse. It is a microstrip design which
covers the frequency range 962 to 1213 MHz without the need for circuit adjustment;
input and output impedances are each 50 ohms.
The amplifiers are used in pairs between 90-degree couplers, so that each pair presents
a generally better input/output match than either amplifier would show if operated
separately.
2.3.6.4
Power Modulation Amplifier 1A72534
The function and operation of this unit is described in Section 2.3.4.4.
2.3.6.5
"
1kW PA Connector PWB Assembly 1A72544

The 1kW PA connector assembly provides a method of connection for the power and
signals to and from the 1kW power amplifier.
To reduce RF leakage through the connector assembly the PWB is covered on all nontrack areas with ground plane and each of the inputs is decoupled through a surface
mount 22 pF capacitor which is self resonant in the DME frequency band.
Each signal output (PWR AMP MOD, PWR AMP DRV, PWR AMP OUTPUT) is supplied
with a return connection (R-PWR AMP MOD, R-PWR-AMP-DRV, R-PWR AM OUTPUT)
which follows the signal waveform. This reduces the effect of line capacitance in the
cables from the 1kW power amplifier detectors to the control and status board.
2-43
HA72500
2.3.7
"
SECTION 2
1kW PA Power Supply 1A72540

This unit consists of the DC-DC Converter Assembly 1A72542 and attached Regulator
Assembly 1A72543, the Control and Status PWB Assembly 1A72541, relay K1 and filter
components.
A front panel switch AMPLIFIER DC POWER mounted from the control and status board
allows the 1kW RF power amplifier to be powered ON or OFF through the relay K1 for
test purposes.
2.3.7.1
"
DC-DC Converter PWB Assembly 1A72542

The DC-DC converter changes the 24 volts DC supply to the DME beacon to a regulated
50 volts supply to power the 1kW RF power amplifier. The converter is protected against
output short circuits and includes circuitry to prevent over-voltage supply to the 1kW
power amplifier.
The converter circuit consists of a power switching section and a switching signal
generating section. The power switching section comprises four power FET switches, V1
through V4, associated with the ferrite-cored transformer T6. This is followed by a bridge
rectifier and smoothing circuit built around L2. A second filter associated with L3 reduces
the level of switching hash present on the output voltage from the supply.
The switching signal generation section of the converter, located on the Regulator PWB
Assembly 1A72543, is shown in Drawing 72542-1-01 within a dotted surround. The heart
of this circuit is the CA1524 (V101) which generates pulses of controlled width at a
constant rate (30 kHz) determined by R105 and C103. A pulse from V101 is delivered
alternately at pins 12 and 13. These pulses drive the gates of the FET pair V1, V2 via
the buffer amplifiers V118 and the gates of the FET pair V3, V4 via the buffers V119.
An adjustable fraction of the output voltage taken across C11 is applied to pin 1 of V101.
This voltage is compared within V101 to the reference voltage applied at pin 2. The ontime of the switching pulses to the FETs is adjusted by V101 so as to deliver just
sufficient energy at the secondary of the transformer to meet the current demand on the
converter at the set output voltage. The output voltage from the converter is varied by
changing the fraction of it which is applied at pin 1, by altering the value of the variable
resistor R112.
If the output voltage rises above 50 volts, the emitter voltage of V116 increases more
rapidly than its base voltage. At an over-voltage of typically 55 volts the transistor V116
turns on, the SCR V117 is triggered on, and as a consequence the 15 volts supply to the
buffers is removed and the converter remains shut down until the primary supply is
removed to allow the SCR to extinguish.
For current overload protection, the primary current sensing circuit is set to respond at a
lower overload current than the direct output current overload sensing circuit. The
primary sensing circuit peak rectifies the stream of primary current pulse samples across
the secondary of transformer T1, to produce a positive voltage across R115. When this
voltage is sufficient to turn off V106, V107 turns on, the voltage at pin 9 fails and the
pulses generated by V101 shorten to restrict the further increase of the output current
while the fault condition exists. In the event of the primary current overload not
operating, then at a higher secondary overload current; the voltage drop across R12 is
sufficient to turn on V110; this turns on V112 and, as for the primary current pulse
sensing circuit, the voltage at pin 9 fails and V101 output pulses are shortened to limit
the overload current.
2-44
HA72500
SECTION 2
Snubber circuits and zener diodes limit the positive voltage turn-off spike at the FET
drains to typically 80 volts. Zener diodes limit the gate voltages of the FETs to 18.4 volts.
The variable resistor R16 is set for 1 mV between XP:4 and XP:3 per ampere of primary
current. The pulse transformers T2, T3, T4 and T5 produce 0.1 volts per ampere of FET
source pulse current; these allow the performance of the individual FETs of either pair to
be measured or compared.
2.3.7.2
"
Control and Status PWIB Assembly 1A72541

A sample of the converter voltage, taken at XP:5a on that unit goes to the control and
status board where it causes the front panel green POWER ON indicator H3 to light if
the voltage is between 48.5 volts and 51.9 volts. This result is achieved as follows; the
variable resistor R45 is adjusted so that the two voltages at the imaginary centre of R46
is equal to the zener reference voltage (5.6 volts) of V12. A window comparator formed
by two comparators of N7 monitors the voltage sample against upper and lower limits
allowing H3 to light when between these two limits.
A 15 volts supply is derived from the 24 volts supply via a linear voltage regulator N9
and provides the IC supply on the board.
The AMPLIFIER DC POWER test switch S1, when in the NORMAL position, allows the
relay K1 coil to be energised by a 5 volts signal on XN1:8. If the switch is in the ON or
OFF positions then the front panel red TEST indicator H2 is lit, the test line XN1:2 is at 0
volts and this condition is signalled to the CTU.
The power amplifier signals, output, driver and modulator are buffered and then level
detected. The detected output level of the power amplifier output, power amplifier driver,
power amplifier modulator from the 1kW RF power amplifier are fed to the control and
status board.
Each detected output level has its own bootstrap return to negate the capacitance in the
line between the 1kW PA and the control and status board. The bootstrap trigger also
provides the detected output level test jack output (XA1, XA2, XA3).
PA_OP_LVL, PA_DRV_LVL, PA_MOD_LVL are the detected outputs peak levels.
These DC voltages are held and fed to the monitor module for measurement by the
CTU.
RF DET IN is fed to the pulse shaper (in the transmitter driver) and is the feedback level
for the ALC loop.
2-45
HA72500
SECTION 2
Table 2-9
Supply
Summary of Front Panel Controls and Indicators : PA Power

TYPE
LEGEND
Green LED
Red LED
Green LED
Toggle
switch,
centre off
POWER ON
TEST
HT ON
AMPLIFIER DC
POWER
Test jack
POWER AMP
MODULATOR
OUT
POWER AMP
OUTPUT OUT
POWER AMP
DRIVER OUT
+15V
SUPPLY
CURRENT SUPPLY
CURRENT+
EARTH
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
+24V IN
HT OUT
SHAPED
PULSE
MODULATION
Table 2-10
Indicates that DC power is supplied to the module.

Indicates that the AMPLIFIER POWER switch is not in the NORMAL position.
Indicates that the HT supply is available, and within limits.
ON
HT output voltage is supplied to the 1kW RF power amplifier
regardless of the power control signal state. This is required only
during testing and maintenance.
OFF
There is no power output from the 1kW PA power supply.
NORMAL There is HT output from the module while the power control signal
from the CTU is active (high); if it is inactive (low) the HT output is
set to 0 volts.
Buffered output signal from the modulation stage of the 1kW RF power
amplifier.
Buffered output signal from the output stage of the 1kW RF power amplifier.
Buffered output signal from the driver stage of the 1kW RF power amplifier.
Internally generated +15V supply (15 volts).
These jacks are connected to either side of a resistor in series with the +24V
IN supply. The + jack is buffered to the higher voltage side of the resistor, and
the - jack to the lower voltage side (1 mV/ampere).
A ground reference for the +24V IN, HT OUT and +15V OUT supplies, which
is connected to the +24V IN return.
Buffered +24V IN power supply input.
Buffered HT output of 48 to 52 volts.
Buffered signal modulation pulse.
Summary of Internal Controls : PA Power Supply
SUBASSY
1A72541 Control and
Status PWB Assembly
1A72542 DC-DC
Converter Assembly
A72543 Regulator PWB
Assembly
TYPE
Preset
resistor
Preset
resistor
Preset
resistor
REF
R45
R16
R112
CONTROL FUNCTIONS
Varies the centre of the HT ON window between
approximately 48.5 and 51.9 volts.
Calibrates the input circuit monitoring of the DC-DC converter
see Section 3.4.33).
Sets the HT output voltage to the 1kW RF power amplifier.
2-46
HA72500
2.3.8
"
SECTION 2
Test Interrogator 1A72514

The test interrogator module contains the Test Interrogator Main PWB Assembly
(1A72515), RF Generator (1A72516), Modulator and Detector (1A72518), Reply
Detector (1A72519) and Attenuator (1A69737), plus fixed 30 dB and 20 dB attenuators
The interconnection of these subassemblies is shown in Drawing 72514-3-04. The front
panel has a number of test jack connectors and test switches by which various operating
parameters of the module can be set and checked.
The test interrogator operates as an independent unit simulating aircraft interrogation
pulses. The DME transponder treats these pulses as normal interrogations and
responds accordingly, allowing the test interrogator to measure and display the critical
transponder parameters such as transponder delay, pulse separation and efficiency.
Interrogation pulses are alternately generated at two predetermined power levels, to
allow different parameters to be measured. The lower level of interrogation into the
transponder receiver is at -85 dBm and permits a measurement of transponder efficiency
to be made. The level into the transponder receiver is then switched to -70 dBm to allow
transponder delay to be measured. To enable these changes in signal level out of the
test interrogator into the DME receiver, a switched PIN diode Attenuator (type 1A69737)
is used.
The actual levels from the test interrogator are nominally 30.5 dB higher than the levels
stated above, because of the attenuation provided by the directional coupler in the RF
panel, and the attenuation in the rack cabling.
The measured parameter values are presented in digital form to the control and test unit
where each parameter value may be displayed as required. As well as real-time testing
of the transponder, the test interrogator may also be used as a built-in test unit for
system alignment.
A directional coupler mounted in the RF panel connected in-line with the antenna feeder
is used for injecting the test interrogator interrogation pulses into the transponder.
Another port on the directional coupler is used to sample the transponder reply pulses
and to feed them through to the test interrogator module for detection and parameter
testing.
The RF generator uses a crystal-controlled oscillator as its signal source, operating at a
frequency of one-twelfth of the DME receive frequency. A total of five crystals are used
to allow shifting of the RF generator frequency for testing the band pass and adjacent
channel rejection characteristics of the transponder. The five crystals correspond to
frequencies of nominal operating frequency; nominal 160 kHz, for pass band testing;
nominal 900 kHz for adjacent channel rejection testing.
The crystal oscillator is followed by a buffer stage and three stages of frequency
multiplication to produce the required operating channel frequency. Following the
multipliers a micro-stripline amplifier stage raises the signal level to approximately +11.5
dBm.
The output circuit of the RF generator includes a video amplitude demodulator from
which the video output pulses are fed out to the modulator and detector for automatic
level control.
After receiving a pulse from the test interrogator main board, the modulator and detector
will generate the correct modulation waveforms, MOD OUT and DRIVE OUT, to produce
the required pulse shape at the output of the RF generator.
2-47
HA72500
SECTION 2
RF pulses from the RF generator are passed to a 20 dB 50 ohms attenuator pad; the
output of the pad is connected directly to the input of the PIN diode stripline attenuator.
The stripline attenuator is arranged such that when the PIN diode is off the attenuator
loss approaches zero, and when the diode is switched on the attenuator loss increases
by 15 dB. The output of the stripline attenuator is fed through a 30 dB' 50 ohms
attenuator pad to the directional coupler in the RF panel.
With 1 dB residual loss in the module interconnections, pulse-pairs leaving the RF
generator are alternatively attenuated by 51 and 66 dB by switching the diode attenuator
between each pulse-pair; these signals are further attenuated by 30 dB in the directional
coupler.
Transponder output pulses, extracted by the directional coupler in the antenna
transmission line, are demodulated and processed, in the reply detector, to provide
logic-level trigger pulses timed at the 50% amplitude points on the leading edge of each
pulse. These trigger pulses are used as timing points for measuring the transponder
critical time-dependent parameters.
The reply detector uses a half-height pulse detector-processor identical to the one used
in the modulator and detector so that the inherent delays in each detector will be equal
and not affect the measurement of transponder delay. A front-panel pushbutton switch
connects both the reply detector and the modulator detector circuits to the RF generator
so that the detector pulses may be checked for coincidence.
As the test interrogator relies heavily on time period and rate measurements, a stable 10
MHz crystal oscillator is used as a master clock. All pulse generation and timing
waveforms are derived from this stable source.
For normal transponder interrogation and monitoring, pulse-pairs for transmission are
generated at a frequency of 100 Hz in a single DME, or 50 Hz in a dual. This rate may
be varied for other testing purposes by the appropriate switching of a multiplexer to
select an alternative clocking frequency. The demodulated RF pulses from the RF
generator are fed back into the test interrogator main board where the signal processing
is begun.
2.3.8.1
"
Main PWB Assembly Test Interrogator 1A72515

The following description of the test interrogator main board functions is related to the
five main functions provided by the board - CTU bus, power, normal mode, counter/timer
and monitor fault limit test (MFLT) mode.
2.3.8.1.1
CTU Bus
The CTU bus is the control interface between the Control and Test Unit (CTU) and the
test interrogator. Control information is sent from the CTU to control the MFLT,
counter/timer and other functions of the test interrogator. D 15, D25 and D27 buffer the
incoming signals from the CTU. The CTU control signals (RD, WR, XDT_R, XDEN,
ADDR) are decoded in D26 and the selected latch or buffer is enabled as shown in the
timing diagrams - Figure 2-16 and Figure 2-17.
2-48
HA72500
SECTION 2
Figure 2-16
CTU Bus Timing - Read
Figure 2-17
CTU Bus Timing - Write
The MFLT and counter/timer chips D34 and D35 have their own internal address
decoders, but their chip select signals MEAS_CT_CS and M_FLT_CT_CS are derived
from D26.
2.3.8.1.2
Power
The test interrogator can be powered in one of three ways:

a. The CTU can switch the test interrogator power on or off via the CTU bus when
the test interrogator front panel switch TEST INTERROGATOR AND MONITOR
POWER is in the NORMAL position. The test interrogator module is then
powered from the switched +24 volts supply +24V_SW.
b. When the test interrogator front panel switch TEST INTERROGATOR AND
MONITOR POWER is in the ON position CTU control is bypassed, and the
module is powered on directly from the +24V_AUX supply.
c. When the Transponder Power Supply 1A72525 (located in the transponder
subrack) is on, either by the power supply front panel switch TRANSPONDER
DC POWER or by CTU control.
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HA72500
2.3.8.1.3
SECTION 2
Normal Mode Operation
Normal mode is the situation when the test interrogator interrogates the transponder and
extracts parameter information from the received reply pulses. In this mode the
counter/timer functions may be used to measure the parameters for display on the CTU.
The 10 MHz crystal oscillator is formed with D51, G1 and associated components. This
10 MHz is divided down to 1 MHz in D39 and is fed to the divider chain D43, D44, D45
and D46. From the divider chain the four test interrogation pulse repetition frequencies
(TIPRF) are derived. The TIPRFs (10 kHz, 1 kHz, 100 Hz and 50 Hz) are fed to D28
where one of the TIPRFs is selected. The selected TIPRF initiates an interrogation of the
transponder as shown below.
The signal TO_SIG_GEN is the signal which triggers an interrogation from the RF
Generator (1A72516) and the Modulator and Detector (1A72518). The pulse spacing
can be either 12 or 36 microseconds depending on whether an X mode or a Y mode
interrogation is being made. X or Y mode is selected by S4. The interrogation pulse
spacing may be altered by 1 or 2 microseconds by S2 or S3 to test the transponder
double pulse decoder.
The TIPRF also initiates a pair of reply accept gates, after a time delay selected by
switches S6 and S5, which ensures that non-synchronous replies from the receiver
video do not corrupt any parameters, as shown in the timing diagram below. The
operation of D18, D17. , D1 and D19:4 is similar to that described above for D3 and D4.
Synchronous first reply pulses are detected by the DETECTED TX PULSE signal at
D2:5 clocking D2:7, enabled by D17:11. Following the first pulse, D5:7 is set low,
enabling D5:10 to be clocked by the second synchronous DETECTED TX PULSE,
provided it falls within the second reply accept gate from D1:11.
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SECTION 2
The Delay parameter (DELAY_DUR_PULSE) D2:10 is set by the signal

FROM_SIG_GEN_DETECTOR and is reset by the first pulse of the signal
WIDTH_PULSE coincident with REPLY_ACCEPT_GATES D2:7. If there is no
WIDTH_PULSE coincident with the reply gate pulses then the monostable D2:10 times
out (after approximately 180 microseconds).
The Spacing parameter (SPAC_DUR_PULSE) D5:6 is set by the first WIDTH_PULSE
coincident with the REPLY_ACCEPT_GATES from D2:7 and reset by a second
WIDTH_PULSE coincident with the REPLY_ACCEPT_GATES from D5:9. If there is no
second WIDTH_PULSE coincident with the REPLY_ACCEPT_GATES the monostable
D5:6 will time out (after approximately 60 microseconds).
If a reply pulse pair is correctly decoded (that is, a WIDTH_PULSE is coincident with
both REPLY_ACCEPT_GATES) then a REPLY_PULSE is generated (from D5:9).
The RF output of the RF generator is attenuated every second output pulse so the
monitor can measure Efficiency at low RF signal levels. The signal TI_ATTENUATOR
(at XN2:20) controls the RF output attenuator which can be set permanently high or low
under CTU control. The output signal DEL_SPAC_MON_EN (XN1:22c), when high,
indicates that the Interrogation taking place is a high level interrogation. The output pulse
EFF_MON_ENABLE (XN1:25a), when high, indicates that a low level interrogation is
2-51
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SECTION 2
taking place. Signals AC0, AC1 (under control from the CTU), when high, cause
EFF_MON_ENABLE and DEL_SPAC_MON_ENABLE to stay low.
2.3.8.1.4
Counter/Timer
The counter/timer section of the test interrogator counts and times parameters by use of
the type 82C54 counter/timer chip D35. This device is controlled by the CTU via the CTU
bus. For information on the programming of the 82C54, refer to manufacturer data
sheets.
The counter section uses two of the three counters in D35. Counter 2 is loaded with a
number from the CTU bus and when COUNT_EN is set high by the CTU, a single pulse
(COUNTER_STATUS) of 1, 2 or 4 seconds is generated to set the measurement period
from Counter 1. COUNTER_STATUS opens the gate of counter 1 of D35 allowing the
required parameter to be counted. When COUNTER_STATUS goes low this is an
indication to the CTU that the count has finished and valid data is waiting in counter 1 to
be read. The parameters to be counted (transmitted pulses, decoded interrogations,
synchronous replies and calibration signal) are selected in the multiplexer D42.
The timer section consists of counter 0 of D35 and the PLD (programmable logic device)
D33. When the signal TIMER_EN is set high by the CTU, this input to D33:2 causes
circuitry in D33 to select one complete pulse from the pulse trains selected in D8 and
input to D33:11. It achieves this by detecting a failing edge on the input to D33:11 to set
TIMER_STATUS high. An internal signal selects the next pulse input to D33:11 and
passes it to the gate of counter 0 of D35. The duration of this pulse is measured by
counter 0 using the 10 MHz clock at D35:9. The failing edge of the selected pulse sets
TIMER_STATUS LOW to signal the CTU that valid timer parameter data is waiting in
counter 0 to be read.
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2.3.8.1.5
SECTION 2
Monitor Fault Limit Test Mode
Monitor Fault Limit Test (MFLT) mode is a mode in which the test interrogator is used to
test the Monitor Module (1A72510). In this mode, the test interrogator creates the
parameters normally derived from the output of the transponder and feeds these to the
monitor module. The value of the parameter is varied by control from the CTU to
determine the point at which the monitor indicates a fault. To simulate the reply the type
82C54 counter/timer D34 is used. Each of the counters is loaded with a number which
gives the required TIPRF (Counter 0), Delay (Counter 1) and Spacing (Counter 2) _ see
figure below.
When the signal M_FLT_EN is set high, the test interrogator no longer interrogates the
transponder and ignores any WIDTH_PULSEs produced by the reply detector. D28:13 is
switched so the selected TIPRF is M_FLT_TIPRF (from D34:10). The signal
M_FLT_REPLY produced at D29:7 (see figure below) and selected by D6 is processed
like any other reply and the parameters are extracted as described in normal mode
operation. To prevent interfering with beacon operation, signal TO_SIG_GEN is inhibited
during these tests. D6:14 also selects a replacement detected interrogation signal from
D52:10 since no signal is available on FROM_SIGN_GEN_DETECT. This signal is
required for the measurement of delay.
To test Efficiency the signal M_FLT_EFF_EN is set high, via the CTU bus. This switches
the MON_TIPRF signal to the monitor module to 10 kHz, while retaining separate CTU
control of REPLY_PULSES.
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2.3.8.2
"
SECTION 2
RF Generator 1A72516

The RF generator signal source consists of a crystal oscillator operating at a nominal
frequency of one-twelfth of the transponder receiver frequency.
Any one of five crystals G1-G5 may be selected to provide the output frequency of the
test interrogator. One crystal corresponds to the transponder receive frequency while the
other four correspond to frequencies either side of the nominal receive frequency at
160 kHz and 900 kHz.
The crystals may be selected by operating the dual-in-line switch S1 mounted on the
printed board. Access to the switch is made by withdrawing the module from the rack
and then operating the switch through the access hole in the cover of the RF generator
diecast box. An extra switch position is included to provide a CW TEST condition for
receiver AGC tests. This adds a CW signal 10 dB below the interrogation pulses.
The selected fifth-overtone crystal is connected in series resonance in an in-phase
feedback path between the emitter and base circuit of V1. Inductor L7 is used to
resonate with the stray crystal, socket and switch capacitances creating a high series
impedance and thus avoiding feedback via the stray capacitive coupling which could
cause parasitic oscillation or instability. Inductor L1 is tuned to optimise the operation of
the oscillator. Test point XT1 provides a DC level which indicates oscillator output when
monitored with a high impedance voltmeter.
Transistor V2 is configured as a grounded-base buffer amplifier and isolates the effects
of the non-linear and abrupt loading changes of the following multiplier stage from the
oscillator, as well as providing sufficient gain to drive the multiplier stages.
Each of the three multiplier stages V4 (tripler), V5 (doubler), V6 (doubler) and the
following class-A amplifier stage, V7, are pulse modulated to create the required RF
pulse envelope at the output as well as obtaining the required on/off output signal ratios.
There are two types of modulation inputs to the unit, both supplied from the pulse shape
circuitry on the modulator and detector. One is DRIVE PULSE, a square wave pulse
input at XS4 that activates V4, V6, and V7 by an on/off action; the other is a SHAPED
PULSE at input XS2 which shapes, in V5, the RF envelope.
The DRIVE IN pulse turns switch V3 and bias amplifier V8 on and supplies bias drive to
V6. V3 switches on V4, and V8 switches on V7, so that the frequency multipliers V4 and
V6 and the amplifier V7 are operating normally, ready for the shaped modulation to
develop.
The SHAPED PULSE input pulse has a constant DC pedestal voltage of approximately
1 volt and, on top of this, the trapezoidal modulation pulse will be positioned and aligned
in the centre of the DRIVE PULSE pulse.
2.3.8.3
"
Attenuator 1A69737

Interrogation pulses at the RF generator output are at a level of +11.5 dBm and pass
through a 20 dB, 50 ohms attenuator before reaching the input of the switched
attenuator connector XMA. Capacitors C1 and C2 provide DC blocking and L1 provides
a high impedance choke feed for the DC bias for the PIN diode V1. L2, C3 and C4 form
a filter section to reduce RF leakage into the DC supply lines. Resistors R1l and R2 are
selected to match the characteristics of the PIN diode such that the DC voltage applied
to XFB:1 produces an increase of 15 dB RF attenuation above the attenuation when the
potential at XFB:1 is off.
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SECTION 2
The output of the switched attenuator at XFA is then passed through a 30 dB, 50 ohms
fixed attenuator to the 30 dB directional coupler in the transponder antenna feed.
2.3.8.4
"
Modulator and Detector 1A72518

The modulator and detector operates in conjunction with the RF generator to produce
trapezoidal interrogation pulses of the correct duration and amplitude. Each pulse is
initiated by a modulation pulse coming from the test interrogator main board.
In the quiescent state, the output at N6:7 is high; the analogue multiplexer D2 is enabled
with a zero address input; N6:12 output is low and N4A is configured as a follower,
having an output voltage equal to the pulse pedestal voltage set by R37.
On arrival of a square wave pulse at XS7, the address presented to D2 changes from 00
to 11 by the direct connection of the pulse to D2:9 (A in Figure 2-18) and the action of
D1d and D1c operating on D2:10 (B in Figure 2-18). D2 now reconfigures N4A as an
integrator with C11 coupling the negative voltage step at D2:13 to drive the integrator
output up at a rate controlled by R19, R20 and C17. Simultaneously the XS8 signal,
which follows the integrator N4A output, causes the RF generator to produce an RF
pulse which increases in amplitude as the integrator output goes up. N6A changes state
as the integration voltage exceeds the offset voltage across R36 so that the N6A output
goes high.
A video amplitude-demodulated pulse from the RF generator, at XS1, follows the shape
of the RF pulse and operates as feedback into the modulator and detector to provide
automatic level control. When the RF pulse amplitude reaches the level preset by the
PULSE AMPLITUDE control R13, the video pulse amplitude will cause the comparator
N6B to change state and its output will go from a high to a low state, disabling D2 and
causing the integrator N4A to maintain a constant output voltage until the end of the
input pulse on XS7. This is shown in Figure 2-18 waveforms.
At the time when the input pulse at XS7 returns to 0 volts, D2 is again enabled and the
address presented to D2 is now 01. Now N4A is configured to integrate down at a rate
determined by R19, R20 and C17 and the positive voltage step at D2:13.
N4A will now continue to integrate down until the output of N4A reaches the pedestal
voltage plus the offset voltage across C17, and at that time the comparator N6A will
change its output state from high to low, which changes the address presented to D2 to
00 again, clamping the output of N4A at the pedestal voltage.
In this fashion a complete test interrogation pulse is produced, and is repeated at the
pulse spacing and repetition rate determined by the test interrogator main board
inputting modulation pulses to the modulator and detector.
As each pulse is produced it is necessary to establish a time reference for each pulse to
enable time periods to be measured and checked. The circuit comprising N5A and V2
acts as a peak follower and generates a DC voltage which closely follows the amplitude
of the pulse. N2A acts as a buffer for the DC voltage and this DC voltage, after
amplification by N3A, is available at XS3 as an indicator of the RF level. Half the DC
voltage is also fed to the comparator N5B, the other input of which is the detector pulses,
and N5 generates a logic level pulse whose width is equal to the half-height width of the
interrogation pulses. These pulses appear at XS4 for use in the main board.
Transistor V3 is used as a constant current load for N4a to increase its sinking capability
while V11 and V12 are emitter-follower buffer amplifiers.
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SECTION 2
To enable RF alignment of the RF generator a TEST position on switch SA is provided

to allow the square-wave modulation pulses direct from the test interrogator main board
to modulate the RF generator via V10 and with the ALC loop inoperative.
Figure 2-18
2.3.8.5
"
Modulator and Detector Waveforms
Reply Detector 1A72519

The reply detector consists of an amplitude-modulated video detector, a peak rider
circuit, an analogue multiplexer and circuitry to generate pulse representing the rise
time, fall time and width of the detected pulses.
A sample of the RF power in the antenna feeder system is coupled into the RF input
connector XC1 of the reply detector via the directional coupler in the RF panel. The
received RF power is demodulated by an envelope detector V1, and the resultant video
pulses are amplified by N1a. Resistors R3 and R4 are used to provide a small DC bias
to the detector diode V1; this enables the detector to recover signals at very low levels.
The detected signal is buffered by N3a and appears on connector XS2.
The detected video pulses as well as the detector bias voltage on V1 are fed into the
analogue 2:1 multiplexer D1. Also input to D1 are detected interrogations and the
2-56
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SECTION 2
detector bias from the RF Generator 1A72516; these signals enter the reply detector via
XS7 and XS8 respectively. A signal from a pushbutton switch TEST DETECTOR
COINCIDENCE on the front panel of the test interrogator module is used by the
multiplexer to switch between the detected replies and detector bias of either the reply
detector or the RF generator.
The TEST DETECTOR COINCIDENCE check is used to ensure that the half-height
detector in the reply detector has the same timing delay as the half-height detector in the
RF generator. Any difference in timing delay will introduce inaccuracies in the
transponder delay time measurements. The half-height signal in the reply detector
appears on connector XS4 as signal WIDTH; an alternative designation for this signal is
REPLY TIMING.
The detected signal at the output of N1a is fed into N1b where it is buffered to create the
signal REPLIES, before being passed to the peak rider circuit and the rise, fall and width
time detectors.
The peak rider consists of N5a and V3, and produces a DC voltage level representing
the peak of the detected video pulses. The peak level is buffered by N2b and amplified
by N3b and appears on connector XS3 as signal REPLY_LVL.
The buffered peak level output from N2b is fed into a resistor divider chain consisting of
R11, R12, R13 and R14. These resistors are used to create reference levels of 90% of
peak level, 50% of peak level and 10% of peak level which are fed into comparators
N4a, N4b and N5b respectively.
The other input to the comparators is the buffered video pulse signal REPLIES.
Comparator N4a produces a pulse that is low when any part of the video pulse is greater
than 90% of the peak of the pulse. Comparator N4b produces a pulse that is low when
any part of the video pulse is greater than 50% of the peak of the pulse; it is N4b that is
the half-height detector. N5b produces a pulse that is low when any part of the pulse is
greater than 10% of the peak of the pulse.
D2 and D3 are used to create three pulses named RISE, FALL and WIDTH. These
pulses represent the rise time, fall time and half-height width of the detected video
pulses. RISE is measured between 10% and 90% of pulse peak on the rising edge,
FALL is measured between 90% and 10% of the pulse peak on the failing edge, and
WIDTH is measured between consecutive 50% levels. The signals RISE, FALL and
WIDTH appear on connectors XS4, XS5 and XS6 respectively.
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SECTION 2
Table 2-11
Summary of Front Panel Controls and Indicators : Test
Interrogator Module
TYPE

LEGEND
Red LED
TEST
Green LED
DC POWER ON
Pushbutton
switch
CHECK
DETECTOR
COINCIDENCE
Toggle
Switch,
centre off
Toggle
switch,
centre off
16-way
rotary switch
TEST
TRANSPONDER
DECODING
REPLY GATE
DELAY
16-way
rotary switch
Toggle
switch,
centre off
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
MONITOR AND
INTERROGATOR
DC POWER
Indicates that the MONITOR AND INTERROGATOR DC POWER

switch is not in the NORMAL position.
Indicates that DC power is applied to the monitor and test
interrogator.
Connects the output of the RF generator into the reply detector,
bypassing the transponder. Is used to check that the detector stages
in the transponder have the same delay. The signals at the
INTERROGATIONS TIMING and REPLY TIMING test jacks should
match each other when this switch is pressed. This switch will
interfere with the normal operation of the monitor module connected
to the test interrogator under test.
REJECT +2us
Alters the interrogating pulse spacing outside
acceptable limits to test the transponder pulse
-2us
decoder rejection.
ACCEPT +1us
Alters the interrogating pulse spacing within
acceptable limits to test the transponder pulse
-1us
decoder acceptance
Sets accept gate timing; variable between 0 and 60 microseconds.
COARSE 16 microseconds increments.
FINE
1 microsecond increments.
ON
The power supply output is connected to the test

interrogator and monitor regardless of other power
sources.
OFF
The power supply is disconnected from the test
interrogator and monitor.
NORMAL The test interrogator circuitry is connected to the power
supply if the input signal TI_ON from the CTU is
active,(high) or TRANSPONDER POWER on the
transponder power supply is switched ON. Otherwise, the
module's circuitry is isolated from the power supply.
TRIGGER
Buffered version of test interrogator output TI_PRF; can be used to
trigger an oscilloscope.
EARTH
REPLY ACCEPT
Buffered pulse from the parameter extractor circuitry, defining a time
GATES
slot in which the received reply pulse should be present (15 volts, 6
microseconds wide).
1 us MARKERS
Buffered output from the timer circuitry (5 volts, 1 microsecond
period).
+15V
Buffered +1 5V internal supply (15 volts).
+5V
Protected +5V internal supply (5 volts).
DETECTED
Buffered output of the reply detector, which is a detected pulse
REPLIES
envelope representing the RF pulses transmitted from the
transponder.
DETECTED
Buffered detected pulse envelope representing the RF pulse
INTERROGATIONS generated by the test interrogator for test interrogation.
EARTH
EARTH
INTERROGATIONS Output pulses from the RF generator detector.
TIMING
EARTH
REPLY TIMING
Buffered output pulses of the reply detector.
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HA72500
Table 2-12
SUBASSY
1A72515
Main PWB
Assembly,
Test
Interrogator
1A72516
RF Generator
SECTION 2
Summary of Internal Controls: Test Interrogator Module

TYPE
REF LEGEND
Slide
switch
S4
Preset
resistor
R7
Variable
capacitors
Inductor
6-way DIL
switch
C 10, 10, 14, 18, 22

L1
S1
mode
X Sets pulse spacing for X channel operation.

Y Sets pulse spacing for Y channel operation.
TPNDR OP LVL Used to calibrate the transmitted pulse peak power.
CAL
SW1
SW2
SW3
SW4
SW5
SW6
1A72517
RF Filter
1A72518
Modulator
and Detector
Variable
capacitors
Preset
resistors
C1,
C2
R13
R20
R37
S1
Test point
Test point
XT1
XT2
Pulse amplitude
Pulse shape
Pulse pedestal
Normal
Test
Bias voltage
Pk amp lvl
Test point
Test point
Test point
Test point
XT3
XT4
XT5
XT6
Timing pulse
Mod out
Ground
Ground
Slide
switch
Used to align the RF generator to the operating

interrogator frequencies (see Section 3.4.12).
Selects interrogations at the nominal interrogation
frequency.
Selects interrogations at 160 kHz above the nominal
interrogation frequency.
Selects interrogations at 160 kHz below the nominal
Adds a CW signal to the interrogation pulse at -10 dB.
Used to align the RF filter (see Section 3.4.13).
Used to align the pulse shape of the interrogations
produced by the RF generator (see Section 3.4.14).
Position for normal operation.
Used during testing.
Bias voltage for level detector circuitry.
DC voltage proportional to the peak amplitude of the
transmitted pulses.
Timing reference for the transmitted pulse.
Modulation pulse to RF generator.
0 volts reference.
0 volts reference.
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2.3.9
"
SECTION 2
Monitor Module 1A72510

The monitor module receives input signals from the associated test interrogator module
and from the antenna pickup. These signals represent operational parameters, and the
monitor applies a pass/fail check on each one. A pass/fail result is able to be read by the
control and test unit (CTU) which indicates an alarm or control action as required. A
number of voltage levels from other modules in the transponder are also input to the
monitor module where they are measured and eventually read by the CTU. The eight
monitored parameters are divided into primary and secondary categories, with primary
parameters being defined as those which could, if at fault, give rise to false guidance
information. The parameters are:
PRIMARY
PARAMETERS
SECONDARY
PARAMETERS
Transponder delay
Transponder pulse spacing
Transponder efficiency
Transponder reply rate
Transponder power output effective radiated power (ERP)
Transponder ident
Transponder antenna integrity
Transponder pulse shape
The individual monitor circuits are designed to be failsafe. As an added safeguard, the
CTU regularly initiates a test routine to check that the primary parameter monitors are
operative. If one or both primary monitor circuits do not return a fault indication in
response to this test, the CTU diagnoses a monitor fault and, because the failure
involves a primary parameter, it also initiates the control action appropriate for a primary
parameter fault.
The criteria for the pass/fail decisions for delay, spacing, efficiency, reply rate and pulse
shape measurements are essentially the same. The frequency of success is compared
with a predetermined frequency; hence each of those circuits involves an up/down
counter that determines the higher frequency.
The monitors are independent of interrogating pulse repetition frequency, and exhibit no
drift error. The desired fault limits are either pre-wired or programmable by switches.
The ident monitor extracts ident messages from the transponder output pulses by means
of a continuous pulse spacing decoder. This decoder produces a pulse (called the ident
spacing pulse) which is measured and checked to see if the spacing is within a window
centred on the period of the 1350 Hz ident pulse train. An ident fault will be indicated if:
a. continuous ident keying extends for more than 10 seconds; or
b. the ident message extends for more than 10 seconds; or
c. an ident message is absent for more than a preset 45 to 75 seconds interval.
The recovered 1350 Hz ident tone is used for an audible check of ident message
integrity. The recovered ident mark keying waveform is used to inhibit the delay and
efficiency monitors, thus preventing them indicating spurious faults during ident.
Real-time fault indicators (light emitting diodes) are included for each monitored
parameter. Two LED indicators and associated output lines are provided to show if a
real-time primary and/or secondary fault exists.
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SECTION 2
The transponder output pulses sensed by the antenna pickup probe are detected and
their peak value obtained; this peak value is then compared with a DC level preset to the
required fault level. The value of this fault level setting can be checked under the control
of the CTU.
A check of antenna integrity is made by the antenna integrity monitor. This check
involves two fault parameters. "Antenna integrity 1 " fault indicates two or more open
circuit antenna elements, an antenna short circuit or an antenna not connected.
"Antenna integrity 2" fault indicates a single open circuit antenna element. These signals
are read by the CTU to take action as appropriate.
Voltage levels representing monitored parameters from various other stages in the
transponder are input to the monitor. These levels are converted by an analogue-todigital converter into digital numbers that are read and processed by the CTU.
The following circuit features ensure failsafe monitoring:
The choice of primary fault line outputs as zero volts.
The inclusion of timeout monostables to ensure that a failure in any stage of a

parameter monitor will signal a fault in that parameter. Delay, spacing, efficiency,
rate, ident and pulse shape monitors involve counters that are continually
checked for operation. Failure to count results in a fault output.
Inputs from other boards are buffered and level shifted where appropriate. Input
pull-down resistors ensure that floating inputs will be driven to a state that will
produce a fault.
An automatic test routine is applied to the delay and spacing monitors to check
that they are capable of producing a fault.
2.3.9.1
"
Main PWB Assembly Monitor Module 1A72511

The monitor main board receives pulses from the test interrogator main board, each
pulse having a duration proportional to the parameter being tested. Each parameter is
tested for certain limits and is accepted or rejected in accordance with preset conditions.
The monitor main board indicates alarms as appropriate, and signals the CTU for the
relevant indications and actions.
2-61
HA72500
2.3.9.1.1
Figure 2-19
SECTION 2
Delay Monitor
Delay Monitor
The transponder delay is continuously being represented in the test interrogator by a

positive going pulse with a duration equal to the delay time. This pulse appears as
DLY_DUR_PULSE, and it is accessible at test point XT6.
A test of the transponder delay time is initiated by the PRF pulse (XT9) loading
presettable counter D30 with the binary values held on S12. During the course of a test
a second window count is loaded from switch S9.
The values held on switches S12 and S9 are indicative of the reject limits on the
transponder delay. Each count on the switches represents 0.1 microseconds actual time.
The signal DLY_COUNT appears on test point XT5 and the signal DLY_DUR_PULSE
appears on XT6. These two test points can be used in conjunction with an oscilloscope
to check the accuracy of the switch settings. Figure 2-20 illustrates this check.
Figure 2-20
Delay Monitor Waveforms
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For an X channel the transponder delay can be between 35 and 50 microseconds and
for a Y channel between 50 and 56 microseconds. The description which follows
assumes a nominal transponder delay of 50 microseconds
When the counter D30 has been loaded with the preset values held on switch S12 it
waits for the arrival of DLY_DUR_PULSE. The rising edge of this pulse initiates the first
down count that will continue while DLY_DUR_PULSE is present. It takes one clock
cycle (100 nanoseconds) to initiate the First down count. If the counter reaches zero and
DLY_DUR_PULSE is still present the preset value on switch S9 is loaded into the
counter D30 and a second down count is initiated after 1 clock cycle. If the failing edge
of the DLY_DUR_PULSE occurs before the first count has reached zero no delay_OK
flag is set and the second count is not started.
The signal DLY_COUNT at test point XT5 gives an indication of the lengths of the first
and second down counts. If and only if the failing edge of DLY_DUR_PULSE occurs
after the end of the first count and before the end of the second count will a delay_OK
flag be set. The delay_OK flag is set on the failing edge of DLY_DUR_PULSE and a
non-zero second count and is reset when the second count goes to zero. If the second
down count reaches zero and DLY_DUR_PULSE is still asserted then no delay_OK flag
is set. The existence of the delay_OK flag indicates that the DLY_DUR_PULSE is within
the window of acceptable delay limits.
The primary error counter D37 is made up of two 3-bit up/down counters D37a and
D37b. In a non-fault state the delay_OK flag and PRF pulses are fed into D37a. Within
D37 the PRF rate is reduced to 33% of the original PRF rate. The PRF/3 rate is used to
count the 3-bit counter toward zero. The delay_OK flags are used to count the 3-bit
counter towards 7. If the delay_OK flag rate exceeds PRF/3 rate then the primary error
counter will count to 7 and give no fault indications. If the delay_OK rate is exceeded by
PRF/3 rate the counter will count to zero and a fault indication will be given.
The delay_OK rate will be exceeded by PRF/3 if the DLY DUR_PULSEs are continually
outside the window of acceptable delay limits or no valid DLY_DUR_PULSEs are
returned from the test interrogator due to low beacon efficiency. In either case a DELAY
fault must be raised. If a fault is to be raised the signal delay_fault_indication from D37a
is asserted. This signal is input to the timeout monostable D41b.
Timeout monostable D41b is used to ensure that the counter device D30 is operating.
The signal DLY_COUNT (XT5) is used to continually retrigger D41b. In the event of a
delay_fault_indication being asserted from counter D37a the monostable D41b is reset
and a positive going DELAY FAULT is output from D41b:9. This timeout monostable
also has the effect that if the DLY_DUR_PULSE is not encountered then the retriggering
signal DLY_COUNT will not be produced and so the monostable will timeout and the
DELAY FAULT signal from D41b:9 will be asserted.
The DELAY FAULT signal from D41b is then fed into the fault line driver circuitry D13.
Delay is monitored on every second interrogation when the RF level is -69 dBm. The
delay monitor circuit is therefore enabled by a 50 Hz square wave (25 Hz in a dual
system) from the test interrogator called DELAY_MON_EN. This signal is applied to the
inhibit driver device D51:7 and fed to the primary error counter D37:23 as a delay_inhibit
signal. When this signal is asserted the primary error counter is frozen so that counting
is only permitted during the time when the RF signal is high.
During the transmission of an ident mark an ident_inhibit signal is fed into D51:5. This
signal will also cause the delay_inhibit to be asserted and prevent D37a counting. By
using the delay_inhibit signal from D51 a delay_fault will only be registered when this
signal is not asserted so that false fault indications will not be given during efficiency
testing and ident mark.
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2.3.9.1.2
Figure 2-21
SECTION 2
Spacing Monitor
Spacing Monitor
A test of the transponder spacing time is initiated by the PRF pulse (XT9) loading
presettable counter D31 with the binary values held on S13. During the course of a test
a second window count is loaded from switch S10.
Figure 2-22
Spacing Monitor Waveforms
The SPACING FAULT signal from D41a is then fed into the fault line driver circuitry D13.
A signal from the binary switch S13, called CODING_MODE_MON is used by the CTU
to determine the operating mode of the beacon, either X or Y channel.
The signal SPAC_COUNT appears on test point XT14 and the signal
SPAC_DUR_PULSE appears on XT8. These two test points can be used in conjunction
with an oscilloscope to check the accuracy of the switch settings. Figure 2-22 illustrates
this check.
transponder spacing. Each count on the switches represents 0.1 microseconds actual
time.
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For an X channel the nominal window of acceptable transponder spacing is between

11.5 microseconds and 12.5 microseconds. For a Y channel the nominal accept window
is between 29.5 microseconds and 30.5 microseconds.
A measurement of spacing duration is initiated by the rising edge of a TIPFIF pulse input
to spacing counter D31. This edge causes the counter to reset to zero regardless of the
state of the counter before the edge. Within D31 the TIPRF pulse is delayed by 1 clock
cycle (100 nanoseconds) and then used to load the counter with the preset value held
on switch S13. By clearing the counter before loading the preset values the initial count
value can be guaranteed.
When the counter D31 has been loaded with the preset values held on switch S13 it
waits for the arrival of SPAC_DUR_PULSE. The rising edge of this pulse initiates the
first down count that will continue while SPAC_DUR_PULSE is present. It takes one
clock cycle (100 nanoseconds) to initiate the first down count. If the counter reaches
zero and SPAC_DUR_PULSE is still present the preset value on switch S10 is loaded
into the counter D31 and a second down count is initiated after 1 clock cycle. If the
failing edge of the SPAC_DUR_PULSE occurs before the first count has reached zero
no spacing_OK flag is set and the second count is not started.
The signal SPAC_COUNT at test point XT14 gives an indication of the lengths of the
first and second down counts. If and only if the failing edge of SPAC_DUR_PULSE
occurs after the end of the first count and before the end of the second count will a
spacing_OK flag be set. The spacing_OK flag is set on the failing edge of
SPAC_DUR_PULSE and a non-zero second count and is reset when the second count
goes to zero. If the second down count reaches zero and SPAC_DUR_PULSE is still
asserted then no spacing_OK flag is set. The existence of the spacing_OK flag indicates
that the SPAC_DUR_PULSE is within the window of acceptable spacing limits.
The primary error counter D37 is made up of two 3-bit up/down counters D37a and
D37c. In a non-fault state the spacing_OK flag and PRF pulses are fed into D37b. Within
count the 3-bit counter toward zero. The spacing_OK flags are used to count the 3-bit
counter towards 7. If the spacing_OK flag rate exceeds PRF/3 rate then the primary
error counter will count to 7 and give no fault indications. If the spacing_OK rate is
exceeded by PRF/3 rate the counter will count to zero and a fault indication will be given.
The spacing_OK rate will be exceeded by PRF/3 if the SPAC_DUR_PULSEs are
continually outside the window of acceptable spacing limits or no valid
SPAC_DUR_PULSES are returned from the test interrogator due to low beacon
efficiency. In either case a SPACING fault must be raised. If a fault is to be raised the
signal spacing_fault_indication from D37c is asserted. This signal is input to the timeout
monostable D41a.
Timeout monostable D41a is used to ensure that the counter device D31 is operating.
The signal SPAC_COUNT (XT14) is used to continually retrigger D41a. In the event of a
spacing_fault_indication being asserted from counter D37c, the monostable D41a is
reset and a positive going SPACING FAULT is output from D41a:7. This timeout
monostable also has the effect that if the SPAC_DUR_PULSE is not encountered then
the retriggering signal SPAC_COUNT will not be produced and so the monostable will
timeout and the SPACING FAULT from D41a:7 will be asserted.
2.3.9.1.3
Monitor Self Test
An automatic test routine is applied to both the delay and spacing monitors to check that
fault outputs can be obtained. A positive going signal is written to the monitor main board
from the CTU and is applied to MON_TEST input D51:5. This signal has the effect of
altering the value set on the preset switches S12 and S13 which are loaded into the
counters D30 and D31 respectively. The value loaded into each counter is altered by 32
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counts (3.2 microseconds) which is sufficient to cause both delay and spacing monitors
to fail. The CTU reads faults from both monitors indicating each parameter has failed
and terminates the test, thereby restoring normal operation. The test is repeated every
16 seconds, and at monitoring PRF takes approximately 0.1 seconds to complete.
2.3.9.1.4
Figure 2-23
Efficiency Monitor
Efficiency Monitor
The efficiency monitor maintains a running count of each decoded reply and the PRF,
and indicates when the decoded reply rate fails below 60% of the PRF count. This
indication is signalled as an efficiency fault.
The buffered signal representing PRF pulses called XTIPRF is input to a rate multiplier
D36, configured to pass 60% of its input pulses to its output. Counter D49 uses these
signals as an up count pulse.
The buffered signal representing decoded replies called XREPLY_PULSES is used by
counter D49 as a down count pulse. Provided the down count pulse rate is greater than
the up count pulse rate the count value will stay at zero. If the decoded reply rate falls
below 60% the up count rate will be greater than the down count rate, D49 will count up
and be held at a maximum value of 15. At this point an efficiency_error flag will be
asserted.
After an efficiency_error flag has been raised it will be reset by an increase in the reply
rate to greater than 60% of PRF. At this time D49 will begin to count down from the
maximum count of 15. When D49 has a count value of 0 the efficiency_error flag is
reset.
To ensure fail-safe operation a clock signal created in counter D49 from the input
XREPLY PULSES is used to retrigger a timeout monostable D35a. If counter D49
should fail or XREPLY_PULSES not be present this monostable will timeout and will
assert an EFFICIENCY FAULT D35a:7. In the event of the efficiency_error flag being
asserted from counter D49:8, the monostable D35a is reset and a positive going
EFFICIENCY FAULT is output from D35a:7.
The EFFICIENCY FAULT signal from D35a is then fed into the fault line driver circuitry
D13.
Efficiency is monitored on every second interrogation when the RF level is -84 dBm. The
efficiency monitor circuit is therefore enabled by a 50 Hz square wave (25 Hz in a dual
system) from the test interrogator called EFF_MON_EN. This signal is applied to the
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inhibit driver device D51:8 and fed into counter D49:10 as an EFF_INHIBIT signal. When
this signal is asserted the counter D49 is frozen so that counting is only permitted during
the time when the RF signal is low.
During the transmission of an ident mark an ident_inhibit signal is fed into D51:5. This
signal will also cause EFF_INHIBIT to be asserted and prevent D49 counting. By using
the EFF_INHIBIT signal from D51, efficiency faults will only be registered when this
signal is not asserted so that false fault indications will not be given during delay testing
and ident mark.
2.3.9.1.5
Reply Rate Monitor
This section of the monitor detects if the transponder reply rate fails below a preset limit
of 833 Hz or rises above a preset limit of 3 kHz. The reply rate monitor consists of two
parts. The first part checks the minimum reply rate and the second checks the maximum
reply rate. The buffered signal representing all replies called XDETD_TX_PULSES is
used as input to both parts. The counter D45 consist of parts D45a and D45b. Each part
functions identically.
Figure 2-24
2.3.9.1.5.1
Rate Monitor
Minimum Reply Rate Monitor
The signal XDETD_Tx_PULSES is input to a rate multiplier D34, configured to pass 60%
of its input pulses to its output. Since XDETD_Tx_PULSES consists of pulse pairs its
frequency is twice the reply rate. The down count pulse rate used by counter D45a is
calculated according to the following formula:
(reply rate) x 2 x 0.6 = down count pulse rate.
Example: for reply rate = 833 Hz, the down count pulse rate = 1 kHz.
The clock signal 1kHz_CLK is used by counter D45a as an up count pulse. Provided the
reply rate is greater than 833 Hz, the down count pulse rate will be greater than the up
count pulse rate of 1 kHz. This will cause D45a to count down to and be held at zero. If
the reply rate fails below 833 Hz the up count rate will be greater than the down count
rate, D45a will count up and be held at a maximum value of 15. At this point a rate_error
flag will be asserted.
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2.3.9.1.5.2
SECTION 2
Maximum Reply Rate Monitor
The clock signal 1kHz_CLK is input to rate multiplier D39, configured to pass 60% of its
input pulses to its output. This output used by counter D45b as a down count pulse of
frequency 600 Hz.
The signal XDETD_Tx_PULSES is input to a rate multiplier D43, configured to pass 10%
of its input pulses to its output. The up count pulse rate used by counter D45b is
calculated as:
(reply rate) x 2 x 0.1 = up count pulse rate.
Example: for reply rate = 3 kHz, the up count pulse rate = 600 Hz.
Provided the reply rate is less than 3 kHz, the down count pulse rate from D39 of 600 Hz
will be greater than the up count pulse rate. This will cause D45b to count down to and
be held at zero. If the reply rate rises above 3 kHz the up count rate will be greater than
the down count rate and D45b will count up and be held at a maximum value of 15. At
this point a rate_error flag will be asserted.
2.3.9.1.5.3
Fault Processing
After a rate_error flag has been raised it will be reset by the rate returning to a non-fault
condition. This means that if the rate_error flag was raised by the reply rate failing below
833 Hz the rate must increase to above 833 Hz to reset the flag. If the rate_error flag
was raised by the reply rate exceeding 3 kHz it must fall below 3 kHz to reset the flag. In
either case a return to a non-fault state will cause D45a or D45b to count down from the
maximum count of 15. When D45a or D45b has a count value of 0 the rate_error flag is
reset.
To ensure fail-safe operation a clock signal created in counter D45 from the input
XDETD_Tx_PULSES is used to retrigger a timeout monostable D35b. If counter D45
should fail or XDETD_Tx_PULSES not be present this monostable will timeout and will
assert a RATE FAULT from D35b:9. In the event of the rate_error flag being asserted
from counter D45b:8, triggering of the monostable is prevented, and a positive going
RATE FAULT is output from D35b:9, after the timeout period.
The RATE FAULT from D35b is then fed into the fault line driver circuitry D13.
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2.3.9.1.6
Figure 2-25
SECTION 2
Ident Monitor
Ident Monitor
Each ident message transmitted by the transponder consists of pulse pairs sent at a rate
of 1350 Hz for the duration of each Morse code 'mark'.
The ident monitor scans all reply pulse pairs to identify the trains of pulse pairs at the
ident pulse rate. Once an ident message has been identified the monitor checks that the
messages are occurring within preset timing limits.
During the transmission of an ident mark the normal delay and efficiency monitoring is
suspended as no replies are being sent by the transmitter during this period. Measuring
these parameters at this time would result in a false error indication.
The ident monitoring circuitry consists of three main devices. D33 extracts a single pulse
representing the spacing between pulse pairs from the incoming XDETD_Tx_PULSES
signal; this pulse is called ident_pulse. During ident message transmission the spacing
between pulse pairs is 1/1350 Hz or 741 microseconds. D40 uses ident_pulse in the
same way as the delay and spacing monitors and ensures that the period of this pulse
fails within a specific range of values called ident_window.
The ident window is centred around 741 microseconds with a variation of 4
microseconds. If ident_pulse fails within the ident_window an ident_keying signal is
passed to D47, which ensures that the Morse code marks do not violate any ident timing
limits. These limits are:
1.
Ident messages shall occur within a preset interval (adjustable from 2 to 128
seconds by S8 - connected to D33).
2.
An ident mark shall not last more than 10 seconds.
3.
An ident mark shall not inhibit delay and efficiency measurement for more than 2
seconds.
4.
An ident message shall not last for longer than 10 seconds.
If any of the above limits are violated an ident_error is indicated.
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All ident message information is extracted from the buffered signal

XDETD_Tx_PULSES. When the rising edge of the first pulse of an
XDETD_TX_PULSES pulse pair is encountered on input D33:2 a pulse of 1 clock cycle
duration is created and output from D33:10. This pulse is called IDENT_DECIDE. The
clock input to D33 for ident message extraction is 1 MHz.
The pulse IDENT_DECIDE is input to monostable D38a:4 which produces a pulse,
IDENT_GATE, of 40 microseconds duration to be fed back into D33:14. This gating
pulse is used to gate out the second pulse in the XDETD_Tx_PULSE pulse pair. If this
pulse is not gated out another IDENT_DECIDE pulse will be created on the rising edge
of the second pulse. If this occurs, erroneous information about the pulse pair spacing
will be output from D33 as IDENT_PULSE.
The pulse IDENT_DECIDE generates the signals IDENT_LOAD and IDENT_PULSE
within D33. IDENT_PULSE, at D33:18, is a 3 microseconds negative-going pulse, with a
pulse spacing equal to the spacing between the pulses XDETD_TX_PULSE. It is used
by D40 to determine if the spacing between transmitter output pulse pairs fails within the
ident window.
The IDENT_DECIDE pulse is used by D40 to determine if IDENT_PULSE from the
previous measurement is still high during the ident window generated within D40. If this
is the case then the XDETD_Tx_PULSES pulse pair spacing is at the ident rate of 1350
Hz and output D40:18 is held high. D40:18 is called IDENT_KEYING and represents the
envelope of the ident message pulse pairs.
IDENT_DECIDE is also used to create the pulse IDENT_CLEAR in D33. This pulse,
output from D33:22, is of 1 clock cycle duration and is used by D40 to reset its internal
counter to zero after the previous ident spacing measurement.
IDENT_CLEAR is used to create the pulse IDENT_LOAD in D33. This pulse, output
from D33:15, is of 1 clock cycle duration and is used by D40 to preload its internal
counter to the preset value representing the ident rate pulse pair spacing of 741
microseconds (the number actually loaded into the counter is 738 since three clock
periods are used in creating the control pulses IDENT_DECIDE, IDENT_CLEAR and
IDENT_LOAD).
IDENT_KEYING from D40:18 will be high during a Morse code 'mark' and low during a
Morse code 'space'. This signal is input to D47.
To prevent random squitter pulse pairs of the correct ident spacing being recognised as
valid IDENT_KEYING a digital fitter is used in D47. This filter requires at least three
pulse pairs at the correct ident spacing before it will recognise an ident message. Valid
ident keying is output at D47:7 as the signal REC_IDENT_KEY to the CTU. Valid ident
keying is also output from D47:21 to the inhibit driver device D51:6 as IDENT_INHIBIT,
to disable the monitoring of delay and efficiency during an ident mark.
Once valid ident keying has been recognised by D47 an internal counter of 10 seconds
is started. If valid ident keying extends beyond the 10 second limit an IDENT_ERROR
flag is raised. After 2 seconds of continuous valid ident keying the signal IDENT_INHIBIT
is disabled. This enables delay and efficiency measurements to resume.
The signal REC_IDENT_TONE is output from D47:10 and used by the CTU to give an
audible check of the ident message being transmitted by the beacon. This signal is
created by gating the valid ident keying signal with the IDENT_GATE pulse from D38a:6.
IDENT_GATE represents a 1350 Hz tone. The REC_IDENT_TONE signal is also input
to D38b:12.
D38b is used to create a pulse called IDENT_CODE which will remain high during an
entire ident message. The output of this pulse from D38b:10 is input to D47 where it
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initiates a count of 10 seconds. If this count reaches 10 the ident message has extended
beyond the specified limit of 10 seconds and an IDENT_ERROR flag is raised.
The inverse of IDENT_CODE is output from D38:9 and input to D33:11. This signal,
IDENT_MESSAGE_SPACING, represents the spacing between ident messages.
Preloading of the binary value held on switch S8 is initiated by a count of zero in D33
(the power on condition) or the rising edge of IDENT_MESSGE SPACING. After
preloading the counter in D33 a down count is immediately started. The value held on
S8 represents the maximum spacing between ident messages in seconds. If the count
reaches zero a valid ident message has not been received within the maximum time and
an IDENT_SPACING_ERROR flag is raised in D33:21. This flag is input to D47. Switch
S8 can be set for a maximum ident message spacing of 2 to 128 seconds (although it
would normally be set in the range 45 to 75 seconds).
To ensure fail safe operation the signal IDENT_LOAD is used to retrigger a timeout
monostable D42a. If D33 should fail or XDETD_Tx_PULSES not be present this
monostable will timeout and will assert an ident fault signal from D42a:7. In the event of
the IDENT_ERROR flag being asserted from counter D47:18, the monostable D42a is
reset and a positive going IDENT FAULT is output from D42a:7.
The IDENT FAULT from D42a is then fed into the fault line driver circuitry D13.
2.3.9.1.7
Figure 2-26
Effective Radiated Power Monitor

Effective Radiated Power Monitor
The effective radiated power (ERP) monitor receives from the Peak Power Monitor
1A72512 a DC level representing the transponder ERP. This circuitry also incorporates
an ERP monitor fault limit check controlled by the CTU.
The input from the Peak Power Monitor 1A72512 is called POWER_LEVEL and appears
on test point XT2. At commissioning, the variable resistor R87 is used to adjust the
voltage on XT2 to be equal to 2.50+0.01 volts. The voltage on XT2 is input to 8:1
multiplexer, D5:13, and to quad 2:1 multiplexer D1:12. In normal operation the control
signal PWR_TESTEN from the CTU will cause POWER_LEVEL to be output from
D1:14. This output is fed into comparator N9:10.
The switch S7 is used to set the ERP monitor fault alarm level on an accumulative basis.
Each additional switch setting reduces the fault alarm level a further 1 dB. The 0 dB level
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is set at commissioning by R87. The input that appears on N9:11 is a voltage that
represents the fault alarm level.
The power level at N9:10 and the fault alarm level at N9:11 are compared. While the
power level is greater than the fault alarm level no POWER FAULT is indicated. Should
the power level fall below the fault alarm level a POWER FAULT will be indicated and
the output sent to the fault line driver D13.
During ERP monitor fault limit test operation the control lines PWR_TEST0 2 from the
CTU are used to control D5. The software on the CTU will cycle through the inputs to
D5. These inputs represent the following monitor fault levels:
The power level set by R87. This is the 0 dB level.
Voltages representing -0.5 dB to -6.5 dB levels in -1 dB steps.
The monitor fault level output of D5:3 is fed into D1. The control signal from the CTU
PWR_TESTEN selects the monitor fault level input to D1 to be output to N9, instead of
the power level.
By cycling through the monitor fault levels and comparing these to the fault alarm level,
the CTU can determine the fault alarm level set on the ERP monitor. The CTU will
continue to cycle through the inputs to D5 until a POWER FAULT is indicated. When the
POWER FAULT is indicated the input monitor fault level to D5 that forced the POWER
FAULT is read by the CTU and returned as the ERP monitor fault limit.
2.3.9.1.8
Figure 2-27
Antenna Integrity Monitor

Antenna Integrity Monitor
The antenna integrity monitor is used to ensure that all of the elements in the antenna of
the transponder are operational. If elements are faulty an indication of the fault is given
by this monitor. Two antenna integrity faults are indicated:
Antenna integrity 1 fault is indicated if the antenna is not present, if the antenna
is short circuited or if two or more elements have failed open circuit.
Antenna integrity 2 fault is indicated if one element of the antenna has failed
open circuit.
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The antenna can be represented by 10 parallel 10 kilohm loads, one load for each
element. This represents an equivalent load seen by the antenna integrity monitor of 1
kilohm. As each element in the antenna fails the effective load increases. A constant
current source made from transistors V6 and V4 and associated components ensures
that a current of less than 4 mA is fed into this effective load. An identical current
produced by V2 is fed into an external 1 kilohm reference resistor. This produces a set of
reference voltages that are input to the comparator network formed by quad comparator
N2.
The external reference resistor of 1 kilohm is located on the RF Panel PWB Assembly
1A/2A72547. a reference resistor of 1 kilohm is fed by the same current source as feeds
the effective antenna load. The voltage produced across the reference resistor is
buffered and multiplied by 1.18 in amplifier N1. The output from this amplifier is fed into
the comparator network formed by N2.
The reference input to comparator N2a:7 represents a voltage 1. 18 times the voltage
produced by the effective antenna load of a fully functioning antenna. Should a multiple
element failure occur then the effective antenna load, connected to N2a:6, will increase
and the current source will produce a voltage across this load greater than the reference
voltage. This will cause an ANTENNA_INTEGRITY_1 FAULT.
The reference input to comparator N2b:5 represents a voltage 1.06 times the voltage
produced by the effective antenna load of a fully functioning antenna. Should a single
element failure occur, the effective antenna load, connected to N2b:4, will increase and
the current source will produce a voltage across this load greater than the reference
voltage. This will cause an ANTENNA_INTEGRITY_2 FAULT.
The reference input to comparator N2c:8 represents a voltage 0.2 times the voltage
produced by the effective antenna load of a fully functioning antenna. Should the
antenna be short circuited the effective antenna load, connected to N2c:9, is less than
200 ohms and the current source will produce a voltage across this load less the
reference voltage. This will cause an ANTENNA_INTEGRITY_1 FAULT.
If the antenna is not connected the current source has no load and the voltage will be
pulled up by the power supply to greater than the reference voltage in N2a. This will
cause an ANTENNA_INTEGRITY_1 FAULT.
The output of N2a and N2c are wired 0Red together so that a fault indication on either
will cause an ANTENNA_INTEGRITY_1 FAULT.
Both fault lines ANTENNA_INTEGRITY_1 FAULT and ANTENNA_INTEGRITY_2
FAULT are input to fault line driver D13.
2.3.9.1.9
"
Pulse Shape Monitor
REFER Figure 2-29

The pulse shape monitor takes its inputs as a series of positive going pulses
representing rise, fall and width times of the transponder output pulses. These pulses
are created in the test interrogator.
The width pulse is monitored to ensure that the width of the transponder output pulses is
within a preset range of values. The width pulse is measured from the 50% points on the
transponder output pulses.
The rise pulse and the fall pulse are monitored to ensure that the rise time and fall time
of the transponder output pulses are less than preset values. Both rise pulse and fall
pulse are measured between 10% and 90% points on the transponder output pulses.
Width pulse monitoring is achieved with the same circuit configuration used in the delay
and spacing monitors. A similar procedure is used to preset the switches S1 and S4.
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A test of the transponder pulse width is initiated by the PRF pulse (XT9) loading
presettable counter D9 with the binary values held on S1. During the course of a test a
second window count is loaded from switch S4.
transponder width. Each count on the switches represents 0.1 microseconds actual time.
Figure 2-28
Width Monitor Waveforms
The signal WIDTH_COUNT appears on test point XT7 and the signal WIDTH_PULSE
appears on XT11. These two test points can be monitored with an oscilloscope to check
the accuracy of the switch settings. Figure 2-28 illustrates this check.
When the counter D9 has been loaded with the preset values held on switch S1 it waits
for the arrival of WIDTH_PULSE. The rising edge of this pulse initiates the first down
count that will continue while WIDTH_PULSE is present. It takes one clock cycle (100
nanoseconds) to initiate the first down count. If the counter reaches zero and
WIDTH_PULSE is still present the preset value on switch S4 is loaded into the counter
D9 and a second down count is initiated after 1 clock cycle. If the failing edge of the
WIDTH_PULSE occurs before the first count has reached zero no width_OK flag is set
and the second count is not started.
The signal WIDTH_COUNT at test point XT7 gives an indication of the lengths of the
first and second down counts. If and only K the failing edge of WIDTH_PULSE occurs
after the end of the first count and before the end of the second count will a width_OK
flag be set. The width_OK flag is set on the failing edge of WIDTH_PULSE and a nonzero second count and is reset when the second count goes to zero. If the second down
count reaches zero and WIDTH_PULSE is still asserted then no width_OK flag is set.
The existence of the width_OK flag indicates that the WIDTH_PULSE is within the
window of acceptable width limits.
The pulse-shape error counter D23 is made up of two 3-bit up/down counters D23a and
D23b. In a non-fault state the width_OK flag and PRF pulses are fed into D23a. Within
count the 3-bit counter toward zero. The width_OK flags are used to count the 3-bit
counter towards 7. If the width_OK flag rate exceeds PRF/3 rate then the pulse - shape
error counter will count to 7 and give no fault indications. If the width_OK rate is
exceeded by PRF/3 rate the counter will count to zero and a fault indication will be given.
2-74
HA72500
Figure 2-29
SECTION 2
Pulse Shape Monitor
The width_OK rate will be exceeded by PRF/3 if the WIDTH_PULSEs are continually
outside the window of acceptable width limits or no valid WIDTH_PULSEs are returned
from the test interrogator due to low beacon efficiency. In either case a WIDTH fault
2-75
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SECTION 2
must be raised. If a fault is to be raised the signal width_fault_indication from D23a is

asserted. This signal is input to the timeout monostable D18b.
The signal WIDTH_COUNT (XT7) is used to continually retrigger D18b. In the event of a
width_fault_indication being asserted from counter D23a the monostable D18a is reset
and a positive going WIDTH FAULT is output from D18b:9. This timeout monostable
also has the effect that if the WIDTH_PULSE is not encountered then the retriggering
signal WIDTH_COUNT will not be produced and so the monostable will timeout and the
WIDTH FAULT signal from D18b:9 will be asserted.
The WIDTH FAULT signal from D18b is then fed into the fault line driver circuitry D13.
A test of the transponder pulse rise time is initiated by the PRF pulse (XT9) loading
presettable counter D10 with the binary values held on S3.
The value held on switch S3 is indicative of the maximum rise time of the transponder
pulse. Each count on the switches represents 0.1 microseconds actual time.
Figure 2-30
Rise Time Monitor Waveforms
for the arrival of RISE_PULSE. The rising edge of this pulse initiates a down count that
will continue while RISE_PULSE is present. It takes one clock cycle (100 nanoseconds)
to initiate the down count. If the failing edge of the RISE_PULSE occurs before the first
count has reached zero a rise_OK flag is set.
The signal RISE_COUNT at test point XT15 gives an indication of the lengths of the
down count. If and only if the failing edge of RISE_PULSE occurs before the end of the
count will a rise_OK flag be set. The rise OK flag is set on the failing edge of
RISE_PULSE and a non-zero count and is reset when the count goes to zero. If the
down count reaches zero and RISE_PULSE is still asserted then no rise_OK flag is set.
The existence of the rise_OK flag indicates that the RISE_PULSE is less than the
maximum rise time limit.
The pulse_shape error counter D23 is made up of two 3-bit up/down counters D23a and
D23b. Only D23b is used for rise time measurements. In a non-fault state the rise_OK
flag and PRF pulses are fed into D23b. Within D23 the PRF rate is reduced to 33% of
the original PRF rate. The PRF/3 rate is used to count the 3-bit counter toward zero. The
rise_OK flags are used to count the 3-bit counter towards 7. If the rise_OK flag rate
exceeds PRF/3 rate then the pulse-shape error counter will count to 7 and give no fault
indications. If the rise_OK rate is exceeded by PRF/3 rate the counter will count to zero
and a fault indication will be given.
The rise_OK rate will be exceeded by PRF/3 if the RISE_PULSEs are continually
greater than the maximum rise time limit or no valid RISE_PULSEs are returned from
the test interrogator due to low beacon efficiency. In either case a PULSE SHAPE fault
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SECTION 2
must be raised. If a fault is to be raised the signal rise_fault_indication from D23b is

asserted. This signal is input to the timeout monostableD42b.
The signal RISE_COUNT is used to continually retrigger D42b. In the event of a
rise_fault_indication being asserted from counter D23b the monostable D42b is reset
and a positive going RISE FAULT is output from D42b:9. This timeout monostable also
has the effect that if the RISE_PULSE is not encountered then the retriggering signal
RISE_COUNT will not be produced and so the monostable will timeout and the RISE
FAULT signal from D42b:9 will be asserted.
The RISE FAULT signal from D42b is then fed into the fault line driver circuitry D13.
Monitoring of rise pulses and fall pulses is accomplished using identical circuitry.
A test of the transponder pulse fall time is initiated by the PRF pulse (XT9) loading
presettable counter D11 with the binary values held on S2.
Figure 2-31
Fall Time Monitor Waveforms
The values held on switches S2 are indicative of the maximum fall time of the
transponder pulse. Each count on the switches represents 0.1 microseconds actual time.
for the arrival of FALL_PULSE. The rising edge of this pulse initiates a down count that
will continue while FALL_PULSE is present. It takes one clock cycle (100 nanoseconds)
to initiate the down count. If the failing edge of the FALL_PULSE occurs before the first
count has reached zero a fall_OK flag is set.
The signal FALL_COUNT at test point XT16 gives an indication of the lengths of the
down count. If and only if the failing edge of FALL_PULSE occurs before the end of the
count will a fall_OK flag be set. The fall_OK flag is set on the failing edge of
FALL_PULSE and a non-zero count and is reset when the count goes to zero. If the
down count reaches zero and FALL_PULSE is still asserted then no fall_OK flag is set.
The existence of the fall_OK flag indicates that the FALL_PULSE is less than the
maximum fall time limit.
The pulse-shape error counter D17 is made up of two 3-bit up/down counters D17a and
D17b. Only D17a is used for fall time measurements. In a non-fault state the fall_OK flag
and PRF pulses are fed into D17a. Within D17 the PRF rate is reduced to 33% of the
original PRF rate. The PRF/3 rate is used to count the 3-bit counter toward zero. The fall
OK flags are used to count the 3-bit counter towards 7. If the fall_OK flag rate exceeds
PRF/3 rate then the pulse_shape error counter will count to 7 and give no fault
indications. If the fall_OK rate is exceeded by PRF/3 rate the counter will count to zero
and a fault indication will be given.
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SECTION 2
The fall_OK rate will be exceeded by PRF/3 if the FALL_PULSEs are continually greater
than the maximum fall time limit or no valid FALL_PULSEs are returned from the test
interrogator due to low beacon efficiency. In either case a PULSE SHAPE fault must be
raised. If a fault is to be raised the signal fall_fault_indication from D17a is asserted. This
signal is input to the timeout monostable D18a.
A timeout monostable D18a is used to ensure that the counter device D11 is operating.
The signal FALL_COUNT is used to continually retrigger D18a. In the event of a
fall_fault_indication being asserted from counter D17a the monostable D18a is reset and
a positive going FALL FAULT is output from D18a:7. This timeout monostable also has
the effect that if the FALL_PULSE is not encountered then the retriggering signal
FALL_COUNT will not be produced and so the monostable will timeout and the FALL
FAULT signal from D18a:7 will be asserted.
The FALL FAULT signal from D18a is then fed into the fault line driver circuitry D13.
2.3.9.1.10
Figure 2-32
Level Monitor
Level Monitor
A number of DC voltage levels are input to the level monitor circuit from other modules
within the transponder. Each of these levels is buffered and under CTU control
converted to a digital value that can be read by the CTU.
2-78
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SECTION 2
The following signal levels are read:

SOURCE MODULE
SIGNAL NAME
Receiver Video
RV_LOCAL_OSC_LVL
RV_Tx_LVL
Transmitter Driver
TD_MOD_LVL
TD_Tx_LVL_
PA_DRV_LVL
Power Amplifier
SOURCE
MODULE
Test Interrogator
Transponder
Power Supply
PA_MOD_LVL
PA_OP_LVL
PA_HT_LVL
SIGNAL NAME
TI_INT_RF_LVL
TPNDR_OP_LVL
PS_15V_LVL
PS_18V_LVL
PS_HT_LVL
MON_24V_LVL
Monitor
CALIBRATE
GND
The two monitor signals CALIBRATE and GND are used by the CTU to calibrate the
other level measurements.
D22 and D27 are 8:1 multiplexers which are used to choose the level signal to be
monitored and also provide a degree of buffering. The CTU controlled signal lines
AMUX0:3 are used by D22 and D27 to choose the level to be monitored.
The chosen level is buffered by N1 and fed to analogue-to-digital converter D28. The
output of D28 is read under CTU control.
2.3.9.1.11
Figure 2-33
Fault Line Driver

Fault Line Driver
The fault line driver circuitry combines all of the faults from the various parameter
monitors to give primary and secondary fault indications.
2-79
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SECTION 2
The faults are combined in device D13 according to the following table. From this device
the combined faults are directed to the CTU bus and to LED drivers. D8 and D4 are
used to buffer the fault lines and drive the LEDs on the front panel. A pair of signal lines
representing a DELAY fault and a SPACING fault are directed to the receiver video to
inhibit beacon operation, following a primary Fault, if the CTU fails to shut the beacon
down.
The faults are combined as follows:
FAULT TYPE
PRIMARY
SECONDARY
FAULT
DELAYFAULT
SPACING FAULT
EFFICIENCYFAULT
RATE FAULT
IDENTFAULT
POWER FAULT
WIDTH FAULT
RISE FAULT
FALL FAULT
ANTENNA INTEGRITY 1 FAULT
ANTENNA INTEGRITY 2 FAULT
FAULT GROUP
PULSE SHAPE
FAULT
ANTENNA FAULT
Each of the faults shown in italics above are able to be read by the CTU, which then
takes the appropriate course of action for the indicated fault.
The following front panel indicators are used to give a real-time indication of the fault
status of each of the monitored parameters. With the exception of the PRIMARY and
SECONDARY fault indicators, a lit indicator signifies normal operation. If the indicator is
unlit a fault has occurred in that parameter. If the PRIMARY or SECONDARY indicators
are lit a primary fault or a secondary fault has occurred. An unlit indicator for these
parameters signifies normal transponder operation.
FAULT
DELAY FAULT
SPACING FAULT
EFFICIENCY FAULT
RATE FAULT
IDENT FAULT
POWER FAULT
PULSE SHAPE FAULT
ANTENNA FAULT
PRIMARY FAULT
SECONDARY FAULT
INDICATOR
GREEN
GREEN
GREEN
GREEN
GREEN
GREEN
GREEN
GREEN
RED
AMBER
When the front panel switch MONITOR OUTPUTS (S16) is set to FAILED, all of the
front panel indicators will indicate faults. All fault lines read by the CTU will also indicate
faults.
To allow the transponder operation to be inhibited should the CTU fail to respond to
primary faults a pair of fault lines indicating DELAY FAULT and SPACING FAULT are
hardwired to the receiver video module. If these faults are indicated the receiver video
module will inhibit all replies after about 70 seconds.
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2.3.9.1.12
SECTION 2
Miscellaneous Circuitry
A buffered 10 MHz crystal oscillator is fed into clock device D24. This device produces
clocks of 1 MHz and 1 kHz. The 1 kHz signal is fed into clock device D19 and this device
produces a clock of 1 Hz. These four clock frequencies are used for timing circuits
throughout the monitor main board. D48 is used to buffer all of the clock signals before
distribution around the board.
Two power supplies are required on the monitor main board. These are +15 volts for
buffering analogue signals from other transponder modules and +5 volts for all of the
digital logic. The +5 volts supply is created by taking the +24 volts from the test
interrogator and first regulating this to +15 volts via ballast resistor R1 and 3-terminal
regulator N4. This +15 volts is then further regulated to +5 volts using ballast resistor
R89 and 3-terminal regulator N8. The +15 volts supply is created by directly regulating
the +24 volts from the test interrogator using the adjustable three terminal regulator N6.
A power supply monitor is used to provide an indication to the CTU that the two power
supplies used on the monitor main board are operating. The circuit consists of a pair of
window comparators that indicate if the voltages on the +5 volts supply and the +15 volts
supply fall with hardwired limits. These limits are set to be 4.75 volts to 5.25 volts and
14.5 volts and 15.5 volts respectively. Should the power supplies fall outside these limits
then a signal line to the CTU called MON_PS_FLT will fall to zero volts indicating that
the monitor power supplies have failed. The CTU will then take an appropriate action.
From the +15 volts supply two precision +5 volts references N3 and N6 are used to
provide accurate +5.00 volts levels for use in ERP monitor and level monitor.
The MONITOR OUPUTS switch S16 is used to determine the operational mode of the
monitor module. When S16 is in NORMAL mode all parameter monitors are operational.
In FAILED mode all parameter monitors are forced into the failed condition, Primary and
Secondary faults are forced and the TEST LED H12 is lit to indicate that the monitor is
no longer in normal mode. When S16 is set to FAILED a hardwired TI_MON_TEST
signal line is grounded. This test line gives indications on both the test interrogator and
the CTU.
Precision resistors R76 and R77 are used to provide a calibrated voltage level to the
level monitor circuitry so that, on request from the CTU, a measurement can be made of
the +24 volts supply from the test interrogator.
A number of signals from the test interrogator representing parameters to be measured
are buffered on the monitor board before distribution to the respective parameter
monitors. This buffering is done with 74HC4050 buffers D29 and D32. HC CMOS is
used for these buffers to ensure that the parameters to be measured are not changed by
the buffering process. Input pulldown resistors are used on all lines to ensure that the
lines are at a known state should a failure of the test interrogator occur.
2.3.9.2
"
Peak Power Monitor 1A72512

The RF power in the antenna is sampled by a coupler situated within the antenna
housing, and a separate coaxial cable is used to feed this power into the peak power
monitor board at RF input connector XC1.
The peak power monitor consists of an amplitude-modulated video detector and a peak
rider circuit. The detected pulse envelope of the signal at XC1 is output to the monitor
main board via connector XN2:9 as DET_REPLIES. A DC level representing the peak
pulse amplitude of the detected DET_REPLIES signal is also output to the monitor main
board via XN2:14 as REPLY_LVL.
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SECTION 2
The received RF power is demodulated by an envelope detector V1 and the resultant

video pulses are amplified and buffered by N1a and N1b respectively. Resistors R3 and
R4 are used to provide a small DC bias to the detector diode V1; this enables the
detector to recover signals at very low levels.
The output of N1a at N1:1 is buffered by N3a, producing the signal DET_REPLIES.
The output of N1b at N1:7 is fed into a peak rider circuit consisting of N4a and V3. The
peak amplitude of the pulse envelope is buffered by N2b and amplified by N3b,
producing the signal REPLY_LVL.
The peak power monitor is capable of producing a DC level of greater than 2.5 volts for
input RF power levels of +10 dBm to +20 dBm. This DC level is used by the monitor
main board to determine RF power fault levels.
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HA72500
Table 2-13
TYPE
Toggle
switch
Green LED
Green LED
Green LED
Green LED
Green LED
Green LED
Green LED
Green LED
Yellow LED
Red LED
Yellow LED
Red LED
Green LED
Test jack
Test jack
Test jack
Test jack
Test jack
SECTION 2
Summary of Front Panel Controls and Indicators : Monitor Module

LEGEND
MONITOR
FAILED
All monitor outputs are set to their fault condition (high)
OUTPUTS
which invokes a FAILED condition for all front panel
indicators and all fault lines read by the CTU. The TEST
indicator is turned on.
NORMAL
Monitor module operates normally and TEST indicator is
off.
DELAY
SPACING
EFFICIENCY
RATE
When on, indicates that the named parameter is within preset limits.
POWER
IDENT
ANTENNA
SHAPE
SELF TEST
Indicates that the CTU is performing a Monitor Self Test, during which
the CTU will look for the two primary parameters in the fault state.
PRIMARY
Indicates that one or both of the primary parameters (Delay, Spacing)
are outside preset limits.
SECONDARY
Indicates that one or more of the six secondary parameters (Efficiency,
Rate, RF Power, Ident, Antenna, Shape) are outside preset limits.
TEST
Indicates that the MONITOR OUTPUTS switch is not in the NORMAL
position.
POWERON
Indicates that DC power is applied to the monitor.
ERP PULSE
Detected pulse waveform of transmitted pulse - sampled near the
antenna and fed into the ERP IN connector.
ERP EARTH
Earth reference for the ERP PULSE test jack signal.
+1 5V
Buffered output of the internally generated +15 volts.
+5V
Buffered output of the internally generated +5 volts.
EARTH
Common earth of the power supplies, the internally generated supplies,
and all input and output signals.
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HA72500
Table 2-14
SUBASSY
SECTION 2
Summary of Internal Controls : Monitor Module

TYPE
REF
1A72511 Main
Preset
R87
PWB Assembly, resistor
Monitor Module 8-way DIL S1
switch
The Monitor
Fault Limit
switches S1-4
and S7-10, S12
and S13 are
binary coded,
with switch 1 of
the DIL switches
the least
significant and
switch 8 (or 10)
the most
significant. They
use inverted
logic, with the
OFF position of
the switch being
active.
CONTROL FUNCTIONS
LEGEND
FUNCTIONISETTING/INDICATION
PULSE WIDTH
LOWER REJECT
LIMIT
8-way DIL S2
switch
FALL TIME
UPPER REJECT
LIMIT
8-way DIL S3
switch
RISE TIME
UPPER REJECT
LIMIT
8-way DIL S4
switch
PULSE WIDTH
REJECT
WINDOW
8-way DIL S7
switch
POWER LEVEL
LOWER REJECT
LIMIT
Sets the ERP monitor fault alarm reference level to

0 dB at commissioning.
1 2 3 4 5 6 7 8
ON
OFF
Multiply the required lower reject limit (in
microseconds) by 10 and subtract 1. Encode the
switches for this value.
For a lower reject limit of 2.9 microseconds the
switches are encoded for a number of 28, as
shown above.
1 2 3 4 5 6 7 8
ON
OFF
Multiply the required upper reject limit (in
For an upper reject limit of 3.6 microseconds the
shown above.
1 2 3 4 5 6 7 8
ON
OFF
shown above.
1 2 3 4 5 6 7 8
ON
OFF
Multiply the difference between the required upper
and lower reject limits (in microseconds) by 10 and
subtract 1.
Encode the switches for this value.
difference between the limits is 1.2 microsecond
and the switches are encoded for a number of 11,
as shown above.
1 2 3 4 5 6 7 8
ON
OFF
The power level corresponds to the switch setting,
from -1 to -8 dB. For a lower reject limit of -3 dB
the switches are set as shown above.
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SUBASSY
SECTION 2
TYPE
REF
1A72511 Main
PWB Assembly, 8-way DIL S8
Monitor Module switch
8-way DIL S9
switch
8-way DIL S10

switch
10-way
S12
DIL switch
10-way
S13
DIL switch
CONTROL FUNCTIONS
LEGEND
IDENT GAP
UPPER REJECT
LIMIT
ON
OFF
Subtract 2 from the required upper reject limit (in
seconds). Encode the switches for this value.
For an upper reject limit of 62 seconds the
shown above.
DELAY REJECT
1 2 3 4 5 6 7 8
WINDOW
ON
OFF
and lower reject limits (in microseconds) by 10
and subtract 1. Encode the switches for this
value.
as shown above.
SPACING
1 2 3 4 5 6 7 8
REJECT
ON
WINDOW
OFF
and lower reject limits (in microseconds) by 10
and subtract 1. Encode the switches for this
value.
as shown above.
DELAY LOWER
1 2 3 4 5 6 7 8 9 10
REJECT LIMIT
ON
OFF
shown above.
SPACING
1 2 3 4 5 6 7 8 9 10
LOWER REJECT
ON
LIMIT
OFF
shown above.
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SECTION 2
2.3.10
Control and Test Unit 1A72550
2.3.10.1
General
The Control and Test Unit (CTU) monitors, controls and tests various functions within the
LDB-102 DME. The CTU contains a comprehensive test facility to allow rapid
assessment of performance. By keypad selection, each of the main DME parameters,
including signal levels and status conditions, can be measured and displayed. The CTU
is used in conjunction with the test interrogator module(s) to perform the measurements
and tests.
The CTU controls the operation of a single or dual transponder configuration LDB-102
DME, both locally and remotely. It also performs data acquisition and control functions
for the Remote Control and Monitoring System (RCMS).
A detailed description of the controls and indicators of the CTU is given in Appendix A.3.
2.3.10.2
Mechanical
The CTU comprises three boards, namely the CTU Processor PWB Assembly
(1A72552), the CTU Front Panel PWB Assembly (1A72553) and the RCMS Interface
PWB Assembly (1A72555). The boards are mounted on an aluminium frame and
connected using ribbon cables. A DC/DC converter is also mounted on the aluminium
frame and connects to the CTU processor board. The CTU is installed in the CTU
subrack.
A block diagram of the CTU is shown in Figure 2-34. Details of the individual boards are
given in following sections.
Figure 2-34
CTU Block Diagram
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HA72500
2.3.10.3
"
SECTION 2
CTU Processor PWB Assembly 1A72552
2.3.10.3.1
General
The CTU processor board provides the microprocessor and memory for the CTU. It
provides interfaces with the CTU front panel board, the RCMS interface board, and
Transponders 1 and 2. The CTU also has a serial port, and controls the sourcing of the
ident signals.
A block diagram of the CTU processor board is shown in Figure 2-35.
2.3.10.3.2
Microprocessor
The microprocessor, D9, is a CMOS 80C186 which operates at 10 MHz. The processor
provides a clock generator, an interrupt controller, three 16-bit timers, memory and
peripheral chip select logic, and a wait state generator.
The microprocessor supervisory chip, N2, acts as a watchdog for the processor and as a
24 volts monitor. If the watchdog input (WDI), pin 11, is not toggled within 1.6 seconds,
RESET, pin 15, pulses low causing the processor to be reset. N2 monitors the 24 volts
line via the power fail comparator input (PFI), pin 9. If the 24 volts line voltage drops
below a preset value then the voltage at PFI drops below its threshold. This in turn
causes PFO, pin 10, to go low, which activates the LOW_TPNDR_BAT alarm. The
preset value may be adjusted by R32 to be anywhere in the range 18 to 23 volts.
The wait state generator and address decoder, D13, is implemented using an EP610
programmable logic device (PLD). D13 generates external CTU bus signals for the
interfaces with the front panel board, RCMS interface board and the transponders. It
also produces the SRDY signal for the processor. The SRDY signal causes the
processor to insert wait states during input/output operations to slower devices. All
devices selected by PCS0, PCS1, PCS2, MCS1 and MCS2 require seven wait states.
All other devices require zero wait states.
D7, D8 and D10 are address latches.
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HA72500
Figure 2-35
2.3.10.3.3
SECTION 2
CTU Processor Board Block Diagram
Memory
The memory on the CTU processor board comprises 8Kx8 EEPROM, 64Kx16 EPROM,
and 32Kx16 RAM.
The EEPROM, D16, is a 28C65. It is used to store the state of the CTU front panel at
power down so that it can be restored to the same state at the next power-up; it also
stores the number of restarts.
The EPROM, D17, is a 27C210. It is used to store the CTU program, operating system,
applications code, built-in tests and production test code.
The RAM is divided between two chips; D15 stores the low bytes, and D14 stores the
high bytes.
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2.3.10.3.4
SECTION 2
Serial Port
The RS-422 serial port comprises two differential bus transceivers, N4 and N5, as well
as a universal asynchronous receiver/transmitter (UART), D6. This arrangement allows
the serial port to operate in full-duplex mode.
The serial port is used to communicate with a remote maintenance monitoring system.
2.3.10.3.5
RCMS and Front Panel Interface
The interface to the RCMS interface board and the front panel board is implemented
using D29, D30 and D31.
D29 is an octal bus transceiver used to transfer data between the CTU processor board
and the other two boards. DT/R from the processor controls the direction of data flow
through the transceiver. Resistor networks RN20 and RN21 reduce noise susceptibility
on input data to D29.
D30 is the address buffer, and its outputs are enabled when PCS0 is low. A0 from the
processor is not buffered since it is used as an enable signal rather than an address
signal by the processor (analogous to BHE for the low data byte). Hence ADDR0 to the
front panel and RCMS interface boards connects to A1, ADDR1 connects to A2, and so
on up to ADDR6.
D31 is the control byte buffer. Its outputs are always enabled.
The interrupt input (XINT) from the front panel and RCMS interface enters the CTU
board on XN3:34. It is ANDed with the RDY/BSY signal from the EEPROM. This has the
effect of disabling XINT while the EEPROM is being written to.
2.3.10.3.6
Transponder Interfaces
The Transponder 1 interface comprises D35, D36 and D37, and connects to
Transponder 1 via XN2. The Transponder 2 interface comprises D32, D33 and D34, and
connects to the RCMS interface board via XN3. (The RCMS interface board directs the
signals to Transponder 2.).
The arrangement and operation of these interfaces is similar to the RCMS and front
panel interface in Section 2.3.10.3.5.
2.3.10.3.7
Ident
Selection of the ident signals is performed by the ident tone and keying PLD, D2. The
ident PLD has the following inputs and outputs:
a.
Sources of ident signal (inputs):

1.
ASSOC_IDENT_IN;
2.
MA_IDENT_OUT_1;
3.
MA_IDENT_OUT_2;
4.
REQ_IDENT_KEYING_1;
5.
REC_IDENT_KEYING_2;
6.
REC_IDENT_TONE_1; and
7.
REC_IDENT_TONE_2.
b.
Clock inputs:
1.
2440 Hz; and
2.
TMROUT.
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SECTION 2
c.
Select inputs:
1.
ASSOC_IDENT_SEL_1;
2.
ASSOC_IDENT_SEL_2;
3.
REC_IDENT_SEL_1; and
4.
REC_IDENT_SEL_2.
d.
Ident signal outputs:

1.
IDENT_ON;
2.
MA_IDENT_IN_1;
3.
MA_IDENT_IN_2;
4.
MA_IDENT_OUTPUT;
5.
DET_IDENT_KEY;
6.
IDENT_TONE_TRANSFORMER; and
7.
IDENT and CPU TONE.
The relationship between these is shown in Table 2-15 to Table 2-17.

Table 2-15
Ident PLD Outputs: MA_IDENT_IN_1,2, MA_IDENT_OUT,
IDENT_TONE_TRANSFORMER, DET_IDENT_KEY
INPUTS
OUTPUTS
ASSOC_IDENT_SEL
2
1
0
0
0
1
1
1
0
1
Table 2-16
MA_IDENT_IN
IDENT_TONE_
TRANSFORMER
MA_IDENT_OUT
0
ASSOCDENT_IN
0
0
ASSOC_IDENT_IN
0
MA_IDENT_OUT_1
MA_IDENT_OUT_2
0
0
0
0
DET_IDENT_KEY
REC_IDENT_TONE_1 REC_IDENT_KEYING_1
REC_IDENT_TONE_2 REC_IDENT_KEYING_2
0
0
0
0
Ident PLD Output: IDENT+ CPU_TONE

INPUTS
OUTPUTS
REC_IDENT_SEL
2
1
IDENT +CPU_TONE
0
0
1
1
0
1
0
1
REC_IDENT_TONE_1
REC_IDENT_TONE_2
2240 Hz
TMROUT
2-90
HA72500
Table 2-17
SECTION 2
Ident PLD Output: IDENT_ON

INPUTS
ASSOC_IDENT_SEL
2
1
x
OUTPUTS
REC_IDENT_SEL
2
1
1
0
x
0
x
0
x
1
x
0
x
0
x
0
2240 Hz
IDENT_ON
REC_IDENT_KEYING_1
REC_IDENT_KEYING_2
x = Don't care
= Low-to-high transition
q = State of IDENT_ON at previous low-to-high transition of 2440 Hz
The MA_IDENT_OUTPUT signal is produced by N1 which is an optically coupled
MOSFETV relay. This signal appears as either an open circuit or as a contact closure.
The DET_IDENT_KEY output appears as either +24 volts or ground. The other five
IDENT outputs are TTL level signals.
The recovered ident signal at D2:9 activates buzzer B1 for monitoring purposes. The
level of the signal may be adjusted using the variable resistor R33.
2.3.10.3.8
Switches
There are two 8-position DIP switches on the board, S1 and S2, which are read via
buffers D20 and D25 and are used to configure the CTU. The setting details for these
switches are given in Appendix A.
2.3.10.3.9
Indicators
There are eight green LEDs on the CTU board, H1-8. H1 and H2 are driven by one of
the address latches, D10, and the remaining six LEDs are driven by octal latch D26. The
meaning of the LED states is summarised in Table 2-18.
Table 2-18
CTU Processor Board LED Indicators

LED
H1
H2
H3
H4
H5
H6
H7
H8
INDICATES
A19 activity
A16 activity
ROM Test OK
Heartbeat
RAM Test OK
2.3.10.3.10 Links
The CTU board has six links, XN5-10, the functions of which are summarised in Table
2-19.
2-91
HA72500
Table 2-19
SECTION 2
CTU Processor Board Links
LED
FUNCTION
XN5
Ground one leg of MA_IDENT_OUTPUT
XN6
Watchdog disable
XN7
Select signature analysis
XN8
Ident Test
XN9
Watchdog Test
XN10
Pullup ASSOC_IDENTIN input to +24 volts
NOTE: The function is enabled when the link is fitted
2.3.10.3.11 Miscellaneous Inputs and Outputs

There are 13 bits read by D19 and D24. Their source and signal type are summarised in
Table 2-20.
Table 2-20
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CTU Processor Board D19 and D24 Inputs

NAME
LOW_TPNDR_BATT
Spare
Spare
ANT_REL_TEST
TI_MON_TEST_2
TI_MON_TEST_1
TPNDR_TEST_2
TPNDR_TEST_1
EEPROM_RDY
IDENT_ON
Spare
TRNS_CB_OFF
BAT_CHG_NORM_1
BAT_CHG_NORM_2
AC_PWR_NORM_1
AC_PWR_NORM_2
SOURCE
DESCRIPTION
N2:10
High if battery voltage < preset
External I/O Board

RCMS (Transponder 2)
Transponder 1
Transponder 1
D16:1
D2:6
Ground or open circuit

Low if EEPROM engaged in write cycle
Ident output
External I/O Board

External I/O Board
External I/O Board
External I/O Board
External I/O Board

24 volts or open circuit
2-92
HA72500
SECTION 2
There are 16 bits output via D18 and D23. Their destination and signal type are
summarised in Table 2-21.
Table 2-21
BIT
CTU Processor Board D18 and D23 Outputs

NAME
15
14
13
12
11
10
9
8
7
6
5
ASSOC_IDENT_SEL_2
ASSOC_IDENT_SEL_1
ANT_RELAY_CONTROL
RV_IDENT_INH_2
RV_TX_INH_2
RV_RF_ON_2
TPDR_PWR_ON_2
PA_PWR_ON_2
REC_IDENT_SEL_2
REC_IDENT_SEL_1
MAINT_FNS_EN
4
3
2
1
0
RV_IDENT_INH_1
RV_TX_INH_1
RV_RF_ON_1
TPDR_PWR_ON_1
PA_PWR_ON_1
DESTINATION
D2:19
D2:23
External I/O Board
D2:10
D2:14
and Transponder 1
Transponder 1
Transponder 1
Transponder 1
Transponder 1
Transponder 1
DESCRIPTION
+24 volts or ground
+24 volts or ground
+24 volts or ground
+5 volts or ground
+5 volts or ground
+5 volts or ground
+5 volts or ground
+5 volts or ground
+24 volts or ground
+24 volts or ground
+24 volts or ground
+5 volts or ground
+5 volts or ground
+5 volts or ground
+5 volts or ground
+5 volts or ground
2.3.10.3.12 Counter
D12 is a binary ripple counter. The clock input (pin 10) is 10 MHz clock output from the
processor. The three D12 outputs used are 610 Hz (pin 3), 1220 Hz (pin 2) and 2440 Hz
(pin 1). Either 610 Hz or 1220 Hz can be selected to be a clock input for the processor
(D9:20, 21) and the UART (D6:5). The selection is made by fitting either R30 or R31 as
required. The 2440 Hz output of D12 is an input to the ident PLD (D2:2).
2.3.10.3.13 Power
24 volts from the main power supply enters the CTU board via XN1:3a and XN1:3c. This
is distributed around the board and to XN3:43 and XN3:44 for distribution to the front
panel and RCMS interface boards. 24 volts is also connects to XN11:1. From here it is
fed to the CTU DC/DC converter which returns 5 volts via XN11:4. The DC/DC converter
is a switching power supply which is mounted on the CTU metalwork.
5 volts from the DC/DC converter is used on the CTU processor board; it is distributed to
the front panel board and RCMS interface board via XN3:39 and 40; and it is distributed
to the external I/O board via XN1:2c and it is distributed for general use by other
modules mounted in the CTU subrack via XN1:12a,c, 13a,c and 14a,c.
2.3.10.3.14 External 5 Volts Circuit

The external 5 volts circuit comprises V7, R50-52, C53-54, and N3. This circuit provides
a 5 volts supply for Transponder 1 which is independent of the CTU 5 volts supply. This
ensures that any problem which brings down the transponder 5 volts supply will not
adversely affect CTU 5 volts.
Diode V7 protects the linear regulator N3 from any accidental reverse polarity voltages
which may be applied to the 24 volts line. R52 restricts the maximum current drawn to
about 150 mA. During normal operation the current supplied by N3 is typically less than
60 mA.
R50 and R51 set the output voltage of N3 to be in the range 5.3 to 5.7 volts.
2-93
HA72500
2.3.10.4
"
SECTION 2
CTU Front Panel PWB Assembly 1A72553
2.3.10.4.1
General
The front panel board provides the CTU user interface. It has switches, LEDs and a
2-line by 40-character LCD which allow the user to:
a.
display operational parameters and test results; and
b.
exercise local control and monitoring of the DME.
The LCD displays a menu of functions available to the user on the function keys, while
other keys have dedicated functions.
A block diagram of the front panel board is shown in Figure 2-36.
Figure 2-36
2.3.10.4.2
CTU Front Panel Board Block Diagram
Interface with CTU Processor PWB Assembly
The interface with the CTU processor board comprises D7, D9, RN1-6 and RN12-14.
Resistor networks RN1, RN2, RN4, RN5, RN12 and RN13 reduce noise effects on the
incoming fines. D9 is an EP610 PLD which is programmed as the address decoder for
the front panel. The address map for the board is shown in Table 2-22. D7 is a 74HC245
data transceiver which is used to transfer data bits D0-7 between the front panel and the
processor board. The XDT/R signal from the processor is used to control the direction of
data flow through the transceiver.
2-94
HA72500
SECTION 2
Table 2-22
CTU Front Panel Address Map
A6
A5
A4
A3
A2
A1
0
0
0
0
0
0
0
0
0
0
0
0
x
x
0
0
0
0
0
0
0
0
0
0
x
x
0
0
0
0
0
0
0
0
0
1
x
x
0
0
0
0
0
1
1
1
1
0
x
x
0
0
0
1
1
0
0
1
1
0
x
x
0
1
1
0
1
0
1
0
1
0
2.3.10.4.3
PCS0 XWR
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
1
1
0
0
0
0
0
XRD
1
0
1
1
0
0
0
1
1
1
1
1
SELECTS
Data transceiver D7 (Write)
Data transceiver D7 (Read)
LCD control/address (Write)
LCD data (Write)
LCD data (Read)
Switch scanner and coder D5 (Read)
Alarm inhibit/delay D3 (Read)
Alarm register 1 D11 (Write)
Alarm register 2 D10 (Write)
Control status 1 D12 (Write)
Control status 2 D12 (Write)
Miscellaneous status D8 (Write)
Liquid Crystal Display
The liquid crystal display (LCD) is 40-character by 2-line display. The view angle of the
LCD may be adjusted by varying R1, which changes the feedback of the drive voltage to
the LCD display provided by N1. V1 and V2 in the operational amplifier circuit provide
temperature compensation. The forward voltage drop across diodes V1 and V2 varies
with temperature, resulting in the positive input to the amplifier also varying with
temperature; this helps to maintain good LCD contrast.
2.3.10.4.4
Indicators
There are 33 LEDs visible to the CTU user. These LEDs provide information on DME
control status, test functions, power status, alarms and miscellaneous status. Another
LED, the heartbeat LED (H14) is not visible to the user. It is used as a diagnostic aid to
make sure that the CTU processor software is writing to the front panel. During normal
operation the heartbeat LED will flash about once a second.
The octal latches D6, D8 and D 10-12 are used to control the LEDs. A high level on the
XRES line from the CTU processor will force all latch outputs high, turning the LEDs off.
Also during reset, transistors V7 and V8 will turn on, causing the PRIMARY alarm LED
(H30) and the CTU alarm LED (H33) to be on.
2.3.10.4.5
Pushbutton Switches
The front panel has 16 pushbutton switches which are read by the switch scanner and
coder PLD, D5. This divides the keys into two groups, those with dedicated inputs and
outputs, and those read as part of a four-by-four matrix and coded to form a four-bit
output.
The TI RATE switches, 1 kHz (S6) and 10 kHz (S7) have dedicated inputs and outputs.
The D5 outputs for these switches, pins 20 and 21, are enabled by the select signal from
the address decoder which enters D5:4. R11-12, C9-10 and D4 make up the debounce
circuitry for these switches.
Switches S1-5, S10 and S13-20 are read as part of a 4x4 array. D5 senses switch
closures by driving the COL1-4 outputs low, one at a time, and reading the ROW1-4
inputs. When D5 recognises a switch closure, the VALID output (pin 19) goes high, and
the code corresponding to the pressed pushbutton is output on pins 15-18 as shown in
Table 2-23. If more than one of the pushbuttons is pressed at any one time, no switch
2-95
HA72500
SECTION 2
closure is recognised by D5, R10, C8 and D4 debounce switch closures and openings
from the switch matrix.
No switches are fitted in the S8 and S9 locations.
Table 2-23
2.3.10.4.6
CTU Front Panel Switch Scanner and Coder Output

I013
I014
I015
I016
SWITCH RECOGNISED
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
S20
S19
S18
S17
S16
S15
S14
S13
S1
S2
S3
S4
S5
S10
S9
S8
Rotary Switches
There are two rotary switches, ALARM POWER ON INHIBIT (S11) and ALARM DELAY
(S12). The outputs of these binary coded decimal (BCD) switches are read via buffer D3.
S11 is not accessible to the operator, as it is set only by a technician. S12 is mounted on
the front panel and is accessible to the user.
2.3.10.4.7
Charge-pump Voltage Inverter
-5 volts for the front panel is obtained from +5 volts by using two 74HC04 inverter chips,
D1 and D2, in a charge-pump voltage inverter circuit.
2.3.10.5
"
RCMS Interface MB Assembly 1A722555
2.3.10.5.1
General
The RCMS interface board provides opto-isolators to read remote control relay inputs,
and relays to control remote lamp outputs. All of the RCMS interface relays are fitted
with surge protection. This board also extends the Transponder 2 interface signals from
the CTU processor board to a backplane connector.
A block diagram of the RCMS interface board is shown in Figure 2-37.
2-96
HA72500
SECTION 2
Figure 2-37
RCMS Interface Board Block Diagram
2.3.10.5.2
Interface with CTU Processor MB Assembly
The interface with the CTU processor board comprises D1, D2 and RN1-9. Resistor
networks RN2, RN3, RN4, RN5, RN8 and RN9 reduce noise effects on the incoming
lines. D1 is a PLD which is programmed as the address decoder for the RCMS interface
board. The address map for the board is shown in Table 2-24. D2 is a 74HC245 data
transceiver which is used to transfer data bits D0-7 between the RCMS interface board
and the processor board. The XDT/R signal from the processor is used to control the
direction of data flow through the transceiver.
Table 2-24
RCMS Interface Address Map
A6
A5
A4
A3
A2
A1
1
1
1
1
1
1
1
x
x
0
0
0
0
0
x
x
0
0
0
0
1
x
x
0
0
1
1
0
x
x
1
1
0
1
0
x
x
0
1
1
1
0
2.3.10.5.3
PCS0 XWR XRD

0
0
0
0
0
0
0
0
1
0
0
0
1
1
1
0
1
1
1
0
0
SELECTS
Data transceiver D2 (Write)
Data transceiver D2 (Read)
Miscellaneous status D3 (Write)
RCMS status 2 D4 (Write)
Bit out 3 D5 (Write)
Bit feedback 2 D6 (Read)
RCMS control 1 D7 (Read)
Input/Output Feedback
The latch D5 and buffer D6 form an input/output feedback circuit. An RCMS interface
board may not be fitted to all CTUs, and so this circuit is used to check for the presence
of the board. If a byte written to the latch can be read back, the RCMS interface board is
fitted.
2.3.10.5.4
Relays
The RCMS interface board is fitted with 15 relays, K1-15. The relays have changeover
contacts fitted with varistors, F2-31, to provide surge protection. The relays are
controlled via octal latches D3 and D4.
2-97
HA72500
2.3.10.5.5
SECTION 2
Heartbeat Indicator
The heartbeat LED, H1, is used as a diagnostic aid to make sure that the CTU processor
software is writing to the RCMS interface board. During normal operation the LED will
flash about once a second.
2.3.10.5.6
Opto-isolator Inputs
The RCMS interface board is fitted with six opto-isolator inputs. Each input comprises an
opto-isolator, a diode, a 3.9 volts zener diode, a 1 uF capacitor and a 4.75 kilohms
resistor. The resistor limits current to the opto-isolator; the capacitor filters the applied
voltage; the zener ensures that low voltage inputs do not activate the opto-isolator; and
the diode protects the opto-isolator against reverse polarity voltages. The inputs are read
via buffer D7. The inputs to the buffer are normally pulled high by RN11 and go low
when the opto-isolator is switched on.
2.3.10.5.7
Ident Tone Transformer
The ident tone transformer, T1, is a 600 ohms balanced transformer used to send ident
to a remote location via XN1:32a,c. The ident input is sourced from the CTU processor
board via XN3:46. The variable resistor R1 may be used to adjust the level of the ident
signal.
2.3.10.5.8
External 5 Volts Circuit
The external 5 volts circuit comprises V13, R10, R15-16, C18, C23, and N7. This circuit
provides a 5 volts supply for Transponder 2 which is independent of the CTU 5 volts
supply. This ensures that any problem which brings down the transponder 5 volts supply
will not adversely affect CTU 5 volts.
Diode V13 protects the linear regulator N7 from any accidental reverse polarity voltages
which may be applied to the 24 volts line. R10 restricts the maximum current drawn to
about 150 mA. During normal operation the current supplied by N7 is typically less than
60 mA.
R15 and R16 set the output voltage of N7 to be in the range 5.3 to 5.7 volts.
2.3.10.5.9
External 24 Volts Circuit
The external 24 volts circuit comprises R9 and F1, and is fitted if required to provide 24
volts to remote equipment via XN12a,c. R9 is a 10 ohms resistor and F1 is an RXE050
polyswitch thermistor. During normal operation the current drawn through R9 and F1 is
less than 180 mA. In the event of a short circuit to ground at the remote equipment, R9
restricts the current to 2.4 amperes. At this current, F1 switches off in about 1.5 seconds,
reducing the current to a negligible level until the remote fault is rectified. R9 (which is 10
watts rating) can comfortably withstand the overcurrent for the short period.
2.3.10.5.10 Transponder 2 Interface

The RCMS interface board extends Transponder 2 signals between XN2 and XN3. XN2
is a backplane connector which connects to the transponder. XN3 connects via ribbon
cable to the CTU processor board which controls the interface to the transponder.
2.3.11
Power Distribution Panel Single DME 1A72549 and Power
Distribution Panel Dual DME 2A72549
"
REFER 1A72549 Circuit Diagram 72549-3-06

2A72549 Circuit Diagram 72549-3-16
The power distribution panels terminate and distribute the primary 24 volts supplies and
provide circuit protection for DME circuits. The Power Distribution Panel for a single
2-98
HA72500
SECTION 2
DME is a type 1A72549; a block diagram for this is shown in Figure 2-38. For a dual
DME the Power Distribution Panel is a type 2A72549; a block diagram for this is shown
in Figure 2-39.
The circuit breakers used have a second set of contacts which are electrically isolated
from the trip contacts. These secondary contacts are connected in series and tied to
ground at one end. The other end is connected to the CTU as the TRNS_CB_OFF line.
If all circuit breakers are on, the TRNS_CB_OFF signal to the CTU will be ground. If one
or more of the circuit breakers are off, the TRANS_CB_OFF signal will appear as an
open circuit at the CTU.
Figure 2-38
Single Power Distribution Panel Block Diagram
Figure 2-39
Dual Power Distribution Panel Block Diagram
2.3.12
AC Power Supply 3A71130
Manufacturer documentation for the power supply, including circuit and components
schedule, is identified in Appendix J.
2-99
HA72500
2.3.13
"
SECTION 2
Power Supply System Dual AC 2A/3A69758

The Dual AC Power Supply Systems 2A69758 and 3A69758 each consist of two AC
Power Supplies 3A71130 mounted in an equipment rack. The two types are electrically
and functionally identical but they are mounted in different rack sizes; the type supplied
depends on the installation requirements. The layout of a type 2A69758 is shown in
Figure 2-40, as an example.
Each AC power supply positive and negative output is connected independently to the
DME racks +ve and -ve battery terminals.
The AC power supplies' status outputs (AC Power Normal 1 and 2, Bty Charger Normal
1 and 2 and Mains OK) are connected to terminal blocks for ease of connection. It
should be noted that 'Mains OK' is from AC power supply 1 only.
For detail on AC Power Supply 3A71130, refer to the handbook detail in Appendix J.
Figure 2-40
Power Supply System Dual AC 2A69758 Layout
2-100
HA72500
2.3.14
"
SECTION 2
Transponder Subrack 1A72513

The transponder subrack consists of a standard Eurocard 6 unit by 280 mm deep card
frame which accepts the five transponder plug-in modules. The card frame is fitted with a
Transponder Subrack Motherboard (1A72556) in the upper three units, and an RF
connector mounting panel in the lower three units to make the coaxial connections when
the modules are plugged in.
The chassis of the plug-in modules are grounded to the subrack through securing
screws fitted to the front panels of the modules.
2.3.15
"
CTU Subrack 1A72506
REFER Interwiring Diagrams 72550-1-03, 72505-2-06, 72505-2-17

The CTU subrack consists of a standard Eurocard 6 unit by 220 mm deep card frame
which accepts the Control and Test Unit (1A72550) and the Power Distribution Panel
(1A/2A72549); a number of spare monitors are available for expansion (for remote
maintenance monitoring, for example).
All modules are of the plug-in type. The CTU plugs into DIN type IDC connectors in the
card frame.
The power distribution panel plugs into a 15-way DIN connector in the card frame, which
is connected directly to the main power loom.
The chassis of the plug-in modules are grounded to the subrack through securing
screws fitted to the front panels of the modules.
2.3.16
"
External I/O PWB Assembly 1A72557

The External I/O PWB Assembly 1A72557 is mounted on the side of the rack frame at
the rear of the transponder subrack. It provides the interface for external connections to
the DME unit. These are made using the terminal block connectors XB1 to XB11.
Connections to the CTU and the Remote Control and Monitoring System (RCMS) are
made by two 64-way ribbon cable connectors XN6 and XN8.
XN1 connects to the RF panel and provides the RF relay signals and +24 volts to the
CTU. XN2 connects the battery charger signals (Mains OK, AC Normal and Battery
Charger Normal) to the CTU.
Amplifier N2 and transistor V1 provide a protected power supply, for external use with
the status signalling relays. Should the external load current exceed the rated load for
the circuit, the output voltage will fall and the output current will 'fold-back', reducing the
dissipation in transistor V1.
Voltage divider R1 and R9 establish a reference voltage at the non-inverting input, N2:3,
of amplifier N2. The voltage at the inverting input, N2:2, is determined by resistors R2,
R7 and R8. Under normal load conditions, this voltage is slightly above the voltage at
N2:3, so the output at N2:6 is close to ground and transistor V1 is turned on.
When the load current approaches the limiting value, the voltage drop across R4 and R5
causes the voltage at N2:2 to fall slightly below the voltage at N2:3 The voltage at the
output, N2:6, therefore starts to rise, turning off V1 and causing V1 collector voltage to
fall. At the same time, positive feedback is applied through R8, which pulls the voltage at
N2:2 even lower, causing V1 collector voltage to fall further so that the load current
decreases. This creates the so-called 'fold-back' characteristic, where the short-circuit
current is significantly less than the current at the onset of limiting.
2-101
HA72500
SECTION 2
Voltage regulator N1 provides a remote supply for the modem connector XN3 (for use by
a remote maintenance monitoring system).
2.3.17
1kW PA Power Supply Frame 1A72503
This is designed to carry the 1kW PA Power Supply (1A72540).

The frame occupies 6 units of rack space, and has a front panel which hinges forward
and down to provide access to the 1kW PA power supply, which is fitted to this panel.
The front panel has two straps to stop it approximately horizontally when open. It is fitted
with two captive screws to secure it in the closed position. When fitted to the rack the
1kW RF Power Amplifier (1A72535) is located directly behind the 1kW PA power supply
frame.
2-102
HA72500
SECTION 4
SECTION 4
MAINTENANCE PROCEDURES
4-i
HA72500
SECTION 4
TABLE of CONTENTS
4.
MAINTENANCE PROCEDURES ............................................................... 4-1

4.1
LINE-REPLACEABLE UNITS (LRU)
4-1
4.1.1 Removal/Replacement Instructions............................................................ 4-1
4.1.2 Fault Location ............................................................................................ 4-2
4.1.3 LRU Post-Replacement Tests.................................................................... 4-9
4.2
WAVEFORMS
4-15
4.3
SPECIAL MAINTENANCE PROCEDURES
4-38
4.3.1 Stripline Printed Wiring Boards................................................................. 4-38
4.3.2 Conformal Coating ................................................................................... 4-43
4.3.3 RF Transistor Replacement ..................................................................... 4-44
4-ii
HA72500
SECTION 4
LIST of FIGURES
Figure 4-1
Figure 4-2
Figure 4-3
Figure 4-4
Figure 4-5
Figure 4-6
Figure 4-7
Figure 4-8
Figure 4-9
Figure 4-10
Figure 4-11
Signal Flow Block Diagram ...................................................................4-4

Lateral Positioning of Chip Capacitors.................................................4-38
Longitudinal Positioning of Chip Capacitors ........................................4-38
Chip Capacitor Soldering Requirements .............................................4-39
Soldering of Through Board Mounted Chip Capacitors........................4-39
Part Placement ...................................................................................4-40
Maximum/Minimum Solder Conditions ................................................4-41
Lead Placement Conditions ................................................................4-41
Lead Soldering Conditions ..................................................................4-42
Minimum Clearance of Sealed Components .......................................4-42
Multiple Lead Termination Requirements ............................................4-43
LIST of TABLES
Table 4-1
LRU Post-Replacement Tests...................................................................4-9
4-iii
HA72500
SECTION 4
4. MAINTENANCE PROCEDURES
4.1
LINE-REPLACEABLE UNITS (LRU)
4.1.1
Removal/Replacement Instructions
The DME LDB-102 contains a number of line replaceable units (LRUs) which can be
replaced during field servicing. A list of LRUs can be found in Section 3.4.
The following sections describe the procedure for removing units. Units may be refitted
by following the reverse procedure.
4.1.1.1
SMA Connectors
Most RF LRUs are connected using SMA coaxial connectors. These may be
disconnected using the 8 mm open-ended spanner provided in the DME Test Accessory
Kit. When reconnecting SMA connectors, ensure that the connectors are properly
aligned and not cross-threaded. The connector nut should be tightened to a torque of 0.5
newton-metres (4.5 inch-pounds), which is equivalent to a light hand pressure on the
spanner provided.
4.1.1.2
PWB Assemblies (General)
a.
Disconnect all external connectors.
b.
Remove the printed wiring board (PWB) fixing screws, and withdraw the
PWB.
4.1.1.3
RF Modules in Transponder Plug-in Modules (excluding 1A72533
and 1A72534)
a. Remove the plug-in module main PWB, following the procedure described in
Section 4.1.1.2; this gives access to the RF module fixing screws.
b. Disconnect all external connectors to the RF module, removing the box lid if
necessary.
c. Remove the module fixing screws, and withdraw the module.
4.1.1.4
1A72534
Medium Power Driver 1A72533 and Power Modulation Amplifier
a. Disconnect all external connectors.

b. Remove the lid from the box.
c. Remove the three module fixing screws from inside the box, and withdraw the
unit.
"
NOTE
4.1.1.5
when removing the power modulation amplifier from the 1kW RF Power
Amplifier 1A72535, it is necessary to remove the fixing screws and move the
box before disconnecting the 4-pin connector and the coaxial cables, because
of the space restrictions around the box.
RF Modules in 1kW RF Power Amplifier
This procedure applies to Power Divider 1A72536, Power Combiner 1A72537 and 250W
RF Power Amplifier 1A69783 (procedure for Power Modulation Amplifier 1A72534 is
given in 4.1.1.3).
4-1
HA72500
SECTION 4
b. Remove the fixing screws and withdraw the unit.
CAUTION
When disconnecting the flexible semirigid coaxial cables, do not strain

the cables more than is necessary to permit removal of the unit being
serviced. If straining of these cables is necessary, do so evenly along the
length of each cable, and avoid straining the cable close to the
connectors, as fatigue failure may result.
4.1.1.6
Switched Attenuator 1A69737

b. Remove the two fixing screws, and withdraw the unit.
4.1.1.7
CTU Front Panel PWB Assembly 1A72553

b. Remove the CTU Processor PWB Assembly 1A72552, and the RMS Interface
PWB Assembly 1A72555, following the procedure described in Section 4.1.1.2.
c. Remove the six fixing screws for the front panel. The CTU front panel and CTU
front panel PWB assembly can then be lifted away separately from the CTU
module chassis.
4.1.1.8
DC-DC Converter PWB Assembly 1A72542
a. Hinge open the front panel of the 1kW Power Supply Frame 1A72503.
b. Disconnect all external connectors to the DC-DC converter.
c. Remove the four screws which fasten the large heatsinks to the 1kW PA power
supply frame. The DC-DC converter complete with the two large heatsinks can
then be lifted away.
d. Remove the three screws which fasten each heatsink to the DC-DC converter,
and remove the heatsinks.
4.1.1.9
Preselector Filter 1A72546 and Directional Coupler 1A/2A69755

b. Remove the four fixing screws, and withdraw the unit.
4.1.1.10
Control Card, AC Power Supply 3A71130
a. Remove the front panel to give access to the AC power supply.

b. Withdraw the control card from the power supply. It is a plug-in card, located
approximately centrally.
4.1.2
Fault Location
This section describes the various methods that may be used for troubleshooting should
a fault occur in an LDB102 DME. The first section gives guidance of a general nature, to
outline the various facilities available to assist fault location. The second section gives
detailed instructions for signal tracing within the DME equipment.
4.1.2.1
General Troubleshooting Guidance
Should a DME beacon develop a fault, it is best serviced by replacing the defective
module, or subassembly, with an operational unit. These replaceable assemblies are
called line-replaceable units (LRUs).
4-2
HA72500
SECTION 4
The following guidance information is given to assist technical personnel locate a

defective LRU after a DME beacon has shut down or registered a fault. The facilities
discussed below may be used either individually or in combination to isolate the
defective unit.
a. System Block Diagrams
Two levels of block diagram are included in the DME handbook to show the
signal flow through the equipment. These are:
1. System Block Diagrams:
Single
Dual
Test Facility
see Figure 2-1.

see Figure 2-2.
see Figure K-2.
2. Signal Flow Block Diagram; see Figure 4-1.

This last drawing indicates the divisions between modules and subassemblies,
and the signal flow between then. It eases the task of tracing a signal through a
particular subsystem for fault location purposes.
b. Test Facility
The test facility, which is part of the CTU, allows rapid measurement of the main
beacon parameters and internal signal levels. During troubleshooting, the
parameter values and signal voltage levels may be compared with the values
recorded at station commissioning. In many cases, this will isolate a fault to a
specific module.
Refer to Appendix A, Section A.3, for operating instructions of the Test Facility.
c. Front Panel Test Jacks
Each of the transponder modules has a number of front panel test jacks to allow
rapid checking of significant signals and voltages. In most cases, the information
available from the test jacks is sufficient to determine if a module is functioning
correctly.
Section 4.2 lists the test point signal waveforms and voltages that should be
present in a normally functioning DME rack. Comparison of these signals with
those measured on the equipment under test will help isolate a faulty unit.
d. Alarm Register
The CTU includes a group of indicators to show the alarms that were present
when a transponder transfer shutdown occurred. When technical personnel visit
a DME which has shut down due to a fault, the alarm register should be
examined before switching on the beacon again. The alarms indicated will show
which parameters were out of tolerance, and this often suggests which
subsystem is at fault.
In a dual DME, the alarm register can be accessed to show the faults associated
with each transponder. This is explained in Appendix A.3.
4-3
HA72500
Figure 4-1
4.1.2.2
SECTION 4
Signal Flow Block Diagram
Fault Finding Procedures
In the event of a failure in the LDB-102 DME beacon, the adoption of the following
procedures will help isolate the fault to a particular area, so that replacement of the
appropriate line-replaceable unit (LRU) can restore operation of the equipment with
minimum interruption to service.
4-4
HA72500
SECTION 4
These procedures trace the signal firstly through the interrogation and receiver chain,
and then through the transmitter chain. The test interrogator is used as a source of test
signals for the transponder, and it is essential to obtain interrogations at the correct level
from the test interrogator in order to check operation of the receiver and video signal
processing.
Test jacks are provided on the module front panels to facilitate troubleshooting. The
typical waveforms measured on these test points are given in Section 4.2. Reference is
made to these waveforms during the signal tracing procedures.
4.1.2.2.1
Conditions for Tests
1. Operate the equipment in the MAINTENANCE mode, as described in Appendix

A.1 for a single DME, and A.2 for a dual DME.
2. For a dual DME, the defective transponder will be operated as the standby. On
the RF panel at the rear of the rack, connect the test interrogator of the standby
transponder to the second directional coupler, so that it can be used to
interrogate the standby transponder. This is described in Appendix A.2.5.1.
3. On the standby monitor of a dual DME, switch the MONITOR OUTPUTS switch
to the FAILED position (this takes the monitor 'off-line').
4. On the CTU, select MONITOR ALARM to INHIBIT. For a single DME, press
the SELECT MAIN, NO 1 switch. For a dual DME, press the SELECT MAIN,
NO 1 or NO 2 switch for the transponder that will be operating normally (for
example, if transponder 2 is under investigation, then select NO 1 as the
operating transponder so that transponder 2 becomes the standby).
5. On the transponder power supply, switch TRANSPONDER DC POWER to ON.
6. On the CTU, select Hi Eff (High Level Efficiency) measurement to set the
interrogation level to -70 dBm.
4.1.2.2.2
Interrogation and Receiver Chain
With the DME operating in the MAINTENANCE mode, perform the following check
sequence:
1.
Trigger the oscilloscope from the TRIGGER test jack on the test interrogator
Failure of the oscilloscope to trigger reveals the absence of a signal from the
test interrogator module.
In this case, either the test interrogator main board, or the complete test
interrogator module (equipped with the appropriate crystals and tuned to the
correct frequency) should be replaced.
2.
Set the oscilloscope sensitivity to 1 volt/division and the timebase to 5

microseconds/division, and check the waveform at the DETECTED
INTERROGATIONS test jack on the test interrogator. Compare the displayed
waveform with that in Waveform 17.
If the displayed waveform is significantly different to the reference waveform,
a failure in the test interrogator is indicated; either the entire module, or
separate LRUs, should be replaced.
3.
Set the oscilloscope to 1 volt/division and 10 microseconds/division, and

check the waveform at the DETECTED LOG VIDEO test jack on the receiver
video. Compare the displayed waveform with that in Waveform 37.
4-5
HA72500
SECTION 4
If the waveforms are significantly different, malfunction of the receiver video is
indicated. Either the entire module, or separate LRU, should be replaced with
appropriate assemblies tuned to the correct frequency.
4.
If, after replacement of the module or circuit board assemblies, the correct
waveform is still not obtained, consult Figure 4-1 to identify the block circuitry
in the failed signal path.
5.
Set the oscilloscope to 0.5 volts/division and 5 microseconds/division. On the

CTU, select Effncy measurement, to cause the interrogations to switch
between high and low level. With only one oscilloscope channel displayed,
observe the waveform on the DETECTED LOG VIDEO test jack and
compare it with that in Waveform 37.
If the displayed waveform does not show the two discrete pulse amplitude
levels, malfunction of the level switching in the test interrogator is indicated.
Replace either the complete test interrogator, or the main board assembly
and switched attenuator LRUs.
6.
Display the waveforms at the DETECTED LOG VIDEO and ON CHANNEL

VIDEO test jacks. Compare the displayed waveform with those shown in
Waveform 36.
7.
Similarly, display the waveform at the DOUBLE PULSE DECODER OUT test
jack and compare with that in Waveform 33.
8.
Reset the oscilloscope to 10 microseconds/division and check that the

waveform at the TRIGS TO MODULATOR test jack is similar to that in
Waveform 35.
Failure to obtain waveforms as above indicates a receiver video malfunction
requiring replacement of the module or subassemblies.
9.
4.1.2.2.3
Check the waveform at the DETECTED REPLIES test jack on the test
interrogator and compare it with that in Waveform 16. Absence of pulses
indicates a malfunction in the transmission chain.
Transmitter Chain
The major symptom of transmitter faults will be shown on the CTU as a low output power
reading. Transmitter chain faults can be isolated and corrected by the following
sequence; the waveforms referred to in the test sequence are shown in Section 4.2.
The performance requirements of each step must be met before the next step in the
sequence is commenced; the sequence need only be performed far enough to correct
the fault.
When the transmitter output power has been restored to the correct level (either by
adjustment/s or module replacement) perform the routine alignment and performance
tests on the transmitted pulse power and pulse shape, making adjustments as
necessary. The pulse shape of a correctly adjusted transmitter is shown in Waveform 16
and 67.
1.
At the HT OUT test jack on the front panel of the transponder power supply,
check that the DC supply to the RF amplifier is within the range 49.5 to 50.5
volts.
This voltage is supplied by the DC-DC converter. If this voltage is only slightly
out of tolerance, it may be corrected by adjustment of the converter output
voltage control R112 (located under the cover of the metal box housing the
regulator board).
4-6
HA72500
SECTION 4
If this voltage is more than 3 volts out of range, then replace the DC-DC
converter in the 1kW PA power supply.
2.
Trigger the oscilloscope from the TRIGS TO MODULATOR test jack on the
receiver video. Display the waveform at the SHAPED MODULATION test
jack on the transmitter driver, and compare the displayed waveform with that
shown in Waveform 51. Check that the pulse amplitude is within the normal
amplitude range stated against Waveform 51; the 1kW PA power supply must
be within limits for this pulse to be correct.
If the amplitude exceeds this range, and there is low (or zero) output from the
transmitter, then it is probably due to the automatic level control (ALC) trying
to correct the low output condition. If this pulse is absent, or significantly
below the stated range, then it indicates a fault on the pulse shaper board,
which should be replaced.
3.
Display the waveform at the DRIVER LEVEL test jack on the transmitter
driver. If the drive waveform amplitude is within the limits stated against
Waveform 52, then it indicates that the transmitter driver is satisfactory and is
providing drive to the RF power amplifier. Proceed to step 9 to continue the
signal tracing.
If the waveform amplitude is below the limits stated, then check the
performance of the transmitter driver units, as detailed in steps4 to 8.
4.
Extend the transmitter driver using the transponder extender frame. Switch
on power to the transponder, switch DRIVER DC POWER to NORMAL, and
check that the following supply voltages are within the limits stated:
Test Point
Limits (volts DC)
Transponder power supply
+15 V
+18V
HT
15.0 0.5
18.0 1.0
42.0 1.0
Transmitter driver
+15 V
15.0 0.5
Pulse shaper board
XT10
XT4
XT7
XT9
XT5
16.3 1.0
11 to 15, rectangular pulse
20 to 32
25 to 35
28 to 37
If any of these voltages are out of tolerance, then replacement of the transponder power
supply or pulse shaper board may be necessary. For alignment of the pulse shaper
board, refer to Section 3.2.7.
5.
Remove the cover from the exciter unit and clip the current probe around the
wire loop supplying current to the collectors of transistors V5 and V6. Check
that the collector current waveform is within the limits stated against
Waveform 54.
If the waveform is low in amplitude, check firstly that the input drive from the
receiver video is correct, as described in Section 3.2.6, then check the
alignment of the exciter as described in Section 3.2.7. If this fails to correct
the current waveform, then replace the exciter board.
6.
Remove the cover from the medium power driver and clip the current probe
around the wire supplying collector current to the RF amplifier subassembly.
Check that the collector current waveform is within the limits stated against
Waveform 55.
4-7
HA72500
SECTION 4
If the waveform is low in amplitude, then it indicates either insufficient drive,
from the exciter, or a fault in the medium power driver itself. Replace each
subassembly in turn to determine the defective unit.
7.
Remove the cover from the power modulation amplifier and clip the current
probe around the wire supplying collector current to the RF amplifier
subassembly. Check that the collector current waveform is within the limits
stated against Waveform 56.
If the waveform is low in amplitude, then it indicates either insufficient drive
from the medium power driver, or a fault in the power modulation amplifier
itself. Replace each subassembly in turn to determine the defective unit.
8.
If any units have been replaced or adjusted, repeat the check described in
Step 3 above. If the waveform amplitude is now within the stated limits, then
replace the covers on the units in the transmitter driver, then replace the
module in the rack.
9.
On the 1kW RF amplifier, display the waveform from the POWER AMP
MODULATOR test jack and check that it is within the limits stated against
Waveform 60.
If the waveform is low in amplitude, and if it has been previously determined
that the RF drive and the modulation to the 1kW RF amplifier are correct,
then a fault in the 1kW power modulation amplifier is indicated. Remove the
cover from the 1kW RF amplifier and replace the power modulation amplifier.
10.
DRIVER test jack and check that it is within the limits stated against
Waveform 62.
If the waveform is low in amplitude, then a fault in the 1kW amplifier driver
stage is indicated; this function is provided by the 250W amplifier units A1
and A2, in the 1kW RF amplifier. Remove the cover from the 1kW RF
amplifier and determine the defective unit by checking the collector current of
each driver stage. Clip the current probe around the red supply lead,
connecting to the amplifier module, and check the waveform amplitude with
the limits stated against Waveform 66. A low amplitude collector current
indicates the defective unit, which should be replaced.
11.
OUTPUT test jack and check that it is within the limits stated against
Waveform 61.
If the waveform is low in amplitude, a defective power output stage is
indicated, and the particular unit may be isolated by the procedure below.
Remove the cover from the 1kW RF amplifier and clip the current probe, in
turn, around the red supply lead to each of the amplifiers A3 to A10. Display
the current waveform and check that it is within the limits stated against
Waveform 64. There may be considerable variation in the current amplitude
for the individual power amplifiers A3 to A10, but a defective unit is usually
indicated by a current much lower than the others. Any defective units should
be replaced.
This completes the signal tracing troubleshooting procedures. If any module or

subassembly has been replaced during these procedures, then perform the
relevant LRU Post- Replacement Tests, as listed in Section 4.1.3.
4-8
HA72500
4.1.3
SECTION 4
LRU Post-Replacement Tests
This section details the tests and/or adjustments required to be made to an operational
beacon following the replacement of any module or subassembly. The information is
presented in tabular form, and:
a. contains a brief statement of the parameter or performance function required to
be checked, or adjustments required to be made, as applicable, in sequence
user order; and also
b. cites the relevant section of this handbook in which the detailed procedure for the
required check, measurement, or adjustment may be found.
If any module or subassembly is replaced during servicing, then the procedure listed for
that unit MUST be performed to restore the beacon to operational status. It is implicit
that all other units in the beacon are in normal working order.
Table 4-1
LRU Post-Replacement Tests
MODULE OR
SUBASSEMBLY
1A69737
Attenuator
PARAMETER TO BE CHECKED or ADJUSTMENT TO

BE MADE
REFER to
SECTION
High and low switching of interrogations
3.2.4.13.2
1A69755
2A69755
Directional Coupler
1
2
3
Final receiver checks

Calibrate
Final check
3.2.4.13.2
3.2.4.10.5
3.2.4.18
1A69873
250W RF Amplifier
Check Transmitter Pulse Parameters
2
3
4
(if pulse parameters out of tolerance, then perform output

pulse alignment)
Transponder delay
Final check
3.2.4.10.1
to
3.2.4.10.4
(3.2.4.9)
3A71130
AC Power Supply or
Control Card for AC
Power Supply
1
2
3
4
5
Printed wiring board link settings

Powering rack
High voltage adjust
Low voltage alarm adjust
DC supply adjustment
3.3.3.11
3.2.4.3
3.2.4.16.5
3.2.4.16.6
3.2.4.16.8
1A72510
Monitor Module
Set internal preset switches for station fault limits
2
3
4
Calibrate Peak Power Monitor

Check Monitor fault limits and fault indications
Final check
3.2.4.2.8 or
Appendix A.5.3
3.2.4.15.6
3.2.4.15
3.2.4.18
1A72511
Monitor Main PWB
3.2.4.13
3.2.4.18
Perform all checks listed for Monitor Module, 1A72510
1A72512
Peak Power Monitor
1
2
Check signal amplitude at Monitor ERP MONITOR test jack

Calibrate peak power monitor
4.2 Waveform 1
3.2.4.15.6
1A72514
Test Interrogator
Module
1
2
3
3.2.4.1.2
5
6
7
8
9
Install crystals for interrogate frequencies

Set internal preset switch S4 for X or Y channel
Set front panel switches REPLY GATE DELAY to settings
recorded for the station
Align RF Generator for operation at the station frequency (if
not pre-aligned)
Check RF Generator crystal frequencies
Check RF Generator output pulse amplitude and shape
Check RF Generator test frequencies
Check signal timing parameters
Set REPLY ACCEPT GATES
10
11
Check high and low level switching of interrogations

Final check
3.2.5
3.2.4.4.5
3.2.4.4.1~2
3.2.4.4.3
3.2.4.4.6
3.2.4.11.2
steps 2 to 5
3.2.4.13.2
3.2.4.18
4-9
HA72500
SECTION 4
MODULE OR
SUBASSEMBLY
1A72515
Test Interrogator
Main PWB

BE MADE
1
2
REFER to
SECTION
3
4
5
Set preset switch S4 for X or Y channel

Set front panel switches REPLY GATE delay to setting
recorded for the station
Set REPLY ACCEPT GATES
6
7
Check high and low level switching of interrogations

Final check
3.2.4.4.1~2
3.2.4.4.6
3.2.4.11.2
steps 2 to 5
3.2.4.13.2
3.2.4.18
1A72516
RF Generator
1
2
3
4
5
6
Install crystals for interrogate frequencies

Align RF Generator
Check RF Generator crystal frequencies
Check test frequencies
Final check
3.2.4.1.2
3.2.5
3.2.4.4.5
3.2.4.4.1~2
3.2.4.4.3
3.2.4.18
1A72517
RF Filter
Align RF Filter
Check receiver video module RF levels
3.2.6
steps11~13
3.2.4.5
steps 4~5
1A72518
Modulator and
Detector
3.2.4.4.1~2
2
3
Check and adjust RF Generator output pulse amplitude and

shape
Final check
1A72519
Reply Detector
Check detector coincidence
2
3
Calibrate peak power display

Check Reply Delay measurement. (This should be within
0.1 microseconds of the normal value for the station)
Check pulse shape measurement
Final check
3.2.4.4.6
step 3
3.2.4.10.5
3.2.4.13.1
4
5
1A72520
Receiver Video
Module
1
2
3
4
8
9
Install crystal for reply frequency

Set internal switches S4 and S5 for X or Y channel
Set code switches for station ident code
Select SDES and LDES OFF or ON as required for the
station
Set internal DEAD TIME and LDES PERIOD switches to
standard setting of 6, or to setting recorded for the station
Set front panel BEACON DELAY and SPACING
(SEPARATION) switches to settings recorded for the
station
Align RF source for operation of the station frequency (if not
pre-aligned)
Check RF source crystal frequency and check RF level
Align RF Filter
10
11
12
Adjust 6 dB offset
Set ON-CHANNEL threshold
Check receiver sensitivity
13
14
15
16
17
18
19
20
21
22
23
Check receiver bandwidth

Check receiver selectivity
Check decoding window
Check reply rate
Set dead time
Set LDES threshold (if LDES is used)
Check SDES (if used)
Check station ident code
Set reply delay
Perform final receiver checks
Final check
5
6
7
3.2.4.4.6
3.2.4.18
3.2.4.15.9
3.2.4.18
3.2.4.1.2
3.2.4.2.4
3.2.4.2.4
3.2.6
3.2.4.5
3.2.6
steps11~13
3.2.4.7
3.2.4.11.1
3.2.4.11
steps 2~3
3.2.4.11.4
3.2.4.11.5
3.2.4.11.6
3.2.4.11.8
3.2.4.11.9
3.2.4.12.1
3.2.4.12.2
3.2.4.14.1
3.2.4.13.1
3.2.4.13.2
3.2.4.18
4-10
HA72500
SECTION 4
MODULE OR
SUBASSEMBLY
1A72521
Receiver Video Main
PWB

BE MADE
REFER to
SECTION
3.2.4.2.4
3.2.4.2.4
6
7
Set internal switches S4 and S5 for X or Y channel

Set code switches for station ident code
Select SDES and LDES OFF or ON as required for the
station
Set internal DEAD TIME and LDES PERIOD switches to
standard setting of 6, or to setting recorded for the station
Set front panel BEACON DELAY and SPACING
(SEPARATION) switches to settings recorded for the
station
Adjust 6 dB offset
8
9
10
11
12
13
14
15

Check reply rate
Set dead time
Set LDES THRESHOLD (if LDES is used)
Check SDES (if used)
Check station ident code
Set Reply Delay
Final check
1
2
3
4
5
Install crystal for reply frequency

Align RF Source for operation at the station frequency (if
not pre-aligned)
Check RF source crystal frequency and check RF level
Final check
1
2
3
4
5
Set AGC link XN2 to AGC position

Align IF amplifier (if not pre-aligned)
Set ON-CHANNEL threshold
Adjust 6 dB offset
6
7
8
9
10
11
12
Check receiver bandwidth

Check receiver selectivity
Check CW protection
Set reply delay
Perform final receiver checks
Final check
Check RF output level
2
3
4
Check tuning of Preselector Filter

Final check
Check the HT voltage and adjust if necessary
2
3
Check regulated supply voltages, +15 volts and +18 volts

Final check
1
2
3
4
5
1A72522
RF Source
1A72523
IF Amplifier
1A72524
RF Amplifier
1A72525
Transponder Power
Supply
1A72526
Transponder Power
Supply Main PWB
3.2.4.7
3.2.4.11
steps 2~3
3.2.4.11.6
3.2.4.11.8
3.2.4.11.9
3.2.4.12.1
3.2.4.12.2
3.2.4.14.1
3.2.4.13.1
3.2.4.18
3.2.4.1.2
3.2.6
3.2.4.5
3.2.4.11.3
3.2.4.18
3.2.9
3.2.4.11.1
3.2.4.7
3.2.4.11
steps 2~3
3.2.4.11.4
3.2.4.11.5
3.2.4.11.6
3.2.4.11.7
3.2.4.13.1
3.2.4.13.2
3.2.4.18
3.2.4.5
steps 4~5
3.2.4.6
3.2.4.11.3
3.2.4.18
3.2.4.8
steps 4~7
3.2.4.6
3.2.4.18
Perform all checks listed for Transponder Power Supply

Module, 1A72525
4-11
HA72500
SECTION 4
MODULE OR
SUBASSEMBLY
1A72530
Transmitter Driver

BE MADE
REFER to
SECTION
3.2.4.2.5
3.2.7
4
5
6
Set internal switches to alignment positions

Align Transmitter Driver for operation at the station
frequency (if not pre-aligned)
Adjust Transmitter Driver for correct drive to RF Power
Amplifier
Align Transmitter output pulse
Adjust ALC for correct power out
Check Transmitter output pulse amplitude and shape
Final check
1
2
3.2.4.2.5
3.2.8
5
6
7
8
Set PWB switches to alignment positions

Align function generator for nominal pulse shape (if not prealigned)
Amplifier.
Note: This is necessary only if PWB has never been
aligned.
Amplifier
Align Transmitter output pulse
Final check
Set Pulse Shaper Board switches to alignment positions
Set Exciter supply voltages to initial values
Align Exciter
Adjust drive to Medium Power Driver
5
6

Final check
3.2.7.1
step 3
3.2.7.1
steps 1~2 then
steps 5~10
3.2.7.2
steps 1~5
3.2.7.2
step 6
3.2.4.9.2
3.2.4.10
steps 1~4
3.2.4.18
Set supply voltage to Medium Power Driver
Adjust drive to Power Modulation Amplifier
4
5

Final check
A
1
FOR POWER MODULATION AMPLIFIER IN

TRANSMITTER DRIVER MODULE.
Set supply voltage to Power Modulation Amplifier
Adjust drive to the Power Modulation Amplifier
4
5
6
Adjust drive to the RF Power Amplifier

Final check
1
2
3
1A72531
Pulse Shaper PWB
Assembly
1A72532
Exciter
1A72533
Medium Power
Driver
1A72534
Power Modulation
Amplifier
3.2.4.8
3.2.4.9.1
3.2.4.9.2
3.2.4.10
steps 1~4
3.2.4.18
3.2.7
3.2.4.8
3.2.4.9.1
3.2.4.9.2
3.2.4.10
steps 1~4
3.2.4.18
3.2.7.1
step 3
3.2.7.1
steps 1, 2, 10
3.2.7.2
steps 7~8
3.2.4.9.2
3.2.4.10
steps 1~4
3.2.4.18
3.2.7.1
step 3
3.2.7.1
steps 1, 2, 10.
3.2.7.2
steps 7~8
3.2.4.8
3.2.4.9.2
3.2.4.10
steps 1~4
3.2.4.18
4-12
HA72500
SECTION 4
MODULE OR
SUBASSEMBLY

BE MADE
B
REFER to
SECTION
2
3
4
FOR POWER MODULATION AMPLIFIER IN 1kW

POWER AMPLIFIER.
Adjust Transmitter Driver for correct drive to 1kW Power
Amplifier.
Align transmitter output pulse.
Adjust ALC for correct power out.
Check Transmitter output pulse amplitude and shape.
Final check.
1
2
3
4
Adjust Transmitter Driver for correct drive to 1 kW PA.

Align 1 kW Power Amplifier.
Check transmitter output pulse amplitude and shape.
Final check.
Prepare Transmitter Driver for 1 kW PA alignment.
2
3

Check transmitter output pulse amplitude and shape.
Final check.
1A72537
Power Combiner
Perform all checks listed for Power Divider, 1A72536.
1A72540
1 kW PA Power
Supply
Check power switching to 1kW Power Amplifier.
2
3
Check LED indicators.

Check voltage at HT test jack and adjust if necessary.
4
5
6
Check Transmitter output power.

Check 1kW PA detected signals at front panel test jacks
(confirm that these are unchanged from normal station
values).
Final check.
Check power switching to 1kW Power Amplifier.
2
3
4
Check LED indicators.

Check 1 kW PA detected signals at front panel test jacks
values).
Check 1 kW PA detected signals at front panel test jacks
values)
Final check.
Check voltage at HT test jack and adjust if necessary.
2
3

Final check
1
2
Tune Preselector Filter to station frequency

Final check
3.2.4.6
3.2.4.11
steps 2~3
3.2.4.18
1
2
Perform rack powering sequence

Final check
3.2.4.3
3.2.4.18
1A72535
1kW Power Amplifier
1A72536
Power Divider
1A72541
Control and Status
PWB
1A72542
DC-DC Converter
1A72546
Preselector Filter
1A72549
2A72549
Power Distribution
Panel
3.2.4.8
3.2.4.9.1
3.2.4.9.2|
3.2.4.10
steps 1 to 4
3.2.4.18
3.2.4.8.1
3.2.4.9.1
3.2.4.9.2
3.2.4.10
steps 1 to 4
3.2.4.8.1
steps 1 to 9
3.2.4.9.2
3.2.4.10
steps 1 to 4
3.2.4.18
4.9.1
steps 4, 5
3.2.4.9.1
steps 4, 5
3.2.4.10.2
4.2
3.2.4.18
4.9.1
steps 4, 5
3.2.4.10.2
3.2.4.10.2
4.2
3.2.4.18
3.2.4.9.1
steps 4,5
3.2.4.10.2
3.2.4.18
4-13
HA72500
SECTION 4
MODULE OR
SUBASSEMBLY
1A72550
Control and Test
Unit

BE MADE
REFER to
SECTION
1
2
3
4
Set configuration and offset switches S1 and S2

Adjust low voltage shutdown level
Set power-on inhibit delay S11
Adjust ident volume and set external ident level (if

applicable)
3.2.4.2.3
3.2.4.3
3.2.4.16.7
Appendix
A.5.1.6
Appendix
A.3.2.14
SINGLE DME
6
Check control system action for:

a. Normal operation
b. Primary Fault
c. Secondary Fault
d. Recycle
DUAL DME
8
9
10
1A72552
Control and Test
Unit Processor PWB
1A72553
CTU Front Panel
PWB
1A72555
RCMS Interface
PWB
Confirm correct operation of remote control and status

indications at remote site
Final check
3.2.4.16.1
3.2.4.16.2
3.2.4.16.3
3.2.4.16.4
3.2.4.16
Part 2
3.2.4.16.1
3.2.4.16.2
3.2.4.16.3
3.2.4.16.4
3.2.4.16.5
3.2.4.16.6
3.2.4.16.7
Appendix A
3.1.2
3.2.4.18
Perform all checks listed for Control and Test Unit 1A72550
1
2

Confirm correct operation of each front panel switch and
LED (functional check only)
Final check
1
2

Final check
3
1A72557
External I/O PWB
Check control system action for:

a. Normal operation, No. 1 Main
b. Primary fault
c. Secondary fault
d. Normal operation, No. 2 Main
e. Primary fault
f. Secondary fault
g. Recycle
Check Test Unit operation
3.2.4.16,
Part 1
1
2
3
4

Check operation of external ident interface (if used)
Confirm correct indications on CTU from AC Power
Supplies
Final check
3.2.4.3
3.2.4.16
Part 1, Single
Part 2, Dual
3.2.4.18
3.2.4.3
3.2.4.18
3.2.4.14.2 &
3.2.4.14.3
3.2.4.18
4-14
HA72500
4.2
SECTION 4
WAVEFORMS
WAVEFORM 1
S
E
T
T
I
N
G
S
Monitor
Trigger from:
Test Interrogator TRIGGER jack
Timebase:
5 microseconds/division Channel 2
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Monitor ERP PULSE jack
Typical value:
3.5 to 10 volts
Included reference
waveforms:
None
Conditions:
Beacon in normal operation
WAVEFORM 2
Monitor
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
1 microsecond/division Channel 1
(lower trace)
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Monitor test point XT3
Typical value:
5 volts logic levels
Included reference
waveforms:
Test Interrogator DETECTED

REPLIES jack (upper trace)
Conditions:
WAVEFORM 3
Monitor
S
E
T
T
I
N
G
S
Trigger from:
ERP PULSE XA1
RISE PULSE XT3
10 MHz CLOCK XT4
Channel 1
Timebase:
100 nanoseconds/division
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Monitor 10 MHz CLOCK test point

XT4
Typical value:
5 volts logic level
Included reference
waveforms:
None
Conditions:
4-15
HA72500
WAVEFORM 4
S
E
T
T
I
N
G
S
SECTION 4
Monitor
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division Channel 1
Connect to:
Channel 1 DELAY COUNT test point

XT5 (upper)
Channel 2 DELAY PULSE test point
XT6 (lower)
Typical value:
A correctly aligned delay monitor will

have the failing edge of trace 2
occurring during second pulse of
trace 1.
Included reference
waveforms:
None
Conditions:
WAVEFORM 5
Monitor
Trigger from:
S
E
T
T
I
N
G
S
2 microseconds/division
Mode:
DC
Sensitivity:
Connect to:
Monitor WIDTH COUNT test point

XT7
Monitor WIDTH PULSE test point
XT11
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 6
Monitor
S
E
T
T
I
N
G
S
WIDTH COUNT XT7

WIDTH PULSE XT11
Timebase:
Trigger from:
DELAY COUNT XT5

DELAY PULSE XT6
SPACING PULSE XT8

SPACING COUNT XT14
Timebase:
Mode:
DC
Sensitivity:
2 volts/division both channels
Connect to:
Monitor SPACING COUNT test point

XT14
Monitor SPACING PULSE test point
XT8
Typical value:
Included reference
waveforms:
None
Conditions:
4-16
HA72500
WAVEFORM 7
S
E
T
T
I
N
G
S
SECTION 4
Monitor
Trigger from:

Channel 2
Timebase:
0.5 microseconds/division
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Monitor TIPRF test point XT9
Typical value:
5 volts logic level
Included reference
waveforms:
Conditions:
WAVEFORM 8
Monitor
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Monitor FALL PULSE test point XT10
Typical value:
Included reference
waveforms:

REPLIES jack
Conditions:
WAVEFORM 9
Monitor
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
1 microsecond/division
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Monitor WIDTH PULSE test point

XT11 (Channel 2)
Typical value:
Included reference
waveforms:

REPLIES jack
Conditions:
TIPRF XT9
FALL PULSE XT10
Monitor WIDTH PULSE XT11
4-17
HA72500
WAVEFORM 10
S
E
T
T
I
N
G
S
SECTION 4
Monitor
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Monitor RISE COUNT test point XT15

Channel 1 (upper trace)
Monitor RISE PULSE test point XT3
Channel 2 (lower trace)
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 11
Monitor
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Monitor FALL COUNT test point

XT16 (upper)
Monitor FALL PULSE test point XT10
(lower)
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 12
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Channel 1 on oscilloscope
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
RISE PULSE XT3

RISE COUNT XT15
FALL PULSE XT10

FALL COUNT XT16
TRIGGER XA1
Typical value:
+5 volts logic levels
Included reference
waveforms:
None
Conditions:
4-18
HA72500
WAVEFORM 13
S
E
T
T
I
N
G
S
SECTION 4
Test Interrogator
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Receiver Video LDES PULSE jack
Typical value:
Included reference
waveforms:
Test Interrogator INTERROGATIONS

TIMING jack Channel 2
Conditions:
1. LDES switch ON
2. Beacon in normal operation
WAVEFORM 14
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
REPLY ACCEPT GATES XA3
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Test Interrogator REPLY ACCEPT

GATES jack
Typical value:
Included reference
waveforms:

REPLIES test jack
Conditions:
WAVEFORM 15
Test Interrogator
S
E
T
T
I
N
G
S
LDES PULSE XA2
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Test Interrogator 1 s MARKERS

jack
Typical value:
Included reference
waveforms:
Conditions:
1 s MARKERS XA4
4-19
HA72500
WAVEFORM 16
S
E
T
T
I
N
G
S
SECTION 4
Test Interrogator
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
DETECTED REPLIES jack
Typical value:
3.5 to 10 volts
Included reference
waveforms:
GND Channel 2
Conditions:
WAVEFORM 17
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:

INTERROGATIONS jack
Typical value:
3.8 to 6.9 volts
Included reference
waveforms:
Conditions:
WAVEFORM 18
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
15 volts/division
Connect to:
Test Interrogator INTERROGATION

TIMING jack
Typical value:
Included reference
waveforms:

INTERROGATIONS jack Channel 1
Conditions:
DETECTED REPLIES XA7
DETECTED INTERROGATIONS XA8
INTERROGATION TIMING XA11
4-20
HA72500
WAVEFORM 19
S
E
T
T
I
N
G
S
SECTION 4
Test Interrogator
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:

REPLIES jack
Typical value:
Included reference
waveforms:

REPLIES jack
Conditions:
WAVEFORM 20
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
(lower trace)
Mode:
DC
Sensitivity:
5 volts/division
Connect to:

TIMING jack
Typical value:
Included reference
waveforms:
Test Interrogator REPLY TIMING jack

Channel 2
Conditions:
WAVEFORM 21
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
DC Test Interrogator test point XT1
Typical value:
Included reference
waveforms:
None
Conditions:
1. Beacon in Maintenance Mode

2. Select Channel 1
3. Select FLT LIMIT
4. Select TX RATE
REPLY TIMING XA12
REPLY TIMING XA1

INTERROGATIONS TIMING XA13
M FLT REPLY XT1
4-21
HA72500
WAVEFORM 22
S
E
T
T
I
N
G
S
SECTION 4
Test Interrogator
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
COUNTER test point XT2 Channel 1
Typical value:
Included reference
waveforms:
None
Conditions:

2. Select Channel 1
3. Select PARAM
4. Select TX RATE
WAVEFORM 23
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Test Interrogator test point XT3
Typical value:
Included reference
waveforms:
None
Conditions:

2. Select Channel 1
3. Select FLT LIMIT
4. Select TX RATE
WAVEFORM 24
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
1 volts/division
Connect to:
Typical value:
Included reference
waveforms:
None
Conditions:

2. Select Channel 1
3. Select FLT LIMIT
4. Select TX RATE
COUNTER XT2
M FLT SPACING XT3
M FLT T PRF XT4
4-22
HA72500
WAVEFORM 25
S
E
T
T
I
N
G
S
SECTION 4
Test Interrogator
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
0.5 volts/division
Connect to:
MICROSECOND MARKERS XT6
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 26
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Test Interrogator TIMER test point

XT7
Typical value:
Included reference
waveforms:
None
Conditions:

2. Select Ch 1 on CTU Param, NEXT,
NEXT, Width
WAVEFORM 27
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
1 microsecond/division
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Test Interrogator TIPRF test point

XT8 100 Hz
Typical value:
Included reference
waveforms:
Channel 2 Test Interrogator

TRIGGER jack
Conditions:
TIMER XT7
TIPRF 100Hz XT8
4-23
HA72500
WAVEFORM 28
S
E
T
T
I
N
G
S
SECTION 4
Test Interrogator
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Typical value:
Included reference
waveforms:
None
Conditions:
1. Maintenance Mode
2. Select Channel 1
3. Select FLT LIMIT Select DELAY
WAVEFORM 29
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
Channel 1 to XT10
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Typical value:
5 volt logic levels
Included reference
waveforms:
None
Conditions:
WAVEFORM 30
Test Interrogator
S
E
T
T
I
N
G
S
Trigger from:
M FLT DELAY XT9
ATTENUATOR XT10
1 MHz 15V XT11
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Typical value:
Included reference
waveforms:
None
Conditions:
4-24
HA72500
WAVEFORM 31
S
E
T
T
I
N
G
S
SECTION 4
Test Interrogator
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 32
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Channel 2 (lower trace)
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Receiver Video SDES jack
Typical value:
Included reference
waveforms:

INTERROGATIONS jack
Conditions:
WAVEFORM 33
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Receiver Video DOUBLE PULSE

DECODER OUT jack
Typical value:
Included reference
waveforms:
Receiver Video DETECTED LOG

VIDEO jack
Conditions:
10 MHz 15V XT12
SDES PULSE XA1
DOUBLE PULSE DECODER OUT XA3
4-25
HA72500
WAVEFORM 34
S
E
T
T
I
N
G
S
SECTION 4
Receiver Video
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Receiver Video DEAD TIME jack
Typical value:
Included reference
waveforms:
Test Interrogator INTERROGATION

TIMING jack Channel 2
Conditions:
WAVEFORM 35
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Receiver Video TRIGS TO

MODULATOR jack
Typical value:
Included reference
waveforms:

TIMING jack
Conditions:
WAVEFORM 36
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
DEAD TIME XA4
TRIGS TO MODULATOR XA5
ON CHANNEL VIDEO XA11
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Receiver Video ON CHANNEL

VIDEO jack
Typical value:
0.5 volts DC, 4 volts peak
Included reference
waveforms:

VIDEO jack
Conditions:
4-26
HA72500
WAVEFORM 37
S
E
T
T
I
N
G
S
SECTION 4
Receiver Video
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
0.5 volts/division
Connect to:

VIDEO jack
DETECTED LOG VIDEO XA13
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 38
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:

DECODER jack
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Channel 1 to XT1
Channel 2 to XA3
Typical value:
Included reference
waveforms:

DECODER OUT jack
Conditions:
WAVEFORM 39
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Receiver Video test point XT3
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Receiver Video Channel 1 to test

point XT2 SQUITTER FREQUENCY
Typical value:
Included reference
waveforms:
Receiver Video Channel 2 to XT3
Conditions:
SELECT INTERROGATION XT1
SQUITTER FREQUENCY XT2
4-27
HA72500
WAVEFORM 40
S
E
T
T
I
N
G
S
SECTION 4
Receiver Video
Trigger from:
Channel 1
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Channel 1 to Receiver Video board

test point XT3
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 41
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:

test point XT5 BEACON DELAY O/P
Typical value:
15 volt logic levels
Included reference
waveforms:
Channel 2 Receiver Video DOUBLE

PULSE DECODER OUT test jack
Conditions:
WAVEFORM 42
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
1 volt/division
Connect to:

test point XT6
XT3
BEACON DELAY O/P XT5
XT6
Typical value:
Included reference
waveforms:
Channel 2 connected to Receiver

Video test point XT13
Conditions:
4-28
HA72500
WAVEFORM 43
S
E
T
T
I
N
G
S
SECTION 4
Receiver Video
Trigger from:

DECODER OUT jack
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:

test point XT8
Typical value:
Included reference
waveforms:
Channel 2 to Receiver Video

DOUBLE PULSE DECODER OUT
jack
Conditions:
WAVEFORM 44
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
Channel 1 - 1 volt/division
Channel 2 - 5 volts/division
Connect to:

test point XT11
Typical value:
Included reference
waveforms:
Channel 1 to Receiver Video test

point XT6
Conditions:
WAVEFORM 45
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
(lower trace)
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
XT8
XT11
XT12
Receiver Video board test point XT12
Typical value:
Included reference
waveforms:

INTERROGATIONS jack
Conditions:
4-29
HA72500
WAVEFORM 46
S
E
T
T
I
N
G
S
SECTION 4
Receiver Video
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
1 volt/division
Connect to:

test point XT6
XT13
Typical value:
Included reference
waveforms:

Video board test point XT13
Conditions:
WAVEFORM 47
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
1 volt/division
Connect to:

test point XT6
XT14
Typical value:
Included reference
waveforms:

Video test point XT13
Conditions:
WAVEFORM 48
Receiver Video
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Receiver Video board test point XT20
Typical value:
XT20
Included reference
waveforms:
Conditions:
4-30
HA72500
WAVEFORM 49
S
E
T
T
I
N
G
S
SECTION 4
Transmitter Driver
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Transmitter Driver SQUARE

MODULATION jack
Typical value:
Included reference
waveforms:
Test Interrogator PRF PULSE jack
Conditions:
WAVEFORM 50
Transmitter Driver
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
1 volt/division
Connect to:
Transmitter Driver FUNCTION

GENERATOR jack
Typical value:
N/A
Included reference
waveforms:
None
Conditions:
WAVEFORM 51
Transmitter Driver
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:
Transmitter Driver SHAPED

MODULATION jack
Typical value:
17 volts DC, 25 volts peak
Included reference
waveforms:
None
Conditions:
SQUARE MODULATION XA1
FUNCTION GENERATOR XA2
SHAPED MODULATION XA3
4-31
HA72500
WAVEFORM 52
S
E
T
T
I
N
G
S
SECTION 4
Transmitter Driver
Trigger from:

MODULATOR
Timebase:
Mode:
DC
Sensitivity:
1 volt/division
Connect to:
DRIVER LEVEL jack
Typical value:
2 to 5 volts peak
Included reference
waveforms:
SQUARE MODULATION
Conditions:
WAVEFORM 53
Pulse Shaper
S
E
T
T
I
N
G
S
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
Pulse Shaper Board test point XT4
DRIVER LEVEL XA5
SQUARE MODULATION XT4
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 54
Exciter
S
E
T
T
I
N
G
S
Trigger from:

MODULATOR test jack
Timebase:
Mode:
Both channels DC
Sensitivity:
Channel 1: 200 mV/division

Channel 2: 10 volts/division
Connect to:
Channel 1: Collector supply lead of

MRF1004 pair in exciter with current
probe.
MRF1004 pair in exciter.
Typical value:
V5, V6 CURRENT
Channel 1: 0.4 to 0.65 amperes

Channel 2: 28 volts
Included reference
waveforms:
Conditions:
4-32
HA72500
WAVEFORM 55
S
E
T
T
I
N
G
S
SECTION 4
Medium Power Driver
Trigger from:

MODULATOR test jack
Timebase:
Mode:
Both channels DC
Sensitivity:
Channel 1. 10 volts/division
Channel 2: 1 ampere/division
Connect to:

RF transistor in medium power driver
RF transistor in medium power driver,
with current probe
Typical value:
COLLECTOR CURRENT
Channel 1: 16 to 28 volts peak

Channel 2: 2.0 to 2.4 amperes
Included reference
waveforms:
Conditions:
WAVEFORM 56
Power Modulation Amplifier
S
E
T
T
I
N
G
S
Trigger from:

MODULATOR test jack
Timebase:
Mode:
DC
Sensitivity:
2 amperes/division
Connect to:
Supply lead to RF transistors in

power modulation amplifier, with
current probe
Typical value:
6 to 10 amperes
Included reference
waveforms:
None
Conditions:
WAVEFORM 57
Transponder Power Supply
S
E
T
T
I
N
G
S
Trigger from:
Test interrogator TRIGGER jack
Timebase:
Mode:
DC
Sensitivity:
20 volts/division
Connect to:
Transponder Power Supply test point

XT5
Typical value:
40 volts peak-to-peak
Included reference
waveforms:
None
Conditions:
COLLECTOR CURRENT
XT5
4-33
HA72500
WAVEFORM 58
S
E
T
T
I
N
G
S
SECTION 4
Trigger from:
Timebase:
Mode:
DC
Sensitivity:
0.2 volts/division
Connect to:

XT8
Typical value:
N/A
Included reference
waveforms:
None
Conditions:
WAVEFORM 59
S
E
T
T
I
N
G
S
Trigger from:
XT8
XT9
Timebase:
Mode:
DC
Sensitivity:
1 volt/division
Connect to:

XT9
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 60
1kW RF Amplifier
S
E
T
T
I
N
G
S
Trigger from:

MODULATOR test jack
Timebase:
Mode:
DC
Sensitivity:
2 amperes/division
Connect to:
POWER AMP MODULATOR jack
Typical value:
2.0 to 6.5 volts peak
Included reference
waveforms:
None
Conditions:
POWER AMP MODULATOR XA1
4-34
HA72500
WAVEFORM 61
S
E
T
T
I
N
G
S
SECTION 4
1kW RF Amplifier
Trigger from:

MODULATOR test jack
Timebase:
Mode:
DC
Sensitivity:
1 volt/division
Connect to:
POWER AMP OUTPUT jack
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 62
1kW RF Amplifier
S
E
T
T
I
N
G
S
Trigger from:

MODULATOR test jack
Timebase:
Mode:
DC
Sensitivity:
1 volt/division
Connect to:
POWER AMP DRIVERJACK
Typical value:
Included reference
waveforms:
None
Conditions:
WAVEFORM 63
1kW RF Amplifier
S
E
T
T
I
N
G
S
Trigger from:

MODULATOR test jack
Timebase:
Mode:
DC
Sensitivity:
5 volts/division
Connect to:
SHAPED MODULATION jack
Typical value:
17 volts DC, 25 to 35 volts peak
Included reference
waveforms:
None
Conditions:
POWER AMP Output XA2
POWER AMP DRIVER XA3
SHAPED MODULATION XA10
4-35
HA72500
WAVEFORM 64
S
E
T
T
I
N
G
S
SECTION 4
1kW RF Amplifier :
250W Output Amplifiers
Trigger from:

MODULATOR test jack
Timebase:
Mode:
DC
Sensitivity:
2 amperes/division
Connect to:
Collector supply lead to 250W

amplifiers A3-A10, with current probe
Typical value:
10 to 15 amperes peak
Included reference
waveforms:
None
Conditions:
WAVEFORM 65
1kW RF Amplifier :
Power Mod Amp
S
E
T
T
I
N
G
S
Trigger from:

MODULATOR test jack
Timebase:
Mode:
DC
Sensitivity:
2 amperes/division
Connect to:
Collector supply lead to V1 of power

modulation amplifier in 1kW RF PA,
with current probe
Typical value:
7 to 9 A pedestal, 10 to 12 A peak
Included reference
waveforms:
None
Conditions:
WAVEFORM 66
1kW RF Amplifier :
Drivers
S
E
T
T
I
N
G
S
Trigger from:

MODULATOR test jack
Timebase:
Mode:
DC
Sensitivity:
2 amperes/division
Connect to:
Collector supply lead to 250W

amplifiers A1, A2, with current probe
Typical value:
1.5 to 2.5 A pedestal, 8 to 15 A peak
Included reference
waveforms:
None
Conditions:
COLLECTOR CURRENT
COLLECTOR CURRENT
DRIVER COLLECTOR CURRENT
4-36
HA72500
WAVEFORM 67
S
E
T
T
I
N
G
S
SECTION 4
Test Interrogator
Trigger from:

MODULATOR test jack
Timebase:
Mode:
DC
Sensitivity:
2 volts/division
Connect to:

REPLIES jack
Typical value:
7 to 10 volts peak
Included reference
waveforms:
None
Conditions:
DETECTED REPLIES XA7
4-37
HA72500
SECTION 4
4.3
SPECIAL MAINTENANCE PROCEDURES
4.3.1
Stripline Printed Wiring Boards
Component replacement on the flexible stripline printed wiring boards used in the
LDB-102 requires that special requirements relating to positioning of components,
soldering and cleaning be observed.
4.3.1.1
Positioning of Ceramic Chip Capacitors
a. Lateral Positioning.
Ceramic chips must be positioned within the track or pad boundaries or, when
the pad is the same width as the chip, within 0.25 mm of true position (that is,
0.25 mm deviation each side of centre line); refer to Figure 4-2
Figure 4-2
Lateral Positioning of Chip Capacitors
b. Longitudinal Positioning.
Metallised contact ends of ceramic chip capacitors should not be positioned so
that they overhang the ends of the pads; refer to Figure 4-3.
Figure 4-3
Longitudinal Positioning of Chip Capacitors
4.3.1.2
Soldering
4.3.1.2.1
Type of Solder and Flux
The solder to be used for soldering ceramic chip capacitors to stripline board should be
62-36-2 (Sn-Pb-Ag) alloy. For manufacture, a solder paste of this alloy is applied by
screen printing. For component replacement, a resin-cored solder wire of this alloy is to
4-38
HA72500
SECTION 4
be used; a suitable type is 'Multicore' Sn62. All fluxes must be of the QQ-S-571E Type R
or AS1834 type 2.
4.3.1.2.2
Soldering Surface Mounted Chip Capacitors
The soldering of surface mounted chip capacitors shall be such that the end result
displays good wetting (solderability) indicating good joint integrity and reliability. Solder
joints are to be smooth, bright and feathered to a thin edge, indicating proper wetting
action. Lead material is not to be exposed within the solder connection, and no sharp
protrusions or contamination (embedded foreign material) is to be evident. The contour
of the component lead must be visible. The height of the solder fillet should extend at
least one-third of the chip height and not higher than the end of the chip. The soldered
joint surfaces should exhibit good wettability (that is, low contact angles of the solder in
contact with the joined surfaces). Figure 4-4shows these requirements, together with
examples of typical soldering faults.
Figure 4-4
4.3.1.2.3
Chip Capacitor Soldering Requirements
Soldering Through Board Mounted Chip Capacitors
The main criterion for a sound joint is a smooth bright joint displaying good wetting
across the entire width of the metallised contact of the chip. Care must be taken that no
short circuits are caused due to excessive solder. Refer to Figure 4-5.
Figure 4-5
4.3.1.2.4
Soldering of Through Board Mounted Chip Capacitors
Workmanship
Care must be taken when soldering ceramic chip capacitors to stripline. Excessive
temperature will cause damage to the metallised chip contacts and stripline pads. On
completion of each solder joint check for evaporation of the metallised chip contacts and
for lifted pads or track. Under no circumstances are ceramic chip capacitors to be
touched with a soldering iron. The molten solder joint must not be disturbed while
cooling; cooling should be natural, without assistance from liquid or air.
4-39
HA72500
4.3.1.2.5
SECTION 4
Placement and Soldering of Standard Components to Stripline
Standard components (such as resistors, capacitors, diodes) when used in conjunction

with stripline board must have the shortest possible leads to reduce inadvertent
inductance.
The following are essential requirements:
a. Components must have the shortest possible leads and be as close as possible
to the surface of the board.
b. Stress relief bends are not required.
c. For surface mounted ribbon leads, the soldered area between lead and land of
ribbon wire leads is to be greater than the square of the lead width. After
soldering, the distance from the top of the lead to the top of the land is to be less
that three times the lead thickness, and the lead outlines are to be visible.
Maximum and minimum lead overhang conditions are shown in Figure 4-6, and
maximum and minimum solder conditions are shown in Figure 4-7.
Figure 4-6
Part Placement
4-40
HA72500
Figure 4-7
SECTION 4
Maximum/Minimum Solder Conditions
d. Surface mounted round, flat or coined leads are not to have any side overhang.
The contact length of the lead is to be twice the width of the flattened leads, and
twice the diameter for round leads. Lead placement requirements are shown in
Figure 4-8and soldering conditions are shown in Figure 4-9.
Figure 4-8
Lead Placement Conditions
4-41
HA72500
Figure 4-9
SECTION 4
Lead Soldering Conditions
e. Coated or sealed components (such as capacitors) must display a minimum

clearance of 0.25 mm between the solder fillet and the coating; refer Figure 4-10.
Figure 4-10
f.
Minimum Clearance of Sealed Components
Multiple lead terminations are allowable within the following constraints:

1. No lead is closer than 1.25 mm to the end of the metallisation of a ceramic
chip capacitor; refer to Figure 4-11.
2. Pads are of sufficient size to accommodate the number of leads; refer to
Figure 4-11.
4-42
HA72500
Figure 4-11
4.3.1.3
SECTION 4
Multiple Lead Termination Requirements
Cleaning
On completion of soldering, printed board assemblies should be cleaned by brush

application of Freon TE35, Freon TP35 or ethyl alcohol. It should be noted that the
following components and materials are adversely affected by cleaning solvents such as
Freon (trichlorotriflurorethane):
a. All aluminium electrolytic capacitors where ends are not sealed with epoxy
resins.
b. Variable and/or adjustable capacitors and resistors.
c. Metal oxide resistors (such as Welwyn F series).
d. Wire wound resistors (such as IRC ASW series).
e. MFD capacitors.
f.
'Styroseal' capacitors and other polystyrene capacitors of the wound film type.
g. All polystyrene materials and coatings.

h. Inductor type 222V57973 (red) or any inductor impregnated with M198 or with
potted cores (such as 89V57997 and 90V57997).
i.
All silicon based rubber material, or components containing it such as tantalum

foil capacitors (Plessey type ETR) and miniature variable capacitors (Morganite
type 81 or 83).
j.
Wax and silicon greases.
k. Natural rubber and neoprene.

l.
4.3.2
Components impregnated or coated with Dow Corning 630 Protective Coating.
Conformal Coating
Most printed wiring boards in the DME LDB-102 equipment are coated with Dow Corning
Conformal Coating 1-2577. Component replacement will breach the conformal coating,
which must then be restored on completion of the repair.
Repair and restoration of conformal coating should be conducted as follows:
a. Desolder the component. Use a small soldering iron or a solder sucker device at
the lowest practicable tip temperature (250 to 300 degrees C); maximum tip
temperature should not exceed 300 degrees C. The coating is affected by a timeby-temperature factor, so apply heat for the shortest possible time.
b. If the conformal coating becomes discoloured or charred from desoldering,
carefully scrape the affected coating away or use a rubber eraser to remove it.
4-43
HA72500
SECTION 4
c. Clean the area affected by desoldering; use Freon TP35, or equivalent. Do NOT
flood or wet the conformal coating, as this may dissolve it.
d. Solder in the new component with a resin flux-cored solder wire.
e. Remove the flux residue and clean the surrounding conformal coating. Use a
cotton-tipped applicator (cotton bud) moistened with Freon TP35, or equivalent,
as soon as possible after soldering. Do NOT flood or wet the conformal coating,
as this may dissolve it.
f.
To restore the conformal coating recoat the soldered joint(s), the component
leads on both sides of the board, and any bare board surfaces by brush
application of Dow Corning Conformal Coating 1-2577. This material will be
supplied thinned for brushing.
4.3.3
RF Transistor Replacement
This section describes the preferred method for removal of RF low power and high
power transistors from printed wiring boards (PWB), especially microstrip circuitry on
Teflon substrate: it is assumed that the device to be removed is to be discarded as
faulty, most emphasis being placed on avoiding damage to the PWB which is being reused.
Care must be taken in component removal from any PWB to avoid the use of excessive
heat, as this will reduce the adhesion of the copper track to the base material: this is
especially critical in the microstrip-on-TefIon case, where the initial adhesion is lower
than with fibreglass boards and the tracks rely on surface adhesion alone, having no
plated-through holes which provide mechanical anchoring as well as thermal shunting.
4.3.3.1
Tools Required
a. For efficient removal of surface mounted transistors, it is advisable to have two

instrument type soldering irons available, one with a small bit with a flat area,
which is temperature controlled to 250 degrees Celsius, and the other with a
larger flat bit to rapidly heat larger thermal masses.
b. A reel of multi-cored solder
c. Tapered nose pliers and tweezers.
d. A fine sharp blade such as a craft knife.
e. A vice or clamp for securing small assemblies.
f.
Damp pad for keeping iron bit clean - important.
g. Solder sucker or solder wick braid.
4.3.3.2
Preparation of Unit
a. With all external connections removed, take the LRU from its module and the
PWB, or subassembly, from the unit, if possible; see Section 4.1.1 if necessary
for instructions on removal and replacement of LRU and PWB sub-assemblies.
b. Note the method used to mount the transistor, and withdraw and retain any
screws or nuts used.
c. Secure the PWB or subassembly with a clamp or vice to leave both hands free.
4.3.3.3
Removal of Device
a. If any surface mounted components are within 3 mm of the device joints, these
should be removed, first noting their precise positioning with respect to the
transistor, for later replacing.
4-44
HA72500
SECTION 4
b. Miscellaneous chip components can be readily removed using the two-iron

method - apply the iron with the larger bit to the end of the component connected
to ground plane and the smaller bit to the other end; as soon as the solder has
melted both ends, lift the component between the bits and quickly remove it from
the heat before it loses its end cap plating.
c. If the transistor is soldered to large track areas (such as ground planes) these
joints should be unsoldered first; using the larger soldering iron bit and a little
fresh solder, melt the local solder and, using the solder sucker or wick, reduce
the molten solder as fast and thoroughly as possible. Whilst the solder is still
molten, use the sharp blade to part all transistor tabs, except one, from the
copper areas: it may be necessary to complete this later. Using the smaller
soldering iron bit, reduce the solder and, again using the blade, lift the tabs of the
transistor connected to the microstrip tracks, then finally lift the remaining large
tab.
d. Lift the device, using pliers to hold the body and the soldering iron to finally part
any joints still connected.
e. Clean up all track areas by carefully using the soldering iron to reflow the solder.
4.3.3.4
Inserting the New Device
a. Handle the new transistor by the body, or the tabs to be connected to ground
plane, to prevent any static discharge damage. Place it in the desired position,
ensuring that the tabs are accurately aligned with the tracks, using any screws or
nuts removed earlier.
b. Pressing the body down gently with an insulated tool, if needed, solder any
ground plane connections first, using the soldering iron with the large bit and
more solder - not too much.
c. Using the smaller bit, solder the collector (or drain) lead(s) to track(s) using
minimum heat for a clean joint; then solder the base (or gate) lead(s) to the
appropriate track(s).
d. Finally, any components previously removed should be carefully resoldered back
in their correct positions.
e. Clean the board to remove any excess flux and inspect new joints.
f.
The PWB can now be refitted into its box and the appropriate LRU tests applied.
4-45
HA72500
APPENDIX A
APPENDIX A
OPERATING INSTRUCTIONS
A-i
HA72500
APPENDIX A
TABLE of CONTENTS
A.
OPERATING INSTRUCTIONS...................................................................A-1
A.1
OPERATING INSTRUCTIONS - SINGLE DME
A-1
A.1.1 Introduction ................................................................................................ A-1
A.1.2 Application of Power .................................................................................. A-2
A.1.3 Local Operation.......................................................................................... A-3
A.1.4 Remote Operation...................................................................................... A-3
A.1.5 Maintenance Operation.............................................................................. A-4
A.1.6 Recycle Operation...................................................................................... A-4
A.1.7 Typical Test Results................................................................................... A-6
A.1.8 Operating Notes......................................................................................... A-6
A.2
OPERATING INSTRUCTIONS - DUAL DME
A-8
A.2.1 Introduction ................................................................................................ A-8
A.2.2 Application of Power .................................................................................. A-8
A.2.3 Local Operation.......................................................................................... A-9
A.2.4 Remote Operation.................................................................................... A-10
A.2.5 Maintenance Operation............................................................................ A-11
A.2.6 Recycle Operation.................................................................................... A-14
A.2.7 Operating Notes....................................................................................... A-14
A.2.8 Typical Test Results................................................................................. A-15
A.3
CTU FACILITIES AND OPERATING PROCEDURE
A-16
A.3.1 CTU Front Panel Controls ........................................................................ A-16
A.3.2 CTU Front Panel Indicators...................................................................... A-32
A.4
OPERATOR CONTROLS AND INDICATORS
A-34
A.5
MODULE PRESET CONTROLS, SWITCHES, LINKS AND INDICATORS A-39
A.5.1 CTU Internal Controls .............................................................................. A-39
A.5.2 CTU Internal Displays .............................................................................. A-42
A.5.3 Transponder Internal Controls.................................................................. A-46
A.6
DEPOT TEST FACILITY OPERATION
A-53
A-ii
HA72500
APPENDIX A
LIST of FIGURES
Figure A-1
Figure A-2
Figure A-3
Figure A-4
Figure A-5
Figure A-6
CTU Front Panel ................................................................................ A-17

Menu Structure in Operational Modes ................................................ A-22
Menu Structure in Maintenance Mode................................................ A-23
CTU Processor Board - Control and Indicator Locations .................... A-43
CTU Front Panel Board - Control and Indicator Locations.................. A-44
CTU RMS Interface Board - Control and Indicator Locations.............. A-45
LIST of TABLES
Table A-1
Table A-2
Table A-3
Table A-4
Table A-5
Table A-6
Table A-7
Table A-8
Table A-9
Table A-10
Table A-11
Switch Setting Checklist - Single System ................................................. A-1

Switch Setting Checklist - Dual System.................................................... A-8
Transponder Front Panel Controls and Indicators .................................. A-34
CTU Processor Board Option Switch Settings........................................ A-40
CTU Processor Board Test Jumpers...................................................... A-41
Internal Controls : Monitor Module 1A72510 .......................................... A-46
Internal Controls : Test Interrogator 1A72514 ........................................ A-48
Internal Controls : Receiver Video 1A72520........................................... A-49
Internal Controls : Transponder Power Supply 1A72525........................ A-50
Internal Controls : Transmitter Driver 1A72530 .................................. A-51
Internal Controls: 1kW PA Power Supply 1A72540 ............................ A-52
A-iii
HA72500
APPENDIX A
A. OPERATING INSTRUCTIONS
A.1
OPERATING INSTRUCTIONS - SINGLE DME
A.1.1
Introduction
The procedures in this section detail the steps required to place a DME beacon (single
configuration) into operation. Each mode of operation is described separately and some
guidance is given concerning action required when abnormal performance occurs.
For in-depth explanation of the various controls, indicators, and facilities, refer to the
following sections:
CTU Facilities and Operating Procedure: Section A.3;
Operator Controls and Indicators: Section A.4;
Module Preset Controls, Switches, Links and Indicators: Section A.5.
The checklist in Table A-1 gives the required switch settings of the front panel switches
prior to placing the beacon into operation. These settings are independent of the final
mode of operation of the beacon.
Table A-1
Switch Setting Checklist - Single System
MODULE/UNIT
AC Power Supply
Power Distribution Panel
CONTROL/INDICATOR
SETTING/INDICATION
POWER
OFF
1kW POWER AMP
Off
CTU & TRANSPONDER
Off
Monitor
MONITOR OUTPUTS
NORMAL
Test Interrogator
MONITOR ANDINTERROGATORDC POWER
NORMAL
TRANSPONDER DC POWER
NORMAL
Transmitter Driver
DRIVER DC POWER
NORMAL
Receiver Video
IDENT
NORMAL
1kW PA Power Supply
AMPLIFIER DC POWER
NORMAL
A-1
HA72500
A.1.2
APPENDIX A
Application of Power
a. On the AC power supply, set the POWER switch to ON. Check that the front
panel voltmeter indicates a voltage of 27.0 0.5 volts.
b. On the power distribution panel, set both circuit breakers on. After a short delay
(about 10 seconds), check that the following CTU front panel indicators are on:
AC PWR NORM
BATT CH1
LOCAL
SELECT MAIN, OFF/RESET
(press LOCAL pushbutton if the indicator is

off)
(press OFF/RESET pushbutton if the indicator
is off)
Check that the following CTU front panel indicators are off:
TEST section:
MODULES
ANT RELAY
POWER section:
BATT CH2
BATT LOW
DME CONTROL section:
RECYCLE
(press RECYCLE pushbutton if the indicator

is on)
REMOTE
(press LOCAL pushbutton if the indicator is

on)
MAINTENANCE
(press MAINTENANCE pushbutton if the

indicator is on)
MONITOR ALARM
(press MONITOR ALARM INHIBIT pushbutton

if the indicator is on)
SELECT MAIN NO1
(press OFF/RESET pushbutton if the indicator

is on)
SELECT MAIN NO2

STATUS section:
NO1 ON
NO2 ON
NORMAL
TRANSFER
SHUTDOWN
MAINTENANCE
If the indications are contrary to the above, refer to Section A.1.8 below.
A-2
HA72500
APPENDIX A
A.1.3
Local Operation
A.1.3.1
Switch-on Procedure
a. Set the front panel controls initially as in Section A.1.1.

b. Apply power to the beacon as in Section A.1.2.
c. On the CTU, press the LOCAL control source pushbutton. This selects normal
operation in the 'local' mode and the LOCAL indicator should be on.
d. On the CTU, press the SELECT MAIN, NO1 pushbutton. This activates the rack
in its normal operating mode. The following indications should result:
1. SELECT MAIN, NO1 indicator on.
2. NO1 ON status indicator on (this is an internal CTU preset control,
adjustable from 2 to 20 seconds for a cold standby and fixed at 2 seconds
for a warm standby; see A.5.1.6 for details).
3. NORMAL status indicator on, after the selected POWER ON inhibit time.
This indicates that the monitor is powered, and no faults are detected.
4. All the ALARM REGISTER indicators off immediately, and stay off unless
a fault is present.
e. Check that no unit or module has a red indicator on. A red indicator on indicates
that a test switch is not in the NORMAL position, or a fault is present.
"
NOTE
A.1.3.2
A monitor module self test occurs every 15 seconds (2 seconds), and will
produce a momentary PRIMARY fault display on the monitor module. This is
normal operation.
Switch-off Procedure
On the CTU, press the SELECT MAIN, OFF/RESET pushbutton. The indicators in the
STATUS section should go off, after a short delay. The OFF/RESET indicator should be
on, and the SELECT MAIN, NO1 and NO2 indicators should be off.
A.1.3.3
Reset Procedure
To reset the beacon following a shutdown, due to an alarm condition, press the SELECT
MAIN, OFF pushbutton, and then press the SELECT MAIN, NO1 pushbutton.
(Response should be the same as Section A.1.3.1d.)
A.1.4
Remote Operation
A.1.4.1
At the DME Site
a. Set the front panel switches initially as in Section A.1.1.

c. On the CTU press the SOURCE, REMOTE pushbutton. The SOURCE, LOCAL
indicator should be off, and the SOURCE, REMOTE indicator should be on. This
selects normal operation in the 'remote' mode.
A.1.4.2
At the Remote Site
Check that the AC PWR NORM and BATT CHG remote indicators are on.
A-3
HA72500
A.1.4.2.1
APPENDIX A
Switch-on Procedure
At the remote control panel, select DME NO1 ON. Correct operation will be indicated by
the DME NORMAL indicator and RACK ON indicator (if used) turning on. At the DME
site, indications should be as in Section A.1.3.1d, except that REMOTE should be on.
A.1.4.2.2
At the remote control panel, select DME OFF/RESET. The DME NORMAL indicator and
the DME NO1 ON indicator (if used) should turn off.
A.1.4.2.3
Reset Procedure
If a beacon shutdown occurs due to an alarm, the DME NORMAL indicator should turn
off, and the SHUTDOWN indicator should turn on.
To reset the beacon, select DME OFF/RESET, and then select DME NO1 ON again.
A.1.5
Maintenance Operation
The 'maintenance' mode would normally be used during servicing or alignment of the
DME rack. In a single beacon installation, the 'maintenance' mode is essentially the
same as the 'normal' mode, except that more extensive tests are available from the
CTU, and the high test interrogation rate switches are enabled.
A.1.5.1
Switch-on Procedure
a. Set the front panel switches initially as in Section A.1.1.

c. On the CTU, press the MAINTENANCE pushbutton. This selects 'maintenance'
operation in the local mode. The LOCAL and MAINTENANCE indicators should
be on.
d. On the CTU, press the SELECT MAIN, NO1 pushbutton. This activates the rack
in its maintenance operating mode. The following indications should result:
2. NO1 ON status indicator on.
3. MAINTENANCE status indicator on.
4. All the ALARM REGISTER indicators off immediately, and stay off unless a
fault is present.
A.1.5.2
on, and the SELECT MAIN, NO1 and NO2 indicators should be off.
A.1.5.3
Reset Procedure
To reset the beacon following a shutdown due to an alarm, press the SELECT MAIN,
OFF/RESET pushbutton, and then press the SELECT MAIN, NO1 pushbutton.
A.1.6
Recycle Operation
The recycling facility allows the beacon to automatically restart after a failure. Following
a shutdown due to an alarm, the beacon should attempt three restarts. If normal
operation ensues, then the beacon should remain on. If there are four shutdowns within
a 5-minute period, then the beacon will remain off, until it is manually reset.
A-4
HA72500
APPENDIX A
a. The RECYCLE facility is 'enabled' when the RECYCLE indicator is on. On the
CTU, press the RECYCLE pushbutton to toggle between the 'enable' and
'disable' of this facility.
b. The number of restarts is recorded on the restart counter. The restart counter is
displayed on the CTU's test display when the Misc softkey is pressed, from the
top level of the operational mode menu.
A-5
HA72500
A.1.7
APPENDIX A
Typical Test Results
The table below shows the normal readings which would be indicated on the Test
Facility of the CTU, in an operating rack. For operation of the test facility of the CTU refer
to Section A.3.1.2.
PARAMETER
LOWER LIMIT
UPPER LIMIT
49.8 s
50.2 s
55.8 s
56.2 s
11.9 S
12.1 s
29.9 s
30.1 s
POWER OUT
1.1 kW
1.3 kW
EFFICIENCY
70%
100%
Decoded Pulse Rate
95 pps
2850 pps
Varies with interrogation rate.
Tx Pulse Rate
DELAY
SPACING
940 pps
2850 pps
Pulse Width
3.2 s
3.8 s
Pulse Rise Time
1.9 s
2.5 s
Pulse Fall Time
1.9 s
2.5 s
RV Local Oscillator
1.0 volts
3.0 volts
RV RF Drive
1.5 volts
4.5 volts
TD Drive
1.5 volts
2.5 volts
TD Modulation
1.5 volts
3.5 volts
PA Modulation
1.0 volts
3.5 volts
PA Drive
2.0 volts
4.8 volts
PA Output
2.0 volts
4.8 volts
TI Interrogation Level
2.7 volts
3.3 volts
21 volts DC
28 volts DC
Power Amplifier HT
49.5 volts DC
50.5 volts DC
Transponder 15 V
14.6 volts DC
15.6 volts DC
Transponder 18 V
17.2 volts DC
18.6 volts DC
Driver HT
41.6 volts DC
42.4 volts DC
Auxiliary 24 V
A.1.8
NOTES
Typical reply efficiency is 90%unless

interrogation rate is high.
Varies with battery voltage.
Operating Notes
For a full definition of the CTU controls and indicators, refer to Section A.3. The following
notes are given to assist the operator when an abnormal indication occurs on the CTU:
a. If the AC PWR NORM or BATT CHG1 indicators are not on after the power
distribution panel circuit breakers are closed, then the operation of the AC power
supply should be checked for the presence of AC mains and correct DC output
voltage.
b. If the BATT LOW indicator turns on after the power distribution panel circuit
breakers are closed, then the rack DC supply is too low for proper operation, and
the transponder will not switch on. The DC output from the AC power supply and
the battery voltage should be checked.
c. If the CTU fault indicator in the ALARM REGISTER turns on after the power
distribution panel circuit breakers are closed, then the controller circuits are not
operating correctly. Reset the system by switching the CTU & TRANSPONDER
A-6
HA72500
APPENDIX A
circuit breaker to off and then on again. If the CTU fault indicator is still on, or
flashing, then the CTU module should be replaced.
d. If any of the ALARM REGISTER, PRIMARY or SECONDARY indicators turn on
following switch-on, then one of the transponder operating parameters is out of
tolerance; if this parameter is a primary fault, the transponder should be shut
down after the ALARM DELAY period. The indicators in the ALARM REGISTER
can be used as a guide to locating the cause of the fault condition, after the
transponder has shutdown. (See also Section 4.1.2 for LRU fault location).
A-7
HA72500
APPENDIX A
A.2
OPERATING INSTRUCTIONS - DUAL DME
A.2.1
Introduction
The procedures in this section detail the steps required to place a DME beacon (dual
configuration) into operation. Each mode of operation is described separately and some
guidance is given concerning action required when abnormal performance occurs.
For in-depth explanation of the various controls, indicators, and facilities, refer to the
following sections:
CTU Facilities and Operating Procedures: Section A.3.
Operator Controls and Indicators: Section A.4.
Module Preset Controls, Switches, Links and Indicators: Section A.5.
The checklist in Table A-2 gives the required switch settings of the front panel switches
prior to placing the beacon into operation. These settings are independent of the final
mode of operation of the beacon.
Table A-2
Switch Setting Checklist - Dual System
MODULE/UNIT
CONTROL/INDICATOR
SETTINGs1NDICATION
AC Power Supplies
POWER
OFF
All circuit breakers
Off
RF Panel
Antenna Relay Control Switch
NORMAL
Monitors
MONITOR OUTPUTS
NORMAL
Test Interrogators
MONITOR
ANDINTERROGATORDC
POWER
NORMAL
Transponder Power Supplies
NORMAL
Transmitter Drivers
DRIVER DC POWER
NORMAL
Receiver Videos
IDENT
NORMAL
1kW PA Power Supplies
AMPLIFIER DC POWER
NORMAL
A.2.2
Application of Power
a. On both AC power supplies, set the POWER switch to ON. Check that the front
panel voltmeters indicate a voltage of 27.0 0.5 volts.
b. On the power distribution panel, set all circuit breakers to on. After a short delay
(about 10 seconds), check that the following CTU front panel indicators are on:
AC PWR NORM
BATT CHG1
BATT CHG2
LOCAL
(press LOCAL pushbutton if the indicator is off)
SELECT MAIN, OFF/RESET
(press OFF/RESET pushbutton if the indicator is

off)
A-8
HA72500
APPENDIX A
Check that the following CTU front panel indicators are off:
TEST section:
MODULES
ANT RELAY
POWER section:
BATT LOW
DME CONTROL
section:
RECYCLE
REMOTE
(press RECYCLE pushbutton if the RECYCLE indicator is

on)
(press LOCAL pushbutton if the REMOTE indicator is on)
MAINTENANCE
(press MAINTENANCE pushbutton if the indicator is on)
MONITOR ALARM
(press MONITOR ALARM INHIBIT pushbutton if the

indicator is on)
SELECT MAIN NO1 (press OFF/RESET pushbutton if the indicator is on)
SELECT MAIN NO2 (press OFF/RESET push button if the indicator is on)
STATUS section:
NO1 ON
NO2 ON
NORMAL
TRANSFER
SHUTDOWN
MAINTENANCE
If the indications are contrary to the above, refer to Section A.2.8 below.
A.2.3
Local Operation
A.2.3.1
Switch-on Procedure
a. Set the front panel controls initially as in A.2.1.

b. Apply power to the beacon as in A.2.2.
c. On the CTU, press the LOCAL control source pushbutton. This selects normal
operation in the local mode and the LOCAL indicator should be on.
d. On the CTU, press the SELECT MAIN, NO1 or NO2 pushbutton. This activates
the rack in its normal operating mode. The following indications should result:
1. SELECT MAIN, NO1 or NO2 indicator on.
2. NO1 ON or NO2 ON status indicator on (this is an internal CTU preset
control, adjustable from 2 to 20 seconds for a cold standby and fixed at 2
seconds for a warm standby; see A.5.1.6 for details).
3. NORMAL status indicator on, after the selected POWER ON inhibit time. This
indicates that the monitor is powered, and no faults are detected.
fault is present.
A-9
HA72500
APPENDIX A
e. Check that no unit or module has a red indicator on. A red indicator on indicates
that a test switch is not in the NORMAL position, or a fault is present.
"
NOTE
A monitor module self test occurs every 15 seconds (2 seconds), and will
produce a momentary PRIMARY fault display on the monitor module. This is
normal operation.
A.2.3.2
on, and the SELECT MAIN, NO1 and NO2 indicators should both be off.
A.2.3.3
Transfer Indication
If the main transponder has been switched off due to an alarm, the NORMAL and
SHUTDOWN status indicators will be off, and if the standby transponder is currently
operating, the TRANSFER indicator will be on. The faults that were present at the time
of the transfer action are displayed on the ALARM REGISTER indicators.
A.2.3.4
Shutdown Indication
If the main transponder and the standby transponder have both been switched off due to
an alarm, the NORMAL and TRANSFER status indicators will be off and the
SHUTDOWN indicator will be on. The faults that were present at the time of the
shutdown action are displayed on the ALARM REGISTER indicators.
A.2.3.5
Reset Procedure
To reset the beacon following a shutdown or transfer, due to an alarm condition, press
the SELECT MAIN, OFF/RESET pushbutton, and then press the SELECT MAIN, NO1
or NO2 pushbutton (response should be the same as A.2.3.1d).
A.2.4
Remote Operation
A.2.4.1
At the DME Site
a. Set the front panel switches initially as in A.2.1.

b. Apply power to the beacon as in A.2.2.
c. On the CTU press the SOURCE, REMOTE pushbutton. The SOURCE, LOCAL
indicator should be off, and the SOURCE, REMOTE indicator should be on. This
selects normal operation in the remote' mode.
A.2.4.2
At the Remote Site
Check that the AC PWR NORM and BATT CHG NORM remote indicators are on.
A.2.4.2.1
Switch-on Procedure
At the remote control panel, select DME NO1 ON or DME NO2 ON. Correct operation
will be indicated by the DME NORMAL indicator and DME NO1 ON or DME NO2 ON
indicator (if used) turning on. At the DME site, the indications should be the same as
those in A.2.3.1d, except that the REMOTE indicator should be on.
A.2.4.2.2
At the remote control panel, select DME OFF/RESET. The DME NORMAL indicator and
the DME NO1 ON indicator (if used) should turn off.
A-10
HA72500
A.2.4.2.3
APPENDIX A
Transfer Indication
If the main transponder has switched off due to an alarm, the DME NORMAL and DME
SHUTDOWN status indicators will be off, and if the standby transponder is currently
operating, the DME TRANSFER indicator will be on.
A.2.4.2.4
Shutdown Indication
If the main transponder and the standby transponder have switched off due to an alarm,
the DME NORMAL and DME TRANSFER status indicators will be off, and the DME
SHUTDOWN indicator will be on.
A.2.4.2.5
Reset Procedure
To reset the beacon, select DME OFF/RESET, and then select DME NO1 ON or DME
NO2 ON again.
A.2.5
Maintenance Operation
The 'maintenance' mode would normally be used during servicing or alignment of the
DME rack. In a dud,] beacon installation, the 'maintenance' mode allows one of the
transponders to be operated separately as a single transponder while the other
transponder is used for maintenance tasks. Operating in this mode, if the MONITOR
ALARM is selected to be NORMAL, only primary faults will be recognised, and
shutdown is the only action that will be performed. More extensive tests are also
available on the CTU, and the TI RATE 1 kHz and 10 kHz switches are enabled.
"
NOTE
Only the monitor/test interrogator installed in the operating transponder will be

used to monitor that transponder. In other words, only single monitoring is used
in maintenance mode.
A.2.5.1
Switch-on Procedure
A.2.5.1.1
Switch-on Procedure 1
This procedure applies when Transponder 1 is to be connected to the antenna, and

Transponder 2 is to be connected to the dummy load for maintenance or alignment.
b. Perform the following RF wiring changes on the RF panel, noting the original
wiring configuration:
1. Make sure a 10 dB attenuator is attached to connector FWD-A on upper
Directional Coupler (1A69755).
2. Make sure a 50 ohms termination is attached to connector REV-A on the
upper directional coupler.
3. Move the coaxial cable connected to FWD-B on the lower Directional Coupler
(2A69755) to connect from the 10 dB attenuator on TI-2 REPLY DET to
connector FWD-B on the upper directional coupler. A longer coaxial cable
may be necessary.
4. Leave the coaxial cable connected from the 10 dB attenuator on TI-1 REPLY
DET to connector FWD-D on the lower directional coupler.
5. Move the coaxial cable connected to FWD-C on the lower directional coupler,
to connect from FWD-C on the upper directional coupler to TI-2 TEST
INTRGS. A longer coaxial cable may be necessary.
6. Leave the coaxial cable from connector FWD-E on the lower directional
coupler to TI-1 TEST INTRGS,
A-11
HA72500
APPENDIX A
7. Connect a coaxial cable from connector ERP IN on the rear of the lower
transponder subrack to the 10 dB attenuator on connector FWD-A on the
c. The following table lists the settings of the front panel switches, of Transponder
2, prior to placing the beacon in maintenance operation. These settings are
independent of the final mode of operation of the beacon.
UNIT
SWITCH
SETTING
AC Power Supplies
AC POWER
OFF
RF Panel
NORMAL
Off
Test Interrogator Modules
MONITOR
ANDINTERROGATOR
DCPOWER
ON
ON
Transmitter Driver Modules
DRIVER DC POWER
ON
AMPLIFIER DC POWER
ON
d. Apply power to the beacon as in A.2.2.

e. On the CTU, press the MAINTENANCE pushbutton. This selects 'maintenance'
be on.
f.
On the CTU, press the SELECT MAIN, NO1 pushbutton. This activates the rack
2. NO1 ON status indicator on.
3. MAINTENANCE status indicator on.
fault is present.
A.2.5.1.2
Switch-on Procedure 2
This procedure applies when Transponder 2 is to be connected to the antenna, and

Transponder 1 is to be connected to the dummy load for maintenance or alignment.
b. Perform the following RF wiring changes on the RF panel, noting the original
wiring configuration:
1. Make sure a 10 dB attenuator is attached to connectors FWD-A on the upper
Directional Coupler (1A69755).
2. Make sure a 50 ohms termination is attached to connector REV-A on the
3. Move the coaxial cable connected to FWD-D on the lower Directional Coupler
(2A69755) to connect from 10 dB attenuator on TI-1 REPLY DET to
connector FWD-B on the upper directional coupler.
4. Leave the coaxial cable connected from the 10 dB attenuator on TI-2 REPLY
DET to connector FWD-B on the lower directional coupler.
A-12
HA72500
APPENDIX A
5. Move the coaxial cable connected to FWD-E on the lower directional coupler,
to connect from FWD-C on the upper directional coupler to TI-1 TEST
INTRGS.
6. Leave the coaxial cable from connector FWD-C on the lower directional
coupler to TI-2 TEST INTRGS.
7. Connect a coaxial cable from connector ERP IN on the rear of the upper
transponder subrack to the 1 0d13 attenuator on connector FWD-A on the
c. The following table lists the settings of the front panel switches, of
Transponder 1, prior to placing the beacon in maintenance operation. These
settings are independent of the final mode of operation of the beacon.
UNIT
SWITCH
SETTING
AC Power Supplies
AC POWER
OFF
RF Panel
NORMAL
Off
Test Interrogator Modules
MONITOR
ANDINTERROGATOR
DCPOWER
ON
ON
Transmitter Driver Modules
DRIVER DC POWER
ON
AMPLIFIER DC POWER
ON
d. Apply power to the beacon as in A.2.2.

e. On the CTU, press the MAINTENANCE pushbutton. This selects 'maintenance'
be on.
f.
On the CTU, press the SELECT MAIN, NO2 pushbutton. This activates the rack
1.
SELECT MAIN, NO2 indicator on.
2.
NO2 ON status indicator on.
3.
MAINTENANCE status indicator on.
4.
All the ALARM REGISTER indicators off immediately, and stay off unless a
fault is present.
A.2.5.2
on, and the SELECT MAIN, NO1 and NO2 indicators should both be off.
A.2.5.3
Reset Procedure
To reset the beacon following a shutdown due to an alarm, press the SELECT MAIN,
OFF/RESET pushbutton, and then press the SELECT MAIN, NO1 or NO2 pushbutton.
A.2.5.4
Restore RF Wiring Procedure
If steps A.2.5.1.1 or A.2.5.1.2 have been performed, the RF wiring needs to be restored
for normal dual operation, by performing the following steps:
A-13
HA72500
APPENDIX A
1. Make sure that 10 dB attenuators are attached to connectors TI-1 REPLY

DET, TI-2 REPLY DET, on the RF panel, and FWD-A on both directional
couplers.
2. Leave 50 ohms terminations on connectors REV-A on both directional
couplers.
3. Remove any coaxial cable connected to FWD-B and FWD-C of the upper
directional coupler.
4. Make sure that a coaxial cable is connected from FWD-D on the lower
directional coupler to the 10 dB attenuator on TI-1 REPLY DET on the RF
panel.
5. Make sure that a coaxial cable is connected from FWD-B on the lower
directional coupler to the 10 dB attenuator on TI-2 REPLY DET on the RF
panel.
6. Make sure that a coaxial cable is connected from FWD-E on the lower
directional coupler to TI-1 TEST INTRGS on the RF panel.
7. Make sure that a coaxial cable is connected from FWD-C on the lower
directional coupler to TI-2 TEST INTRGS, on the RF panel.
8. Re-install the original wiring associated with connectors ERP IN on the rear of
the transponder subracks
A.2.6
Recycle Operation
The recycling facility allows the beacon to automatically restart after a failure. Following
a shutdown due to an alarm, the beacon should attempt three restarts. If normal
operation ensues, then the beacon should remain on. If there are four shutdowns within
a 5-minute period, then the beacon will remain off, until it is manually reset.
a. The RECYCLE facility is 'enabled' when the RECYCLE indicator is on. On the
CTU, press the RECYCLE pushbutton to toggle between the 'enable' and
'disable' of this facility.
b. The number of restarts is recorded on the RESTART counter. The RESTART
counter is displayed on the CTU test display when the Misc softkey is pressed,
from the top level of the operational mode test menu.
A.2.7
Operating Notes
For a full definition of the CTU controls and indicators, refer to Section A.3.
The following notes are given to assist the operator when an abnormal indication occurs
on the CTU:
a. If the AC PWR NORM, BATT CHG1 or BATT CHG2 indicators are not on after
the power distribution panel circuit breakers are closed, then the operation of the
AC power supplies should be checked for the presence of AC mains and correct
DC output voltage.
b. If the BATT LOW indicator turns on after the power distribution panel circuit
breakers are closed, then the rack DC supply is too low for proper operation, and
the transponder will not switch on. The DC output from the AC power supplies
and the battery voltages should be checked.
c. If the CTU fault indicator, in the ALARM REGISTER, turns on after the power
distribution panel circuit breakers are closed, then the controller circuits are not
operating correctly. Reset the system by switching the CCTU & TRANSPONDER
A-14
HA72500
APPENDIX A
circuit breakers to off and then on again. If the CTU fault indicator is still on, or
flashing, then the CTU module should be replaced.
d. If any of the ALARM REGISTER, PRIMARY or SECONDARY indicators turn on
following switch-on, then one of the transponder operating parameters is out of
tolerance; if this parameter is a primary fault, the transponder should shut down
after the ALARM DELAY period. The indicators in the ALARM REGISTER can
be used as a guide to locating the cause of the fault condition, after the
transponder has shut down. (See also Section 4.1.2 for LRU fault location)
A.2.8
Typical Test Results
The table below shows the normal readings which would be indicated on the Test
Facility of the CTU, in an operating rack. For operation of the Test Facility of the CTU
refer to Section A.3.1.2.
PARAMETER
DELAY
SPACING
LOWER LIMIT
UPPER LIMIT
49.8 s
50.2 s
55.8 s
56.2 s
11.9 S
12.1 s
NOTES
29.9 s
30.1 s
POWER OUT
1.1 kW
1.3 kW
EFFICIENCY
70%
100%
Decoded Pulse Rate
95 pps
2850 pps
Tx Pulse Rate
940 pps
2850 pps
Pulse Width
3.2 s
3.8 s
Pulse Rise Time
1.9 s
2.5 s
Pulse Fall Time
1.9 s
2.5 s
RV Local Oscillator
1.0 volts
3.0 volts
RV RF Drive
1.5 volts
4.5 volts
TD Drive
1.5 volts
2.5 volts
TD Modulation
1.5 volts
3.5 volts
PA Modulation
1.0 volts
3.5 volts
PA Drive
2.0 volts
4.8 volts
PA Output
2.0 volts
4.8 volts
TI Interrogation Level
2.7 volts
3.3 volts
Auxiliary 24 V
21 volts DC
28 volts DC
Power Amplifier HT
49.5 volts DC
50.5 volts DC
Transponder 15 V
14.6 volts DC
15.6 volts DC
Transponder 18 V
17.2 volts DC
18.6 volts DC
Driver HT
41.6 volts DC
42.4 volts DC
Typical reply efficiency is 90%unless

interrogation rate is high.
Varies with battery voltage.
A-15
HA72500
APPENDIX A
A.3
CTU FACILITIES AND OPERATING PROCEDURE
The major human interface to the DME LDB-102 is provided by the Control and Test
Unit (CTU). Although the implementation of some commands input via the CTU is
installation-specific (that is, depending on the facilities and configuration of the particular
installation) all the facilities provided by the CTU are explained here in order to give a
detailed overview of the operational control facilities available.
This procedure assumes that each individual module of the DME has been correctly
configured and setup in accordance with the alignment and adjustment procedures
described in Section 3 of this handbook.
A.3.1
"
CTU Front Panel Controls
REFER Figure A-1.

The controls on the CTU front panel can be divided into two groups; control switches
and test switches.
CONTROL SWITCHES
TEST SWITCHES
ALARM DELAY
Five multifunction test switches,

beneath display, software
programmable
RECYCLE
TIRATE
SOURCE
LOCAL
REMOTE
1 kHz
10 kHz
ESCape
MAINTENANCE
MONITOR ALARM
OFF/RESET
SELECT MAIN
NO 1
N02
A-16
HA72500
Figure A-1
APPENDIX A
CTU Front Panel
A-17
HA72500
A.3.1.1
APPENDIX A
CTU Front Panel Control Switches - Description of Operation
Each CTU front panel control switch has an indicator associated with it, indicating the
current setting of that particular switch. These do not indicate the current state of the
DME. This can be determined using the status indicators described in Section A.3.2.1.
The most recent settings of these switches are stored in EEPROM. Therefore, when
power is restored after any type of power interruption to the CTU the switch settings (and
hence the state of the DME) will return to those which were in use immediately before
the power interruption occurred.
A.3.1.1.1
ALARM DELAY Switch
The ALARM DELAY switch is a recessed 1 0-position rotary switch with positions
labelled 1 through 10. This switch selects the delay in seconds from the moment a fault
is first detected by the CTU until action is taken. The fault must be present for the
duration of this period in order for the CTU to take action following the expiry of the delay
period.
The ALARM DELAY indicator will be lit if an alarm delay of less than 4 seconds is
selected. This indicates that abbreviated postfault measurements will be performed if the
RMM System option is installed.
The CTU will respond immediately to changes in the position of this switch.
A.3.1.1.2
RECYCLE Switch
The RECYCLE switch is a pushbutton switch that toggles between two settings: ON and
OFF. When recycle is selected, the CTU will attempt to restart the main transponder 30
seconds after a complete DME shutdown. If more than three restart attempts occur
within a 5-minute period, the DME will be permanently shut down. When recycle is not
selected, no restart will be attempted if the DME is shut down. When the DME is
permanently shut down, it can only be restarted by firstly selecting OFF on the SELECT
MAIN switches (either locally or remotely, depending upon the setting of the SOURCE
switches).
The CTU will respond immediately to the operation of this switch.
A.3.1.1.3
SOURCE Switches
The SOURCE switches are two pushbutton switches labelled LOCAL and REMOTE.
These settings are mutually exclusive (either LOCAL is selected or REMOTE is selected
- they can never be both on or both off).
When set to remote mode, the DME will accept commands only from a remote source
(either an RCMS interface or an optional RMM system if installed - this is set during
system configuration). In this mode, any attempts to change the SELECT MAIN,
MAINTENANCE or MONITOR ALARM switches will result in a <<< Select LOCAL first
>>> message on the lower line of the CTU front panel display. The current setting of the
SELECT MAIN switches will remain unchanged when REMOTE is selected.
When set to local mode, the DME will allow the MAINTENANCE, MONITOR ALARM or
SELECT MAIN switches to be used. Any commands received from the remote source
will be ignored and, in the case of an RMM system, an error message will be returned to
the remote system.
The CTU will respond immediately to the operation of these switches. Their current
selection cannot be changed remotely.
If the MAINTENANCE switch is ON, attempting to select REMOTE will result in a
message << Turn INIAINTENANCE off first >> being displayed. If the MONITOR
A-18
HA72500
APPENDIX A
ALARM switch is set to INHIBIT, attempting to select REMOTE will result in the
message << Turn MON INHIBIT off first >> being displayed.
A.3.1.1.4
MAINTENANCE Switch
The MAINTENANCE switch is a pushbutton switch that toggles between two settings:
ON and OFF. The CTU will only respond to input from this switch when the SOURCE
switches are set to LOCAL. MAINTENANCE may be selected if the DME is on or off. It
may be turned off at any time by pressing the MAINTENANCE switch; it cannot be
changed remotely.
When the MAINTENANCE switch is ON, a dual DME is prevented from transferring to
the standby transponder, thus allowing the standby transponder to be tested without
alarms being generated by h modules. The main transponder may remain on-air, but will
be shut down if a primary fault occurs.
The 1kHz and 10 kHz interrogation rates (TI RATE) are only available when
MAINTENANCE is ON.
A.3.1.1.5
MONITOR ALARM Switch
The MONITOR ALARM switch is a pushbutton switch that toggles between two settings:
INHIBIT and NORMAL. The CTU will only respond to input from this switch when the
SOURCE switches are set to LOCAL. Failure to do this will result in the <<< Select
LOCAL first >>> message on the lower line of the CTU front panel display. It may be
turned off at any time by pressing the MONITOR ALARM switch; it cannot be changed
remotely.
When the MONITOR ALARM switch is set to NORMAL, the DME is able to transfer or
shut down should the monitored parameters warrant such action. When this switch is set
to INHIBIT, transfer and shutdown are prevented since the CTU will ignore the fault lines
from all monitor modules. When set to INHIBIT, it also prevents ident from being
transmitted.
A.3.1.1.6
SELECT MAIN Switches
The SELECT MAIN switches are three pushbutton switches labelled OFF, NO1 and
NO2. These settings are mutually exclusive (one and only one of them can be on at any
given time). These switches can only be used when the SOURCE switches are set to
LOCAL. Failure to do this will result in the <<< Select LOCAL first >>> message on the
lower line of the CTU front panel display. The settings of these switches can be changed
remotely when the remote mode is selected.
When OFF is selected, all modules in the transponder subracks are turned off (unless
they are being forced on by their front panel switches being in the TEST position). When
NO1 is selected, Transponder 1 is selected as the main transponder (and Transponder 2
is selected as the standby transponder in a dual DME). When NO2 is selected in a dual
DME, Transponder 2 is selected as the main transponder and Transponder 1 is selected
as the standby transponder. In a single transponder DME, the message <<< Not
available for single >>> will be displayed on the lower line of the CTU front panel display.
Note that these switches do not indicate which transponder is currently operating (for
example, even though NO1 is selected as main, the DME may have transferred to the
standby transponder due to fault conditions). The currently operating transponder may
be determined from the NO1 ON and NO2 ON status indicators, as described in Section
A.3.2.1.
A-19
HA72500
A.3.1.2
"
APPENDIX A
Test Facility - Description of Operation
REFER Figure A-1.

The test facility of the CTU is located in the top half of the CTU front panel. It provides
facilities which allow the user to measure various parameters, sample status lines, and
control and display some minor functions on the DME transponder(s). In maintenance
mode (see Section A.3.1.1.4) these facilities can also measure the more important fault
limits of the available monitor module(s).
The front panel controls and displays associated with the test facility consist of:
a. A 2x40-character liquid crystal display (LCD), which performs the following:
On the top line of the LCD, status messages and measurement results are
displayed.
On the bottom line of the LCD, labels for the five multifunction pushbuttons
are displayed. This forms the basis of the menu system described below. If a
measurement is being performed, the corresponding switch label will flash.
On the bottom line of the LCD, error messages are displayed. These are
flashed four times at one-second intervals before returning to the previous
display.
b. Five multifunction pushbuttons mounted directly below the LCD display, which
are used to select the action, or select the next menu indicated by the label
above it. These may also be referred to as 'softkeys' throughout the remainder of
this Appendix.
c. ESC (escape) pushbutton, which is used to return to the top level menu.
d. Two TI RATE pushbuttons which select the pulse repetition frequency of the test
interrogator module. The two buttons are:
1kHz.
Toggles the test Interrogation rate (TIPRF) of the test interrogator between
1kHz and 50 Hz (dual DME) or 100 Hz (single DME). This button can only be
operated while the CTU is in maintenance mode and the test interrogator/
monitor modules to be affected has been selected at the top menu. The
active TIPRF rate will be displayed in the top right hand corner of the test
display once the test interrogator/monitor module has been selected from the
menu.
10 kHz.
Is only active while held pressed and selects the 10 kHz test interrogation
rate of the test interrogator module. When the button is released the test
interrogation rate returns to the previously active rate (50 Hz, 100 Hz, or
1 kHz). This button can only be operated while the CTU is in maintenance
mode and the test interrogator/monitor module to be affected has been
selected at the top menu. The active TIPRF rate will be displayed in the top
right hand corner of the test display once the test interrogator/monitor module
has been selected from the menu.
If either of these buttons are pressed when MAINTENANCE switch is OFF, the message
<<< Select MAINTENANCE first >>> will be displayed on the lower line of the CTU front
panel display.
A-20
HA72500
"
APPENDIX A
A.3.1.3
Test Facility - Menu System
A.3.1.3.1
Menu System - Introduction
REFER Figure A-2 and Figure A-3.

The menu system on the CTU allows the implementation of a multifunction test control
system with the minimum of controls and prompts the user with the allowable
combinations. The menus are arranged in an hierarchical system, and the behaviour,
display and choices offered by the menus are modified if maintenance mode is selected.
When the MAINTENANCE switch is not selected (MAINTENANCE indicator is off) the
system is in an operational mode. The menu structure is as shown in Figure A-2 and the
user is allowed to:
a. Perform and display measurements from both transponder monitoring systems
(test interrogator/monitor modules) at the same time. The name of the parameter
being measured, the measured value for each channel (transponder), the unit of
measurement and the pulse repetition rate of the test interrogator are shown on
the top line of the front panel display. A typical parameter display is as shown
below (but with the tiprf field blank). The tiprf is displayed only in maintenance
mode.
Name
Delay
Ch1
Ch2
unit
tiprf
50.1
50.1
100
b. Perform and display measurements that do not interfere with the operation of the
transponder.
c. Display and reset the number of transponder restarts that have occurred.
d. Modify the display on the alarm register to display only those alarms that apply to
a particular transponder. (Otherwise the alarms from both transponders are
ORed together for the display.)
e. Select the ident source or test tone for the internal CTU speaker.
f.
Select the ident source for external audio drive.
g. Test the CTU front panel LED indicators.

h. Display the software version installed in the CTU.
When MAINTENANCE is selected ON, the MAINTENANCE indicator is on and
equipment is in the maintenance mode. The menu structure is as shown in Figure A-3
and the user is allowed to:
a. Perform and display measurements from the selected transponder monitoring
system (test interrogator/monitor module), with the parameter display appearing
as shown above (but with only one parameter value displayed - that from the
selected monitoring system). Tiprf is displayed in this mode.
b. Perform and display measurements that may interfere with the operation of the
transponder (for example - 1kHz and 10 kHz test interrogation rate tests).
c. Perform the monitor module fault limit tests, which interfere with the normal
operation of the DME
A-21
HA72500
Figure A-2
APPENDIX A
Menu Structure in Operational Modes
A-22
HA72500
Figure A-3
APPENDIX A
Menu Structure in Maintenance Mode
A-23
HA72500
APPENDIX A
A.3.1.3.2
Menu System in Operational Mode
A.3.1.3.2.1
Measurement Class Selection (Top Level Menu)
CTU Display
Keys
LDB-102DME
Param
Level
PS.Volt
Status
Misc.
a.
b.
c.
d.
e.
Actions performed when the corresponding softkey is pressed:

a. Change display to the first of four parameter select menus (see A.3.1.3.2.2.1).
b. Change display to first of two signal level select menus (see A.3.1.3.2.3.1).
c. Change display to power supply select menu (see A.3.1.3.2.4).
d. Change display to status select menu (see A.3.1.3.2.5).
e. Change display to first of three miscellaneous selection menus (see
A.3.1.3.2.6.1).
A.3.1.3.2.2
Transponder Parameter Selection
A.3.1.3.2.2.1 Parameter Select - First Menu

CTU Display
Keys
Spacing
Delay
Pwr.Out
Effncy
NEXT
a.
b.
c.
d.
e.
Actions performed (for each of the monitor/test interrogator modules fitted) when the
corresponding softkey is pressed
a. Measure and display 'Spacing' parameter.
b. Measure and display 'Delay' parameter.
c. Measure and display 'Power Out' parameter.
d. Measure and display 'Efficiency' parameter.
e. Change display to second parameter select menu (see A.3.1.3.2.2.2).
A.3.1.3.2.2.2 Parameter Select - Second Menu

CTU Display
Keys
D.Rate
Tx.Rate
a.
b.
c.
PREV
NEXT
d.
e.
corresponding softkey is pressed:
a. Measure and display 'Decoded Rate' parameter.
b. Measure and display 'Transmit Rate' parameter.
c. No action.
d. Change display to first parameter select menu (see A.3.1.3.2.2.1).
e. Change display to third parameter select menu (see A.3.1.3.2.2.3).
A-24
HA72500
APPENDIX A
A.3.1.3.2.2.3 Parameter Select - Third Menu

CTU Display
Keys
Width
Rise
Fall
PREV
NEXT
a.
b.
c.
d.
e.
a. Measure and display 'Transmit Pulse Width' parameter.
b. Measure and display 'Transmit Pulse Rise Time' parameter.
c. Measure and display 'Transmit Pulse Fall Time' parameter.
d. Change display to second parameter select menu (see A.3.1.3.2.2.2).
e. Change display to fourth parameter select menu (see A.3.1.3.2.2.4).
"
NOTE
It is the characteristics of the second transmitted pulse that are measured and
displayed
A.3.1.3.2.2.4 Parameter Select - Fourth Menu

CTU Display
Keys
V Cal
R cal
T cal
PREV
a.
b.
c.
d.
e.
a. Measure and display Voltage Test Signal' parameter.
b. Measure and display 'Rate Check Signal' parameter.
c. Measure and display 'Time Check Signal' parameter.
d. Change display to third parameter select menu (see A.3.1.3.2.2.3).
e. No action.
A-25
HA72500
A.3.1.3.2.3
APPENDIX A
Transponder Signal Level Selection
A.3.1.3.2.3.1 Signal Level Select - First Menu

CTU Display
Keys
RV.Osc
RV.RF
TD.Drv
TD.Mod
NEXT
a.
b.
c.
d.
e.

a. Measure and display 'Oscillator RF Level' parameter, from receiver video
module(s).
b. Measure and display Tx RF Drive Level' parameter, from receiver video
module(s).
c. Measure and display7D Drive Level' parameter, from transmitter driver
module(s).
d. Measure and display 'Pulse Modulation Level' parameter, from transmitter driver
module(s).
e. Change display to second signal level select menu (see A.3.1.3.2.3.2).
A.3.1.3.2.3.2 Signal Level Select - Second Menu

CTU Display
Keys
PA.Mod
PA.Drv
PA.Out
TI.RF
PREV
a.
b.
c.
d.
e.

a. Measure and display 'RF Modulation Level' parameter, from Power Amplifier
Module(s).
b. Measure and display 'RF Drive Level' parameter, from Power Amplifier
Module(s).
c. Measure and display 'Power Output RF Level' parameter, from Power Amplifier
Module(s).
d. Measure and display 'RF Drive Level' parameter, from Test Interrogator
Module(s).
e. Change display to first signal level select menu (see A.3.1.3.2.3.1).
A-26
HA72500
A.3.1.3.2.4
APPENDIX A
Power Supply Voltage Selection
CTU Display
AUX.24V
PA.HT
TP.15V
TP.18V
Drv.HT
a.
b.
c.
d.
e.
Keys

a. Measure and display +24 Volt input Supply' parameter, from monitor module(s).
b. Measure and display Power Amplifier HT Supply' (nominal 50 volts) parameter,
from 1kW PA power supply module(s).
c. Measure and display +1 5 Volts Transponder Supply' parameter, from
transponder power supply module(s).
d. Measure and display +18 Volts Transponder Supply' parameter, from
transponder power supply module(s).
e. Measure and display Driver HT Transponder Supply' (nominal 42 volts)
parameter, from transponder power supply module(s).
A.3.1.3.2.5
Status Selection
CTU Display
Keys
MON PS
RV PS
TI PS
RV TRIG
a.
b.
c.
d.
e.

a. Sample and display Monitor Power Status' parameter, from monitor module(s).
b. Sample and display 'Receiver Video Power Status' parameter, from monitor
module(s).
c. Sample and display Test Interrogator Power Status' parameter, from test
interrogator module(s).
d. Sample and display 'Receiver Video Triggers Normal Status' parameter, from
monitor module(s).
e. No action.
A-27
HA72500
A.3.1.3.2.6
APPENDIX A
Miscellaneous Selection
A.3.1.3.2.6.1 Miscellaneous - First Menu

CTU Display
Keys
Restart count = xxx

Reset
Alarm1
a.
b.
c.
(where 'xxx' is the restart count)
Alarm2
NEXT
d.
e.

a. Change display to submenu, to ask the user 'Are you sure T; if the response is 9
yes' then reset the' RESTART COUNT' both in RAM and EEPROM, otherwise
return to this menu.
b. No action.
c. On the alarm register, display only those alarms that apply to Transponder 1
while this button is held down.
d. On the alarm register, display only those alarms that apply to Transponder 2
while this button is held down.
e. Change display to second miscellaneous select menu (see).
A.3.1.3.2.6.2 Miscellaneous - Second Menu

CTU Display
Keys
LEDTst
Version
a.
b.
c.
PREV
NEXT
d.
e.

a. While the pushbutton is pressed, switch on all the CTU front panel LED
indicators, returning to the previous display when the pushbutton is released.
b. Display the version number of the software installed in the CTU (component
reference D1 7 on the CTU processor board).
c. No action.
d. Change display to first miscellaneous select menu (see A.3.1.3.2.6.1).
e. Change display to third miscellaneous select menu (see A.3.1.3.2.6.3).
A-28
HA72500
APPENDIX A
A.3.1.3.2.6.3 Miscellaneous - Third Menu

CTU Display
Ident Source : xxx

Mon 1
Mon 2
2240Hz
OFF
PREV
a.
b.
c.
d.
Keys
(where 'xxx' is the current audio source for the internal CTU speaker)
e.

a. Select the Monitor 1 audio source.
b. Select the Monitor 2 audio source.
c. Select 2240 Hz as the audio source.
d. Turn audio source off.
e. Change display to second miscellaneous select menu (see A.3.1.3.2.6.2).
A.3.1.3.3
Menu System in Maintenance Mode
A.3.1.3.3.1
TI/Monitor Selection (Top Level Menu)
CTU Display
Keys
LDB-102 DME - Maintenance Mode

Ch.1
Ch.2
a.
b.
c.
d.
e.

a. Select test interrogator/monitor module No. 1 to be used for subsequent
measurements, enable high test interrogation rates, and change display to
maintenance measurement class select menu (see A.3.1.3.3.2).
b. Select test interrogator/monitor module No. 2 to be used for subsequent
measurements, enable high test interrogation rates, and change display to
maintenance measurement class select menu (see A.3.1.3.3.2).
"
NOTE
This option is only offered if 'dual' operation is selected on option switch S1 on

the CTU processor board - see Section A.5.1.1. If 'single' operation is selected,
no action is performed.
c. No action.
d. No action.
e. No action.
A-29
HA72500
A.3.1.3.3.2
APPENDIX A
Measurement Class Selection
CTU Display
Keys
Param
Level
PS.Volt
Status
F1tLimit
a.
b.
c.
d.
e.

a. Change display to first parameter select menu, same menu as when
maintenance is not selected, except that only one value is measured and
displayed (see A.3.1.3.2.2.1). For the 'Efficiency' measurement submenu of the
'Param' selection, see A.3.1.3.3.2.2.
b. Change display to first signal level select menu, same menu as when
displayed (see A.3.1.3.2.3.1).
c. Change display to first power supply select menu, same menu as when
displayed (see A.3.1.3.2.4).
d. Change display to first status select menu, same menu as when maintenance is
not selected, except that only one value is measured and displayed (see
A.3.1.3.2.5).
e. Change display to monitor fault limit select menu (see A.3.1.3.3.2.1).
A.3.1.3.3.2.1 Monitor Fault Limit Select Menu

When an option is selected from this menu the selected fault limit test will be performed
once, on the selected monitor module, and the results will be displayed. Upper limit will
be displayed on the left hand side of the display, and the lower limit will be displayed on
the right hand side. If no limit is applicable to the parameter selected, 'N/A' will be
displayed.
CTU Display
Keys
Delay
Spacing
Effncy
Tx.Rate
Ant.Pwr
a.
b.
c.
d.
e.

a. Perform the Delay fault limit test once.
b. Perform the Spacing fault limit test once.
c. Perform the Efficiency fault limit test once.
d. Perform the Transmit Rate fault limit test once.
e. Perform the Antenna Power fault limit test once.
A-30
HA72500
APPENDIX A
A.3.1.3.3.2.2 Efficiency Reading Select Menu

CTU Display
Keys
1kHz
Effncy
Hi Eff
Lo Eff
PREV
a.
b.
c.
d.
e.

a. Perform a normal Efficiency measurement, alternating high and low level test
interrogations, using the selected test interrogator/monitor modules.
b. Perform an Efficiency measurement, using high level only test interrogations, in
the selected test interrogator/monitor modules.
c. Perform an Efficiency measurement, using low level only test interrogations, in
the selected test interrogator/monitor modules.
d. Return to the first parameter select menu (see A.3.1.3.2.2.1).
e. No action.
A-31
HA72500
A.3.2
"
APPENDIX A
CTU Front Panel Indicators
REFER Figure A-1.
A.3.2.1
Status Indicators
There are six status indicators on the CTU front panel:
NO1 ON (green).
Will be lit if Transponder 1 is powered on and is the currently operating
transponder. This does not indicate that Transponder 1 is selected as main.
NO2 ON (green).
Will be lit if Transponder 2 is powered on and is the currently operating
transponder. This does not indicate that Transponder 2 is selected as main.
NORMAL (green).
The DME will be in the normal state when the selected main transponder (that is,
the transponder selected using the SELECT MAIN switches) is on and operating.
The DME is not in the normal state if the MONITOR ALARM switch is set to
INHIBIT or the MAINTENANCE switch is ON or if any alarms are present.
TRANSFER (yellow).
The DME will be in the transfer state if it is a dual DME and the standby
transponder is on and operating (the standby transponder is the transponder that
is not selected as main on the SELECT MAIN switches).
SHUTDOWN (red).
The DME will be in the shutdown state when all transponders are off due to a
fault condition and the SELECT MAIN switches are set to either NO1 or NO2.
This is an alarm condition.
MAINTENANCE (red).
The DME will be in the maintenance mode when the MAINTENANCE switch is
set to ON. Only when this indicator is lit is the DME actually in the maintenance
mode - under certain conditions there may be a slight delay between the setting
of the MAINTENANCE switch and the DME entering or leaving the maintenance
mode.
Three of these indicators (NORMAL, TRANSFER, and SHUTDOWN) are mutually

exclusive - only one of these may be on at any given time (although they may all be off
in the case of the selected main transponder being on and operating with monitor alarms
inhibited, or if selected OFF at the SELECT MAIN switches).
A.3.2.2
Power Status Indicators
There are four POWER status indicators on the CTU front panel:
BATT LOW (red).

Low battery voltage is detected by comparing the 24 volts auxiliary supply
against a predefined threshold (an internal CTU setting - see Section A.5.1.2). If
a transponder is on, and low battery voltage is detected, the transponder will be
shut down to prevent the batteries discharging completely.
BATT CHG 1 (green).

If battery charger 1 is on and operating then this status indicator is on. One of the
battery chargers must be 'normal' for the CTU to power up the transponders,
after a 'battery low voltage' shutdown.
BATT CHG 2 (green).

If battery charger 2 is on and operating then this status indicator is on.
A-32
HA72500
APPENDIX A
AC PWR NORM (green).

If AC power is being applied to battery charger 1, then this status indicator will be
on.
A.3.2.3
Test Status Indicators
There are two TEST status indicators on the CTU front panel:
MODULES (red).
Will be on if any one of the transponder modules has its control switch out of the
NORMAL position.
ANT RELAY (red).

Will be on if the antenna control switch is not in the NORMAL position. The
antenna test switch is located on the RF panel behind the CTU, and can be
accessed from the rear of the rack.
A.3.2.4
Alarm Register
The ALARM REGISTER display indicates the faults (in all transponders) that were
present at the time the most recent shutdown or transfer decision was made by the CTU.
The alarms corresponding to individual transponders can be selected from the menu
system (see Section A.3.1.3.2.6.1).
In a single DME, the alarms shown on this display are derived from the monitor faults.
In a dual DME, the alarms shown on this display are the result of the monitor 'voting'
specified on the internal option switch S2 on the CTU processor board (see Table A-4).
This display is cleared when the main transponder is selected from the OFF state.
There are 12 alarm register indicators on the CTU front panel; all of them are red.
INDICATOR
COLOUR
FAULT TYPE
DESCRIPTION
DELAY
Red
Primary
Monitor delay fault status from both transponders
SPACING
Red
Primary
Monitor spacing fault status from both transponders
EFFICIENCY
Red
Secondary
Monitor efficiency fault status from both transponders
TX RATE
Red
Secondary
monitor transmit rate fault status from both transponders
POWER
Red
Secondary
Monitor RF power fault status from both transponders
IDENT
Red
Secondary
Monitor ident fault status from both transponders
PULSE SHAPE
Red
Secondary
Monitor pulse shape fault status from both transponders
ANTENNA
Red
Secondary
monitor antenna fault status from both transponders
PRIMARY
Red
SECONDARY
Red
MONITOR
Red
Primary
Monitor delay fault status from both transponders
CTU
Red
Primary
CTU watchdog or software fault
A.3.2.5
Primary
Secondary
Primary fault status from both transponders; ORed from

the primary faults
Secondary fault status from both transponders; ORed
from the secondary faults
Control Switch Indicators
Each of the front panel control switches described in Section A.3.1.1 has an indicator
associated with it to indicate the state of the controls, whether the DME is under remote
or local control.
A-33
HA72500
A.4
APPENDIX A
OPERATOR CONTROLS AND INDICATORS
Information on CTU controls and indicators are contained in Sections A.3.1 and A.3.2
respectively. The front panel controls and indicators on the main transponder modules
are listed in Table A-3, following.
Table A-3
Transponder Front Panel Controls and Indicators
MAJOR ASSEMBLY/
SUBASSEMBLY
TYPE
NAME
No.
1A72510
Monitor
Module

TYPE
Toggle
switch
LEGEND
MONITOR
OUTPUTS
FAILED
NORMAL
Green LED
Green LED
Green LED
Green LED
Green LED
Green LED
Green LED
Green LED
Yellow LED
DELAY
SPACING
EFFICIENCY
RATE
POWER
IDENT
ANTENNA
SHAPE
SELF TEST
Red LED
PRIMARY
Yellow LED SECONDARY
Red LED
TEST
Green LED POWER ON
1A72514
Test
Interrogator
Test jack
ERP PULSE
Test jack
ERP EARTH
Test jack
+15V
Test jack
+5V
Test jack
EARTH
Red LED
TEST
Green LED DC POWER ON
All monitor outputs are set to

their fault condition (high)
which invokes a FAILED
condition for all front panel
indicators and all fault lines
read by the CTU. The TEST
indicator is turned on.
Monitor module operates
normally and TEST indicator is
off.
When on, indicates that the named

parameter is within preset limits.
Indicates that the CTU is performing a

Monitor Self Test, during which the CTU will
look for the two primary parameters in the
fault state.
Indicates that one or both of the primary
parameters (Delay or Spacing) are outside
preset limits.
Indicates that one or more of the six
secondary parameters (Efficiency, Rate, RF
Power, ident, Antenna, Shape) are outside
preset limits.
Indicates that the MONITOR OUTPUTS
Indicates that DC power is applied to the
monitor.
Detected pulse waveform of transmitted
pulse - sampled near the antenna and fed
into the ERP IN connector.
Earth reference for the ERP PULSE test
jack signal.
Buffered output of the internally generated
+15 volts.
Buffered output of the internally generated
+5 volts.
Common earth of the power supplies, the
internally generated supplies, and all input
and output signals.
Indicates that the MONITOR AND
INTERROGATOR DC POWER switch is not
in the NORMAL position.
monitor and test interrogator.
A-34
HA72500
MAJOR ASSEMBLY/
SUBASSEMBLY
TYPE
NAME
No.
APPENDIX A
TYPE
LEGEND
Pushbutton CHECK
switch
DETECTOR
COINCIDENCE
Toggle
switch,
centre off
Toggle
switch,
centre off
16-way
rotary
switches
Toggle
switch,
centre off
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Test jack
Connects the output of the RF generator into

the reply detector, bypassing the
transponder. Is used to check that the
detector stages in the transponder have the
same delay. The signals at the
INTERROGATIONS TIMING and REPLY
TIMING test jacks should match each other
when this switch is pressed. This switch will
interfere with the normal operation of the
monitor module connected to the test
interrogator under test.
TEST
REJECT +2s
Afters the interrogating
TRANSPONDER
pulse spacing outside
DECODING
acceptable limits to test
-2s
the transponder pulse
decoder rejection.
ACCEPT +1s
Alters the interrogating
pulse spacing within
acceptable limits to test
-1s
the transponder pulse
decoder acceptance.
REPLY GATE
Sets accept gate timing; variable between 0
DELAY
and 60 microseconds.
COARSE 16 microseconds increments.
FINE
1 microsecond increments.
MONITOR AND
ON
The power supply output is
INTERROGATOR
connected to the test interrogator
DC POWER
and monitor regardless of other
power sources.
OFF
The power supply is
disconnected from the test
interrogator and monitor.
NORMAL The test interrogator circuitry is
connected to the power supply if
the input signal TI-ON from the
CTU is active (high) or
TRANSPONDER POWER on the
transponder power supply is
switched ON. Otherwise, the
module's circuitry is isolated from
the power supply.
TRIGGER
Buffered version of test interrogator output
TI-PRF; can be used to trigger an
oscilloscope.
EARTH
Common earth of all supply voltages and
outputs.
REPLY ACCEPT Buffered pulse from the parameter extractor
GATES
circuitry, defining a time slot in which the
received reply pulse should be present (15
volts, 6 microseconds wide).
1 s MARKERS
Buffered output from the timer circuitry (5
volts, 1 microsecond period).
+15V
Buffered +1 5V internal supply (15 volts).
+5V
Protected +5V internal supply (5 volts).
DETECTED
Buffered output of the reply detector, which
REPLIES
is a detected pulse envelope representing
the RF pulses transmitted from the
transponder.
DETECTED
Buffered detected pulse envelope
INTERROrepresenting the RF pulse generated by the
GATIONS
test interrogator for test interrogation.
A-35
HA72500
MAJOR ASSEMBLY/
SUBASSEMBLY
TYPE
NAME
No.
APPENDIX A
TYPE
Test jack
EARTH
Test jack
EARTH
Test jack
INTERROGATIONS
TIMING
EARTH
Test jack
1A72520
Receiver
Video
LEGEND
Test jack
REPLY TIMING
Yellow LED REPLIES
INHIBITED
Red LED
TEST

16-position
switches
16-position
switch
Toggle
switch
centre off
BEACON DELAY
REPLY PULSE
SEPARATION
IDENT
outputs.
outputs.
Output pulses from the RF generator
detector.
outputs.
Buffered output pulses of the reply detector.
Flashes on and off when the receiver video
is being over-interrogated.
On continuously when replies are inhibited.
Indicates that the IDENT switch is not in the
NORMAL position.
module.
COARSE Sets the Delay parameter of the
receiver video.
FINE
Sets the Spacing parameter of the receiver
video.
NORMAL
Normal mode of
operation.
OFF
CONTINUOUS
Toggle
switch,
spring
loaded to
centre off
Test jack
INHIBIT
INTERROGATIONS
No ident is generated.
Ident is generated
continuously.
All interrogations are inhibited.
TEST REPLY
RATE MONITOR
Transponder replies are inhibited, and

squitter reduced to 810 Hz.
SDES PULSE
Buffered output from the double pulse

decoder, which gives the short distance
echo suppression pulse to the on-channel
gating logic (15 volts, 2.5 microseconds
wide, one pulse per correctly decoded pulse
pair).
Buffered output from the dead time
suppressor showing the period of long
distance echo suppression and when it is
active (15 volts, selectable length, selectable
trigger level).
Buffered output of the double pulse decoder
indicating a pulse pair has been correctly
decoded (15 volts, 2.5 microseconds wide,
one pulse per each valid interrogation).
Buffered output from the dead time
generator shows the period of dead time
and when it is active (15 volts, selectable
length).
Buffered output from the double pulse
encoder buffer to the transmitter driver. This
output is normally high, and goes low during
TX MODULATION TRIGGERS (0-15 volts,
2.5 microseconds wide pulses in pulse pairs
separated by 12 or 36 microseconds,
minimum rate 945 PPPS, maximum rate
3000 PPPS).
DC output proportional to the drive level out
of the RF source.
Test jack
LDES PULSE
Test jack
DOUBLE PULSE
DECODER OUT
Test jack
DEAD TIME
Test jack
TRIGS TO
MODULATOR
Test jack
LOCAL OSC
LEVEL
A-36
HA72500
MAJOR ASSEMBLY/
SUBASSEMBLY
TYPE
NAME
No.
APPENDIX A
TYPE
LEGEND
Test jack
Test jack
+15V
EARTH
Test jack
EARTH
Test jack
RF LEVEL
Test jack
ON CHANNEL
VIDEO
Test jack
EARTH
Test jack
1A72525
Transponder
Power
Supply
DETECTED LOG
VIDEO
Green LED POWERON
Red LED
TEST
Toggle
switch,
centre off
TRANSPONDER
DC POWER
Test jack
+24V IN
Test jack
HT
Test jack
+1 5V
Test jack
EARTH
Test jack
+18V
Test jack
SWITCHED
+24V
SUPPLY
CURRENT+
SUPPLY
CURRENT-
Test jack
Test jack
1A72530
Transmitter
Driver

Red LED
TEST
Variable
resistor
Toggle
switch
RF OUTPUT
Test jack
SQUARE PULSE
MODULATION
DRIVER DC
POWER
Buffered output from the +1 5V regulator.
outputs.
outputs.
DC output proportional to the output TX RF
DRIVE.
Buffered output of the narrow band detected
on-channel gate from the IF amplifier (15
volts pulses forming an envelope around the
detected log video pulses, normally 3
microseconds wide).
outputs.
Buffered output from the wideband
logarithmic amplifiers of the IF amplifier.
Indicates that power is applied to the
module.
Indicates that the TRANSPONDER POWER
ON
All supply outputs are on,
regardless of CTU commands.
This is required during testing
and maintenance.
OFF
All power supply outputs are oft.
NORMAL Power supply outputs are under
CTU control.
The input voltage from the power
supply/battery.
HT output to the Transmitter Driver
1A72530.
+15 volts output to the Transmitter
Driver1A72530.
Ground reference for +24V IN, HT, +1 8V
and+15V, which is connected to the power
+24V IN return.
+18 volts output to the Transmitter
Driver1A72530.
The switched +24 volts output.
These test jacks are connected to either
side of a resistor in series with the input
+24V IN. The + is connected to the higher
voltage side of the resistor, and the - jack to
the lower voltage side (100 mV/ampere).
Indicates that 15 volts output from the
transponder power supply is applied to the
module.
Indicates that the DRIVER DC POWER
switch is not in the NORMAL position or that
internal switches S2 and S3 are incorrectly
set.
Adjusts the RF from the module.
OFF
Turns off the pulse modulation to

the second stage of the exciter.
NORMAL Normal operation.
A buffered low-level modulation pulse output
representing the signal from the pulse
shaper to the second stage of the exciter.
A-37
HA72500
MAJOR ASSEMBLY/
SUBASSEMBLY
TYPE
NAME
No.
1A72540
1kW PA
Power
Supply
APPENDIX A
TYPE
LEGEND
Test jack
FUNCTION
GENERATOR
The buffered output of the pulse-shaping

integrator on the pulse shaper.
Test jack
SHAPED PULSE
MODULATION
Test jack
Test jack
+15V
EARTH
Test jack
EARTH
A buffered high-level modulation output

representing the signal from the pulse
shaper to the modulation stage.
The buffered input + 1 5V supply.
outputs.
outputs.
Indicates that DC power is supplied to the
module.
Indicates that the AMPLIFIER POWER
Indicates that the HT supply is available,
and within limits.
ON
HT output voltage is supplied to
the1kW RF power amplifier
regardless of the power control
signal state. This is required only
during testing and maintenance.
OFF
There is no power output from
the1kW PA power supply.
NORMAL There is HT output from the
module while the power control
signal from the CTU is active
(high); if it is inactive (low) the HT
output is set to0 volts.
Buffered output signal from the modulation
stage of the 1kW RF power amplifier.
Green LED POWERON

Red LED
TEST
Green LED HT ON
Toggle
switch,
centre off
AMPLIFIER
POWER
Test jack
POWER AMP
MODULATOR
OUT
POWER AMP
OUTPUT OUT
POWER AMP
DRIVER OUT
+15V
SUPPLY
CURRENTSUPPLY
CURRENT +
Test jack
Test jack
Test jack
Test jack
Test jack
2A72547
RF Panel
PWB
Assembly
(Dual)
Test jack
EARTH
Test jack
Test jack
Test jack
+24VIN
HT OUT
SHAPED PULSE
MODULATION
TPNDR2
Toggle
switch,
centre off
TPNDR1
NORMAL
Buffered output signal from the output stage

of the1kW RF power amplifier.
Buffered output signal from the driver stage
of the1kW RF power amplifier.
Internally generated +15V supply (15 volts).
These jacks are connected to either side of
a resistor in series with the +24V IN supply.
The + side of the jack is buffered the to jack
higher voltage resistor, and the - jack to the
lower voltage side (1 mV/ampere).
A ground reference for the +24V IN, HT
OUT and+15V OUT supplies, which is
connected to the+24V IN return.
Buffered +24V IN power supply input.
Buffered HT output.
Buffered signal modulation pulse.
The output of Transponder 2 is fed directly
to the antenna.
The output of Transponder 1 is fed directly
to the antenna.
The CTU controls which transponder output
is fed to the antenna.
A-38
HA72500
APPENDIX A
A.5
MODULE PRESET CONTROLS, SWITCHES, LINKS AND
INDICATORS
This section lists all the preset controls, switches, links and indicators that are located
internally on the equipment (that is, not accessible at the front panel). These are used to
set up operating conditions and functional modes of the equipment either prior to
commissioning or as part of alignment or adjustment procedures.
The major mode selection functions are selected by CTU internal controls, which are
described in Section A.5.1. The internal indicators of the CTU are described in Section
A.5.2. The internal controls for the transponder modules and boards are described in
Section A.5.3.
"
A.5.1
CTU Internal Controls
A.5.1.1
Option Switches
REFER Figure A-4.

There are two 8-way dual-in-line switches (S1 and S2) located on the CTU Processor
PWB Assembly (1A72552). These switches are used to modify the CTU's behaviour for
key functions, as described in Table A-4.
A-39
HA72500
Table A-4
SWITCH
S1
S2
APPENDIX A
CTU Processor Board Option Switch Settings
FUNCTION SELECTED
IF SWITCH ON IF SWITCH OFF
DESCRIPTION OF FUNCTION
SW1
Normal
Operation
Production
Tests
SW2
NMP
Present
NOTE
No NMP
SW3
No action
SW4
No action
SW5
No Statistics
Menu
SW6
No action
SW7
No action
SW8
SW1
Single
Main AND
Vote
Subtract from
MFLT2 delay
Add to MFLT2
delay
Delay
Statistics Menu
Available
Subtract from
MFLT1 delay
Add to MFLT1
delay
Dual
Main OR Vote
SW2
Standby
AND Vote
Standby OR
Vote
SW3
RMM
Control
Standby
COLD
RCMS Control
1 -element
Antenna
Fault Not
Installed
1 -element
Antenna
Fault No
Action
2-element
Antenna
Fault Not
Installed
2-element
Antenna
Fault No
Action
1-element
Antenna Fault
Installed
Subtracts 0.1 microseconds from delay monitor fault limit

readings (see alignment procedure) on Monitor Module 1.
Adds 0.1 microseconds to delay monitor fault limit
readings(see alignment procedure) on Monitor Module 1.
Select single or dual transponder operation.
In a dual transponder this selects the type of voting to be
used between the monitor module fault lines when the
selected 'main' transponder is ON. This has no effect in a
single transponder.
In a dual transponder, this selects the type of voting to be
used between the monitor module fault lines when the
designated 'standby' transponder is ON. This has no effect
in a single transponder.
When remote control is selected on the front panel, this
switch selects the source of that remote control.
In a dual transponder, this selects power OFF (for COLD)
or ON (for WARM) on the transponder that is not in use.
Independent of the state of this switch, power is switched
OFF to the transponder(s) if there is a primary fault, or
maintenance mode is selected, or the transponders are
selected OFF on the CTU front panel. This switch has no
effect in a single transponder.
Used to tell the CTU if one antenna element fault detection
hardware is absent or installed. If installed, it can be used
to display the fault if one is detected.
1 -element
Antenna Fault
Action
Used to tell the CTU if the one antenna element fault

detection hardware is to be ignored, or treated as a
secondary fault.
2-element
Antenna Fault
Installed
Used to tell the CTU if two antenna element fault detection

hardware is absent or installed. If installed, it can be used
to display the fault if one is detected.
2-element
Antenna Fault
Action
Used to tell the CTU if the two antenna element fault

detection hardware is to be ignored, or treated as a
secondary fault.
SW4
SW5
SW6
SW7
SW8
Standby
WARM
Used to select normal operation of the CTU or test routines

that are used (in association with a test jig) during
production testing.
Indicates if Navaid Maintenance Processor (NMP) used in
the RMM system is fitted.
If S1:2 Is set to ON (NMP Present), but no NMP Is
connected, there may be a significant delay before the
CTU responds to any commands.
Subtracts 0.1 microseconds from delay monitor fault limit
readings (see alignment procedure) on Monitor Module 2.
Adds 0.1 microseconds to delay monitor fault limit readings
(see alignment procedure) on Monitor Module 2.
Enables mean and standard deviation statistics to be
accumulated for delay readings.
A-40
HA72500
A.5.1.2
"
APPENDIX A
Low Voltage Shutdown Preset
REFER Figure A-4.

This adjustable preset control (R32) is used to set the lower limit of the battery voltage
for normal transponder operation. This limit is adjustable between 19 volts and 22 volts.
If the battery voltage fails below this limit, the transponders are switched off. Normal
operation is restored when the battery voltage rises above this limit and either battery
charger is normal. There is a small amount of hysteresis in the comparator to mask
noise that may be present.
A.5.1.3
"
Internal Speaker Volume Preset
REFER Figure A-4.

This preset control (R33) is used to adjust the audio volume from the internal CTU
speaker (B1), and is located on the CTU processor board. A test tone of 2440 Hz may
be selected from the menu system or via link XN8 on the CTU processor board. The
internal speaker is normally used for recovered ident tone.
A.5.1.4
"
Internal Test Jumpers
REFER Figure A-4.

The internal CTU jumpers are used during production or field test procedures. XN5 and
XN10 may be fitted, depending on the installation configuration. For normal operation, all
other test jumpers should be removed.
Table A-5
CTU Processor Board Test Jumpers
JUMPER
FUNCTION
MA IDENT OUTPUT
If fitted, connects ASSOC_IDENT_OUT + (XB1:1 on External

I/O PWB Assembly to ground. To be fitted, as required, for
Interfacing to the ident circuitry of an associated navaid.
XN6
WATCHDOG DISABLE
Only fitted during fault finding - prevents watchdog circuitry

from regularly resetting the processor, which may happen
during faulty operation of the CTU processor.
XN7
SIGNATURE ANALYSIS
Only fitted during fault finding - causes the processor to cycle

through all its addresses, without running the software in the
ROM.
XN8
IDENT TEST
Only fitted during fault finding - causes 2440 Hz test tone to

be fed to the internal CTU speaker.
XN9
WATCHDOG TEST
Only fitted during fault finding - used to test that the watchdog
circuit can reset the CTU processor. When this is fitted, the
processor cannot reset the watchdog circuit.
XN10
ASSOC IDENT INPUT
When fitted, provides a 10 kilohms pullup on

ASS0C_IDENT_IN (XB1:4 on the External I/O PWB
Assembly) 20 24 volts. To be fitted, as required, for
interfacing to the ident circuitry of an associated navaid.
A.5.1.5
"
NAME
XN5
LCD Viewing Angle Preset
REFER Figure A-5.

This preset control (R1) is located on the CTU front panel board and is used to adjust
the LCD viewing angle for the best display readability. To be adjusted, if required, to give
best contrast on the display when viewed from the normal angle.
A-41
HA72500
A.5.1.6
"
APPENDIX A
Alarm Power On Inhibit Switch
REFER Figure A-5.

This preset rotary switch (S11) is read by the software to determine the period to ignore
transponder alarms, after a transponder has been switched on, for cold standby. The
delay can be preset between 2 and 20 seconds in 2-second steps. (The delay, in
seconds, is 2 times the switch setting, plus 2)
"
NOTE
For warm standby operation the alarm power on delay is preset to 2 seconds,
and is independent of this switch
A.5.1.7
"
External Ident Level Preset
REFER Figure A-6.

This preset control (R1) is used to adjust the output audible level of the recovered ident
signal. It is located on the RCMS interface board.
A.5.2
CTU Internal Displays
Internal status indicators are provided to display useful information during production
tests and normal operation.
A.5.2.1
"
CTU Processor Board
REFER Figure A-4.

The indicators provided on the CTU processor board are:
H1 Driven from A19 address line.
H2 Driven from A16 address line.
H3 Not used.
H4 ROM Test OK - performed when the processor is reset.
H5 Not used.
H6 Heartbeat - shows operational software activity.
H7 Not used.
H8 RAM Test OK - performed when the processor is reset.
A.5.2.2
"
CTU Front Panel Board
REFER Figure A-5.

The indicators provided on the CTU front panel board are:
H14 Heartbeat - shows operational software activity, and 1/0 bus control of the front
panel board.
A.5.2.3
"
CTU RCIVIS Interface Board
REFER Figure A-6.

The indicators provided on the CTU RCMS interface board are:
H1 Heartbeat - shows operational software activity, and I/O bus control of the RMS
interface board.
A-42
HA72500
Figure A-4
APPENDIX A
CTU Processor Board - Control and Indicator Locations
A-43
HA72500
Figure A-5
APPENDIX A
CTU Front Panel Board - Control and Indicator Locations
A-44
HA72500
Figure A-6
APPENDIX A
CTU RMS Interface Board - Control and Indicator Locations
A-45
HA72500
A.5.3
APPENDIX A
Transponder Internal Controls
This section gives details of the internal switches, presets and adjustments for each of
the module assemblies.
Table A-6
SUBASSY
Internal Controls : Monitor Module 1A72510

TYPE
1A72511
Main PWB
Assembly,
Monitor
Module
Preset
resistor
8-way DIL
switch
The Monitor
Fault Limit
switches
S1-4 and
S8-10, S12
and S13
are binary
coded, with
switch 1 of
the DIL
switches
the least
significant
and switch8
(or 10) the
most
significant.
They use
inverted
logic, with
the OFF
position of
the switch
being
active.
S7 is not
Binary
coded and
is active in
the ON
position
REF
CONTROL FUNCTIONS
LEGEND
R87
S1
PULSE WIDTH
LOWER REJECT
LIMIT
8-way DIL
switch
S2
FALL TIME UPPER

REJECT LIMIT
8-way DIL
switch
S3
RISE TIME UPPER

REJECT LIMIT
8-way DIL
switch
S4
PULSE WIDTH
REJECT WINDOW
8-way DIL
switch
S7
POWER LEVEL
LOWER REJECT
LIMIT
Sets the ERP monitor fault alarm reference level

to 0 dB at commissioning.
1 2 3 4 5 6 7 8
ON
OFF
shown above.
1 2 3 4 5 6 7 8
ON
OFF
shown above.
1 2 3 4 5 6 7 8
ON
OFF
shown above.
1 2 3 4 5 6 7 8
ON
OFF
difference between the limits of 1.2
microseconds and the switches are encoded for
a number of 11, as shown above.
1 2 3 4 5 6 7 8
ON
OFF
The power level corresponds to the switch
setting, from -1 to -7 dB. For a lower reject limit
of -3 dB the switches are set as shown above
(S7:8 is not used).
A-46
HA72500
SUBASSY
1A72511
Main PWB
Assembly,
Monitor
Module
APPENDIX A
TYPE
REF
CONTROL FUNCTIONS
LEGEND
8-way DIL
switch
S8
8-way DIL
switch
S9
DELAY REJECT
WINDOW
8-way DIL
switch
S10
SPACING REJECT
WINDOW
10-way
DIL switch
S12
DELAY LOWER
REJECT LIMIT
10-way
DIL switch
IDENT GAP
UPPER REJECT
LIMIT
SPACING LOWER
REJECT LIMIT
ON
OFF
Subtract 2 from the required upper reject limit (in
seconds). Encode the switches for this value.
For an upper reject limit of 62 seconds the
shown above.
1 2 3 4 5 6 7 8
ON
OFF
Multiply the difference between the required
upper and lower reject limits (in microseconds)
by 10 and subtract 1. Encode the switches for
this value.
For an upper reject limit of 50.5 microseconds
the difference between the limits is 1.0
microsecond and the switches are encoded for a
number of 9, as shown above.
1 2 3 4 5 6 7 8
ON
OFF
Multiply the difference between the required
upper and lower reject limits (in microseconds)
by 10 and subtract 1. Encode the switches for
this value.
For an upper reject limit of 12.5 microseconds
the difference between the limits is 1.0
microsecond and the switches are encoded for a
number of 9, as shown above.
1 2 3 4 5 6 7 8 9 10
ON
OFF
shown above.
1 2 3 4 5 6 7 8 9 10
ON
OFF
switches are encoded for a number of 114 as
shown above.
A-47
HA72500
APPENDIX A
Table A-7
SUBASSY
1A72515
Main PWB
Assembly.
Test
Interrogator
1A72516
RF
Generator
Internal Controls : Test Interrogator 1A72514

TYPE
REF

LEGEND
Slide
switch
S4
mode
Preset
resistor
R7
TPNDR OP LVL
CAL
Variable
capacitors
Inductor
6-way DIL
switch
C10, 10, 14,18, 22

L1
S1
SW1
SW2
SW3
SW4
SW5
SW6
1A72517
RF Filter
1A72518
Modulator
and
Detector
X Sets pulse spacing for X channel operation.

Y Sets pulse spacing for Y channel operation.
Used to calibrate the transmitted pulse peak power.
Used to align the RF generator to the operating
interrogator frequencies (see Section 3.4.12).
Selects interrogations at the nominal interrogation
frequency.
Adds a CW signal to the interrogation pules at -10 dB.
Used to align the RF filter (see Section 3.4.13).
Variable
capacitors
C1, C2
Preset
resistors
R13
R20
R37
Pulse amplitude
Pulse shape
Pulse pedestal
Used to align the pulse shape of the interrogations

produced by the RF generator (see Section 3.4.14).
Slide
switch
S1
Test point
Test point
XT1
XT2
Normal
Test
Bias voltage
Pk amp lvl
Test point
Test point
Test point
Test point
XT3
XT4
XT5
XT6
Timing pulse
Mod out
Ground
Ground
Position for normal operation.

Used during testing.
Bias voltage for level detector circuitry.
DC voltage proportional to the peak amplitude of the
transmitted pulses.
Timing reference for the transmitted pulse.
Modulation pulse to RF generator.
0 volts reference.
0 volts reference.
A-48
HA72500
APPENDIX A
Table A-8
Internal Controls : Receiver Video 1A72520
SUBASSY
TYPE
1A72521
Main PWB
Assembly,
Receiver
Video
Preset
resistor
Preset
resistor
Preset
resistor
R37
CODE SPEED
R39
CODE REPTN
R45
ADJUST 6 dB
OFFSET
Preset
resistor
R46
Slide
switch
S4
LONG DISTANCE
ECHO SUPP
LEVEL
SELECT
ENCODER MODE
Slide
switch
S5
16-way
S6
rotary switch
16-way
S7
rotary switch
Slide
S8
switch
1A72522
RF Source
1A72523
IF Amplifier
CONTROL FUNCTIONS
LEGEND
REF
SELECT
DECODER MODE
SET LDES
PERIOD
SET DEAD TIME
SDES
Slide
switch
S9
8-way
switch
S13
CODE ELEMENT
to
S16
C8, 12, 18, 26
Variable
capacitors
Variable
inductor
Variable
capacitor
Preset
resistors
Variable
inductors
LDES
Varies the ident code speed, which is set to 8

Hz.
Varies the ident repetition rate, which is set to
1.5 Hz.
Set to 0.24 volts during factory test, but may
need to be varied at module test level (see
Sections 3.3.8, 3.4.17).
Varies the LDES DC level.
X Selects X mode operation for the encoder.

Y Selects Y mode operation for the encoder.
X Selects X mode operation for the decoder.
Y Selects Y mode operation for the decoder.
Sets the LDES period in multiples of 12.15
microseconds.
Sets the dead time period in multiples of 11.57
microseconds.
ON
Enables SDES operation.
OFF
Disables SDES operation.
ON
Enables LDES operation.
OFF
Disables LDES operation.
Set the ident Morse code characters.
Used to align the RF source to the operating

reply frequency (see Section 3.4.18)
L1
C1
R15, 29,50
Used to align the IF amplifier (see Section

3.4.19).
L3, 4, 5, 6, 7
A-49
HA72500
APPENDIX A
The Ident code element switches S13, S14, S15 and S16 on the Main PWB Assembly,
Receiver Video set the ident code as follows:
a. Convert the required Ident letters into International Morse Code, using the
following table.
LETTER
A
B
C
D
E
F
G
H
1
J
K
L
M
MORSE SYMBOL
dot dash
dash dot dot dot
dash dot dash dot
dash dot dot
dot
dot dot dash dot
dash dash dot
dot dot dot dot
dot dot
dot dash dash
dash dot dash
dot dash dot dot
dash dash
LETTER
N
0
P
Q
R
S
T
U
V
W
X
Y
Z
MORSE SYMBOL
dash dot
dash dash dash
dot dash dash dot
dash dash dot dash
dot dash dot
dot dot dot
dash
dot dot dash
dot dot dot dash
dot dash dash
dash dot dot dash
dash dot dash dash
dash dash dot dot
b. Set the switches using the following code (shading indicates switch position).
EXAMPLE: For ident code AWA, switch settings are:
Table A-9
SUBASSY
1A72526
Main PWB
Assembly,
Transponder
Power Supply
Internal Controls : Transponder Power Supply 1A72525

TYPE
Preset
resistor
REF
R26
CONTROL FUNCTIONS
LEGEND
HT VOLTAGE
Sets the HT output voltage to the Transmitter

Driver 1A72530.
A-50
HA72500
APPENDIX A
Table A-10
SUBASSY
1A72531
Pulse Shaper
PWB
Assembly
Internal Controls : Transmitter Driver 1A72530

TYPE
Preset
resistors
REF
R3, 5,
7, 9,
11, 13
R17
R36
R52
R54
R58
R62
R69
R85
R97
R1 15
1A72532
Exciter
CONTROL FUNCTIONS
LEGEND
PULSE
SHAPE
INTEGRATOR
BALANCE
BACKPORCH
PEDESTAL
VOLTAGE
2ND PULSE
EQUALISING
MOD PULSE
AMPLITUDE
ALC LEVEL
(RF OUTPUT)
POWER MOD
AMP DC
1W PULSE
EXCITER DC
MED POWER
DRIVER DC
DRIVER DC
POWER
Toggle
switch
S1
Slide switch
S2
ALC LOOP
Slide switch
S3
ALC
Slide switch
S4
MED PD
COLL
Link
X1
POWER
Variable
capacitors
C5, 15, 17. 21, 26. 30,

33,34.
These vary the slope of the segments of the

function generator output from base (R3) to
apex (R13).
Adjusts the balance of the function generator
integrator.
Adjusts the spacing between the modulation
pulses.
Adjusts the DC level of the shaped modulation
pulse.
Adjusts the height of the second pulse of the
pulse pair to equalise it with the height of the
first pulse.
Adjusts the amplitude of the shaped modulation
pulse.
With S2 (ALC LOOP) in its closed position,
adjusts the shaped modulation pulse amplitude.
Adjusts the power modulation amplifier DC level.
Adjusts the pulse modulation amplitude.
Adjusts the exciter DC level.
Adjusts the medium power driver DC level.
OFF
NORMAL
Power supply to exciter is off.

Power supply to the exciter is
under CTU
CLOSED
Automatic level control is
enabled.
OPEN
Automatic level control is
disabled.
VIDEO
ALC maintains shaped
modulation pulse amplitude
(150W DME).
DETECTED RF ALC maintains output level
from the 1kW RF power
amplifier (1kW DME).
DC
Selects a DC voltage as the
collector supply for the medium
power driver in high power
(1kW) mode.
MODULATION Selects the shaped modulation
pulse as the collector supply
for the medium power driver in
low power (150 W) mode.
150W
Lights TEST LED 9 switch S3
incorrectly set to DET RF.
1kW
Lights TEST LED if switch S3
incorrectly set to VIDEO.
Used to align the exciter (see Section 3.4.25).
A-51
HA72500
Table A-11
APPENDIX A
Internal Controls: 1kW PA Power Supply 1A72540
SUBASSY
1A72541 Control and
Status PWB Assembly
1A72542 DC-DC
Converter PWB
Assembly
1A72543 Regulator PWB
Assembly
TYPE
Preset
resistor
Preset
resistor
Preset
resistor
REF
R45
R16
R112
CONTROL FUNCTIONS
FUNCTION/SETTINGP/INDICATION
Varies the centre of the HT ON window between
approximately 48.5 and 51.9 volts.
Calibrates the input circuit monitoring of the DC-DC
converter section 3.4.33).
Sets the HT output voltage to the 1kW RF power
amplifier.
A-52
HA72500
A.6
APPENDIX A
DEPOT TEST FACILITY OPERATION
Operating procedures for the Depot Test Facility 3A72500 are contained in Appendix K.
A-53
Pelorus
AustralAsia
Pelorus
AustralAsia
Pelorus
AustralAsia

Ha72500 TH

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Interscan Navigation

Systems Pty. Ltd

Interscan Navigation Systems

This handbook consists of a selection of material from the standard equipment

BRIEF SPECIFICAT ION and SPECIFICATION

EMERGENCY CARDIOPULMONARY RESUSCITATION FOR

Check breathing and listen to breath, watch for

In metropolitan areas, dial 000 and ask

National Heart Foundation of Australia

BRIEF DESCRIPTION AND SPECIFICATION

BRIEF DESCRIPTION AND SPECIFICATION........................................... 1-1

DME Principle .......................................................................................1-2

Performance Characteristics Summary.....................................................1-4

1. BRIEF DESCRIPTION AND SPECIFICATION

The DME system is a navigational system which provides slant-range distance

Distance Measuring Function

DME Pulse Generation

Maximum Reply Rate

Each operational DME is identified by a 2-character or 3-character Morse code message

Range and Echo

Remote Control and Monitoring System

Performance Characteristics Summary

Temperature (indoor equipment)

> 150 watts peak

3.5 0.5 microseconds

Receiver triggering level

-91 dBm at cabinet connector

For interrogation signal levels

18-33 volts. adjustable

Controls and Indicators

Equipment Serial Numbers

'XXXXX is a 5-figure number which is unique to the particular assembly.

Y is a prefix digit which identifies a particular variant of assembly type 'XXXXX.

A signifies that the equipment is avionics equipment.

All correspondence relating to manufactured items should quote the applicable,

TECHNICAL DESCRIPTION ...................................................................... 2-1

Block Diagram Single 1kW DME ...........................................................2-3

Summary of Controls and Indicators: RF Panel (Dual) ............................2-15

Table 2-4 Pulse Shaper Board Test Points .............................................................2-35

The LDB-102 series DME equipment is available in several standard configurations,

REFER Figure 2-1 for Single 1kW DME

Block Diagram Dual 1kW DME

Layout of DME LDB-102 Single 1kW Rack

Layout of DME LDB-102 Dual 1kW Rack

REFER Rack Interwiring (Single 1kW DME) 72505-2-06

Sheet 1 shows RF cable interwiring.

Sheet 2 shows signal interwiring.

Sheet 3 shows power interwiring.

REFER Interwiring Diagram 72505-2-37

The test interrogator operates as an independent unit simulating aircraft interrogation

Control and Test Subsystem

Power Supply Subsystem

Single DME Power Distribution

Dual DME Power Distribution

RF Panel Single DME 1A72545 and RF Panel Dual DME

REFER Circuit Diagram 72545-3-04 (Single DME)

Preselector Filter 1A72546

REFER Circuit Diagrams 72545-3-04 or 72545-3-05

Directional Coupler 1A69755

REFER Circuit Diagram 72545-3-04

Directional Coupler 1A69755

Directional Coupler 2A69755

REFER Circuit Diagram 72545-3-05