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Signal Processing

Algorithms and Architectures


Course No: EE 524
(3 0 0 6)
Course Instructor: Dr. M.K. Bhuyan
Teaching Assistant :
Amit Vishwakarma [a.vishwakarma@Iiitg.ernet.in]
Biplab Ketan Chakraborty [c.biplab@iitg.ernet.in]

Department of Electronics and Electrical Engineering,


Indian Institute of Technology Guwahati, India.

Course Objective
The objective of the course is to quickly review
the foundational material covered in
undergraduate level courses in signal
processing and present the key ideas in
modern digital signal processing. Emphasis will
also be on implementation aspects of signal
processing algorithms on modern digital signal
processors.

Overview of EE 524

Prerequisites
Strong motivation, basic trigonometry and calculus, matrix
algebra, fundamentals of signals and systems and digital signal
processing.

Course Outline
(a) Orthogonal transforms

DFT, DCT and Haar.

(b) DFT

Properties of DFT; Computation of DFT: FFT and structures,


Decimation in time, Decimation in frequency; Linear
convolution using DFT

(c) Digital filter structures

Basic FIR/IIR filter structures, FIR/IIR Cascaded lattice structures, Parallel


all pass realization of IIR transfer functions, Sine-cosine generator;
Computational complexity of filter structures.
(d) Multirate signal processing

Basic structures for sampling rate conversion, Decimators and


Interpolators; Multistage design of interpolators and decimators;
Polyphase decomposition and FIR structures; Computationally efficient
sampling rate converters; Arbitrary sampling rate converters based on
interpolation algorithms: Lagrange interpolation, Spline interpolation;
Quadrature mirror filter banks; Conditions for perfect reconstruction;
Applications in subband coding

(e) Digital Signal Processors introduction


Computational characteristics of DSP algorithms and applications;
Techniques for enhancing computational throughput: Harvard architecture,
parallelism, pipelining, dedicated multiplier, split ALU and barrel shifter;
TMS320C64xx architecture: CPU data paths and control, general purpose
register files, register file cross paths, memory load and store paths, data
address paths, parallel operations, resource constraints..

Texts / References:

1. R. Chassaing and D. Reay, Digital signal processing and


applications with TMS320C6713 and TMS320C6416, Wiley,
2008.
2. S. K. Mitra, Digital Signal Processing: A Computer Based
Approach, 3rd Edn., TMH, 2008.
3. J. G. Proakis and D. G. Manolakis, Digital Signal Processing:
Principles, Algorithms and Applications, Pearson Prentice Hall,
2007.

Evaluation Strategy
Grading will be based on the following:

End Semester Examination:


Mid Semester Examination:
Total:

60
40
100

Minimum 75% attendance compulsory


(institutional requirement: your attendance is your responsibility!)
Attendance may be considered for the improvement of grades.

Important Dates

Mid semester examination (40 marks) : 21.09.2016


End semester examination (60 marks) : 23.11.2016

Lecture Schedule
Room No: 3101
Monday: 8.00 - 8.55 AM
12.00 - 12.55 PM (Special Class in 2002)

Tuesday : 11.00 - 11.55 AM

Wednesday: 11.00 -11.55 AM

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