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INTRODUCTION
Embedded systems refer to devices, instruments or large engineering structures/systems that
are built to handle one or a few pre-established tasks. The computer controlling the whole
thing is built into or 'embedded' within the device.
Cell phones and personal digital assistants (PDAs) are examples of devices with embedded
systems. They both perform a specific number of tasks which are controlled by a built-in
computer system. Inertial guidance systems used for aerial navigation or as part of the
guidance package of smart bombs and missiles are examples of instruments with embedded
systems. A traffic control system (which remotely controls traffic lights without the need for
human intervention) is an example of a large engineering structure with an embedded system.
In truth, the line between 'embedded' systems and general purpose systems (which may or
may not contain an embedded system) is becoming blurred as technology progresses.
EMBEDDED COMPUTER
The first question that needs to be asked is "What exactly is an embedded computer?" To be
fair, however, it is much easier to answer the question of what an embedded computer is not,
than to try and describe all the many things that an embedded computer can be. An embedded
computer is frequently a computer that is implemented for a particular purpose. In contrast,
an average PC computer usually serves a number of purposes: checking email, surfing the
internet, listening to music, word processing, etc... However, embedded systems usually only
have a single task, or a very small number of related tasks that they are programmed to
perform. Every home has several examples of embedded computers. Any appliance that has a
digital clock, for instance, has a small embedded microcontroller that performs no other task
than to display the clock. Modern cars have embedded computers onboard that control such
things as ignition timing and anti-lock brakes using input from a number of different sensors.
Embedded computers rarely have a generic interface, however. Even if embedded systems
have a keypad and an LCD display, they are rarely capable of using many different types of
input or output. An example of an embedded system with I/O capability is a security alarm
with an LCD status display, and a keypad for entering a password.
In general, an Embedded System:
Is a system built to perform its duty, completely or partially independent of human
intervention.
Is specially designed to perform a few tasks in the most efficient way.
Interacts with physical elements in our environment, viz. controlling and driving a motor,
sensing temperature, etc.
An embedded system can be defined as a control system or computer system designed to
perform a specific task. Common examples of embedded systems include MP3 players,
navigation systems on aircraft and intruder alarm systems. An embedded system can also be
defined as a single purpose computer.
Most embedded systems are time critical applications meaning that the embedded system is
working in an environment where timing is very important: the results of an operation are
only relevant if they take place in a specific time frame. An autopilot in an aircraft is a time
critical embedded system. If the autopilot detects that the plane for some reason is going into
a stall then it should take steps to correct this within milliseconds or there would be
catastrophic results.
MICROPROCESSOR VS MICROCONTROLLER
A microcontroller is a specialized form of microprocessor that is designed to be selfsufficient and cost-effective, where a microprocessor is typically designed to be general
purpose (the kind used in a PC). Microcontrollers are frequently found in automobiles, office
machines, toys, and appliances.
MICROCONTROLLER
The microcontroller is the integration of a number of useful functions into a single IC
package.
The ability to execute a stored set of instructions to carry out user defined tasks.
The ability to be able to access external memory chips to both read and write data from and
to the memory.
Basically, a microcontroller is a device which integrates a number of the components of a
microprocessor system onto a single microchip.
Figure 1
Basic block diagram of microcontroller
A microcontroller (sometimes abbreviated C or MCU) is a small computer on a single
integrated circuit containing a processor core, memory, and programmable input/output
peripherals. Program memory in the form of NOR flash or OTP ROM is also often included
on chip, as well as a typically small amount of RAM. Microcontrollers are designed for
embedded applications, in contrast to the microprocessors used in personal computers or
other general purpose applications.
Figure 2
Basic block diagram of microprocessor
Microprocessors are simply a computer processor that has been configured into the design
and function of a microchip. Sometimes referred to as a logic chip, this small component
functions as the means of executing the command to start booting up a computer. As part of
the process, a microprocessor initiates the activation of all the components necessary to allow
the computer to be used, such as waking the operating system.
VARIOUS MICROCONTROLLERS
FIRST MICROCONTROLLER IS 8031
FEATURES
It is Intels product. Neither a microprocessor nor a microcontroller.
It is 8-bit controller.
Internally no ROM is provided i.e. code is outside the chip.
SECOND MICROCONTROLLER IS 8051
FEATURES
It is a first complete microcontroller.
It is a name of family. In which the instruction set, pin configuration, architecture are same,
only memory storage capacity is different.
Internally PROM (programmable read only memory) is provided so it called one time
programmable (OTP).
THIRD MICROCONTROLLER IS AT89C51
FEATURES
It is similar to 8051 microcontroller i.e. having same instruction set, pin configuration,
architecture.
ATMEL 89C51
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K Bytes
of Flash programmable and erasable read only memory (PEROM). The device is
manufactured using Atmels high-density nonvolatile memory technology and is Compatible
with the industry-standard MCS-51 instruction set and pin out. The on-chip ash allows the
program memory to be reprogrammed in-system or by a conventional Nonvolatile memory
programmer. By combining a versatile 8-bit CPU with Flash On a monolithic chip, the Atmel
AT89C51 is a powerful microcomputer which provides A highly-flexible and cost-effective
solution to many embedded control applications.
ARCHITECTURE OF 8051
FEATURES
The 8-bit CPU with registers A (accumulator) & B.
16-bit program counter (PC) and data pointer register (DPTR).
8-bit program status word (PSW).
8-bit stack pointer.
Internal ROM and EPROM (8751) of (8031) to 4k (8051).
Internal ram of 128 byte.
Four register banks, each containing 8 register (R0-R7).
16 byte which may be addressed at the bit level.
8 byte of general purpose memory.
32 I/O pins arranged as 4-bit ports P0-P3.
Two 16-bit timers/counters T0-T1.
Full duplex serial data receiver/transmitter (SBUF).
Control registers TCON, TMOD, SCON, PCON, IP, IE.
8051 STANDARDS
Microcontroller manufacturers have been competing for a long time for attracting choosy
customers and every couple of days a new chip with a higher operating frequency, more
memory and upgraded A/D converters appeared on the market. However, most of them had
the same or at least very similar architecture known in the world of microcontrollers as 8051
compatible. What is all this about?
The whole story has its beginnings in the far 80s when Intel launched the first series of
microcontrollers called the MCS 051. Even though these microcontrollers had quite modest
features in comparison to the new ones, they conquered the world very soon and became a
standard for what nowadays is called the microcontroller.
The main reason for their great success and popularity is a skillfully chosen configuration
which satisfies different needs of a large number of users allowing at the same time constant
expansions (refers to the new types of microcontrollers). Besides, the software has been
developed in great extend in the meantime, and it simply was not profitable to change
anything in the microcontrollers basic core. This is the reason for having a great number of
various microcontrollers which basically are solely upgraded versions of the 8051 family.
What makes this microcontroller so special and universal so that almost all manufacturers all
over the world manufacture it today under different name?
Figure 3
Basic architecture of 8051 microcontroller
4 Kb of ROM is not much at all.
128b of RAM (including SFRs) satisfies the user's basic needs.
4 ports having in total of 32 input/output lines are in most cases sufficient to make all
necessary connections to peripheral environment.
The whole configuration is obviously thought of as to satisfy the needs of most programmers
working on development of automation devices. One of its advantages is that nothing is
missing and nothing is too much. In other words, it is created exactly in accordance to the
average users taste and needs. Other advantages are RAM organization, the operation of
Central Processor Unit (CPU) and ports which completely use all recourses and enable
further upgrade
Figure 4
Pin details of 8051 microcontroller
Pins 1-8: Port 1 Each of these pins can be configured as an input or an output.
Pin 9: RS A logic one on this pin disables the microcontroller and clears the contents of most
registers. In other words, the positive voltage on this pin resets the microcontroller. By
applying logic zero to this pin, the program starts execution from the beginning.
Pins10-17: Port 3 Similar to port 1, each of these pins can serve as general input or output.
Besides, all of them have alternative functions.
Pin 10: RXD Serial asynchronous communication input or Serial synchronous
communication output.
Pin 11: TXD Serial asynchronous communication output or Serial synchronous
communication clock output.
Pin 12: INT0 Interrupt 0 input.
Pin 31: EA By applying logic zero to this pin, P2 and P3 are used for data and address
transmission with no regard to whether there is internal memory or not. It means that even
there is a program written to the microcontroller, it will not be executed. Instead, the program
written to external ROM will be executed. By applying logic one to the EA pin, the
microcontroller will use both memories, first internal then external (if exists).
Pin 32-39: Port 0 Similar to P2, if external memory is not used, these pins can be used as
general inputs/outputs. Otherwise, P0 is configured as address output (A0-A7) when the ALE
pin is driven high (1) or as data output (Data Bus) when the ALE pin is driven low (0).
Pin 40: VCC +5V power supply.
Figure 5
I/O function of 8051
PORT 0
The P0 port is characterized by two functions. If external memory is used then the lower
address byte (addresses A0-A7) is applied on it. Otherwise, all bits of this port are configured
as inputs/outputs. The other function is expressed when it is configured as an output. Unlike
other ports consisting of pins with built-in pull-up resistor connected by its end to 5 V power
supply, pins of this port have this resistor left out.
Figure 6
Port 0 function in voltage
If any pin of this port is configured as an input then it acts as if it floats. Such an input has
unlimited input resistance and in determined potential.
Figure 7
External pull up register at port 0
When the pin is configured as an output, it acts as an open drain. By applying logic 0 to a
port bit, the appropriate pin will be connected to ground (0V). By applying logic 1, the
external output will keep on floating. In order to apply logic 1 (5V) on this output pin, it is
necessary to built in an external pull-up resistor.
PORT 1
P1 is a true I/O port, because it doesn't have any alternative functions as is the case with P0,
but can be configured as general I/O only. It has a pull-up resistor built-in and is completely
compatible with TTL circuits.
PORT 2
P2 acts similarly to P0 when external memory is used. Pins of this port occupy addresses
intended for external memory chip. This time it is about the higher address byte with
addresses A8-A15. When no memory is added, this port can be used as a general input/output
port showing features similar to P1.
PORT 3
All port pins can be used as general I/O, but they also have an alternative function. In order
to use these alternative functions, a logic one (1) must be applied to appropriate bit of the P3
register. In terms of hardware, this port is similar to P0, with the difference that its pins have
a pull-up resistor built-in.
PROGRAM MEMORY
The first models of the 8051 microcontroller family did not have internal program memory. It
was added as an external separate chip. These models are recognizable by their label
beginning with 803 (for example 8031 or 8032). All later models have a few Kbyte ROM
embedded. Even though such an amount of memory is sufficient for writing most of the
programs, there are situations when it is necessary to use additional memory as well.
How does the microcontroller handle external memory depends on the EA pin logic state
EA=0 In this case, the microcontroller completely ignores internal program memory and
executes only the program stored in external memory.
EA=1 In this case, the microcontroller executes first the program from built-in ROM, then
the program stored in external memory. In both cases, P0 and P2 are not available for use
since being used for data and address transmission. Besides, the ALE and PSEN pins are also
used.
DATA MEMORY
As already mentioned, Data Memory is used for temporarily storing data and intermediate
results created and used during the operation of the microcontroller. Besides, RAM memory
built in the 8051 family includes many registers such as hardware counters and timers,
input/output ports, serial data buffers etc. The previous models had 256 RAM locations,
while for the later models this number was incremented by additional 128 registers.
However, the first 256 memory locations (addresses 0-FFh) are the heart of memory common
to all the models belonging to the 8051 family. Locations available to the user occupy
memory space with addresses 0-7Fh, i.e. first 128 registers. This part of RAM is divided in
several blocks.
The first block consists of 4 banks each including 8 registers denoted by R0-R7. Prior to
accessing any of these registers, it is necessary to select the bank containing it. The next
memory block (address 20h-2Fh) is bit- addressable, which means that each bit has its own
address (0-7Fh). Since there are 16 such registers, this block contains in total of 128 bits with
separate addresses (address of bit 0 of the 20h byte is 0, while address of bit 7 of the 2Fh byte
is 7Fh). The third group of registers occupies addresses 2Fh-7Fh, i.e. 80 locations, and does
not have any
ADDITIONAL RAM
In order to satisfy the programmers constant hunger for Data Memory, the manufacturers
decided to embed an additional memory block of 128 locations into the latest versions of the
8051 microcontrollers. However, its not as simple as it seems to be The problem is that
electronics performing addressing has 1 byte (8 bits) on disposal and is capable of reaching
only the first 256 locations, therefore. In order to keep already existing 8-bit architecture and
compatibility with other existing models a small trick was done.
What does it mean? It means that additional memory block shares the same addresses with
locations intended for the SFRs (80h- FFh). In order to differentiate between these two
REGISTER ORGANISATION
A REGISTER (ACCUMULATOR)
A register is a general-purpose register used for storing intermediate results obtained during
operation. Prior to executing an instruction upon any number or operand it is necessary to
store it in the accumulator first. All results obtained from arithmetical operations performed
by the ALU are stored in the accumulator. Data to be moved from one register to another
must go through the accumulator. In other words, the A register is the most commonly used
register and it is impossible to imagine a microcontroller without it.
Figure 8
Accumulator register set
More than half instructions used by the 8051 microcontroller use somehow the accumulator.
B REGISTER
Multiplication and division can be performed only upon numbers stored in the A and B
registers. All other instructions in the program can use this register as a spare accumulator
(A).
Figure 9
B register set
Figure 10
PSW register set
PSW register is one of the most important SFRs. It contains several status bits that reflect the
current state of the CPU. Besides, this register contains Carry bit, Auxiliary Carry, two
register bank select bits, Overflow flag, parity bit and user-definable status flag.
P - PARITY BIT: If a number stored in the accumulator is even then this bit will be
automatically set (1), otherwise it will be cleared (0). It is mainly used during data transmit
and receive via serial communication.
BIT 1: This bit is intended to be used in the future versions of microcontrollers.
OV OVERFLOW: occurs when the result of an arithmetical operation is larger than 255 and
cannot be stored in one register. Overflow condition causes the OV bit to be set (1).
RS0, RS1 - REGISTER BANK SELECT BITS: These two bits are used to select one of
four register banks of RAM. By setting and clearing these bits, registers R0-R7 are stored in
one of four banks of RAM.
Table 1
Registers bank select
RS1
RS2
S PAC E I N R A M
Bank0 00h-07h
Bank1 08h-0Fh
Bank2 10h-17h
Bank3 18h-1Fh
Table 1
If neither external memory nor serial communication system are used then 4 ports within
total of 32 input/output pins are available for connection to peripheral environment. Each bit
within these ports affects the state and performance of appropriate pin of the microcontroller.
Thus, bit logic state is reflected on appropriate pin as a voltage (0 or 5 V) and vice versa,
voltage on a pin reflects the state of appropriate port bit.
R REGISTERS (R0-R7)
A,
R4;
Means:
add
number
from
R4
to
accumulator
(result
remains
accumulator)
MOV R5, A; Means: temporarily move the result from accumulator into R5
MOV A, R1; Means: move number from R1 to accumulator
ADD A, R2; Means: add number from R2 to accumulator
in
Figure 11
TIMER T0
As seen in figure 6.1, the timer T0 consists of two registers TH0 and TL0 representing a
low and a high byte of one 16-digit binary number.
Figure 12
Timer set (according to bit)
Accordingly, if the content of the timer T0 is equal to 0 (T0=0) then both registers it consists
of will contain 0. If the timer contains for example number 1000 (decimal), then the TH0
register (high byte) will contain the number 3, while the TL0 register (low byte) will contain
decimal number 232.
Figure 13
Timer higher and timer lower
Formula
TH0
Matching
used
to
the
calculate
values
in
256
previous
these
+
example
two
registers
TL0
it
would
be
is
very
simple:
as
follows:
Figure 14
Bit calculation
Since the timer T0 is virtually 16-bit register, the largest value it can store is 65 535. In case
of exceeding this value, the timer will be automatically cleared and counting starts from 0.
This condition is called an overflow. Two registers TMOD and TCON are closely connected
to this timer and control its operation.
Figure 15
TMOD register
Bits of this register have the following function:
GATE1 enables and disables Timer 1 by means of a signal brought to the INT1 pin (P3.3):
1 - Timer 1 operates only if the INT1 bit is set.
0 - Timer 1 operates regardless of the logic state of the INT1 bit.
C/T1 selects pulses to be counted up by the timer/counter 1:
1 - Timer counts pulses brought to the T1 pin (P3.5).
0 - Timer counts pulses from internal oscillator.
T1M1, T1M0 These two bits select the operational mode of the Timer 1.
TMOD register description (Timer 1)
T1M1
T1M0
MODE
DESCRIPTION
13-bit timer
16-bit timer
8-bit auto-reload
Split mode
Table 2
GATE0 enables and disables Timer 1 using a signal brought to the INT0 pin (P3.2):
1 - Timer 0 operates only if the INT0 bit is set.
0 - Timer 0 operates regardless of the logic state of the INT0 bit.
C/T0 selects pulses to be counted up by the timer/counter 0:
1 - Timer counts pulses brought to the T0 pin (P3.4).
0 - Timer counts pulses from internal oscillator.
T0M1, T0M0 These two bits select the operational mode of the Timer 0.
TMOD register description (Timer 0)
T0M1
T0M0
MODE
DESCRIPTION
13-bit timer
16-bit timer
8-bit auto-reload
Split mode
Table 3
TIMER 0 IN MODE 0 (13-BIT TIMER)
This mode configures timer 0 as a 13-bit timer which consists of all 8 bits of TH0 and the
lower 5 bits of TL0. As a result, the Timer 0 uses only 13 of 16 bits. How does it operate?
Each coming pulse causes the lower register bits to change their states. After receiving 32
pulses, this register is loaded and automatically cleared, while the higher byte (TH0) is
incremented by 1. This process is repeated until registers count up 8192 pulses. After that,
both registers are cleared and counting starts from 0.
Figure 16
Timer 0 in mode 0
TIMER 0 IN MODE 1 (16-BIT TIMER)
Mode 1 configures timer 0 as a 16-bit timer comprising all the bits of both registers TH0 and
TL0. That's why this is one of the most commonly used mode. Timer operates in the same
way as in mode 0, with difference that the registers count up to 65 536 as allowable by the 16
bits.
Figure 17
Timer 0 in mode 1
TIMER 0 IN MODE 2 (AUTO-RELOAD TIMER)
Mode 2 configures timer 0 as an 8-bit timer. Actually, timer 0 uses only one 8-bit register for
counting and never counts from 0, but from an arbitrary value (0-255) stored in another
(TH0) register. The following example shows the advantages of this mode. Suppose it is
necessary to constantly count up 55 pulses generated by the clock.
If mode 1 or mode 0 is used, it is necessary to write the number 200 to the timer registers and
constantly check whether an overflow has occurred, i.e. whether they reached the value 255.
When it happens, it is necessary to rewrite the number 200 and repeat the whole procedure.
The same procedure is automatically performed by the microcontroller if set in mode 2. In
fact, only the TL0 register operates as a timer, while another (TH0) register stores the value
from which the counting starts. When the TL0 register is loaded, instead of being cleared, the
contents of TH0 will be reloaded to it. Referring to the previous example, in order to register
each 55th pulse, the best solution is to write the number 200 to the TH0 register and
configure the timer to operate in mode 2.
Figure 18
Timer 0 in mode 2
TIMER 0 IN MODE 3 (SPLIT TIMER)
Mode 3 configures timer 0 so that registers tl0 and th0 operate as separate 8-bit timers. in
other words, the 16-bit timer consisting of two registers th0 and tl0 is split into two
independent 8-bit timers. This mode is provided for applications requiring an additional 8-bit
timer or counter. The tl0 timer turns into timer 0, while the th0 timer turns into timer 1. in
addition, all the control bits of 16-bit timer 1 (consisting of the th1 and tl1 register), now
control the 8-bit timer 1. even though the 16-bit timer 1 can still be configured to operate in
any of modes (mode 1, 2 or 3), it is no longer possible to disable it as there is no control bit to
do it.Tthus, its operation is restricted when timer 0 is in mode 3.
Figure 19
Timer 0 in mode 3
The only application of this mode is when two timers are used and the 16-bit Timer 1 the
operation of which is out of control is used as a baud rate generator.
Figure 20
Timer control register bit
TF1 bit is automatically set on the Timer 1 overflow.
TR1 bit enables the Timer 1.
1 - Timer 1 is enabled.
0 - Timer 1 is disabled.
TF0 bit is automatically set on the Timer 0 overflow.
TR0 bit enables the timer 0.
1 - Timer 0 is enabled.
0 - Timer 0 is disabled.
Figure 21
How to use the timer 0
Referring to figure above, the timer 0 operates in mode 1 and counts pulses generated by
internal clock the frequency of which is equal to 1/12 the quartz frequency.
TURN ON THE TIMER
Figure 22
How to turn on the timer
The TR0 bit is set and the timer starts operation. If the quartz crystal with frequency of
12MHz is embedded then its contents will be incremented every microsecond. After 65.536
microseconds, the both registers the timer consists of will be loaded. The microcontroller
automatically clears them and the timer keeps on repeating procedure from the beginning
until the TR0 bit value is logic zero (0).
HOW TO 'READ' A TIMER
Depending on application, it is necessary either to read a number stored in the timer registers
or to register the moment they have been cleared.
It is somehow complicated to read a timer configured to operate in mode 2. Suppose the
lower byte is read first (TL0), then the higher byte (TH0). The result is:
TH0 = 15 TL0 = 255
Everything seems to be ok, but the current state of the register at the moment of reading was:
TH0 = 14 TL0 = 255
In case of negligence, such an error in counting (255 pulses) may occur for not so obvious
but quite logical reason. The lower byte is correctly read (255), but at the moment the
program counter was about to read the higher byte TH0, an overflow occurred and the
contents of both registers have been changed (TH0: 1415, TL0: 2550). This problem has
a simple solution. The higher byte should be read first, then the lower byte and once again the
higher byte. If the number stored in the higher byte is different than this sequence should be
repeated. It's about a short loop consisting of only 3 instructions in the program.
There is another solution as well. It is sufficient to simply turn the timer off while reading is
going on (the TR0 bit of the TCON register should be cleared), and turn it on again after
reading is finished.
Figure 23
Figure 24
SCON register bit
SM0 - Serial port mode bit 0 is used for serial port mode selection.
SM1 - Serial port mode bit 1.
SM2 - Serial port mode 2 bit, also known as multiprocessor communication enable bit. When
set, it enables multiprocessor communication in mode 2 and 3, and eventually mode 1. It
should be cleared in mode 0.
REN - Reception Enable bit enables serial reception when set.
TB8 - Transmitter bit 8. Since all registers are 8-bit wide, this bit solves the problem of
transmitting the 9th bit in modes 2 and 3. It is set to transmit logic 1 in the 9th bit.
RB8 - Receiver bit 8 or the 9th bit received in modes 2 and 3. Cleared by hardware if 9th bit
received is logic 0. Set by hardware if 9th bit received is logic 1.
TI - Transmit Interrupt flag is automatically set at the moment the last bit of one byte is sent.
It's a signal to the processor that the line is available for a new byte transmits.
RI - Receive Interrupt flag is automatically set upon one byte receive. It signals that byte is
received and should be read quickly prior to being replaced by a new data. This bit is also
cleared from within the software.
SCON register description
SM0
SM1
MODE
DESCRIPTION
B A U D R ATE
8-bit UART
9-bit UART
9-bit UART
Table 4
MODE 0
In mode 0, serial data are transmitted and received through the RXD pin, while the TXD pin
output clocks. The bout rate is fixed at 1/12 the oscillator frequency. On transmit; the least
significant bit (LSB bit) is sent/received first.
TRANSMIT - Data transmit is initiated by writing data to the SBUF register. In fact, this
process starts after any instruction being performed upon this register. When all 8 bits have
been sent, the TI bit of the SCON register is automatically set.
Figure 25
Data transmission in MODE 0
RECEIVE - Data receive through the RXD pin starts upon the two following conditions are
met: bit REN=1 and RI=0 (both of them are stored in the SCON register). When all 8 bits
have been received, the RI bit of the SCON register is automatically set indicating that one
byte receive is complete
Figure 26
Data receiver in MODE 0
Since there are no START and STOP bits or any other bit except data sent from the SBUF
register in the pulse sequence, this mode is mainly used when the distance between devices is
short, noise is minimized and operating speed is of importance. A typical example is I/O port
expansion by adding a cheap IC (shift registers 74HC595, 74HC597 and similar).
MODE 1
In mode 1, 10 bits are transmitted through the TXD pin or received through the RXD pin in
the following manner: a START bit (always 0), 8 data bits (LSB first) and a STOP bit
(always 1). The START bit is only used to initiate data receives, while the STOP bit is
automatically written to the RB8 bit of the SCON register.
TRANSMIT - Data transmit is initiated by writing data to the SBUF register. End of data
transmission is indicated by setting the TI bit of the SCON register.
Figure 27
Data transmission in MODE 1
RECEIVE - The START bit (logic zero (0)) on the RXD pin initiates data receive. The
following two conditions must be met: bit REN=1 and bit RI=0. Both of them are stored in
the SCON register. The RI bit is automatically set upon data reception is complete.
Figure 28
Data receiver in MODE 1
The Baud rate in this mode is determined by the timer 1 overflow.
MODE 2
In mode 2, 11 bits are transmitted through the TXD pin or received through the RXD pin: a
START bit (always 0), 8 data bits (LSB first), a programmable 9th data bit and a STOP bit
(always 1). On transmit, the 9th data bit is actually the TB8 bit of the SCON register. This bit
usually has a function of parity bit. On receive, the 9th data bit goes into the RB8 bit of the
same register (SCON).The baud rate is either 1/32 or 1/64 the oscillator frequency.
TRANSMIT - Data transmit is initiated by writing data to the SBUF register. End of data
transmission is indicated by setting the TI bit of the SCON register.
Figure 29
Figure 30
Data receiver in MODE 2
MODE 3
Mode 3 is the same as Mode 2 in all respects except the baud rate. The baud rate in Mode 3 is
variable.
MULTIPROCESSOR COMMUNICATION
As you may know, additional 9th data bit is a part of message in mode 2 and 3. It can be used
for checking data via parity bit. This feature is enabled by setting the SM2 bit of the SCON
register. As a result, after receiving the STOP bit, indicating end of the message, the serial
port interrupt will be generated only if the bit RB8 = 1 (the 9th bit).
Suppose there are several microcontrollers sharing the same interface. Each of them has its
own address. An address byte differs from a data byte because it has the 9th bit set (1), while
this bit is cleared (0) in a data byte. When the microcontroller a (master) wants to transmit a
block of data to one of several slaves, it first sends out an address byte which identifies the
target slave.
Figure 31
Communication set 1
Of course, only one of them will match the address and immediately clear the SM2 bit of the
SCON register and prepare to receive the data byte to come. Other slaves not being addressed
leave their SM2 bit set ignoring the coming data bytes.
Figure 32
Communication set 2
Figure 33
Interrupts controls
IE
REGISTER
(INTERRUPT
ENABLE)
Figure 34
Interrupt enable bit
EA - global interrupt enable/disable:
0 - disables all interrupt requests.
1 - Enables all individual interrupt requests.
ES - enables or disables serial interrupt:
0 - UART system cannot generate an interrupt.
1 - UART system enables an interrupt.
ET1 - bit enables or disables Timer 1 interrupt:
0 - Timer 1 cannot generate an interrupt.
1 - Timer 1 enables an interrupt.
EX1 - bit enables or disables external 1 interrupt:
0 - Change of the pin INT0 logic state cannot generate an interrupt.
1 - Enables an external interrupt on the pin INT0 state change.
ET0 - bit enables or disables timer 0 interrupt:
0 - Timer 0 cannot generate an interrupt.
1 - Enables timer 0 interrupt.
EX0 - bit enables or disables external 0 interrupt:
INTERRUPT PRIORITIES
It is not possible to foreseen when an interrupt request will arrive. If several interrupts are
enabled, it may happen that while one of them is in progress, another one is requested. In
order that the microcontroller knows whether to continue operation or meet a new interrupt
request, there is a priority list instructing it what to do.
Figure 35
Interrupt priority bit
PS - Serial Port Interrupt priority bit
Priority 0
Priority 1
PT1 - Timer 1 interrupt priority
Priority 0
Priority 1
PX1 - External Interrupt INT1 priority
Priority 0
Priority 1
PT0 - Timer 0 Interrupt Priority
Priority 0
Priority 1
PX0 - External Interrupt INT0 Priority
Priority 0
HANDLING INTERRUPT
Instruction in progress is ended.
The address of the next instruction to execute is pushed on the stack.
Depending on which interrupt is requested, one of 5 vectors (addresses) is written to the
program counter in accordance to the table below:
Interrupts handling
Table 5
INTERRUPT SOURCE
VECTOR (ADDRESS)
IE0
3h
TF0
Bh
TF1
1B h
RI, TI
23 h
All addresses are in hexadecimal format
These addresses store appropriate subroutines processing interrupts. Instead of them, there
are usually jump instructions specifying locations on which these subroutines reside.
When an interrupt routine is executed, the address of the next instruction to execute is poped
from the stack to the program counter and interrupted program resumes operation from
where it left off.
RESET CIRCUIT
Reset occurs when the RS pin is supplied with a positive pulse in duration of at least 2
machine cycles (24 clock cycles of crystal oscillator). After that, the microcontroller
generates an internal reset signal which clears all SFRs, except SBUF registers, Stack Pointer
and ports (the state of the first two ports is not defined, while FF value is written to the ports
configuring all their pins as inputs). Depending on surrounding and purpose of device, the RS
pin is usually connected to a power-on reset push button or circuit or to both of them. Figure
below illustrates one of the simplest circuit providing safe power-on reset.
Figure 36
Reset circuit
Basically, everything is very simple: after turning the power on, electrical capacitor is being
charged for several milliseconds through a resistor connected to the ground. The pin is driven
high during this process. When the capacitor is charged, power supply voltage is already
stable and the pin remains connected to the ground, thus providing normal operation of the
microcontroller. Pressing the reset button causes the capacitor to be temporarily discharged
and the microcontroller is reset. When released, the whole process is repeated
Through the program- step by step...
Microcontrollers normally operate at very high speed. The use of 12 MHz quartz crystal
enables 1.000.000 instructions to be executed per second. Basically, there is no need for
higher operating rate. In case it is needed, it is easy to build in a crystal for high frequency.
The problem arises when it is necessary to slow down the operation of the microcontroller.
For example during testing in real environment when it is necessary to execute several
instructions step by step in order to check I/O pins' logic state.
Interrupt system of the 8051 microcontroller practically stops operation of the
microcontroller and enables instructions to be executed one after another by pressing the
button. Two interrupt features enable that:
Interrupt request is ignored if an interrupt of the same priority level is in progress.
Upon interrupt routine execution, a new interrupt is not executed until at least one instruction
from the main program is executed.
In order to use this in practice, the following steps should be done:
External interrupt sensitive to the signal level should be enabled (for example INT0).
Three following instructions should be inserted into the program (at the 03hex. address).
What is going on? As soon as the P3.2 pin is cleared (for example, by pressing the button),
the microcontroller will stop program execution and jump to the 03hex address will be
executed. This address stores a short interrupt routine consisting of 3 instructions.
The first instruction is executed until the push button is realized (logic one (1) on the P3.2
pin). The second instruction is executed until the push button is pressed again. Immediately
after that, the RETI instruction is executed and the processor resumes operation of the main
program. Upon execution of any program instruction, the interrupt INT0 is generated and the
whole procedure is repeated (push button is still pressed). In other words, one button press one instruction.
POWER DOWN MODE
By setting the PD bit of the PCON register from within the program, the microcontroller is
set to Power down mode, thus turning off its internal oscillator and reduces power
consumption enormously. The microcontroller can operate using only 2V power supply in
power- down mode, while total power consumption is less than 40uA. The only way to get
the microcontroller back to normal mode is by reset.
While the microcontroller is in Power Down mode, the state of all SFR registers and I/O
ports remains unchanged. By setting it back into the normal mode, the contents of the SFR
register is lost, but the content of internal RAM is saved. Reset signal must be long enough,
approximately 10mS, to enable stable operation of the quartz oscillator.
PCON REGISTER
Figure 37
PCON register
The purpose of the Register PCON bits is:
SMOD Baud rate is twice as much higher by setting this bit.
GF1 General-purpose bit (available for use).
GF1 General-purpose bit (available for use).
GF0 General-purpose bit (available for use).
PD By setting this bit the microcontroller enters the Power Down mode.
Assembly language
INTRODUCTION
This is a brief introduction to assembly language. Assembly language is the most basic
programming language available for any processor. With assembly language, a programmer
works only with operations implemented directly on the physical CPU. assembly language is
the most powerful computer programming language available, and it gives programmers the
insight required to write effective code in high-level languages.
ASSEMBLY LANGUAGE
A special program called an assembler would then take the programmer's words and convert
them to numbers that the computer could understand. This new method, called writing a
program in assembly language, saved programmers thousands of hours, since they no longer
had to look up hard-to-remember numbers in the backs of programming books, but could use
simple words instead.
The program above, written in assembly language, looks like this:
MOV
AX,
47104
MOV
DS,
AX
MOV
[3998],
36
INT 32
When an assembler reads this sample program, it converts each line of code into one CPUlevel instruction. This program uses two types of instructions, MOV and INT. On Intel
processors, the MOV instruction moves data around, while the INT instruction transfers
processor control to the device drivers or operating system.
The program still isn't quite clear, but it is much easier to understand than it was before. The
first instruction, MOV AX, 47104, tells the computer to copy the number 47104 into the
location AX. The next instruction, MOV DS, AX, tells the computer to copy the number in AX
into the location DS. The next instruction, MOV [3998], 36 tells the computer to put the
number 36 into memory location 3998. Finally, INT 32 exits the program by returning to the
operating system.
INSTRUCTIONS
The process of writing program for the microcontroller mainly consists of giving instructions
(commands) in the specific order in which they should be executed in order to carry out a
specific task. As electronics cannot understand what for example an instruction if the push
button is pressed- turn the light on means, then a certain number of simpler and precisely
defined orders that decoder can recognize must be used. All commands are known as
INSTRUCTION SET. All microcontrollers compatible with the 8051 have in total of 255
instructions, i.e. 255 different words available for program writing.
TYPES OF INSTRUCTIONS
Depending on operation they perform, all instructions are divided in several groups:
Arithmetic Instructions
Branch Instructions
Data Transfer Instructions
Logic Instructions
Arithmetic instructions
Arithmetic instructions perform several basic operations such as addition, subtraction, division,
multiplication etc. After execution, the result is stored in the first operand. For example:
ADD A, R1 - The result of addition (A+R1) will be stored in the accumulator.
Instruction set
ARITHMETIC INSTRUCTIONS
Mnemonic
Description
Byte
Cycle
ADD A, Rn
ADD A, direct
ADD A, @Ri
ADD A, #data
ADDC A, Rn
ADDC
A,
direct
ADDC A, @Ri
ADDC
A,
#data
carry flag
Subtracts the register from the accumulator with a
SUBB A, Rn
SUBB
borrow
A,
direct
SUBB A, @Ri
SUBB A, #data
INC A
INC Rn
INC Rx
INC @Ri
DEC A
DEC Rn
DEC Rx
DEC @Ri
INC DPTR
MUL AB
Multiplies A and B
DIV AB
Divides A by B
DA A
BRANCH INSTRUCTIONS
There are two kinds of branch instructions:
Unconditional jump instructions: upon their execution a jump to a new location from where
the program continues execution is executed.
Conditional jump instructions: a jump to a new program location is executed only if a
specified condition is met. Otherwise, the program normally proceeds with the next
instruction.
BRANCH INSTRUCTIONS
Mnemonic
Description
Byte
Cycle
ACALL addr11
LCALL addr16
RET
RETI
AJMP addr11
Absolute jump
LJMP addr16
Long jump
SJMP rel
JC rel
JNC rel
JB bit,rel
JBC bit,rel
JMP @A+DPTR
JZ rel
JNZ rel
CJNE
A,
direct,rel
CJNE
A,
#data,rel
rel
CJNE
@Ri,
#data,rel
DJNZ Rn, rel
Table 7
Branch instruction
DATA TRANSFER INSTRUCTIONS
Data transfer instructions move the content of one register to another. The register the content
of which is moved remains unchanged. If they have the suffix X (MOVX), the data is
exchanged with external memory.
D ATA T R A N S F E R I N S T R U C T I O N S
Mnemonic
Description
Byte
Cycle
MOV A, Rn
MOV A, direct
MOV A, @Ri
MOV A, #data
MOV Rn, A
MOV direct, A
MOV direct, Rn
MOV @Ri, A
MOV
direct,
direct
MOV direct, @Ri
MOV
direct,
#data
MOV
DPTR,
#data
MOVC
A,@A+DPTR
MOVC
A,@A+PC
accumulator (address=A+PC)
Moves the external RAM (8-bit address) to the
MOVX A, @Ri
MOVX
accumulator
A,
@DPTR
MOVX @Ri, A
3-10
3-10
4-11
4-11
MOVX @DPTR,
(16-bit address)
PUSH direct
POP direct
XCH A, Rn
XCH A, direct
XCH A, @Ri
XCHD A, @Ri
Exchanges
the
indirect
RAM
with
the
accumulator
Exchanges the low-order nibble indirect RAM
with the accumulator
Table 8
Data transfers instruction
LOGIC INSTRUCTIONS
Logic instructions perform logic operations upon corresponding bits of two registers. After
execution, the result is stored in the first operand.
LOGIC INSTRUCTIONS
Mnemonic
Description
Byte
Cycle
ANL A, Rn
ANL A, direct
ANL A, @Ri
ANL A, #data
ANL direct, A
ORL A, Rn
OR register to accumulator
ORL A, direct
ORL A, @Ri
ORL direct, A
XRL A, Rn
XRL A, direct
XRL A, @Ri
XRL A, #data
XRL direct, A
CLR A
CPL A
SWAP A
RL A
XORL
#data
RLC A
RR A
RRC A
direct,
Liquid Crystal Displays have materials, which combine the properties of both liquids and
crystals. LCD consists of two glass panels, with the Liquid Crystal material sand witched in
between them. The inner surfaces of the glass plates are coated with transparent electrodes,
which define the character, symbols or patterns to be displayed.The LCDs are lightweight
with only a few millimeters thickness. Since the LCDs consume less power, they are
compatible with low power electronic circuits and can be powered for long durations.The
LCDs dont generate light and so light is needed to read the display. By using backlighting,
reading is possible in the dark. The LCDs have long life and wide operating temperature
range. A brighter display can be obtained by providing backlighting.
LCD has single line display, Two-line display, four line display
01
80
87
C0
C7
Two-line display
Registers
80
8F
C0
CF
The Controller has two 8-bit registers. Instruction Registers (IR) and Data Registers (DR).
The IR stores the instruction codes and address instruction for Display Data RAM (DD
RAM) and Character Generator RAM (CG RAM). The DR temporarily stores data to be
written to/read from DD RAM or CG RAM. When an address code is written to IR, the data
(of the specified address) is automatically transferred from the DD RAM or CG RAM to the
DR
RS
EQU
P0.0 (PORT-0)
EN
EQU
P0.1
DATA0
EQU
P0.2
DATA1
EQU
P0.3
DATA2
EQU
P0.4
DATA3
EQU
P0.5
PIN DETAILS
Pin No.
Symbol
Description
VSS
Ground Terminal, 0V
VDD
VLCD
RS
Register Select:
RS = 0-Instrution Register
RS = 1-Data Register
R/W
Read/Write:
R/W = 0 Write
R/W = 1 Read
EN
Enable
7-14
DB0-DB7
15
LED+
Supply Terminal,+5V
16
LED-
Ground Terminal,0V
Stepper Motors
A stepper motor is a permanent magnet or variable reluctance dc motor that has the following
performance characteristics:
rotation in both directions,
precision angular incremental changes,
repetition of accurate motion or velocity profiles,
a holding torque at zero speed, and
capability for digital control.
A stepper motor can move in accurate angular increments knows as steps in response to the
application of digital pulses to an electric drive circuit from a digital controller. The number
and rate of the pulses control the position and speed of the motor shaft. Generally, stepper
motors are manufactured with steps per revolution of 12, 24, 72, 144, 180, and 200, resulting
in shaft increments of 30, 15, 5, 2.5, 2, and 1.8 degrees per step.
Stepper motors are either bipolar, requiring two power sources or a switchable polarity
power source, or unipolar, requiring only one power source. They are powered by dc current
sources and require digital circuitry to produce the coil energizing sequences for rotation of
the motor. Feedback is not always required for control, but the use of an encoder or other
position sensor can ensure accuracy when it is essential. The advantage of operating without
feedback is that a closed loop control system is not required. Generally, stepper motors
produce less than 1 horsepower(746W) and are therefore frequently used in low-power
position control applications.
BIBLIOGRAPHY/ REFERENCES:
TABLE OF CONTENTS
s. no.
1
2
3
4
5
6
7
chapter
List of figures
List of tables
OBJECTIVE
INTRODUCTION
EMBEDDED SYSTEMS
ARCHITECTURE OF 8051
8051 MICROCONTROLLER MEMORY
8
9
ORGANISATION
COUNTERS AND TIMERS
UART (UNIVERSAL ASYNCHRONOUS
10
11
12
13
14
INTERRUPTS
ASSEMBLY LANGUAGE
LIQUID CRYSTAL DISPLAY (LCD)
STEPPER MOTORS
BIBLIOGRAPHY/ REFERENCES
List Of Figures
S. NO
FIGURE
FIG. DISCRUPTION
01
FIG. 1
02
FIG. 2
microcontroller
Basic block diagram of
03
FIG. 3
microprocessor
Basic architecture of 8051
04
FIG. 4
microcontroller
Pin details of 8051
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
FIG. 5
FIG. 6
FIG. 7
FIG. 8
FIG. 9
FIG. 10
FIG. 11
FIG. 12
FIG. 13
FIG. 14
FIG. 15
FIG. 16
FIG. 17
FIG. 18
FIG. 19
FIG. 20
FIG. 21
FIG. 22
FIG. 23
FIG. 24
FIG. 25
FIG. 26
FIG. 27
FIG. 28
FIG. 29
FIG. 30
FIG. 31
FIG. 32
FIG. 33
microcontroller
I/O function of 8051
I/O function of 8051
Port 0 function in voltage
External pull up register at
port 0
Accumulator register set
B register set
PSW register set
REGISTER BANK
ORGANIZATION
Timer set (according to bit)
Timer higher and timer lower
Bit calculation
TMOD register
Timer 0 in mode 0
Timer 0 in mode 1
Timer 0 in mode 2
Timer 0 in mode 3
Timer control register bit
How to use the timer 0
How to turn on the timer
UART bit duration
SCON register bit
Data transmission in MODE 0
Data receiver in MODE 0
Data transmission in MODE 1
Data receiver in MODE 1
Data transmission in MODE 2
Data receiver in MODE 2
34
35
36
37
FIG. 34
FIG. 35
FIG. 36
FIG. 37
Communication set 1
Communication set 2
Interrupts controls
Interrupt enable bit
38
39
40
FIG. 38
FIG. 39
FIG. 40