Interleaved DC to DC Buck Converter for Low Power

Application
Nirmal

Piyush Kumar Jain

Department of Electrical Engineering

National Institute of Technology

Wanakbori Thermal Power Station

Gujarat State Electricity Corporation Ltd
Kheda, India

Kurukshetra, India
supreme.nirmal@gmail.com

Keywords Conventional DC to DC
Buck Converter,
Cascaded DC to DC Buck Converter, Interleaved Technique

I.

INTRODUCTION

st

In this 21 century the demand of electrical power is

growing at a rapid rate and to meet this demand, more
efficient systems and low power applications play a vital role
.In order to fulfill the increasing demand, faster and most
efficient devices such as data processor, microprocessors,
portable devices efficient system are required. The continuous
sandwiching the large number of devices on single chip has
increased the current demand with good power quality and
extremely low margin of tolerance i.e. voltage ripple and
current ripple .The proposed interleaved dc-dc converter gives
low voltage and high current at its output. Since interleaving
methodology is used to minimize the voltage ripple at the
output terminals. With the advancement of the ICs, the size of
the devices are getting reduced day by day [2]-[4]. In this
respect size becomes a critical point of concern in the

978-1-4678-6503-1/15/$31.00 2015 IEEE

Department of Electrical Engineering

National Institute of Technology
Kurukshetra, India

piyush.jain@gseclmail.com

Abstract this paper explains the use of DC to DC Buck

Converters for low power application. In many power
applications like various microcontrollers, several
electronic ICs, laptops, traction signaling, electric vehicles
etc, low dc voltage supply is required in controlled
manner. The proposed DC-DC converter with interleaved
technique can step down a high DC voltage to very low DC
voltage with lesser voltage ripple and low value of inductor
and capacitor thus reducing the size. With conventional
buck chopper for converting high voltage to low voltage,
very small duty cycle is required which further adds
several limitations on different components and triggering
circuitry and requires relatively high values of inductor
and capacitor to insure permissible current ripple and
voltage ripple i.e. within limits. Simulations have been
performed using MATLAB / SIMULINK. All results
clearly show that very low voltage can be obtained using
proposed topology. Moreover, the desired values of the
output voltages can be numerically calculated which
absolutely match with simulation results.
.

Amit Kumar

amitpundir42@yahoo.com

proposed dc-dc converter with interleaved technique. The aim

is to get low output voltage i.e. 2volts or even lesser. As duty
cycle increase from 6%(as in case of conventional buck dc-dc
converter) to 50%(as in proposed dc-dc converter) the
required value of inductor and capacitor get reduced and
voltage ripple also gets reduced using interleaved techqine
whereas, in conventional buck converter, extremely low duty
cycle is required which increases the value of inductor and
capacitor used[1]. In this analysis, the proposed dc-dc
converter has been compared with
conventional buck
converter and cascaded dc-dc converter .Whole analysis is
divided into 3 cases .In first case, the value of input voltage,
output voltage, L,C and R has been assumed constant[1]
The main equation of buck converter is
Vo =k *Vs-Vdr

(1)

Vdr= average drop of chopper

Whereas, main equation of proposed dc-dc converter is
VO = Vs - k1*Vs-Vdr k2*Vs-Vdr

(2)

VO = Vs k1*Vs- k2*Vs-2*Vdr

(3)

k1 and k2 are duty cycles of chopper 1& chopper 2 respectively

Fig.1: Block diagram of proposed dc-dc converter topology

II.

DC DC CONVERTER PROPOSED TOPOLOGY

DESPRIPTION

The topology of proposed dc-dc converter is shown in

figure 1. It is basically two buck converters connected in
parallel. The duty cycle of both the converters can be same
or different. For simplicity, the duty cycle of both buck
converters is kept same here. From the equations, it can be
observed that by varying the duty cycle of both converter
or any one converter, the desired output voltage can be
obtained. Here in this proposed topology, both choppers
are being operated at same duty cycle i.e. duty cycle =
45%. The proposed topology gives about 1.5V as output.

current ripple gets increased so to overcome problem of

increased voltage and current ripple, interleaved technique
is used.
Second technique
is synchronous buck converter
technique in which instead of diode as shown in fig .3 [6][7], another switch has been used which complementary
operates with its corresponding switch S2 which in turn is
complementary with S1 and similarly S4 is complementary
with S3 so, by replacing diode in fig .4 with a switch as
shown in fig 4 the conventional buck converter gets
converted into synchronous buck topology. The advantage
of using the synchronous buck topology is that it reduces
power loss taking place in diode during conduction period
which is equal to the product of the forward voltage drop
and the current flowing during conduction period [1].

Fig. 2: Conventional buck converter [8]

As shown in fig.2, there are two dc-dc buck converter
which are connected in parallel with four switching device
namely S1, S2, S3, S4 . In this topology, there are two
interleaving techniques. First one is interleaved and second
one is synchronous buck technique. The first one implies
that both buck chopper are interleaved from one another by
1800 as triggering pulse in S1,S3 are having the time lag
corresponding to 1800.So S3 is on after some time i.e. t=
1/(2*fc) (sec) when S1 is ON

Fig.4: Circuit of Proposed dc-dc converter topology

III.

MATHEMATICAL ANALYSIS OF THE

PROPOSED DC-DC CONVERTER

Now in this section it can be observed that how proposed

dc-dc converter topology can obtain low output voltage at
higher duty cycle which has its obvious advantages over
conventional buck converter that operates at low duty
cycle about less than 10% in order to obtain same output
voltage.
For dc-dc buck converter, there is a relation.
V0 = k*VS

(4)

For proposed dc-dc converter, the equations obtained by

applying KVL in loop 1 of fig. 1 are:
Fig.3: Synchronous buck converter [6]
In conventional dc-dc buck converter 6.25% duty cycle is
required to get 1.5V with 24V of input voltage but here
both the choppers are being operated at duty cycle close to
50% in order to get same 1.5V of output voltage with 24V
of input. The advantage of increasing the duty cycle is that
value of inductor and capacitor requires for continuous
conduction gets reduced but both voltage ripple and

V0= VS - V1-V2

(5)

V1= K1*VS - Vdr

(6)

V2= K2*VS Vdr

(7)

V0= VS K1*VS- K2*VS- 2*Vdr

(8)

Assuming that both converter operates at same duty cycle

then,
K1=K2 =K

(9)

V0= VS- 2*K*VS- 2*Vdr

(10)

V0= VS-2*K*(VS + Vdr)

(11)

Now assuming k=45% , VS = 24 volts , Vdr= 0

We get , V0 = 2.4 V
But, practically Vdr 0 so we get less than 2.4 volts at
output

IV. SIMULATION RESULTS AND COMPARISON BETWEEN

PROPOSED DC-DC CONVERTER TOPOLOGY AND
CONVENTIONAL DC-DC CONVERTER.
Here, the proposed dc-dc converter topology will be
compared with conventional dc-dc buck converter as shown in
figure 3 and cascaded dc-dc converter as shown in figure 7.
The comparison can be done in several ways i.e. keeping some
parameters constant and observe the variation in other
parameters. Firstly, certain parameters i.e. supply voltage,
output voltage, values of inductor, values of capacitor, load
resistance are made constant and the values of voltage ripple
and current ripple are observed. Secondly, certain parameters
constant are made constant again but this time these are supply
voltage, output voltage, load resistance, voltage ripple and
current ripple. The values of L and C are varied until the
desired value of ripple voltage and ripple current are obtained.
The aim of above made assumption is to see that the values of
inductor and capacitor in proposed topology should reduce but
also not at the cost of voltage ripple and current ripple. Finally
the optimum values of voltage ripple, current ripple, inductor
and capacitor are obtained.

Parameters

Conventional buck
converter

Proposed topology

Voltage ripple

0.2V

0.05V

Current ripple

0.006A

0.0015A

Table 1 contains two columns. It compares conventional

buck converter and proposed dc-dc converter topology with
certain parameters of both topologies being same. The same
parameters are input voltage, output voltage (i.e. Vo = 1.8v),
inductor L= 1mH, capacitor C = 1F and observe the ripple
voltage and ripple current as shown in figure 5. It is found that
the values of voltage ripple and current ripple are reduced.

Fig.5: Matlab simulation of the proposed dc-dc converter topology.

With Vs= 24, L= 1mH, C= 1F

A. Case .1
In this case supply voltage, output voltage, value of L & C
are kept same and the value of voltage ripple and current
ripple in both converters i.e. conventional buck converter and
proposed dc-dc converter topology, are observed as shown in
table I.
TABLE I.

Conventional buck
converter

Proposed topology

24V

24V

1.8V

1.8v

1 (mH)

1 (mH)

1 (F)

1 (F)

Parameters
Supply
voltage
Output
voltage

Fig .6: Matlab simulation of the conventional buck converter. With

Vs= 24, L= 1mH, C= 1F

B. Case .2
As discussed earlier, in second case some parameters will
be made constant and these parameters are output voltage,
input voltage, ripple voltage and ripple current. Inductance
and capacitance values are observed that allows us to get
required ripple voltage and required ripple current.

with some constant parameters such as input voltage ,output

voltage , inductor, capacitor and the ripple voltage and ripple
current is obsereved [8]-[10].

TABLE II.

Parameters
Supply
voltage
Output
voltage
L
C

Conventional buck
converter

Proposed topology

24V

24V

1.8V

1.8v

4.5 (mH)

1 (mH)

2.5 (F)

1 (F)

Voltage ripple

0.05V

0.05V

Current ripple

0.0015A

0.0015A

TABLE III.
Cascaded buck
converter

Proposed topology

24V

24V

1.8V

1.8v

1 (mH)

1 (mH)

1 (F)

1 (F)

Voltage ripple

0.4V

0.05V

Current ripple

0.01A

0.0015A

Parameters
Supply
voltage
Output
voltage

Fig .7: Matlab/simulation of the conventional buck converter. With

Vs= 24, L= 4.5mH, C= 2.5F

.
Fig .9: Matlab/simulation of the cascaded buck converter. With
Vs= 24, L= 1mH, C= 1F

Fig.8: Simulation diagram of cascaded dc-dc buck converter.

C . Case .3
In case thrid , proposed dc-dc converter topology will be
compared with cascaded dc-dc converter as shown in figure 8

V.
CONCLUSION
This paper presents DC to DC Buck Converter for low power
application with reduced voltage & current ripple as well as
reduced value of required capacitor & required inductor used
.In this paper, proposed topology has been compared with
conventional buck converter and cascaded buck converter
.Results have been shown in tables. On comparing,
conventional buck converter with proposed topology (keeping
all the other parameters same), it has been found that the
voltage and current ripples decrease from 0.2V to 0.05V and
0.006A to 0.0015A respectively. And, on comparing cascaded
dc- dc converter with proposed topology, results change from
0.4V to 0.05V and 0.01A to 0.0015A for voltage and current
ripples respectively.

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