UNIVERSITY OF ZIMBABWE

ELECTRICAL ENGINEERING DEPARTMENT

POWER ELECTRONICS EE41O
FINAL EXAMINATION
-

JUNE 2001
Time allowed: Three Hours
There are eight questions of equal value.
ANSWER ANY FIVE QUESTIONS
PLEASE NOTE
All answers must be written in ink.
(Except where there are explicitly required, pencils may
only be used for drawing, sketching or graphical work.)
Marks wi1l only be awarded for answers that relate
Directly to the questions asked.
Full marks will not be awarded if answers are
not accompanied by adequate supporting explanations.
Show your working and state any assumptions that you make.
You may use a non-programmable electronic calculator.
Pocket computers and programmable calculators
are not allowed in this examination.
The marks allocated to each question or part thereofare shown in the right hand
margins. They are given for guidance only. For Full marks all relevant formulae
should be derived.

You may retain this paper at the end of the examination.

Question 1
(a) Draw the simplified structure of the vertical channel DMOS power MOSFET and use it to explain
the principle of operation ofthe device. Explain how lower values ofRDS(ON) are achieved when
compared with the planar MOSFET.
What advantages does the power MOSFET have over the bipolar junction transistor in switching
applications?

(b) Explain, with the aid of a diagram, the operation ofthe insulated gate bipolar transistor (IGBT).
Compare the IGBT with the power MOSFET and the bipolar junction transistor to show why it ha~
become the device of choice in medium power motor drive and power supply applications.
(c) The thyristor can be represented by the two-transistor analogy as given below:
Anode

Anode

~1~

J2

Gate
p

J3

Gate

~1~

Cathode

Cathode

Fig.

Q. 1(c)

If the current gains of the pnp and npn transistors are a! and ct2 respectively, and Ico is the total
leakage current of the thyristor, show that
I

Ico/{l-(ctl+a2)}

and use this relationship to explain the operation of the thyristor.

What are the effects of excessive di/dt and dv/dt on the thyristor?

Question 2

Fig.

Q. 2

The figure shows two identical semiconductors Si and S2 mounted on a common heatsink. The
devices are in TO-3 packages and have a thermal resistance from junction to case of Rjc = 0.63 CIW.
The interface between the case an~ithe heatsink has a thermal resistance of R~cs= 0.1 C/W.The
thermal resistance between the heatsink and ambient is R6SA = 30 C/W.The maximum allowable
junction temperature is TJ(M,~) 150 C.
(a)

Draw the static thermal equivalent circuit for the given thermal system.

(b)

If the devices are dissipating the same amount of power, and the ambient temperature is TA =
35 C,what is the maximum total power that can be dissipated?

(c)

What is the maximum power that can be dissipated if only one ofthe devices is operating?

Question 3

a~

-~

L~TH4

-~

Fig. Q.3

LI

The figure shows a 3-phase fully controlled bridge converter. Re-draw the converter to show that It
may be represented by two half-wave converters, and hence show that the average output voltage, Vd,
of the converter is given by the expression
Vd

(3I6/7t)V~hCosa

where Vph is the rms phase voltage of the ac supply and a is the thyristor firing, or delay, angle.
The bridge converter is fed from a 550V 3-phase supply and supplies a highly inductive DC load of
120A. Determine the voltage and current ratings of the converter thyristors.
Question 4
(a)

(b)

Derive, with the aid of suitable diagrams and waveforms, the expression for the voltage drop
due to commutation overlap in a 3-phase half-wave ac-dc converter in terms of the delay angle
a and overlap angle ~t.
Show also that the voltage drop due to commutation overlap may be expressed as
=

(3X~L1)/2ir

where Id is the load current and X

frequency f.
(c)

2itfL, the commutating reactance per phase at supply

Define the pulse number of a converter and discuss its significance in practical converter
circuits.

Question 5
(a)

Draw one leg of the 3-phase bridge inverter employing the McMurray-Bedford commutation
method and give a detailed explanation of the commutation process.

(b)

The McMurray-Bedford inverter is part of a 400V 3-phase uninterruptible power supply (UPS~
with an output rating of 40 kVA. Given that the rms value of the output line voltage is
I(2/3)Vd, where Vd is the dc link voltage, determine:
(i)
(ii)
(iii)

the dc link voltage Vd,

the thyristor voltage and current ratings,
the values of the commutating circuit parameters L and C for minimum trapped energy
given that the thyristor turn-off time tq is 25 ~J.S.

Question 6
(a)
Draw one leg of the 3-phase bridge inverter employing the McMurray commutation method
and give a detailed explanation of the commutation process.
(b)

Discuss the advantages and disadvantages of the McMurray commutation method when
compared with the McMurray-Bedford commutation circuit.
Which of the two commutation methods is more suitable for switching at high frequencies.

(c)

A McMurray inverter supplies a 110 kW, 400V 3-phase induction motor with power factor
cos4~= 0.8, which is subject to a 25% cyclic overload. Given that the rms value ofthe output
line voltage is I(2/3)Vd, where Vd is the dc supply voltage, determine the voltage and current
ratings of the thyristors and diodes in the circuit.

Question 7
(a)

Describe the principle of operation of the voltage-fed 3-phase sinusoidal PWM inverter. Sketc
the comparator voltage, pole voltage and ac line voltage waveforms.
What are the advantages of the sinusoidal PWM inverter over the square-wave PWM and sixstep inverters?

(b)

Show how constant volts/hertz operation can be achieved in a sinusoidal PWM inverter. Why
is it necessary to change the carrier ratio as the inverter fundamental frequency is altered?

Question 8
(a)

The figure shows the equivalent circuit of a DC chopper which is switched at a frequency f.
The duty cycle is t~/(t~
+ t
0), where
4.

___

VIN

Dl

vot,T

IL(MAX)

i2

L(MIN)

tc

to
_____

Fig. 8 (a)

t~= on time
t0 = offtime
t~+ t0 = T =

1/f

It may be assumed that the semiconductor devices are ideal switches, the DC source
impedance is negligible, load current is continuous and the output voltage is constant during a
cycle of operation. The steady-state load current waveform ofthe chopper is also shown.
Derive the expressions for IL(MIN) and ~MAx)in terms ofthe circuit parameters and the duty
cycle, and hence show that the ripple current is independent of the output voltage V0.
At what value of the duty cycle is the ripple current at its maximum, and what is its value at
this point?
C

TH3

TH1

D1

VIN

Fig.

(b)

1~

V~T

Q. 8(b)

The circuit shows a typical resonant DC chopper. Explain the operation of the chopper and
discuss the factors which determine the voltage and current ratings of the semiconductor
devices.
END OF QUESTION PAPER