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ECE 3436
4436
Table 7-1
Instruction
Categories
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Loc
Obj. code Source line
------ --------- ----------; Immediate addressing
000000 8640
ldaa #64
;
000002 CF09 02
lds
#$0902 ;
; Direct addressing
000005 D664
ldab $64
;
000007 5A65
staa $65
;
; Extended addressing
000009 B612 34
ldaa $1234
;
00000C FE12 34
ldx
$1234
;
00000F 7E08 00
stx
$0800
;
; Indexed addressing
000012 E6E0 17
ldab 23,x
;
000015 6B40
stab ,y
;
000017 A63E
ldaa 2,x;
;
Decimal 64 -> A
$0902 -> SP
($0064) -> B
A -> ($0065)
($1234) -> A
($1234:1235) -> X
X -> ($0800)
(X+23) -> B
B -> (Y)
(X) -> A
X-2 -> X (Auto
decrement)
20
; Indexed-indirect addressing
21 000019 EEEF
ldx
[d,y]
; ((D+Y)) -> X
22 00001B A6E3 0100
ldaa [$100,x]; ((X+$0100)) -> A
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Stack Instructions
Stack Pointer (SP) 16-bit address register that points to
the value on top of the stack.
Stack grows toward lower addresses.
Push operation puts new value on top of stack:
Decrement SP
Store value where SP points
Pull (pop) operation take value off top of stack:
Load value from where SP points
Increment SP
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after push
before
after pull
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Calling Subroutines
To call a subroutine:
JSR subr Jump to subroutine (many addressing modes)
BSR subr Branch to subroutine (9-bit relative)
Each works like this:
1. Pushes PC (return address, of next instruction) onto
stack.
2. Starts execution at target address (subr).
Last instruction in subroutine:
RTS Return from subroutine
Pops address off stack into PC, thus resuming
execution following the original JSR/BSR.
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Calling Subroutines
jsr printf
; call print function
<next instruction>
Address of this next
instruction (PC) is pushed
by jsr instruction.
printf:
<do printing>
rts
; return
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MC9S12C
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Fig 6-2
Memory map
11 000006
12
13
14
15
16
17
18
19
000009
00000C
00000F
000012
000015
000018
00001B
00001E
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XDEF Entry, main
Entry:
main:
0000 0002 DDRA: EQU
$0002 ; Data direction register
0000 0000 PTA:
EQU
$0000 ; Port A register
; . . .
4C02 FF
bset DDRA,%11111111 ; Make all lines
output
loop:
4C00 FF
bset PTA,%11111111
; Set all bits,
LEDs off
4D00 01
bclr PTA,%00000001
; Clear bit 0,
LED on
4D00 02
bclr PTA,%00000010
; Clear bit 1
4D00 04
bclr PTA,%00000100
; Clear bit 2
4D00 08
bclr PTA,%00001000
; Clear bit 3
4D00 10
bclr PTA,%00010000
; Clear bit 4
4D00 20
bclr PTA,%00100000
; Clear bit 5
4D00 40
bclr PTA,%01000000
; Clear bit 6
4D00 80
bclr PTA,%10000000
; Clear bit 7
20E3
bra
loop
; Do it forever
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Arithmetic Instructions
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Arithmetic Instructions contd
Table 7-12
Arithmetic
Instructions
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Arithmetic Instructions
Rel.
---1
2
3
4
5
6
7
8
9
10
11
12
13
14
Loc
Obj. code Source line
------ --------- ----------XDEF Entry, main
000000 FCxx xx
Entry:
main:
; Load 16 bits from Data1:Data1+1
ldd
Data1
; Add 16 bits from Data2:Data2+1
addd Data2
; Save the result
std
Data3
; Stores 16 bits
; . . .
Data:
SECTION
Data1: DS.W 1
Data2: DS.W 1
Data3: DS.W 1
000000
000002
000004
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Example 7-25 Multibyte Addition withECE
Carry3436
Bit
; Add the least significant bytes first
;
Get least sig byte of 16-bit Data1
ldab Data1+1
;
Add in the least sig byte of Data2
addb Data2+1
; The sum is in B and the carry bit now has the
; carry out that must be added into the most
; significant byte addition.
; Get most sig byte, ldaa does not change the carry
ldaa Data1
;
Add most significant plus carry
adca Data2
std
Data3
; Stores 16 bits
; . . .
Data:
SECTION
Data1: DS.W 1
Data2: DS.W 1
Data3: DS.W 1
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Logic Instructions
Table 7-13
Logic
Instructions
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Table 7-26
Conditional Branch
Instructions
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Rel. Loc
---- -----1
2
3
4
5
6
7
8
9
10 000000
000004
11
12
13
14 000005
000009
15
Entry:
main:
0000 0080 BIT_7:
0000 0040 BIT_6:
0000 0240 PORTT:
EQU
EQU
EQU
%10000000
%01000000
$240
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Table 7-19
Unconditional
jump and
branch
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