Unit-1

1. (a) Obtain the response of an RC low pass circuit for a step input.
(b) Draw the circuit diagram of RLC based ringing circuit and explain its
operation.
(R10,Supply,Jan/Feb
2015,set-1)
2. (a) Obtain the condition for an RC high pass circuit to behave as a good
differentiator.
(b) What is a double differentiator circuit? Draw and explain its response to ramp
input.
(R10,Supply,Jan/Feb
2015,set-2)

3. (a) Obtain the expression for the gain A and phase angle
of an RC low
pass circuit. Sketch the frequency response and find the expression for higher
cutoff frequency.
(b) A symmetrical square wave of 20V peak to peak amplitude with zero average
value and with a fundamental time period T is given as input of an RC low pass
circuit. Obtain the expression for peak-to-peak value of the output signal.
(R10,Supply,Jan/Feb
2015,set-3)
4. (a) What is low pass RC circuit? Derive an expression of output voltage for square
wave input and draw input-output characteristics of this circuit
(b)Explain the operation of RC high pass circuit when exponential input is applied.
(R10,Supply,Jan/Feb
2015,set-4)
5. (a) What is meant by linear wave shaping? Give some examples of linear wave
shaping circuits.
(b) Show that the output of a differentiator circuit is derivative of the input. What
are the assumptions to be made in the derivation?
(R10,Reg,Aug
2014,set-1)
6.(a) Draw RC high-pass circuit. Input to this circuit is represented as Vu(t )
Vu(ttp ).
Sketch the input and output waveforms of this circuit.
(b) Explain how new wave shapes are generated from another waveform using
some network.
(R10,Reg,Aug
2014,set-2)
7. (a) Define unit-step function, ramp function and impulse function. Show that a
pulse is combination of unit-step functions.
(b) What is meant by linear wave shaping?
(c) Why a capacitor in a high-pass RC circuit is named as blocking capacitor.
(R10,Reg,Aug
2014,set-3)
8. (a) What is a differentiator? Discuss how does it operate.
(b) Draw high-pass RC circuit. Explain its response to a square-wave input.
(R10,Reg,Aug
2014,set-4)
9. (a) Compare the response of RC circuit taken across R and C for an exponential
input.

(8M+8M
(b) Write the steps involved in the design a BJT switch.
)
(R13,Reg,May/June
2015,set-1)
10. (a) How RC circuit behaves as a differentiator and an Integrator? Discuss.
(8M+8M
(b) How BJT behaves as switch? Give details
)
(R13,Reg,May/June
2015,set-2)
11.(a) Relate the operation of series clipper and shunt clipper with corresponding RC
circuits
and give reasons for it.
(b) Obtain the relation between junction temperature and reverse saturation current
and give
details.

(R13,Reg,May/June
2015,set-3)
12. (a) Obtain the output voltage levels of RC low pass circuit for square wave input.
(8M+8M
(b) List out the switching characteristics of diode and BJT
)
(R13,Reg,May/June
2015,set-4)
13. (a) Conclude clamping circuit operation by considering source resistance and
diode resistance.
(b) Design a two level clipper for bias voltages V 1=5V and V2= -5V. Use
practical diodes
(R13,Reg,May/June
2015,set-1)
Unit-2
1.(a) Draw the basic circuit diagram of negative peak clamper circuit and explain its
operation.
(b) Draw the circuit diagram of slicer circuit using zener diodes and explain its
operation with the help of its transfer characteristic.
(R10,Supply,Jan/Feb
2015,set-1)
2.(a) Draw the shunt clipper that clips the sine wave signal above +5V and explain
its working with waveforms.
(b) Explain the response of the clamping circuit when a square wave input is applied
under steady state conditions.
(R10,Supply,Jan/Feb
2015,set-2)
3.(a) Classify different types of clipper circuits. Give their circuits and explain their
operation with the aid of transfer characteristics.
(b) State and prove clamping-circuit theorem.

(R10,Supply,Jan/Feb
2015,set-3)
4.(a)Derive the steady state response of a clamping circuit for a square wave
input in which the resistance Rs of the signal source is taken into account.
(b) Design a diode clamper circuit to clamp the positive peaks of the input signal at
zero level. The frequency of the input signal is 500Hz.
(R10,Supply,Jan/Feb
2015,set-4)
5.(a) What is meant by comparator? Give the applications of voltage comparators?
(b) Determine the peak output voltage for a negative series clipper circuit
connected to an input sinusoidal signal of peak value 12 V. The barrier potential for
silicon diode is 0.7 V. Draw the circuit diagram and output waveform.
(R10,Reg,Aug
2014,set-1)
6.(a)What is the difference between the output from a clipping circuit and a
clamping circuit? Explain with neat sketches.
(b) Determine the peak output voltage for a positive shunt clipper circuit
connected to an input AC sinusoidal signal of peak value 10 V. The barrier potential
for germanium diode is 0.3 V. Series resistor is of 400 and load resistor is of 2 k.
(R10,Reg,Aug
2014,set-2)
7.(a) Define clipper. Explain the clipping using zero diodes.
(b) Draw a transistor clipper and explain its operation.
(R10,Reg,Aug
2014,set-3)
8.(a) Explain how clipping at two independent levels can be achieved.
(b) Explain the operation of a diode comparator with a ramp input signal.
(R10,Reg,Aug
2014,set-4)
9.(a) Write different steps involved in symmetrical and unsymmetrical triggering
process
(b) Draw collector and base wave forms for collector coupled monostable multi
and explain
(R13,Reg,May/June
2015,set-4)
Unit-3
1.(a) Define the transistor switching times:
i) delay time

ii) rise time

iii) storage time and

iv) fall time.

(b) Draw the circuit diagram of RTL logic gate and explain its operation with the help
of truth table.
(R10,Supply,Jan/Feb 2015,set-1)
2.(a) With the help of neat wave forms explain the transition time of a diode.
(b) Compare the Resistor Transistor and Diode Transistor logic families.
(R10,Supply,Jan/Feb
2015,set-2)
3.(a) Design the transistor switch for the following specifications: V in= 3Vsquare
wave,VCC=10V, IC=1mA, hFE=50. Assume Si transistor.
(b)Why totem pole is used in DTL? Draw circuit diagram and explain a DTL gate with
this.

(R10,Supply,Jan/Feb
2015,set-3)
4.(a) Derive expressions for rise and fall time of a transistor in terms of the
transistor Parameters and operating currents.
(b) Verify the truth table of RTL NOR gate with the circuit diagram of two inputs.
(R10,Supply,Jan/Feb 2015,set-4)5. (a) Describe and
illustrate how the transistor acts a switch?
(b) Compare the various logic families?
(R10,Reg,Aug
2014,set-1)
6.(a) Compare the performance of TTL and ECL logic gates with respect to power
dissipation, noise margin, cost and propagation delay time.
(b) Draw the circuit, symbol and truth-table of a normally open tri-state switch.
(R10,Reg,Aug 2014,set-2)
7.(a) What is the difference between bipolar logic family and unipolar logic family?
Explain.
(b) What do you understand by the terms fan-in and fan-out? Draw an RTL circuit.
(R10,Reg,Aug
2014,set-3)
8.(a) Draw the circuit diagram of CMOS NAND gate and explain its operation.
(b) Compare the performance of TTL and MOSFET logic gates.
(R10,Reg,Aug
2014,set-4)
9. (a) Draw the OR gate and AND gate with diodes and analyze.
(8M+8
(b) List out the merits of ECL and its applications
M)
(R13,Reg,May/June
2015,set-2)
Unit-4
1.(a) Draw the circuit diagram of a fixed bias binary with speed up capacitors.
(b) Explain the method of symmetrical triggering with relevant diagram.
(R10,Supply,Jan/Feb
2015,set-1)
2. Design a collector coupled monostablemultivibrator employing two n-p-n silicon
transistors with 5 msec as its quasi stable state duration. Make reasonable
assumptions.
(R10,Supply,Jan/Feb
2015,set-1)
3.(a) Explain the reason for the occurrence of overshoot at the base of normally ON
transistor of one shot. Derive an expression for overshoot.
(b) Explain how a Schmitt trigger can be used as a comparator and as a squaring
circuit.
(R10,Supply,Jan/Feb
2015,set-2)
4. Draw the circuit diagram of collector coupled transistor astablemultivibrator.
Explain its operation and also derive an expression for the time period.
(R10,Supply,Jan/Feb

2015,set-2)
5.(a) Discuss symmetrical and asymmetrical triggering in case of bi-stable transistor
multivibrator.
(b) Design a transistor Schmitt trigger circuit employing two n-p-n silicon
transistors which has its upper tripping point at 6V and lower tripping point at 4V.
Assume that VCC=18V, IC(sat)=4mA and hFE(min)=20.
(R10,Supply,Jan/Feb 2015,set-3)
6.(a) Describe how the gate width T of an emitter coupled monostablemultivibrator
can be linearly varied by adjusting the bias voltage V through a dc potentiometer.
(b) Design an AstableMultivibrator to generate 5 kHz square wave.The supply
voltage VCC=10V, IC(sat)=10mA, hFE(min)=50 and assume Si transistors.
(R10,Supply,Jan/Feb 2015,set-3)
7.(a) What are the basic techniques in the triggering of BistableMultivibrator?
Explain the techniques with neat diagrams.
(b) Design a self bias bi-stable multivibrator employing two p-n-p silicon
transistors to operate at a maximum frequency of 60Hz. Assume that V CC=15V,
RC=2.2k , VCE(sat)=0.4V, VBE(sat)=0.95V, hFE=30 and the impedance of the trigger
source RS=680 .
(R10,Supply,Jan/Feb
2015,set-4)
8.(a) Explain the operation of a collector coupled transistor monostablemultivibrator
with the help of a neat circuit diagram and waveform.
(b) Write short notes on triggering of monostablemultivibrators
(R10,Supply,Jan/Feb
2015,set-4)
9.(a) What are different types of multivibrators? Explain the stable state of a
multivibrator.
(b) Sketch the circuit diagram of Schmitt trigger and explain its operation.
(R10,Reg,Aug 2014,set-1)
10. (a) In an astablemultivibrator, the base resistors are of 12.5 k and the
capacitors are of 0.01F Determine the pulse repetition rate.
(b) With the help of circuit diagrams explain the working of
monostablemultivibrator.
(R10,Reg,Aug
2014,set-1)
11.(a) What is meant by multivibrator? Explain the operation of fixed-bias
multivibrator.
(b) Explain how the astablemultivibrator can be used as voltage to frequency
converter.
(R10,Reg,Aug
2014,set-2)
12.(a) For a monostablemultivibrator calculate the input pulse width for the design
values of RC = 2 k, RB = 10 k, C = 0.1 F, VCC = 10 V, VBE(sat) = 0.8 V.
(b) Explain the triggering in monostablemultivibrator.
(R10,Reg,Aug
2014,set-2)
13.(a) Draw the circuit diagram of a Schmitt trigger and explain its operation.
(b) Write the applications of Schmitt trigger?
(R10,Reg,Aug
2014,set-3)
14.(a) What is the function of commutating capacitors? What causes the rounded
leading edge in the output waveforms of a multivibrator?

(b) Draw the circuit diagram of astablemultivibrator and explains its operation.
(R10,Reg,Aug
2014,set-3)
15.(a) How is an electronic switch superior to a mechanical switch? Why trigger
pulses are essential for the operation of a bistablemultivibrator?
(b) Draw the circuit of collector-coupled astablemultivibrator and explain its
operation.
(R10,Reg,Aug
2014,set-4)
16.(a) Write notes on the following:
i) Triggering in monostablemultivibrator
ii) Single-shot multivibrator
(b) Explain how an astablemultivibrator gives a square-wave.
(R10,Reg,Aug 2014,set-4)
Unit-5
1.(a) Write the differences between the voltage and current time base generators?
(b) Discuss the concept of Bootstrap Time Base Generator.
(R10,Supply,Jan/Feb
2015,set-1)
2.(a) Explain how UJT is used for sweep circuit?
(b) Draw the circuit diagram of Transistor Miller time base generator and give the
requirement of each component.
(R10,Supply,Jan/Feb
2015,set-2)
3.(a) Explain how an inductor L can be used to improve the linearity of a simple RC
sweep circuit.
(b) How does sync signal amplitude will affect frequency of operation of the sweep
generator?
(R10,Supply,Jan/Feb
2015,set-3)
4.(a) With a neat circuit, explain a method of compensation used to improve the
linearity of bootstrap time base circuit.
(b) Compare a transistor-switch sweep circuit with UJT sweep circuit with respect to
sweep speed and linearity of sweep.
(R10,Supply,Jan/Feb
2015,set-4)
5.(a) Define the following terms:
i) Time base
ii) Sweep voltage
iii) Sweep speed error iv) Displacement error
(b) Enumerate the various methods which are employed for generating time base
waves.
(R10,Reg,Aug
2014,set-1)
6(a)How time base generators can be classified? Differentiate between a
triggered ramp generator and free-running time base generator.
(b) Explain with circuit diagrams Miller sweep and Miller bootstrap time base
generators.
(R10,Reg,Aug
2014,set-2)
7.(a) What is meant by time base generator? Explain the expositional sweep circuit.

(b) Explain the basic principles of Miller and Bootstrap time base generator?
(R10,Reg,Aug
2014,set-3)
8.(a) Draw transistor Bootstrap time base generator and explain its operation
(b) Which type of time base generator is used in electromagnetic and electrostatic
deflection systems? Explain.
(R10,Reg,Aug 2014,set-4)
Unit-6
1.(a) What is relaxation? With neat circuit diagram explain the principle of operation
of a voltage sweep circuit using UJT.
(b) Define and explain the following terms: i) Phase delay and ii) Phase jitter
(R10,Supply,Jan/Feb
2015,set-1)
2.(a) Explain a method of triggering a blocking oscillator with the help of
circuit diagram.
(b) With neat circuit explain operation of bi-directional sampling gate using
transistors.
(R10,Supply,Jan/Feb
2015,set-1)
3.(a) Explain the need for synchronization.
(b) With neat circuit diagram and waveforms, explain the pulse synchronization of
an astable relaxation circuit.
(R10,Supply,Jan/Feb
2015,set-2)
4.(a) Explain the operation of astable transistor blocking oscillator with diode
control.
(b) Differentiate different types of uni-directional diode sampling gate.
(R10,Supply,Jan/Feb 2015,set-2)
5.(a) Explain the factors which influence the stability of a relaxation divider with the
help of a neat waveforms
(b) Explain how the synchronization of a sweep circuit is achieved with
symmetrical signals.
(R10,Supply,Jan/Feb
2015,set-3)
6.(a) Explain the principle of operation of monostable blocking oscillator with
base timing. Sketch the current waveforms and derive an expression for
current pulse width.
(b) What is pedestal? How it effect the output of sampling gates?
(R10,Supply,Jan/Feb
2015,set-3)
7.(a) What is phase jitter? Discuss the significance of it in a frequency divider.
(b) A UJT sweep operates with VV=3V, Vp=16V and =0.5. A sinusoidal
synchronizing voltage of 2V peak is applied between bases and the natural
frequency of the sweep is 1 kHz, over what range of sync signal frequency will the
sweep remain in 1:1 synchronism with the sync signal?
(R10,Supply,Jan/Feb
2015,set-4)
8.(a) Derive an expression for the pulse width of a triggered transistor blocking
oscillator with base timings.
(b) Derive the gain and control voltages of four diode sampling gate.
(R10,Supply,Jan/Feb
2015,set-4)

9.(a) Explain the process of synchronization of a sweep circuit.

(b) Write notes on:
i) Astable relaxation circuits
ii) Monostable relaxation circuits
(R10,Reg,Aug
2014,set-1)
10.(a) Draw the diagram of two diode sampling gates and explain
(b) Distinguish between unidirectional and bi-directional sampling gates.
(R10,Reg,Aug
2014,set-1)
11.(a) What are the principles of synchronization? Explain.
(b) Explain how the synchronization of sweep circuit is achieved with
symmetrical signals.
(R10,Reg,Aug
2014,set-2)
12.(a) Write notes on diode controlled and RC controlled blocking
oscillators.
(b) What are the applications of sampling gates?
(R10,Reg,Aug
2014,set-2)
13.(a) With the help of a circuit diagram explain how a tuned-collector sinusoidal
oscillator is synchronized.
(b) Write notes on:
i) Stability of relaxation dividers ii) Sine wave frequency division
(R10,Reg,Aug
2014,set-3)
14.(a) What are the basic operating principles of
sampling gates?
(b) Explain the operation of four diode sampling gate.
(R10,Reg,Aug
2014,set-3)
15.(a) What do you understand by the term phase stability? Explain.
(b) Explain about frequency division in the sweep circuit.
(R10,Reg,Aug
2014,set-4)
16.(a) Write notes on the following:
i) Reduction of pedestal in gate circuit
ii) Monostable blocking oscillators
(R10,Reg,Aug
2014,set-4)
17.(a)Compare
the
process
of
synchronization
of
Astable
and
monostablemultivibrators.

(b) With the help of a neat circuit diagram and waveforms, explain
frequency division with respect to a sweep circuit.
(R13,Reg,May/June
2015,set-1)