Experiment 7

Design of Inverter Chain

Aim:- Design of Inverter chain to minimize the
delay

PROCEDURE:
1.
2.
3.
4.
5.

Invoke the Cadence Virtuoso.

Draw the schematic of the Circuit shown in Fig.1.
Invoke the Cadence ADE for device simulation.
Perform Transient analysis.
Verify the functionality and calculate the delay

Schematic Diagram of Inverter Chain

Output

Result

Inverter chain is Designed and Compared the delay of

single inverter with chain of inverters