Beruflich Dokumente
Kultur Dokumente
Analogue Electronics
Topic 2a
Op-amp
Topics
Determine the effect of finite loop gain, finite input resistance
and non-zero output resistance of an op-amp
Describe the various practical parameters of an op-amp
Determine the effect of an op-amps slew rate on the input
signal
Calculate the unity gain bandwidth, CMRR and PSRR of an
op-amp
Describe the operation of DAC and ADC
[Reference]
Donald A. Neamen, (2007), Microelectronics Circuit
Analysis and Design, 3rd Edition, McGraw-Hill. ISBN10:007-125443-9. Chapter 14.
Muhammad H. Rashid, (1999), Microelectronic Circuits:
Analysis and Design, PWS Publishing Company, ISBN
053495174-0. Chapter 7.
PART 1
Electronics
Electronics
Analog Electronics
Digital Electronics
Advantages of op-amps :
- Simple linear input-output characteristics (i.e. AO)
- Achieve near perfect operations (see loading effect)
- Isolate input from output (and vice versa).
Observations
1.
2.
3.
4.
Comparator
Closed loop
Inverting
Summer
Non-inverting
Difference
Buffer
Instrumentation
Voltage follower
amplifier
Isolation amplifier
7
Inverting Op-Amp
Use Virtual Short or Ground to
solve circuit problems
Noninverting Op-Amp
vO = (1 + R2 /R1)vI
(Try it!)
RL
vO
vI
RL RS
The output voltage level is
reduced by a ratio related to RS
vO vI
The load voltage is close to the
ideal input source vI. This is so
for noninverting amplifier.
10
JFET Op-Amp
LF411
Cc is designed to
stabilize the opamp (see chapter
on Stability).
12
BJT Op-Amp
LM324
13
14
15
PART 2
16
17
18
Example :
Ao vo / vd
For practical op-amps, the openloop gain is finite. Furthermore,
its value depends on the
frequency of operation, f (see
later on Frequency Response).
22
ACL
ACLO
1
R2
1
(1 )
AOL
R1
(assume Ri , f 0)
Noninverting Amplifier
where ACLO
R2
R for inverting amp
1
R
1 2 for noninverti ng
R1
23
R1
R2
1
vI
1 vO
v1
R1
R1 R2 R2
Since v2 0, vO AOLv1
vO 1
vI
1 vO
R1
AOL R1 R2 R2
R2
vO
R1
ACL
vI 1 1 (1 R2 )
AOL
R1
Note: as AOL , ACL ideal value
24
R1
R2
1
vO
1
v1
R2
R1 R2
Since vO AOL (v2 v1 ) and vI v2
v1 vI
vO
AOL
R2
1
vO
R1
ACL
vI 1 1 (1 R2 )
AOL
R1
Note: as AOL , ACL ideal value
25
Example:
A pressure transducer produces a maximum dc voltage signal of 2 mV and has an
output resistance of RS = 2 k. The maximum dc current from the transducer is
to be limited to 0.2 A. An inverting amplifier is used in conjunction with the
transducer to produce an output voltage of -0.10 V for a 2-mV transducer signal.
The error in the output voltage cannot be greater than 0.1%. Determine the
minimum open-loop gain of the amplifier to meet this specification.
R2
Rin = R1 + RS = R1 + 2k
R1
Rin(min) = vi / ii(max) = 2m / 0.2 = 10 k
RS
R1 = 8 k (minimize stray capacitive effect)
ACL = vo / vi = -0.10 / 2m = -50 = -R2 / Rin
R2 = 500 k
For voltage gain to be within 0.1%, minimum gain is 49.95 (magnitude).
R2
Rin
50
ACL
49.95
1
R
51
1
(1 2 )
1
AOL
Rin
AOL
AOL(min) 50.949
26
R
1 AOL O
RL
1
i1
1
1
Rif v1 Ri R2 RO RO
1
RL R2
vI
iI
Ri (1 AOL ) R2 (1
1
Ri
)
R1
R2
R1
27
0
RL
RO
R2
AOL 1
v1
R
R
2
O
vO
1
1
1
RL RO R2
KCL at input node :
v v
v
i1 1 1 O
Ri
R2
Combine :
R
1 AOL O
RL
1
i
1
1
1
Rif v1 Ri R2 RO RO
1
RL R2
0
RL
RO
R2
v1 AOLvd
R2
RO
vO
1
1
1
RL RO R2
KCL at v1 node :
iI
v1 v1 vO
R1
R2
R
1
R
R R
A v
1 R
iI 1 O O v1{ 1 O O O2 OL d }
R2
RL R2
R1 R2 RL R2 R2
Neglect effect of RO
1
1 A v
iI v1 OL d , vd i1 Ri , and v1 vI iI Ri
R2
R1 R2
R
Ri (1 AOL ) R2 (1 i )
v
R1
So, Rif I
Note: Rif as AOL
R2
iI
1
R1
29
Example :
Consider an inverting amplifier with a feedback resistor R2 = 10
k, and an op-amp with parameters AOL = 105 and Ri = 10 k.
Assume the output resistance RO of the op-amp is negligible.
Determine the closed loop input resistance.
Answer :
RO
1 AOL
RL
1
1
1
1 1 105
4
4
10
10
4
Rif Ri R2 RO RO 10
10
1
R
R
L
2
Rif 0.1
30
iO
1
1 AOL
Rof vO RO 1 R2 / R1
31
vO AOLvd
vO
RO
R1 R2
R1
vO vd
v1
R1 R2
Combining :
vO AOL R1
vO
iO
vO
RO RO R1 R2 R1 R2
iO
AOL
1
1
vO RO 1 R2 / R1 R1 R2
iO
AOL
1
1
Rof
vO RO 1 R2 / R1
Note: as RO 0 or AOL , Rof 0
32
PART 3
33
H ( s)
Bode Plot
s p
/p
/p
H ( j )
1 j p 1 j p /f2
which is written compactly as,
AO
AO ( f )
f
1 j f PD
= f3-dB = fb
with fPD = p/2. See right for graph.
The gain-bandwidth product (GBW) for an op amp is the unity gain bandwidth:
fT fPD AO
(set A0(f)=1 and assume fT >> fPD)
34
ACLO
for both inverting and noninverti ng
1
R
1
(1 2 )
AOL
R1
R2
f
(
1
)
1 j
f
R2
R1
R2
f PD
j
(
1
)
1
(1 )
AO
AO
f PD AO
R1
R1
ACLO
R
since typically AO (1 2 )
f
R
R1
1 j
(1 2 )
f PD AO
R1
ACLO
f
1 j
1
f PD AO
1 R2 R1
ACLO
f
j
GBW
1 R2 R1
35
1
2
2.2 0.35
2tr
tr
Gain-Bandwidth Product
For the frequency at unity gain,
ACLO
ACL 1
if ACLO
f unity
1
R
f A /(1 2 )
PD O
R1
1 (i.e. R2 R1 ),
f unity
f PD AO /(1
f unity ACLO
R2
)
R1
ACLO
R2
f PD AO /(1 ) f PD AO fT
R1
( R2 R1 )
The GBWs for the closed-loop and the open-loop systems are identical for the
37
same op-amp.
Example :
An audio amplifier is to use an op-amp with an open-loop gain
of AO = 2 x 105 and a dominant pole frequency of 5 Hz. The
bandwidth of the audio system is to be 20 kHz. Determine the
maximum closed loop gain.
Answer :
fT
f 3 dB
106
50
3
20 10
38
PART 4
39
Slew Rate, SR
Causes non-linear distortion of large output signals
If a sharp step input voltage is applied to an op-amp, the output
will not rise as quickly as the input (the reason being that there
are internal capacitances which take time to charge up/down
towards their final voltage levels).
Slew rate (SR) is the maximum rate of change possible at the
output of the op-amp, in V/s
dvo
SR
dt
max
vO VS 1 et
dvO d
VS t
t
VS 1 e
e
dt
dt
With a slew rate SR, we need to limit the output rising rate to,
VS/ = SR
VS = SR = SR/p = SR/2f3-dB
= SR/6.286f3-dB
42
Full-Power Bandwidth, fM
Op-amp slew rate limiting can cause non-linear distortion in
sinusoidal waveforms
Consider unity-gain follower with a sinusoidal input voltage,
vO = V sint. The slope of the wave is,
dvO
V cos t
dt
which reaches maximum at t = 0 with a value of V. This
value will push the op-amp to the limit at,
SR = V
43
44
M VO (max) SR
SR
SR
fM
V SR / VO(max)M /
45
Example :
Consider an amplifier with fT = 1 MHz and ACLO = 10.
Assume the op-amp slew rate is SR = 1 V/s and the
desired peak output voltage is VPO = 10 V. Determine
the small-signal bandwidth and the full-power
bandwidth.
Answer :
fT
106
f 3dB
100 kHz
A CLO 10
Convert unit
to V/s
SR
106
fM
15.9 kHz
2VPO 2 10
46
vd/2
Ad
20 log
Ac
CMRR
Advd
vd/2
dB
Differential Mode
ideally.
but the typical value is 100 dB.
vc
Acvc
Common Mode 47
equivalent
vd
v1 vc
2
Substituti ng :
vd
v2 vc
2
A1v1 A1 vc d
2
A2 v2 A2 vc d
2
v
v
vo A1v1 A2 v2 A1 vc d A2 vc d
2
2
A1 A2
vd A1 A2 vc
2
Ad vd Ac vc
where
Ad A1 A2 2 differenti al voltage gain
49
VCC
PSRR
VO
The ratio may be reversed, and/or may refer to the input (i.e. no fixed
standard):
PSRRRTI
VCC
ACL vO
VI
ASUP vI
VO
VCC
50
PART 5
51
52
53
55
R2
Av 1
R1 R5
57
Offset-Null Terminals
Many op-amps include a pair of external offset-null terminals
which can be used to compensate for the offset voltage
By varying the potentiometer R,
the output offset voltage can be
adjusted to zero within a certain
input offset voltage adjustment
range (15mV for the A741 opamp).
58
Example :
Consider a compensation network used for an inverting
amplifier, powered by VCC = 15 V and VEE = 15 V,
R5 = 0.1 k
R4 = 100 k
R3 = 100 k (potentiometer)
Determine the voltage range at VY.
Answer :
Assume the potentiometer arm is connected to VCC.
VY
R5
0.1
VCC
(15) 15 mV
R5 R4
0.1 100
60
I B1 I B2
IB
2
61
62
VO I B1R2
With IB1 = 0,
VY I B 2 R3 VX
R2
R2
VO 2 (1 )VX I B 2 R3 (1 )
R1
R1
Then, apply superposition theorem for the combined effects of
IB1 and IB2:
R2
VO I B1 R2 I B 2 R3 (1 )
R1
(I )
(I )
B1
B2
(gain)
64
R2
0 I B R2 R3 (1 )
R1
R1 R2
R3
R1 || R2
R1 R2
If the bias currents are not equal (i.e. IOS 0), and R3 is chosen
as R1||R2, then, a residue error will appear in the output:
VO R2 ( I B1 I B 2 ) R2 I OS
65
Example :
Consider the op-amp circuit with and without bias current
compensation. Let,
R1 = 10 k
R2 = 100 k
IB1 = 1.1 A
IB2 = 1.0 A.
Determine the output offset voltage due to biasing current.
Answer :
Without R3:
vO = IB1R2 = 1.1 (100k) = 0.11 V
With R3 compensation:
Choose R3 = R1||R2 = 10||100 = 9.09 k
vO = R2(IB1IB2) = (100k)(1.11.0) = 0.010 V
66