Sie sind auf Seite 1von 8

Indian Journal of Electrical and Computer Engineering

Volume 1, Number 1, January-June 2013, pp.31-38


@ Academic Research Journals, (India)

NPP Inverter Topology for Renewable


Energy Applications
1

S Umashankar and 2Rami Reddy.

(Asst. Professor Senior), 2Ch (MTech)


School of Electrical Engineering, Vellore Institute of Technology University, Vellore, Tamil Nadu, India
Email:shankarums@gmail.com, ramireddy204@gmail.com
Abstract:- Multi-level inverters are most commonly used inverters in industrial applications. Multilevel
inverters provide output signals with low harmonic distortion. When the number of level increases, the
output voltage THD decreases but the size and the cost of the system increases as well. The switching
voltage is reduced when the number of level increases, depending on the topologies, or when a series
connection of components is made. This paper describes a 3-level converter structure for high speed
motor drive applications and for renewable energy applications that allows decreasing switching losses in
comparison with the well known 3-level NPC (Neutral Point Clamped) inverter 1]. This feature leads to
the possibility to increase the switching frequency or the load current level thanks to series connection of
IGBTs. As the neutral point is actively piloted, this structure is named NPP (Neutral Point Piloted).
Keywords: Multi-level inverters, NPP inverter, NPC inverter, THD, switching loss, renewable energy
1. INTRODUCTION
Multilevel converters are finding increased attention in industry and academia as one of the preferred choices of
electronic power conversion for high-power applications.
Classical multi-level topologies are
1. Neutral-point clamped inverter
2. Flying capacitor inverter
3. Cascaded multi-level inverter.
The 2-level inverters produce an output voltage with levels either 0 or Vdc. In high-power applications and highvoltage applications, these two-level inverters have some limitations in operating at high-frequency mainly due to switching
losses and constraints of device ratings. Advanced drive systems in industries demand semi-conductor switches capable of bearing
high-voltage stresses. To solve this problem, neutral point clamped (NPC) inverters are developed. 3-level NPC inverter uses one
DC source, two capacitors to split the DC voltage and provide a neutral point Z as shown in fig 1. The NPC inverter leg is
composed of four switches and two diodes. In high power industrial drives using this inverter topology either IGBT or IGCT can
be employed as a switching device.
The NPP concept is very similar to that of NPC topology and was first introduced in 1977[1]. Instead of clamping the
connection points between switches and the capacitors through diodes, it is done by bi-directional switches. This gives a
controllable path for the current through the clamping devices. Fig [2] shows the neutral point piloted (NPP) inverter topology.
Two switches in series are necessary in upper and lower parts of the converter leg to reach the medium voltage. The two central
IGBTs form the bi-directional switch, which when switched-on generates the zero voltage level. This topology is aimed for
medium voltage (3.3, 6.6 and 9.9KV) and high power up to 48MW. The losses shared by the devices enable to switch at higher
switching frequencies, which can effectively increase the maximum output frequency. Hence, this converter can be suitable for
variable high-speed applications, such as train traction drives [2].

31

Indian Journal of Electrical and Computer Engineering


Volume 1, Number 1, January-June 2013, pp.31-38
@ Academic Research Journals, (India)
2. TOPOLOGIES

Figure 1. Three- level neutral point clamped inverter

Figure 2. Three-level neutral point piloted inverter


3. PRINCIPLE OF OPERATION
Mode 1: In this mode, we provide gating pulse to A2+, A1+ and AC+ as shown in fig3(a). The positive load current flows
through positive terminal of input, A2+, A1+, load to capacitors mid-point. Load is connected across the middle point of the
upper, lower switches to the capacitors mid-point. Upper switches are A2+ and A1+.Lower switches are A2- and A1- . In this
mode, AC+ will not carry any current because of reverse bias on AD- diode. So, no conduction loss. Switching losses are also
zero because of zero switching voltage.
In this mode, load voltage Vo = +Vdc/2.
Mode 2: In this mode, we apply gating pulse to AC+ only as shown in fig3 (b). This mode is known as free-wheeling mode. The
energy stored in the load inductance free-wheels through load, AC+, AD- and load. This energy is dissipated in the internal
resistance of the inductor.
In this mode, Load voltage is 0.

32

Indian Journal of Electrical and Computer Engineering


Volume 1, Number 1, January-June 2013, pp.31-38
@ Academic Research Journals, (India)
Mode 3: In this mode, we apply gating pulses to A2- , A1- and AC- as shown in fig3(c). The negative current flows through the
capacitor mid-point, load, A2-, A1-, negative terminal of input. AC- will not conduct any current through it because its collector is
at negative voltage and emitter at 0 voltages. Conduction loss and switching loss of the AC- are zero in this mode.
In this mode, load voltage Vo= -Vdc/2.
Mode 4: In this mode, we apply gating pulse to AC- only as shown in fig3 (d). This mode is known as free-wheeling mode, occurs
after the completion of negative half-cycle across the load. The energy stored in the inductor during the negative half-cycle is
dissipated in the loads resistance. Path for the dissipation is load, AC- , AD+, capacitors mid-point, load.
In this mode, Load voltage is 0.

TABLE 1: output voltage versus active switches

Figure 3. Different modes of the topology for positive and negative load currents

33

Indian Journal of Electrical and Computer Engineering


Volume 1, Number 1, January-June 2013, pp.31-38
@ Academic Research Journals, (India)
4. RESULTS AND DISCUSSION

Figure 4. Simulink model of 1-leg of NPP inverter

Figure 5. Output voltage of the inverter for 1-leg

Figure 6. Load current for inductive load

Figure 7. Voltage across A2+ and A1+

34

Indian Journal of Electrical and Computer Engineering


Volume 1, Number 1, January-June 2013, pp.31-38
@ Academic Research Journals, (India)

Figure 8.Voltage across A2- and A1-

Figure 9. Voltage across AC+ and AC-

Figure 10. Current through AC+ and AC-

Figure 11. Simulink model of the 3-phase NPP inverter

35

Indian Journal of Electrical and Computer Engineering


Volume 1, Number 1, January-June 2013, pp.31-38
@ Academic Research Journals, (India)

Figure 12.phase voltages of the NPP inverter

Figure 13. Line-to-Line voltage of the NPP inverter

Figure 14.load current of the NPP inverter

Figure15. Line-voltage FFT

Figure 16. Line current FFT

36

Indian Journal of Electrical and Computer Engineering


Volume 1, Number 1, January-June 2013, pp.31-38
@ Academic Research Journals, (India)

Figure17. Current through horizontal switches


(AC+, AC -, BC+, BC -, CC+, CC-)
Fig 4 and 11 shows the 1-phase and 3-phase NPP inverter topology simulink models. Fig.5 shows the output voltage of the
inverter for 1-leg which has three levels in its output voltage i.e. +Vdc/2, 0, -Vdc/2.In simulation, input voltage is taken as 100V.
The output voltage wave-form shows +50,0,-50. Fig 6 shows the current wave-form of an inductive load. From the voltage and
current wave-forms it is clearly observed that after the load voltage is zero in the both half-cycles there is still current flowing
through the load. This is because of AC+ and AC-. The current through AC+ and AC- is shown in the Fig 10. The switching
voltage of the vertical leg switches in the NPP topology is th of the Vdc.this is the major advantage of the NPP inverter over the
NPC inverter. In NPC inverter, the switching voltage of the vertical leg switches is half the input voltage. Fig 7 and 8 shows the
voltage across the vertical leg switches.
Fig 11 shows the simulink model of 3-phase NPP inverter topology. Fig 13 and 14 shows the line-to-line voltage and current
wave-forms of the 3-phase topology. Fig 15 shows the FFT window of the line-to-line voltage. The THD of the Vab is
17.45%.Fig 16 shows the FFT window of the line current which has a THD of 5.01% which is comparatively low value.
5. ADVANTAGES OF NPP TOPOLOGY
1. The switching voltage of the vertical switches is th of the input DC voltage.
2. The NPP topology can be operated at high switching frequency compared to NPC inverter for the same load current
(almost double).
3. The inverter output wave-form is improved .this leads to the reduction of filter size [3].
4. The total losses in the NPP and NPC are the same. Even though the switching losses are less in the NPP inverter, but we
are using two additional switches in the circuit.
6. CONCLUSION
The NPP inverter topology is analyzed by using MATLAB/simulink software. From the simulation results, it has been
shown that the switching voltage of the NPP inverter is half of the NPC inverter. so, this topology can be used in high speed drive
applications and renewable energy applications. The choice of increasing switching voltage leads to the smaller size of sinus filter
at the output of inverter or even suppresses it.
REFERENCES
1. J. Holtz, Selbstgefuhrte Wechselrichter mit treppenformiger Ausgangsspannung fur grose Leistung und hohe Frequenz,
Siemens Forschungs- und Entwicklungsberichte, vol. 6 no. 3, pp. 164171, 1977.
2. Recent Advances and Industrial Applications of Multilevel Converters. Samir Kouro, Member, IEEE, Mariusz
Malinowski, Senior Member, IEEE, K. Gopakumar, Senior Member, IEEE,Josep Pou, Member, IEEE, Leopoldo G.
Franquelo, Fellow, IEEE, BinWu, Fellow, IEEE,Jose Rodriguez, Senior Member, IEEE, Marcelo A. Prez, Member,
IEEE, and Jose I. Leon, Member, IEEE.

37

Indian Journal of Electrical and Computer Engineering


Volume 1, Number 1, January-June 2013, pp.31-38
@ Academic Research Journals, (India)
3.
4.

A Converter Topology for High Speed Motor Drive Applications. Guennegues, B. Gollentz, F. Meibody-Tabar, S. Ral,
L. Leclere1.
Real-time digital simulation of power electronics systems with Neutral Point Piloted multilevel inverter using FPGA by
Mamianja Rakotozafya,c, Philippe Poureb,_, Shahrokh Saadatea, Cdric Bordasc, Loc Leclerec, 2010, November
Science Direct.

38

Das könnte Ihnen auch gefallen