Beruflich Dokumente
Kultur Dokumente
(Preliminary)
Agenda
MIMO Overview
MIMO Transmitter Case Study
MIMO Receiver Case Study
Early R&D LTE Hardware Testing
The Radio
Channel
Receive
Antennas
The Radio
Channel
Transmit
Antennas
Receive
Antennas
SIMO
SISO
Single Input Single Output
MISO
MIMO
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Transmit/receive diversity
This is the same as what already exists for UMTS
Transmit diversity has been specified for W-CDMA since R99. Receive
diversity was introduced in Rel-6 for HSDPA.
Stream 1
eNB
UE
Stream 1
The same data is sent on two antennas which provides better SNR
Improves performance in low SNR conditions and with fading
Simple combining is used in the receiver
eNB 1
UE 1
UE 1
= data stream 2
UE 2
eNB 1
Agenda
MIMO Overview
MIMO Transmitter Case Study
MIMO Receiver Case Study
Early R&D LTE Hardware Testing
Coding
Algorithms
A/D
Rx
Tx
Gain
Linearity
Output Power
Decoding
Algorithms
Bits Out
Gain
NF
Phase Noise
Considerations:
Key Algorithms
Baseband Implementation/ Fixed-Point Effects
RF Design Impairments/Non-Linearities
Phase Noise, ADC Jitter
Channel Impairments
Math Algorithms
FPGA HDL Code
Baseband
Fixed-Point
RF Transmitter/
PA Nonlinarities
RF Channel
D/A
Bits In
Coding
Algorithms
A/D
Tx
Rx
Decoding
Algorithms
Bits Out
Baseband Libraries
Algorithm Test Vectors for FPGA Development
Coding/
Decoding
Algorithms
(Preliminary)
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15
Configurable References
(Preliminary)
Copyright Agilent Technologies 2009
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16
SystemVue
Scrambler
Output
Diff
(Preliminary)
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17
SystemVue
Scrambler
Output
Diff
(Preliminary)
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18
Transmitter Design
Start with SystemVue Pre-Configured Template
4X
UpSample
I(t)*CosWc(t)
I in
FIR RRC
Fs/4 Carrier
Multiplexing
I(t)*CosWc(t)Q(t)*SinWc(t)
FIR RRC
Q in
4X
UpSample
Q(t)*SinWc(t)
10
EVM = 0.5 %
(Preliminary)
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21
EVM = 1.3 %
(Preliminary)
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22
11
EVM = 2.9 %
EVM = 46 % !
(Preliminary)
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23
12
RF Transmitter/
PA Nonlinarities
Specify 1dB
Comp. Pt.
RS EVM = 1.3 %
QPSK
RS EVM = 1.3 %
64 QAM
(Preliminary)
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26
13
RS EVM = 3.5 %
QPSK
RS EVM = 3.5 %
64 QAM
(Preliminary)
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27
RS EVM = 11.2 %
QPSK
RS EVM = 11.2 % ,
but composite EVM is 85%
64 QAM
(Preliminary)
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MIMO
Channel
MIMO Receiver
Sweep SNR
Mixed-Signal
Receiver
ADI A/D
Converter
6% Jitter
4% Jitter
2% Jitter
(Preliminary)
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30
15
QPSK
4% Jitter
6% Jitter
4% Jitter
2% Jitter
16 QAM
2% Jitter
64 QAM
(Preliminary)
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31
-65 dBc/Hz
-70 dBc/Hz
QPSK
16 QAM
64 QAM
(Preliminary)
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Agenda
MIMO Overview
MIMO Transmitter Case Study
MIMO Receiver Case Study
Early R&D LTE Hardware Testing
IF
RF
A/D
Converter
COTS
Waveform
Baseband
De-Coding
RF/RF BER
SystemVue
+ VSA SW
MXG, ESG
Step 1
Download
Signal
Step 2
Capture
Signal
MXA, PSA
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IF
RF
I
Demodulator
COTS
Waveform
A/D
Converter
Baseband
De-Coding
RF/IF BER
SystemVue
+ VSA SW
Step 2
Capture
Signal
Step 1
Download
Signal
MXG, ESG
MXA, PSA
IF
RF
I
Demodulator
COTS
Waveform
A/D
Converter
Baseband
De-Coding
MXG, ESG
Step 1
Download
Signal
Step 2
Capture
Signal
MXA with BB IQ
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IF
RF
I
Demodulator
COTS
Waveform
A/D
Converter
Baseband
De-Coding
Simulated COTS
Baseband Receiver
RF/Digital IQ BER
RF/Digital IF BER
SystemVue
+ VSA SW
MXG, ESG
Step 1
Download
Signal
Step 2
Capture
Signal
Logic Analyzers
N6705A
DC Power
Analyzer
MXG
(Download
Signal from
SystemVue)
16822A
Logic
Analyzer
with Agilent
SystemVue*
ESG
(DUT Clock)
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Trigger In
SystemVue
MXG
Analog
In
30.72 MHz
ESG
Clk
In
14-Bit A/D
Converter
Board (DUT)
+ 3.3V
Dig.
Out
16822 Logic
Analyzer with
SystemVue
installed
+ 5V
LAN Cable
(Preliminary)
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40
20
Power Supply/
Analyzer
MXG
14-Bit
A/D Converter
DUT
Sweep from:
QPSK
to 16 QAM
to 64QAM
Sweep
DC Bias
with Power
Supply/
Analyzer
Sweep
RF Power
on MXG
BER
Logic Analyzer
with SystemVue
Installed
(Preliminary)
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41
(Preliminary)
Copyright Agilent Technologies 2009
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42
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Summary
Trade-off baseband and RF design impairments for system-level design
requirements
Evaluate fixed-point design impairments on system-level metrics such
as EVM and BER; Generate HDL from fixed-point design to target FPGAs
Generate LTE reference vectors to validate hand-written HDL code for
FPGA implementations
Perform system-level design trade-offs to minimize over-designing to
meet specs (e.g. fixed point vs. LO phase noise vs. RF nonlinearities vs.
ADC jitter)
Combine simulation with test equipment to perform coded BER on
RF/mixed-signal hardware, using simulation to provide baseband
coding/decoding functionality
Thank You!
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