MOSFET Part 1

Basic Structure of Metal-OxideSemiconductor (MOS) Capacitor

MOS Capacitor Under Bias:

Electric Field and Charge (p-substrate)
Parallel plate capacitor

Negative gate bias: Holes attracted to gate

Positive gate bias: Electrons attracted to gate

MOS Capacitor Under Bias:

Electric Field and Charge (n-substrate)

Schematic of n-Channel
Enhancement Mode MOSFET

Basic Transistor Operation

Cut-off
Before electron
inversion layer is
formed

After electron
inversion layer is
formed

Basic Transistor Operation

Current Versus Voltage Characteristics:

Enhancement-Mode nMOSFET

Family of iD Versus vDS Curves:

Enhancement-Mode nMOSFET
Triode region
or

Voltage between
drain and source
Threshold voltage for
an n-ch MOSFET
Voltage between
gate and source
Conduction parameter for an n-ch MOSFET

p-Channel Enhancement-Mode
MOSFET

Symbols for n-Channel

Enhancement-Mode MOSFET

Symbols for p-Channel

Enhancement-Mode MOSFET

n-Channel Depletion-Mode MOSFET

Symbols

OFF state

ON state

Family of iD Versus vDS Curves:

Depletion-Mode nMOSFET

The MOSFET conducts at zero gate voltage. Therefore, a

negative gate voltage is required to turn off the depletion MOSFET.

p-Channel DepletionMode MOSFET

Symbols

Summary of I-V Relationships

Region

NMOS (or n-channel)

Nonsaturation vDS<vDS(sat)

PMOS (or p-channel)

vSD<vSD(sat)

2
2
]
iD Kn[2(vGS VTN)vDS vDS
] iD Kp[2(vSG VTP)vSD vSD

Saturation

vDS>vDS(sat)

i D K n [vGS VTN ]2

vSD>vSD(sat)

iD K p [vSG VTP ]2

Transition Pt.

vDS(sat) = vGS - VTN

vSD(sat) = vSG + VTN

Enhancement
Mode

VTN > 0V

VTP < 0V

Depletion
Mode

VTN < 0V

VTP > 0V

Conduction Parameters
Mobility

N-MOSFET

P-MOSFET

MOSFET width

W nCox
' W
kn
Kn
L
L
Kp

W p Cox
L

Channel length

W
k
L
'
p

Gate Oxide capacitance (per unit area)

where:
C t
ox

Permittivity of oxide material

ox

Thickness of oxide layer

nCox=Process conduction parameter (n-ch MOSFET)

pCox=Process conduction parameter (p-ch MOSFET)

NMOS Common-Source Circuit

DC equivalent circuits (with/ without

component values)

PMOS Common-Source Circuit

DC equivalent circuit

Load Line and Modes of Operation:

NMOS Common-Source Circuit

NMOS Common-Source Circuit

DC Load Line
Q-point near the middle
of the saturation region
for maximum symmetrical
output voltage swing,.

Small AC input signal for

output response to be
linear.

Transfer Characteristics
VGS vs ID

NMOS Transistor Small-Signal

Parameters
Values depend on Q-point

gm

iD
vGS

id

v gs

g m 2 K n (VGSQ VTN ) 2 K n I DQ
ro ( viDSD ) 1
ro [K n (VGSQ VTN ) 2 ]1 [I DQ ]1

Simple NMOS Small-Signal

Equivalent Circuit

Phasor components

NMOS Common-Source Circuit

AC equivalent circuit

Small-signal equivalent circuit

Av Vo Vi g m (ro RD )

Common-Source Configuration
DC analysis:
Coupling capacitor is assumed
to be open.

Output

Input

AC analysis:
Coupling capacitor is assumed
to be a short. DC voltage
supply is set to zero volts.

Source is common between input and output sides

Small-Signal Equivalent Circuit

Ri
Av Vo Vi g m (ro RD )(
)
Ri RSi

Common-Source Amplifier with

Source Resistor
Small-Signal Equivalent Circuit

Stabilizes Q point against variations in transistor parameters

(eg. Kn or Kp, ), but reduces small signal voltage gain

Small-Signal Equivalent Circuit

for Common-Source with Source Resistor
W nCox
' W
kn
Kn
L
L
Kp

W p Cox
L

W
k
L
'
p

Small signal transconductance:

Note: Vsg and p are considered for PMOS, and Vgs and n for NMOS
transistor based circuits.

Common-Source Amplifier with

Bypass Capacitor

Small-signal equivalent circuit

A current source in place of a resistor provides a better stability of Q-point against

transistors process/fabrication variation.
Minimizes the loss of small signal voltage gain, which is caused due to Rs, while
stabilizing Q-point due to transistor process/fabrication variation.

Problem-Solving Technique:
NMOSFET DC Analysis
1. Assume the transistor is in saturation.
a. VGS > VTN, ID > 0, & VDS VDS(sat)
2. Analyze circuit using saturation I-V relations.
3. Evaluate resulting bias condition of transistor.
a. If VGS < VTN, transistor is likely in cutoff
b. If VDS < VDS(sat), transistor is likely in
nonsaturation region
4. If initial assumption is proven incorrect, make
new assumption and repeat Steps 2 and 3.

Problem-Solving Technique:
MOSFET AC Analysis
1. Analyze circuit with only the dc sources to
find quiescent solution. Transistor must be
biased in saturation region for linear
amplifier.
2. Replace elements with small-signal model.
3. Analyze small-signal equivalent circuit,
setting dc sources to zero, to produce the
circuit to the time-varying input signals only.

MOSFET Part 2

Three Basic MOSFET Amplifiers

Configuration

Common
Source
Common
drain/ Source
Follower
Common
Gate

Voltage
Gain
Av > 1

Av 1

Av > 1

Current
Gain
__

__

Ai 1

Input
Output
Resistance Resistance
RTH

RTH

Low

Moderate
to high
Low
Moderate
to high

NMOS Source-Follower
or Common Drain Amplifier

Small-Signal Equivalent Circuit

for Source Follower

RS ro

Ri
Av
(
)
1
RS ro Ri RSi
gm

Determining Output Impedance

NMOS Source Follower

1
RO
RS ro
gm

Common-Gate Circuit

Small-Signal Equivalent Circuit

for Common Gate

Av

g m ( RD RL )
1 g m RSi

IO
g m RSi
RD
)(
)
Ai
(
Ii
RD RL 1 g m RSi

2-Stage Cascade Amplifier

Common-source
(provides voltage gain)
Source follower
(for increased output current drive ability)

Normally ON and normally OFF

Depletion mode MOSFET

Enhancement mode MOSFET

Cross Section of n-Channel Junction

Field Effect Transistor (JFET)

JFETS are majority carrier electronic devices.

JFET Operation: Gate voltage is

changing

Zero gate voltage

Small and negative

gate voltage

Adequate negative
gate voltage
(pinch off)

JFET Operation: Drain voltage is

changing

JFET symbol

N-channel JFET

P-channel JFET

JFET characteristics

JFET characteristics
N-channel JFET

P-channel JFET

Pinch-off voltage

JFET characteristics

N-Channel MESFET
(Metal Semiconductor Field Effect
Transistor)

Schottky barrier junction

Space charge region of of n-Channel

MESFET

Cross-Section of nMOSFET and pMOSFET

Both transistors are used in the fabrication of CMOS circuitry.

Enhancement Load Device

Kn = 1mA/V2
VTN = 1V

A MOSFET is acting as a diode (or a non-linear resistor)

Circuit with Enhancement Load

Device and NMOS Driver

ML is always in
saturation.

MD can be biased
either in saturation or
nonsaturation region.

Voltage Transfer Characteristics:

NMOS Inverter with Enhancement Load Device

vI < VTN

vI > VTN

NMOS Inverter with Depletion Load

CMOS Inverter

2-Input NMOS NOR Logic Gate

V1 (V)

V2 (V) VO (V)

High

Low

Low

Low

MOS Small-Signal Amplifier

Current Mirrors