Beruflich Dokumente
Kultur Dokumente
PSS-Range
PSS WIN-PRO
Programming Shortform
Item No. 20 376-07
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EB
EW
PB
2)
Indirect
Set
00.00 - 08.16
Output word (PIO)
32.00 - 95.163)
6)
132.00 - 195.16
Direct
Direct
AW
Read
Read
2)
Write
AcAddrescess sing
Indirect
AB
Type
Set
Type
Write
Overview of Operands: FS
MB
MW
x x1)
MB
x x1)
MW
x x1)
110.00
110.01
111.00
111.01
111.02
111.03
112.00
112.01
AcAddrescess sing
PW
00.00 - 08.16
Periphery word (periphery
32.00 - 95.163) access)
6)
132.00 - 195.16
DB
x x1)
112.02
DB
010 - 255
Data block
x x1)
112.03
0000 - 1023
DL
DR
0000 - 1023
112.04
DW
0000 - 1023
112.05
001 - 255
Function block
KB
0-255
Constant Byte
FB
KC
ASCII
character set
Constant
Character (2 characters)
113.00
KF
-32768 ...
+32767
Constant
Fixed point number
113.01
KH
0000 - FFFF
Constant
Hexadecimal figure
KM
16 bit
KY
1)
2)
3)
4)
5)
x
6)
Read
Direct
Set
AcAddrescess sing
113.02
113.03
113.04
113.05
113.06
113.08
MB
x x4)
MW
114.00, 114.16
x x4)
MB
MW
MB
MW
Indirect
Write
Type
Continued
MB
MW
OB
010 - 073
OB
Indirect
Write
Set
AcAddrescess sing
Direct
Read
Type
OB
OB
200 - 231
PB
001 - 255
Program block
SB
001 - 255
064 - 127
Timer
XW
00000-00071
064 - 127
Counter
ZW
064 - 127
Table of contents
1
Introduction
IL
2.1
2.2
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.5
Bit operations
Timers and counters
Byte/word operations
Load and transfer operations
Convert operations
Compare operations
Arithmetic operations
Logic operations
Shift and rotate operations
Jump operations
Organisational operations
LD
3.1
3.2
3.3
3.3.1
3.4
3.5
Bit operations
Timers and counters
Byte/word operations
Compare operations
Jump operations
Organisational operations
FBD
4.1
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.4
4.5
Bit operations
Timers and counters
Byte/word operations
Load and transfer operations
Convert operations
Compare operations
Arithmetic operations
Logic operations
Shift and rotate operations
Jump operations
Organisational operations
Predefined SBs
60
Blocks
72
6.1
6.2
6.3
6.4
6.5
10
10
12
14
14
14
14
16
20
20
24
24
28
28
30
32
32
34
34
x
x
x
x
38
38
40
44
44
44
46
48
52
54
56
56
72
73
73
74
74
Addressing
7.1
7.2
7.3
7.4
7.5
7.5.1
7.5.2
Absolute addresses
Direct addressing
Indirect addressing
Set addressing
Free addressing
Free addressing in the FS section
Free addressing in the ST section
78
78
79
80
81
81
81
82
Introduction
IL
2.1
Bit operations
IL
Description
Load
[Operand] => [RLO]
Load NOT
[Operand negated] => [RLO]
AND operation
[Operand] AND [RLO] => [RLO]
AND NOT, operand negated
[Operand negated] AND [RLO] => [RLO]
OR operation
[Operand] OR [RLO] => [RLO]
OR NOT, operand negated
[Operand negated] OR [RLO] => [RLO]
Load open parenthesis
[Parenthesis result] => [RLO]
AND open parenthesis
[Result from parentheses] AND [RLO] => [RLO]
OR open parenthesis
[Result from parentheses] OR [RLO] => [RLO]
Close parenthesis
Set
[Operand] = 1, if RLO = 1
LN
U
UN
O
ON
L(
U(
O(
)
S
R
=
=N
10
Reset
[Operand] = 0, if RLO = 1
Store
[RLO] => [Operand]
Store NOT
[RLO negated] => [Operand]
RLO
dep.
N
Permitted operands
A, E, M, T, Z
N
N
N
N
N
N
None
None
None
N
Y
None
A, M
A, M, T, Z
A, M
11
2.2
IL
Description
SE
Permitted operands
RLO
dep.
Y
KF 100
E 0.12
SE
064.2
ZR
12
13
2.3
Byte/word operations
Description
Load
[Operand] => [Accumulator]
Store
[Accumulator] => [Operand]
RLO
dep.
N
N
Permitted operands
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH, KM,
KY, MB/MW, XW, ZW
AB/AW, EB/EW, PB/PW, DL, DR, DW, MB/MW, XW, ZW
Description
ST only:
DEF
ST only:
DUF
RLO
dep.
N
Permitted operands
None
RLO
dep.
N
Permitted operands
None
Description
>
!=
<
14
AB/AW, EB/EW, DL, DR, DW, KB, KC, KF, KH, KM, KY, MB/
MW, ZW
N
N
15
Description
Increment accumulator/operands1)
No operand stated:
[Accumulator] + 1 => [Accumulator]
Operand stated:
[Operand] + 1 => [Operand]
KZW
RLO
dep.
N
Permitted operands
AB/AW, DW, MB/MW
None
1)
16
17
IL
Description
Subtraction1)
[Accumulator] - [Operand] => [Accumulator]
RLO
dep.
N
Permitted operands
FS
Permitted
operands
Permitted operands ST
Type
Type
Address range
Address range
1)
18
19
Description
AND
OR
XOR
KEW
RLO
dep.
N
Permitted operands
AB/AW,EB/EW, DL, DR, DW, KH, KM, MB/MW
10010010
01101101
None
10110000
01001111
Description
RL
RLO
dep.
N
Permitted operands
Number of rotation cycles (0 ... 15)
Bits that drop out on the left (Bit 15) are read in
again on the right (Bit 0).
Example:
Accumulator before RL 3:
Accumulator after RL 3:
1)
10010010 10110000
10010101 10000100
20
21
IL
Description
RLO
dep.
Permitted operands
RR
10010010
00010010
10110000
01010110
SRV
10110000
10000111
1)
10110000
01010110
10110000
00001111
00001111
10110000
00001111
10010010
None
22
23
2.4
Jump operations
IL
Description
Unconditional jump
RLO
dep.
N
SPA
SPB
Permitted operands
Label preceded by =, example =xxx
Conditional jump
Permitted operands
2.5
Organisational operations
IL
Description
RLO
dep.
N
CAL
FB, PB, SB
CALC
FB, PB, SB
BE
None
SEG
Segment number
DB
Segment operation
SEG 13
24
25
RLO
dep.
N
Permitted operands
Enable alarms
None
BAS
None
STP
None
IL
Description
FS only:
AS
Disable alarms
None
1)
26
27
LD
3.1
Bit operations
Graphic element
Description
Permitted operands
Op.
N/O contact
[Operand] AND [RLO] => [RLO]
Op.
A, E, M, T, Z
Op.
N/C contact
[Operand negated] AND [RLO] => [RLO]
Op.
Set
[Operand] = 1, if RLO = 1
Op.
A, M
Reset
[Operand] = 0, if RLO = 1
Op.
A, M, T, Z
Op.
Store
[RLO] => [Operand]
Op.
A, M
Op.
Store NOT
[RLO negated] => [Operand]
S
Op.
R
28
29
3.2
Graphic element
Op.
SD
Start
Range
Description
Permitted operands
Start timer
Op.
Start
A, E, M, T, Z
Range
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
Op.
Op.
Op.
CU
Op.
CD
30
31
3.3
Byte/word operations
Description
Permitted operands
IN1
IN2
OUT
Current path
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN2
OUT
IN1
Current path
AB, EB, PB, DL, DR, KB, MB
IN2
OUT
Current path
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN2
OUT
IN1
Current path
AB, EB, PB, DL, DR, KB, MB
IN2
OUT
Current path
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN2
OUT
Current path
IN1
IN2
GT_I
OUT
IN1
IN2
EQ_B
OUT
IN1
IN2
EQ_I
OUT
IN1
IN2
LT_B
OUT
IN1
IN2
LT_I
OUT
IN1
IN2
32
33
3.4
Jump operations
Graphic element
Op.
Description
Permitted operands
Unconditional jump
Op.
Conditional jump
Op.
JMP
Op.
JMPC
3.5
Organisational operations
Graphic element
Op.
Description
Permitted operands
Op.
DB
Op.
FB, PB, SB
Op.
FB, PB, SB
OPEN
Op.
CAL
Op.
CALC
FS only:
ID
34
None
35
Graphic element
Description
FS only:
Enable alarms
None
None
None
IE
OFF
STOP
Permitted operands
36
37
FBD
4.1
Bit operations
Graphic element
Description
Permitted operands
Input
Op.
A, E, M, T, Z
Op.
A, M
Reset
[Operand] = 0, if RLO = 1
Op.
A, M, T, Z
Store
[RLO] => [Operand]
Op.
A, M
&
>1
Op.
S
Op.
R
Op.
ST
Op.
STN
38
Store NOT
[RLO negated] => [Operand]
39
Graphic element
Op.
Description
Permitted operands
SR Flip-Flop
Q (Op.)
A, M, T, Z
A, E, M, T, Z
A, E, M, T, Z
SR
Q
S
R
Op.
RS Flip-Flop
RS
Q
R
S
4.2
Graphic element
Op.
SD
Start
Range
Description
Permitted operands
Start timer
Op.
Start
A, E, M, T, Z
Range
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
40
41
Graphic element
Op.
CU
Op.
CD
42
Description
Permitted operands
Op.
Op.
43
4.3
Byte/word operations
Description
Permitted operands
Store
[Current value] => [Operand]
Op.
ST
B2W
OUT
IN
W2B
IN
OUT
ST only:
Description
Permitted operands
IN
OUT
IN
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN:
Word
OUT: Byte
OUT
IN
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN:
BCD figure
OUT: Binary figure
OUT
IN
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN:
Binary figure
OUT: BCD figure
OUT
IN:
Byte
OUT: Word
BCD2BIN
IN
OUT
ST only:
BIN2BCD
IN
44
OUT
45
OUT
Description
Permitted operands
IN1
IN2
OUT
IN1
A, M
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN2
OUT
IN1
A, M
AB, EB, PB, DL, DR, KB, MB
IN2
OUT
IN1
A, M
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN2
OUT
IN1
A, M
AB, EB, PB, DL, DR, KB, MB
IN2
OUT
IN1
A, M
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN2
OUT
A, M
IN2
GT_I
IN1
OUT
IN2
EQ_B
IN1
OUT
IN2
EQ_I
IN1
OUT
IN2
LT_B
IN1
OUT
IN2
LT_I
IN1
IN2
46
OUT
47
INC
OUT
IN
Op.
DEC_OP
DEC
IN
OUT
NEG
IN
OUT
Description
Permitted operands
Increment operands
[Operand] + 1 => [Operand]
Op.
IN
OUT
Op.
IN
OUT
IN
Example:
IN:
10010010 10110000
OUT: 01101101 01010000
OUT
48
49
Graphic element
ADD_I
IN1
OUT
IN2
Description
Permitted operands
Addition
[IN1] + [IN2] => [OUT]
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN2
OUT
Multiplication
[IN1] * [IN2] => [OUT1], [OUT2]
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
IN2
OUT1,
OUT2
OUT
IN2
Subtraction
[IN1] - [IN2] => [OUT]
MUL_I
IN1
OUT1
IN2
OUT2
DIV_I
50
IN1
OUT1
IN2
OUT2
Division
[IN1] : [IN2] => [OUT1], [OUT2]
51
OUT
Description
Permitted operands
IN1
IN2
OUT
IN1
IN2
OUT
IN1
IN2
OUT
IN1
IN2
OUT
IN1
IN2
OUT
IN1
IN2
AND_W
IN1
OUT
IN2
OR_B
IN1
OUT
IN2
OR_W
IN1
OUT
IN2
XOR_B
IN1
OUT
IN2
XOR_W
IN1
OUT
IN2
NOT
IN
OUT
10010010
01101101
10110000
01001111
IN2
OUT
IN
OUT
52
53
IN
N
ROR
OUT
IN
N
SRL
OUT
IN
FILL
Description
Permitted operands
Rotate left1)
[IN] Rotate N times to the left => [OUT]
IN
0 ... 15
OUT
IN
FILL
A, E, M, T, Z
0... 15
OUT
Example: N = 3, IN is a byte
IN
xxxxxxxx 10110000
OUT xxxxx101 10000xxx
Rotate right1)
[IN] Rotate N times to the right => [OUT]
Bits that drop out on the right (Bit 0) are
read in again on the left (Bit 15). If IN is a
byte, bits will be inserted whose status is
unknown.
Example: N = 3, IN is a byte
IN
xxxxxxxx 10110000
OUT 000xxxxx xxx10110
Shift left1)
[IN] <-- [FILL] shift N times to the left
SRR
IN
FILL
N
OUT
Shift right1)
[FILL] --> [IN] shift N times to the right
1)
IN and OUT must be of the same type, i.e. both bytes or both words.
54
55
4.4
Jump operations
Graphic element
Op.
Description
Permitted operands
Unconditional jump
Op.
JMP
Op.
JMPC
4.5
Conditional jump
A jump to the stated label is only carried
out if the status of the RLO equals 1.
If the status of the RLO is 0, the jump
command is not performed and the RLO
is set to 1.
Organisational operations
Graphic element
Op.
Description
Permitted operands
Op.
DB
Op.
FB, PB, SB
OPEN
Op.
CAL
Op.
CALC
56
57
Graphic element
Description
FS only:
Disable alarms
ID
FS only:
IE
Permitted operands
None
Enable alarms
None
None
None
OFF
STOP
58
59
Predefined SBs
FS only:
SB001
Description
Permitted operands
SSNR,
DBNR,
STRT
CRC calculation
CNT
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW,
ZW
ERG,
CRC
SB001
CRCPOLYN
B
B
B
W
SSNR ERG
DBNR CRC
STRT
CNT
W
W
60
61
SB003
Description
Permitted operands
Addition
Z11, Z12, EW, PW (in ST section only), DW, KF, KH, KM, MW,
Z21, Z22 XW, ZW
SB003
ADD:32
W
W
W
W
Z12
Z11
Z22
Z21
0V
Z3=0
Z32
Z31
OV, Z3=0 A, M
X
X
W
W
Z12:
Z11:
Z22:
Z21:
OV:
62
63
SB007
Description
Permitted operands
Subtraction
Z11, Z12, EW, PW (in ST section only), DW, KF, KH, KM, MW,
Z21, Z22 XW, ZW
SB007
SUB:32
W
W
W
W
Z12
Z11
Z22
Z21
0V
Z3=0
Z32
Z31
OV, Z3=0 A, M
X
X
W
W
Z12:
Z11:
Z22:
Z21:
OV:
64
65
SB011
Description
Permitted operands
Multiplication
Z11, Z12, EW, PW (in ST section only), DW, KF, KH, KM, MW,
Z21, Z22 XW, ZW
SB011
MUL:32
W
W
W
W
Z12
Z11
Z22
Z21
Z3=0
Z34
Z33
Z32
Z31
OV, Z3=0 A, M
X
X
W
W
W
66
67
SB015
Description
Permitted operands
Division
Z11, Z12, EW, PW (in ST section only), DW, KF, KH, KM, MW,
Z21, Z22 XW, ZW
SB015
DIV:32
W
W
W
W
Z12
Z11
Z22
Z21
0V
FEH
Z3=0
Z4=0
Z32
Z31
Z42
Z41
X
X
X
X
W
W
W
W
OV, Z3=0,
Z4=0,
FEH
A, M
Z31, Z32, AW, PW (in ST section only), DW, MW, XW, ZW
Z42, Z41
Z12:
Z11:
Z22:
Z21:
OV:
68
69
SB041
Description
Permitted operands
Comparison
Z11, Z12, AW, EW, PW (in ST section only), DW, KF, KH, KM,
Z21, Z22 MW, XW, ZW
SB041
CMP:32
W
W
W
W
X
Z12
Z11
Z22
Z21
VZ
ERGE
VZ
A, E, M
ERGE
Z12:
Z11:
Z22:
Z21:
VZ:
70
71
Blocks
6.2
6.1
6.3
Parameter types
Organisation blocks for the ST section:
OB001
Cycle OB, is run through in each cycle
OB019
Error OB, S-26 (block missing)
OB020
Start-up OB, when switching from STOP to RUN
OB022
General reset OB, when switching from STOP to
RUN with a general reset
OB023
Error OB, S-05 (configuration error)
OB024
STOP OB, each time the system switches to
STOP
OB025
Error OB, S-21 (addressing error) and S-22
(error accessing data block)
OB027
Error OB, S-23 (error accessing read-only data
block) or S-24 (set addressing error)
OB028
STOP OB, when manually switching to STOP
OB029
Error OB, S-04 (battery error)
72
Type Key
X
Bit
B
Byte
Word
D
Z
Data block
Timer/counter
Actual parameters
Input, output and flag bits:
E, A, M
Input, output and flag bytes,
constants, data word range: EB, AB,
MB, KB, DL, DR
Input, output and flag words,
constants, data words: EW, AW,
MW, KF, KH, KM, KC, KY, DW
Data blocks: DB
Timers or counters: T, Z
73
6.4
6.5
76
Please note:
All blocks are able to access data blocks. Read only data
blocks can only be read; it is possible to read and write to
Read/write data blocks.
Each DB may be 1024 words in length (DW0000 ... DW1023).
The two bytes within a data word can also be addressed
separately:
- DR0000 ... 1023 for the right data byte (bit 0 ... 7)
- DL0000 ... 1023 for the left data byte (bit 8 ... 15)
Data word formats:
- H: Hexadecimal display (range: 0000 ... FFFF)
- M: Bit state (16 Bit)
- F: 16 bit fixed point number (range: -32768 ... 32767)
- Y: 2 byte constant (range: 0 ... 255 per byte)
- C: 2 IBM ASCII characters
DB000 ... 255 in both the FS and ST section, of which the
following DBs are reserved for system data blocks.
System data blocks for the FS section:
- DB000: Reserved for ST section
- DB001: Result from operating system calls (read-only)
- DB002: Configuration data block (read-only)
- DB003: Call-up parameters from operating system calls
- DB004 ... DB009: Reserved
System data blocks for the ST section:
- DB000: General data (read-only)
- DB001 ... DB003: Reserved for communication with the FS
section
- DB004: General data
- DB005: Start addresses for addressable modules
- DB006: Configuration of user interface
- DB007: Send buffer for user interface
- DB008: Receive buffer for user interface
- DB009: Remanent data block, contents retained after a
general reset
Before accessing a data word, you will need to select the data
block, using the Select data block operation.
Within a block, a selected data block remains valid until a new
data block is selected.
The ST section has read-only access to data blocks in the FS
section via SB254, function 36.
77
Addressing
7.2
7.1
Absolute addresses
Direct addressing
The table on the front cover flap shows all the operands for the FS
section, with their address ranges; the table on the back cover
flap shows those of the ST section.
With inputs, outputs and periphery access please note the
following:
The addresses that can be addressed will vary from PSS to
PSS, and on modular PSS systems will depend on the
hardware configuration; details are given in the operating
manuals for the programmable safety system.
It will not be possible to access a word with the address x.24 if x
is the number of the last slot on the programmable safety
system.
On compact programmable safety systems, not all of a slots
inputs/outputs are always available on the screw terminals. An
error occurs when such an output is set. If you wish to address
an output byte/word containing such an output, you will need to
mask the output byte/word in such a way that 0 is written to
this output.
Inputs that are not available are read with 0.
78
79
7.3
Indirect addressing
Address indicator
Bit 15 ... 8
Bit 7 0
Slot number
Bit number 0 ... 31
Slot number
Bit number 0 ... 31
Flag number
Bit number 0 ... 31
Any
Counter number
Time base
Timer number
Data word number
Data block number
Number of the word in the XW process image
7.4
Set addressing
7.5
Free addressing
Modules that can process more than 32 Bits are called word
modules. The words are addressed using free addressing.
INFORMATION
Access to word modules is not permitted in the startup OB.
Address
indirect
E(114.16)
AB(114.16)
MW(114.16)
Z(114.16)
ZW(114.16)
T(114.16)
DL100
DB199
XW040
DL(114.16)
DB(114.16)
XW(114.16)
80
Contents of
MB114.24
MB114.16
1
6
2
8
64
0
Any
88
Any
88
1
67
Contents of MW114.16
100
199
40
Operand
XW0 ... XW7
XW8 ... XW15
XW16 ... XW23
XW24 ... XW31
XW32 ... XW39
XW40 ... XW47
XW48 ... XW55
XW56 ... XW63
XW64 ... XW71
81
Example:
There is a word module on slot 3. The 3rd and 4th words are to be
addressed.
Address requirements:
The start address is the address through which the first input or
output on a module is addressed. The second input or output
contains the address = start address + 1 etc.
The start address must be an integer multiple of the number of
addresses that the module requires.
Examples:
- Module with 8 inputs (8 addresses)
Permitted start addresses: 0, 8, 16, 24, 32, .... (decimal)
- Module with 8 inputs and 8 outputs (16 addresses)
Permitted start addresses: 0, 16, 32, 48, ... (decimal)
Permitted address range: 0 ... 16383 (decimal)
The modules address ranges are not permitted to overlap.
Example:
Slot 7 contains a word module with 8 inputs.
The start address must be entered in DB005 in DW0007. The
start address must be divisible by 8, for example, 4096 is possible
(decimal). The input addresses are:
XW4096
1st input
XW4097
2nd input
...
...
82
83
84
Type
Write
Read
Direct
Set
Indirect
AcAddrescess sing
EB
EW
AB
AW
PB
PW
DB
DB
010 - 255
Data block
DL
0000 - 1023
DR
0000 - 1023
DW
0000 - 1023
FB
001 - 255
Function block
KB
0-255
Constant Byte
KC
ASCII
character set
Constant
Character (2 characters)
KF
-32768...+32767 Constant
Fixed point number
KH
0000 - FFFF
Constant
Hexadecimal figure
KM
16 Bit
KY
85
Overview of Operands: ST
113.00
113.01
113.02
113.03
x x1)
MB
x x1)
113.04
MW
x x1)
113.05
110.00
110.01
111.00
113.06
111.01
111.02
M
M
111.03
113.08
112.00
112.01
112.02
MB
x x4)
112.03
MW
114.00, 114.16
x x4)
112.04
MB
112.05
MW
1)
2)
3)
4)
5)
6)
86
Write
Indirect
MW
Set
Direct
MW
Read
AcAddrescess sing
Indirect
MB
Set
Type
Direct
MB
AcAddrescess sing
Read
Write
Type
Continued
87
Read
Direct
Set
AcAddrescess sing
MB
MW
MB
MW
OB
PB
001 - 255
Program block
SB
001 - 255
000 - 063
Timer
x x
064 - 127
Timer (FS)
x x
XW
00000-16383
x x
000 - 063
Counter
x x
064 - 127
Counter (FS)
x x
ZW
000 - 063
x x
ZW
064 - 127
x x
88
Indirect
Write
Type
x
x