IEEE TRANSACTIONS ON ELECTRONIC COMPUTERS

VOL. EC-14, NO. 6

DECEMBER, 1963

Computation of the Base Two Logarithm

of Binary Numbers
M. COMBET, H. VAN ZONNEVELD, AND L. VERBEEK, MEMBER, IEEE
Abstract-An approximation to the computation of the base two
logarithm of a binary number, realized with binary circuitry, is
described. It is known that the logarithm can be obtained approximately from the binary number itself by simple counting and shifting.
A method for the reduction of the resulting approximation error by a
factor six is given. The same principle can be used for further reduction of the error.
The realization involving not only counting and shifting but also

binary decision making and addition is described. Technical data

about the performance of the constructed computer are given.

INTRODUCTION
NT REFERENCE [1] is given a simple method for
an approximated computation of the logarithm to
the base two of a number given in binary form, and,
n '
using this method, a straightforward computation of an
approximation of the product or the quotient of two
such numbers. Here we give an improvement of the
method of Mitchell [1 ] for the computation of the base
two logarithm, decreasing the range of the error of the
approximation by a factor six at the cost of more hardware and more computation time for the implementation. The same principle can be used for a further decrease of the error, of course at a higher cost. The
method here described has been put to use in a nuclear
reactor period-meter as explained in another publication. (See Eder, Combet, and Van Zonneveld [3].) In
Furet, Jacquemin, and Kaiser [2] it is also indicated
that the method of Mitchell [1 ] is applied for this purpose. The logarithmic method here described might also
be used for the generation of products or quotients of
numbers. But then the error analysis of the logarithm
should be complemented with an error analysis of the
product or quotient (see [1]).
The considerations underlying the design of the computer are given in Section I, the design is described in
Section II, and additional technical information on
speed~
an
speed
and siz
size of th
the coptri.ie
computer iS given innScin1
Section III.

consists of substituting the base two logarithmic curve

by straight lines connecting the points of thecurve
where L(N) has an integral value. (See Fig. 1.)
Th
is approximation iS rendered more explicit if one
considers Table I, where a list is given of some integers
and their approximated base two logarithms in decimal
and in binary expansion. Comparing N and LA1(N),
both in binary expansion, one sees that

1) the characteristic of LAi(N) is equal to the number of bits between the leftmost 1-bit and the
binary point of N, thus 3 for the numbers 3
15 and 4 for the number 16;
~~~~~~~~~~~~~~through
the
2)
approximated mantisse of LA,(N) is formed
~by the bits following the leftmost 1-bit of N.

For the number N= 10110110, the approximated logarithm is thus LA1(N) =111.011011.
Consider now the situation more abstractly. Suppose
N> 1 is a number given in binary expansion. It is easy
to encode N such that it has the form
N

2k(1 + X)

(1)

L(N)
LA1(N)

21

0 _
1

Fig.

1.

*
2

--5
6

Logarithmic curve L(N) and the approximation LA (N).

TABLE I
APPROXIMATED COMPUTATION OF THE BASE Two
LOGARITHM OF A BINARY NUMBER
Decimal
In the sequel the logarithm to the base two of a numN
N
LA1(NV)
ber N is denoted by L(N) and an approximation to L(N)8300100100
15 denoted by LA(N), with an index if it isconvenient to
9
3.125
1001
distinguish between different approximations.
10
3.250
1010
The approximation LA1(N) to L(N) described in [1]
11
3.350
1010
I.

M anuscript received June 14, 1965.

The authors are with Euratom, Joint Research Center, Ispra,

Italy.

863

13
14
15
16

3.625
2.750
3 .875

4.000

1 101
1110
1111

10000

Binary

LA1(N)

11t001

11.010
11.01

1 1.101
11.110
11 .111

100.000

864

IEEE TRANSACTIONS ON ELECTRONIC COMPUTERS

where k is a non-negative integer and x is a binary fraction, 0<x <1. The value of k is clearly just the number
of bits between the leftmost 1-bit and the binary point
of N, while x consists of all bits of N except its leftmost
1-bit and, since x < 1, the binary point taking the place
of this 1-bit. Thus, for N=10110.101, one finds k=4
and x=0.0110101 so that N=24(1+0.0110101).
For a number N> 1 written as in (1), one has clearly
L(N) = k + L(1 + x).
(2)
The integer k is called the characteristic and the fraction
L(1 +x), which is smaller than 1, is called the mantisse
of L(N). In Mitchell [1 ] the following approximation is
utilized:
LA1(N) = k + x.
Starting with a number N given in binary expansion,
LA1(N) is obtained by simple shifting and counting
operations resulting in k and x in binary expansion. This
operation is easily realized with a small amount of
binary circuitry. (See Mitchell [1] or Section II-A of
this paper.) The error resulting from this method is
Ri(x) = L(N) - LA1(N) = L(1 + x) - x.
(3)
Clearly Ri(x) is independent of k and depends only on
X. In Fig. 2 the value of Ri(x) is given for O<x<1, as
well as the values of L(+x) and x, that is, of L(N) -k
and LA l(N) - k, respectively.
Note that the error Ri(x) given by (3) is everywhere
non-negative. The maximal error Rimax = 0.086 occurs
for x=0.44; the minimal error is zero and occurs for
X0.

Using binary circuitry, one can realize a reduction of

the error Ri(x) so as to have an approximation to the
curve L(1 +x) of Fig. 2 which is better than the straight
line approximation given in [1]. The method consists
in a piece-wise linear approximation as indicated
roughly by the broken line LA2(1+x) in Fig. 3, where
the curvature of L(1 x) is exaggerated so as to make
the situation more clear. Note that the curves of Fig. 3
are not true to scale in the vertical direction.
For a simple implementation of this method by means
of binary circuitry, it is clearly convenient to divide the
range of x in 2erange
intervals, each of length 2-q where q
is a positive integer. For a sizable reduction in the error
Ri(x) four segments are sufficient, thus q=2. In order
to find a suitable approximation LA2(1 +x) for each of
the four intervals, one can use a trial and error method
subject to the following considerations. The general
form in each interval isLA2(1+x) =x-+-af(x)+b. If for
an interval the slope of L(1l+x) is greater than 1, thenone takes f(x)-=x. If this slope is less than 1, then one
should take f(x)-=1 - x; but for simple implementation
with binary circuitry, one takes 1(x) = x, where x is the
bit-by-bit binary complement of x. For the constants a
and b one takes fractions with integer numerator and a
power of two as denominator, this also for easy realization with binary circuitry. The values of a and b are

DECEMBER

1
.8
6

/+X)

t4
2

R/
o

R1(X)
.2

.4

.6

-x

Fig. 2. Error curve Ri(x) and the curves L(1 +x) and x.

LO +x)
LAP +x)

.25

.5

.75

Fig. 3. Exaggerated curve representing L( 1x) and the

approximation by four straight lines.
then found by trial and error making the deviations of
LA2(1+x) from L(1 +x) small.
sing thi methodaon cA f he following expressions for the approximaton LA2(1+x) in each interval:

51
LA2(1 + x)

x+-x
16

+5X) = X +
+
~~~~~~~~~~~~~~LA2(1
64
=

1
3
LA2(1 + x) = x + - x + 8
128
1

LA2(1 X x) =x + -x

for 0 < x <4

for - < x <4

2
1
3
for- < x <2
4
3
for-<K x K 1.

The computation of LA2(N) involves not only counting and shifting operations to find the characteristic k
and the approximated mantisse but also binary decision
for the determination of the type of correction and addition of binary numbers. This complicates the circuitry,
of course, and also the total time for the computation
increases.

865

COMBET ET AL.: BASE TWO LOG OF BINARY NUMBERS

1965

1R2xlo-3

results in a total deviation Rt(x) =L(N) -LA,(N). The

maximal total error is
ARtMAX.
21Z48
R! P08-0.013 occurring for x = 0.625 and x =0.687 and
12 -~~~~~~~~ ~~~~~~~~~ ~~ ~ ~ ~ ~ ~~~~~~~~~~~~~~~~',~-~
Rt neg -0.006 occurring for x=0.250.

These points are also indicated in Fig. 4. The error

range of the realized computer is thus 0.019.

10

6(

< /DESCRIPTION
OF THE COMPUTER
II.
t

4t

11

-2

.5.6.7.8.9
\
.

.6

-4

-61 - - -- - ------

In Sections II-A to II-D the operation of the computer

/ 1/isIdescribed piece-wise. Figure 5 gives a block diagram and Fig. 6 indicates the internal program of the

*9 1
\jl ;// computer.

Rt MIN.

and Rz(x).
Rt(x).
Error curves
curves R2(x)
R2(x) and
4. Error
Fig.Fig.4.

A. Basic Circuit
The basic circuit for the computation of the approximated base two logarithm, as given in Mitchell [1], consists of a shift register R and a counter C. (See Fig. 7.)
is
number
thishas
RegistertoRthecontains
shifted
left untilthethenumber
leftmostN;1-bit
quit the

register.
The resulting error R2(x)=L(1+x) -LA2(1x) is
given in Fig. 4. The maximal positive error R2 po
= 0.008 occurs for x=0.44 and the maximal negative
error R2 neg =-0.006 occurs for x=0.25.
The jumps in the error curve R2(x) of Fig. 4 occur at
the change-over from interval to interval, thus for the
values x=0, 1/4, 1/2, and 3/4. Note that the error
R2(X), as well as the forementioned Ri(x), is a number
(not a percentage) giving the deviation from the correct
value L(N) resulting from the described approximation.
Since with this approximation LA2(N) to L(N) positive as well as negative errors can occur, one should use
the error range 0.008+0.006=0.014 to compare it with
the approximation LA,(N), where only a positive error
occurs and the error range equals 0.086. Thus, the
improvement obtained is about a factor 6 in error range.
Clearly one could improve the approximation further
by taking more than four segments. By taking eight
segments instead of four, the error range will be roughly
halved. The realization would require somewhat more
hardware because the decision to find the type of correction and the corrections itself would be more involved.
Also the total computation time would increase.
Until now only the error due to the principle of the
approximation has been considered. In addition to this,
there is, however, in the realization of the computer a
round-off error due to the use of registers of finite length
in which binary numbers are stored.
In the realization described in Section II, the length
of these registers has been chosen to be 7 bits. Hence, in
the realized computer the value obtained as mantisse
may be smaller, by at most - 2 -7=0.0078, than the
value obtained by the previously mentioned considerations.
A digital computer simulation of the actual computation LAt~(N) comprising the proposed corrections and
the round-off errors for 128 values of x between 0 and 1

Assume the bit positions in R are numbered from 1

through m, reading from right to left. Let k be the initial
position in R of the leftmost 1-bit of N; then the number
N has been shifted m - k steps. The counter C has to
count the number of steps. Initially, the number m is
written in C and at each shifting step this is reduced
by 1. At the end of the operation, the number contained
in C is thus m - (m - k) = k, that is, just the characteristic of L(N), whereas the number in register R is x,
the approximation to the mantisse.
B. Circuit with Corrections
To the number x in register R obtained by the procedure described in Section 1I-A, the following corrections, depending on the value of x, are added:

5
16 x

< x <4f

5
64

1
8
4

128
x

1
2 -

1
2
3
4

3
if -.<x< 1.

Since it gives sufficient precision in the sequel, only

the first seven bits of the mantisse x are used. First the
leftmost seven bits contained in R are copied in an
auxiliary register RA. (See Fig. 8.) Then, to the number
contained in R is added the number contained in RA
(or its complement) shifted to the right over p steps;
thus, one adds to x the number (1/2P)X or (1/2P)X.
Note that the coefficients of the corrections are chosen
such that this addition is simple. For instance, (5/16)x

DECEMBER

IEEE TRANSACTIONS ON ELECTRONIC COMPUTERS

866

CONTr C

SHIFT

Fig. 5. Block diagram of the computer.

SHIFT

1 r

GENERAL
RESET

START

Fig. 7. Basic circuit for the computation.

WRITE

SHIFT

Rl

REG. R

AU.REG.
ONE

IR

Fig. 8. Organization of the correction.

BIT

IN R
ZERO

can be decomposed in (1/4)x+(1/16)x and it suffices to

have two successive additions, the first with a shift of
two steps and the second with a shift of four steps. For
the two correction terms (1/8)x and (1/4)x the complement x of x is used. All these additions are done in
sequential mode: first the leftmost bit contained in RA
(or its complement) is added at the appropriate location of R; then the numbers in R and RA are both
shifted one step to the left. In order to prevent the loss
of the lefthand bit in R, this register is extended to the
left by another register R1 with seven locations. The

SHIFT

SHIFT

WRITE
CORR.REG.

AUX.REG. &

CORREC'TIONS

operation is repeated seven times after which the seven

bits of the corrected mantisse are in register R1. The

AUXILIARY

4X116 '4x'8i |-

<

YES4/1"-I <

JX

16 ' 64 ' 128 |

STOP
*
Fig. 6. Internal program of the computer.

remaining two corrections by the constants 5/64 and

3/128, which are decomposed as 1/16+1/64 and 1/64
+ 1/12 8, are added at the appropriate locations of register R1. (See Fig. 10.)
C. Correction Register
~~~~Itis clear that for the computation of the approxilogarithm of a given number only some of the
~~~~~~~~~corrections described in Section lI-B are applied. Table
II indicates the corrections utilized in the four different
cases. At the beginning of the computation, the value
of x is compared to the numbers 1/4, 1/2, and 3/4 and

~~~~~~~mated

COMBET ET AL.: BASE TWO LOG OF BINARY NUMBERS

1965

TABLE II
x:

1/4

1/4

0
x

the type of correction to be applied is noted in a register

1/2

3/4

1
_

____________-_______-_

1/16 x

1/4 x

1/8 x
1/16
1/64
1/128

x
x

__

fN

16x

1
o0- >
2
1 V
VAX<
1

<X<3

3 AX<

~~

1=

- l

CR, called the correction register. (See Fig. 9.) Before

the computationi starts, the sevein flip-flops of CR are
reset to 0. When the niumiiber N has been shifted and the
uncorrected mantisse x is in register R, the four AND
circuits test the two leftmost bits of x in order to cornpare x with the numbers 1/4, 1/2, and 3/4. One of the
circuits passes on a pulse and brings the corresponding
flip-flops in position 1.
D. Realization of the Corrections
The program examines successively the four correc-

O<X<U

867

tions (1/4)x, (1/16)x, (1/4)>, and (1/8)x, which depend

If the correction has to be executed and the leftmost bit in RA is a 1, a pulse is delivered to the appropriate position of R and adds there a 1. (See Fig. 10.)
After the four corrections have been examined, the numbers contained in R, R1, and RA are shifted one step to
the left. Then the second bit in RA appears at the outputs x and x and the program repeats the same correction sequence. This operation is repeated seven times,
once for each of the bits in RA. The correction with a
constant is an operation like the one above but executed
only once. The numbers 1/16, 1/64, and 1/128 are added
at the appropriate locations in the register Ri, according
to the indication of the correction register.
on x.

~~~~64

III. TECHNICAL DATA CONCERNING THE

123
REALIZATION
The computer has been realized as a basic part of a
digital period-meter for a nuclear reactor. (See Eder,

RE'SFET
Fig. 9. Correction register.

Combet, and Van Zonneveld [3].) This is the reason

why the numbers which form the input for the computer have a length between 7 and 22 bits. Conse-

quently, register R has a length of 22 bits and the maxi-

64
R

1. x

20 emitter-followers, and some auxiliary circuitry are

used.
The frequency of the clock pulse generator is 100 kc/s.
The time for the computation of the approximated
logarithm of a number in register R depends on the
length of the number and the type of correction to be
applied. The computation time is maximal 0.6 ms and
minimal 0.5 ins.

Rl

16x
-x
-

x
I

mal number of steps in shifting the contents of R is 15.

Thus, the length of counter C is 4 bits.
The total number of flip-flops in the computer is 74;
of these, 32 are used in realizing the internal program
and 42 for the computation proper. Furthermore, 103
AND gates, 4 OR gates, 32 pulse shaping amplifiers,

~~~~~~~~~~REFERENCES

[11 J. N. Mitchell, Jr., "Computer multiplication and division using

X X
r
,,,,,,,
l l l l l l l l

AUX.REG.
Fig. 10. Realization of the correction.

logarithms, " IRE Trans. on

~~~~~~~binary
~~~~EC-11, pp. 512-517, August 1962.

Electronic Computers, vol.

~[2] J. Furet, B. Jacquemin, and J. Kaiser, "Les techniques num6riques dans le controle nucleaire des piles atomiques," Onde Elec-

trique, vol. 44, pp. 758-763, July-August 1964.

[3] J. Eder, M. Combet and H. Van Zonneveld, "Digital period-meter
using binary logarithms," to be published.