Operational Amplifiers

Important Parameters
Differential Gain
Small-Signal
Small Signal -3dB/
3dB/ unity gain Bandwidth
Large-Signal Bandwidth
Output Swing
Linearity
Noise and Offset
Supply Rejection
Common mode rejection
Slew
Sl rate,
t
input common mode range
Phase/ gain margin
Phase/

One-Stage Op Amps

ICMR, OCMR
In open loop configuration,----Range of
voltages for which circuit can operate even
if input dc or output dc shifts

ICMR

ICMR in open loop Configuration

DC Voltage Range Available For Designing Opamp in Unity Gain

Configuration In feed back mode

Range of voltages which can be chosen as

input/ output dc to configure opamp in
feedback mode

LARGER THE RANGE

RANGE, EASY TO
DESIGN

DC Voltage Range Available For Designing Opamp in Unity Gain

Configuration

ICMR in Unity Gain Configuration

Feed back stabilizes DC bias to a particular value

Remember, in feedback, circuit shall always come to designed
voltage value even if input dc level shifts
Because change in voltages can cause Vgs of transistors to
change hence changing Ibias which triggers a corrective action

if vin dc inc. , node x dec. ,node X will force node Y to dec.

Causing Vgs of M2 to dec. ,so I2 dec. which makes node Y to rise

because Iss will not allow a change
g
Hence, Feedback circuit can work at a particular voltage at node Y

Cascode Op Amps

Cannot operate
at Vcm=0

Out DC Voltage Range Available For Designing in open

loop Configuration

VDD=3V, VT=0.7V, VOV=0.3V

Vout max.= 3-1-1=1.0V

Vout MIN..= 0.3

0.3+0.3+0.3=
0.3 0.3 0.9v

Unity Gain One Stage Cascode-difficult to bias

OCMR, ICMR(telescopic) in feedback mode OCMR, ICMR(telescopic) in feedback mode--- DC

Voltage Range available in Unity Gain Configuration
of opamp.
p p

In this range, feedback causes dc levels at output /

input to stabilize to its designed value even under
fluctuations

OCMR, (telescopicunity gain )

VDD=3V, VT=0.7V, VOV=0.3V

Vout max.= Vb-(Vgs-Vt)=1.6-0.3=1.3V

Vout max.= 3-1-1=1V (constraint from load)

O l 0.1
Only
0 1 V range

Vout MIN.= Vb-Vt=1.6-0.7=0.9V

Single-Ended Output Cascode Op Amps

(Iss) ---cascode current mirror

Reducing voltage loss

2 Vgs- Vt

Vgs

2 (Vgs- Vt)

Vgs- Vt

MATCHING
PROBLEM
CTR 1

(2) Reducing voltage loss- CONT.

Low voltage cascode

Vgs
2V Vt
2VgsVgs- Vt

Vgs
Vgs- Vt

(3) Ckt. for gen. of 2Vgs-Vt CONT.

Large (w/L)
VT

2Vgs- Vt

VT

2Vgs

2Vgs

Vgs

Vgs

Triple stack/ Double Cascode

Av app. (g
( mro)3/2
Limited Output Swing
C
Complex
l biasing
bi i

Folded Cascode Op Amps

Can operate at Vcm=0

Folded Cascode Stages (cont.)

2v
3v

1.3v
0.7v
1v

Can operate at Vcm=Vdd

Folded Cascode (cont.)

Can operate at Vcm=0

VDD=3V, VT=0.7V, VOV=0.3V

Folded Cascode (cont.)

| Av | gm11 {[(gm 3 gmb3

b3 )ro33 (ro11 || ro55 )]||[(gm 7 gmb
b 7 )ro7
7 ro9
9 ]}

OCMR, ICMR IN FEEDBACK

VDD=3V, VT=0.7V, VOV=0.3V

Swing IN FEEDBACK
VDD=3V, VT=0.7V, VOV=0.3V

Choice of inp. dc voltage levels in (folded cascode unity gain )

VDD=3V, VT=0.7V, VOV=0.3V

VIN max.=Vin < =2.4V+Vt

VIN MIN. 0.7v+Vov

VIN min= 0.6v+Vt

GAIN
SLIGHTLY LESS THAN TELESCOPIC
POWER DISSIPATION HIGHER

Telescopic vs. Folded Cascode Pole

POLE AT FOLDING POINT

POLE FREQUENCY LOWER THAN
TELESCOPIC (possibly)

Example Folded-Cascode Op Amp

See Example 9.6

96

Two-Stage Op Amps

Design Approach for Two-Stage Op Amps

Single-Ended Output Two-Stage Op Amp

Output Impedance Enhancement With

Feedback

Rout A1gm 2 ro2 ro1

Gain Boosting in Cascode Stage

Principle of gain boosting (v/i method)-Impedance at node t

Impedance at node x

Principle of gain boosting,

using feedback principle, Impedance at node t

Gm=

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Impedance at node x, using feedback

Differential Gain Boosting

Differential Gain Boosting (cont.)

min voltage required increases

Vx

Vy

OCMR, ICMR
Voutmax.= Vdd-Vgs-2Vov. =3-1.3-0.3= 2.4V
Voutmin.
Voutmin.= Vgs5+2Vov. =1.6V
1.6V
Vx min
min= Vgs5+Vov.
Vgs5+Vov =11.3V
3V
Vinmin= Vx min
min.+Vt=2.3V
+Vt=2 3V
Vinmin= Vgs1+Vov= 1.3
Vinmax=
Vinma Vgs1+Vo
Vgs1+Vov+Vt=
+Vt V
Vxmax+Vt=
ma +Vt 2.8v
28

CAN BE ZERO

Differential Gain Boosting (cont.)

OCMR, ICMR
Voutmax.= Vdd-Vgs-2Vov. =3-1.3-0.3= 1.4V
Voutmin.= Vgs5+2Vov. =1.6V

Vx min= can be 0
Vinmax= Vt=0.7V
Vt 0 7V
Vinmin= Vgs1+Vov
Vgs1+Vov= 1.3
13

Increasing ICMR

Rail-rail ICMR

Variable Gm opamp

Techniques are available to stabilize Gm

Constant Gm input stageusing current

switches

End

Slew Rate
Slew Rate (SR) limit: Real OpAmp has a maximum
rate
t off change
h
off the
th output
t t voltage
lt
magnitude
it d
limit
SR can cause the output of real OpAmp very
different from an ideal one if input signal magnitude
is too high
Affects settling time of OPAMP

Normal Settling

Linear RC Step Response: the slope of the step response is

proportional to the final value of the output, that is, if we
apply a larger input step, the output rises more rapidly.
If Vin doubles,, the output
p signal
g
doubles at everyy ppoint,,
therefore a twofold increase in the slope.
Completely decided by -3dB
3dB frequency

R-C charging

Rate of change of output node

1/f-3dB

Linear Feedback Systems

Step Response
Linear Settling

Again
A i find
fi d dv
d out/dt
/d
It is still proportional to Vout magnitude

Realistic Opamp

But the problem in real OpAmp is that this slope can not
exceed a certain limit.

Why? Origin of slewing

v small, always linear settling

V largeOPAMP slew

Low To High Transition

Constant current charging

ramp behaviour

Slew rate = dVo/dT = Iss/CL

Any further increase in vin will not make charging of output node fast

High To Low Transition

Off

Slew Rate

Slewing
Undesirable because Limits the speed of
OPAMP
Can not be eliminated
Remedy ---Estimate max.
max speed that can be obtained
Then make slew rate large How? provide
additional current boosting,
boosting

Estimation of Full Power Bandwidth

Full Power bandwidth: the range of frequencies for
which
hi h the
th OpAmp
O A
can produce
d
an undistorted
di t t d
sinusoidal output with peak amplitude equal to the
maximum allowed voltage output
How to know it?

f FP

SR

2 vo max

fFP shd,
hd be
b > f-3dB

Estimation of slew rate

Slewing in Telescopic Op Amp

Sl rate
Slew
t = Iss/(2C
I /(2CL)single
) i l o/p
/ node
d

Differential Slew Rate

Positive slew rate---large positive step at input
rate----large
large negative step at input
Negative slew rate

Folded-Cascode Slewing

Slew rate = Iss/(CL),

) indep.
indep of Ip

Folded-Cascode (cont.)

Constraint on Ip
Ip > Iss

Slewing Recovery if Ip < Iss

Large settling time

Slewing Recovery (cont.)

Two stage cmos opamp With RC Compensation

ICMR

Systematic Offset

Random Offset

Noise

Noise
2 sources---Noise coupled to input signal
Small current and voltage
g fluctuations that
are generated with in the device
Performance parameter----signal to noise
(
)
ration (SNR)

Origin of device noise

Existence of noise is due to the fact the
charge is not continuous but is carried in
discrete amounts equal to electron charge
Thus noise is associated with fundamental
processes in
i integrated
i t
t d circuit
i it devices
d i
so it can not be removed

Why should we study noise

Because noise represents a lower limit to the size
of electrical signal (min.
(min detectable signal) that
can be amplified by a circuit without significant
deterioration in signal quality
Noise results in upper limit to the useful gain of
an amplifier because if gain is increased without
limit,, then due to noise fluctuations at output
p node,,
transistors may go to linear region

Noise-Random signal
Value of noise
signal cannot be
predicted at any
time even if
past values are
known

 If microphone
drives a
resistive load,
More heat will
be generated in
case b.
Average value
of ac signals

How to estimate Noise?

Observe noise for a long time
Using measured results
results, prepare a statistical
model
Extract
E
useful
f l properties
i (here,
(h
noise
i
power) from this model that can be
predicted
di t d
Use noise power for doing noise analysis

Average Power
Average power delivered by a periodic

Noise power

How to find Average power

Square the signal

Area under the waveform
is calculated
Normalize the area to T
Pav expressed in V2

Vn2

Noise content
Noise content varies
with frequency
Noise power spectral
d it is
density
i obtained
bt i d
i.e to find the
magnitude
g
of low
and high noise
components

How to obtain Noise spectrum

Noise spectrum

Types of noise
Thermal noise

Representation of thermal noise

MOSFET noise---thermal noise

Noise generated in the channel

MOS---flicker noise

Representation

MOS noise

Noise corner frequency

Computation of Noise in circuits

Uncorrelated noise sources

Noise produced by resistor is independent
of noise produced by transistor

Output noise / Hz

output noise/ Hz for comparison

Drawbacks of using output noise for
p
comparison
Consider two amplifiers of gain A1, A2
Amp1 has Vout
Vout= 1V,
1V Vn=
Vn 30nV/ Hz
Hz.
Amp2 has Vout= 3V, Vn= 60nV/ Hz.
Which is better? Difficult to make
comparison

 A2 generates more noise, but has higher

gain
A1 hhas llow gain
i but
b generates less
l noise
i

Comparison Parameter
Signal to noise ratio---how large is signal in
comparison to noise
Sh ld be
Should
b large
l
(indep Of gain)
Input referred noise voltage (indep.
fictitious quantity as it can not be measured at the
input
This
Thi indicates
i di t how
h small
ll an input
i
t the
th circuit
i it can
detect
Should be small

Representation

How to reduce input referred noise voltage

gm1 should be maximized

2nd circuit

How to reduce input referred noise voltage

gm1 should be maximized

maximized, gm2 must be
minimized

Frequency response

Total output noise

Across all frequencies

SNR---signal power to noise power

M st be increased ---- BW will

Must
ill reduce
red ce

Csacode amplifier

Resistive load differential amp

Active load diff amp

Vx

Vy

Noise bandwidtheasy way to compare

multipole systems

Input signal noise

2 steps strategy-- Use fully differential circuits with high
CMRR
Use Negative feedback ---signal to noise
ration (SNR)

Design example

Reduce noise Using feedback

Example---Specification
Example
Specification
Configure an amplifier with a gain of 100 and
SNR (signal noise) of 1000

Input
pu ssignal
g
noise
o se modelling
ode g

Method-1
VIN

A1=100

Vout= 100Vin + Vn
SNR = 100vin/ vn

100 vin + Vn

Using 2 stage CMOS OPAMP

with
ith ffeedback
db k = 0.01
0 01 using
i 2 stages
t
Af= 100, SNR= 1000
10 x Noise due to devices in the A1circuit as gain is 1000
very less noise
amplifier

V
Vn
VIN

Ve

A2=10

A1=1000

CSA
low gm, Rd

FOLDED CASCODE
high gm

Vf= VOUT

=1/100

Vout= 10,000V
10 000Ve + 100 Vn = 10,000
10 000 (Vin-V
Vout] + 10 Vn
Vout= [10,000/ (1+ 100) ] Vin + [10/ (1+ 100) ] vn
Vout= 100 Vin + 0.1 vn
SNR = 1000 vin/ vn
Drawback------Compensation Is Required

VOUT

Implementation

gm1, gm2 low

Folded cascode

OCMR, ICMR (telescopicopen loop )

VDD=3V, VT=0.7V, VOV=0.3V
Vout max.= 3-0.3-0.3=2.4V (constraint from load)

Vout max.= Vb-(Vgs-Vt)=1.6-0.3=1.3V

( g
)

Only 0.4 V range

Vout MIN.=
MIN = Vb
Vb-Vt=1.6-0.7=0.9V
Vt=1 6 0 7=0 9V

BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

END

Fully differential circuits

Drawback
common mode level can not be a stable desired
value due to process variations

Well defined common mode level

Common-Mode Feedback

Differential Pair with FB, yet no loss of gain

Vocm Process variation dependence

If w/L of M3 reduces, Vx reduces
Vsg3 increases making I1=I3

Common-Mode Feedback (cont.)

Can we use Feed Back As CORRECTION?

[o/p to i/p ] Feed back here does not correct this
problem---why?
If M3 w/L reduces due to process variation Vx
reduces to equalize I1=I3
if Vx dec. Vgs1 decreases Vp dec.so M5
goes into linear
We need other correction method.

High Gain Amp Model

3 step implementation
method

How to sense?

How to bring a desired Vout cm value?

Common-Mode Feedback (cont.)

Resistive Sensing

Problem
Problem-----Gain
Gain decreases due to resistive loading
So, make R1,2 very large Si area problem

Remedy---Source-Follower Sensing

CMFB Example in folded cascode

Alternative CMFB for Folded Cascode

Deep Triode FET CM Sensing

Operation of sensing transistors

Rtot is a function of [Vout1 + Vout2] only.

Hence this parameter can be used to sense Vcm

Returning CMFB with Triode Devices in folded

cascode

Causes o/p Voltage

swing problem
See example
p 9.9

This dc value gets set at output automatically depending on circuit parameters

Drawbacks

Remedy---

CMFB using Triode circuit

fast

voltage change
Current change

Auto correction

Forcing desired Reference voltage

So, Currents should track each other

Vgs15= Vgs9 or Vgs16= Vgs7
Vref desired

Shd ttrackk
Shd.

CMFB Triode Example with Reference (cont.)

EXACT
DUPLICATE CIRCUIT

TRANS. TRACK EACH OTHER

Differential Pair with LCMFB

Analysis
y of amplifier
p
with CMFB circuit
3 analysis required
Does Acm increase after including cmfb thus
g
g CMRR?
degrading
What is the condition for Voc= Vref?
What is the condition for loop to be stable?

Dominant pole at output

SHOULD HAVE NON DOINANT POLES

Complete circuit

Acmwithout feedback

(Details from grey meyer)-- ---[Acm=voc/vic]

without CMFB

A1=

small

Acmwith CMFB

(Details from grey meyer)--[Acm=voc/vic] with CMFB

voc

vic

vp

Vcms= Vz

vref

NON DOMINANT POLE

A2=large

=1

Details from grey meyer)-- --- [Acmf = voc/vic]

with CMFB

1
=1

A1f =

(Details from grey meyer)--Gain [Voc/Vz=

voc/vcmc] without CMFB

voc

vp

Voc/Vz=
Vcmc= Vz

NON DOMINANT POLE

(Details from grey meyer)-- -Voc/Vz

Example ---grey, meyer

V /V =
Vy/Vz

Vy/Vz=

Condition for Voc

Voc= Vref

Loop gain
Loop gain= Voc/ Vref= Af

For Vref=Voc

(Details from grey meyer)--

Vref
CMFB Loop gain = [ Af]--(Vref to Voc)
vcms/ voc----feedback amplifier

Vref

Af--Closed loop
p voc/ vcms
----forward amplifier

vref

Open loop voc/ vcms----forward amplifier

Feedback amplifier gain--

Vref

Condition for feedback loop to be stable

For feedback loop to be stable

(Details from grey meyer)-ASSUMING ONLY ONE DOMINANT POLE

ACMC
shd. be non dominant pole

(Details from grey meyer)-For =1 (max feedback condition)

Assuming single pole response

Maximum unity gain frequency

Shd. have sufficient phase margin at this freq. Else reduce this freq.
how?
Decrease gm, (desirable) or
Increase CL-----causes reduction of -3db freq of forward amplifier in differential mode operation

To stabilize CMFBreduce gm by splitting

(Details from grey meyer)

Disadvantage----gain
g
g voc /vcms reduces
Provides stable Ibias , shd. be > 80%

PSRR

PSRR OF A CIRCUIT

PSRR Calculationssingle stage

Cascode amp.

Diff. Amp With Active Load

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Diff. Amp With Active Load

Alternate method

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Diff. Amp With Active Load at low

freq.

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Telescopic OPAmp With Active Load

at low freq
freq.

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PSRR Calculations

2 stage CMOS OP AMP

Without Cc
A= - A1 A2

Ap = Ap2 A2 Ap1

With Cc

Only second stage

Techniques for improving SR

provide
id additional
dditi l currentt by
b
Use push pull amplifiers to increase current by
setting
tti mirror
i
ratio
ti
local common-mode feedback (LCMFB)
adaptive bias for tail current boosting
Use clamping circuit

Performance parameters

Normal OTAclass AB Operation

work for large pos. input

Both work for small . input

work for large neg. input

Charging output

B/2 Ibias
Ibias
B Ibias
1x Ibias

= B/2, in normal mode

= B, In slew mode

B Ibias
= 0.33, B=1 in slew mode
(2B+1) Ibias
B/2 Ibias
(B+1) Ibias

= 0.25 in normal mode

Parameters
If B increases, SR as well as power consumption both increases

Small signal behaviour

Poles at x and y node

Adaptive biasing with LCMFB

LCMFB
drawback

Boosting current when large I/P

OPERATION OF LCMFB
When input is small, M1, M2 , M6, M7 carry equal current
(Icm/2) and x and y are at same potential
When i/p is largeM1 carries all current , M2 cuts off. M7
discharges y causing M7, M8 to cut off .

This makes I1> I2.

A differential current (Id= I1-I2)) flows through R1= R2=R. Vx

> Vy. Vz remains constant. But Vx=Vgs5 increases so I5
increases from I5 to ( I5 + )
So
S I4
4 through
h
h CL increases
i
But largest current corresponds to largest Vgs5= Vzcm+IssR
only
l

Operation
Icm= Iss/2 in each arm
Under normal condition
for large differential input

Large swing at X

Operation

I8 0

Can be large
g

So,
Similarly for negative swing.
Thus general expression for vid 0

CE for charging output in slew mode

Current efficiency= [Iout/ 2Iout+2Icm] 0.5 (charge) for Iout >> Icm, B=1
= [Iout/ Iout+2Icm] 1 (discharge)

Current consumption = 2Iout +2Icm

Here we can have B

B=1,
1,
But If B increases, SR as well as power consumption
,both increases
Aim is to achieve
achie e high SR at low
lo power
po er consumption
cons mption

Impact of LCMFB on Small signal behaviour

k=1 ----transconductance factor

Technique to further improve Slew Rate

Adaptive bias

Adaptive biasing for pmos diff.amp

Adaptive biasing ---Nmos diff amplifier

Operation of adaptive bias

Small sig mode M1, M2 carry same
current Iss/2
Large sig. mode--2 source follower
M6,
M6 M7 always carry Ib current as their Vgs
always remain same
M8,
M8 M9 can carry large current (Ib+I) as
their Vgs can vary.
For large input, M2 is cut off, M1 has large
Vgs. So it carries large current(> Iss), which
y M9
is sunk by

 VB can be low to obtain low power

consumption under low level inputs.
inputs

DC current in
i normall condition
di i

Impact on AC behaviour

Ac behaviour

K=2 here

With RC Compensation