Beruflich Dokumente
Kultur Dokumente
DOI 10.1007/s00202-010-0181-3
ORIGINAL PAPER
Received: 30 June 2009 / Accepted: 28 September 2010 / Published online: 16 October 2010
Springer-Verlag 2010
1 Introduction
Various pulse-width modulation (PWM) methods and strategies to obtain quasi-sinusoidal voltage or current waveforms at the output of a DC/AC inverter are intensely studied
with the aim of eliminating dominant harmonics. These harmonic components are at the integer multiples of the output
fundamental frequency. Minimization of the total harmonic
M. elebi (B)
Department of Electrical and Electronic Engineering,
Atatrk University, Erzurum, Turkey
e-mail: mcelebi@atauni.edu.tr
I. Alan
Department of Electrical and Electronic Engineering, Ege University,
Bornova, Izmir, Turkey
distortion (THD) at the output is important to obtain a quasisinusoidal case. One of the harmonic elimination methods is
the waveform analysis in the Fourier domain that results in
nonlinear equations solved by the Newton-Raphson iteration
technique. There are other methods that use Walsh functions
as well.
Out of the many harmonic elimination applications of
PWM inverters, we provide here only a few of them. Specific
harmonic elimination (SHE-PWM) technique and the elimination of specific harmonics using single-carrier sinusoidal
PWM (SPWM-SC) are compared in [1], where multi-level
inverter designs are used. With the help of a microprocessor-based control, the dominant harmonics of a currentfed inverter are eliminated in [2]. A space vector PWM
(SVPWM) inverter controller is proposed to drive a 3-phase,
1-Hp induction motor, and thus the voltage and current THD
of 2.46% and 1.48% are obtained at the load side, respectively
[3]. A multi- carrier comparison of the SVPWM technique
and harmonic analysis that depend on phase voltages in multilevel inverter systems is also reported [4]. To minimize harmonic values, further application of voltage injection method
into the reference signal using SVPWM technique is investigated by Hyung-Sun Ryu et al. [5], and THD values between
3 and 8% are obtained. The pre-calculated PWM switching frequency technique and the inverter model are given in
[6]. The current harmonics of a three-phase multi-cell cascade inverter are reported to be eliminated [7]. A harmonic
elimination method is also applied using a microprocessor in
three-phase and single-phase inverter [8]. In addition, a novel
centroid PWM approach and switching strategy is proposed,
and a repetitive control technique is used to eliminate harmonics in a voltage source inverter for harmonic elimination
in [911].
Special inverters are required to obtain a voltage signal at the utility frequency and amplitude determined by a
123
240
V0 =
(1)
(2)
where V0 , VS and I0 , IS are the output and source average voltages and currents, respectively, and d is the duty
cycle [12].
123
source
+
dc/dc
buckboost
i*
>
iC
iL
>
load
_
_
pwm
ref
(3)
i =
(4)
i loadmeasured + i C
As a switching transistor, a MOSFET is preferred in the circuit given in Fig. 3. The circuit parameters with a 20 kHz
PWM carrier signal used in the MATLAB simulations are
given in Table 1. With a source voltage of 48 V DC, an
approximately 218 Vrms of a fully rectified sine-wave is
obtained for a resistive load of 40 which corresponds to
1 kW load approximately, in which a maximum performance
is observed. This rectified sinusoidal waveform is converted
to AC voltage by a simple inverter with an operating period
of 20 ms. A disadvantage of the use of 48 V DC supply
voltage is that high level of inductance currents and losses
occur. According to the simulation results in Fig. 4, the inductance current has very large peak values up to 160 A. It is
important to note that the efficiency given in Table 1 varies
between 82 and 93% depending on the load. Operating with
high level of currents affects the efficiency of the system and
imposes high current ratings for the inductor used in the system. Inductive or capacitive loads are not influential on the
THD value of the output voltage while they are effective on
the output current, as shown in Fig. 5. For these reasons, one
solution is to employ a fly-back converter in the system to
increase the input DC voltage level at the expense of extra
cost, volume, complexity and loss. Another solution is to
241
DC source
48 V
Load
40
RLC (1 kVA)
Efficiency (%)
82
87
89
84
218.4
220.4
226
221.8
THD (%)
5.5
4.8
11
4.75
L, C
9H, 28F
PID values
Kp
0.04
Ki
Kd
1e 5
Td
4e 3
Equation 5 is used at dynamic analysis with the parameters np = 1.3, nq = 2 and Vmin = 0.7 pu in the Simulink. This
routine runs when V > Vmin , otherwise it becomes a constant impedance load with np = nq = 2. The transient state
exists at the first two periods for the dynamic load (PA =
0.8 kW, Q L = 300 Var, Q C = 50 Var), then the system
becomes stable as seen in Fig. 6. Since the dynamic response
of the system is acceptable at the load current, it gives a poor
result at the load voltage. The load voltage rises to 1 kV in
a short time range. So a damping circuit is added to the load
side to reduce high peak values.
np
V
Q nq
, Q = Q0
(5)
P = P0
V0
Q0
A considerable increase in efficiency is observed in Table 1
at lower loads. Operating with low currents reduces the operational losses of the switching elements used in the circuit.
This fact increases the applicability of the circuit, but it causes
higher THD values. The semiconductor specifications used
in both the systems are given in Table 2. The distortions in
the AC link voltage in the both circuits fully depend on how
well the capacitor current is regulated to its reference, and in
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242
this respect, the load current value is also a critical component in this regulation. The main advantage of these circuits
is that it does not require any harmonic elimination method.
On the other hand, the source currents in both the systems
have quite high distortion levels.
3 Conclusion and discussion
In this study, a fully rectified version of a sinusoidal voltage waveform at a utility amplitude and frequency obtained
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243
Fig. 5 The simulation results for various resistive and inductive/capacitive loads with 48 V DC supply. a RLC load, PA = 1 kW, Q L =
200 Var, Q C = 100 Var. b PA = 0.5 kW, Q L = 100 Var, Q C = 50 Var
Fig. 6 The dynamic response
of the circuit (PA = 0.8 kW,
Q L = 300 Var, Q C = 50 Var)
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244
48 V DC
AP80N30W-3
V(BR)DSS (volts)
300
rDS(on) (ohm)
0.066
IDSS (amps)
88
PD (watts)
150
123
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