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1.
PREFACE...........................................................................................................................2
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REFERENCES.................................................................................................................10
PREFACE
Power system control and stability involves voltage stability where a constant voltage can
be restored and maintained even though there are changes in load. Furthermore, it also
comprises of power stability in which slight change of power arises between generators that
are operating in parallel is suppressed to maintain its constant power. It is important to
consider both types of stability conditions while taking some approaches to improving power
system stability. Some methods of improving power system stability are improving the main
circuits by increasing the system voltage, installation of series capacitor as well as improving
generator excitation control.
Although the main circuit improvement approach is a fundamental measure, the scale of
reconstruction is very large. However, the excitation control may be an approach that is
possible to extract the maximum capability of the generator which will result in a large
economical effect.
This project requires the student to design and implement a specific excitation control as
well as governor control using DCPS-TS and Visual C++. The student is also required to
analyze the response of the exciter and governor system for generator control under dynamic
condition.
CHAPTER 1
INTRODUCTION TO EXCITATION SYSTEM
windings are placed on the stationary part namely stator which are designed for generation of
balanced three-phase voltages. The field winding which requires small power for its
excitation is usually placed on the rotor. The rotor is equipped with one or more shortcircuited windings namely damper windings. The rotor is driven by a prime mover at
constant speed and its field circuit is excited by direct current. The excitation may be
provided through slip rings and brushes by means of DC generators mounted on the same
shaft as the rotor of the synchronous machine.
The amount of excitation required to maintain the output voltage constant is a function of the
generator load. As the generator load increases, the amount of excitation increases.
1) Reactive lagging power factor loads require more excitation than unity power factor
loads.
2) Leading power factor loads require less excitation than unity loads.
Examples of different types of exciter are shown below:
CHAPTER 2
FUNCTIONS AND MODELING OF EXCITATION SYSTEM
exc#, bsno, ieunit, Ta, Tb, Tc, Te, Tf1, Tf2, Tr, Ka, Ke, Kf, aex, bex,
vrmax , vrmin, efdmin, efdmax
Next, we specify the input data for ieee2 that must be placed in the dynamic data file,
*.mac;
ieee2, 190, 1, 0.2, 1, 5, 0.1, 0.5, 0.5, 0.05, 50, 0.5, 0.4, 0.0, 0.0, 8,
-8, -10, 10
Read the data for ieee2 like other existing excitation controller model;
//ieee2 - exciter with amplifier gain only
if (strcmp(_strlwr(LineWords[0]),"ieee2") == 0)
{
ne = ne + 1;
ety[ne] = 14;
ibe[ne] = atoi(LineWords[1]);
.
.
if (ety[ne] > 0) iexcno += 1;
}
calculating initial values for the model ieee2 is added using template of previous model;
//Add Exciter with Amplifier Gain Only IEEE Type II
if (ety[i] == 14) {
//IEEE Type II exciter
.
.
}
The first order differential equations and other equations describing ieee2 need to be
identified first (refer to Inie.c).
VT is the terminal voltage of the unit obtained from;
vt = sqrt(vr[imn[j]] * vr[imn[j]] + vx[imn[j]] * vx[imn[j]]);
where i is the excitation controller index, j is the machine index and network index with
reference to machine index is imn[j].
The first order differential equations are:
Lag block
es1
Wash-out block
es8
VFB
sK F
1 sTF 1
es5
1
1 sTF 2
es9
Lead-lag block
es3
es2
tc/tb = tbtc
vs1/es2 = tbtc
dvs1/dt
vs2/es2
dvs2/dt
des3/dt
=
=
=
=
0
(1 - tbtc)/(1 + stb)
(es2*(1.0-tbtc) - vs2)/tb
dvs2/dt + dvs1/dt
es4
es4
Integral block
es6
Efd
efd/es6 = 1/(ste)
defd/dt = es6/te
Initial values of the states in the control block are given by:
des8/dt = 0;
dvs1/dt = 0;
es1[i] = vt;
se = (bex[i] *(efd[j] - aex[i])*(efd[j] - aex[i])) / efd[j];
es7[i] = efd[j] * (se + ke[i]);
es4[i] = es7[j];
es3[i] = es4[i] / ka[i];
es5[i] = es4[i];
ktf = kf[i] / tf1[i];
es8[i] = es5[i] * ktf;
es9[i] = es5[i] * ktf;
vfb[i] = es8[i] - es9[i];
es2[i] = es3[i];
verr[i] = es2[i] - vso[i] + vfb[i];
vref[i] = verr[i] + es1[i];
es[i] = vref[i];
tbtc = tc[i]/tb[i];
es2[i] = vso[i] + es[i] - es1[i] - vfb[i];
vs1[i] = es2[i]*tbtc;
vs2[i] = es2[i]*(1 - tbtc);
es3[i] = vs1[i] + vs2[i];
es4[i] = es3[i] * ka[i];
es6[i] = es4[i] - es7[i];
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xn x t dx dt
The objective here is to determine initial estimate of E fd from the control block (refer to
Eue1.c).
////Exciter with LAG Amplifier Gain and Time Constant and Transient Gain
Reducer - IEEE Excitation System Type II
if (ety[i] == 14)
{
vt = sqrt(vr[imn[j]] * vr[imn[j]] + vx[imn[j]] * vx[imn[j]]);
des1dt[i] = (vt - es1[i])/tr[i];
es1n[i] = es1[i] + des1dt[i] * dt;
es2n[i] = vso[i] + vref[i] - es1n[i] - vfb[i];
//lead-lag block
tbtc = ke[i] / te[i];
vs1n[i] = es2n[i] * tbtc;
dvs2dt[i] = (es2[i] * (1.0 - tbtc) - vs2[i]) / tb[i];
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des3dt[i]
vs2n[i] =
es3n[i] =
.
.
.
defddt[i]
efdn[j] =
= dvs2dt[i];
vs2[i] + dvs2dt[i] * dt;
vs1n[i] + vs2n[i];
= es6n[i] / te[i];
efd[j] + defddt[i] * dt;
Terminal voltage for the machine must be obtained using network index (imn[j] or ibe[j]). All
states must use controller index, i. Output for machine must use machine index, j.
x f x 0.5t dx dt dxn dt
The objective of this part is to determine Efd from the control block (refer to Eue2.c)
////Exciter with LAG Amplifier Gain and Time Constant and Transient Gain
Reducer - IEEE Excitation System Type II
if (ety[i] == 14)
{
vt = sqrt(vr[imn[j]] * vr[imn[j]] + vx[imn[j]] * vx[imn[j]]);
des1dtn = (vt - es1n[i]) / tr[i];
es1[i] = es1[i] + 0.5 * (des1dt[i] + des1dtn) * dt;
es2[i] = vson[i] + vref[i] - es1[i] - vfbn[i];
//lead-lag block
tbtc = ke[i] / te[i];
dvs2dtn = (es2[i] * (1.0 - tbtc) - vs2n[i]) / tb[i];
des3dtn = dvs2dtn;
.
.
.
//saturation
se = (bex[i] * (efd[j] - aex[i]) * (efd[j] - aex[i])) / efd[j];
es7[i] = efdn[j] * (se + ke[i]);
es6[i] = es4[i] - es7[i];
defddtn = es6[i] / te[i];
efd[j] = efd[j] + 0.5 * (defddt[i] + defddtn) * dt;
}
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Terminal voltage for the machine must be obtained using network index (imn[j] or ibe[j]). All
states must use controller index, i. Output for machine must use machine index, j.
CHAPTER 3
IMPLEMENTATION OF MODEL IN DCPS AND C++
Table 1: The solved load flow data for 100% load (17b1aS.sol)
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CAPSALL,2,9
CAPSALL,2,3
CAPSALL,2,5
CAPSALL,2,6
tsol,1,0.0,1.0,0.005,0
asht,syb,230,0,1000
fac2,syb;
nsol;
dqtr;
tsol,1,1.005,1.105,0.005,0
rsht,syb,230,0
rvln,230,130,1,0
fac2,syb;
nsol;
dqtr;
tsol,1,1.11,5.0,0.005,0
svou,ieee_2.gpf
Table 4: The solved load flow data for 100% load (17b1aS.sol)
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int
double
int
double
//Exciter
double
int
shdefddt,
double
*vfbn,
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ne = ne + 1;
ety[ne] = 14;
ibe[ne] = atoi(LineWords[1]);
ieunit[ne] = atoi(LineWords[2]);
ta[ne] = atof(LineWords[3]);
tb[ne] = atof(LineWords[4]);
tc[ne] = atof(LineWords[5]);
te[ne] = atof(LineWords[6]);
tf1[ne] = atof(LineWords[7]);
tf2[ne] = atof(LineWords[8]);
tr[ne] = atof(LineWords[9]);
ka[ne] = atof(LineWords[10]);
ke[ne] = atof(LineWords[11]);
kf[ne] = atof(LineWords[12]);
aex[ne] = atof(LineWords[13]);
bex[ne] = atof(LineWords[14]);
vrmax[ne] = atof(LineWords[15]);
vrmin[ne] = atof(LineWords[16]);
efdmin[ne] = atof(LineWords[17]);
efdmax[ne] = atof(LineWords[18]);
if (ety[ne] > 0) iexcno += 1;
}
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vs1[i] = es2[i]*tbtc;
vs2[i] = es2[i]*(1-tbtc);
es3[i] = vs1[i]+vs2[i];
dvs1dt[i] = 0;
dvs2dt[i] = (es2[i]*(1.0-tbtc) - vs2[i])/tb[i];
des3dt[i] = dvs2dt[i] + dvs1dt[i];
es4[i] = es3[i] * ka[i];
des4dt[i] = (ka[i]*es3[i] -es4[i])/ta[i];
es6[i] = es4[i] - es7[i];
defddt[i] = es6[i]/te[i];
//printf ("des8dt = %f \n", des8dt[i]);
//printf ("des9dt = %f \n", des9dt[i]);
//printf ("dvfbdt = %f \n", dvfbdt[i]);
//_getch();
}
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des4dtn = 0.0;
es4[i] = es4[i] + 0.5 * (des4dt[i] + des4dtn) * dt;
}
//feedback
des5dtn = (es4[i] - es5n[i]) / tf2[i];
es5[i] = es5[i] + 0.5 * (des5dt[i] + des5dtn) * dt;
ktf = kf[i] / tf1[i];
des9dtn = ((kf[i] * es5[i] / tf[i]) - es9n[i]) / tf[i];
es8[i] = es5[i] * ktf;
es9[i] = es9[i] + 0.5 * (des9dt[i] + des9dtn) * dt;
vfb[i] = es8[i] - es9[i];
//saturation
se = (bex[i] * (efd[j] - aex[i]) * (efd[j] - aex[i])) / efd[j];
es7[i] = efdn[j] * (se + ke[i]);
es6[i] = es4[i] - es7[i];
defddtn = es6[i] / te[i];
efd[j] = efd[j] + 0.5 * (defddt[i] + defddtn) * dt;
}
CHAPTER 4
RESULTS AND DISCUSSION OF SIMULATION
5.1 Simulation using IEEE Type 2 excitation system (Modelled)
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CHAPTER 5
CONCLUSION AND RECOMMENDATIONS
REFERENCES
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