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Fault Detection in HVDC System Using Short Time


Fourier Transform
Yew Ming Yeap, Student Member, IEEE, and Abhisek Ukil, Senior Member, IEEE

AbstractThe protection of HVDC system is still a dire


issue that should deserve more attention. DC breaker opens the
circuit electronically when fault happens, therefore, its operation
very fast. Besides that, it is also equally important to design
a detection method that can help to speed up the operation.
This paper investigates the application of Short Time Fourier
Transform (STFT) to not only detect but also differentiate types
of disturbance. It is not a popular method compared to wavelet
transform, partly due to the dilemma in juggling time-frequency
resolution. For our application specifically, we settle for poor
frequency resolution in exchange for better time resolution. As a
result, we are no longer able to find the frequency components
in fault signal. To address that, a parameter is proposed to
capture the pattern of side lobes. It is seen that STFT, with that
parameter, can effectively detect the DC fault very fast (<1.5ms),
as well as differentiating it from AC fault and load change. A twoterminal Modular Multilevel Converter (MMC) HVDC system is
used to simulate fault in PSCAD/EMTDC. The DC current is
exported to MATLAB to perform STFT.
Index TermsFault detection, MMC, HVDC protection, Short
Time Fourier Transform, window function

I. I NTRODUCTION

HE increasing importance of high voltage direct current


(HVDC) system is broadly corroborated by the growing
research interest in this particular area. This type of bulk
power transmission offers technical and economic benefits
making it an attractive option to the conventional AC system.
For the same distance, the DC line transmission cost is
way lower than AC line, which is the primary motivation
why many countries are adopting it as part of their national
grid. In addition, the HVDC facilitates system controllability,
independently controlling the active and reactive power flow.
These advantages are translated into a perfect solution for wind
farm integration as it is able to meet some of the challenges
that could have been otherwise faced in AC system: long
distance undersea cable, transmission loss, power flow control
and synchronization issue.
However, the large scale HVDC system cannot be realized
without proper protection in place. AC circuit breaker (CB)
is only sufficient to provide protection for a point-to-point
system. The DC line fault can result in extremely fast rising
current compared to its AC counterpart due to absence of line
inductance. This is a tremendous problem in multi-terminal
HVDC system because the mechanism of AC CB restricts the
The work was supported by the Start-Up Grant (M4081235.040), Nanyang
Technological University, Singapore.
Y. M. Yeap is a PhD student and A. Ukil is Assistant Professor in the School
of Electrical & Electronic Engineering, Nanyang Technological University
(NTU), Singapore (yeap0022@e.ntu.edu.sg, aukil@ntu.edu.sg).

fast tripping, failing to keep up with the speed of fault [3].


There has been significant development in DC CB from ABB
[1] and Alstom [2], but it would probably take some years for
its potential to become apparent. Even so, the DC CB has to
depend on a quick fault detection method to complement its
operation. Besides that, the fault detection method should be
discriminative with the ability to differentiate the DC fault and
other kind of disturbance, such as AC fault and load change
[4].
Various DC fault detection methods have been proposed in
literatures. The traveling wave method [5], [6] measures the
arrival time of the reflected fault waveform at each terminal to
estimate the fault location. The rate of change of DC current
[7] is used as one of the fault criteria, whereby DC fault yields
the highest dI/dt among other type of faults. Together with
that criterion, the Handshaking Method proposed by Tang
and Ooi [8] selects the faulted line based on the direction of
DC current through DC switch. It is worth noting to mention
the wavelet transform [10], [9] as it is a popular method that
has been widely reported. The signal processing technique
represents the fault signal in time-frequency domain providing
the insight of the presence of high frequency content and the
occurrence time.
In this paper, a novel fault detection method is proposed.
Basically, the moving signal is decomposed into chunk of
certain sample size and screened using window function. The
signal is then represented in frequency domain to observe the
spectral pattern. The advantage of this method is that it is
not sensitive to the magnitude and rate of change of fault
current, which can variably change for different fault resistance
and location, rather it highly depends on the rising pattern of
fault current. The ability to differentiate the AC fault and load
change from DC fault substantiates the potential of this method
in a HVDC protection system.
The following paper is structured in this manner. Section II
introduces the concept of window-based method and how it
works on fault detection in HVDC system. The said method
is tested by varying the fault conditions and the result is
presented in Section III. The comments on the result and the
conclusion is in Section V are given in Section IV and Section
V respectively.
II. A PPLICATION OF F OURIER T RANSFORM IN FAULT
D ETECTION
A. DC fault in HVDC system
The DC fault can happen when cable loses its insulation
and lightning strikes on overhead line. Pole-to-ground fault

30

Li

Current (kA)

TLij
VSCi
Rf

Cdc

Icap
Idc12

20
10
0
10
20
0.24

0.25

0.26

Time (s)

0.27

0.28

0.29

Fig. 2. Fault current and capacitor discharge during pole-to-pole fault.

Ldc
Idc

Rdc

Cdc

Ldc

Rf

Rdc

Fig. 1. Equivalent circuit of DC side during DC fault.

is commonly frequent in cable and overhead line network,


whereas the pole-to-pole fault, although rare, can result in
extremely destructive damage to the system. For a strong
protection system, it should be always equipped with the
ability to guard against the worst-case scenario, in which case
pole-to-pole fault is the most representative one.
The DC line under pole-to-pole fault can be expressed by
an equivalent circuit shown in Fig. 1. The line is made up of
pi-model equivalent resistance, Rdc , and inductance, Ldc . The
DC capacitor, Cdc , at the converter station is considered to be
large enough to make the line shunt capacitance negligible,
hence not shown in the circuit. The upper and lower lines are
short circuited by a fault resistance, Rf . With the formation of
RLC circuit, the capacitor is going to discharge contributing
to the biggest portion of fault current at initial instant of fault
[11]. The discharging time depends on the RLC parameter and
it is thereafter succeeded by the current injected from the AC
side.
The fault equivalent circuit is represented by the differential
equation in (1).
Re dIdc
1
d2 Idc
+
+
Idc = 0
2
dt
Le dt
Le Ce

(1)

where Re = 2(Rdc /2)+Rf , Le = 2(Ldc /2) and Ce = Cdc .


The under-damped response is met on the condition
2(Le /Ce )1/2 > Re . Assume that the PP fault happens at t0
with the initial conditions of Vdc (t0 ) = V0 and Idc (t0 ) = I0 ,
the solution of the second-order RLC differential equation is
Idc (t) = et [I0 cos(wt) +
Vdc (t) = et [V0 cos(wt) +

V0
Le

I0
w

V0
w

I0
Ce

sin(wt)]

(2)

sin(wt)]

(3)

where = Re /2Le and w = (1/Le Ce (Re /2Le )2 )1/2 .

The comparison of fault current and DC capacitor discharge


is shown in Fig. 2. The pole-to-pole fault happens at 0.25s. It
is seen that the capacitor discharge (Icap ) mainly contributes
to the fault current (Idc12 ) during the first 10ms /cite, subsequently the AC infeed current begins to dominate. As the ideal
fault detection time is approximately 2ms, the natural response
of capacitor is exactly what a fault detection method needs
to effectively capture. Having identified the faulted line, it is
necessary to immediately send the blocking signal to all IGBTs
of affected terminal before the fault current rises beyond their
capacity.
B. Concept
It has been widely recognized that wavelet transform is a
good technique to analyze non-periodic and non-stationary
signal, such as voltage and current with fault transient in
power system. It offers variable window size without risk
of compromising time-frequency resolution. On the other
hand, Short Time Fourier Transform (STFT) is relatively not
known as a favorable candidate due to its poor time-frequency
resolution; wide window gives finer frequency resolution but
mediocre time resolution, and vice versa. Even so, STFT
can still be used, granted, certain degree of compromise is
allowed. A protection system does not need a highly precise
measurement of harmonics to perform effectively. Hence, for
STFT to be used for the application of fault detection, it is
worth to pay the price for sacrificing frequency resolution in
exchange for better time information, which is actually far
more significant.
The STFT in (4) is computed by taking the Discrete Time
Fourier Transform (DTFT) of each windowed block and the
process illustrated in Fig. 3.
ST F T (n, k) =

N
1
X

x(n)w(n mH)ej N kn

(4)

n=0

where k=frequency index, N =FFT size, x(n)=input signal,


w(n)=window function, m=position of window and H=hop
size between successive window (50%).
Under normal condition, the DC current is flat, convolution
of the signal with window function will have all the energy
in the main lobe near 0 Hz and side lobes are uniformly
distributed, as shown in Fig. 4(a). Rising current, in Window
B, causes some degree of distortion on the spectral pattern in
Fig. 4(b), the side lobes are also observed to have increased
in magnitude. This can be explained by saying that the energy

Window)A

Standard deviation, sN

Fault)signal

Window)B

49

4
0.2495
3

2
1

Current)(kA)

49

Current)(kA)

0.249

49

0.2505

0.251

0.25
Time) (s)

0.2505

0.251

X: 0.25
Y: 6.464

5
4
3
2
1
0.24

0.245

0.25
Time (s)

0.255

0.26

Fig. 5. sN for the fault signal, fault happens at 0.25s.

0.2495
2

50%)overlap
0
1

0.25
Time) (s)

0.2495

0.25
Time) (s)

0
0.249

0.2495

0.2495

0.25
Time) (s)

0.2505
0.25
Time) (s)

0.2505

0.2505

0.251

Fig. 3. Illustration of STFT on fault signal, with 50% window overlapping.

lobe (dB).
This method is applied to the same fault signal of Fig. 2
to observe the change of sN over the course of fault, using
Hamming window with length of 32. The result is presented
in Fig. 5. The sN hovers around 1 when the DC current is
normal. At the time (0.25s) when the fault happens, the sN
immediately increases to 6.464 indicating the distortion of side
lobes. The result confirms to us that sN can be used as a
parameter to detect the fault in a HVDC system.

20
Magnitude (dB)

III. R ESULT AND V ERIFICATION

20
40
60
80
100
0

1000

2000

3000
4000
5000
Frequency (Hz)
(a)

6000

7000

8000

1000

2000

3000
4000
5000
Frequency (Hz)
(b)

6000

7000

8000

Magnitude (dB)

20
0
20
40
60
0

Fig. 4. Frequency spectrum of fault signal for (a) Window A and (b) Window
B.

has leaked into other frequencies, indicating the presence of


high-frequency content as a result of fault.
Because the distorted side lobes are the indication of fault
occurrence, instead of analyzing what harmonics exist in the
signal, we take a different approach to capture this event:
calculating the standard deviation of the amplitude of each
side lobe, sN in (5). When there is no fault, the uniform
pattern of side lobes will generate very low sN . In the event
of fault though, the signal of sudden increasing DC current
will cause the side lobes to have varying amplitude across
frequency spectrum, leading to higher sN .
v
u
N
u1 X
sN = t
(an a
)
(5)
N n=1
where N =number of side lobes and a=amplitude of side

A two-terminal Modular Multilevel Converter (MMC)based HVDC system rated at 600MVA, 100km overhead line,
is modeled in PSCAD/EMTDC to simulate fault and load
change. The types of fault we are going to investigate are poleto-pole fault (DC) and three-phase-to-ground fault (AC). The
DC fault is simulated by short-circuiting the upper and lower
pole conductors. Moreover, it is our interest to understand
how the variation of fault parameter, such as fault resistance
and location along the DC line, will affect the parameter
sN in detecting the fault. The load change is simulated by
introducing resistive and inductive load at one of the terminals.
The DC current of each terminal is constantly monitored. In
other words, the detection method is aimed to only rely on
local measurement without communication channel. The result
is then exported to MATALB to compute the STFT.
A. DC fault
Pole-to-pole ground is firstly analyzed here. A short-circuit
with resistance 0.1 is set at the middle of DC overhead line
between two terminals and lasts for 0.5s. Two DC currents,
Idc12 and Idc12 , are measured at Terminal 1 and 2, respectively.
The result is shown in Fig. 6.
The DC currents increase sharply as the fault begins to
interrupt the system at 0.25s. Just about the same time, their
corresponding sN records different level but very high value,
implying that the side lobes in frequency spectrum has been
heavily distorted because of the behavior of fault current.
Minus the traveling time, the fault can be successfully detected
after 850s using sN as a criterion.
1) Influence of Fault Resistance: In this section, the influence of fault resistance on parameter sN is investigated.
It is reported in /cite that high fault resistance tends to
yield slow fault current. Thus, higher resistance is going to
diminish the effectiveness of detection method, which depends

30

Idc12
Idc21

Current,(kA)

20
10
0
10
0

0.1

0.2

Time,(s)
(a)

0.3

0.4

0.5

Standard,deviation,,sN

10

Idc12
Idc21

X: 0.25
Y: 9.786

8
6

X: 0.25
Y: 6.465

4
2
0.05

0.1

0.15

0.2

0.25 0.3
Time,(s)
(b)

0.35

0.4

0.45

Fig. 6. sN for the fault current. Fault happens at 0.25s.

on measuring rate of change of fault current, failing to work


properly.
DC fault at the same location with resistance ranging from
0.01-100 is simulated. The result is shown in Fig. 7. It is
observed that changing the fault resistance does not have any
dramatic impact on sN . Although the sN for Idc21 starts to
decrease beyond 10, it still leaves sufficiently large margin
above normal sN allowing us to differentiate between fault
and non-fault. This demonstrates that the effectiveness of this
fault detection method is not compromised however the fault
resistance is varied.
2) Influence of Fault Location: The fault resistance is firstly
set 15km away from Terminal 1, then 20km, 30km and so
on until 85km. The location of fault determines the sectional
length of overhead line, as well as the share of line resistance,
the two terminals are going to see; the closer the fault to the
terminal, the lower the line resistance, as a result that terminal
will have to take higher fault current than its neighbor. It is
our interest to review how this will influence the parameter
sN and the detection time. The result is shown in Table I.
Similarly, we observe high sN , which corresponds to fault
12

Standard deviation, sN

occurrence, for every fault location simulated here. It is


noteworthy that the detection time appears to change in a
somewhat predictable fashion depending on fault location.
The fastest detection time is recorded for the DC current of
terminal that is close to fault point, as can be seen for Idc12
and Idc21 for 15km and 85km, respectively.
TABLE I
I NFLUENCE OF FAULT LOCATION

Fault9 DC9current
location9
(km)
Idc12
15
Idc21
Idc12
20
Idc21
Idc12
30
Idc21
Idc12
40
Idc21
Idc12
50
Idc21
Idc12
60
Idc21
Idc12
70
Idc21
Idc12
80
Idc21
Idc12
85
Idc21

sN

Time9(us)

4.826
7.42
5.011
5.606
5.067
7.294
6.344
5.66
6.464
9.783
5.99
5.247
9.743
5.346
5.048
5.387
10.084
5.43

389
1241
389
1241
910
781
850
1302
850
850
781
1367
780
920
710
393
560
390

B. AC fault
A three-phase-to-ground fault is simulated near AC source
at Terminal 1. The impact of AC fault can spread over to
DC side resulting in transients in DC current. Under this
circumstance it is undesirable for the DC CB to trip the DC
line, which means, in our detection method, the sN should be
low enough to recognize it. The result is shown in Fig. 8.
There is a slight increase in sN over the course of AC fault,
but it is very much lower than the value that would otherwise
appear in DC fault. This proves how the detection method
is able to differentiate DC fault from AC fault. In addition,
three-phase-to-ground fault is the most severe in the AC fault
family, which is to say that this detection method can work
effectively against all other AC faults as well.

10
8

C. Load Change

Idc12

Idc21

0
0.001

0.01

0.1

10

100

Fault resistance (ohm)

Fig. 7. Varying the fault resistance, sN obtained for the fault current Idc12
and Idc21 .

There is a likelihood that relay might treat temporary


transients caused by load change as fault and subsequently trip
the system. To counter that, the detection method must be able
to understand the transient signature so that it appropriately
prevents the relay from giving wrong signal. Load change is
simulated in our model to see how our detection method will
respond to this phenomenon. The result is shown in Fig. 9.
sN remains low and does not seem to change in the slightest
throughout as can be seen in the figure. Under the screening

CurrentI(kA)

Idc12
Idc21

1
0
1

StandardIdeviation,IsN

2
0

0.1

0.2

TimeI(s)
(a)I

0.3

0.4

0.5

Idc12
Idc21

1.4
1.2

V. C ONCLUSION

1
0.8

0.05

0.1

0.15

0.2

0.25 0.3
TimeI(s)
(b)I

0.35

0.4

0.45

Fig. 8. sN for the AC fault.

CurrentA(kA)

2
1
Idc12
Idc21

0
1
2
0

0.1

0.2

TimeA(s)
(a)

0.3

0.4

StandardAdeviation,AsN

0.5

Idc12
Idc21

1.015
1.01
1.005
0.05

0.1

0.15

0.2

0.25 0.3
TimeA(s)
(b)

In this paper, the application of Short Time Fourier Transform (STFT) in DC fault detection has been investigated.
Because of uncertainty principle with STFT, we prioritize
finer time resolution at the expense of frequency resolution,
which means it becomes impossible to precisely measure
the frequency content. To work around this problem, a new
parameter is proposed: standard deviation, sN , of the side
lobes amplitude. High frequency components penetrate DC
current when fault happens, this can be seen in its frequency
spectrum where some side lobes increase in magnitude while
some decrease. With the parameter proposed, sN will show a
sharp increase, indicating the emergence of DC fault.
Besides that, it is observed that STFT is able to differentiate
different disturbance in HVDC system: DC fault, AC fault and
load change, by using the parameter sN .
R EFERENCES

1.02

1
0

2) Care must be taken when deciding which window function to use. The window function adopted in this paper
is Hamming. It has consistent side lobe level, which
is reflected in low sN when there is no fault. For the
window function with high side lobe fall-off rate [12],
such as Hanning, it will give higher sN .
3) This paper demonstrates the feasibility of STFT fault
detection method in a two-terminal MMC-HVDC system, it would be interesting to investigate if it could
work on a multiterminal system, whereby the DC fault
propagates in a more complicated way.

0.35

0.4

0.45

Fig. 9. sN for the load change.

of our detection method, the load change will pass as if


the system is operating normally. Again, this demonstrates
the ability of our detection method whereby it is able to
discriminate fault and load change effectively.
IV. D ISCUSSION
The following comments are cited on the result.
1) The parameter sN is extremely sensitive to the interruption of harmonic. The results presented in this paper
are obtained from a MMC model, which is well-known
for generating clean DC current without the need of
filter. In this case, sN can faithfully reveal the cause of
disturbance. For this method to work on other converter
topology that has poor harmonic performance, the signal
has to be denoised before it is processed with STFT.

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