MICROPROCESSORS 2(TTA)

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INSTRUCTIONS
1.NUMBER OF QUESTIONS 25
2.HAS A TIME LIMIT OF 15 MINUTES
3.HAS A PASS MARKS OF 30%
4.QUESTIONS PER PAGE 1
5.EACH QUESTIONS HAS 1 MARKS
6.NEGATIVE MARKING FOR EACH QUESTIONS IS 0.25
7.WILL ALLOW TO YOU GO BACK ,SKIP AND CHANGE YOUR ANSWERS
8.WILL ALLOW TO YOU PRINT OUT YOUR RESULT AND CERTIFICATE
9.WILL ALLOW TO YOU PRINT OUT YOURS RESPONSE SHEET WITH CORRECT ANSWER KEY AND EXPLANATION
10.WE WILL PROVIDE YOURS RESULT,CERTIFICATE AND YOUR RESPONSE SHEET TO YOURS EMAIL ID AT END OF ONLINE
TEST
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Max Time Al lowed: 15 mi n

Q.1)

Q.2)

Q.3)

Q.4)

Q.5)

Q.6)

What is RST for the TRAP

A.

RST 5

B.

RST 5.5

C.

RST 4

D.

RST 4.5

The advantage of memory mapped i/o over i/o mapped i/o is

A.

Require a bigger address decoder

B.

ALL OF ABOVE

C.

Faster

D.

Many instructions supporting memory mapped i/o

Which interrupt is not level sensitiv e in 8085 ?

A.

RST 6.5 is a raising edge-triggering interrupt

B.

both

C.

RST 7.5 is raising edge-triggering interrupt

D.

none

IN 8086 microprocessor one of the following statements is not true

A.

Coprocessor is interfaced in MAX mode

B.

I/O can be interfaced in MAX/MIN mode

C.

Supports pipe lining

D.

Coprocessor is interfaced in MIN mode

.Address line for RST 3 is

A.

0020H

B.

0020H

C.

0018H

D.

0038H

Which stack in 8085?

A.

FIFO

B.

LILO

C.

FILO

D.

LIFO

Q.7)

Q.8)

Q.9)

What are level triggering interrupts

A.

RST 7.5 AND RST 6.5

B.

RST 6.5 AND RST 5.5

C.

INTR and TRAP

D.

RST 5.5 AND RST 7.5

. W hat is SIM
A.

softer interrupt mask

B.

select interrupt mask

C.

Sorting interrupt mask

D.

Set interrupt mask

RIM is used to check whether??..?

A.

T he read operation is done or not

B.

T he write operation is done or not

C.

ALL

D.

T he interrupt is masked or not

Q.10) BHE of 8086 microprocessor signal is used to interface the

A.

even bank memory

B.

I/O

C.

odd bank memory

D.

DMA

Q.11) Access time is faster for

A.

ROM

B.

SRAM

C.

DRAM

D.

EPROM

Q.12) What is meant by Mask able interrupts?

A.

An interrupt which can never turned off

B.

both

C.

none

D.

An interrupt that can be turned off by the programmer

Q.13) Address line for TRAP is

A.

0034H

B.

0023H

C.

0024H

D.

0033H

Q.14) Whai is software interrupt?

A.

T RAP

B.

RST 0-7

C.

RST 5.5

D.

INTR

Q.15) Which Processor structure is pipelined ?

A.

all x80 processor

B.

all x85 processor

C.

all X86processor

D.

Pentium

Q.16) Which of the following is a hardware interrupt

A.

T RAP

B.

RST 5.5,TST 6.5,RST 7.5

C.

ALL

D.

INTR,TRAP

Q.17) What does mp speed depends on

A.

address bus width

B.

clock

C.

size of register

D.

data bus width

Q.18) In 8086 the following has the highest priority among all interrupts
A.

NMI

B.

T YPE 255

C.

OVER FLOW

D.

DIV 0

Q.19) 8088 differs 8086 in

A.

address capability

B.

supports of co processor

C.

Data width on the output

D.

supports of max/min code

Q.20) In 8086 the ov erflow flag is set when

A.

Single digit numbers go out of their range after an arithmetic operation

B.

T he sum is more than 16 bit

C.

Carry&Sign flag are set

D.

Zero flag is set

Q.21) Why 8085 processor is called an 8 bit processor?

A.

Because it has 8 bit data bus

B.

both

C.

none

D.

Because it has 8 bit ALU

Q.22) Which is non v ector interrupt

A.

INTR

B.

RST7.5

C.

RST6.5

D.

T RAP

Q.23) In 8086, Example for Non mask able interrupts are

A.

INTR

B.

T RAP

C.

RST 6.5

D.

RST 5.5

Q.24) In 8085,example of non maskable interrupts are

A.

T RAP

B.

RST 5.5

C.

RST 6.5

D.

INTR

Q.25) Can ROM be used as stack?

A.

Some times no

B.

Some times yes

C.

Yes

D.

No

4 of 4

Answer Key
Q.1) RST 4.5
I

Q.2) ALL OF ABOVE

I

Q.3) RST 7.5 is raising edge-triggering interrupt

I

Q.4) Coprocessor is interfaced in MIN mode

I

Q.5) 0018H
Q.6) LIFO
Q.7) RST 6.5 AND RST 5.5
I

Q.8) Set interrupt mask

I

Q.9) The interrupt is masked or not

I

Q.10) odd bank memory

Q.11) SRAM
Q.12) An interrupt that can be turned off by the programmer
I

Q.13) 0024H
I

Q.14) RST 0-7

I

Q.15) all X86processor

Q.16) ALL
Q.17) address bus width
I

Q.18) NMI
I

Q.19) Data width on the output

I

Q.20) Single digit numbers go out of their range after an arithmetic operation
Q.21) Because it has 8 bit ALU
Q.22) INTR
I

Q.23) TRAP
I

Q.24) TRAP
I

Q.25) No

8/6/2016 10:08 PM