5

Table of Contents
1
2
3
4
5
6
7

Revisions & Change Log

TITLE PAGE
BLOCK DIAGRAM
K64F MCU
OpenSDA INTERFACE
ARDUINO SHIELDS & COMBO SENSOR
SD CARD / RF - WIFI / BLUETOOTH
RMII

Rev

Description

Date

Approved

X1

Initial Draft

Oct 18

Chung

X2

Feedbacks Implemented

Oct 22

Chung

X3

Feedbacks from Chung Implemented

Oct 23

Chung

X4

Components changed as per the

feedbacks
RF and Bluetooth headers added

Oct 24

Chung

Oct 28

Chung

X6

Arduino connections added

Nov 1

Chung

X7

Net review and fix

Nov 3

Chung

Release to production,
prototype build
openSDA reset capacitor fix

Nov 8

Chung

Nov 22

del Rey

X5

A1
B
C
D

Release to
production
Release to
production
Fixing I2C

production,
build
production,
build
swap to headers

Jan 20

Chung

Feb 06

Chung

Feb 26

Chung

Enhancing USB PWR input filter

for robustness

Mar 18

Chung

Swapping J2.2 connection to PTC12

Fix Eth Link status when 2 FRDMs
are connecter to each other

Jul 11

Chung

E1

Updating J13
Ethernet connector part

Sep 03

Chung

E2

Depopulating J14

Sep 10

Chung

E3

Depopulating C55, populating R75

Oct 14

Chung

D1

FREEDOM K64F

Automotive, Industrial & MultiMarket Solutions Group

6501 William Cannon Drive West Austin, TX 78735-8598

ICAP Classification:
Designer:
Rafael del Rey

FCP: ____

FIUO: ____

PUBI: X

Drawing Title:

FRDM-K64F

Drawn by:
Sudhasha(LnT)

Page Title:

Approved:
Chung

Size
C

Document Number

Date:

Friday, October 17, 2014

TITLE PAGE
Rev
E3

SCH-28163 | PDF: SPF-28163

Sheet
1

of

1. Unless Otherwise Specified:

All resistors are in ohms, most are 1%, 1/10 Watt. Otherwise are 5%, 1/8 Watt.
All capacitors are in uF, some are 10% or 20%
All voltages are DC
All polarized capacitors are tantalum
2. Interrupted lines coded with the same letter or letter
combinations are electrically connected.
D

3. Device type number is for reference only. The number

varies with the manufacturer.
4. Special signal usage:
_B Denotes - Active-Low Signal
<> or [] Denotes - Vectored Signals
5. Interpret diagram in accordance with American
National Standards Institute specifications, current
revision, with the exception of logic block symbology.

ICAP Classification:
Drawing Title:

FCP: ___

FIUO: X

PUBI: ___

FRDM-K64F
Page Title:

BLOCK DIAGRAM

Size
C

Document Number

Date:

Friday, October 17, 2014

Rev
E3

SCH-28163 | PDF: SPF-28163

Sheet
1

of

K64F USB CONNECTOR

S1
S3
5V

330 OHM

C45
1.0UF
P3V3_K64F

VREFH
R54

TC_USB_ID_TP

K64_MICRO_USB_DN
K64_MICRO_USB_DP

pg(2)
pg(2)

R52

R53
1K

TP15

DNP
1

P5V_USB

AREF pg(4)

0 DNP
D4
3.0V
DNP

OPTIONAL USB HOST FUNCTIONALITY

33
33

D+

R49
R46

USB_CONN_DN
USB_CONN_DP

D-

ID

P5V_K64_USB

1
2

S2
S4

U15 U16 U18

Layout Note:Connect C513

directly between VDDA and
VSSA pins

J21
HDR 1X2

L4

TC_USB_ID_TP
2

P3V3_K64F
R72
0
DNP

C46
0.1UF

XTAL_K64_MAIN
pg(4,6) PTB[0..3]

PTB0
PTB1
PTB2
PTB3
PTB9
PTB10
PTB11
PTB16
PTB17
PTB18
PTB19
PTB20
PTB21
PTB22
PTB23

pg(4) PTB[9..11]

pg(3,4) PTB[16..23]

pg(4,5) PTC[0..18]

PTC0
PTC1
PTC2
PTC3
PTC4
PTC5
PTC6
PTC7
PTC8
PTC9
PTC10
PTC11
PTC12
PTC13
PTC14
PTC15
PTC16
PTC17
PTC18

XTAL_K64_MAIN
R74
0

53
54
55
56
57
58
59
62
63
64
65
66
67
68
69

RMII0_MDIO/MII0_MDIO
RMII0_MDC/MII0_MDC
ADC0_SE12/FTM0_FLT3
PTB3(TWRPI_GPIO0)/ADC0_SE13
SPI1_PCS1/UART3_CTS_B
SPI1_PCS0/UART3_RX/FB_AD19
SPI1_SCK/UART3_TX/FB_AD18
SPI1_SOUT/FB_AD17
SPI1_SIN/FB_AD16
CAN0_TX/I2S0_TX_BCLK/FB_AD15
CAN0_RX/I2S0_TX_FS/FB_OE_B
PTB20(SD_CARD_DETECT)/FB_AD31
PTB21(SD_CARD_WP)/FB_AD30
PTB22/FB_AD29
PTB23/FB_AD28

70
71
72
73
76
77
78
79
80
81
82
83
84
85
86
87
90
91
92

PTC0(TWRPI_GPIO1)/FB_AD14/I2S0_TXD1
FTM0_CH0/FB_AD13/I2S0_TXD0
FTM0_CH1/FB_AD12
UART1_RX/FTM0_CH2/CLKOUT
UART1_TX/FTM0_CH3/FB_AD11
PTC5/I2S0_RXD0/FB_AD10
PTC6/LLWU_P10/FB_AD9/I2S0_MCLK
I2S0_RX_FS/FB_AD8
PTC8(K64_USB_FLGA)/FB_AD7
PTC9(K64_USB_ENABLE)/FB_AD6
I2C1_SCL/FB_AD5
I2C1_SDA/I2S0_RXD1/FB_RW_B
PTC12(GPIO8_ELEV)/FB_AD27
PTC13(GPIO7_ELEV)/FB_AD26
K64F_UART_TX
PTC15(GPIO15_ELEV)/FB_AD24
PTC16(TWRPI_GPIO2)/ENET0_1588_TMR0
PTC17(TWRPI_GPIO3)/ENET0_1588_TMR1
PTC18(TWRPI_GPIO4)/ENET0_1588_TMR2

PTD0/LLWU_P12/SPI0_PCS0/UART2_RTS/FTM3_CH0/FB_ALE/FB_CS1/FB_TS
PTD1/ADC0_SE5B/SPI0_SCK/UART2_CTS/FTM3_CH1/FB_CS0
PTD2/LLWU_P13/SPI0_SOUT/UART2_RX/FTM3_CH2/FB_AD4/I2C0_SCL
PTD3/SPI0_SIN/UART2_TX/FTM3_CH3/FB_AD3/I2C0_SDA
PTD4/LLWU_P14/SPI0_PCS1/UART0_RTS/FTM0_CH4/FB_AD2/EWM_IN/SPI1_PCS0
PTD5/ADC0_SE6B/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/FB_AD1/EWM_OUT/SPI1_SCK
PTD6/LLWU_P15/ADC0_SE7B/SPI0_PCS3/UART0_RX/FTM0_CH6/FB_AD0/FTM0_FLT0/SPI1_SOUT
PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1/SPI1_SIN
PTE0/CLKOUT32K/ADC1_SE4A/SPI1_PCS1/UART1_TX/SDHC0_D1/TRACE_CLKOUT/I2C1_SDA/RTC_CLKOUT
PTE1/LLWU_P0/ADC1_SE5A/SPI1_SOUT/UART1_RX/SDHC0_D0/TRACE_D3/I2C1_SCL/SPI1_SIN
PTE2/LLWU_P1/ADC0_DP2/ADC1_SE6A/SPI1_SCK/UART1_CTS/SDHC0_DCLK/TRACE_D2
PTE3/ADC0_DM2/ADC1_SE7A/SPI1_SIN/UART1_RTS/SDHC0_CMD/TRACE_D1/SPI1_SOUT
PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/SDHC0_D3/TRACE_D0
PTE5/SPI1_PCS2/UART3_RX/SDHC0_D2/FTM3_CH0
PTE6/SPI1_PCS3/UART3_CTS/I2S0_MCLK/FTM3_CH1/USB_SOF_OUT

PTB0/LLWU_P5/ADC0_SE8/ADC1_SE8/I2C0_SCL/FTM1_CH0/RMII0_MDIO/MII0_MDIO/FTM1_QD_PHA
PTB1/ADC0_SE9/ADC1_SE9/I2C0_SDA/FTM1_CH1/RMII0_MDC/MII0_MDC/FTM1_QD_PHB
PTB2/ADC0_SE12/I2C0_SCL/UART0_RTS/ENET0_1588_TMR0/FTM0_FLT3
PTB3/ADC0_SE13/I2C0_SDA/UART0_CTS/UART0_COL/ENET0_1588_TMR1/FTM0_FLT0
PTB9/SPI1_PCS1/UART3_CTS/FB_AD20
PTB10/ADC1_SE14/SPI1_PCS0/UART3_RX/FB_AD19/FTM0_FLT1
PTB11/ADC1_SE15/SPI1_SCK/UART3_TX/FB_AD18/FTM0_FLT2
PTB16/SPI1_SOUT/UART0_RX/FTM_CLKIN0/FB_AD17/EWM_IN
PTB17/SPI1_SIN/UART0_TX/FTM_CLKIN1/FB_AD16/EWM_OUT
PTB18/CAN0_TX/FTM2_CH0/I2S0_TX_BCLK/FB_AD15/FTM2_QD_PHA
PTB19/CAN0_RX/FTM2_CH1/I2S0_TX_FS/FB_OE/FTM2_QD_PHB
PTB20/SPI2_PCS0/FB_AD31/CMP0_OUT
PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT
PTB23/SPI2_SIN/SPI0_PCS5/FB_AD28

PTE24/ADC0_SE17/UART4_TX/I2C0_SCL/EWM_OUT
PTE25/ADC0_SE18/UART4_RX/I2C0_SDA/EWM_IN
PTE26/CLKOUT32K/ENET_1588_CLKIN/UART4_CTS/RTC_CLKOUT/USB_CLKIN
ADC0_DM1
ADC0_DP1
ADC0_DM0/ADC1_DM3
ADC0_DP0/ADC1_DP3
ADC1_DM1
ADC1_DP1
ADC1_DM0/ADC0_DM3
ADC1_DP0/ADC0_DP3

PTC0/ADC0_SE14/SPI0_PCS4/PDB0_EXTRG/USB_SOF_OUT/FB_AD14/I2S0_TXD1
PTC1/LLWU_P6/ADC0_SE15/SPI0_PCS3/UART1_RTS/FTM0_CH0/FB_AD13/I2S0_TXD0
PTC2/ADC0_SE4B/CMP1_IN0/SPI0_PCS2/UART1_CTS/FTM0_CH1/FB_AD12/I2S0_TX_FS
PTC3/LLWU_P7/CMP1_IN1/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUT/I2S0_TX_BCLK
PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/FTM0_CH3/FB_AD11/CMP1_OUT
PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/FB_AD10/CMP0_OUT/FTM0_CH2
PTC6/LLWU_P10/CMP0_IN0/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK
PTC7/CMP0_IN1/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS/FB_AD8
PTC8/ADC1_SE4B/CMP0_IN2/FTM3_CH4/I2S0_MCLK/FB_AD7
PTC9/ADC1_SE5B/CMP0_IN3/FTM3_CH5/I2S0_RX_BCLK/FB_AD6/FTM2_FLT0
PTC10/ADC1_SE6B/I2C1_SCL/FTM3_CH6/I2S0_RX_FS/FB_AD5
PTC11/LLWU_P11/ADC1_SE7B/I2C1_SDA/FTM3_CH7/I2S0_RXD1/FB_RW
PTC12/UART4_RTS/FB_AD27/FTM3_FLT0
PTC13/UART4_CTS/FB_AD26
PTC14/UART4_RX/FB_AD25
PTC15/UART4_TX/FB_AD24
PTC16/UART3_RX/ENET0_1588_TMR0/FB_CS5/FB_TSIZ1/FB_BE23_16_BLS15_8
PTC17/UART3_TX/ENET0_1588_TMR1/FB_CS4/FB_TSIZ0/FB_BE31_24_BLS7_0
PTC18/UART3_RTS/ENET0_1588_TMR2/FB_TBST/FB_CS2/FB_BE15_8_BLS23_16

P3V3_K64F
DNP 10.0K
DNP 10.0K

VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18
DAC0_OUT/CMP1_IN3/ADC0_SE23
USB0_DM
USB0_DP
RESET
EXTAL32
XTAL32
VREFH
VREFL
VREGIN

9
41
49
60
74
88

R86
R87

VDDA

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6

PTA0/JTAG_TCLK/SWD_CLK/EZP_CLK/UART0_CTS/UART0_COL/FTM0_CH5
PTA1/JTAG_TDI/EZP_DI/UART0_RX/FTM0_CH6
PTA2/JTAG_TDO/TRACE_SWO/EZP_DO/UART0_TX/FTM0_CH7
PTA3/JTAG_TMS/SWD_DIO/UART0_RTS/FTM0_CH0
PTA4/LLWU_P3/NMI/EZP_CS/FTM0_CH1
PTA5/USB_CLKIN/FTM0_CH2/RMII0_RXER/MII0_RXER/CMP2_OUT/I2S0_TX_BCLK/JTAG_TRST
PTA12/CMP2_IN0/CAN0_TX/FTM1_CH0/RMII0_RXD1/MII0_RXD1/I2C2_SCL/I2S0_TXD0/FTM1_QD_PHA
PTA13/LLWU_P4/CMP2_IN1/CAN0_RX/FTM1_CH1/RMII0_RXD0/MII0_RXD0/I2C2_SDA/I2S0_TX_FS/FTM1_QD_PHB
PTA14/SPI0_PCS0/UART0_TX/RMII0_CRS_DV/MII0_RXDV/I2C2_SCL/I2S0_RX_BCLK/I2S0_TXD1
PTA15/SPI0_SCK/UART0_RX/RMII0_TXEN/MII0_TXEN/I2S0_RXD0
PTA16/SPI0_SOUT/UART0_CTS/UART0_COL/RMII0_TXD0/MII0_TXD0/I2S0_RX_FS/I2S0_RXD1
PTA17/ADC1_SE17/SPI0_SIN/UART0_RTS/RMII0_TXD1/MII0_TXD1/I2S0_MCLK
PTA18/EXTAL0/FTM0_FLT2/FTM_CLKIN0
PTA19/XTAL0/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1

VSSA

34
35
36
37
38
39
42
43
44
45
46
47
50
51

VOUT33

93
94
95
96
97
98
99
100
1
2
3
4
5
6
7

SPI0_PCS0/FB_ALE
SPI0_SCK/FB_CS0_B
SPI0_SOUT/FB_AD4
SPI0_SIN/FB_AD3
PTD4/SPI0_PCS1/FB_AD2
PTD5/FTM0_CH5/FB_AD1
PTD6/FTM0_CH6/FB_AD0/FTM0_FLT0
PTD7(GPIO5_ELEV)/FTM0_FLT1

PTD0
PTD1
PTD2
PTD3
PTD4
PTD5
PTD6
PTD7

PTE0/SDHC0_D1/TRACE_CLKOUT
SDHC0_D0/TRACE_D3
SDHC0_DCLK/TRACE_D2
SDHC0_CMD/TRACE_D1
SDHC0_D3/TRACE_D0
PTE5/SDHC0_D2
PTE6

PTE0
PTE1
PTE2
PTE3
PTE4
PTE5
PTE6

31
32
33

PTD[0..7] pg(4,5)

PTE[0..6] pg(5)
C

PTE24 pg(4)
PTE25 pg(4)
PTE26 pg(2,4)

15
14

ADC0_DM1 pg(4)
ADC0_DP1 pg(4)

19
18

ADC0_DM0/ADC1_DM3 pg(4)
ADC0_DP0/AD1_DP3 pg(4)

17
16

ADC1_DM1 pg(4)
ADC1_DP1 pg(4)

21
20

ADC1_DM0/ADC0_DM3
ADC1_DP0/ADC0_DP3

26
27

pg(4)
pg(4)

ADC1_SE18 pg(4)
DAC0_OUT pg(4)

11
10
52

RST_TGTMCU_B

29

EXTAL32_RTC

28

XTAL32_RTC

R63

K64_MICRO_USB_DN pg(2)
K64_MICRO_USB_DP pg(2)
0 EXTAL_32.768KHz
C48

RST_TGTMCU_B pg(2,3,4,6)

12PF

DNP
Y3
32.768KHZ

R65
1.0M
DNP

VREFH
23
24
13
12

0 XTAL_32.768KHz

R62
VOUT33_K64

C44

12PF

TP12
DNP
C59
2.2uF

25

pg(6) PTA[12..17]

JTAG_TCLK/SWD_CLK/EZP_CLK
JTAG_TDI/EZP_DI
JTAG_TDO/TRACE_SWO/EZP_DO/FTM0_CH7
JTAG_TMS/SWD_DIO
NMI_B/EZP_CS_B
RMII0_RXER/MII0_RXER
RMII0_RXD1/MII0_RXD1
RMII0_RXD0/MII0_RXD0
RMII0_CRS_DV/MII0_RXDV
RMII0_TXEN/MII0_TXEN
RMII0_TXD0/MII0_TXD0
RMII0_TXD1/MII0_TXD1

C43
0.1UF

8
40
48
61
75
89

RMII_RXCLK pg(6)
U14

PTA0
PTA1
PTA2
PTA3
PTA4
PTA5
PTA12
PTA13
PTA14
PTA15
PTA16
PTA17

DNP

C49
0.1UF

C25
0.1UF

30

C27
0.1UF

VBAT

C42
0.1UF

22

C47
0.1UF

RMII_RXCLK

pg(3,4,6) PTA[0..5]

J23

0.1UF

ELECTRICAL PROTECTION
IS NOT PROVIDED.
USE IT AT YOUR OWN RISK

P3V3_K64F

HDR 1X2 TH

VBAT
C37

POPULATE THESE
PARTS FOR
USB HOST FUNCTIONALITY

330 OHM

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6

1
2

SHIELD_K64USB

P5V0_USB_CONN_VBUS

P5V_K64_USB

L5
1

J22
MICRO USB AB 5

MK64FN1M0VLL12

HDR 1X2 TH
P5V_K64_USB
1
2

J16
DNP
VREGIN_K64

DNP

C33
10uF

SWD CONNECTOR

R G B LED FEATURE

SHORTING HEADER ON BOTTOM LAYER

TP13

PTB22 R68

LEDRGB_RED

576

1
R

R88

130

LEDRGB_GREEN

LEDRGB_BLUE

R73

270

PTE26

P3V3

SWD_SDA_TGTMCU

pg(3) PTA3

D12
PTB22

Jumper is shorted by a cut-trace

on bottom layer. Cutting the trace
will effectively isolate the on-board
MCU from the OpenSDA
debug interface.

TP17

R71

270

PTB21

B
TP14
CLV1A-FKB-CJ1M1F1BB7R4S3

PTE26 pg(2,4)
PTB21

J9

P3V3_K64F
1
3
5
7
9

2
4
6
8
10

J11
HDR 1X2 TH
DNP
TRACE_SWO R80

1
2

PTA0
SWD_CLK_TGTMCU

pg(3)

0 PTA2 JTAG_TDO/TRACE_SWO/EZP_DO/FTM0_CH7

RST_TGTMCU_B pg(2,3,4,6)

HDR 2X5
ICAP Classification:
Drawing Title:

FCP: ___

FIUO: ___

PUBI: X

FRDM-K64F
Page Title:

K64F MCU

Size
C

Document Number

Date:

Friday, October 17, 2014

Rev
E3

SCH-28163 | PDF: SPF-28163

Sheet
1

of

OpenSDA Interface

RESET

P3V3_SDA
R14
10.0K

C8
0.1UF
1
C10

R26
10.0K

VDD1

TP3

A1

Y2

R25
8

VSSA
JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/PTA0/UART0_CTS/UART0_COL/FTM0_CH5
JTAG_TDI/EZP_DI/TSI0_CH2/PTA1/UART0_RX/FTM0_CH6
JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/PTA2/UART0_TX/FTM0_CH7
JTAG_TMS/SWD_DIO/TSI0_CH4/PTA3/UART0_RTS/FTM0_CH0
NMI/EZP_CS/TSI0_CH5/PTA4/FTM0_CH1/LLWU_P3

P3V3_SDA
P5V_SDA
11

C1
10uF

330 OHM

SDA_USB_CONN_DN

SDA_USB_CONN_DP

TC_SDA_USB_ID_TP

R22
R20

SDA_EXTAL
SDA_XTAL

S2
S4

TP9
TP10

10
9

SW2_STM151XX

17
18

Y1

C6
22PF
DNP

C9
22PF
DNP

J5
DNP
HDR 1X2 TH

SDA_SWD_OE_B
ADC0_SE8/TSI0_CH0/PTB0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA/LLWU_P5
ADC0_SE9/TSI0_CH6/PTB1/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB

C2
1000pF

ADC0_SE15/TSI0_CH14/PTC1/SPI0_PCS3/UART1_RTS/FTM0_CH0/I2S0_TXD0/LLWU_P6
ADC0_SE4B/CMP1_IN0/TSI0_CH15/PTC2/SPI0_PCS2/UART1_CTS/FTM0_CH1/I2S0_TX_FS
CMP1_IN1/PTC3/SPI0_PCS1/UART1_RX/FTM0_CH2/I2S0_TX_BCLK/LLWU_P7
PTC4/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT/LLWU_P8
PTC5/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUT/LLWU_P9
CMP0_IN0/PTC6/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLK/LLWU_P10
CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS

VSS1

R5
4.7K

22
23
24
25
26
27
28

SDA_SPI0_RST_B
TP6
SDA_SPI0_CS
TP1
UART1_TX_TGTMCU_R
UART1_RX_TGTMCU_R
SDA_SPI0_SCK
SDA_SPI0_SOUT
SDA_SPI0_SIN

SDA_RST_TGTMCU_J_B

R16
10.0K

VCCA
DIR

P3V3_SDA
R23
4.7K

R10

PTD4/SPI0_PCS1/UART0_RTS/FTM0_CH4/EWM_IN/LLWU_P14
ADC0_SE6B/PTD5/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/EWM_OUT
ADC0_SE7B/PTD6/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0/LLWU_P15
PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1

UART1_RX_TGTMCU_BUF

R24

TARGET MCU
INTERFACE
SIGNALS

RST_TGTMCU_B pg(2,4,6)

29
30
31
32

Isolation
Resistors

V_TGTMCU

VCCA
1A
2A
GND

VCCB
1B
2B
DIR

8
1
2
3

UART1_TX_TGTMCU_BUF

V_TGTMCU

POWER_EN
VTRG_FAULT_B

SWD_DIO_TGTMCU_BUF

U12
SDA_SWD_OE R33

0 SDA_SWD_OE_R

SDA_SPI0_SOUT

R8
4.7K
DNP

1
5
3

R39
10.0K

R38

VCCA
DIR

VCCB

B
GND

SWD_DIO_TGTMCU

J8
HDR 1X2 TH
DNP

V_TGTMCU

0 SDA_SWD_EN_R

1
5
3

10.0K

R12
4.7K

VCCA
DIR

VCCB

OPEN SDA
INPUT POWER
i path
P3V3_SDA

6
4

GND

3.3VDC, 10mA should be provided

to this rail (P3V3_SDA)
in order to power openSDA
module

74LVCH1T45

P5V_SDA

C16
0.1UF

10.0K
R34

P3V3_SDA

C19
18PF
DNP

R30
R21
10.0K

HDR 1X2 TH

PU/PD LOGIC (DIR PIN):

BUFFER IS TRISTATED WHEN
P3V3_SDA IS UNPOWERED

DNP

VIN
CSLEW
ENABLE

VOUT
FAULT

i path

GND

P3V3_SDA

SDA_VOUT33 can provide up to 120mA

of power at 3.3VDC to your system

MIC2005-0.8YM6
ACTIVE HIGH

P5V_TRG_SDA can provide up to 450mA

(per USB spec) of power at 5VDC
to your system

R35
10.0K
VTRG_FAULT_B

15K
POWER_EN

R29

1.0K

i path
V_TGTMCU SH1

0.1UF
HDR 2X5

SDA_SPI0_RST_B R18
SDA_SPI0_CS

SDA_SWD_EN

SDA_SWD_OE

DNP
R3

P5V_SDA_PSW

6
4

Note: You can power openSDA

with your own power supplies
by replacing this rail
(SDA_VOUT33)
with your 3.3V power supply rail

SHORTING HEADER ON BOTTOM LAYER

U11
1

MIC2005_CSLEW
5
VTRG_EN

J7

Jumper is shorted by a cut-trace

on bottom layer. Cutting the trace
will effectively isolate the on-board
MCU from the OpenSDA
debug interface.

P5V_SDA

Isolation and level shift stage

(for 1.8 to 5V compatibility)

i path

SDA_VOUT33
1
2

R19

R13

DNP

OPEN SDA
POWER OUTPUTS

P3V3_SDA

SDA_SPI0_SCK

PTA3 pg(2)
SWD_CLK_TGTMCU pg(2)

U2

(To enable 5v from

USB connector)

PTB17 pg(2)

HDR 1X2 TH
J12
DNP

SWD_CLK_TGTMCU_BUF

R37
4.7K

UART1_TX_TGTMCU

74LVCH1T45
R7
10.0K
DNP

SDA_SWD_EN

PWR SWITCH

Output to system
from Level shifter

P3V3_SDA

SDA_LED

SDA_USB_P5V_SENSE

PTB16 pg(2)

Output to system
from Level shifter

U10
7
6
5
4

UART1_TX_TGTMCU_R
SDA_SPI0_SIN

74LVC2T45GM,125

HW Designer: Rafael del Rey

MK20DX128VFM5

UART1_RX_TGTMCU

GND
74LVCH1T45

P5V_SDA

C18

V_TGTMCU

100

PU/PD LOGIC:
SERIAL INTERFACE
IS ALWAYS RESET
WHEN USB PORT
IS DISCONNECTED

SDA_JTAG_TMS
SDA_JTAG_TCLK
SDA_JTAG_TDO
SDA_JTAG_TDI
SDA_RST

R2
SDA_RST_LED

P3V3_SDA

R17
220

SDA_LED_R

LED GREEN

VCCB

P3V3_SDA

D2

EPAD

TP5

33

2
4
6
8
10

DNP

1
SDA_RX_EN 5

SDA_RST

J10

D1
C

V_TGTMCU

RESET

P5V_SDA

1
3
5
7
9

5
GND
OE
LVLRST_EN
P3V3_SDA
NTSX2102GU8H
J25
R4
4.7K
HDR_1X3
RST Push Button
Bypass

P3V3_SDA

330 OHM

P3V3_SDA

TP2

Output to system
from Level shifter

1
2

20
21

EXTAL32
XTAL32

UART1_RX_TGTMCU_R

OpenSDA INTERFACE JTAG CONNECTOR

R11
180K

TP_2102_B

U7
19

R6
10.0K

7
6

3
8.00MHZ

TC_EXTAL_TP
TC_XTAL_TP

1-2: Default.
2-3: Reset signal direct to the MCU,
to use when OpenSDA is not powered.
SW1
SW1_RST_B
1
2

SDA_RST_TGTMCU_B
C11
2.2UF

L2
1

EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0
XTAL0/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1
VREGIN
VOUT33
USB0_DM
USB0_DP

TP7
U1 U6 U4

B1
B2

R28
0
1

33 SDA_USB_DN
33 SDA_USB_DP

A1
A2

V_TGTMCU

C7

8 4.7uF 0.1UF

RED

P5V_SDA

6
5
4
3

SDA_SWD_OE

SDA_SWD_OE_B_R

VBAT

SDA_VOUT33

P5V0_SDA_USB_CONN_VBUS

DD+
ID

R27
10.0K

VCCB

1
2

J26
MICRO USB AB 5

5V

SDA_USBSHIELD

S1
S3

SDA_JTAG_TCLK
SDA_JTAG_TDI
SDA_JTAG_TDO
SDA_JTAG_TMS
SDA_SWD_EN_B

L1

12
13
14
15
16

SDA_SWD_EN

4
Y1
GND
NLX2G14
2

A2

P3V3_SDA

C23

VCCA

VCC

VDDA

1
2
3

TP_2102_A

U9
SDA_SWD_EN_B_R

0.1UF
7

U3

4.7uF

SDA_RST_TGTMCU_J_B

P3V3_SDA
P3V3_SDA

C12
1.0UF

V_TGTMCU

P3V3_SDA
C17

P3V3_SDA

U5

C15
10uF

1
2

1
2
3

I/O POWER
INPUT
P3V3
V_BRD is supported
from 1.8V to 5V
Power should be provided
to this rail for the logic
related to your platform I/O

DNP

{For enablement purposes only}

ICAP Classification:
Drawing Title:

FCP: ___

FIUO: ___

PUBI: X

FRDM-K64F
Page Title:

Open SDA
Size
D

Document Number

Rev
E3

SCH-28163 | PDF: SPF-28163

Date:
5

Friday, October 17, 2014

1

Sheet

of

I2C INERTIAL SENSOR

P3V3

( ACCELEROMETER AND MAGNETOMETER )

J20
DNP
HDR 1X2 TH

P3V3_K64F
P3V3

P3V3
D

P5-9V_VIN P5V_SDA_PSW P5V_K64_USB

SHORTING HEADER
ON BOTTOM LAYER

TAB

J18
HDR 1X2
DNP

DFLS130L-7

C51
10uF

pg(2,4) PTE24

I2C0_SCL

pg(2,4) PTE25

I2C0_SDA

2
1

J19

P3V3_SDA

20mOhm Resistor
in layout
HDR 1X2 TH
DNP
SHORTING HEADER
ON BOTTOM LAYER

R61
0
DNP

FXOS8700CQ_I2C_SA0

FXOS8700CQ_I2C_SA1

10

MMA8451_BYP

TP4

2
15

pg(2)
pg(2)
pg(2)
pg(2)
pg(2)
pg(2)
pg(2)
pg(2)

ARDUINO COMPATIBLE HEADERS

PTC16
PTC17
PTB9
PTA1
PTB23
PTA2
PTC2
PTC3

TP8

SA1/CS

RSVD1

NC_15

RSVD2

16
14
12
10
8
6
4
2

20
18
16
14
12
10
8
6
4
2

C13
0.1UF

FXOS8700CQ

FXOS8700CQ_I2C_SA1

33

R1
10.0K
DNP

SW2
2

PTA4 pg(2)

C55
0.1UF
DNP

PTC6

PTC6 pg(2,4)

C56
0.1UF

SW2_STM151XX

1
3
5
7
9
11
OUT

J4
SAMTEC
ESQ-106-23-T-D
2
4
6
8
10
12

1
2
3

IN
J3
CON_2X8
P5-9V_VIN

DEBUG GROUND HOOK

2.2UF
P5V_OPT_VR

C50 C52 C54

CON_2X6

10uF 10uF 10uF

DNP DNP DNP

P5-9V_VIN
P5V_USB

PTA4

5VDC VR
SUPPORT
J27
DNP
HDR_1X3

P3V3

SW2_STM151XX

2
4
6
8
10
12
14
16

C40
pg(2,3,6) RST_TGTMCU_B

P3V3

R75
10.0K

P5V_K64_USB

D7

INTERRUPTS

SW3

1
3
5
7
9
11
13
15

P3V3

SAMTEC
ESQ-108-23-T-D

SAMTEC
ESQ-108-23-T-D

TP11

P3V3

CAD NOTE:
For routing Feasibility
We can swap between the
Diff pairs ADC0* & ADC1*

13

R43
10.0K

DAC_OUT
CMP_OUT
DIFF_ADC1_DM
DIFF_ADC1_DP
DIFF_ADC0_DM
DIFF_ADC0_DP

pg(2) DAC0_OUT
pg(2,4) PTB20
pg(2) ADC1_DM1
pg(2) ADC1_DP1
pg(2) ADC0_DM1
pg(2) ADC0_DP1

D13
C
DNP
DFLS130L-7

TP16

DNP

A
C53
10uF
DNP

IF YOUR 5V LDO
HAS BACKFEED PROTECTION
JUST SHUNT
THIS DIODE FOOTPRINT

FXOS8700CQ_I2C_SA0

I2S_RXD
I2S_RX_FS
SOF_OUT
I2S_RX_BCLK
I2S_MCLK
I2S_TXD
I2S_TX_FS
I2S_TX_BCLK

pg(2) PTC5
pg(2) PTC7
pg(2) PTC0
pg(2) PTC9
pg(2) PTC8
pg(2) PTC1
pg(2) PTB19
pg(2) PTB18

pg(2)
pg(2)
pg(2)
pg(2)
pg(2)
pg(2)

PTC13 pg(2)

16

R79

pg(2) PTE26

P5V_USB

PTC6 pg(2,4)

PTC13
FXOS8700CQ_CRST

I2S_MCLK

15
13
11
9
7
5
3
1

SKT_2x10

pg(2) ADC0_DM0/ADC1_DM3
pg(2) ADC0_DP0/AD1_DP3

P5V_USB

R40
10.0K
DNP
J1
CON_2X8

19
17
15
13
11
9
7
5
3
1

J2
SAMTEC
ESQ-110-23-T-D

pg(2) ADC1_DM0/ADC0_DM3
pg(2) ADC1_DP0/ADC0_DP3

DFLS130L-7

PTC6

Default I2C Slave Address:

0011101 (0x1D)

pg(2) ADC1_SE18

D5

RST

BYP

P3V3

GND

DFLS130L-7

CRST

11

R31
10.0K
DNP

pg(2) AREF
pg(2,4) PTE25
pg(2,4) PTE24

P5V_SDA_PSW

INT2

R32
10.0K

pg(2,5)
PTC12
pg(2) PTC4
pg(2) PTD0
pg(2) PTD2
pg(2) PTD3
pg(2) PTD1

INT1

SA0/MISO

P3V3

C5
4.7uF

U8

SDA/MOSI

C3
0.1UF

SCL/SCLK

R15
4.7K

14

R9
4.7K

VDD

VDDIO

D11
P3V3_VREG

VOUT

GND2

C41
10uF

VIN

GND1

P5-9V_VIN_VR 3

DFLS130L-7

2
1

C4
0.1UF

12

U17
NCP1117ST33T3G

DFLS130L-7

DFLS130L-7

C14
0.1UF

P3V3

D8

GND

D6

D10

D9
DFLS130L-7
C

CON PWR 3
DNP

DC_JACK

1
3
2

J24

1
2

ICAP Classification:
Drawing Title:

FCP: ___

FIUO: ___

PUBI: X

FRDM-K64F

PTB2
PTB3
PTB10
PTB11
PTC11
PTC10

Page Title:

ARDUINO SHIELDS & COMBO SENSOR

Size
C

Document Number

Date:

Friday, October 17, 2014

Rev
E3

SCH-28163 | PDF: SPF-28163

Sheet
1

of

PTE2

SDHC0_DCLK

PTE1
PTE0

DAT2
CD/DAT3
CMD
VDD
CLK
VSS
DAT0
DAT1

CON microSD

PTE6

pg(2) PTE6

SD Card

J15
P1
P2
P3
P4
P5
P6
P7
P8

S1
S2
S3
S4

SDHC0_D2
SDHC0_D3
SDHC0_CMD

SWITCH

PTE5
PTE4
PTE3

G1

C32
0.1UF

pg(2) PTE[0..5]

SD_CARD SECTION

C30
10uF
DNP

S1
S2
S3
S4

P3V3

SD_CARD_DETECT

Detect pin is a normally open switch

that shorts with VDD when card is inserted.
(positive logic)

RF/WIFI
pg(2,4) PTB20
pg(2) PTD5
pg(2) PTD7

CE
SCK
MISO

Bluetooth
P3V3

J6
1
3
5
7

2
4
6
8

P3V3
CS
MOSI
IRQ

PTD4 pg(2)
PTD6 pg(2)
PTC18 pg(2)
pg(2) PTC14
pg(2) PTC15

HDR_2X4
C57
DNP
0.1UF

PTC14
PTC15

BT_TX
BT_RX

K64F_UART4_RX
K64F_UART4_TX

C58
0.1UF

J199
1
2
3
4
CON_1X4
DNP

Add-on WIFI module: RF24L01+ - Nordic 2.4G Radio

Add-on BT module: JY-MCU BT BOARD V1.05 BT

ICAP Classification:
Drawing Title:

FCP: ___

FIUO: ___

PUBI: X

FRDM-K64F
Page Title:

SD CARD / RF - WIFI / BLUETOOTH

Size
C

Document Number

Date:

Friday, October 17, 2014

Rev
E3

SCH-28163 | PDF: SPF-28163

Sheet
1

of

J17
HDR 1X2 DNP

P3V3

VDDIO_ENET

L3
120OHM
2

VDDA_ENET

P3V3

VDDPLL_1.2V

DNP

VDDIO_ENET

2
1

LAYOUT NOTES:
1. The TRD+/TRD- pairs should be routed with a 100ohm
differential impedance and a 50ohm single ended
(characteristic) impedance.
2. The trace lengths within a TRD+/TRD- differential pair
should be matched.
3. The distance between each TRD+/TRD- differential
pair should be 50mils or more.

VDDIO_ENET
0 R42
C21

C22

C24

C26

C28

0.1UF

1.0 UF

R60
R55
1.5K
DNP

4.7UF 0.1UF 0.1UF

RMII0_RXD_0
RMII0_RXD_1
RMII0_CRS_DV

pg(2,6) PTA13
pg(2,6) PTA12
pg(2,6) PTA14

pg(2,6) PTB1
pg(2,6) PTB0
DNP
R70
10.0K

DNP
R67
10.0K

RMII0_MDC

11

RMII0_MDIO

10

DNP
R69
10.0K
R57

pg(2) RMII_RXCLK

33

RMII_XTALI

RMII_XTALO

7
16

RXCLK

VDD_1V2
MDC

14

U13

VDDIO

RMII0_MDIO
RMII0_MDC

pg(2,6) PTB0
pg(2,6) PTB1

C39
0.1UF

VDDA_3V3

R56
1.5K
DNP

RXP
RXM

MDIO
XI

TXD0
TXD1

XO

TXEN

REF_CLK

RXD0
RXD1

VDDIO_ENET
24

RMII0_TXD_0
RMII0_TXD_1
RMII0_TXEN

pg(2,6) PTA16
pg(2,6) PTA17
pg(2,6) PTA15

10.0K

LED0/ANEN_SPEED
CRS_RV/PHYAD1/PHYAD0

C34

RMII0_INT_B

18

MCU can drive the Pullup

required by this signal

INTRP

REXT

6
5

ENET1_TX+
ENET1_TX-

4
3

ENET1_RX+
ENET1_RX-

20
21

RMII0_TXD_0
RMII0_TXD_1

19

RMII0_TXEN

PTA16 pg(2,6)
PTA17 pg(2,6)
33

13
12

RMII0_RXD_0
RMII0_RXD_1

17

RMII0_RXER

23
15
9

4
3
2
1

RXD0
RXD1

PTA15 pg(2,6)
5
6
7
8

PTA13
PTA12
PTA5
PTA14

PTA13 pg(2,6)
PTA12 pg(2,6)
PTA5 pg(2,6)
PTA14 pg(2,6)

RN1

LED1/SPEED
CRS_DV

RMII0_CRS_DV
REXT

KSZ8081RNACA

22
25

RMII0_RXER
R45

BAT54AWT1G
D3
1

PHY_RST_B

pg(2,3,4) RST_TGTMCU_B

RST

R50

10UF
pg(2,6) PTA5

RXER

GND1
GND2

TXP
TXM

J14

PHY_INT_1

2
1

RMII0_INT_B
CPU_PER_1_RST_B

R47
0
DNP

HDR 1X2
DNP

PHY_RST_B
REXT

PHY_RESET_B must be a GPIO

toggeld after CLKIN is active.

R58
6.49K

C38
100PF

Y2
RMII_XTALI

1
C35
24PF

3
25MHZ

RMII_XTALO

C29
24PF

VDDA_ENET

R81
0
DNP
R83

R82
0
DNP

J13

0
1:1

ENET1_TX+

ENET1_TX-

TD-_R2

TCT_R3

C1_TX+

TD+_R1

C2_TX75 OHMS

75 OHMS

C4
C5

1:1

ENET1_RX+
R48
49.9
DNP

C3_RX+

RD+_R7

R44
49.9
DNP
C6_RX-

ENET1_RX-

RD-_R8

RCT_R6

ENET_1_TX_RDIV
ENET1_RCT

75 OHMS

C7

VDDIO_ENET

CAD NOTE:
PLEASE ROUT TX/RX-+ SIGNALS
STRAIGHTFORWARD AND AVOID
T-STUBS ON RESISTOR PAD
INTERCONNECTION

R59
49.9
DNP

C61
0.1UF

C60
0.1UF

NC_5

14

L4

13

L3

+
+

10

R36

L2

12

L1

11

R76
100

ENET_1_RX_RDIV
LED1/SPEED

1000pF

100

LED2_LINK

S1

R51
49.9
DNP

C8

NC_4

S2

4
5

C31
0.1UF
DNP

75 OHMS

ICAP Classification:
Drawing Title:
RJ45

FCP: ___

FIUO: ___

PUBI: X

FRDM-K64F
Page Title:

C36
0.1UF
DNP

VDDIO_ENET

RMII

Size
C

Document Number

Date:

Friday, October 17, 2014

Rev
E3

SCH-28163 | PDF: SPF-28163

Sheet
1

of