Electronic Devices and Circuits - Final Exam

An exam ticket consists on: two problems, one normal subject and three short subjects.
The exam will take place in room N-II-1, at 15:00 on Tuesday, June 13, 2016.
Q&A Monday, June 12 at 16:00 in room N-II-1 (or N-III-6, lab).

1.1

PROBLEMS:

1. Voltage and current divider;

2. RC transient response;
3. Diode limiters;
4. C filter diode rectifier;
5. Zener shunt voltage regulator;
6. DC analysis of BJT circuits;
7. Relay command circuit with BJT;
8. BJT Bias circuits analysis and design;
9. Two transistors bias circuit;
10. Common emitter (CE) amplifier
---------------------------------------------------11. Common collector amplifier (emitter follower);
12. Class B output stage;
13. BJT thermal analysis;
14. The Op Amp inverting and non-inverting amplifier,
15. The differential amplifier;
16. Current source with BJT;
17. The voltage regulator with emitter follower and Zener diode.
18. Common Source MOS amplifier;
19. Bias network for MOS transistor;

1.2
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7.
8.

The diode: main characteristic, symbol, the exponential diode, diode models;
Diode rectifiers without filters and capacitive input filters for diode rectifiers;
The physical basis of transistor operation and equivalent circuit models.
BJTs ac equivalent circuits and the simplified ac models;
---------------------------------------------------Class B output stage circuit operation, power conv. efficiency and power dissipation;
The voltage regulators parameters and the series voltage regulator;
Enhancement MOS-FETs: structure, physical operation and equations in linear, triode and
saturation regimes;
The negative feedback definition, structure, basic equation and negative feedback
properties; the series mixing - voltage sampling topology;

1.3
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6.

NORMAL SUBJECTS:

SHORT SUBJECTS:

Ideal independent sources and their suppression;

Resistors in series and voltage divider;
Thvenin and Norton equivalent circuits;
Diode limiters;
Zener diode: symbol, equivalent circuits;
Zener shunt voltage regulator;
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7. BJT definitions, symbols and modes of operation;

8. The transistor inverter;
9. The superposition theorem for ac-dc circuits;
10. Base bias for BJTs;
11. Voltage divider bias for BJTs;
12. The voltage amplifier model;
13. The common emitter amplifier parameters;
14. The emitter follower parameters;
---------------------------------------------------15. Power amplifiers: classification of output stages;
16. Biasing the class AB output stage;
17. Single power supply operation for class B output stage;
18. Thermal resistances of BJTs;
19. The extended hybrid- model of BJT;
20. The h-parameters model of BJTs;
21. The ideal OpAmp and the inverting configuration;
22. The differential amplifier structure and operation;
23. The differential gain of the differential amplifier;
24. The current mirror;
25. The standard discrete current source;
26. The Zener diode and emitter follower voltage regulator;
27. Biasing the enhancement MOS-FET;
28. Small signal operation of FETs;
29. Gain desensitivity a property of negative feedback;
30. The input impedance of the series mixing topology;
31. Thyristors, general presentation, SCR turn on and turn off.
Observaii:

Consultaii: luni, 12.06 ora 16, sala N-II-1 (sau N-III-6);

Examen: mari, 12.06 ora 15, sala N-II-1.
Linia punctata delimiteaza subiectele de la parial de celelalte. Biletul va
conine un subiect (problem i teorie) din prima parte i un altul din partea a doua.
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