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# No.

## of Printed Pages 3 GEC-101

Roll No.

M. TECH.
FIRST SEMESTER EXAMINATION, 2014-15
SEMICONDUCTOR DEVICE MODELING AND
CIRCUIT SIMULATION

## Time : 3 Hours Max. Marks : 100

Note : (i) Attempt ALL questions.
(ii) Choices are given in each question set.

## 1. Attempt any Four of the following questions: 5 x 4 = 20

(a) What do you understand by Space Lattice? List the name of
Fundamental Crystal System.
(b) At 300K, the lattice constant for Si is 0.543nm, calculate the number
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of Si atoms/m .
(c) Why Si semiconductor is preferred over Ge for designing a p-n
(d) Draw the band diagram of a p-n junction diode when it is in
equilibrium, forward bias and reverse bias.
(e) If one assumes a fixed and equal high forward current in both Si and
Ge diodes, which diode is expected to suffer from the series
resistance mostly? Explain.
(f) Differentiate between i) Direct and Indirect type semiconductors,
ii) algebraic statement of low-level injection & High level injection.

## 2. Attempt any Four of the following questions: 5 x 4 = 20

(a) What do you know about second order effects in BJT? Give brief

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GEC-101 GEC-101
(b) The current flowing in a certain PN junction at room temperature is (b) Explain the sub-threshold slope for a MOSFET and determine
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2 x 10 A, when a large reverse bias voltage is applied. Calculate formula for the same. Also derive the equation for minimum sub-
the current when a forward voltage of 0.1V is applied across the threshold slope.
junction. (c) An N-channel MOSFET is operated with its source and body
(c) Explain the impact of base width modulation and kirk effect on the terminals grounded, and 1V applied to the gate terminal. Determine
performance of BJT. the drain current for applied drain potential=0.2V and 5V. Also,
(d) What is the Early effect? How is it considered in the mathematical determine the bias to be applied to the body terminal which would
make the drain current=0. VTNO=0.7V, KN'=40A/V , =0.4V ,
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model for the collector current of a BJT that is biased in the forward-
active region? 2F=0.6V, W=10m, L=1m. Use Level-0 model.
(e) What is channel length modulation effect? How the voltage current
characteristics are affected because of this effect? 5. Attempt any Two of the following questions: 10 x 2 = 20
(f) What is the latch up problem that arises in bulk CMOS technology? (a) What is small signal model of an MOSFET? Describe the topology
How is it overcome? of a small-signal equivalent circuit model of the MOSFET at high
frequency.
3. Attempt any Two of the following questions: 10 x 2 = 20
(b) Write short note on the following:
(a) Derive the model equation for the Eber Moll's level-1, level-2 and
(i) What are the objectives of simulation?
level-3 model of BJT. Also mention limitations of each level.
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(ii) Various simulator commercially available.
(b) Describe the Gummel-Poon model of a p -n-p BJT in detail. Also
(iii) Limitation of simulation.
explain the components of base charge.
(iv) MOSFET geometry in SPICE.
(c) Describe the procedure to extract the following model parameters of
(c) What do you know about logic and timing simulation? Explain in
an npn-BJT. Do not calculate anything. Explain your reasoning
detail with suitable diagram.
using I-V plots.
(i) Reverse saturation current IS.
(ii) Reverse current gain RM.
(iii) Bulk collector ohmic resistor rC.
(iv) Reverse knee current IKR.

## 4. Attempt any Two of the following questions: 10 x 2 = 20

(a) What is parasitic capacitance in MOS? Discuss nMOS characteristic
and features with suitable diagram.
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