Geh6421 Vol II MK6 Control System Guide Volume 2

GE Energy
Mark* VI Control
System Guide, Volume II
GEH-6421Q
These instructions do not purport to cover all details or variations in equipment, nor
to provide for every possible contingency to be met during installation, operation,
and maintenance. The information is supplied for informational purposes only,
and GE makes no warranty as to the accuracy of the information included herein.
Changes, modifications and/or improvements to equipment and specifications are made
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Contents
I/O Overview 1-1

Terminal Board Summary .................................................................................................................................................1-3
Terminal Board Terminal Block Features ..................................................................................................................1-3
Terminal Board Disconnect Switch (TBSW) .............................................................................................................1-3
Relay Board Summary.......................................................................................................................................................1-6
Trip Terminal Board Summary..........................................................................................................................................1-7
Simplex DIN-Rail Mounted Terminal Board Summary....................................................................................................1-8
Grounding.................................................................................................................................................................1-10
UCV Controller 2-1
UCV Controller .................................................................................................................................................................2-1
Operation ....................................................................................................................................................................2-1
Controller Versions.....................................................................................................................................................2-1
Diagnostics .................................................................................................................................................................2-2
Installation ..................................................................................................................................................................2-2
UCVG Controller ..............................................................................................................................................................2-3
Specifications..............................................................................................................................................................2-6
UCVF Controller ...............................................................................................................................................................2-7
Specifications..............................................................................................................................................................2-8
UCVE Controllers .............................................................................................................................................................2-9
UCVE Controller Specifications ..............................................................................................................................2-10
UCVEM01 Controller Specifications.......................................................................................................................2-11
UCVD Controller ............................................................................................................................................................2-16
Specifications............................................................................................................................................................2-17
UCVB Controller.............................................................................................................................................................2-18
Specifications............................................................................................................................................................2-19
Alarms ......................................................................................................................................................................2-20
UCV Board UCVD Controller Runtime Errors ..............................................................................................................2-22
Analog Input/Output (VAIC) 3-1
VAIC Analog Input/Output ...............................................................................................................................................3-1
Functional Description ...............................................................................................................................................3-1
Installation ..................................................................................................................................................................3-2
Operation ....................................................................................................................................................................3-3
Compressor Stall Detection........................................................................................................................................3-5
Specifications..............................................................................................................................................................3-9
Diagnostics ...............................................................................................................................................................3-10
Configuration............................................................................................................................................................3-11
Alarms ......................................................................................................................................................................3-14
TBAI Analog Input/Output .............................................................................................................................................3-16
Functional Description .............................................................................................................................................3-16
Installation ................................................................................................................................................................3-18
Operation ..................................................................................................................................................................3-20
GEH-6421Q System Guide, Volume II Contents i

Specifications............................................................................................................................................................3-23
Diagnostics ...............................................................................................................................................................3-23
Configuration............................................................................................................................................................3-23
DTAI Simplex Analog Input/Output ...............................................................................................................................3-24
Installation ................................................................................................................................................................3-24
Operation ..................................................................................................................................................................3-26
Specifications............................................................................................................................................................3-27
Diagnostics ...............................................................................................................................................................3-27
Configuration............................................................................................................................................................3-27
Acoustic Monitoring (VAMA) 4-1
VAMA Acoustic Monitoring .............................................................................................................................................4-1
Installation ..................................................................................................................................................................4-1
Operation ....................................................................................................................................................................4-2
Functions ....................................................................................................................................................................4-6
Specification .............................................................................................................................................................4-10
Diagnostics ...............................................................................................................................................................4-10
Configuration............................................................................................................................................................4-11
Alarms ......................................................................................................................................................................4-13
DDPT Simplex Dynamic Pressure Transducer Input ......................................................................................................4-18
Installation ................................................................................................................................................................4-18
Operation ..................................................................................................................................................................4-20
Specifications............................................................................................................................................................4-22
Diagnostics ...............................................................................................................................................................4-22
Configuration............................................................................................................................................................4-22
Acoustic Monitoring Input (VAMB) 5-1
VAMB Acoustic Monitoring .............................................................................................................................................5-1
Installation ..................................................................................................................................................................5-3
Operation ....................................................................................................................................................................5-9
Specifications............................................................................................................................................................5-12
Diagnostics ...............................................................................................................................................................5-13
Configuration............................................................................................................................................................5-14
Alarms ......................................................................................................................................................................5-19
Analog Output (VAOC) 6-1
VAOC Analog Input ..........................................................................................................................................................6-1
Installation ..................................................................................................................................................................6-2
Operation ....................................................................................................................................................................6-3
Specifications..............................................................................................................................................................6-4
Diagnostics .................................................................................................................................................................6-4
Configuration..............................................................................................................................................................6-5
Alarms ........................................................................................................................................................................6-6
TBAO Analog Output .......................................................................................................................................................6-7
Installation ..................................................................................................................................................................6-8
Operation ..................................................................................................................................................................6-10
ii Contents GEH-6421Q Mark* VI Control

Specifications............................................................................................................................................................6-12
Diagnostics ...............................................................................................................................................................6-12
Configuration............................................................................................................................................................6-12
DTAO Simplex Analog Output .......................................................................................................................................6-13
Installation ................................................................................................................................................................6-13
Operation ..................................................................................................................................................................6-15
Diagnostics ...............................................................................................................................................................6-16
Configuration............................................................................................................................................................6-16
Discrete Input/Output (VCCC/VCRC) 7-1
VCCC/VCRC Discrete Input/Output ................................................................................................................................7-1
Installation ..................................................................................................................................................................7-2
Operation ....................................................................................................................................................................7-3
Specifications..............................................................................................................................................................7-5
Diagnostics .................................................................................................................................................................7-6
Configuration..............................................................................................................................................................7-7
Alarms ........................................................................................................................................................................7-8
TBCI Contact Input with Group Isolation .......................................................................................................................7-10
Installation ................................................................................................................................................................7-11
Operation ..................................................................................................................................................................7-13
Specifications............................................................................................................................................................7-14
Diagnostics ...............................................................................................................................................................7-14
Configuration............................................................................................................................................................7-14
TICI Contact Input with Point Isolation ..........................................................................................................................7-15
Installation ................................................................................................................................................................7-15
Operation ..................................................................................................................................................................7-17
Specifications............................................................................................................................................................7-19
Diagnostics ...............................................................................................................................................................7-19
Configuration............................................................................................................................................................7-19
DTCI Simplex Contact Input with Group Isolation ........................................................................................................7-20
Installation ................................................................................................................................................................7-20
Operation ..................................................................................................................................................................7-22
Specifications............................................................................................................................................................7-23
Diagnostics ...............................................................................................................................................................7-23
Configuration............................................................................................................................................................7-23
TRLYH1B Relay Output with Coil Sensing ...................................................................................................................7-24
Installation ................................................................................................................................................................7-26
Operation ..................................................................................................................................................................7-27
Specifications............................................................................................................................................................7-29
Diagnostics ...............................................................................................................................................................7-30
Configuration............................................................................................................................................................7-30
TRLYH1C Relay Output with Contact Sensing ..............................................................................................................7-31
Installation ................................................................................................................................................................7-33
Operation ..................................................................................................................................................................7-34
Specifications............................................................................................................................................................7-36
GEH-6421Q System Guide, Volume II Contents iii

Diagnostics ...............................................................................................................................................................7-37
Configuration............................................................................................................................................................7-37
TRLYH1D Relay Output with Solenoid Integrity Sensing .............................................................................................7-38
Installation ................................................................................................................................................................7-40
Operation ..................................................................................................................................................................7-41
Specifications............................................................................................................................................................7-43
Diagnostics ...............................................................................................................................................................7-43
Configuration............................................................................................................................................................7-43
TRLYH1E Solid-State Relay Output...............................................................................................................................7-44
Installation ................................................................................................................................................................7-46
Operation ..................................................................................................................................................................7-47
Specifications............................................................................................................................................................7-51
Diagnostics ...............................................................................................................................................................7-52
Configuration............................................................................................................................................................7-52
TRLYH1F Relay Output with TMR Contact Voting.......................................................................................................7-53
Installation ................................................................................................................................................................7-55
Operation ..................................................................................................................................................................7-58
Specifications............................................................................................................................................................7-61
Diagnostics ...............................................................................................................................................................7-62
Configuration............................................................................................................................................................7-62
DRLY Simplex Relay Output ..........................................................................................................................................7-63
Installation ................................................................................................................................................................7-63
Operation ..................................................................................................................................................................7-65
DRLYH1A Specifications ........................................................................................................................................7-65
DRLYH1B Specifications ........................................................................................................................................7-66
Diagnostics ...............................................................................................................................................................7-66
Configuration............................................................................................................................................................7-66
Bus Master Controller (VCMI) 8-1
VCMI Bus Master Controller ............................................................................................................................................8-1
Specifications..............................................................................................................................................................8-6
Diagnostics .................................................................................................................................................................8-6
Configuration..............................................................................................................................................................8-7
Alarms ........................................................................................................................................................................8-9
Generator Monitor and Trip (VGEN) 9-1
VGEN Generator Monitor and Trip ..................................................................................................................................9-1
Installation ..................................................................................................................................................................9-2
Operation ....................................................................................................................................................................9-3
Specifications..............................................................................................................................................................9-5
Diagnostics .................................................................................................................................................................9-6
Configuration..............................................................................................................................................................9-6
Alarms ......................................................................................................................................................................9-10
TGEN Generator Monitor ...............................................................................................................................................9-12
Installation ................................................................................................................................................................9-13
iv Contents GEH-6421Q Mark* VI Control

Operation ..................................................................................................................................................................9-14
Specifications............................................................................................................................................................9-15
Diagnostics ...............................................................................................................................................................9-16
Configuration............................................................................................................................................................9-16
TRLYH1B Relay Output with Coil Sensing ...................................................................................................................9-17
Installation ................................................................................................................................................................9-19
Operation ..................................................................................................................................................................9-20
Specifications............................................................................................................................................................9-22
Diagnostics ...............................................................................................................................................................9-23
Configuration............................................................................................................................................................9-23
TRLYH1F Relay Output with TMR Contact Voting.......................................................................................................9-24
Installation ................................................................................................................................................................9-26
Operation ..................................................................................................................................................................9-29
Specifications............................................................................................................................................................9-32
Diagnostics ...............................................................................................................................................................9-33
Turbine Protection Board (VPRO) 10-1
VPRO Emergency Turbine Protection ............................................................................................................................10-1
Installation ................................................................................................................................................................10-4
Operation ..................................................................................................................................................................10-4
Specifications............................................................................................................................................................10-8
Diagnostics ...............................................................................................................................................................10-9
Configuration..........................................................................................................................................................10-10
Alarms ....................................................................................................................................................................10-16
TPROH1B Emergency Protection.................................................................................................................................10-21
Functional Description ...........................................................................................................................................10-21
Installation ..............................................................................................................................................................10-24
Operation ................................................................................................................................................................10-25
Specifications..........................................................................................................................................................10-27
Diagnostics .............................................................................................................................................................10-28
Configuration..........................................................................................................................................................10-28
TREG Turbine Emergency Trip ....................................................................................................................................10-29
Installation ..............................................................................................................................................................10-31
Operation ................................................................................................................................................................10-32
Specifications..........................................................................................................................................................10-34
Diagnostics .............................................................................................................................................................10-35
Configuration..........................................................................................................................................................10-35
TRES Turbine Emergency Trip .....................................................................................................................................10-36
Installation ..............................................................................................................................................................10-36
Operation ................................................................................................................................................................10-38
Specifications..........................................................................................................................................................10-40
Diagnostics .............................................................................................................................................................10-40
Configuration..........................................................................................................................................................10-40
TREL Turbine Emergency Trip.....................................................................................................................................10-41
Installation ..............................................................................................................................................................10-41
Operation ................................................................................................................................................................10-43
GEH-6421Q System Guide, Volume II Contents v

Specifications..........................................................................................................................................................10-45
Diagnostics .............................................................................................................................................................10-45
Configuration..........................................................................................................................................................10-45
Pyrometer Board (VPYR) 11-1
VPYR Pyrometer Input ...................................................................................................................................................11-1
Installation ................................................................................................................................................................11-2
Operation ..................................................................................................................................................................11-2
Specifications..........................................................................................................................................................11-13
Diagnostics .............................................................................................................................................................11-13
Configuration..........................................................................................................................................................11-14
Alarms ....................................................................................................................................................................11-17
TPYR Pyrometer Input..................................................................................................................................................11-18
Installation ..............................................................................................................................................................11-19
Operation ................................................................................................................................................................11-20
Specifications..........................................................................................................................................................11-21
Diagnostics .............................................................................................................................................................11-22
Configuration..........................................................................................................................................................11-22
RTD Input (VRTD) 12-1
VRTD RTD Input ............................................................................................................................................................12-1
Installation ................................................................................................................................................................12-2
Operation ..................................................................................................................................................................12-3
Specifications............................................................................................................................................................12-5
Diagnostics ...............................................................................................................................................................12-7
Configuration............................................................................................................................................................12-8
Alarms ....................................................................................................................................................................12-10
TRTD RTD Input...........................................................................................................................................................12-12
Installation ..............................................................................................................................................................12-14
Operation ................................................................................................................................................................12-16
Specifications..........................................................................................................................................................12-18
Diagnostics .............................................................................................................................................................12-20
Configuration..........................................................................................................................................................12-20
DRTD Simplex RTD Input ............................................................................................................................................12-21
Installation ..............................................................................................................................................................12-21
Operation ................................................................................................................................................................12-23
Specifications..........................................................................................................................................................12-24
Diagnostics .............................................................................................................................................................12-25
Configuration..........................................................................................................................................................12-25
Servo Control (VSVA) 13-1
VSVA Servo Control .......................................................................................................................................................13-1
Installation ................................................................................................................................................................13-3
Operation ..................................................................................................................................................................13-5
Specifications..........................................................................................................................................................13-22
Diagnostics .............................................................................................................................................................13-22
vi Contents GEH-6421Q Mark* VI Control

Configuration..........................................................................................................................................................13-23
Alarms ....................................................................................................................................................................13-29
Serial Communication Input/Output (VSCA) 14-1
VSCA Serial Communication Input/Output....................................................................................................................14-1
Installation ................................................................................................................................................................14-1
Operation ..................................................................................................................................................................14-2
Specifications............................................................................................................................................................14-5
Diagnostics ...............................................................................................................................................................14-6
Configuration............................................................................................................................................................14-6
Alarms ....................................................................................................................................................................14-10
DSCB Simplex Serial Communication Input/Output....................................................................................................14-12
Installation ..............................................................................................................................................................14-12
Operation ................................................................................................................................................................14-14
Specifications..........................................................................................................................................................14-15
Diagnostics .............................................................................................................................................................14-15
Configuration..........................................................................................................................................................14-15
DPWA Transducer Power Distribution .........................................................................................................................14-16
Installation ..............................................................................................................................................................14-16
Operation ................................................................................................................................................................14-18
Specifications..........................................................................................................................................................14-19
Diagnostics .............................................................................................................................................................14-19
Configuration..........................................................................................................................................................14-19
Servo Control (VSVO) 15-1
VSVO Servo Control.......................................................................................................................................................15-1
Installation ................................................................................................................................................................15-2
Operation ..................................................................................................................................................................15-2
Specifications..........................................................................................................................................................15-30
Diagnostics .............................................................................................................................................................15-31
Configuration..........................................................................................................................................................15-32
Alarms ....................................................................................................................................................................15-37
TSVO Servo Input/Output.............................................................................................................................................15-39
Installation ..............................................................................................................................................................15-40
Operation ................................................................................................................................................................15-41
Specifications..........................................................................................................................................................15-46
Diagnostics .............................................................................................................................................................15-46
Configuration..........................................................................................................................................................15-46
DSVO Simplex Servo Input/Output ..............................................................................................................................15-47
Installation ..............................................................................................................................................................15-47
Operation ................................................................................................................................................................15-50
Specifications..........................................................................................................................................................15-52
Diagnostics .............................................................................................................................................................15-53
Configuration..........................................................................................................................................................15-53
Thermocouple Input (VTCC) 16-1
GEH-6421Q System Guide, Volume II Contents vii

VTCC Thermocouple Input.............................................................................................................................................16-1
Installation ................................................................................................................................................................16-2
Operation ..................................................................................................................................................................16-3
Specifications............................................................................................................................................................16-7
Diagnostics ...............................................................................................................................................................16-8
Configuration............................................................................................................................................................16-9
Alarms ....................................................................................................................................................................16-11
TBTC Thermocouple Input ...........................................................................................................................................16-13
Installation ..............................................................................................................................................................16-15
Operation ................................................................................................................................................................16-15
Operation ................................................................................................................................................................16-19
Specifications..........................................................................................................................................................16-22
Diagnostics .............................................................................................................................................................16-22
Configuration..........................................................................................................................................................16-23
DTTC Simplex Thermocouple Input.............................................................................................................................16-26
Installation ..............................................................................................................................................................16-26
Operation ................................................................................................................................................................16-28
Specifications..........................................................................................................................................................16-28
Diagnostics .............................................................................................................................................................16-29
Configuration..........................................................................................................................................................16-29
Turbine Specific Primary Trip (VTUR) 17-1
VTUR Primary Turbine Protection .................................................................................................................................17-1
Installation ................................................................................................................................................................17-3
Operation ..................................................................................................................................................................17-3
Specifications..........................................................................................................................................................17-13
Diagnostics .............................................................................................................................................................17-14
Configuration..........................................................................................................................................................17-15
Alarms ....................................................................................................................................................................17-19
TTURH1B Primary Turbine Protection Input...............................................................................................................17-22
Installation ..............................................................................................................................................................17-24
Operation ................................................................................................................................................................17-25
Specifications..........................................................................................................................................................17-27
Diagnostics .............................................................................................................................................................17-28
Configuration..........................................................................................................................................................17-28
TRPG Turbine Primary Trip..........................................................................................................................................17-29
Installation ..............................................................................................................................................................17-31
Operation ................................................................................................................................................................17-32
Specifications..........................................................................................................................................................17-33
Diagnostics .............................................................................................................................................................17-33
Configuration..........................................................................................................................................................17-33
TRPL Turbine Primary Trip ..........................................................................................................................................17-34
Installation ..............................................................................................................................................................17-35
Operation ................................................................................................................................................................17-36
Specifications..........................................................................................................................................................17-38
viii Contents GEH-6421Q Mark* VI Control

Diagnostics .............................................................................................................................................................17-38
Configuration..........................................................................................................................................................17-38
TRPS Turbine Primary Trip ..........................................................................................................................................17-39
Installation ..............................................................................................................................................................17-40
Operation ................................................................................................................................................................17-41
Specifications..........................................................................................................................................................17-43
Diagnostics .............................................................................................................................................................17-43
Configuration..........................................................................................................................................................17-43
TTSA Trip Servo Interface............................................................................................................................................17-44
Installation ..............................................................................................................................................................17-45
Operation ................................................................................................................................................................17-46
Specifications..........................................................................................................................................................17-46
Diagnostics .............................................................................................................................................................17-46
Configuration..........................................................................................................................................................17-46
DTUR Simplex Pulse Rate Input...................................................................................................................................17-47
Installation ..............................................................................................................................................................17-47
Operation ................................................................................................................................................................17-49
Specifications..........................................................................................................................................................17-49
Diagnostics .............................................................................................................................................................17-50
Configuration..........................................................................................................................................................17-50
DTRT Simplex Primary Trip Relay Interface ...............................................................................................................17-51
Installation ..............................................................................................................................................................17-51
Operation ................................................................................................................................................................17-53
Specifications..........................................................................................................................................................17-53
Diagnostics .............................................................................................................................................................17-53
Configuration..........................................................................................................................................................17-53
DRLY Simplex Relay Output ........................................................................................................................................17-54
Installation ..............................................................................................................................................................17-54
Operation ................................................................................................................................................................17-56
DRLYH1A Specifications ......................................................................................................................................17-56
DRLYH1B Specifications ......................................................................................................................................17-57
Diagnostics .............................................................................................................................................................17-57
Configuration..........................................................................................................................................................17-57
Vibration Monitor Board (VVIB) 18-1
VVIB Vibration Monitor .................................................................................................................................................18-1
Installation ................................................................................................................................................................18-2
Operation ..................................................................................................................................................................18-3
Specifications..........................................................................................................................................................18-19
Diagnostics .............................................................................................................................................................18-19
Configuration..........................................................................................................................................................18-20
Alarms ....................................................................................................................................................................18-23
TVIB Vibration Input ....................................................................................................................................................18-24
Installation ..............................................................................................................................................................18-26
Operation ................................................................................................................................................................18-28
GEH-6421Q System Guide, Volume II Contents ix

Specifications..........................................................................................................................................................18-30
Diagnostics .............................................................................................................................................................18-31
Configuration..........................................................................................................................................................18-31
DVIB Simplex Vibration Input......................................................................................................................................18-32
Installation ..............................................................................................................................................................18-32
Operation ................................................................................................................................................................18-34
Specifications..........................................................................................................................................................18-35
Diagnostics .............................................................................................................................................................18-36
Configuration..........................................................................................................................................................18-36
Power Conditioning Board (TTPW) 19-1
TTPW Power Conditioning .............................................................................................................................................19-1
Installation ................................................................................................................................................................19-3
Operation ..................................................................................................................................................................19-5
Specifications............................................................................................................................................................19-8
Diagnostics ...............................................................................................................................................................19-8
Configuration............................................................................................................................................................19-8
Alarms ......................................................................................................................................................................19-8
Rack Power Supply (VME) 20-1
VME Rack Power Supply................................................................................................................................................20-1
Installation ................................................................................................................................................................20-4
Operation ..................................................................................................................................................................20-9
Specifications..........................................................................................................................................................20-12
Diagnostics .............................................................................................................................................................20-13
Configuration..........................................................................................................................................................20-15
Alarms ....................................................................................................................................................................20-16
Redundant Power Supply 21-1
Redundant Power Supply ................................................................................................................................................21-1
Installation ................................................................................................................................................................21-2
Operation ..................................................................................................................................................................21-7
Specification .............................................................................................................................................................21-9
Diagnostics .............................................................................................................................................................21-10
Configuration..........................................................................................................................................................21-10
Power Distribution Modules 22-1
PDM Power Distribution Modules ..................................................................................................................................22-1
Installation ................................................................................................................................................................22-2
Operation ..................................................................................................................................................................22-3
Specifications............................................................................................................................................................22-8
Diagnostics ...............................................................................................................................................................22-8
Configuration..........................................................................................................................................................22-10
Alarms ....................................................................................................................................................................22-11
PPDA Power Distribution System Feedback ................................................................................................................22-12
Installation ..............................................................................................................................................................22-12
Configuration..........................................................................................................................................................22-13
x Contents GEH-6421Q Mark* VI Control

LED Diagnostics ....................................................................................................................................................22-13
Pack Reboot............................................................................................................................................................22-14
Diagnostics .............................................................................................................................................................22-14
Configuration..........................................................................................................................................................22-15
DS2020DACAG2 ac-dc Power Conversion..................................................................................................................22-18
Installation ..............................................................................................................................................................22-18
Operation ................................................................................................................................................................22-21
Specifications..........................................................................................................................................................22-22
Diagnostics .............................................................................................................................................................22-22
Configuration..........................................................................................................................................................22-22
Replacement/Warranty 23-1
Pack/Board Replacement.................................................................................................................................................23-1
Handling Precautions ...............................................................................................................................................23-1
Replacement Procedures ..........................................................................................................................................23-1
Replacing a Pack ......................................................................................................................................................23-2
Replacing V-type Boards..........................................................................................................................................23-2
Replacing T-type Boards ..........................................................................................................................................23-2
Replacing D-type Boards .........................................................................................................................................23-3
Replacing J-type Boards...........................................................................................................................................23-3
Replacing S-type Boards ..........................................................................................................................................23-3
Renewal Warranty ...........................................................................................................................................................23-4
How to Order a Board ..............................................................................................................................................23-4
Glossary of Terms 24-1
Notes................................................................................................................................................................................24-7
GEH-6421Q System Guide, Volume II Contents xi

I/O Overview
The following table lists all the I/O processor boards, the number of I/O per processor
that they support, and their associated standard terminal boards. Some standard
terminal boards have simplex and TMR versions (in addition to simplex DIN-rail
mounted ones). Refer to the section, simplex DIN-rail mounted terminal board
summary for simplex DIN-rail mounted terminal board information.
I/O Processor Boards and Standard Terminal Boards
I/O Processor Board I/O Signal Type Number of I/O per Associated Terminal
Processor Boards
VAIC Analog inputs, 0-1 mA, 4-20 mA, voltage 20 TBAI
Analog outputs, 4-20 mA, 0-200 mA 4 TBAI
VAOC Analog outputs, 4-20 mA 16 TBAO
VCCC Contact inputs 48 TBCI, TICI
Solenoid outputs 12 TRLY
Dry contact relay outputs 12 TRLY
VCRC Contact inputs 48 TBCI
Solenoid outputs 12 TRLY
Dry contact relays outputs 12 TRLY
VGEN Analog inputs, 4-20 mA 4 TGEN
Potential transformers, gen (1) bus (1) 2 TGEN
Current transformers on generator 3 TGEN
Relay outputs (optional) 12 TRLY
VPRO Pulse rate inputs 3 TPRO
Potential transformers, gen (1), bus (1) 2 TPRO
Thermocouple inputs 3 TPRO
Analog inputs, 4-20 mA 3 TPRO
Trip solenoid drivers 3 TREG (through J3)
Trip interlock inputs 7 TREG (through J3)
Emergency-stop input (hardwired) 1 TREG (through J3)
Economizing relays 3 TREG (through J3)
Trip solenoid drivers 3 TREG (2nd board through J4)
Emergency-stop input (hardwired) 1 TREG (2nd board through J4)
Economizing relays 3 TREG (2nd board through J4)
1-1 I/O Overview GEH-6421Q Mark* VI Control

I/O Processor Board I/O Signal Type Number of I/O per Associated Terminal
Processor Boards
VPYR Pyrometer temperature inputs (4/probe) 2 TPYR
Keyphasor shaft position inputs 2 TPYR
VRTD Resistance temperature device (RTD) 16 TRTD
VSCA Serial I/O communications 6 DSCB
VSVO Servo outputs to hydraulic servo valve 4 TSVO
LVDT inputs from valve position 12 TSVO
LVDT excitation outputs 8 TSVO
Pulse rate inputs for flow monitoring 2 TSVO
Pulse rate probe excitation 2 TSVO
VTCC Thermocouple inputs 24 TBTC
VAMA Acoustic monitoring (Simplex only) 2 DDPT
VAMB Acoustic monitoring (Simplex only) 18 TAMB
VTURH1B Pulse rate magnetic speed pickups 4 TTUR
Potential transformers, generator and bus 2 TTUR
Shaft current and voltage monitor 2 TTUR
Breaker Interface 1 TTUR
Flame detectors (Geiger-Mueller) 8 TRPG (through J4)
Trip solenoid drivers for ETDs 3 TRPG (through J4)
VTURH2B Same as above, plus 3 trip solenoid drivers TRPG (2nd board through
J4A)
VVIB Shaft Proximitor/seismic probes 16 TVIB
(Vib/Displ/Accel)
Shaft proximity probes (displacement) 8 TVIB
Shaft proximity reference (Keyphasor) 2 TVIB
GEH-6421Q System Guide, Volume II I/O Overview 1-2

Terminal Board Summary
Terminal Board Terminal Block Features

Many of the terminal boards in the Mark VI use a 24-position pluggable barrier terminal
block (179C9123BB). These terminal blocks have the following features:
Made from a polyester resin material with 130C (266 F) rating
Terminal rating is 300 V, 10 A, UL class C general industry, 0.375 in creepage,
0.250 in strike
UL and CSA code approved
Screws finished in zinc clear chromate and contacts in tin
Each block screw is number labeled 1 through 24 or 25 through 48 in white
Recommended screw tightening torque is 8 in lbs
Terminal Board Disconnect Switch (TBSW)
The Mark VI Terminal Board Disconnect Switch (TBSW) provides an individual
disconnect switch for each of the 48 customer I/O points on Mark VI terminal boards in
the following figure. This facilitates such procedures as continuity checking, isolation
for test, and others. Two TBSW assemblies are required for each terminal board, one
numbered 1-24, the other numbered 25-48, (GE part numbers 336A4940CHG1 and
336A4940CHG2 respectively). The TBSW fits and connects into the terminal boards
24-point pluggable barrier terminal block receptacles.
The TBSW is designed for continuous 5 A rms current at 300 V rms and complies with
EN61010-1 clearance specifications. The NEMA power/voltage class rating (A, E, F,
G) for the TBSW is dependent on the terminal board the TBSW is mounted upon see
the following table.
Top View Front View Side View
TBSW Mounted to Terminal Block
The TBSW is not to be used for live circuit interruption. The

circuit must be de-energized before the circuit is either closed
or opened by the TBSW.

TBSW and Terminal Board Applications Summary
In the following table lists the TBSW/terminal board applications for the Mark VI. An
OK indicated in the TBSW applications column indicates an approved application of
the TBSW for terminal board specifications for voltage and current. Those board points
that require limiting the terminal board applications are indicated with a note number
(corresponding notes follow the table).
TBSW Terminal Board Applications
Board Type TBSW Applications

CSA NEMA
TBTC Thermocouples OK OK
TRTD RTDs OK OK
TBAI Analog inputs OK OK
TBAO Analog outputs OK OK
TBCI Contact inputs OK OK
TICI Contact inputs Note 1 Note 2
TRLY Contact outputs Note 1 Note 2
TSVO Servo I/O OK OK
TTUR Turbine I/O OK OK
TRPG Flame I/O Note 3 Note 3
TREG OK OK
TRPL OK OK
TREL OK OK
TRPS OK OK
TRES OK OK
TPRO OK OK
TVIB OK OK
TGEN OK OK
TPYR OK OK

Table Notes:
1. The inputs on the TICI and TRLY boards are high voltage isolated inputs. The
TBSW is classified by CSA for use up to 300 V rms. Circuits applied to the TICI or
TRLY terminal board with the TBSW installed must be externally limited to 300
V rms. Care must also be taken to assure that no adjacent circuits, that when both
are operating, do not exceed 300 V rms between them.
2. NEMA ratings are given according to the power and voltage limiting abilities of the
circuit. The TICI and TRLY terminal boards carry no components that are designed
to limit voltage or current. For this reason, the TBSW application limitations for
these two terminal boards will depend on the customers ability to install voltage
and current limiting devices on the TBSW circuits according to NEMA guidelines.
The following chart indicates the NEMA class and the voltage it must be limited too
before it can be applied to the TBSW. Voltages are for circuit voltage, and circuit to
adjacent circuit voltage.
Class Voltage Description

A 50 V peak All circuits which cannot be otherwise classified. Use this rating when no
external current and voltage limiting devices are present.
E 225 V peak Known and controlled transient voltages without sufficient current limiting
impedance.
F 300 V rms Known and controlled voltages with short-circuit power 10 kVA or less.
G 300 V rms Known and controlled voltages with short-circuit power 500VA or less.
3. The TRPG flame detectors require a 335 V dc circuit. The TBSW is classified by
CSA and NEMA for use up to 300 V rms. Circuits applied to the TRPG terminal
board flame detectors with the TBSW installed must be must be limited to 300 V
rms, disallowing the use of the TBSW when the flame detectors are operational.

Relay Board Summary
Mark VI Relay Board Features
Feature DRLYH1A TRLYH1B TRLYH1C TRLYH1D TRLYH1E TRLYH1F

DRLYH1B TRLYH2C TRLYH2E TRLYH2F
TRLYH3E
Fused solenoid 0 6 6 6 0 12 (with WPDF)
driver relays
# Dry circuit relays 12 5 5 0 12 12 (without WPDF)
Relay Type Mechanical Mechanical Mechanical Mechanical Solid-State Mechanical
Form C Form C Form C Form C Form A H1F = Form A
H2F = Form B
Control Simplex Simplex and Simplex and Simplex and Simplex and TMR Only
TMR TMR TMR TMR
# Ignition 0 1 1 0 0 0
transformer outputs
Relay suppression No MOV MOV and MOV No No
R-C
Solenoid relay No Relay coil Relay NO Solenoid No Relay coil current
sensing current/6 contact resistance /12 (WPDF)
voltage/6 /6
Other relay sensing No Relay coil Relay NO N/A Relay NO Relay coil current
type/quantity current/6 contact contact /12 (no WPDF)
voltage/6 voltage/ 12
Solenoid fuse N/A 6 6 6 N/A 12 (WPDF)
sense
Operating voltage 120/240 120/240 H1=120/ 240 No H3= 120/240 120
V ac H2=No
Operating voltage 28/125 24/125 H1=125 24/ 110/ 125 H2=28 28/125
V dc H2=24 H3=125
Internal switching No No No Yes No No
power supply
Daughterboards None None 18 None None WPDF
Terminal type Euro-box Barrier Barrier Barrier Barrier Barrier

Trip Terminal Board Summary
Mark VI Trip Terminal Board Features
Board TMR Simplex Output Output ESTOP Input Input Economy

Contacts, Contacts, Contacts, Contacts, Resistor
125 V dc, 1 24 V dc, 3 Dry, 125 V Dry, 24 V dc
Amp Amp dc
TRPGH1A* Yes No Yes No No No No No
TRPGH1B Yes No Yes Yes No No No No
TRPGH2A* No Yes Yes No No No No No
TRPGH2B No Yes Yes Yes No No No No
TREGH1A* Yes No Yes No Yes Yes No Yes
TREGH1B Yes No Yes Yes Yes Yes No Yes
TREGH2B Yes No Yes Yes Yes No Yes Yes
TRPLH1A Yes No Yes Yes Yes No No No
TRELH1A Yes No Yes Yes No Yes No No
TRELH2A Yes No Yes Yes No No Yes No
TRPSH1A Yes Yes Yes Yes Yes No No No
TRESH1A Yes Yes Yes Yes No Yes No No
TRESH2A Yes Yes Yes Yes No No Yes No
*These boards will become obsolete.

Simplex DIN-Rail Mounted Terminal Board Summary
Speed control systems for small turbines require simplified system architecture. Simplex
control is used to reduce cost and save space. Compact DIN-rail mounted terminal
boards are available instead of the larger T-type terminal boards used on TMR systems.
IONet is not used since the D-type terminal boards cable directly into the control chassis
to interface with the I/O boards.
In the VME rack, a VCMI board provides two-way communication between the
controller and the I/O processor boards. The controller Ethernet port is used to
communicate with other system components, such as an operator interface or PLC.
Additional PLC I/O can be tied into the system using the controller Genius port. A
typical system is illustrated in the following figure. The system is powered by 24 V dc,
and uses a low voltage version of the standard VME rack power supply.
The board designations and functions along with the corresponding I/O processor boards
are listed in the following table. In all cases, the signal conditioning on the DIN-type
terminal boards is the same as on the T-type boards, and the I/O specifications described
apply. However, the number of inputs and outputs, and the grounding provisions differ,
and the boards do not support TMR. Permanently mounted high-density Euro-Block
terminal blocks are used to save space. The blocks have terminals accepting wire sizes
up to one #12 wire, or two #14 wires. The typical wire size used is #18 AWG.

Fan
x x x x x x x x
To sequencer
& operator Ethernet
interface V U V V V V V V V V V S Power
C C T T T A A S S R C P Supply
M V U U C I I V V T R A
Serial Modbus COM2 I B R R C C C O O D C R
communication E
x x x x x x x x x x x x x
24 V dc
power
1 2 3 4 5 6 7 8 9 10 11 12 13
DTCI
DTCI Contact
DTUR Contact Inputs
Turbine DTRT Inputs
Control Transit
-ion Bd. DTUR
Turbine
Control DRLY DRLY
DRLY Relay Relay
Relay Outputs Outputs
Output
DRTD
DRTD RTD
RTD Inputs
DTTC DTTC Inputs
Thermo DTAI DTAI
Thermo Analog
-couples -couples Analog
Inputs Inputs
DSVO
DSVO Servo
Servo Outputs
Outputs
DTAI
Analog DTAI
Inputs Analog
Inputs
DSVO DSVO
Servo Servo
Outputs Outputs
Small Simplex System Rack, Boards, and Cabling

Simplex DIN-Rail Mounted Terminal Boards
DIN Euro Size Number of Points Description of I/O I/O Processor Board
Terminal board
DTTC 12 Thermocouple temperature inputs with one cold VTCC
junction reference
DRTD 8 RTD temperature inputs VRTD
DTAI 10 Analog current or voltage inputs with on-board VAIC
24 V dc power supply
2 Analog current outputs, with choice of 20 mA or VAIC

200 mA
DTAO 8 Analog current outputs, 0-20 mA VAOC
DTCI 24 Contact Inputs with external 24 V dc excitation VCRC (or VCCC)
DRLY 12 Form-C relay outputs, dry contacts, customer VCRC (or VCCC)
powered
DTRT Transition board between VTUR and DRLY for VTUR
solenoid trip functions
DTUR 4 Magnetic (passive) pulse rate pickups for speed VTUR
and fuel flow measurement
DSVO 2 Servo valve outputs with choice of coil currents VSVO
from 10 mA to 120 mA
6 LVDT valve position sensors with on-board VSVO
excitation
2 Active pulse rate probes for flow measurement, VSVO
with 24 V dc excitation provided
DVIB 8 Shaft Proximitor/seismic probes (Vib/Displ/Accel) VVIB
4 Shaft proximity probes (displacement) VVIB
1 Shaft proximity reference (Keyphasor) VVIB
Grounding
For more grounding During panel design, provisions for grounding the terminal board and wiring shields must
information, refer to Mark be made. These connections should be as short as possible. A metal grounding strip can
VI Control System Guide be firmly mounted to the panel on the right hand side of the terminal board. Shields and
Volume I, Chapter 5. the SCOM connection can be conveniently made to this strip.
Note Only the thermocouple board has screws for the shield wires.
The VME rack is grounded to the mounting panel by the metal-to-metal contact under
the mounting screws. No wiring to the ground terminal is required.

UCV Controller
UCV Controller
The Mark* VI UCV_ controller is a 6U high, single or double slot, single board computer
(SBC) that operates the turbine application code. The controller mounts in a VME
rack called the control module and communicates with the turbine I/O boards through
the VME bus. The controller operating system is QNX, a real time, multitasking OS
designed for high-speed, high-reliability industrial applications. Three communication
ports provide links to operator and engineering interfaces as follows:
Ethernet connections to the UDH for communication with HMIs, and other control
equipment
RS-232C connection for setup using the COM1 port
RS-232C connection for communication with distributed control systems (DCS)
using the COM2 port (such as Modbus slave)
Operation
Application software can The controller is loaded with software specific to its application to steam, gas, and
be modified online without land-marine aeroderivative (LM), or balance of plant (BOP) products. It can execute
requiring a restart. up to 100,000 rungs or blocks per second, assuming a typical collection of average size
blocks. An external clock interrupt permits the controller to synchronize to the clock on
the VCMI communication board to within 100 microseconds.
External data is transferred to and from the control system database (CSDB) in the
controller over the VME bus by the VCMI communication board. In a simplex system,
the data consists of the process inputs and outputs from the I/O boards. In a TMR system,
the data consists of the voted inputs from the input boards, singular inputs from simplex
boards, computed outputs to be voted by the output hardware, and the internal state
values that must be exchanged between the controllers.
Controller Versions
Five controller versions are in use:
The single-slot UCVE is the current generation controller used in most new systems.
The double-slot UCVF is the high-end current generation controller used in only the
systems that require it.
The single-slot UCVG features performance between the UCVE and the UCVF and
may be used as a direct replacement for any previous controller version without
necessitating a backplane upgrade.
Note The double-slot UCVB and UCVD are no longer shipped with new systems, but
are still in use in older systems.
2-1 UCV Controller GEH-6421Q Mark* VI Control

The UCVE and UCVF may also be used to replace earlier revision controllers, but
require a backplane upgrade. If replacing a UCVB, an Ethernet cabling upgrade from
10Base2 to 10Base-T is also required.
Diagnostics
For further information, refer If a failure occurs in the Mark VI controller while it is running application code, the
to GEH-6421, Vol. I Mark rotating status LEDs (if supported) on the front panel stop and an internal fault code is
VI System Guide, Chapter generated.
7, Troubleshooting and
If a failure occurs in the Mark VI controller, a diagnostic alarm is generated that can be
Diagnostics.
read from the toolbox. In the UCVB and UCVD, these diagnostics are also encoded by
flashing LEDs on the front panel. The error numbers and descriptions are available on
the toolbox help screen. Additional information can also be obtained from the controller
COM1 serial port.
Installation
A control module contains (at a minimum) the controller and a VCMI. Three rack types
can be used: the GE Fanuc integrators rack shown in the following figure and two sizes
of Mark VI racks shown in the section, VCMI - Bus Master Controller. The GE Fanuc
rack is shorter and is used for stand-alone modules with remote I/O only. The Mark VI
racks are longer and can be used for local or remote I/O. Whichever rack is used, a
cooling fan is mounted either above or below the controller. The stand-alone control
module implemented with a GE Fanuc integrators rack also requires a VDSK board to
supply fan power and provide the rack identification through an ID plug.
VCMIH2 Communication Board with Controller Interface Board

Three IONet Ports (VCMIH1 with One UCVX VDSK
IONet is for Simplex systems)
VME Rack
POWER
SUPPLY
Power Supply
x x x x
Cooling Fan Fan 24 Vdc

behind Panel Power
Typical Controller Mounted in Rack with Communication Board
GEH-6421Q System Guide, Volume II UCV Controller 2-2

UCVG Controller
The UCVG is a single-slot board using an Intel Ultra Low Voltage Celeron
650 MHz processor with 128 MB of flash memory and 128 MB of SDRAM. Two
10BaseT/100BaseTX (RJ-45 connector) Ethernet ports provide connectivity. The
first Ethernet port allows connectivity to the UDH for configuration and peer-to-peer
communication.
The second Ethernet port is for use on a separate IP logical subnet and can be used
for Modbus or private Ethernet Global Data (EGD) network. This Ethernet port is
configured through the toolbox. The controller validates its toolbox configuration against
the existing hardware each time the rack is powered up.
Note A separate subnet address allows the controller to uniquely identify an Ethernet
port. IP subnet addresses are obtained from the Ethernet network administrator (for
example, 192.168.1.0, 192.168.2.0).

Mark VI Controller UCVGH1
Reset Switch
(allows the system to be
RS
reset from the front panel) T
S
V
Monitor port for GE use G
A
Keyboard/mouse port
COM1 RS-232C port for M
[ / for GE use
initial controller setup K
2 1
COM2 RS-232C port for
serial communication C Ethernet Status LEDs
O
M
2:1
Active (Blinking = Active)
ETHERNET 1 (Solid = Inactive)
Primary Ethernet port for L
Link (Yellow = 10BaseT)
A
Unit Data Highway (UDH) N (Green = 100BaseTX)
communication (toolbox) 1
L
A
(Solid = Inactive)
ETHERNET 2 N Link (Yellow = 10BaseT)
2
Secondary Ethernet port for (Green = 100BaseTX)
expansion I/O communication USB
Two individual USB connectors
S
Status LEDs
Status LEDs
B: Booting. BIOS boot in progress. (red)
I: IDE activity is occurring. (yellow)
P
M
P: Power is present. (green)
C R: Board reset. (red)
UCVG
H1
x
UCVG Controller
Note The factory setting of the battery is in the disabled position. To enable the battery,

set SW10 to the closed position as shown in the above drawing.
(SW10
shown in (Do not change
closed 2-3 setting)
position)
AS Shipped
Setting
UCVG Controller Side View

Specifications
Item Specification
Microprocessor Intel Ultra Low Voltage Celeron 650 MHz
Memory 128 MB SDRAM
128 MB Compact Flash Module
256 KB Advanced Transfer Cache
Operating System QNX
Programming Control block language with analog and discrete blocks; Boolean logic represented in
relay ladder diagram format. Supported data types include:
Boolean
16-bit signed integer
32-bit floating point
64-bit long floating point
Primary Ethernet Interface Twisted pair 10BaseT/100BaseTX, RJ-45 connector:
(Ethernet 1) TCP/IP protocol used for communication between controller and toolbox
EGD protocol for communication with CIMPLICITY HMI, and Series 90-70
programmable logic controllers (PLCs)
Ethernet Modbus protocol supported for communication between controller and
third-party DCS
Secondary Ethernet Interface Twisted pair 10BaseT/100BaseTX, RJ-45 connector:
(Ethernet 2) EGD protocol
third-party DCS
COM Ports Two micro-miniature 9-pin D connectors:
COM1 Reserved for diagnostics, 9600 baud, 8 data bits, no parity, 1 stop bit
COM2 Used for serial Modbus communication, 9600 or 19200 baud
Power Requirements UCVGH1 +5 V dc, 4 A typical, 5.4 A maximum
+12 V dc, less than 1 mA typical
- 12 V dc, less than 1 mA typical
Expansion site PMC expansion site available, IEEE 1386.1 5V PCI

Environment Operating temperature: 0 to 70C (32 to 158 F)
Storage temperature: -40 to 80C (-40 to 176 F)
Note The UCVG controller contains a Type 1 Lithium battery. Replace only with
equivalent battery type, rated 3.3 V, 200 mA.

UCVF Controller
The UCVF is a double-slot board using an 850 MHz Intel Pentium III processor with
16 or 128 MB of flash memory and 32 MB of DRAM. Two 10BaseT/100BaseTX
(RJ-45 connector) Ethernet ports provide connectivity. The first Ethernet port allows
connectivity to the UDH for configuration and peer-to-peer communication.
The second Ethernet port is for use on a separate IP logical subnet. This Ethernet port is
configured through the toolbox. The controller validates its toolbox configuration against
the existing hardware each time the rack is powered up.
Note A separate subnet address allows the controller to uniquely identify an Ethernet
port. IP subnet addresses are obtained from the Ethernet network administrator (for
example, 192.168.1.0, 192.168.2.0).
Mark VI Controller UCVFH2
x x
Ethernet Status LEDs
ETHERNET 1 (Solid = Inactive)
Primary Ethernet port for Unit L Link (Yellow = 10BaseT)
Data Highway (UDH) A
(Green = 100BaseTX)
N
communication (toolbox) 1 Active (Blinking = Active)
L (Solid = Inactive)
A
ETHERNET 2 N Link (Yellow = 10BaseT)
Secondary Ethernet port for 2 (Green = 100BaseTX)
STATUS
expansion I/O communication
C
O
Status LEDs
COM1 RS-232C port for M VMEbus SYSFAIL
initial controller setup 1:2 Flash Activity
COM2 RS-232C port for U Power Status
serial communication S CPU Throttle Indicator
B
RST
M
Keyboard/mouse port /
K
for GE use
S
V
Monitor port for GE use G
A
Note: To connect the

M
E batteries that enable
Z NVRAM and CMOS, set
Z
A jumper E8 to pins 7-8 ("IN")
N and jumper E10 to ("IN").
I
N
E
UCVF
H2
x x
UCVF Controller

Specifications
Item Specification
Microprocessor Intel Pentium III 850 MHz
Memory 32 MB DRAM
16 or 128 MB Compact Flash Module
256 KB Advanced Transfer Cache
Battery-backed SRAM - 8K allocated as NVRAM for controller functions
Boolean
EGD protocol for communication with CIMPLICITY HMI, and Series 90-70 PLCs
third-party DCS
third-party DCS
Power Requirements UCVFH2 +5 V dc, 6 A typical, 7 A maximum
+12 V dc, 200 mA typical, 400 mA maximum
-12 V dc, 2.5 mA typical

UCVE Controllers
The UCVE is available in multiple forms: UCVEH2 and UCVEM01 to UCVMEM05.

The UCVEH2 is the standard Mark VI controller. It is a single-slot board using a 300
MHz Intel Celeron processor with 16 or 128 MB of flash memory and 32 MB of DRAM.
A single 10BaseT/100BaseTX (RJ-45) Ethernet port provides connectivity to the UDH.
The UCVEM_ _ modules have all the features of the UCVEH2 with the addition of
supporting additional Ethernet ports and Profibus. Some UCVEM_ _ modules support
secondary 10BaseT/100BaseTX Ethernet ports for use on a separate IP logical subnet.
The secondary Ethernet port is configured through the toolbox. The controller validates
its toolbox configuration against the existing hardware each time the rack is powered up.
A separate subnet address allows the controller to uniquely identify an Ethernet port.
Mark VI Controller UCVEH2
Status LEDs
STATUS
Monitor port for GE use VME bus SYSFAIL

Flash Activity
S
V Power Status
G
A
Keyboard/mouse port
for GE use
M
/
K
initial controller setup C
O
M
COM2 RS-232C port for 1:2 Ethernet Status LEDs
serial communication
L
A Active (Blinking = Active)
N (Solid = Inactive)
ETHERNET 1 RST
Ethernet port for UDH Link (Yellow = 10BaseT)
P
communication C (Green = 100BaseTX)
M Note: To connect the
I
P
batteries that enable
NVRAM and CMOS, set
jumper E8 to pins 7-8 ("IN")
M and jumper E10 to ("IN").
E
Z
Z
A
N
I
N
E
UCVE
H2
x
UCVE Controller

UCVE Controller Specifications
Item Specification
Microprocessor Intel Celeron 300 MHz
Memory 32 MB DRAM
16 or 128 MB Compact Flash Module
128 KB L2 cache
Battery-backed SRAM - 8K allocated as NVRAM for controller functions
Boolean
EGD protocol for communication with CIMPLICITY HMI and Series 90-70 PLCs
third-party DCS
COM Ports Two micro-miniature 9-pin D connectors
Power Requirements UCVEH2 +5 V dc, 6 A typical, 7 A maximum
-12 V dc, 2.5 mA typical

UCVEM01 Controller Specifications
Item Specification
Secondary Ethernet Interface Twisted pair 10BaseT/100BaseTX, RJ-45 connector
third-party DCS
Power Requirements +5 V dc, 6.2 A typical, 8.2 A maximum
-12 V dc, 180 mA typical, 250 mA maximum
Note For specifications common to all UCVE modules, refer to table UCVEH2
Controller Specifications.
Mark VI Controller UCVEM01
Status LEDs
STATUS
VME bus SYSFAIL

Monitor port for GE use
Flash Activity
S
V Power Status
G
A
Keyboard/mouse port
for GE use
M
/
K Ethernet Status LEDs
O Active (Blinking = Active)
1:2 (Solid = Inactive)
Link (Yellow = 10BaseT)
L (Green = 100BaseTX)
A
ETHERNET 1 N
Primary Ethernet port for RST
Speed (Off = 10BaseT)
UDH communication SPEED LINK/
(On = 100BaseTX)
(toolbox) ACT
P
C
Link/Active
ETHERNET 2 M
I
Secondary Ethernet port for P
M
E
Note: UCVEMxx modules Z
are shipped with the Z
A
batteries enabled. N
I
N
E
UCVE
M01
x
UCVEM01 Front Panel

Item Specification
Secondary Ethernet Interfaces Twisted pair 10BaseT/100BaseTX, RJ-45 connector
third-party DCS
Status LEDs
STATUS
Monitor port for GE use VME bus SYSFAIL

Flash Activity
S
V Power Status
G
Keyboard/mouse port A
for GE use
M
/
K
O
COM2 RS-232C port for M Ethernet Status LEDs
1:2
L
ETHERNET 1 A (Solid = Inactive)
N
Primary Ethernet port for UDH
communication (toolbox)
RST Link (Yellow = 10BaseT)
P
(Green = 100BaseTX)
C
M
I
P
Secondary Ethernet ports for Note: UCVEMxx modules
expansion I/O communication: PMC
are shipped with the
0
M batteries enabled.
0
ETHERNET 2 E
Z
1
Z
1
Not used A
2
N
I
2
ETHERNET 3 N
3
E
3
610
ETHERNET 4
UCVE
M02
x
UCVEM02 Front Panel

Item Specification
PROFIBUS Interface (PROFIBUS 1-2) PROFIBUS DP master class 1
Note For specifications common to all UCVE modules, refer to tableUCVEH2

x x
Status LEDs
STATUS Left: Power Status
Middle: Flash Activity
Monitor port for GE use Right: VME bus SYSFAIL
PCI MEZZANINE CARD 0
S
V
G
Keyboard/mouse port A
PROFIBUS 1
for GE use
M PROFIBUS Serial Interface
/ Transmit Active LED
K
O
1:2
PROFIBUS 2
L PROFIBUS Serial Interface
ETHERNET 1 A
N Transmit Active LED
communication (toolbox) RST
P
C
Ethernet Status LEDs
Top: Active M
I
(Blinking = Active) P Note: UCVEMxx modules
(Solild = Inactive) are shipped with the
Bottom: Link batteries enabled.

M
(Yellow = 10BaseT) E
(Green = 100BaseTX) Z
Z
A
N
I
N
E
UCVE
M03
x x
UCVEM03 Front Panel

Item Specification
PROFIBUS Interface (PROFIBUS 1-3) PROFIBUS DP master class 1
x x
Status LEDs
STATUS Left: Power Status
Monitor port for GE use Middle: Flash Activity
Right: VMEbus SYSFAIL
S
Keyboard/mouse port V
for GE use G
A
PROFIBUS 1
M PROFIBUS Serial Interface
/ Transmit Active LED
COM1 RS-232C port for K

O
1:2
L PROFIBUS 2
ETHERNET 1 A
PROFIBUS Serial Interface
N
Primary Ethernet port for UDH Transmit Active LED
communication (toolbox) RST
P
Ethernet Status LEDs C
Top: Active
M
(Blinking = Active) I
(Solild = Inactive) P
Bottom: Link
(Yellow = 10BaseT) PROFIBUS 3

M
(Green = 100BaseTX) E
Z Transmit Active LED
Z
A
N
Note: UCVEMxx modules I
are shipped with the N
E
batteries enabled.
UCVE
M04
x x
UCVEM04 Front Panel

Item Specification
third-party DCS
PROFIBUS Interface (PROFIBUS 1) PROFIBUS DP master class 1
Note For specifications common to all UCVE modules, refer to tableUCVEH2

Status LEDs
STATUS
VMEbus SYSFAIL
Monitor port for GE use Flash Activity
S
V Power Status
G
A
Keyboard/mouse port
for GE use M
/
K
COM1 RS-232C port for Ethernet Status LEDs
C
initial controller setup O
M
COM2 RS-232C port for 1:2 Active (Blinking = Active)
serial communication (Solid = Inactive)
L Link (Yellow = 10BaseT)
ETHERNET 1 A
N
(Green = 100BaseTX)
RST
communication (toolbox) Speed (Off = 10BaseT)
(On = 100BaseTX)
SPEED LINK/
ACT
P
C
ETHERNET 2 M Link / Active

I
Secondary Ethernet port for P
PROFIBUS 1
M
E
Z Transmit Active LED
Note: UCVEMxx modules Z
A
are shipped with the N
batteries enabled. I
N
E
UCVE
M05
x
UCVEM05 Front Panel

UCVD Controller
For more information, refer to The UCVD is a double-slot board using a 300 MHz AMD K6 processor with 8 MB of
GEH-6410, Innovation Series flash memory and 16 MB of DRAM. A single 10BaseT (RJ-45 connector) Ethernet
Controller System Manual. port provides connectivity to the UDH.
The UCVD contains a double column of eight status LEDs. These LEDs are sequentially
turned on in a rotating pattern when the controller is operating normally. When an error
condition occurs, the LEDs display a flashing error code that identifies the problem.
Mark VI Controller UCVDH1, H2
x x
ETHERNET
Ethernet port for UDH
communication
ACTIVE H L
SLOT1
Controller and communication BMAS Status LEDs showing Runtime Error Codes
ENET
status LEDs SYS resulting from startup, configuration, or
BSLV
RESET
download problems
FLSH
GENA
Monitor port for GE Use
MONITOR
Only
HARD DISK
COM1 RS-232C port for Hard disk connector for GE use

initial controller setup
COM2
COM1

serial communications
LPT1
ISBus drive LAN (Not Used)

Special ports for GE Use,
KEYBOARD
printer, keyboard, and

mouse
GENIUS
MOUSE
Receptacle for Genius cable plug
UCVD
H2
x x
UCVD Controller Front Panel

Specifications
Item Specification
Microprocessor AMD-K6 300 MHz
Memory 16 MB DRAM
8 MB Flash Memory in UCVD
256 KB of level 2 cache
LEDs LEDs on the faceplate provide status information as follows:
ACTIVE Processor is active
SLOT 1 Controller configured as slot 1 controller in VME rack
BMAS VME master access is occurring
ENET Ethernet activity
BSLV VME slave access is occurring
STATUS Display rotating LED pattern when OK.
Display flashing error code when faulted
FLSH Writing to Flash memory
GENX Genius I/O is active
Boolean
Ethernet Interface Twisted pair 10BaseT, RJ-45 connector
TCP/IP protocol used for communication between controller and toolbox
Serial Request Transfer Protocol (SRTP) interface between controller and HMI
Ethernet Modbus protocol supported for communication between controller and third-party
DCS
COM Ports Two micro-miniature 9-pin D connectors
Power Requirements +5 V dc, 6 A
+12 V dc, 200 mA
-12 V dc, 200 mA

UCVB Controller
For more information, refer to The UCVB is a double-slot board using a 133 MHz Intel Pentium processor with 4 MB
GEH-6410, Innovation Series of flash memory and 16 MB of DRAM. A single 10Base2 (BNC connector) Ethernet
Controller System Manual. port provides connectivity to the UDH.
The UCVB contains a double column of eight status LEDs. These LEDs are sequentially
turned on in a rotating pattern when the controller is operating normally. When an error
condition occurs, the LEDs display a flashing error code that identifies the problem.
Mark VI Controller UCVBG1
x x
DLAN DROP
1 0
8
Ethernet port for UDH DLAN network drop number
ETHERNET
communication configuration dip switches (Not Used)

1
ACTIVE H L
SLOT1
Controller and communication BMAS Status LEDs showing Runtime Error Codes
ENET
status LEDs SYS resulting from startup, configuration, or
BSLV
RESET
download problems
FLSH
GENA
Monitor port for GE Use
MONITOR
Only
HARD DISK
COM1 RS-232C port for Hard disk connector for GE use

initial controller setup
COM2
COM1

serial communications
LPT1
DLAN network connection (Not Used)

DLAN
Special ports for GE use,

KEYBOARD
printer, keyboard, and

mouse GENIUS
MOUSE
Receptacle for Genius cable plug
UCVB
G1
x x
UCVB Controller Front Panel

Specifications
Item Specification
Microprocessor Intel Pentium 133 MHz
Memory 16 MB DRAM
4 MB Flash Memory in UCVB
256 KB of level 2 cache
LEDs LEDs on the faceplate provide status information as follows:
ACTIVE Processor is active
SLOT 1 Controller configured as slot 1 controller in VME rack
BMAS VME master access is occurring
ENET Ethernet activity
BSLV VME slave access is occurring
STATUS Display rotating LED pattern when OK.
Display flashing error code when faulted
FLSH Writing to Flash memory
GENX Genius I/O is active
Programming Control block language with analog and discrete blocks; Boolean logic represented in relay
ladder diagram format. Supported data types include:
Boolean
Ethernet Interface Thinwire 10Base2, BNC connector:
TCP/IP protocol used for communication between controller and toolbox
SRTP interface between controller and HMI
Ethernet Modbus protocol supported for communication between controller and third-party DCS
DLAN+ Interface Interface to DLAN+, a high speed multidrop network based on ARCNET, using a token
passing, peer to peer protocol
Power Requirements +5 V dc, 5.64 A
+12 V dc, 900 mA
-12 V dc, 200 mA

Alarms
Fault Fault Description Possible Cause
31 I/O Compatibility Code Mismatch Outdated configuration in the VCMI
32 Diagnostic Queue Overflow Too many diagnostics are occurring simultaneously
33 Foreground Process Outdated runtime version
34 Background Process Outdated runtime version
37 Idle Process Outdated runtime version
38 Ambient Air Overt temperature Warning. The rack The rack fan has failed or the filters are clogged.
is beginning to overheat.
39 CPU Over temperature Fault. The controller CPU The rack fan has failed or the filters are clogged.
has overheated and may fail at any time.
40 Genius I/O Driver Process Outdated runtime version
41 Register I/O Process Outdated runtime version
42 Modbus Driver Process Outdated runtime version
43 Ser Process Outdated runtime version
44 Rcvr Process Outdated runtime version
45 Trans Process Outdated runtime version
46 Mapper Process Outdated runtime version
47 SRTP Process Outdated runtime version
48 Heartbeat Process Outdated runtime version
49 Alarm Process Outdated runtime version
50 Queue Manager Process Outdated runtime version
51 EGD Driver Process Outdated runtime version
52 ADL Dispatcher Process Outdated runtime version
53 ADL Queue Process Outdated runtime version
54 DPM Manager Process Outdated runtime version
68 Genius IOCHRDY Hangup Outdated runtime version
70 Genius Lock Retry Outdated runtime version
71 Genius Outdated runtime version
72 Application Code Online Load Failure Application code error
74 Application Code Startup Load Failure Application code error
75 Application Code Expansion Failure Application code error
76 ADL/BMS Communication Failure with the VCMI The VCMI firmware version is too old to work with
this controller runtime version.
77 NTP Process Outdated runtime version
78 Outdated Controller Topology Download application code and reboot
79 Outdated VCMI Topology Download configuration to VCMI and reboot
80 No VCMI Topology Old VCMI firmware doesnt support controller/VCMI
topology checking. Upgrade VCMI firmware.
81 Platform Process Outdated runtime version

82 Hardware Configuration Error The controller hardware doesnt match the
configuration specified by the toolbox. Use the
toolbox to view the errors in the controller trace buffer
(for example: View General Dump the trace buffer).
83 Register I/O Write/Command Limit Exceeded Verify that the total command rate of all Modbus
interfaces does not exceed the maximum.
84 State Exchange Voter Packet Mismatch Verify that all three controllers are executing the
same application code.
85 Maximum Number of Boolean State Variables The application code is using too many Boolean
Exceeded variables. Move some functions to other controllers.
86 Too Many EGD Producers Configured for Fault The controller can redirect data over the IONET
Tolerant Support from a maximum of 16 EGD producers. Data from
subsequent producers will be lost in the event of an
Ethernet failure.
87 Too Many EGD Points Configured for Fault Tolerant The controller can redirect a maximum of 1400 bytes
Support of data over the IONET. Subsequent EGD points will
be lost in the event of an Ethernet failure.
88 Producing Fault Tolerant EGD Data The controller is redirecting data from the Ethernet
to another controller over the IONET.
89 Requesting Fault Tolerant EGD Data The controller is requesting that Ethernet data
be redirected to it over the IONET from another
controller.
90 Process Alarm Queue Is Full Subsequent process alarms will be lost unless the
current alarms are acknowledged and cleared by
the operator.
91 Hold List Queue Is Full Subsequent hold alarms will be lost unless the
current alarms are acknowledged and cleared by
the operator.
92 Data Initialization Failure Verify that all controllers are executing the same
application code. If no VCMI is used (simulation
mode), verify that the clock source is set to internal.
If a VCMI is used, verify that the clock source is set
to external.
93 Pcode mismatch between TMR controllers Download the same application code to all three
controllers
94 Unable to start up Dynamic Data Recorder Outdated runtime version - download runtime and
restart.
95 Dynamic Data Recorder Configuration Fault Revalidate the application code and then select the
Update Dynamic Data Recorder button from the
toolbox toolbar
96 Dynamic Data Recorder Process Outdated runtime version - download runtime and
restart

UCV Board UCVD Controller Runtime Errors
For all controllers, refer to the In addition to generating diagnostic alarms, the UCVB and the UCVD controller
stats line in the toolbox. boards display status information on front panel LEDs. The Status LED group on
these controllers contains eight segments in a two vertical column layout as shown in
the following figure. These LEDs display controller errors if a problem occurs. The
right-most column makes up the lower hexadecimal digit and the left-most column
makes up the upper digit (the least significant bits on the bottom). Numerical conversions
are provided with the fault code definitions.
Controller front panel For example, flashing F

in this pattern:
H L
ACTIVE
SLOT1 S
BMAS
ENET T
A F
SYS
BSLV T
U F
S
F
FLSH
GENA
is error 0x43, decimal 67
Flashing Controller Status LEDs Indicate Error Codes

If the controller detects certain system errors (typically during boot-up or download),
it displays flashing and non-flashing codes on these green status LEDs. These codes
correspond to runtime errors listed in the toolbox help file. The following table describes
the types of errors displayed by the LEDs.
Controller Runtime Errors
Controller Condition Status LED Display

Controller successfully completes Displays a walking ones pattern consisting of a single lighted green LED rotating
its boot-up sequence and begins to through the bank of LEDs.
execute application code
Error occurs during the BIOS phase Non-flashing error code is displayed
of the boot-up sequence
Error occurs during the application Flashing error codes are displayed until the error has been corrected and either the
code load application code is downloaded again, or the controller is rebooted.
Error occurs while the controller is May freeze with only a single LED lighted. No useful information can be interpreted
running from the LED position. Fault codes are generated internally.

Analog Input/Output (VAIC)
VAIC Analog Input/Output
Functional Description
The Analog Input/Output (VAIC) board accepts 20 analog inputs and controls 4 analog
outputs. Each terminal board accepts 10 inputs and 2 outputs. Cables connect the
terminal board to the VME rack where the VAIC processor board is located. VAIC
converts the inputs to digital values and transfers them over the VME backplane to the
VCMI board, and then to the controller. For outputs, the VAIC converts digital values to
analog currents and drives these through the terminal board into the customer circuit.
VAIC supports both simplex and triple modular redundant (TMR) applications. When
used in a TMR configuration, input signals on the terminal board are fanned out to three
VME board racks R, S, and T, each containing a VAIC. Output signals are driven with a
proprietary circuit that creates the desired current using all three VAICs. In the event
of a hardware failure, the bad VAIC is removed from the output and the remaining two
boards continue to produce the correct current. When used in a simplex configuration,
the terminal board provides input signals to a single VAIC, which provides all of the
current for outputs.
Compatibility
There are two generations of the VAIC board with corresponding terminal boards. The
original VAIC includes all versions prior to and including VAICH1C. VAICH1B is
included in this generation. When driving 20 mA outputs these boards support up to 500
load resistance at the end of 1000 ft of #18 wire. This generation of board requires
terminal board TBAIH1B or earlier for proper operation. They also work properly with
all revisions of DTAI terminal boards.
The newest VAICH1D and any subsequent releases are designed to support higher load
resistance for 20 mA outputs drive voltage: up to 18 V is available at the terminal board
screw terminals. This permits operation into loads of 800 with 1000 ft of #18 wire with
margin. This generation of the board requires TBAIH1C or later, or any revision of STAI.
3-1 Analog Input/Output (VAIC) GEH-6421Q Mark* VI Control

VME Rack R x
VAIC Board RUN

FAIL
STAT
TBAI Terminal Board TBAI Terminal Board
VME bus to VCMI

x JT1 x JT1
x x x x
x x x x
x x x x
x x x x
x x x x
x x x x
x x x x
x x x x Cable to VME
x x x x
x x JS1 To x x JS1 Rack T
x x x x
x x Rack x x
x T x
x x
x x x x
x x x x
x x
x
x To x
x Cable to VME VAIC
x
x
JR1 x
x JR1
x
x
Rack x
x Rack S
x
x x
x x S x x
x
x x x
x x x x J3
x x x x
x x x x
x x x x
x x
J4
VAIC, Analog Input Terminal Boards, and Cabling (TMR System)

Installation
To install the V-type board
1. Power down the VME processor rack
2. Slide in the board and push the top and bottom levers in with your hands to seat
its edge connectors
3. Tighten the captive screws at the top and bottom of the front panel
Note Cable connections to the terminal boards are made at the J3 and J4 connectors
on the lower portion of the VME rack. These are latching type connectors to secure the
cables. Power up the VME rack and check the diagnostic lights at the top of the front
panel. For details, refer to the section on diagnostics in this document.
GEH-6421Q System Guide, Volume II Analog Input/Output (VAIC) 3-2

Operation
The VAIC board accepts 20 analog inputs, controls 4 analog outputs, and contains signal
conditioning, an analog MUX, A/D converter, and D/A converter. The type of analog
input, either voltage, 4-20 mA, or 1 mA, is selected by jumpers on the terminal board.
Two of the four analog output circuits are 4-20 mA and the other two can be configured
for 4-20 mA or 0-200 mA. Inputs and outputs have noise suppression circuitry to protect
against surge and high frequency noise.
The following table displays the analog I/O capacity of VAIC, using two TBAI terminal
boards.
Quantity Analog Input Types Quantity Analog Output Types

16 10 V dc, or 5 V dc, or 4-20 mA 2 0-20 mA or 0-200 mA
4 4-20 mA, or 1 mA 2 0-20 mA
Analog Input Terminal Board <R> Module

TBAI
8 circuits per Controller
terminal board Application Software
Typical transmitter, Noise
Mark VI powered Suppr-
ession
+24 V dc P28V
Current Limit
+/-5,10 Vdc J#A Analog Input

Vdc
T N Board VAIC
4-20 ma S 20 ma
Return 250 ohms A/D D/A

J#B
Open Return
PCOM Connectors
at
2 circuits per
terminal board bottom of
VME rack
P28V
+24 V dc Current Limit Excitation
1 ma J#A JR1 J3/4
+/-1 ma N
S 20 ma
4-20 ma 250
ohm 5k ohms
Return
J#B
Return
Open
Current
Two output circuits Regulator/
Jump select on one Power Supply
circuit only; #2 Circuit 200 ma
is 4-20 ma only
JO
Signal 20 ma
N
S
Return
ID
SCOM
VAIC and Analog Input Terminal Board, Simplex System

In a TMR system, analog inputs fan out to the three control racks from JR1, JS1, and
JT1. The 24 V dc power to the transducers comes from all three VME racks and is diode
OR selected on the terminal board. Each analog current output is fed by currents from all
three VAICs. The actual output current is measured with a series resistor, which feeds a
voltage back to each VAIC. The resulting output is the voted middle value (median) of
the three currents. The following figure shows VAIC in a TMR arrangement.
Terminal Board TBAI <R> Module
8 circuits per Controller

Typical transmitter, termination board Application Software
Noise
Mark VI powered
Suppr-
P28V<T>
ession P28VR P28V<S>
+24 V dc Current Limit
J#A Analog Input

+/-5,10 Vdc Vdc
T N Board VAIC
4-20 ma S 20 ma
Return 250 ohms A/D D/A

J#B
Open Return
PCOM
Connectors
at
2 circuits per bottom of
termination board VME rack
P28VR
+24 Vdc Current Limit Excitation
+/-1 ma 1 ma J#A JR1 J3/J4
N Filter 2 Pole
4-20 ma S 20 ma
250
ohm 5k ohms
Return
J#B
Open Return
PCOM S ID Current
T Regulator/
Two output circuits JO Power Supply
#2 circuit is 4-20 200 ma
mA only
Signal 20 ma
N S JS1
S T
Return
SCOM
ID
JT1 To rack<S>
To rack<T>
ID
VAIC and Analog Input Terminal Board, TMR System

With the noise suppression and Transmitters/transducers can be powered by the 24 V dc source in the control system,
filtering, the input ac common or can be powered independently. Diagnostics monitor each output and a suicide relay
mode rejection (CMR) is 60 dB, disconnects the corresponding output if a fault cannot be cleared by a command from
and the dc CMR is 80 dB. the processor. Hardware filters on the terminal board suppress high frequency noise.
Additional software filters on VAIC provide configurable low pass filtering.

Compressor Stall Detection
VAIC firmware includes gas turbine compressor stall detection, executed at 200 Hz. Two
stall algorithms can be selected. Both use the first four analog inputs, scanned at 200 Hz.
One algorithm is for small LM gas turbines and uses two pressure transducers (refer to
the figure, Small (LM) Gas Turbine Compressor Stall Detection Algorithm). The other
algorithm is for heavy-duty gas turbines and uses three pressure transducers (refer to the
figure, Heavy Duty Gas Turbine Compressor Stall Detection Algorithm).
Real-time inputs are separated from the configured parameters for clarity. The parameter
CompStalType selects the type of algorithm required, either two transducers or three.
PS3 is the compressor discharge pressure. A drop in this pressure (PS3 drop) indicates
possible compressor stall. The algorithm also calculates the rate of change of discharge
pressure, dPS3dt, and compares these values with configured stall parameters (KPS3
constants).
The compressor stall trip is initiated by VAIC, which sends the signal to the controller
where it is used to initiate a shutdown. The shutdown signal can be used to set all the fuel
shut-off valves (FSOV) through any relay output.

Input VAIC, 200 Hz scan rate *Note: where x, y, represent any two Signal Space
Config of the input circuits 1 thru 4. Inputs
Input, cctx* param.
AnalogInx*
Scaling
Low_Input, Low_Value,
High_Input, High Value 4
Sys Lim Chk #1
SysLim1Enabl, Enabl SysLimit1_x*
4
SysLim1Latch, Latch
SysLim1Type, >=
SysLimit1, xxxx
ResetSys, VCMI, Mstr Sys Lim Chk #2
4 SysLimit2_x*
SysLim2Enabl, Enabl AnalogIny*
SysLim2Latch, Latch
SysLimit1_y*
SysLim2Type, <=
SysLimit2, xxxx SysLimit2_y*
Validation & Stall Detection

CompStalType two_xducer PS3B_Fail
OR PS3A_Fail OR
Input Circuit Selection PS3A PS3B
InputForPS3A eg. AnalogIn2
InputForPS3B PS3A_Fail
eg. AnalogIn4 PS3_Fail
PS3B_Fail AND
PS3A A
|A-B| A
PS3B DeltaFault
B A>B
PressDelta B
PS3Sel Selection Definition
If PS3B_Fail & not PS3A_Fail
SelMode Max then PS3Sel = PS3A;
ElseIf PS3A_Fail & not PS3B_Fail
PS3A then PS3Sel = PS3B;
ElseIf DeltaFault
then PS3Sel = Max (PS3A, PS3B)
PS3B ElseIf SelMode = Avg PS3Sel PressSel
then PS3Sel = Avg (PS3A, PS3B)
PS3A_Fail ElseIf SelMode = Max
then PS3Sel = Max (PS3A, PS3B) d DPS3DTSel
__
Else
PS3B_Fail then PS3SEL = old value of PS3SEL dt PressRateSel
-DPS3DTSel
-1 X
TimeDelay
-DPS3DTSel TD
KPS3_Drop_Mx PS3_Fail
KPS3_Drop_Mn
KPS3_Drop_I A Mid A AND
KPS3_Drop_S A+B A>B
X B B
z-1
stall_timeout
PS3i
PS3Sel X stall_set
KPS3_Delta_S AND S
A
delta_ref CompStall
KPS3_Delta_I A+B MIN Latch
B A R
stall_delta
KPS3_Delta_Mx delta AB AND
B PS3Sel BA-B stall_permissive
CompStalPerm
MasterReset, VCMI, Mstr
Small (LM) Gas Turbine Compressor Stall Detection Algorithm

Input VAIC, 200 Hz scan rate *Note: where x, y, z, represent any
Signal Space
Config. three of the input circuits 1 thru 4. inputs
param. Scaling
Input, cctx* AnalogInx*
Low_Input, Low_Value,
High_Input, High Value 4 Sys Lim Chk #1
SysLim1Enabl, Enabl SysLimit1_x*
4
SysLim1Latch, Latch
SysLim1Type, >=
SysLimit1, xxxx
ResetSys, VCMI, Mstr
Sys Lim Chk #2
4 SysLimit2_x*
SysLim2Enabl, Enabl
AnalogIny*
SysLim2Latch, Latch SysLimit1_y*
SysLim2Type, <=
SysLimit2_y*
SysLimit2, xxxx
AnalogInz*
SysLimit1_z*
SysLimit2_z*
Stall Detection
CompStalType
three_xducer
not used DeltaFault

Input Circuit Selection
InputForPS3A
eg. AnalogIn1
InputForPS3B
eg. AnalogIn2
InputForPS3C
eg. AnalogIn4
PS3C
PS3B MID PS3Sel, or CPD PressSel
PressDelta not used PS3A SEL
d DPS3DTSel
__
SelMode not used dt PressRateSel
-DPS3DTSel
-1 X
TimeDelay
TD
-DPS3DTSel
KPS3_Drop_Mx
KPS3_Drop_Mn
KPS3_Drop_I MID A
A
KPS3_Drop_S A+B A>B
X B B
z-1
stall_timeout
PS3i
PS3Sel X stall_set
KPS3_Delta_S S
A AND CompStall
A+B delta_ref Latch
KPS3_Delta_I MIN stall_
B A
KPS3_Delta_Mx delta R
delta AB PS3i_Hold A
B AND A-B
PS3Sel stall_permissive
B
CompStalPerm
MasterReset, VCMI, Mstr
Heavy Duty Gas Turbine Compressor Stall Detection Algorithm

200
0
B. Delta PS3 drop (PS3 initial - PS3 actual) , DPS3, psid

180 25
0 0
D
Rate of Change of Pressure- dPS3dt, psia/sec
A. KPS3_Drop_S
B. KPS3_Drop_I
C. KPS3_Drop_Mn
140 D. KPS3_Drop_Mx 20
0 0
120 A
0
100 15
0 0
80
0
60 10
0 0
G
40 E
0
20 5
C
0 0
E. KPS3_Delta_S
B
0 F. KPS3_Delta_I
F G. KPS3_Delta_Mx
-200 0
0 100 200 300 400 500 600 700
Initial Compressor Discharge Pressure PS3
Configurable Compressor Stall Detection Parameters

The variables used by the stall detection algorithm are defined as follows:
Variable Variable Description

PS3 Compressor discharge pressure
PS3I Initial PS3
KPS3_Drop_S Slope of line for PS3I versus dPS3dt
KPS3_Drop_I Intercept of line for PS3I versus dPS3dt
KPS3_Drop_Mn Minimum value for PS3I versus dPS3dt
KPS3_Drop_Mx Maximum value for PS3I versus dPS3dt
KPS3_Delta_S Slope of line for PS3I versus Delta PS3 drop
KPS3_Delta_I Intercept of line for PS3I versus Delta PS3 drop
KPS3_Delta_Mx Maximum value for PS3I versus Delta PS3 drop

Specifications
Item Specification
Number of channels 24 channels per VAIC board (20 AI, 4 AO) with two terminal boards
Input span 4-20 mA, 1 mA, 5 V dc, 10 V dc
Input Impedance 250 at 4-20 mA
5,000 at 1 mA
500,000 at voltage input
Input converter resolution 16-bit A/D converter with 14-bit resolution
Scan time Normal scan 10 ms (100 Hz)
Inputs 1 through 4 available for scan at 200 Hz
Measurement accuracy Better than 0.1% full scale
Noise suppression on inputs The first 10 circuits (J3) have a hardware filter with single pole down break at 500 rad/sec
The second 10 circuits (J4) have a hardware filter with a two pole down break at 72 and
500 rad/sec
A software filter, using a two pole low pass filter, is configurable for 0, .75, 1.5 Hz, 3 Hz, 6
Hz, 12 Hz
Common mode rejection Ac CMR 60 dB @ 60 Hz, with up to 5 V common mode voltage
Dc CMR 80 dB with -5 to +7 peak volt common mode voltage
Common mode voltage range 5 V (2 V CMR for the 10 V inputs)
Output converter 12-bit D/A converter with 0.5% accuracy
Output load 500 for 4-20 mA output board revisions prior to and including VAICH1C (requires
TBAIH1B or DTAI)
800 for 4-20 mA output, board revisions VAICH1D and later (requires TBAIH1C or STAI)
50 for 200 mA output
Power consumption Less than 31 MW
Compressor stall detection Detection and relay operation within 30 ms
Fault detection Analog input out of limits
Monitor D/A outputs, output currents, and total current
Monitor suicide relay and 20/200 mA scaling relays
Compare input signals with the voted value and check difference against the TMR limit
Failed I/O chip
Physical
Temperature 0 to 60C (32 to 140 F)
Size 26.04 cm high x 1.99 cm wide x 18.73 cm deep (10.26 in x 0.782 in x 7.375 in )

Diagnostics
Three LEDs at the top of the VAIC front panel provide status information. The normal
RUN condition is a flashing green, and FAIL is a solid red. The third LED displays
STATUS and is normally off, but displays a steady orange if a diagnostic alarm condition
exists in the board. Diagnostic checks include the following:
Each analog input has hardware limit checking based on preset (non-configurable)
high and low levels set near the ends of the operating range. If this limit is exceeded
a logic signal is set and the input is no longer scanned. If any one of the inputs
hardware limits is set, it creates a composite diagnostic alarm, L3DIAG_VAIC,
which refers to the entire board. Details of the individual diagnostics are available
from the toolbox. The diagnostic signals can be individually latched, and then reset
with the RESET_DIA signal.
Each input has system limit checking based on configurable high and low levels.
These limits can be used to generate alarms, and can be configured for enable/disable,
and as latching/non-latching. RESET_SYS resets the out of limits.
In TMR systems, if one signal varies from the voted value (median value) by more
than a predetermined limit, that signal is identified and a fault is created. This can
provide early indication of a problem developing in one channel.
Monitor D/A outputs, output currents, total current, suicide relays and 20/200 mA
scaling relays; these are checked for reasonability and can create a fault.
TBAI has its own ID device that is interrogated by VAIC. The board ID is coded into
a read-only chip containing the terminal board serial number, board type, revision
number, and the JR, JS, JT connector location. When the chip is read by the I/O
processor and a mismatch is encountered, a hardware incompatibility fault is created.

Configuration
Parameters
Parameter Description Choices

Configuration
System limits Enable or disable system limits Enable, disable
Output voting Select type of output voting Simplex, simplex TMR
Min_ MA_Input Select minimum current for healthy 4-20 mA input 0 to 21 mA
Max_ MA_Input Select maximum current for healthy 4-20 mA input 0 to 21 mA
CompStalType Select compressor stall algorithm (# of transducers) 0, 2, or 3
InputForPS3A Select analog input circuit for PS3A Analog in 1, 2, 3, or 4
InputForPS3B Select analog input circuit for PS3B Analog in 1, 2, 3, or 4
InputForPS3C Select analog input circuit for PS3C Analog in 1, 2, 3, or 4
SelMode Select mode for excessive difference pressure Maximum, average
PressDelta Excessive difference pressure threshold 5 to 500
TimeDelay Time delay on stall detection, in milliseconds 10 to 40
KPS3_Drop_Min Minimum pressure rate 10 to 2000
KPS3_Drop_I Pressure rate intercept 10 to 100
KPS3_Drop_S Pressure rate slope 0.05 to 10
KPS3_Delta_S Pressure delta slope 0.05 to 10
KPS3_Delta_I Pressure delta intercept 10 to 100
KPS3_Delta_Mx Pressure delta maximum 10 to 100
KPS3_Drop_L Threshold pressure rate 10 to 2000
KPS3_Drop_Mx Max pressure rate 10 to 2000
J3:IS200TBAIH1A Terminal board connected to VAIC through J3 Connected, not connected
AnalogIn1 First of 10 analog inputs - board point Point edit (input FLOAT)
Input type Current or voltage input type Unused, 4-20 mA, 5 V, 10 V
Low_Input Value of current at the low end of scale -10 to +20
Low_Value Value of input in engineering units at low end of scale -3.4082e + 038 to 3.4028e + 038
High_Input Value of current at the high end of scale -10 to +20
High_Value Value of input in engineering units at high end of scale -3.4082e + 038 to 3.4028e + 038
Input _Filter Bandwidth of input signal filter Unused, 0.75, 1.5 Hz, 3 Hz, 6 Hz, 12 Hz
TMR_Diff_Limit Difference limit for voted inputs in % of high-low values 0 to 100
Sys_Lim_1_Enable Input fault check Enable, disable
Sys_Lim_1_Latch Input fault latch Latch, unlatch
Sys_Lim_1_Type Input fault type Greater than or equal
Less than or equal
Sys_Lim_1 Input limit in engineering units -3.4082e + 038 to 3.4028e + 038
Sys_Lim_2_Enable Input fault check Enable, disable

Less than or equal
Sys_Lim_2 Input limit in engineering units -3.4082e + 038 to 3.4028e + 038
AnalogOut1 First of two analog outputs - board point Point edit (output FLOAT)
Output_MA Type of output current Unused, 0-20 mA, 0-200 mA
Low_MA Output mA at low value 0 to 200 mA
Low_Value Output in engineering units at low mA -3.4082e + 038 to 3.4028e + 038
High_MA Output mA at high value 0 to 200 mA
High_Value Output value in engineering units at high mA -3.4082e + 038 to 3.4028e + 038
TMR Suicide Suicide for faulty output current, TMR only Enable, disable
Diff Limit Current difference for suicide, TMR only 0 to 200 mA
D/A Err Limit Difference between D/A reference and output, in % for 0 to 100 %
suicide, TMR only
J4:IS200TBAIH1A Terminal board connected to VAIC via J4 Connected, not connected
AnalogIn11 First of 10 analog inputs - board point Point edit (input FLOAT)
AnalogOut3 First of two analog outputs - board point Point edit (output FLOAT)

Board Points
Board Points (Signals) Description - Point Edit (Enter Signal Connection) Direction Type
L3DIAG_VAIC1 Board diagnostic Input BIT
SysLimit1_1 System limit 1 Input BIT
: : Input BIT
: : Input BIT
OutSuicide1 Status of suicide relay for output 1 Input BIT
: : Input BIT
DeltaFault Excessive difference pressure Input BIT
CompStall Compressor stall Input BIT
: : Input FLOAT
Out4MA Feedback, total output current, mA Input FLOAT
CompPressSel Selected compressor press, by stall Algor. Input FLOAT
PressRate Sel Selected compressor press rate, by stall Algor. Input FLOAT
CompStallPerm Compressor stall permissive Output BIT

Alarms
2 Flash memory CRC failure Board firmware programming error (board will not
go online)
3 CRC failure override is active Board firmware programming error (board is allowed
to go online)
16 System limit checking is disabled System checking was disabled by configuration
17 Board ID failure Failed ID chip on the VME I/O board
18 J3 ID failure Failed ID chip on connector J3, or cable problem
24 Firmware/hardware incompatibility. The firmware Invalid terminal board connected to VME I/O board-
on this board cannot handle the terminal board it is check the connectors and call the factory
connected to
30 ConfigCompatCode mismatch. Firmware: [ ] ; Tre: A tre file has been installed that is incompatible with
[ ] The configuration compatibility code that the the firmware on the I/O board. Either the tre file or
firmware is expecting is different than what is in the firmware must change. Contact the factory
tre file for this board
31 IOCompatCode mismatch. Firmware: [ ]; Tre: [ ] The A tre file has been installed that is incompatible with
I/O compatibility code that the firmware is expecting the firmware on the I/O board. Either the tre file or
is different than what is in the tre file for this board firmware must change. Contact the factory
32-65 Analog input [ ] unhealthy Excitation to transducer, bad transducer, open or
short-circuit
66-69 Output [ ] individual current too high relative to total Board failure
current. An individual current is N mA more than
half the total current, where N is the configurable
TMR_Diff Limit
70-73 Output [ ] total current varies from reference current. Board failure or open circuit
Total current is N mA different than the reference
current, where N is the configurable TMR_Diff Limit
74-77 Output [ ] reference current error. The difference Board failure (D/A converter)
between the output reference and the input feedback
of the output reference is greater than the configured
DA_Err Limit measured in percent
78-81 Output [ ] individual current unhealthy. Simplex mode Board failure
only alarm if current out of bounds
82-85 Output [ ] suicide relay non-functional. The shutdown Board failure (relay or driver)
relay is not responding to commands
86-89 Output [ ] 20/200 mA selection non-functional. Configured output type does not match the jumper
feedback from the relay indicates incorrect 20/200 selection, or VAIC board failure (relay)
mA relay selection (not berg jumper selection)
90-93 Output [ ] 20/20 mA suicide active. One output of Board failure
the three has suicided, the other two boards have
picked up current
94 J3 terminal board and configuration incompatible
95 J4 terminal board and configuration incompatible

128-223 Logic Signal [ ] voting mismatch. The identified A problem with the input. This could be the device,
signal from this board disagrees with the voted value the wire to the terminal board, the terminal board,
or the cable
224-249 Input Signal # voting mismatch, Local [ ], Voted [ A problem with the input. This could be the device,
]. The specified input signal varies from the voted the wire to the terminal board, the terminal board,
value of the signal by more than the TMR Diff Limit or the cable

TBAI Analog Input/Output
The Analog Input/Output (TBAI) terminal board supports 10 analog inputs and 2 outputs.
The 10 analog inputs accommodate two-wire, three-wire, four-wire, or externally
powered transmitters. The analog outputs can be set up for 0-20 mA or 0-200 mA
current. Inputs and outputs have noise suppression circuitry to protect against surge
and high frequency noise.
TBAI has three DC-37 pin connectors provided on TBAI for connection to the I/O
processors. Simplex applications are supported using a single connector (JR1). TMR
applications are supported using all three connectors.
In TMR applications, the input signals are fanned to the three connectors for the R, S, and
T controls. TMR outputs combine the current of the three connected output drivers and
determine the total current with a measuring shunt. TBAI then presents the total current
signal to the I/O processors for regulation to the commanded setpoint.
Control System TBAI Functionality

Mark VI control The board works with the VAIC pack and supports simplex
and TMR applications. One or two TBAIs can be connected
to the VAIC. In TMR systems, TBAI is cabled to three VAIC
packs.
Mark VIe control The board works with the PAIC I/O pack and supports simplex
and TMR applications. In TMR systems, three PAICs plug
directly into the TBAI.
Mark VIeS control Board revision TBAIS1C is safety certified and required. The
200 mA output option is not supported by YAIC in the Mark
VIeS SIS. The same terminal board can be used for TMR
applications.
Control Compatibility
Board Revision Mark VI Mark VIe Mark VIeS Comments

IS200VAIC IS220PAIC IS200YAIC
TBAIH1A VAICH1C No No Use TBAIH2C as replacement part
and earlier
TBAIH1B VAICH1C No No Use TBAIH2C as replacement part
and earlier
TBAIH1C VAICH1D Yes, all versions No Current production.
and later
TBAIH2C VAICH1C No (lowered No Compatible with early production
and earlier output VAIC with lower output compliance
compliance) voltage.
TBAIS1C No Yes, all versions Yes, all versions Safety system certified.

x
x
x 1
JT1
x 2
x 4
x 3
x 6
x 5
x 8
x 7
x 10
x 9
x 12
x 11
x 14
x 13 J ports conections:
x 16
x 15
x 17 Plug in I/O Pack for
x 18
10 Analog Inputs x 20
x 19 JS1 Mark VIe System
2 Analog Outputs x 22
x 21
x 24
x 23
x Plug in YAIC I/O Pack for
Mark VIeS system
x
x 26
x 25
x 27 or
x 28
x 30
x 29
x 32
x 31
x 33 JR1 Cables to boards
x 34
x 36
x 35 for Mark VI System
x 38
x 37
x 40
x 39
x 42
x 41 The number and location
x 44
x 43 depends on the level of
x 46
x 45 redundancy required.
x 48
x 47
x
x
Shield bar Barrier type terminal

blocks can be unplugged
from board for maintenance
TABI Input Terminal Board

Installation
Connect the input and output wires directly to two I/O terminal blocks mounted on
the terminal board. Each block is held down with two screws and has 24 terminals
accepting up to #12 AWG wires. A shield terminal attachment point is located adjacent
to each terminal block.
TBAI can accommodate the following analog I/O types:
Analog input, two-wire transmitter
Analog input, three-wire transmitter
Analog input, four-wire transmitter
Analog input, externally powered transmitter
Analog input, voltage 5 V, 10 V dc
Analog output, 0-20 mA
Analog output, 0-200 mA
The following diagram shows the wiring connections, jumper positions, and cable
connections for TBAI.

Board Jumpers
Analog Input Terminal Board TBAI JT1
Circuit Jumpers
20mA/V dc Open/Ret
x
x 1 Input 1 (24V) Input 1 J1A J1B
Input 1 (20ma) x 2
x 3 Input 1 ( Vdc)
Input 1 (Ret) x 4
Input 2 (20ma) x 6
Input 2 (Ret)
x 7 Input 2 ( Vdc)
x 8
Input 3 (20ma) x 10
Input 3 (Ret)
x 11 Input 3 ( Vdc)
x 12
Input 4 (20ma) x 14
x 15 Input 4 ( Vdc)
Input 4 (Ret) x 16
x 17 Input 5 (24V) Input 5 J5A J5B JS1 J ports connections:
Input 5 (20ma) x 18
x 19 Input 5 ( Vdc)
Input 5 (Ret) x 20
Input 6 (20ma) x 22 Plug in I/O Pack for
x 23 Input 6 ( Vdc)
Input 6 (Ret) x 24 Mark VIe System or
x Cable(s) to Board(s)
for Mark VI
x
Input 7 (20ma) x 26 The number and location
Input 7 (Ret)
x 27 Input 7 ( Vdc)
Input 8 (20ma)
x 31 Input 8 ( Vdc) 20mA/1 mA Open/Ret
Input 8 (Ret) x 32 JR1
Input 9 (20ma)
x 34
Input 9 (Ret)
x 35 Input 9 (1ma)
x 36
Input 10 (20ma)
x 38
x 39 Input 10 (1ma)
Input 10 (Ret) x 40
PCOM
x 41 PCOM
x 42
x 43 PCOM 20mA/200mA
PCOM x 44
x 45 Output 1 ( Sig) Output 1 J0
Output 1 (Ret) x 46
x 47 Output 2 ( Sig) Output 2 No Jumper (0-20mA)
Output 2 (Ret) x 48
x
Two-wire +24 V dc Three-wire +24 V dc

transmitter transmitter wiring
wiring 4-20mA Voltage input VDC J#A 4-20 mA Voltage input VDC J#A
T
4-20 ma 20 ma 4-20 ma 20 ma
T
Return Return
Open J#B Open J#B
PCOM
Externally powered +24 V dc Four-wire +24 V dc

transmitter wiring transmitter wiring
J#A
4-20 mA Voltage input VDC J#A 5 V dc Voltage input VDC
4-20 ma 20 ma T 4-20 ma 20 ma
+ +
Power
T Return Signal Return
Supply - -
Open J#B Max. common Open J#B
mode voltage Misc return PCOM
is 7.0 V dc to PCOM
PCOM
TBAI Terminal Board Wiring

Operation
TBAI provides a 24 V dc power source for all the transducers. The inputs can be
configured as current or voltage inputs using jumpers (J#A and J#B). One of the two
analog output circuits is 4-20 mA and the other can be configured as 4-20 mA or 0-200
mA. The following table displays the analog I/O capacity of TBAI.

2 4-20 mA, or 1 mA 1 0-20 mA
Note With the noise suppression and filtering, the input ac CMR is 60 dB, and the
dc CMR is 80 dB.
Each 24 V dc power output is rated to deliver 21 mA continuously and is protected

against operation into a short circuit. Transmitters/transducers can be powered by the
24 V dc source in the control system, or can be independently powered. Jumper JO
selects the type of current output. Diagnostics monitor each output and a suicide relay in
the I/O controller disconnects the corresponding output if a fault cannot be cleared by
a command from the processor.

Terminal Board TBAI
8 circuits per I/O CONTROLLER

terminal board
Application Software
SYSTEM Noise
POWERED Suppr-
ession
+24 V dc P28V
Current Limit
+/-5,10 Vdc Vdc J#A

T N
4-20 ma S 20 ma
250 ohms
Return
J#B
Open Return R
PROCESSOR
PCOM
2 circuits per
termination board
A/D D/A
P28V
1 ma J#A JR1
+/-1 ma N
S 20 ma
4-20 ma 250
ohm 5k ohms
Return
J#B
Return
Open
Current
Regulator/
Two output circuits
Jump select on one Power Supply
circuit only; #2 Circuit 200 ma
is 4-20 ma only
JO
Signal 20 ma
N
S
Return
ID
SCOM
Simplex Analog Inputs and Outputs

In a TMR system, analog inputs fan out to the three I/O packs. The 24 V dc power to the
transducers comes from all three controllers and is diode shared on TBAI. Each analog
current output is fed by currents from all three controllers. The actual output current is
measured with a series resistor, which feeds a voltage back to each I/O controller. The
resulting output is the voted middle value (median) of the three currents. The following
figure shows TBAI in a TMR system.
I/O CONTROLLER
Terminal Board TBAI
8 circuits per Application Software
Terminal board
SYSTEM Noise
POWERED Suppr-
P28V<T>
ession P28VR P28V<S>
+24 V dc Current Limit
+/-5,10 Vdc Vdc J#A

T N
4-20 ma S 20 ma
250 ohms
Return
J#B
Open Return
R
PCOM PROCESSOR
2 circuits per
terminal board A/D D/A
P28VR
+24 Vdc Current Limit Excitation
1 ma J#A JR1
+/-1 ma N
4-20 ma S 20 ma
250
ohm 5k ohms
Return
J#B
Open Return
PCOM S ID Current
T Regulator/
Two output circuits, JO Power Supply
#2 circuit is 4-20 200 ma
mA only
Signal 20 ma
N S JS1
S T
Return
To S PROCESSOR
SCOM
ID
JT1
To T PROCESSOR
ID
Analog Inputs and Outputs, TMR

Specifications
Item Specification
Number of channels 12 channels (10 AI, 2 AO)
Input span, transmitters 1-5 V dc from 4-20 mA current input
Outputs 24 V outputs provide 21 mA each connection
Maximum lead resistance 15 maximum two-way cable resistance, cable length up to 300 m (984 ft)
Output load 500 for 4-20 mA output, TBAIH1B with VAICH1C
800 for 4-20 mA output, TBAIH1C with VAICH1D
800 for 4-20 mA output, TBAIH1C with PAIC
800 for 4-20 mA output, TBAIS1C with YAIC
50 for 200 mA
Physical
Fault detection Monitor total output current
Check connector ID chip for hardware incompatibility
Temperature -30 to 65C (-22 to +149 F)
Size 10.16 cm wide x 33.02 cm high ( 4.0 in x 13 in)
Diagnostics
Diagnostic tests are made on the terminal board as follows:
The board provides the voltage drop across a series resistor to indicate the output
current. The I/O processor creates a diagnostic alarm (fault) if any one of the two
outputs goes unhealthy.
Each cable connector on the terminal board has its own ID device that is interrogated
by the I/O controller. The ID device is a read-only chip coded with the terminal
board serial number, board type, revision number, and the JR, JS, JT connector
location. When this chip is read by the I/O controller and a mismatch is encountered,
a hardware incompatibility fault is created.
Configuration
The terminal board is configured by jumpers. For the location of these jumpers, refer to
the installation diagram. The jumper choices are as follows:
Jumpers J1A through J8A select either current input or voltage input.
Jumpers J1B through J8B select whether the return is connected to common or is
left open.
Jumpers J9A and J10A select either 1 mA or 20 mA input current.
Jumpers J9B and J10B select whether the return is connected to common or is left
open.
Jumper J0 sets output 1 to either 20 mA or 200 mA.

DTAI Simplex Analog Input/Output
The Simplex Analog Input/Output (DTAI) terminal board is a compact analog input
terminal board designed for DIN-rail mounting. The board has 10 analog inputs and 2
analog outputs and connects to the VAIC processor board with a single cable. This cable
is identical to those used on the larger TBAI terminal board. The terminal boards can be
stacked vertically on the DIN-rail to conserve cabinet space.
The 10 analog inputs accommodate two-wire, three-wire, four-wire, or externally
powered transmitters. The two analog outputs are 0-20 mA, but one can be jumper
configured to a 0-200 mA current. Two DTAI boards can be connected to VAIC for a total
of 20 analog inputs and 4 analog outputs. Only a simplex version of the board is available.
The functions and on-board noise suppression are the same as those on the TBAI.
High-density euro-block type terminal blocks are permanently mounted to the board,
with two screw connections for the ground connection (SCOM). An on-board ID chip
identifies the board to the VAIC for system diagnostic purposes.
Installation
There is no shield terminal strip Mount the plastic holder on the DIN-rail and slide the DTAI board into place. Connect
with this design. the RTD wires directly to the terminal block. The Euro-block type terminal block has 48
terminals and is permanently mounted on the board. Typically, #18 AWG wires (shielded
twisted pair) are used. Two screws, 43 and 44, are provided for the SCOM (ground)
connection, which should be as short a distance as possible.
SCOM, terminal 43, must be DTAI accommodates the following analog I/O types:
connected to chassis ground.
Analog input, two-wire transmitter
Analog input, three-wire transmitter
Analog input, four-wire transmitter
Analog input, externally powered transmitter
Analog input, voltage 5 V, 10 V dc
Analog output, 0-20 mA current
Analog output, 0-200 mA current
Wiring, jumper positions, and cable connections appear on the wiring diagram

DTAI
Jumpers Screw Connections TB1 Screw Connections Circuit Jumpers

JP1B JP1A
Open/Return 20mA/V dc
37-pin "D" 1 Input 1 (24V)
Input 1 (20mA) 2
shell 3 Input 1 (Vdc) Input 1 J1B J1A
JP2B JP2A Input 1 (Return) 4
connector 5 Input 2 (24V)
Input 2 (20mA) 6 Input 2 (Vdc) Input 2 J2B J2A
with latching 7
9 Input 3 (24V)
fasteners Input 3 (20mA) 10
11 Input 3 (Vdc) Input 3 J3B J3A
JP4B JP4A Input 3 (Return) 12 13 Input 4 (24V)
Input 4 (20mA) 14
JR1 JP5B JP5A Input 4 (Return) 16
17 Input 5 (24V)
Input 5 (20mA) 18
Input 6 (24V)
Input 6 (20mA) 22 21
Input 7 (20mA) 25 Input 7 (24V)
26
JP8B JP8A Input 7 (Return 28
29 Input 8 (24V)
Input 8 (20mA) 30
JP9B JP9A Input 8 (Return 32
33 Input 9 (24V) 20mA/1mA
Input 9 (20mA) 34
35 Input 9 (1mA) Input 9 J9B J9A
37 Input 10 (24V)
Input 10 (20mA) 38
39 Input 10 (1mA) Input 10 J10B J10A
Input 10 (Ret) 40
JP0 41 PCOM
PCOM 42
Cable to J3 43 Chassis Ground
Chassis Ground 44
connector in 45 Output 1 (Signal) Output 1 J0
Output 1 (Return) 46
I/O rack for 47 Output 2 (Signal) Output 2 No jumper
VAIC board
SCOM
DIN-rail mounting
Two-wire +24 V dc Three-wire +24 V dc

transmitter transmitter wiring
wiring 4-20mA Voltage input VDC J#A 4-20 mA Voltage input VDC J#A
T
4-20 ma 20 ma 4-20 ma 20 ma
T
Return Return
Open J#B Open J#B
PCOM
Externally powered +24 V dc Four-wire +24 V dc

transmitter wiring transmitter wiring
J#A
4-20 mA Voltage input VDC J#A 5 V dc Voltage input VDC
4-20 ma 20 ma T 4-20 ma 20 ma
+ +
Power
T Return Signal Return
Supply - -
Open J#B Max. common Open J#B
mode voltage Misc return PCOM
is 7.0 V dc to PCOM
PCOM
DTAI Wiring, Cabling, and Jumper Positions

Operation
24 V dc power is available on DTAI for all the transducers and the inputs can be
configured as current or voltage inputs using jumpers. One of the two analog output
circuits is 4-20 mA, and the other can be jumper configured for 4-20 mA or 0-200 mA.
DTAI has only one cable connection so it cannot be used for TMR applications as with
TBAI.
<R> Module
DTAI Board
Controller
8 circuits per terminal Application Software
Typical transmitter, Noise board
Mark VI powered suppr-
ession
+24 V dc 1 P28V
Current Limit
Voltage input 3 J1A Analog Input
N Vdc
T (+/-5,10 V dc) Board VAIC
4-20 mA 2 S 20 ma
250 ohms A/D D/A
Return 4
J1B
Open Return
PCOM
41
PCOM Connectors
43 at
SCOM
bottom of
2 circuits per terminal
VME rack
board
33 P28V
+/-1 mA 35 1 ma J9A JR1 J3/4
N
4-20 mA 34 S 20 mA
250
5k ohms
Return 36 ohm
J9B
Open Return
PCOM Current
Regulator/
Jump select on one Two output circuits Power
circuit only; #2 200 mA JO Supply
Circuit is 4-20 mA
only 20 mA
Signal 45
N
46 S
Return SCOM ID
DTAI Terminal Board and VAIC I/O Processor

The following table displays the analog I/O capacity of DTAI.

2 4-20 mA, or 1 mA 1 0-20 mA

Specifications
Item Specification
Number of channels 12 channels (10 AI, 2 AO)
Input span, transmitters 1 - 5 V dc from 4-20 mA current input
Maximum lead resistance to 15 maximum two-way cable resistance, cable length up to 300m (984 ft)
transmitters
Outputs 24 V outputs provide 21 mA for each connection
Maximum lead resistance 15 maximum two-way cable resistance, cable length up to 300m (984 ft).
Output load 500 for 4-20 mA output. 50 for 200 mA output with VAICH1C
Fault detection Monitor output current.
Check ID chip on connector
Physical
Size, with support plate 8.6 cm wide x 16.2 cm high (3.4 in x 6.37 in)
Diagnostics
Configuration
The terminal board is configured by jumpers. For the location of these jumpers, refer to
the installation diagram. The jumper choices are as follows:
Jumpers J1A through J8A select either current input or voltage input.
left open.
Jumpers J9A and J10A select either 1 mA or 20 mA input current.
Jumpers J9B and J10B select whether the return is connected to common or is left
open.
Jumper J0 sets output 1 to either 20 mA or 200 mA.

Acoustic Monitoring (VAMA)
VAMA Acoustic Monitoring
The Acoustic Monitoring (VAMA) board monitors acoustic or pressure waves in the
turbine combustion chamber. Inputs are wired to the DIN-rail mounted DDPT terminal
board. DDPT supports the simplex mode only and connects to VAMA through the J3
connector on the VME rack where VAMA is located.
The VAMA/DDPT meets environment rating for hazardous gases of Class I, Division 2
and provides suppression at all points of signal entry or exit. Each cable has a unique
ID chip. The VAMA provides two point calibration, based on a reference offset and
gain signal.
Gas turbine combustion chambers can experience pressure oscillations that cause noise in
the audible hearing range. The H1A version of the VAMA offers signal conditioning and
software that allows the turbine control to monitor the pressure/acoustic waves by reading
the conditioned signals from a dynamic pressure transducer. The VAMA provides two
channels to read the pressure/acoustic wave signals from third party equipment from
Vibro-Meter or Bently-Nevada*. VAMA provides two dedicated signal conditioning
paths to remove the dc component of the signal, modify the gain, and provide an eighth
order or better low-pass filter for anti-aliasing.
Installation
It may be necessary to update To install the V-type board
the VAMA firmware to the latest
1. Power down the VME processor rack.
level. For instructions, refer
to GEH-6403, Control System 2. Slide in the board and push the top and bottom levers in with your hands to seat its
Toolbox for Configuring the edge connectors.
Mark VI Turbine Controller. 3. Tighten the captive screws at the top and bottom of the front panel. These screws
serve to hold the board firmly in place and enhance the board front ground integrity.
The screws should not be used to actually seat the board.
Note Cable connections to the terminal board are made at the J3 connector on the lower
portion of the VME rack, and the J5 connector on the front of the board. These are
latching type connectors to secure the cables. Power up the VME rack and check the
diagnostic lights at the top of the front panel. For details, refer to Diagnostics section in
this document.
GEH-6421Q System Guide, Volume II Acoustic Monitoring (VAMA) 4-1

Operation
Pressure/Acoustic Wave Signal Conditioning
The Vibro-Meter GSI 1_ _ VAMA provides signal conditioning for two pressure/acoustic wave inputs and can
unit prevents problems due to supply either 24 V dc to power the pressure sensing equipment. VAMA supports the
voltage differences between the following third party vendor equipment:
measuring point and signal
Vibro-Meter Galvanic Separation Unit types GSI 1_ _
processing (such as ground
loops). Bently-Nevada 86517 with modifications 142533 or 159840 charge amplifier
Bently-Nevada dynamic pressure charge amplifier 350500
The Vibro-Meter setup conditions a pico-coulomb output from a dynamic pressure
transducer (Vibro-Meter CP216 or CP231) through a charge amplifier (Vibro-Meter IPC
704) with a current output representing approximately 125 A/psi. The GSI unit outputs
an ac signal (approx. 2 V peak) that represents the dynamic pressure (gain expressed in
mV/psi ) riding on top of a dc bias voltage of approximately +7 V dc. The Vibro-Meter
GSI unit requires a +24 V dc power supply. Normally, the power supply return for the
GSI is grounded externally and the PCOM on the terminal board is not used. PCOM
should only be used when the external return ground is not used.
The Bently-Nevada 86517 interface module converts the dynamic pressure transducer
charge signal from pico-coulombs to milli-volts, which represents the pressure in psi.
The interface module outputs ac signal (approx. 1.2 V peak) riding on top of a negative
dc bias voltage of approximately -10 V dc. The Bently-Nevada unit requires a -24 V dc
power supply.
VAMA/DDPT Vendor Equipment Power Supply Specifications
Vendor Power Supply Nominal Voltage Nominal Current

Vibro-Meter Positive 24 V dc +24 V dc (5%) 0.04 A (0.02 A)
Bently-Nevada Negative 24 V dc -24 V dc (5%) 0.02 A (0.01 A)
The pressure/acoustic signal is read differentially by connecting the DDPT inputs,

Pressure Wave Channel A High (ASIG) and Pressure Wave Channel A Low (ARET).
Voltage clamping and high frequency suppression is applied on the DDPT before the
signal is routed to the VAMA through the 37-pin cable to the J3 connector on the VME
rack. The jumpers, JP1A/B and JP2A/B, are used to add a bias corresponding to the dc
bias provided by the third party interface unit to detect open circuit conditions.
Therefore, a +28 V dc bias is added for the Vibro-Meter connection and a -28 V dc bias is
added for the Bently-Nevada system. The DDPT pressure wave outputs are ASIG/ARET
for the output pair for channel A, and BSIG/BRET for the output pair for channel B.
4-2 Acoustic Monitoring (VAMA) GEH-6421Q Mark* VI Control

Signal Conditioning for Fast Fourier Transform (FFT) Input
Note The FFT signal conditioning provides open-wire detection circuitry and any dc
bias monitoring circuitry, if needed. The output from channel A and channel B feeds
into a high-speed multiplexed A/D section.
VAMA provides differential inputs for both channel A and B pressure wave signals. The
signal conditioning includes a high pass filter, gain adjustment, and a low pass filter with
adjustable break frequencies. The high-pass filter is a single pole filter (6 dB/octave) with
a break at 1.5 Hz. The gain block provides two gain options, 2.25 or 4.5 V/V. The low
pass filter is an eight-pole (48 dB/octave) Butterworth filter with three selectable break
frequencies, 600, 1000, and 3600 Hz. The gain options and the low-pass filter break
frequency adjustments are selectable through software.
Signal Conditioning for the RMS Circuit
VAMA provides an RMS rectifier circuit for both channel A and channel B pressure
waves. Each circuit includes a high pass filter, a low pass filter, and the RMS detector.
The band-pass filters are 260 to 970 Hz , before the detector and the RMS detector. The
input signal range is from 0 to 10 psi peak-to-peak, which is represented by an ac signal
with the scaling of 0.1 V/psi. The rms detector output from channel A and channel
B feeds into a multiplexed A/D section.
BNC Signal Conditioning
VAMA provides a buffered signal conditioning circuit for each BNC output on the DDPT
terminal board. The BNC buffered circuit takes its input from the ac pressure wave input
without the dc bias signal. The gain of the buffer is 1. The signal for the buffered BNC
output ranges from 0 to 40 psi peak-to-peak, which is represented by an ac signal with
the scaling of 0.1 V/psi.

26 BNCASIG DDPT
27 BNCARET
30 BNCBSIG
BNCBRET
31
Channel A
1
AP24V Current P28
Limiter
S
+24V
Vibro-meter JR1
Vout Normally the Vibro-meter or B-N will have pwr supply return gnded
externally. If DDPT PCOM is used, make sure that ext. gnd is removed. P28 1,18
GSI 1XX 2
0V ASIG N28 20
ATBJMPRPOS 15
S BTBJMPRPOS 3
External
Gnd 3 2,17,
ARET JP2 PCOM 21
S NC SIGCOMR 36
Bently-Nevada RET OPEN BRD_IDR1 37
Sig.
N24 N24 Com PCOM 38
JP_A
86517 w Modxxx 39
P28 N28
or 350500 4
AN24V Current N28 V_M B_N
Limiter
External S
Gnd
SCOM
Serial EPROM
Channel B JP_B
9 V_M B_N
BP24V Current Serial EPROM
Limiter P28 P28 N28
S
+24V
Vibro-meter CBLJ5_ID
Normally the Vibro-meter or B-N will have pwr
Vout
supply return gnded externally. If DDPT PCOM is
JR5
GSI 1XX 10 used, make sure that ext. gnd is removed.
4
0V BSIG SIGCOMR 5
S
ASIG 1
External
11 ARET 9
Gnd JP4
BRET
S NC BSIG 3
Bently-Nevada RET OPEN BRET
Sig. BNC_A 11
N24 N24 Com PCOM BNCASIG 6
86517 w Modxxx BNCARET
or 350500 12 13
BN24V Current BNCBSIG
Limiter BNC_B 8
S S S BNCBRET 15
S S 16
N28 17
19, 21, 37, 39, 41
20, 22, 38, 40, 42

SCOM
SCOM
DDPT Board Block Diagram

DDPT VAMA VAMA Firmware for FFT Signal Space
Hardware Hardware HighValue Configuration Constants PW1MagFb1ChA
P
HighInput
P28 N28 FminFrqband1 PW2MagFb1ChA
W LowValue
F Signal Cond. for FFT LowInput FmaxFrqband1 PW3MagFb1ChA
A Calc. of Input FminFrqband2 PW1FrqFb1ChA
Fc Table
H Gpw = 1, 2.25 or 4.5 FmaxFrqband2 PW2FrqFb1ChA
Lookup FFTFreqRange
F_lp = 600, 1k or 3.6k hz FminFrqband3 PW3FrqFb1ChA
P FmaxFrqband3
W Slope >= -48 dB / oct WindowSelect BinReject
F
FAST Fs Table PW1MagFb2ChA
F_hp = 1.5 hz, 6 dB/oct.
A A/D Lookup PW2MagFb2ChA
P28 N28
L Fs Table
8192 Windowing Function PW3MagFb2ChA
Lookup SORT PW1FrqFb2ChA
True RMS Detector Samples S Default Value for
Grms = 2.25 (Used by e Rejected Magnitude PW2FrqFb2ChA
by Magnitude PW3FrqFb2ChA
F_hp = 260 hz, 36 dB/oct FFT L Type Side Bins &
A mV to
of Spectrum
F_lp = 970 hz, -36 dB/oct D Calc.) 1 Rectangular 3 Frequency
P Eng. defined by PW1MagFb3ChA
2
M Units
2 Hamming 3 F Freq. Band PW2MagFb3ChA
4 A 8192 Conv. 3 Hanning 3 F CALC.
GEH-6421Q System Guide, Volume II

V 4 Triangular 3 PW3MagFb3ChA
I Input DC Bias Monitor Samples T (3 largest Pressure
5 Blackman 3 for PW1FrqFb3ChA
B Lim (DMA Wave Mags. & Freqs
P 6 Blackman-Harris 3 each FFT PW2FrqFb3ChA
P updating) for 3 ranges)
2 2 7 Flat Top 4 PW3FrqFb3ChA
8
Element
4 + Open Wire Detection
V PW_RMStotChA
Open Wire Detection & Input RMS Calc. per PW_RMSFb1ChA
DC Bias Monitor for
S FFT Output Data PW_RMSFb2ChA
Pressure Wave Signals
L PW_RMSFb3ChA
- Open Wire Detection RMS Calc. per
M O FFT Input Data PW_RMSBB_ChA
HighValue2
U W mV to HighInput2
X Eng. Units LowValue2
ASIG
A/ From True RMS Conv. LowInput2 BSIG
- Open Wire Detection Configuration Constants
D Detector RMS Calc. per PW_RMSBB_ChB
FFT Input Data
RMS Calc. per PW_RMStotChB
+ Open Wire Detection FFT Output Data PW_RMSFb1ChB
A
N PW_RMSFb2ChB
2 Windowing Function PW_RMSFb3ChB
8192 Magnitude
VAMA/DDPT Block Diagram

4 SORT
V Samples S Default Value for & PW1MagFb1ChB
I Input DC Bias Monitor e Rejected
(Used by Frequency PW2MagFb1ChB
Lim by Magnitude
B N FFT L Type Side Bins F PW3MagFb1ChB
N 2 mV to of Spectrum
D Calc.) 1 Rectangular 3 F CALC. PW1FrqFb1ChB
2 8 True RMS Detector Eng. defined by
4
M Units
2 Hamming 3 T PW2FrqFb1ChB
Grms = 2.25 Freq. Band
V A 8192 Conv. 3 Hanning 3 for PW3FrqFb1ChB
F_hp = 260 hz, 36 dB/oct 4 Triangular 3 each FFT
F_lp = 970 hz, -36 dB/oct Samples (3 largest Pressure
(DMA 5 Blackman 3 Element PW1MagFb2ChB
Wave Mags. & Freqs
updating) 6 Blackman-Harris 3 PW2MagFb2ChB
Fs Table for 3 ranges)
7 Flat Top 4 PW3MagFb2ChB
Lookup
P FAST Fs Table PW1FrqFb2ChB
W P28 N28 Signal Cond. for FFT PW2FrqFb2ChB
F
A/D Lookup
Calc. of Input WindowSelect BinReject FminFrqband1 PW3FrqFb2ChB
B
L Gpw = 1, 2.25 or 4.5 FmaxFrqband1
F_lp = 600, 1k or 3.6k hz Fc Table PW1MagFb3ChB
Lookup
FFTFreqRange FminFrqband2
P Slope >= -48 dB / oct FmaxFrqband2 PW2MagFb3ChB
W HighValue FminFrqband3
F_hp = 1.5 hz, 6 dB/oct. PW3MagFb3ChB
F HighInput
B P28 N28
FmaxFrqband3 PW1FrqFb3ChB
H LowValue PW2FrqFb3ChB
LowInput Configuration Constants
PW3FrqFb3ChB
Acoustic Monitoring (VAMA) 4-5

Pressure/Acoustic Wave FFT Algorithms
The firmware performs a spectral analysis of the pressure wave to determine the
spectral components with the largest magnitude and the frequency associated with
each magnitude. The local sort function sorts the three largest magnitudes for a given
frequency band. The FFT algorithm supports three frequency bands.
Note The magnitude and frequency information for each spectral component that meets
the criteria of the sorts is stored in Signal Space for the VAMA memory space.
Discontinuities at the beginning and end of the 8192 collected data points of the pressure
wave produce high frequency components that alias down into the spectrum of interest.
Using a Windowing function on the data attenuates the high frequency components. The
user can select from seven different windowing functions that affect spectral content
of these high frequency components. An FFT is performed on the windowed data to
determine the spectral components magnitude and the frequency associated with it. A
Global Sort function ranks the spectral components from the largest in magnitude to
the smallest. Then a Local Sort function selects the three largest magnitudes and their
associated frequencies for a frequency band defined by the user.
The composite pressure wave signal that includes both the ac and dc offset component of
the signal is read by the slow A/D on VAMA. Firmware monitors this signal to perform
continuity and out of range checks. The pressure wave has a normal operating range of
1 psi with the trip level set at 2 psi. The FFT magnitude is significantly attenuated when
spectral content is off the bin center. Attenuation factor (approx. 0.6 to 0.9) is determined
by the Windowing technique used.
Functions
Windowing Function
The Windowing function provides a way to reduce the false spectral components caused
by the beginning and ending points of the 8192 data points collected. The discontinuities
caused by the end point data produces high frequency components that alias down into
the frequency spectrum of interest. Each windowing function affects the magnitude and
spectral leakage. Seven windowing techniques are provided, as follows:
Rectangular
Hamming
Hanning
Triangular
Blackman
Blackman-Harris
Flat Top
The configuration constant, WindowSelect, is the window select control for both channel
A and channel B pressure waves. The configuration constant, BinReject, determines the
number of side bins rejected from a spectral peak found in the FFT analysis. BinReject
controls the number of side bins removed from the FFT analysis for both channel A
and B. An FFT is performed on the windowed data to determine the spectral content of
the pressure wave. The power is calculated for each FFT element and the magnitude
and frequency are calculated from the power. The windowing type and the associated
sideband rejection are shown in the following table.

Windowing Selections and Parameters
Selection Function Rejected Sidebands (Default)

1 Rectangular 3
2 Hamming 3
3 Hanning 3
4 Triangular 3
5 Blackman 3
6 Blackman-Harris 3
7 Flat Top 4
Sort Function
The Sort function tests for the three largest FFT element magnitudes in a user specified
frequency band. The user can specify up to three frequency bands with three magnitudes
and associated frequency for each stored in signal space.
The following table defines the user defined configuration constants, FminFrqbandx and
FmaxFrqbandx, that are supported by the Sort function. The firmware provides separate
scaling for channel A and B and defines the transfer function from two given points.
Signal Space Variables to Support Pressure Wave FFT Algorithm
Variable Description Units Min. Max.

PW1MagFb1ChA Pressure wave 1 magnitude in frequency band 1 of ChA EU -3.4e+38 -3.4e+38
PW1MagFb1ChB Pressure wave 1 magnitude in frequency band 1 of ChB EU -3.4e+38 -3.4e+38

Determination of Fc and Fs
The following table is used to determine the filter break frequency for the eighth order
Butterworth filter for each channel of the pressure wave signal conditioning (ac out). It is
also used to derive the sample frequency for the fast A/D and the FFT algorithm sample
frequency. The configuration constant used as the input to the lookup table is the constant
FFTFrqRngChA for channel A and FFTFrqRngChB for channel B.
Fc and Fs Determination
FFTFrqRngChA or FFT Frequency Range Sample Frequency, Bin Resolution (Hz) Update Rate
FFTFrqRngChB of Interest (Hz) Fs (Hz) (seconds)
260_970HzBPF 260 970 12000 1.46 0.68
600Hz_LPF 1.5 600 12000 1.46 0.68
1000Hz_LPF 1.5 1000 12000 1.46 0.68
3600Hz_LPF 1.5 3600 12000 1.46 0.68
260/970HzDBP 260 970 12000 1.46 0.68
Display Format of the Data Through TelNet

The following table shows a portion of the TelNet display for pressure wave channels 1
and 2. The display shows the bin center frequency with the magnitude of the spectral
content in peak voltage and psi.
TelNet Display Example of FFT Magnitudes over Frequency Range
VAMA Cards Power Spectrum Screen

Frequency Transducer 1 Transducer 2
MAGN (Vpk) MAGN (PSI) MAGN (Vpk) MAGN (PSI)
0.000 0.0001548 0.0015481 0.0119116 0.1191164
1.465 0.0001836 0.0018366 0.0106850 0.1068505
2.930 0.0000924 0.0009238 0.0037215 0.0372151
4.930 0.0000752 0.0007519 0.0025366 0.0253656
5.860 0.0000685 0.0006848 0.0021200 0.0212001
7.325 0.0000419 0.0004188 0.0013643 0.0136432
| | | | |
v v v v v

The following table lists the TelNet frequency range for transducer channels A and
B. The TelNet display provides up to three frequency bands defined by configuration
constants and outputs the three largest peaks in each frequency band.
TelNet Frequency Range for Transducer Channels A and B
Signal Space Input Transducer Channel

CH A CH B
MAG (PSI) FREQ (HZ) MAG (PSI) FREQ (HZ)
5 <= FREQ BAND1 <= 500Hz
1st Highest Peak 0.534 58.6 0.521 60.07
2nd Highest Peak 0.214 102.55 0.204 101.09
3rd Highest Peak 0.102 139.18 0.112 137.71
500 <= FREQ BAND2 <= 1000Hz
1st Highest Peak 0.211 586 0.227 586
2nd Highest Peak 0.142 732.5 0.135 733.97
3rd Highest Peak 0.087 879 0.079 879
1000 <= FREQ BAND1 <= 3000Hz
1st Highest Peak 0.334 1465 0.317 1465
2nd Highest Peak 0.134 1611.5 0.128 1612.96
3rd Highest Peak 0.076 2197.75 0.055 2199.22
RMS Peak-to-Peak Calculator

The VAMA firmware includes an rms peak-to-peak calculator for both channel A and
channel B signals from the true rms detector. The calculator multiplies the dc rms value
read in by 2.828 to convert the A/D reading back to a peak-to-peak value.
Signal Space Variables to Support Pressure Wave FFT
Variable Description Units Min. Max.

PW_RMStotChA Channel A pressure wave total rms value psi 0 3.54
PW_RMSFb1ChA Channel A pressure wave rms value in frequency band 1 psi 0 3.54
PW_RMStotChB Channel B pressure wave total rms value psi 0 3.54
PW_RMSFb1ChB Channel B pressure wave rms value in frequency band 1 psi 0 3.54

Specification
Item Specification
Number of Transducers Two, either:
Vibro-Meter Galvanic separation Unit types GSI 1_ _
Bentley-Nevada 86517, 142533, or 159840 charge amplifier
Bentley-Nevada 350500 dynamic pressure charge amplifier
Transducer Power Supply Vibro-Meter: Positive 24 V dc, current of 0.04 A nominal
Bentley-Nevada: Negative 24 V dc, current of 0.02 A nominal
Buffered signal outputs Two channels with ac component only, 0.1 V/psi, available at BNC outputs on DDPT
Pressure wave magnitude range Mag.min = -14 psi
Mag.max = +14 psi
Pressure wave frequency range Fmin = 1.5 Hz
Fmax = 3600 Hz
Maximum FFT sampling F = 12000 Hz
frequency
FFT record length 8192
Windowing techniques supported Rectangular (3)
(side-band rejection) Hamming (3)
Hanning (3)
Triangular (3)
Blackman (3)
Blackman-Harris (3)
Flat Top (4)
Format for magnitudes and Configurable frequency bands with three peaks per band
associated frequencies.
Display of full FFT spectrum Telnet display
results
Diagnostics
Three LEDs at the top of the VAMA front panel provide status information. The normal
RUN condition is a flashing green, FAIL is a solid red. The third LED is STATUS and is
normally off but shows a steady orange if a diagnostic alarm condition exists in the board.
VAMA runs continuous diagnostic tests on the signals and hardware. Variables checked
include transducer open wire, DAC bias voltage, differential amplifier output voltage,
FFT ac gain corrections, FFT LPF, gain and frequency settings, FFT and RMS frequency
ranges, gain and frequency settings, and FFT A/D bit integrity (peak bin counts). If any
of these go outside of configured limits, VAMA creates a fault. Refer to the Alarms
section for a complete list of faults (diagnostic alarms).

Configuration
For details, refer to GEH-6403, Like all I/O boards, VAMA is configured using the toolbox. This software usually runs
Control System Toolbox for the on a data-highway connected CIMPLICITY station or workstation. The following
Mark VI Turbine Controller. tables summarize the configuration choices and defaults.
Configuration Choices and Defaults
Configuration Description Units Min. Max.

Constant Name
High_Input2 Defines the X-axis value in millivolts for point 2 that is used in mV -10000 10000
calculating the gain and offset for the conversion to engineering
units for channel A for the rms circuit
High_Value2 Defines the Y-axis value in engineering units for point 2 that is used E.U. -3.4e+38 3.4e+38
in calculating the gain and offset for the conversion from millivolts to
engineering units for rms circuit channel A
Low_Input2 Defines the X-axis value in millivolts for point 1 that is used in mV -10000 10000
units for rms circuit channel A
Low_Value2 Defines the Y-axis value in engineering units for point 1 that is used E.U. -3.4e+38 3.4e+38
in calculating the gain and offset for the conversion from millivolts to
engineering units for rms circuit channel A
Configuration Constants to Support Pressure Wave FFT Algorithm

Constant Name
BinReject Defines the number of side bins that will be rejected for the FFT None 0 5
results for both channel A and B. 0 = no bins rejected
FFTFreqRange FFT frequency range (3db points) for both channel A and B. The None 600 Hz 3600 Hz
selections are:
260_970HzBPF (0.0) - 260 to 970 Hz analog band pass filter
600Hz_LPF (600.0) - 600 Hz analog Low Pass filter
260/970HzDBP (260) - 260 to 970 Hz Digital Band pass filter
FminFrqband1 Minimum frequency for frequency band 1 in both channel A and B Hz 0 3600
FmaxFrqband1 Maximum frequency for frequency band 1 in both channel A and B Hz 0 3600
High_Input Defines the X-axis value in millivolts for point 2 that is used in mV -10000 10000
units for channel A and B

Constant Name
High_Value Defines the Y-axis value in engineering units for point 2 that is used E.U. -3.4 3.4
in calculating the gain and offset for the conversion from millivolts to e+038 e+038
engineering units for channel A and B
Low_Input Defines the X-axis value in millivolts for point 1 that is used in mV -10000 10000
units for ch A and B
Low_Value Defines the Y-axis value in engineering units for point 1 that is used E.U. -3.4 3.4
in calculating the gain and offset for the conversion from millivolts to e+038 e+038
engineering units for channel A and B
Min_mV_Input Minimum millivolts that defines the lower out of range point for the mV -10000 10000
pressure wave input
Max_mV_Input Maximum millivolts that defines the upper out of range point for the mV -10000 10000
pressure wave input
WindowSelect Selects the Windowing function to be used on the sampled data for None 1 7
both Channel A and B:
1 = Rectangular
2 = Hamming
3 = Hanning
4 = Triangular
5 = Blackman
6 = Blackman-Harris
7 = Flat Top

Alarms
Fault Description Possible Cause
ASIG Open Wire Detection V dc Terminal board or cable problem
ARET Open Wire Detection V dc Possible Cause Terminal board or cable problem
BSIG Open Wire Detection V dc Terminal board or cable problem
BRET Open Wire Detection V dc Terminal board or cable problem
Chan A DAC Bias V dc Board failure
Chan B DAC Bias V dc Board failure
Chan A Diff Amp Out V dc Board failure
Chan B Diff Amp Out V dc Board failure
Chan A FFT Filtered Null Counts Board failure
Chan B FFT Filtered Null Counts Board failure
Chan A FFT Filtered Reference Counts Board failure
Chan B FFT Filtered Reference Counts Board failure
Chan A (Slow) Filtered RMS Null Counts Board failure
Chan B (Slow) Filtered RMS Null Counts Board failure
Chan A (Slow) Filtered RMS Reference Counts Board failure
Chan B (Slow) Filtered RMS Reference Counts Board failure
Chan A FFT Null Board failure
Chan B FFT Null Counts Board failure
Chan A FFT Reference Counts Board failure
Chan B FFT Reference Counts Board failure
Chan A (Slow) RMS Null Counts Board failure
Chan B (Slow) RMS Null Counts Board failure
Chan A (Slow) RMS Reference Counts Board failure
Chan B (Slow) RMS Reference Counts Board failure
Ch A FFT AC Gain Corr LPF=600 Hz Gain=4.5 Freq=300 Board failure
Ch B FFT AC Gain Corr LPF=600 Hz Gain=4.5 Freq=300 Board failure
Ch A FFT AC Gain Corr LPF=1 kHz Gain=4.5 Freq=600 Board failure
Ch B FFT AC Gain Corr LPF=1 kHz Gain=4.5 Freq=600 Board failure
Ch A FFT AC Gain Corr LPF=3.6 kHz Gain=4.5 Freq=2160 Board failure
Ch B FFT AC Gain Corr LPF=3.6 kHz Gain=4.5 Freq=2160 Board failure
Ch A FFT AC Gain Corr 260_970 Hz Gain=2.25 Freq=600 Board failure
Ch B FFT AC Gain Corr 260_970 Hz Gain=2.25 Freq=600 Board failure
Slow Ch A RMS Gain Corr 270_970 Hz Gain=4.5 Freq=600 Board failure
Slow Ch B RMS Gain Corr 270_970 Hz Gain=4.5 Freq=600 Board failure
CHAN A FFT LPF=3.6 kHz Gain=4.5 Freq=0 Board failure
CHAN B FFT LPF=3.6 kHz Gain=4.5 Freq=0 Board failure

CHAN A FFT LPF=600 Hz Gain=1.0 Freq=300 Board failure
CHAN B FFT LPF=600 Hz Gain=1.0 Freq=300 Board failure
CHAN A FFT LPF=1 kHz Gain=4.5 Freq=600 Board failure
CHAN B FFT LPF=1 kHz Gain=4.5 Freq=600 Board failure
CHAN A FFT LPF=600 Hz Gain=4.5 Freq=706 12db Board failure
CHAN B FFT LPF=600 Hz Gain=4.5 Freq=706 12db Board failure
CHAN A FFT LPF=1 kHz Gain=4.5 Freq=1192 12db Board failure
CHAN B FFT LPF=1 kHz Gain=4.5 Freq=1192 12db Board failure
CHAN A FFT LPF=3.6 kHz Gain=4.5 Freq=3854 6db Board failure
CHAN B FFT LPF=3.6 kHz Gain=4.5 Freq=3854 6db Board failure
CHAN A FFT LPF=1 kHz Gain=2.25 Freq=1000 3db Board failure
CHAN B FFT LPF=1 kHz Gain=2.25 Freq=1000 3db Board failure
CHAN A FFT LPF=3.6 kHz Gain=2.25 Freq=3600 3db Board failure
CHAN B FFT LPF=3.6 kHz Gain=2.25 Freq=3600 3db Board failure
CHAN A FFT 260-970 Hz Gain=2.25 Freq=400 Board failure
CHAN A RMS 260-970 Hz Gain=2.25 Freq=400 Board failure
CHAN B FFT 260-970Hz Gain=2.25 Freq=400 Board failure
CHAN B RMS 260-970 Hz Gain=2.25 Freq=400 Board failure
CHAN B FFT 260-970 Hz Gain=2.25 Freq=600 Board failure
CHAN A FFT 260-970 Hz Gain=2.25 Freq=235 3db Board failure
CHAN A RMS 260-970 Hz Gain=2.25 Freq=235 3db Board failure
CHAN B FFT 260-970 Hz Gain=2.25 Freq=235 3db Board failure
CHAN B RMS 260-970 Hz Gain=2.25 Freq=235 3db Board failure

CHAN A FFT 260-970 Hz Gain=2.25 Freq=130 <36db Board failure
CHAN A RMS 260-970 Hz Gain=2.25 Freq=130 <36db Board failure
CHAN B FFT 260-970 Hz Gain=2.25 Freq=130 <36db Board failure
CHAN B RMS 260-970 Hz Gain=2.25 Freq=130 <36db Board failure

CHAN A FFT 260-970 Hz Gain=2.25 Freq=1940 <36db Board failure
CHAN A RMS 260-970 Hz Gain=2.25 Freq=1940 <36db Board failure
CHAN B FFT 260-970 Hz Gain=2.25 Freq=1940 <36db Board failure
CHAN B RMS 260-970 Hz Gain=2.25 Freq=1940 <36db Board failure
CHAN A FFT 260-970 Hz Gain=2.25 Freq=600 50% Board failure
CHAN A RMS 260-970 Hz Gain=2.25 Freq=600 50% Board failure
CHAN B FFT 260-970 Hz Gain=2.25 Freq=600 50% Board failure
CHAN B RMS 260-970 Hz Gain=2.25 Freq=600 50% Board failure
CHAN A FFT 260-970 Hz Gain=2.25 Freq=600 12.5% Board failure
CHAN A RMS 260-970 Hz Gain=2.25 Freq=600 12.5% Board failure
CHAN B FFT 260-970 Hz Gain=2.25 Freq=600 12.5% Board failure
CHAN B RMS 260-970 Hz Gain=2.25 Freq=600 12.5% Board failure

Chan A Dac Bias V dc Set to 0.0V dc Board failure
Chan B Dac Bias V dc Set to 0.0V dc Board failure
FFT Chan A A/D Bit Integrity - Peak bin cnts 80-100Hz Board failure
FFT Chan B A/D Bit Integrity - Peak bin cnts 80-100Hz Board failure

DDPT Simplex Dynamic Pressure Transducer Input
DDPT is only available in a The Simplex Dynamic Pressure Transducer Input (DDPT) terminal board is a compact
simplex version. acoustic terminal board for DIN-rail mounting. The board accepts two pressure
transducers for monitoring pressure waves in gas turbine combustion chambers, using
either Vibro-Meter or Bently Nevada* transducers. It connects to the VAMA with
two cables, and is designed to meet Class 1, Division 2 environmental requirements
for hazardous gases.
Installation
Mount the plastic holder on the DIN-rail and slide the DDPT board into place. Connect
the wires for the pressure transducers to the permanently mounted Euro-Block type
terminal block, which has 42 terminals. Typically #18 AWG shielded twisted triplet
wiring is used. Ten screws are provided for the SCOM (ground) connection.
Connect cables from the DDPT JR1 connector to the VAMA J3 connector on the lower
portion of the VME rack, and from DDPT JR5 connector to the J5 connector on the front
panel of the VAMA. These are latching type connectors to secure the cables.

37-pin "D" shell
DDPT Terminal Board
connector with
latching fasteners
JR1
Screw Connections TB1 Screw Connections
2 1 AP24
JP2 ASIG
3 ARET
RET AN24V 4 PCOM
5
6
7
OPEN 8
9 BP24V
BSIG 10
11 BRET
BN24V 12 13 PCOM
JP4 14
Cable to J3 connector in RET 15
I/O rack for VAMA board 16
17
OPEN 18
or 19 SCOM
SCOM 20
21 SCOM
Plug in PAMA I/O Pack SCOM 22
23
24
25
BNCASIG 26
27 BNCARET
JR5 28
29
JPA BNCBSIG 30
31 BNCBRET
V_M 32
33
34
B_N 35
36
37 SCOM
SCOM 38
JPB 39 SCOM
SCOM 40
V_M SCOM 42 41 SCOM
Cable to J5 connector on
front panel of VAMA board B_N
SCOM Euro-Block type
BNC B terminal block
BNC A
Buffered outputs
from transducers
Plastic mounting
A and B
holder
DIN-rail mounting
DDPT Wiring and Cabling

Operation
The Vibro-Meter GSI 1_ _ VAMA supplies a 24 V dc to the DDPT to power the pressure sensing equipment.
unit prevents problems due to VAMA/DDPT supports the following third party vendor equipment:
voltage differences between the
Vibro-Meter Galvanic Separation Unit types GSI 1_
measuring point and signal
processing (such as ground Bently-Nevada 86517 with modifications 142533 or 159840 charge amplifier
loops). Bently-Nevada dynamic pressure charge amplifier 350500
The Vibro-Meter GSI setup conditions a pico-coulomb output from a dynamic pressure
transducer (Vibro-Meter CP216 or CP231) through a charge amplifier (Vibro-Meter
IPC 704) with a current output representing approximately 125 A/psi. The GSI unit
provides an output ac signal (approx. 2 V peak) that represents the dynamic pressure
(gain expressed in mV/psi ) riding on top of a dc bias voltage of approximately +7 V dc.
The GSI unit requires a +24 V dc power supply. Normally, the power supply return for
the GSI is grounded externally and the PCOM on the terminal board is not used. PCOM
should only be used when the external return ground is not used.
The Bently-Nevada 86517 interface module converts the dynamic pressure transducer
charge signal from pico-coulombs to milli-volts which represents the pressure in psi.
The interface module outputs an ac signal (approx. 1.2 V peak) riding on top of a
negative dc bias voltage of approximately 10 V dc. The Bently-Nevada unit requires a
-24 V dc power supply.
DDPT Vendor Equipment Power Supply Specifications
Vendor Power Supply Nominal Voltage Nominal Current

Vibro-Meter Positive 24 V dc +24 V dc (5%) 0.04 A (0.02 A)
Bently-Nevada Negative 24 V dc -24 V dc (5%) 0.02 A (0.01 A)
The pressure/acoustic signal is read differentially by connecting Pressure Wave Channel

A High (ASIG) and Pressure Wave Channel A Low (ARET) to the DDPT inputs. Voltage
clamping and high frequency suppression is applied on the DDPT before the signal is
routed to VAMA.
The jumpers, JPA and JPB, are used to add a bias corresponding to the dc bias provided
by the third party interface unit to detect open circuit conditions. Therefore, a +28 V
dc bias is added for the Vibro-Meter connection and a -28 V dc bias is added for the
Bently-Nevada system. The DDPT board pressure wave outputs are ASIG/ARET for the
output pair for channel A and BSIG/BRET for the output pair for channel B.
VAMA provides a buffered signal conditioning circuit for each BNC output on the DDPT
terminal board. The BNC buffered circuit takes its input from the ac pressure wave input
without the dc bias signal. The gain of the buffer is 1. The signal for the buffered BNC
output ranges from 0 to 40 psi peak-to-peak, which is represented by an ac signal with
the scaling of 0.1 V/psi.

26 BNCASIG DDPT
27 BNCARET
30 BNCBSIG
BNCBRET
31
Channel A
1
AP24V Current P28
Limiter
S
+24V
Vibro-meter JR1
Vout Normally the Vibro-meter or B-N will have pwr supply return gnded
externally. If DDPT PCOM is used, make sure that ext. gnd is removed. P28 1,18
GSI 1XX 2
0V ASIG N28 20
ATBJMPRPOS 15
S BTBJMPRPOS 3
External
Gnd 3 2,17,
ARET JP2 PCOM 21
S NC SIGCOMR 36
Bently-Nevada RET OPEN BRD_IDR1 37
Sig.
N24 N24 Com PCOM 38
JP_A
86517 w Modxxx 39
P28 N28
or 350500 4
AN24V Current N28 V_M B_N
Limiter
External S
Gnd
SCOM
Serial EPROM
Channel B JP_B
9 V_M B_N
BP24V Current Serial EPROM
Limiter P28 P28 N28
S
+24V
Vibro-meter CBLJ5_ID
Normally the Vibro-meter or B-N will have pwr
Vout
supply return gnded externally. If DDPT PCOM is
JR5
GSI 1XX 10 used, make sure that ext. gnd is removed.
4
0V BSIG SIGCOMR 5
S
ASIG 1
External
11 ARET 9
Gnd JP4
BRET
S NC BSIG 3
Bently-Nevada RET OPEN BRET
Sig. BNC_A 11
N24 N24 Com PCOM BNCASIG 6
86517 w Modxxx BNCARET
or 350500 12 13
BN24V Current BNCBSIG
Limiter BNC_B 8
S S S BNCBRET 15
S S 16
N28 17
19, 21, 37, 39, 41
20, 22, 38, 40, 42

SCOM
SCOM
DDPT Board Block Diagram

Specifications
Item Specification
Number of Transducers Two, either:
Vibro-Meter Galvanic separation Unit types GSI 1_ _, or
Bentley-Nevada 86517, 142533, or 159840 charge amplifier, or
Bentley-Nevada 350500 dynamic pressure charge amplifier
Transducer Power Supply Vibro-Meter: Positive 24 V dc, current of 0.04 A nominal from I/O board
Bentley-Nevada: Negative 24 V dc, current of 0.02 A nominal from I/O board
Buffered signal outputs Two channels with ac component only, 0.1 V/psi, available at BNC outputs
Pressure wave magnitude range Mag.min = -14 psi
Mag.max = +14 psi
Pressure wave frequency range Fmin = 1.5 Hz
Fmax = 3600 Hz
Environment For use in Class 1, Division 2 environments (hazardous gases)
Temperature Operating: -30 to 65C (-22 to 149 F)
Technology Surface mount
Diagnostics
VAMA runs continuous diagnostic tests on the signals and hardware. Conditions such as
open-wire on the transducers is checked. If any signals go outside of configured limits,
VAMA creates a fault. The cable connectors on DDPT have their own ID device that
is interrogated by VAMA. The ID device is a read-only chip coded with the terminal
board serial number, board type, and revision number. If a mismatch is encountered, a
hardware incompatibility fault is created.
Configuration
Refer to the Installation and Two jumpers set the bias voltage for the transducers, and two jumpers set the power
Operation sections for further return from the transducers:
details.
JPA and JPB apply either a +28 V bias or 28 V bias to the transducer signals.
JP2 and JP4 connect the transducer power return to PCOM or to Open.

Acoustic Monitoring Input (VAMB)
VAMB Acoustic Monitoring
The Acoustic Monitoring (VAMB) board provides 18 channels of signal conditioning
through two nine channel acoustic monitoring terminal boards IS200TAMB (TAMB)
and one 18 channel I/O acoustic monitoring sub-assembly IS215VAMB (VAMB).
The TAMB supports third party vendors such as, Bentley-Nevada, Vibro-meter,
GE/Reuter-Stokes, and others.
Galvanic Cable
Separation (twisted
and Signal+
shield) Signal-
Shield
Charge
Low noise Amplifier Pwr
GE
cable Ret Industrial

Cntrl G
Systems
Pressur E
e
Sensor
Isolator
Turbine C om bustor
Non-GE Instrumentation
Option 1
VAMB
Cable H1A
JR2
JR2
JR2
JR2
JR2
JR2
(twisted
Low noise and Return Signal+ Shield
cable shield)
Pressur
JR 2
JR 2
JR 2
JR 2
JR 2
JR 2
1
1
1 e 2
3
Sensor 4 Ckt. 1
2
5
6
7
Pressur Ckt. 2
3
8
9
2 e 10
4
JR1
11
Sensor 12 Ckt. 3 1
13 2
5
14 3
15
Ckt. 4 4 Ckt. 1
Charge 16 5
6
17 6
18 7
19 8 Ckt. 2
Converter Ckt. 5
7
20 9
21 10
JR 1
22 11
Ckt. 3
Signal
8
23 12
24 13
14
9
15
Amplifier IS200TAMBH1A 16
17
Ckt. 4
1
0
18
(CCSA) 26
25
20
19 Ckt. 5
1
1
27 21
22
28 Ckt. 6 23
29
1
2
30 24
31
32 Ckt. 7
1
3
34
33
IS200TAMBH1A
JR 5
35
1
4
36 Ckt. 8 25
38
37 26
27 GE Mark VI Terminal Board(s)
Low noise
1
5
39
Ckt. 9
28 Ckt. 6
40 29
41 30
and VME I/O Rack
1
6
Pressur
cable 42
44
43 32
31
33
Ckt. 7
1
7
1 45 34
e
JR 5
46 35
8 47 36 Ckt. 8
1
8
Sensor 48 37
38
39
40 Ckt. 9
41
Non-GE Instrumentation 42
44
43
Option 2 46
45
47
48
System Overview
GEH-6421Q System Guide, Volume II Acoustic Monitoring Input (VAMB) 5-1

The selected product combination determines the system requirements as follows:
18 channels of signal conditioning for sensing dynamic pressure output from third
party charge amplifiers
- Bentley-Nevada, Vibro-meter, PCB Piezotronics, GE PS CCSA and
GE/Reuter-Stokes vendors are supported
- Differential inputs and adjustable gains
- Fast synchronous-sampled analog/digital with 8x over-sampling capability to
minimize analog filtering
- Field Programmable Gate Array (FPGA) pre-processor with Finite Impulse
Response (FIR) filters
- Open wire detection
Analysis capability per channel
- Proprietary functions
- RMS value for the ac input signal
- Alarm detection if peak amplitude exceeds configurable level
- List captures capability for all 18-channels if an alarm is detected
The acoustic monitoring function for the frame 6, 7, or 9 size gas turbines is supported by
the VAMB and either one or two TAMB terminal boards. The TAMB receives an mV
output from the CCSA or a third party charge amplifier. Power for the charge amplifier is
supplied by the TAMB using a current limited +24V or -24V supply or from an external
source. Other than electro-magnetic transient suppression, the differential input signal is
routed directly to the VAMB through a cable with 18 twisted-pairs to the Versa Module
Eurocard (VME) card front edge.
Acoustic Monitoring for the Frame 6, 7, or 9 Gas Turbines
Gas Turbine No. of No. of Flame No. of VAMB I/O No. of Max. No. of channels
Frame Size Combustors Detectors TAMB supported
6FA 6 4 1 1 9
7EA 10 8 1 2 18
7FA, 7FB 14 4 1 2 18
9FA 18 4 1 2 18
5-2 Acoustic Monitoring Input (VAMB) GEH-6421Q Mark* VI Control

Installation
A GE field service technician The figure TAMB Acoustic Monitoring Terminal Board shows the functionality of one of
should install the VAMB. the nine channels supported on the TAMB. Each channel provides current limited +24 V
Technicians should refer dc and +24 V dc power supply outputs. A constant current source is connected to the
to GII-100014, VAMB SIGx line for the PCB sensors. The input signal, CCSELx, is False when the signal is a
Acoustic Monitoring Module, logic-level low through an output on the VAMB. At power-up, the output must be False
for complete installation (logic-level low), leaving the constant current output deselected until the configuration
instructions. parameters are loaded.
Each channel provides a hardware jumper, JPx, where x equals an even number, which
selects a current input, I_IN, or a voltage input, V_IN. The current input provides a 250
W burden resistor for any 4-20 mA circuits connected to that channel.
Each channel has a jumper, JPx, where x equals an odd number, which checks whether
the return line, RETx, is tied to the terminal boards power common, PCOM. If JPx=
PCOM, then the RETx line is tied to PCOM. If JPx= OPEN, then the RETx line is
not tied to PCOM.
A high impedance dc bias allows the VAMB to detect an open connection between the
charge amplifier or sensor and the TAMB. The dc bias control provides three options:
28 V bias or ground applied to the signal line
SIGx and return line
RETx
These inputs are activated or the signal select is True if the Mark* VI I/O board outputs a
logic-level low signal from the TTL output. The table shows the selections:
CD Bias Control Selections
BIASxP BIASxN SIGx/RETx Biased to

True True Illegal combination. Bias circuit protects power supplies from shorting
True False +28 V bias selected
False True -28 V bias selected
False False No bias selected, but both SIGx and RETx are pulled to ground to keep the unused input
electrically quiet.
The sensor or charge amplifier signal output is connected to the terminal board point,
SIGx, and the Kelvin or low-current return is connected to RETx. The terminal board
provides signal suppression and EMI protection and passes the signal on to the VAMB
through a 37-pin connector.
Each channel provides a buffered BNC output. The buffered signal is the input signal
minus the dc bias.

TAMB
Channel 1
BNC_1
P24V1 Buffered
2
S S
Current
PCOM Current
Limiter
1 S
Reg. Diode
S P28 JA1
CCSEL1 26
3 SIG1 Atten.
S I_IN J1A To
Atten. other
V_IN
25 chnls P28 1,18
NC 0 N28 20
oh J1B Bias Circuit BIAS1P
Bias1P Bias1N Sig1/Ret1 3
ms PCOM OPEN
False False no bias,gnd BIAS1N 4
RET1 NC
False True -28V bias PCOM 2,17,
5 True False +28V bias
S PCOM True True N/A DCOM 21
19,36
N24V1 Current N28 P28 SigComR
4 Limiter Brd_IDR1 35
S 37
38
TAMB provides the following I/O points: 39
Channel Signal TB JB1 BNC Diag. JA1
Number Name Pt. Pt. Signal Signal Pt.
------------- -------- ---- ----- --------- ------ ---------
1 PCOM 1 SCOM
P24V1 2 BIAS1P 3
SIG1 3 3 BNC_1 CCSEL1 26 Serial EPROM
N24V1 4 BIAS1N 4
RET1 5 22
2 PCOM 6
Serial EPROM
P24V2 7 CBLJ5_ID
SIG2 8 5 BNC_2 BIAS2P 5
N24V2 9 CCSEL2 27 JB1
RET2 10 24 BIAS2N 6 18
3 PCOM 11 DCOM 37
P24V3 12 BIAS3P 7
SIG3 13 7 BNC_3 CCSEL3 28 6
N24V3 14 BIAS3N 8 POVRVP 2
RET3 15 26 NOVRVP
4 PCOM 16 4
P24V4 17 BIAS4P 9
SIG1 1
SIG4 18 9 BNC_4 CCSEL4 29 RET1 20
N24V4 19 BIAS4N 10 PCOM 21,23
RET4 20 28
5 SIG5 21 11 BNC_5 CCSEL5 30 38
P24V5 22 BIAS5P 11 39
RET5 23 30
N24V5 24 BIAS5N 12
PCOM 25
6 P24V6 26 BIAS6P 13
SIG6 27 13 BNC_6 CCSEL6 31
N24V6 28 BIAS6N 14
RET6 29 32 SCOM
PCOM 30
7 SIG7 31 15 BNC_7 CCSEL7 32
P24V7 32 BIAS7P 15
RET7 33 34
N24V7 34 BIAS7N 16
PCOM 35
8 P24V8 36 BIAS8P 22
N24V8 38 BIAS8N 23
RET8 39 35
PCOM 40
9 P24V9 41 BIAS9P 24
N24V9 43 BIAS9N 25
RET9 44 35
PCOM 45
DIAG 46
48 DIAGRET 47
SCOM
TAMB Acoustic Monitoring Terminal Board

Terminal Point Definitions
Signal Name Pin # Description of 48-pin Customer Terminal Points

PCOM 1 Power supply returns for either the P24 V or N24 V supply
P24V1 2 +24 V output feed for input #1s charge amplifier (used with Vibro-meter equipment)
SIG1 3 Dynamic pressure differential voltage input #1 signal side
N24V1 4 -24 V output feed for input #1s charge amplifier (used with Bently-Nevada equipment).
RET1 5 Dynamic pressure differential voltage input #1 return
SIG2 8 Dynamic pressure differential voltage input #2 signal side.
N24V2 9 -24 V output feed for input #2s charge amplifier. (used with Bently-Nevada equipment)
PCOM 11 Power supply returns for either the P24 V or N24 V supply.
SIG3 13 Dynamic pressure differential voltage input #3 signal side.
N24V4 19 -24 V output feed for input #4s charge amplifier (used with Bently-Nevada equipment)

Signal Name Pin # Description of 48-pin Customer Terminal Points
SIG9 42 Dynamic Pressure differential voltage input #9 signal side
DIAG 46 Diagnostic DAC output
DIAGRET 47 Return for diagnostic DAC output
SCOM 48 Shield ground

Acoustic Monitor Terminal Board, TAMB (Simplex only)
TB1
x
x 1 PCOM
P24V1 x 2
x 3 SIG1
N24V1 x 4
x 5
PCOM x 6 RET1
x 7 SIG2
P24V2 x 8
x
N24V2 x 10 9 RET2
x 11 PCOM JA1
P24V3 x 12
x 13 SIG3
N24V3 x 14
x 15 RET3
PCOM x 16
x
P24V4 x 18 17 SIG4
x 19 RET4
N24V4 x 20
x 21
P24V5 x 22 SIG5
x
N24V5 x 24 23 RET5
BNC1
x
BNC2
Board Jumpers To
BNC3 I/O rack
TB2 Circuit Jumpers R, S or T
x header
Open / Pcom V_IN / I_IN BNC4
P24V6 x 26
x 25 PCOM slot for
x SIG1 JP1 JP2 VAMB
N24V6 x 28 27 SIG6
BNC5
x 29 RET6 SIG2 JP3 JP4
PCOM x 30 JB1
x 31 SIG7 SIG3 JP5 JP6
P24V7 x 32 BNC6
x 33 RET7 SIG4 JP7 JP8
N24V7 x 34
x 35 PCOM SIG5 JP9 JP10
P24V8 x 36 BNC7
N24V8
x 38
x 39 RET8 SIG7 JP13 JP14 BNC8
PCOM x 40
P24V9 x 42
x 43 RET9 SIG9 JP17 JP18 BNC9
N24V9 x 44
x 45
DIAG x 46 PCOM
x
SCOM x 48 47 DIAGRET
x To
VAMB
card front
in I/O rack
R, S or T
Acoustic Monitor Terminal Board, TAMB

TAMB Jumper Settings
Vendor Vendor Model Vendor I/O Conn. TAMB Terminal TAMB Jpn TAMB Jpn
Point (x=1 to 9) (n=even number) (n=odd number)
Position Position
Bently-Nevada 350500 NC P24Vx V_IN PCOM
OUT SIGx
3-wire method COM RETx
VT N24Vx
NC PCOM
Bently-Nevada 350500 NC P24Vx V_IN Open
OUT SIGx
4-wire method COM RETx
(better than
3-wire)
VT N24Vx
COM PCOM
Vibro-meter IPC 620 or IPC +24V P24Vx V_IN PCOM
704 with GSI 122
or 130
VOUT SIGx
3-wire method 0V RETx
NC N24Vx
NC PCOM
Vibro-meter IPC 620 or IPC +24V P24Vx V_IN Open
704
with GSI 122 or VOUT SIGx
130
4-wire method 0V RETx
NC N24Vx
0V PCOM
GE Power System Charge Converter NC P24Vx V_IN Open
Signal Amp
OUT+ SIGx
(CCSA)
OUT- RETx
NC N24Vx
NC PCOM
PCB Piezotronics 111A21, 102A05, NC P24Vx V_IN PCOM
102M43, Signal SIGx
102M158, Ground RETx
102M170, NC N24Vx
102M174 NC PCOM

Vendor Vendor Model Vendor I/O Conn. TAMB Terminal TAMB Jpn TAMB Jpn
Point (x=1 to 9) (n=even number) (n=odd number)
Position Position
GE / Flame + conn. P24Vx I_IN PCOM
Reuter-Stokes
Tracker RSFS - conn. SIGx
-9001 and -9002 NC RETx
-9004, -9005, and NC N24Vx
-9006
NC PCOM
Operation
The VAMB software features include:
18 channels of acoustic monitoring with
- Synchronous sampling of all 18 channels of data
- Configuration of TAMB terminal board controlling open circuit test voltage and
constant current mode
- A/D gain and offset adjustment
- Dc bias removal from dynamic pressure signal to maximize SNR
- Proprietary firmware functions
- RMS calculation of the sampled AC signal data.
- Milli-volt to engineering units conversion of RMS value
Configuration constants can be changed through Mark VI toolbox
40 ms frame rate updates for signal space variables used by the application software
Offline and online diagnostics to check the hardware
A/D Compensation
Refer to the figure, Channel The A/D compensation function nulls any gain or offset error due to initial component
x Acoustic Monitoring Block variances. The firmware has an auto-calibration function built in for the A/Ds it controls.
Diagram, where x equals 1-18. The auto-calibration function compares each of the 18 analog channels against a gold
standard A/D channel. The gold standard A/D channel is calibrated using a standard
high-precision voltage reference and the A/D common.
Input Units to Engineering Value Conversion
The Acoustic Monitoring function provides a conversion from the hardware input units
to the engineering units needed for the system calculation. For the mV to psi conversion,
the range is 20 to 600 mV per psi. The firmware will be given four configuration
parameters per channel to define the equation for the transfer function.
Value (engineering units in counts) = GUnitConversion * Input (milli-volts in counts)
+ Offset
where
GUnitConversion = (High_Value Low_Value) / (High_Input Low_Input)
Offset = High_Value - GUnitConversion * High_Input
where High_Value, Low_Value, High_Input + Low Input are the configuration
parameters.

A/D Gain Adjust
The configuration parameter, Gain defined for each channel controls the channel gain
in the hardware. This allows for the amplification of low level signals to provide better
resolution in the analog to digital conversion hardware. The gain options are 1, 2, 4 and
8. The channel control writes the gain set up to the FPGA VSPA input amplifier 4x and
2x gain control registers. The signal level calculated by the VAMB firmware will not
change with a change in the Gain parameter because the signal is divided by the Gain
factor in the firmware to result in a net gain of 1 for the signal regardless of the gain
factor used. The maximum expected signal level should not exceed 10 V (saturation)
after the gain is applied as indicated in the following table.
Rules for Selecting Proper Value for Gain
Gainx Maximum magnitude of input signal after dc bias is removed (volts)

1 10
2 5
4 2.5
8 1.25
Rms Calculation and Rolling Average

The root-mean-square (rms) calculation performs an rms calculation on the ac acoustic
information sampled for a given scan. The rms is defined as follows:
rms_Chx = SQRT ( (AC_Input(0)**2 + AC_Input(1)**2 + +
AC_Input(Buffer_Length)**2) / Buffer_Length)
Where x is the channel number.
The rolling average provides a smoothing function to reduce the vibration in the signal.

I/O Card Configuration Constants (common to all channels)
Sample_Rate
ScanPrAvgRMS
Ch. x Acoustic Monitoring Function
To Anti-aliasing
FPGA Gain Dig. Filter
Registers Support
Signal Space

SIGx
Buffer
From Input Units

FPGA via A/D RMS Rolling
to
DMA cntrl Comp Calculation Average
Eng. Value Conv.
Buffer
TAMB Terminal Board Control

To DC Bias1P & Bias1N to Pre-Processing FPGA
FPGA Bias DC Bias Select
Comp CCSel1 to Pre-Processing FPGA
Channel x Acoustic Monitoring Block Diagram

Charge Amp PS Constant Current Select
AI1x2, AI1x4 to Pre-Processing FPGA

Slow A/D Sample Group Gain Adjust
ADGain CCSel Low_Input, High_Input

ADOffset BiasLevel Low_Value, High_Value
Gain
InputUse
I/O Card Configuration Constants (per channel) Control Constants (per channel)
Acoustic Monitoring Input (VAMB) 5-11

Specifications
Signal Input Accuracy
Requirement Limits
RMS Calculation Accuracy for Gain = 1, 2, 4 or 8 volts / volt 2.0% full scale
Peak-to-Peak FFT Calculation Accuracy for Gains = 1, 2, 4 or 8 0.5% full scale from 0 to 1600 Hz
volts / volt 1.5% full scale from 1601 to 3200 Hz
Power Supply
Requirement Limits
Number of P24 dual-mode outputs (one current-limit output, P24 Vx and one constant current 9 (one per channel)
output tied to SIGx selectable through CCSELx)
P24 V (current-limit mode selected) +22.8 to +25.2 V dc
P24 nominal current (current-limit mode selected) 44 mA 10%
(due to standing current of IPC 704 on GSI 122/130)
P24 minimum/maximum peak current range (current-limit mode selected) 20 60 mA
(due to 5 mA ac signal component plus some over range riding on top of standing current of IPC
704 connected to GSI 122/130 from Vibro-meter)
P24 V (constant current mode selected with supply tied to SIGx) +20 to +30 V dc
P24 nominal current (constant current mode selected) 3.5 mA 10%
Constant current input type TTL
Constant current selection logic level for TRUE state. (TAMB ckt. provides a pull-up for the input.) High
Number of N24 current-limited outputs 9 (one per channel)
N24 V -18.85 to -26 V dc
N24 nominal current 20 mA
N24 maximum load current 30 mA
Jumper Selections
Requirement Limits
Number of JPx (even) 3-pin jumpers with one side tied to the signal line, SIGx and the 9 (one per channel)
opposite side left open with the center pin tied to the 250 W burden resistor.
Silk screen label for connection from signal line, SIGx to the 250 W burden resistor. I_IN
Silk screen label for connection from the 250 burden resistor to no-connect pin (open). V_IN
Number of JPx (odd)3-pin jumpers with one side tied to the return signal, RETx , and the 9 (one per channel)
opposite side left open with the center pin tied to PCOM.
Silk screen label for connection from signal return, RETx to PCOM PCOM
Silk screen label for connection from PCOM to no connect pin. OPEN

Bias Control
Requirement Limits
Number of TAMB channels with bias control. 9 (one per channel)
Control input signal type TTL
Bias control input true state Logic high
Dc error to dynamic signal channel produced by the bias control. < 0.5 %
Constant Current Select for P24
Requirement Limits
Number of constant current control inputs 9 (one per channel)
Control input signal type TTL
Buffered BNC Outputs
Requirement Limits
Number of buffered BNC outputs 9 (one per channel)
Dc gain (Dc bias is removed from signal) 1 0.5 %
Allowable offset 30 mV 10%
Output impedance 40 50%
J6 connector type for QC 25-pin D shell
Diagnostics
Three LEDs at the top of the VAMB front panel provide status information. The normal
RUN condition is a flashing green, and FAIL is a solid red. The third LED is normally
off but displays a steady orange if a diagnostic alarm exists in the board.
Each input has system limit checking based on two configurable levels. These limits can
be configured for enable/disable, >= or <=, and as latching/nonlatching. RESET_SYS
resets the out of limits. If this limit is exceeded a system limit logic signal is set.
Refer to the table I/O Board Each input has sensor limit checking, open circuit detection, and dc bias autonulling and
Diagnostic Alarms and excessive dc bias detection. Alarms will be generated for these diagnostics. RESET_SYS
the table Terminal Point resets these alarms.
Configuration.
The TAMB terminal board has its own ID device, which is interrogated by the I/O board.
The board is coded into a read-only chip containing the terminal board serial number,
board type, revision number, and the JR, JS, JT connector location. This ID is checked as
part of the power-up diagnostics.

Configuration
Note The following information is extracted from the ToolboxST application and
represents a sample of the configuration information for this board. Refer to the actual
configuration file within the ToolboxST application for specific information.
Sample Configuration from ToolboxST Application
Module Parameter Description Choices

BinReject Defines the number of side bins that will be rejected 0 to 6
when the search function is applied to the FFT results
for channels 1 through 18.
0 = no bins rejected
Config_Mode Defines the source of the currently active configuration. Toolbox only
The Toolbox allows only mode Toolbox as a selection.
The remote gateway configurator forces mode to tuning
configurator without user control.
FFT_Length Defines the number of samples that will be used in the 1024 to 32768
FFT calculation. Selections are: 1024, 2048, 4096,
8192, 16382, and 32768.
FFT_TF_SelA Boolean that selects the internal test file as the input HW_Input to File
to all the acoustic monitoring channels instead of the
actual analog input signals.
EventLstSel Defines the sample site for the event capture list. Disable to Avg_Out
Disable: list not used
FFT_Out: fft output scaled in volts
TC_Out: fft output after transducer compensation
PSI_Out: fft outputs scaled in PSI
Avg_Out: PSI_Out after averaging filter
HiB_Limit Defines the limit level for the maximum peak-peak 0 to 50 Psi
amplitude signal in the high frequency band.
HiScrchBrkPt Defines the frequency boundary between the high and 0 to 3200 Hz
screech frequency bands.
LoLoB_Limit Defines the limit level for the maximum amplitude 0 to 50 Psi
signal in the low-low frequency band.
LowB_Limit Defines the limit level for the maximum amplitude 0 to 50 Psi
signal in the low frequency band.
LowLow_EndPt Defines the ending frequency of the low-low frequency 0 to 3200 Hz
band.
LowLowStrtPt Defines the starting frequency of the low-low frequency 0 to 3200 Hz
band.
LowMid_BrkPt Defines the frequency boundary between the low and 0 to 3200 Hz
mid frequency bands.
Low_StrtPt Defines the starting frequency of the low band. 0 to 3200 Hz
MidB_Limit Defines the limit level for the maximum amplitude 0 to 50 Psi
signal in the mid frequency band

MidHi_BrkPt Defines the frequency boundary between the mid and 0 to 3200 Hz
high frequency bands.
NumEventScns Defines the number of scans an event buffer will 1 to 32 Scans
contain.
*note if the sample location is set to Raw_Input the
maximum scan allowed is 1.
OpLstSel Defines the sample site for the spectrum on demand Disable to Avg_Out Bool
capture or diagnostic list.
Selections are:
Raw_Input: input time domain data
FFT_Out: fft output scaled in volts
PL_Fil_Freq Defines the power line frequency that the notch filter 50_Hz to 60_Hz
will remove from the spectral content of the FFT output.
Selections are 50 or 60 Hz.
PL_Fil_Tol Tolerance for power line filter signature calculated vs 0 to 1.0
theoretical. Ten percent tolerance is 0.1.
PL_Fil_Width Defines the bandwidth of the power line notch filter. 0 to 100 Hz
The bandwidth will be value entered centered about
the configured power line frequency.
SampleRate Sample rate defines the FFT sample rate for all the 12,877 Hz only
acoustic monitoring channels 118. Selections are:
12,887 Hz only.
ScanPrAvgFFT Number of scans per average in the acoustic monitoring 1 to 32 scans
filtered FFT output. Selections are:
integers 132
ScanPrAvgRMS Number of scans per average in the RMS calculation. 1 to 32 scans
Selections are:
integers 132
SearchInAvg(1) Selects whether the sort function for the pk-pk No average, Average
SearchInAvg(6) amplitudes uses the present scan only or uses an
averaged value
Session_Time Scheduled time for temporary configuration mode. 0 to 480 minutes
This time is forced to zero in the Toolbox. This value
shall be set to the user-selected time in the temporary
gateway remote configurator.
ScrchB_Limit Defines the limit level for the maximum amplitude 0 to 50 Psi
signal in the screech frequency band.
Scrch_EndPt Defines the ending frequency of the screech frequency 0 to 3200 Hz
band.
SysLimitDis Enable all system limit checking. Disable, Enable

T_FilWidth Width (Hz) of the filter that excludes the transverse 0 to 100 Hz
frequency fft coefficients and all fft coefficients
designated by this filter from the screech band search.
TMC_Gain(1) Transducer mounting compensation gain values for 30 0 to 10
TMC_Gain(30) points to characterize the gain response.
TMC_Freq(1) Frequency corresponding to the gain value entered. 0 to 3200 Hz
TMC_Freq(30) Each of the 30 gain points has a corresponding
frequency value.
TrnsB_Limit Defines the limit level for the maximum amplitude 0 to 50 Psi
signal in the transverse frequency band.
Trns_Bnd_Enb Enable calculations associated with the transverse Disable, Enable
band and excludes its FFT coefficients from the
screech band.
Trns_EndPt Defines the ending frequency of the transverse 0 to 3200 Hz
frequency band.
Trns_StrtPt Defines the starting frequency of the transverse 0 to 3200 Hz
frequency band.
WindowSelect Selects the windowing function to be used on the Rectangular to Flat Top
sampled data for both Channel A and B.
Rectangular
Hamming
Hanning
Triangular
Blackman
Blackman-Har(ris)
Flat Top
ZoomCanSel Selects one of the 18 acoustic monitoring cans to zoom 0 to 18
in on. Selections are:
None
Can_1 through Can_18
ZoomFFTLngth Defines the Zoom FFT Length of the input buffer. 1024, 2048, 4096, 8192, 16384, 32768
ZmEvntLstSel Defines the sample site for the zoom event capture list. Disable to Avg_Out
Selections are: Disable, FFT_Out, TC_Out, PSI_OUT,
and Avg_Out
ZmOpLstSel Defines the sample site for the zoom operator capture Disable to Avg_Out
list. Selections are:
Raw_Input: input time domain data
FFT_Out:fft output scaled in volts

Terminal Point Configuration
Module Description First of 9 analog inputs - board point Choices Point volts RMS
Parameter Sig1
Gain Analog Input resolution adjustment used to amplify signal before 1,2,4, 8 Volts / Volt
digital conversion. Gain factor * (maximum signal peak voltage) must
be less than 10 volts to prevent saturation. Selections: 1, 2, 4, and 8
BiasLevel BiasLevel is a dc bias voltage subtracted from the analog signal -11.6 to + 11.6 V dc
inputted for the dc bias compensation and used by the TAMB dc bias
select. Only used when InputUse is either custom or file.
Can_Id Combustor can be wired to this terminal board signal. This normally 1 to 18
corresponds to the signal number to avoid confusion; wire terminal
board signal 1 to can 1.
CCSel If constant current select is equal to 1 then the P24 voltage supply is False, True
configured as a constant current supply providing a 4 mA output. Only
used when InputUse is set to custom.
High_Input Defines point 2 x-axis value in milli-volts for TAMB terminal point 0 to 9998.8 mV
that is used in calculating the gain and offset for the conversion to
engineering units.
High_Value Defines point 2 Y-axis value in engineering units for TAMB terminal 0 to 99999 PSI
point that is used in calculating the gain and offset for the conversion
from milli-volts to engineering units.
InputUse Selects the sensor type used on the signal. Unused To File
Selections are: Unused, Bently-Nevada, Vibro-meter,
Vibro-mA(current), 4 CCSA, PCB, GE/RS (Reuter Stokes), Custom,
File(test data stored in VAMB)
Low_Input Defines point 1 x-axis value in milli-volts for TAMB terminal point 0 to 9998.8 mV
that is used in calculating the gain and offset for the conversion to
engineering units.
Low_Value Defines point 1 Y-axis value in engineering units for TAMB terminal 0 to 99999 PSI
point that is used in calculating the gain and offset for the conversion
from milli-volts to engineering units.
PL_Fil_En Enables the power line notch filter. Disable, Enable
DiagHighEnab Enables high input sensor limit diagnostics. Disable, Enable
DiagLowEnab Enables low input sensor limit diagnostics. Disable, Enable
OcBiasEnab Enables bias for open circuits. Disable, Enable
BiasNullEnab Enables automatic dc bias nulling. Disable, Enable
DiagOCChk Enables open sensor error diagnostic test. Disable, Enable
DiagBiasNull Enables excessive dc bias diagnostic test. Disable, Enable
DiagSigSat Enables signal saturation diagnostic test. Disable, Enable
SysLim1Enabl Enables system limit 1 fault check. Disable, Enable
SysLim1Latch Selects whether a fault is latching. NotLatch, Latch
SysLim1Type Selects how the test values are compared. <=, >=
SysLimit1 Value to use for system limit comparison. -1000 to 1000 Psi
SysLim2Enabl Enables system limit 2 fault check. Disable, Enable

Module Description First of 9 analog inputs - board point Choices Point volts RMS
Parameter Sig1
SysLim2Latch Selects whether a fault is latching. Not Latch, Latch
SysLim2Type Selects how the test values are compared. <=, >=
SysLimit2 Value to use for system limit comparison. -1000 to 1000 Psi
VAMB Board Points
Board Points (Signals) Description Point Edit(Enter Signal Connection) Direction Type
L3DIAG_VAMB1 Board Diagnostic Input BIT
Can1_Health Combustor can 1 signal health Input BIT
: :
Can18_Health Combustor can 18 signal health Input BIT
Sig1_SysLim1 Terminal board signal 1 outside of system limits 1 Input BIT
: :
Sig18_SyslLim1 Terminal board signal 18 outside of system limits 1 Input BIT
Sig1_SysLim2 Terminal board signal 1 outside of system limits 2 Input BIT
: :
Sig18_SyslLim2 Terminal board signal 18 outside of system limits 2 Input BIT
Test_Config Card is temporarily remotely configured Input BIT
Test_Mode Signals are from internal test sources, not from Input BIT
terminal board
TripCapList A capture list triggered by TripCapReq is available Input BIT
UserCapList A capture list manually requested by a user is available Input BIT
VambBool_1 General Electric Proprietary Information Input BIT
: :
VambBool_6 General Electric Proprietary Information Input BIT
VambPt_0 General Electric Proprietary Information Input INTEGER
: :
VambPt_263 General Electric Proprietary Information Input INTEGER
Num_Of_Scans Scan (block of FFT data) number of this data (1-32) Input INTEGER
Num_Avg_Scns Number of scans (block of FFT data) averaged (1-32) Input INTEGER
Session_Tmr Time remaining for remote tuning session Input INTEGER
Trip_Cap_Req Request for trip capture buffer collection Input BIT

Alarms
2 Flash Memory CRC Failure Board firmware programming error (board will not
go online)
3 CRC Failure Override is Active Board firmware programming error (board will not
go online)
16 System Limit Checking is Disabled System limit checking was disabled by configuration
18 Incorrect J3 Terminal Board ID Cable to J3 connector not properly connected to a
TAMB terminal board or terminal board defective.
30 ConfigCompatCode Mismatch;Firmware:#.Tre:#. A tre file has been installed that is incompatible with
the firmware on the I/O board. Either the tre file or
firmware must change. Contact the factory.
31 IOCompatCode Mismatch;Firmware:# Tre:# A tre file has been installed that is incompatible with
38 Flashdisk error: Unable to revert to flash Permanent configuration data on card is
configuration after remote access corrupted. Download firmware to card or replace
card.
39 JA1-JB1 TB IDs do no match: Check for Terminal board cables are not properly
cross-cabling connected. Check for cross-cabling.
40 VAMB A/Ds not calibrated, Run Self Test Contact factory for instructions to run self test.
41-58 Sig x: Open Ckt Test Failed. Check Wires and Open circuit detected for terminal board signal Sig
Sensor. x, where x is the identified point. Check wiring and
sensor.
61-78 Sig x: Bias Nulling Error. Check InputUse Config. Dc bias designated for sensor type is outside of
range detected for sensor. Check sensor type in
configuration parameter InputUse, or check dc bias
voltage on signal.
81-98 Sig x: Input Signal Saturated Check Gain Config Peak input voltage is saturating input. Decrease
configuration parameter Gain for designated signal,
or check for sensor problem.
101- 118 Sig x: Sensor Limit Exceeded Peak input voltage exceeds limit for selected sensor
type. Check sensor type in configuration parameter
InputUse, or check for sensor problem.

Analog Output (VAOC)
VAOC Analog Input
The Analog Output (VAOC) board controls 16 analog, 20 mA outputs. Outputs are
wired to analog output terminal board(s) (TBAO or DTAO). Cables with molded plugs
connect the terminal board to the VME rack where the VAOC processor board is located.
VAOC receives digital values from the controller over the VME backplane from the
VCMI, converts these to analog output currents, and sends them to the terminal board.
The actual output current is measured on the terminal board and fed back to VAOC
where it is controlled.
In triple modular redundant (TMR) applications, control signals are fanned to the same
terminal board from three VME board racks R, S, and T, as shown in the following
figure. Six cables are required to support all 16 outputs. Each final current output is the
median selection of the three currents in the three VAOCs. This median select circuit
is in each VAOC.
Compatibility
There are two generations of the VAOC board with corresponding terminal boards. The
original VAOC includes all versions prior to and including VAOCH1B. When driving
20 mA outputs, these boards support up to a 500 load resistance at the end of 1000 ft
(304.8 m) of #18 wire. This generation requires terminal board TBAOH1B or earlier for
proper operation, or any revision of DTAI.
The newest VAOC board, VAOCH1C, and any subsequent releases, support higher
load resistance on the first eight output circuits. For 20 mA outputs, a drive voltage up
to 18 V is available at the terminal board screw terminals. This permits operation with
a 800 load resistance with 1000 ft (304.8 m) of #18 wire with margin. The second
set of eight output circuits retains the 500 rating of the original VAOC. VAOCH1C
requires TBAOH1C or later.
6-1 Analog Output (VAOC) GEH-6421Q Mark* VI Control

VME Rack R x
VAOC Board
RUN
FAIL
STAT
TBAO Terminal Board
x JT1 JT2 VME bus to VCMI

x x
x x
x x
x x
x x
x x
x x
x x Cables to VME
x x
x x JS1 JS2 Rack T
x x
x x
x
x
x x
x x
x x Cables to VME
x
x
x JR1 JR2 Rack S
VAOC
x
x x x
x x
x x
x x
x x J3
x x
x x
x
J4
VAOC Board, TBAO Terminal Board, and Cabling

Installation
Cable connections to the To install the V-type board
terminal boards are made at
1. Power down the VME I/O processor rack
the J3 and J4 connectors on
the lower portion of the VME 2. Slide in the board and push the top and bottom levers in with your hands to seat
rack. These are latching type its edge connectors
connectors to secure the cables. 3. Tighten the captive screws at the top and bottom of the front panel
4. Power up the VME rack and check the diagnostic lights at the top of the front panel
GEH-6421Q System Guide, Volume II Analog Output (VAOC) 6-2

Operation
VAOC supports 16 analog 0-20 mA outputs. The VAOC contains the D/A converter
and driver that generates the controlled currents, as shown in the following figure. The
output current is measured by the voltage drop across a resistor on the terminal board.
Terminal board outputs have noise suppression circuitry to protect against surge and high
frequency noise. The following figure shows VAOC circuitry in a simplex arrangement.
<R> Module
Analog Output Board VAOC TBAO Terminal Board Maximum load
Noise 4-20 mA, 500
Suicide
D/A Current suppr- ohms
100 Relay J3 JR1
Regulator/ ohms
ession 01
Signal
From Power Driver 50 ohms
NS Circuit #1
controller 02 Return
Sensing
Current 03 Signal
04 Return Circuit #2
Sensing 05 Signal
Output Current
07 Signal
First group of 8 analog 0-20 mA outputs Group 1 09 Signal
ID 11 Signal
13 Signal
15 Signal
Suicide
D/A Current 16 Return Circuit #8
100 Relay J4 JR2
Regulator/ ohms 17 Signal
From Power Driver 50 ohms NS 18 Return Circuit #9
controller 19 Signal
Current Sensing
21 Signal
Output Current Sensing
23 Signal
25 Signal
Second group of 8 analog 0-20 mA outputs Group 2 26 Circuit #13
Return
27 Signal
ID 28 Circuit #14
Return
29 Signal
31 Signal
Connectors at bottom 32 Return Circuit #16

of VME rack
Analog Output Current Circuits, Simplex System

In a TMR system, each analog current output is fed by the sum of the currents from the
three VAOCs. The total output current is measured with a series resistor that feeds a
voltage back to each VAOC. The resulting output is the voted middle value (median)
of the three currents. If one output fails, the other two pick up the current to the correct
value. In the event of a circuit malfunction that cannot be cleared by a command from
the processor, the circuit is disconnected by opening the shutdown relay contacts. This
isolation function is only operational when configured for TMR operation.

Specifications
Item Specification
Number of channels 16 current output channels, single ended (one side connected to common)
Analog outputs 0-20 mA with up to 500 burden
response better than 50 rad/sec
D/A converter resolution/accuracy 12 bit resolution with 0.5% accuracy
Frame rate 100 Hz on all 16 outputs
Fault detection Output current out of limits
Outer total (TMR) current
D/A converter output
Suicide relay operation
Failed ID chip
Diagnostics
Three LEDs at the top of the I/O board front panel provide status information. The
normal RUN condition is a flashing green, and FAIL is a solid red. The third LED shows
STATUS and is normally off but displays a steady orange if a diagnostic alarm condition
exists in the board. The diagnostics include the following:
Each output is monitored by diagnostics. Voltage drops across the local and outer
loop current sense resistors, the D/A outputs, and at the shutdown relay contacts are
sampled and digitized.
Standard diagnostic information is available on the outputs, including high and low
limit checks, and high and low system limit checks (configurable). If any one of
the outputs goes unhealthy a composite diagnostic alarm, L3DIAG_xxxx, occurs.
Details of the individual diagnostics are available from the toolbox. The diagnostic
signals can be individually latched, and then reset with the RESET_DIA signal
if they go healthy.
by the I/O processor. The ID device is a read-only chip coded with the terminal
board serial number, board type, revision number, and the JR, JS, and JT connector
location. When the ID chip is read by the I/O processor and a mismatch is
encountered, a hardware incompatibility fault is created.

Configuration
Note The following information is extracted from the toolbox and represents a sample
of the configuration information for this board. Refer to the actual configuration file
within the toolbox for specific information.
Sample VAOC Configurations
Parameter VAOC Configuration Description Choices

VAOC Configuration
Output Voting Select type of output voting Simplex, Simplex TMR
J3:IS200TBAOH1A Terminal board connected to VAOC through J3 Connected, not connected
AnalogOut1 Analog output 1 board point (first set of 8 analog Point edit (output FLOAT)
outputs)
Output_MA Type of output current Unused, 0-20 mA
Low_MA Output mA at low value 0 to 20 mA
Low_Value Output in engineering units at low mA -3.4028e + 038 to 3.4028e + 038
High_MA Output mA at high value 0 to 20 mA
High_Value Output value in engineering units at high mA -3.4028e + 038 to 3.4028e + 038
TMR_ Suicide Enable suicide for faulty output current, TMR only Enable, disable
TMR_Diff Limit Current difference in mA for suicide, TMR only 0 to 20 mA
D/A_Err Limit Difference between D/A reference and output, in 0 to 100 %
% for suicide, TMR only
J4:IS200TBAOH1A Terminal board connected to VAOC though J4 Connected, not connected
AnalogOut9 Analog output 9 - board point (second set of 8 Point edit (output FLOAT)
analog outputs)
VAOC Board Points Signals
Board Points Signals Description - Point Edit (Enter Signal Connection) Direction Type
L3DIAG_VAOC1 Board diagnostic Input BIT
L3DIAG_VAOC2 Board diagnostic Input BIT
L3DIAG_VAOC3 Status of suicide relay for output 1 Input BIT
OutSuicide1 Input BIT
: : Input BIT
Out1MA Measure total output current in mA Input Float
: : Input Float
Out16MA Measure total output current in mA Input Float

Alarms
go online)
to go online)
24 Firmware/hardware Incompatibility Invalid terminal board connected to VME I/O board
30 ConfigCompatCode mismatch; Firmware: [ ]; Tre: A tre file has been installed that is incompatible with
[ ]The configuration compatibility code that the the firmware on the I/O board. Either the tre file or
firmware is expecting is different than what is in the firmware must change. Contact the factory
31 IOCompatCode mismatch; Firmware: [ ]; Tre: [ ]The A tre file has been installed that is incompatible with
is different than what is in the tre file for this board firmware must change. Contact the factory
82-97 Output [ ] Total current too high relative to total Board failure
current. An individual current is N mA more than
half the total current, where N is the configurable
TMR_Diff Limit
98-113 Output [ ] Total current varies from reference current. Board failure or open circuit
Total current is N mA different than the reference
current, where N is the configurable TMR_Diff Limit
114-129 Output [ ] Reference Current Error. The difference Board failure (D/A converter)
between the output reference and the input feedback
of the output reference is greater than the configured
DA_Err Limit measured in percent
130-145 Output [ ] Individual Current Unhealthy. Simplex Board failure
mode alarm indicating current is too high or too low
146-161 Output [ ] Suicide Relay Non-Functional. The suicide Board failure (relay or driver)
relay is not responding to commands
162-177 Output [ ] Suicide Active. One output of three has Board failure
suicided, the other two boards have picked up the
current

TBAO Analog Output
The Analog Output (TBAO) terminal board supports 16 analog outputs with a current
range of 0-20 mA. Current outputs are generated by the I/O processor, which can be local
(Mark* VIe control) or remote (Mark VI control). The outputs have noise suppression
circuitry to protect against surge and high-frequency noise. TBAO has two barrier-type
terminal blocks for customer wiring and six D-type cable connectors.
Mark VI Systems
In Mark VI systems, TBAO works with VAOC processor and supports simplex and TMR
applications. Cables with molded plugs connect TBAO to the VME rack where the
VAOC board is located. In TMR systems, TBAO is cabled to three VOAC boards.
Mark VIe Systems
In Mark VIe systems, TBAO works with the PAOC I/O pack and supports simplex
applications only. The I/O packs plug into the D-type connectors and communicate
over Ethernet with the controller.
Note Refer to GEI-100577 Mark VIe Analog Input for board compatibility.
x DC-37 pin connectors

x
x 2
x 1 JT1 JT2 with latching fasteners
x 4 x 3
Eight Analog x 5
x 6
Outputs x 8
x 7
x 10 x 9
x 12 x 11
x 14 x 13 J ports conections:
x 16
x 15
x 18 x 17 Plug in PAOC I/O Pack(s)
x 20 x 19 JS1 JS2 for Mark VIe system
x 22 x 21
x 24 x 23 or
x
Cables to VAOC I/O boards
x for Mark VI;
x 26 x 25
28 x 27
Eight Analog x
x 29 The number and location depends
Outputs x 30
x 32
x 31 on the level of redundancy required.
x 33 JR1 JR2
x 34
x 36 x 35
x 38 x 37
x 40 x 39
x 42
x 41
x 44 x 43
x 46 x 45
x 48 x 47
x
x
Barrier Type Terminal

Shield
Blocks can be unplugged
Bar
TBAO Analog Output Terminal Board

Installation
Attach TBAO to a vertical mounting plate. Connect the wires for the 16 analog outputs
directly to the two I/O terminal blocks mounted on the left of the board. Each point
can accept two 3.0 mm (#12AWG) wires with 300 V insulation per point using spade
or ring type lugs. Each block is held down with two screws and has 24 terminals. A
shield terminal strip attached to chassis ground is located immediately to the left of each
terminal block. Make cable connections to TBAO follows:
In Mark VI systems, connect cables with molded plugs to the D-type connectors on
the TBAO and to the VME rack where the VAOC processor is located. Use two
cables for simplex or six cables for TMR.
In Mark VIe systems, plug the PAOC I/O packs directly into selected D-type
connectors. Special side mounting brackets support the packs.

The following figure shows details of TBAO wiring and cabling.
For Mark VIe

Analog Output Termination Board TBAO control, use I/O
JT1 JT2 Packs
x For Mark VI
Output 1 (Return) x
x 1 Output 1 (Signal) control, use
2
x 3 Output 2 (Signal) cables as
Output 2 (Return) x 4
Output 3 (Return) x x 5 Output 3 (Signal) follows:
6
Output 4 (Return) x
x 7 Output 4 (Signal)
8 To J4
Output 5 (Return) x
10 on I/O
Output 6 (Return) x 12 rack T
Output 8 (Return) x x 15 Output 8 (Signal)
16
x 17 Output 9 (Signal) JS1 JS2 To J3
Output 10(Return) x x 19 Output 10(Signal) on I/O
20
x 21 Output 11(Signal) rack T
Output 11(Return) x 22
Output 12(Return) x
x 23 Output 12(Signal)
24
x
x To J4
x 25 Output 13 (Signal) on I/O
Output 13(Return) x 26
Output 14(Return) x
x 27 Output 14 (Signal) rack S
28
Output 15(Return) x x 29 Output 15 (Signal)
30
Output 16(Return) x
x 31 Output 16 (Signal) JR1 JR2 To J3
32
x 33 on I/O
x 34
x 35 rack S
x 36
x 37
x 38
x 39
x 40
x 41
x 42
x 43
x 44
x 45 To J4
x 46
x 47 on I/O
x 48
x
rack R
To J3
on I/O
rack R
I/O Terminal block with barrier terminals
Terminal blocks can be unplugged from
terminal board for maintenance
Up to two #12 AWG wires per point with 300
volt insulation
TBAO Terminal Board Wiring

Operation
TBAO supports 16 analog control outputs. Driven devices should not exceed a resistance
of 500 (900 if using I/O packs) and can be located up to 300 m (984 ft) from the
turbine control cabinet. The VAOC or PAOC contains the D/A converter and drivers
that generate the controlled currents. The output current is measured by the voltage
drop across a resistor on the terminal board.
Filters reduce high-frequency noise and suppress surge on each output near the point of
signal exit. The following figure shows TBAO in a simplex system.
TBAO Terminal Board

Noise
JR1 suppression
Current output 50 ohms 01 Signal
NS Circuit #1
02 Return
03 Signal
Current feedback 05 Signal
Current feedback
07 Signal
return
09 Signal
Group 1
(8)
ID 11 Signal
To I/O
13 Signal
Processors
15 Signal
JR2 16 Return Circuit #8

50 ohms 17 Signal
NS 18 Return Circuit #9
19 Signal
21 Signal
23 Signal
25 Signal
Group 2
(8)
27 Signal
ID 28 Circuit #14
Return
29 Signal
31 Signal
Analog Outputs, Simplex

In a TMR system, each analog current output is fed by the sum of the currents from the
three I/O processors, as shown in the drawing below. The total output current is measured
with a series resistor that feeds a voltage back to each I/O processor. The resulting output
is the voted middle value (median) of the three currents.
TBAO Terminal Board

Noise
JR1 Suppression
Current output 50 ohms
01 Signal
NS Circuit #1
02 Return
03 Signal
Current feedback
05 Signal
Current feedback 06 Return Circuit #3
Return 07 Signal
ID 09 Signal
JS1 Group 1
(8) 10 Return Circuit #5
11 Signal
ID 13 Signal
To I/O processors JT1 15 Signal
ID
JR2 17 Signal
19 Signal
21 Signal
ID
JS2 23 Signal
Group 2 25 Signal
(8) 26 Circuit #13
Return
ID 27 Signal
To I/O processors 28 Circuit #14
JT2 Return
29 Signal
31 Signal
ID 32 Return Circuit #16
Analog Output, TMR

Specifications
Item Specification
Number of channels 16 current output channels, single-ended (one side connected to common)
Analog output current 0-20 mA
Customer load resistance Up to 500 burden with VOACH1B and TBAOH1B and 900 burden (18 V compliance)
with PAOC and TBAOH1C
Physical
Size 10.16 cm wide x 33.02 cm high (4.0 in x 13.0 in)
Temperature -30 to +65C (-22 to +149 F)
Diagnostics
Configuration
There are no jumpers or hardware settings on the board.

DTAO Simplex Analog Output
The DTAO board does not work The Simplex Analog Output (DTAO) terminal board is a compact analog output terminal
with the PAOC I/O pack. board designed for DIN-rail mounting. DTAO has eight analog outputs driven by
the VAOC I/O board over a single cable. This board is designed for simplex-only
applications and only works with the VAOC. A single cable with 37-pin D-type connector
connects DTAO to the VAOC rack. This cable is identical to those used on the larger
TBAO terminal board. Two DTAO boards can be connected to the VAOC for a total of
16 analog outputs.
The on-board circuits and noise suppression are the same as those on TBAO. High-
density Euro-block type terminal blocks are permanently mounted to the board, with two
screw connections for the ground connection (SCOM). An on-board ID chip identifies
the board to the VAOC for system diagnostic purposes.
Installation
There is no shield terminal strip Mount the plastic holder on the DIN-rail and slide the DTAO board into place. Connect
on DTAO. the wires for the eight analog outputs directly to the terminal block as shown in the
following figure. Driven devices should not exceed a resistance of 500 and can be
located up to 300 m (984 ft) from the turbine control cabinet. The Euro-block type
terminal block has 36 terminals and is permanently mounted on the terminal board.
Typically #18 AWG wires (shielded twisted pair) are used. Two screws, 17 and 18,
are provided for the SCOM (ground) connection, which should be as short a distance
as possible. DIN-type terminal boards can be stacked vertically on the DIN-rail to
conserve cabinet space.

DTAO
Screw Connections Screw Connections
1 Output 1 (Signal)
Output 1 (Return) 2
3 Output 2 (Signal)
Output 2 (Return) 4
5 Output 3 (Signal)
37-pin "D" shell Output 3 (Return) 6 Output 4 (Signal)
JR1 7
connector with Output 4 (Return) 8
9 Output 5 (Signal)
latching fasteners Output 5 (Return) 10
11 Output 6 (Signal)
Output 6 (Return) 12 13 Output 7 (Signal)
15 Output 8 (Signal)
17 Chassis Ground
Chassis Ground 18
19
20
21
22
23
SCOM 24
25
26
27
28
29
30
Cable to J3 or J4 31
32
connector in I/O 33
34
rack for VAOC 35
36
board
Euro-Block type
terminal block
Plastic mounting
holder
DIN-rail mounting
DTAO Wiring and Cabling

Operation
DTAO supports eight analog control outputs. On each output the voltage drop across
the local loop current sense resistor is measured and the signal is fed back to the VAOC
processor, which controls the current. Filters reduce high-frequency noise and suppress
surge on each output near the point of signal exit. VAOC contains the D/A converter and
drivers that generate the controlled currents.
DTAO Terminal Board Analog Outputs

Maximum Load
Cable from VAOC 4-20 mA,
Noise 500 ohms
JR1 Suppresion
Current from VAOC 50 ohms
01 Signal
Circuit #1
02 Return
03 Signal
SCOM
Current Feedback 05 Signal
Current Feedback 06 Return Circuit #3
07 Signal
Current Return Return Circuit #4
08
09 Signal
ID
11 Signal
Eight analog
13 Signal
outputs
15 Signal
DTAO Terminal Board
Item Specification
Number of channels 8 current output channels, single ended (one side connected to common)
Analog output current 0-20 mA
Customer load resistance Up to 500 burden
Physical

Diagnostics
Configuration

Discrete Input/Output (VCCC/VCRC)
VCCC/VCRC Discrete Input/Output
VCRC is a single slot version The Discrete Input/Output (VCCC) board with its associated daughterboard accepts 48
of VCCC with the same discrete inputs and controls 24 relay outputs from four terminal boards. VCCC is a
functionality, but contact input double width module and mounts in the VME I/O rack. This rack has two sets of J3/J4
cables plug into the front of the plugs for cables to the TBCI and TRLY terminal boards. VCRC is a narrower, single slot
board. board and can be used instead of the VCCC.
VCCC Board VCRC Board

x x
RUN RUN
FAIL FAIL
STAT STAT
VME bus to VCMI VME bus to VCMI
J33
J44
To Contact Input
boards (2)
VCCC VCRC
x x
Connectors on J3 J3 Connectors on J3
VME rack VME rack
J4 J4 J4
To Relay Output
boards (2) To Relay Output
boards (2)
To Contact Input
boards (2)
VCCC and VCRC Boards and Cable Connections
7-1 Discrete Input/Output (VCCC/VCRC) GEH-6421Q Mark* VI Control

VCRC Option
VCRC does not support the The VCRC board has the same functionality as the VCCC board but takes up only one
TICI contact voltage sensing VME slot because no daughter board is required. Two front panel connectors, J33 and
board. J44, accept the contact inputs from the TBCI terminal boards. Relay outputs on TRLY
use the J3 and J4 ports on the VME rack, the same as for VCCC. If locating cables on
the front panel is undesirable, VCCC can be used instead.
Installation
With the VCRC, both TBCI To install the V-type board
cables connect to J33 and
J44 on the front panel, not to
connectors under the rack. 2. Slide in the board and push the top and bottom levers in with your hands to seat
its edge connectors
Cable connections to the terminal boards are made at the J3 and J4 connectors (right
hand set) on the lower portion of the VME rack. These are latching type connectors to
secure the cables. Cable connections to the TRLY terminal boards are made to the left
hand set of J3 and J4 connectors.
GEH-6421Q System Guide, Volume II Discrete Input/Output (VCCC/VCRC) 7-2

Operation
The contact input processing is VCCC passes the input voltages through optical isolators and samples the signals at the
shown in the figure, VCCC and frame rate for control functions, and at 1 ms for sequence of events (SOE) reporting.
I/O Terminal Boards, Simplex VCCC transfers the signals over the VME backplane to the VCMI, which sends them to
System. the controller.
Contact Inputs
The first 24 dry contact inputs are wired to a contact input terminal board. A second
terminal board is required for inputs 25 - 48. Dc power is provided for the contacts.
Cables with molded plugs connect the terminal board to the VME rack where the VCCC
processor board is located.
High speed scanning and recording at 1 ms rate is available for inputs monitoring
important turbine variables. The SOE recorder reports all contact openings and closures
with a time resolution of 1 ms. Contact chatter and pulse widths down to 6 ms are
reported.
The dry-contact inputs are powered from a floating 125 V dc (100 - 145 V dc) supply
(TBCIH1) or from a floating 24 V dc (18.5 32 V dc) supply (TBCIH2). Filters reduce
high frequency noise and suppress surge on each input near the point of signal exit. Noise
and contact bounce is filtered with a 4 ms filter. Ac voltage rejection (50/60 Hz) is 60
V rms with 125 V dc excitation.
For triple modular redundant (TMR) applications, contact input voltages are fanned out
to three VME board racks R, S, and T through plugs JR1, JS1, and JT1. The signals
are processed by the three VCCCs and the results voted by the VCMI board in each
controller rack.
Relay Outputs
TRLYH1B holds 12 plug-in magnetic relays. The first six relay circuits can be jumpers
configured for either dry, Form-C contact outputs, or to drive external solenoids. A
standard 125 V dc or 115 V ac source, or an optional 24 V dc source, with individual
jumper selectable fuses and on-board suppression can be provided for field solenoid
power. The next five relays (7-11) are un-powered isolated Form-C contacts. Output 12
is an isolated Form-C contact, used for special applications such as ignition transformers.
Cables carry relay control signals and monitor feedback voltages between VCCC and
TRLY. Relay drivers, fuses, and jumpers are mounted on the relay board. Several types
of relay boards can be driven, including TRLY, DRLY, and SRLY.
The relay outputs have failsafe features so that when a cable is unplugged, the inputs vote
to de-energize the corresponding relays. Similarly, if communication with the associated
VME board is lost, the relays de-energize.

Terminal Board TBCI <R> Rack
Contact Input /Relay Output Board VCCC

JE1
(+) Floating
(-)
125 V dc Gate
or JE2 Total of 48 circuits:
24 V dc (+) Gate
(-) P5
JR1 J3A
Noise Gate
Suppr-
(+) ession
Gate
N
(-) S Ref.
Gate
Field Contact ID
(+)
N Gate
(-) S J4A Optical isolation
BCOM
Field Contact Gate
(+)
24 contact inputs
per board Total of 24 circuits:
Contact inputs from second
TBCI terminal board
Relay Terminal Board TRLY
NC
25
K# Powered Relay
or Dry J3
Com JA1 command
Contacts signals
26
NO
27 K# K# J4
JR1
P28V
K# Coil Relay
Driver
JS1
RD
To second relay terminal board
Monitor JT1
Connect JR1, JS1, and JT1
to 3 VCCCs in TMR system,
12 relay outputs per board and leave JA1 open
VCCC and I/O Terminal Boards, Simplex System

Specifications
Item Specification
Number of channels 48 dry contact voltage input channels (24 per terminal board)
24 relay output channels (12 relays per terminal board)
Input contact excitation H1 nominal 125 V dc, floating, ranging from 100 to 145 V dc
voltage H2 nominal 24 V dc, floating, ranging from 18.5 to 32 V dc
Input isolation Optical isolation to 1500 V on all inputs
Input filter Hardware filter, 4 ms
Ac voltage rejection 60 V rms @ 50/60 Hz at 125 V dc excitation
Input frame rate System dependent scan rate for control purposes
1,000 Hz scan rate for SOE monitoring
Rated voltage on relays a: Nominal 125 V dc or 24 V dc
b: Nominal 120 V ac or 240 V ac
Max relay load current a: 0.6 A for 125 V dc operation
b: 3.0 A for 24 V dc operation
c: 3.0 A for 120/240 V ac, 50/60 Hz operation
Max response time on 25 ms
Max response time off 25 ms
Relay contact material Silver cad-oxide
Relay contact life Electrical operations: 100,000
Mechanical operations: 10,000,000
Fault detection Loss of contact input excitation voltage
Non-responding contact input in test mode
Loss of user solenoid power (blown fuse)
Coil current disagreement with command
Relay contact voltage monitoring indicates problem
Unplugged cable or loss of communication with I/O board: relays de-energize if
communication with associated I/O board is lost
Failed ID chip
Physical
Size VCRC: 26.04 cm high x 1.99 cm wide x 18.73 cm deep (10.25 in x 0.782 in x 7.375 in)
VCCC: 26.04 cm high x 3.98 cm wide x 18.73 cm deep (10.25 in x 1.564 in x 7.375 in)

Diagnostics
Three LEDs at the top of the I/O board front panel provide status information. The
normal RUN condition is a flashing green, and FAIL is a solid red. The third LED shows
exists in the board. The diagnostics include the following:
Each output is monitored by diagnostics. Voltage drops across the local and outer
loop current sense resistors, the D/A outputs, and at the shutdown relay contacts are
sampled and digitized.
Standard diagnostic information is available on the outputs, including high and low
limit checks, and high and low system limit checks (configurable). If any one of
the outputs goes unhealthy a composite diagnostic alarm, L3DIAG_xxxx, occurs.
signals can be individually latched, and then reset with the RESET_DIA signal
if they go healthy.
board serial number, board type, revision number, and the JR, JS, and JT connector
location. When the ID chip is read by the I/O processor and a mismatch is
encountered, a hardware incompatibility fault is created.

Configuration
Sample VCCC/VCRC Configuration

Configuration
System Limits Enable all system limit checking Enable, disable
J3:IC200TRLYH1B Terminal board 1 connected to VCCC through J3 Connected, not connected
Relay01 First relay output (from first set of 12 relays) Point edit (Output BIT)
- card point
Relay Output Select relay output Used, unused
FuseDiag Enable fuse diagnostic Enable, disable
Relay01Fdbk Relay 01 contact voltage (first set of 12 relays) Point edit (Input BIT)
- card point
ContactInput Configurable Item:slot# Used, unused
SignalInvert Inversion makes signal true if contact is open Normal, invert
SignalFilter Contact Input filter in msec 0, 10, 20, 50
J4:IC200TRLYH1B Terminal board 2 connected to VCCC through J4 Connected, not connected
Relay01 Relay output 1 (second set of 12 relays) card point Point edit (Output BIT)
Relay01Fdbk Relay 1 contact voltage (second set of 12 relays) card point Point edit (Input BIT)
J3A:IS200TBCIH1A Terminal board connected to VCCC from J3 Connected, not connected
Contact01 First contact of 24 on first terminal board - board point Point edit (input BIT)
Contact input Select contact input Used, unused
Signal invert Inversion makes signal true if contact open Normal, invert
Sequence of events Select input for sequence of events scanning Enable, disable
Signal filter Contact input filter in milliseconds 0, 10, 20, 50
J4A:IS200TBCIH1A Terminal board connected to VCCC from J4 Connected, not connected
Contact01 First contact of 24 on second terminal board - board point Point edit (input BIT)
Board point Signals
Board point Signals Description - Enter Signal Connection Name Direction Type
L3DIAG_VCCC1 Board diagnostic Input BIT

Alarms
1 SOE Overrun. Sequence of events data overrun Communication problem on IONet
go online)
to go online)
16 System limit checking is disabled. System limit System checking was disabled by configuration
checking has been disabled
22 J33/J3A ID failure Failed ID chip on connector J33 or J3A, or cable
problem
23 J44/J4A ID failure Failed ID chip on connector J44 or J4A, or cable
problem
24 Firmware/hardware incompatibility. The firmware Invalid terminal board connected to VME I/O board.
on this board cannot handle the terminal board it Check the connections and call the factory.
is connected to
30 ConfigCompatCode mismatch; Firmware: [ ] ; Tre: A tre file has been installed that is incompatible with
firmware is expecting is different than what is in the firmware must change. Contact the factory.
31 IOCompatCode mismatch; Firmware: [ ]; Tre: [ ] The A tre file has been installed that is incompatible with
is different than what is in the tre file for this board firmware must change. Contact the factory.
33-56/ 65-88 TBCI J33/J3A/J44/J4A contact input [ ] not Normally a VCCC problem, or the battery reference
responding to Test Mode. A single contact or group voltage is missing to the TBCI terminal board, or a
of contacts could not be forced high or low during bad cable.
VCCC self-check
129-140/ 145-156
TRLY J3/J4 relay output coil [ ] does not match The relay terminal board may not exist, or there
requested state. A relay coil monitor shows that may be a problem with this relay, or, if TMR, one
current is flowing or not flowing in the relay coil, so VCCC may have been out-voted by the other two
the relay is not responding to VCCC commands VCCC boards.
161-172/ TRLY J3/J4 relay driver [ ] does not match The relay terminal board may not exist and the
177-188 requested state. The relay is not responding to relay is still configured as used, or there may be a
VCCC commands problem with this relay driver.
97-102/ TRLY J3/J4 fuse [ ] blown. The fuse monitor requires The relay terminal board may not exist, or the
113-118 the jumpers to be set and to drive a load, or it will jumpers are not set and there is no load, or the fuse
not respond correctly is blown.
240/241 TBCI J3/J4 excitation voltage not valid, TBCI The contact input terminal board may not exist,
J33/J3A/J44/J4A contact inputs not valid. The or the contact excitation may not be on, or be
VCCC monitors the excitation on all TBCI and DTCI unplugged, or the excitation may be below the 125
boards, and the contact input requires this voltage V level.
to operate properly

256-415 Logic signal voting mismatch. The identified signal A problem with the input. This could be the device,
from this board disagrees with the voted value the wire to the terminal board, the terminal board,
or the cable.

TBCI Contact Input with Group Isolation
The Contact Input with Group Isolation (TBCI) terminal board accepts 24 dry contact
inputs wired to two barrier-type terminal blocks. Dc power is wired to TBCI for contact
excitation. The contact inputs have noise suppression circuitry to protect against surge
and high-frequency noise.
Mark VI Systems
In the Mark* VI system, TBCI works with VTCC/VCRC and supports simplex and TMR
applications. Cables with molded plugs connect TBCI to VME rack where the VCCC or
VCRC processor board is located. Both board versions TBCIH_B and TBCIH_C work
correctly with Mark VI and are functionally identical.
Mark VIe Systems
In the Mark VIe system, the TBCI works with the PDIA I/O pack and supports simplex,
dual, and TMR applications. One, two, or three PDIAs can be plugged directly into the
TBCI. Mark VIe requires the C version of this board for correct mechanical alignment of
connector JT1 with I/O pack mechanical support.
Board Versions
Three versions of TBCI are available as follows:
Terminal Board Contact Inputs Excitation Voltage

TBCIH1C 24 Nominal 125 V dc, floating, ranging from 100 to 145 V dc

x
x
JT1 DC-37 pin
x 2
x 1
x 3 connectors with
x 4
x 5 latching fasteners
x 6
12 Contact x 7 JE1 JE2
x 8
Inputs x 10
x 9
x 11
x 12
x 14
x 13
x 16
x 15 J - Port Connections:
x 17 Plug in PDIA I/O Pack(s)
x 18
x 19 JS1 for Mark VIe system
x 20
x 21
x 22
x 23
x 24 or
x
Cables to VCCC/VCRC
x boards for Mark VI;
x 26
x 25
x 28
12 Contact x 30
x 32
Inputs x 33 JR1
x 34
x 36
x 35
x 37
x 38
x 39
x 40
x 41
x 42
x 43
x 44
x 45
x 46
x 47
x 48
x
x
Barrier Type Terminal

Shield Blocks can be unplugged
Bar from board for maintenance
TBCI Contact Input Terminal Board

Installation
Wiring
Connect the wires for the 24 dry contact inputs directly to two I/O terminal blocks on
the terminal board. These blocks are held down with two screws and can be unplugged
from the board for maintenance. Each block has 24 terminals accepting up to #12 AWG
wires. A shield terminal strip attached to chassis ground is located immediately to the
left of each terminal block.
Power Connection
Connect TBCI to the contact excitation voltage source using plugs JE1 and JE2, as
shown in following figure.
Cabling Connections
In a simplex system, connect TBCI to the I/O processor using connector JR1. In a TMR
system, connect TBCI to the I/O processors using connectors JR1, JS1, and JT1. Cables
or I/O packs are plugged in depending on the type of Mark VI or Mark VIe system, and
the level of redundancy.
Note For a Mark VIe system, the I/O packs plug into TBCI and attach to side-mounting
brackets. One or two Ethernet cables plug into the pack. Firmware may need to be
downloaded. Refer to GEH-6700, ToolboxST for Mark VIe Control.

Contact Input Terminal Board TBCI 1 1
JT1
x
3 3
x 1 Input 1 (Positive) JE1 JE2
Input 1 (Return) x 2
x 3 Input 2 (Positive)
Input 2 (Return) x 4 Contact Excitation
Input 3 (Return) x 6 Source, 125 Vdc
Input 4 (Return)
x 8
Input 5 (Return)
x 10
J - Port Connections:
Input 9 (Return) x 17 Input 9 (Positive)
x 18 JS1 Plug in PDIA I/O Pack(s)
Input 10(Return) x 20 for Mark VIe system
Input 11(Return) x 22
Input 12(Return) x 23 Input 12 (Positive) or
x 24
x
Cables to VCCC/VCRC
boards for Mark VI;
x
x 25 Input 13 (Positive) The number and location
x 27 Input 14 (Positive) depends on the level of
x 29 Input 15 (Positive) redundancy required.
Input 16 (Return) x 32 JR1
Input 20 (Return)
x 40
x 43 Input 22 (Positive) Inputs 22, 23, 24
Input 23 (Return) x 46 are 10 mA, all
Input 24 (Return) x 48 others are 2.5 mA
x
Terminal Blocks can be unplugged Up to two #12 AWG wires per

from terminal board for maintenance point with 300 volt insulation
TBCIH1C Terminal Board Wiring and Cabling

Operation
Filters reduce high-frequency noise and suppress surge on each input near the point
of signal entry. The dry contact inputs on H1 are powered from a floating 125 V dc
(100-145 V dc) supply from the turbine control. The 125 V dc bus is current limited in
the power distribution module prior to feeding each contact input. H2 and H3 versions
use lower voltages as shown in the specification table.
The discrete input voltage signals pass to the I/O processor, which sends them through
optical isolators providing group isolation and transfers the signals to the system
controller. The reference voltage in the isolation circuits sets a transition threshold that is
equal to 50% of the applied floating power supply voltage. The tracking is clamped to
go no less than 13% of the nominal rated supply voltage to force all contacts to indicate
open when voltage dips below this level.
Terminal Board TBCIH1C
JE1 I/O Processor

(+) Floating
(-)
Gate
JE2
From 125 V dc (+)
Total of 48 circuits
Gate
Power Source (-) P5
JR1 Gate
Noise
Suppr-
(+) ession Gate
N
(-) S Ref.
ID Gate
Field Contact
(+) BCOM
N JS1 Gate
(-) S Optical Isolation
Field Contact
Gate
(+)
N
(-) S ID
BCOM
Field Contact
JT1
(+)
N
(-) S To I/O Processor
Field Contact
(+) ID
N
(-) S BCOM
Field Contact
(+)
N
(-) S
24 Contact Inputs per Terminal Board.
Field Contact
BCOM Each contact input terminates on one
point and is fanned to <R>, <S>, and <T>
Contact Input Circuits

A pair of terminal points is provided for each input, with one point (screw) providing the
positive dc source and the second point providing the return (input) to the board. The
current loading is 2.5 mA per point for the first 21 inputs on each terminal board. The last
three have a 10 mA load to support interface with remote solid-state output electronics.
Contact input circuitry is designed for NEMA Class G creepage and clearance.

Specifications
Item Specification
Number of channels 24 contact voltage input channels
Excitation voltage H1: Nominal 125 V dc, floating, ranging from 100 to 145 V dc
H2: Nominal 24 V dc, floating, ranging from 18.5 to 32 V dc
H3: Nominal 48 V dc, floating, ranging from 32 to 64 V dc
Input current H1 (for 125 V dc applications):
First 21 circuits draw 2.5 mA (50 k)
Last three circuits draw 10 mA (12.5 k)
H2 (for 24 V dc applications):
First 21 circuits draw 2.5 mA (10 k)
Last three circuits draw 9.9 mA (2.42 k)
H3 (for 48 V dc applications):
First 21 circuits draw 2.5 mA
Last three circuits draw 10 mA
Power consumption 20.6 W on the terminal board
Temperature rating 0 to 60C (32 to 140 F)
Fault detection Loss of contact input excitation voltage
Unplugged cable
Physical
size 33.02 cm high x 10.16 cm wide (13.0 in. x 4.0 in)
Temperature -30 to 65C (-22 to 149 F)
Diagnostics
Diagnostic tests to components on the terminal boards are as follows:
The excitation voltage is monitored. If the excitation drops to below 40% of the
nominal voltage, a diagnostic alarm is set and latched by the I/O pack/board.
As a test, all inputs associated with this terminal board are forced to the open contact
(fail safe) state. Any input that fails the diagnostic test is forced to the failsafe state
and a fault is created.
If the input from this board does not match the TMR voted value from all three
boards, a fault is created.
Each terminal board connector has its own ID device that is interrogated by the I/O
pack/board. The connector ID is coded into a read-only chip containing the board
serial number, board type, revision number, and the JR1/JS1/JT1 connector location.
When the chip is read by the controller and a mismatch is encountered, a hardware
incompatibility fault is created.
Configuration

TICI Contact Input with Point Isolation
The Contact Input with Point Isolation (TICI) terminal board provides 24 point isolated
voltage detection circuits to sense a range of voltages across relay contacts, fuses, and
switches.
Mark VI Systems
The VCRC J3 and J4 front In the Mark* VI system, the TICI is controlled by the VCCC board and supports simplex
connectors do not support and TMR applications. Cables with molded plugs connect TICI to the VME rack where
TICI. the I/O boards are mounted.
Mark VIe Systems
In the Mark VIe system, the TICI works with the PDIA I/O pack and supports simplex,
dual, and TMR applications. One, two, or three PDIAs plug into the TICI to support a
variety of system configurations.
Installation
Wiring
Connect the wires for the 24 isolated digital inputs directly to two I/O terminal blocks on
the terminal board. These blocks are held down with two screws and can be unplugged
from the board for maintenance. Each block has 24 terminals accepting up to #12 AWG
wires. A shield terminal strip attached to chassis ground is located immediately to the
left of each terminal block.
Cabling Connections
In a simplex system, connect TICI to the I/O processor using connector JR1. In a TMR
system, connect TICI to the I/O processors using connectors JR1, JS1, and JT1. Cables
or I/O packs are plugged in depending on the type of Mark VI or Mark VIe system, and
the level of redundancy.
Note For a Mark VIe system, the I/O packs plug into TICI and attach to side-mounting
brackets. One or two Ethernet cables plug into the pack. Firmware may need to be
downloaded.

Isolated Contact Input Terminal Board TICI
JT1
x
Input 4 (Return)
x 8
Input 5 (Return)
x 10
Input 7 (Return) x 14 J - Port Connections:
Input 9 (Return) x 17 Input 9 (Positive)
x 18 JS1 Plug in PDIA I/O Pack(s)
Input 10(Return) x 20 for Mark VIe system
Input 11(Return) x 22
Input 12(Return) x 23 Input 12 (Positive) or
x 24
x
Cables to VCCC boards
for Mark VI;
x
x 25 Input 13 (Positive) The number and location
x 27 Input 14 (Positive) depends on the level of
x 29 Input 15 (Positive) redundancy required.
Input 16 (Return) x 32 JR1
Input 20 (Return)
x 40
x
Terminal Blocks can be unplugged Up to two #12 AWG wires per

from terminal board for maintenance point with 300 volt insulation
TICI Terminal Board Wiring and Cabling

Operation
The TICI is similar to TBCI, except for the following items:
No contact excitation is provided on the terminal board.
Each input is electrically isolated from all others and from the active electronics.
There are two groups of the TICI with different nominal voltage thresholds. TICIH1
has the following input voltage ranges:
70-145 V dc, nominal 125 V dc, with a detection of 39 to 61 V dc
200-250 V dc, nominal 250 V dc, with a detection of 39 to 61 V dc
90-132 V rms, nominal 115 V rms, 47-63 Hz, with a detection of 35 to 76 V ac
190-264 V rms, nominal 230 V rms, 47-63 Hz, with a detection of 35 to 76 V ac
TICIH2 has the following input voltage range:
16-32 V dc, nominal 24 V dc, with a detection threshold of 9.5 to 15 V dc
TICI provides input hardware filtering with time delays of 15 ms, nominal:
For dc applications the time delay is 15 8 ms
For ac applications the time delay is 15 13 ms

In addition to hardware filters, the contact input state is software-filtered, using
configurable time delays selected from 0, 10, 20, 50, and 100 ms. For ac inputs, a filter of
at least 10 ms is recommended.
TICI Isolated Contact Inputs
External JR1 Simplex system

Voltage optical
P28 VDC P28V JR1 connects to
isolator
VCCC/VCRC or
ID connects to PDIA
Posxx pack for Mark VIe
Retxx system
PCOM
S S PCOM
JS1
P28V
Circuit #2
ID
--
--
For TMR Systems
PCOM
total JS1 and JT1 cable
of to I/O processors
24 VCCC/VCRC for
ccts Mark VI systems
-- JT1 or
P28V connects to PDIA
--
I/O Packs for Mark
ID
VIe systems.
PCOM
TICI Circuits for Sensing Voltage across typical device

The following restrictions should be noted regarding creepage and clearance on the
230 V rms application:
For NEMA requirements: 230 V single-phase
For CE Certification: 230 V single or 3-phase
Note Refer to VCCC or PDIO documentation for information on monitoring contact

inputs.

Specifications
Item Specification
Number of channels 24 input channels for isolated voltage sensing
Input voltage TICIH2:
16-32 V dc, nominal 24 V dc, with a detection threshold of 9.5 to 15 V dc
TICIH1:
70 -145 V dc, nominal 125 V dc, with a detection threshold of 39 to 61 V dc
200 -250 V dc, nominal 250 V dc, with a detection threshold of 39 to 61 V dc
90 -132 V rms, nominal 115 V rms, 47-63 Hz, with a detection threshold of 35 to 76 V ac
190-264 V rms, nominal 230 V rms, 47-63 Hz, with a detection threshold of 35 to 76 V ac
Fault detection in I/O board Non-responding contact input in test mode
Unplugged cable or failed ID chip
Physical
Size 17.8 cm high x 33.02 cm wide (7.0 in. x 13.0 in.)
Temperature Operating -30 to +65C (-22 to +149 F)
Diagnostics
Configuration

DTCI Simplex Contact Input with Group Isolation
DTCI does not work with the The Simplex Contact Input with Group Isolation (DTCI) terminal board is a compact
PDIA I/O Pack. terminal board designed for DIN-rail mounting. The DTCI board has 24 contact inputs
with a nominal excitation of 24 V dc, and connects to the VCCC (or VCRC) processor
board with a single cable. Two DTCI boards can be connected to the VCCC or VCRC for
a total of 48 contact inputs. The terminal boards can be stacked vertically on a DIN-rail
to conserve cabinet space. Only a simplex version of this board is available.
Installation
There is no shield terminal strip Mount the plastic holder on the DIN-rail and slide the DTCI board into place. Connect
with this design. the wires for the contact inputs directly to the terminal block. The Euro-Block type
terminal block has 60 terminals and is permanently mounted on the terminal board.
Typically #18 AWG wires are used.
SCOM must be connected to Two screws, 55 and 56, are provided for the SCOM (ground) connection, which should be
ground. as short a distance as possible. Six screws are provided for the 24 V dc excitation power.

DTCI Board
Screw Connections
1 Input 1 (Positive)
Input 1 (Return) 2
Input 2 (Return) 4
Input 3 (Return) 6 Input 4 (Positive)
7
Input 4 (Return) 8
37-pin "D" shell Input 5 (Return) 10
connector with Input 6 (Return) 12
latching fasteners Input 7 (Return 14
Input 8 (Return) 16
JR1 17 Input 9 (Positive)
Input 9 (Return) 18
Input 10 (Return) 20
Input 13 (Return) 25 Input 13 (Positive)
26
To VCCC board, Input 20 (Return) 40
cable to J3 or J4. Input 21 (Return) 42
To VCRC board, Input 23 (Return) 46
cable to J33 or Input 24 (Return) 48
49 Excitation (Positive)
J44 on front. Excitation (Positive) 50
51 Excitation (Positive)
Excitation (Negative) 52
53 Excitation (Negative)
Excitation (Negative) 54
55 Chassis Ground
Chassis Ground 56
57
58
59
60
SCOM
Euro-Block type
Contact excitation terminal block
24 V dc
Plastic mounting
DIN-rail mounting holder

Operation
DTCI has the same functionality and on-board signal conditioning as TBCI, except they
are scaled for 24 V dc.The input excitation ranges from 18 to 32 V dc, and the threshold
voltage is 50% of the excitation voltage. The ac voltage rejection is 12 V rms. Contact
inputs take 2.5 mA nominal current on the first 21 circuits, and 10 mA on circuits 22
through 24.
Filters reduce high frequency noise and suppress surge on each input near the point of
signal entry. The discrete input voltage signals are cabled to the VCCC board (or VCRC),
which passes them through optical isolators and transfers the signals over the VME
backplane to the VCMI. The VCMI then sends them to the controller.
DTCI Terminal Board
49 (+)
52 (-)
50 (+)
24 V dc
53 (-)
excitation
power source 51 ID
(+) JR1
54 (-)
Noise Cable to VCCC
1 Suppression or VCRC in
Input 1 Positive
N VME rack
Input 1 Return 2 S
Input 2 Positive 3
N
Input 2 Return 4 S
Input 3 Positive 5
N
Input 3 Return 6 S
Input 4 Positive 7
N
Input 4 Return 8 S
. .
. .
. .
. .
Input 24 Positive 47
N
Input 24 Return 48 S
Field contacts (24) SCOM

BCOM
DTCI Contact Input Circuits

Specifications
Item Specification
Number of channels 24 dry contact voltage input channels
Excitation voltage Nominal 24 V dc, floating, ranging from 18 to 32 V dc
Input current First 21 circuits each draw 2.5 mA (50 k)
Last three circuits each draw 10 mA (12.5 k)
Temperature rating 0 to 60C (32 to 140 F)
Fault detection in I/O board Loss of contact input excitation voltage
Unplugged cable
Physical
Size, with support plate 8.6 cm wide x 16.2 cm high (3.4 in x 6.37 in)
Diagnostics
Configuration

TRLYH1B Relay Output with Coil Sensing
The Relay Output with coil sensing (TRLYH1B) terminal board holds 12 plug-in
magnetic relays. The first six relay circuits configured by jumpers for either dry, Form-C
contact outputs, or to drive external solenoids. A standard 125 V dc or 115/230 V
ac source, or an optional 24 V dc source with individual jumper selectable fuses and
on-board suppression, can be provided for field solenoid power. The next five relays
(7-11) are unpowered isolated Form-C contacts. Output 12 is an isolated Form-C contact,
used for special applications such as ignition transformers.
Mark VI Systems
In Mark* VI systems, TRLY is controlled by the VCCC, VCRC, or VGEN board and
supports simplex and TMR applications. Cables with molded plugs connect the terminal
board to the VME rack where the I/O boards are mounted. Connector JA1 is used on
simplex systems, and connectors JR1, JS1, and JT1 are used for TMR systems.
Mark VIe Systems
In the Mark VIe system, the TRLY works with the PDOA I/O pack and supports simplex
and TMR applications. PDOA plugs into the DC-37 pin connectors on the terminal
board. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and JT1 are
used for TMR systems.

Solenoid
power
TB3 X
x JT1
x 2
x 1
JF1JF2
x 4
x 3
x 6
x 5
x 8
x 7
x 10
x 9
x 12
x 11
x 14
x 13
x 15 Fuses J - Port Connections:
x 16
x 18
x 17
x 20
x 19 JS1
x 21 Plug inPDOA I/O Pack(s)
12 Relay Outputs x 22 for Mark VIe system
x 24
x 23
x
or
x
x 26
x 25 Output Cables to VCCC/VCRC or VGEN
28
x 27 boards for Mark VI system
x
x 29
Relays
x 30
x 32
x 33 JA1 JR1 depends on the level of
x 34
x 36
x 38
x 37
x 40
x 39
x 42
x 41
x 44
x 43
x 46
x 45
x 48
x 47
x x
Shield Barrier type terminal Solenoid

bar blocks can be unplugged power
TRLYH1B Relay Output Terminal Board

Installation
Connect the wires for the 12 relay outputs directly to two I/O terminal blocks on the
terminal board as shown in the figure, TRLYH1B Terminal Board Wiring. Each block is
held down with two screws and has 24 terminals accepting up to #12 AWG wires. A
shield terminal strip attached to chassis ground is located on to the left side of each
terminal block.
Connect the solenoid power for outputs 1-6 to JF1. JF2 can be used to daisy chain power
to other TRLYs. Alternatively, power can be wired directly to TB3 when JF1/JF2 are not
used. Connect power for the special solenoid, Output 12, to connector JG1.
These jumpers are also for Jumpers JP1-JP6 are removed in the factory and shipped in a plastic bag. Re-install
isolation of the monitor circuit the appropriate jumper if power to a field solenoid is required. Conduct individual
when used on isolated contact loop energization checks as per standard practices and install the jumpers as required.
applications. For isolated contact applications, remove the fuses to ensure that suppression leakage
is removed from the power bus.
Alternate customer power wiring N125/24 V dc Power

Terminal 1 - Pos source
Terminal 2 - Neg P125/24 V dc
TB3 JF1 JF2

Relay Output Terminal Board x x x x 1 1
TRLYH1B
3 3
x
x 1 Output 01 (NC) - Relays +
Output 01 (COM) x 2
x 3 Output 01 (NO) FU1 Out 01 FU7 JP1
Output 01 (SOL) x 4
x 5 Output 02 (NC) -
Output 02 (COM) x 6 +
x 7 Output 02 (NO)
Output 02 (SOL) x 8 FU2 Out 02 FU8 To
x 9 Output 03 (NC) JP2
Powered, Output 03 (COM) x 10 connectors
Output 03 (SOL)
x 11 Output 03 (NO) - +
fused x 12 JA1, JR1,
Output 04 (COM) 14
x 13 Output 04 (NC) FU3 Out 03 FU9 JP3
solenoids x
JS1, JT1
Output 04 (SOL) 16
x 15 Output 04 (NO) - +
form-C x
Output 05 (COM) x 17 Output 05 (NC) FU4 Out 04 FU10
x 18 JP4
Output 05 (SOL) x 19 Output 05 (NO)
x 20 - +
Output 06 (COM) x 21 Output 06 (NC)
x 22
Output 06 (SOL) x 24
x - +
FU6 Out 06 FU12 JP6
Fuses Fuses Jumper
Neg,return Pos, High choices:
x
power (JPx)
x 26 or dry
x 27 Output 07 (NO)
x 28 contact (dry)
Dry Output 08 (COM) x 30
x 29 Output 08 (NC)
contacts x 31 Output 08 (NO) To connectors JA1, JR1, JS1, JT1
x 32
form-C Output 09 (COM) x 33 Output 09 (NC)
x 34
x 36
x 35 Output 09 (NO)
Output 10 (COM) x 37 Output 10 (NC) Power to special circuit 12
x 38
x 40
x 39 Output 10 (NO)
JG1 1 Customer power
Output 11 (COM) x 42
x 41 Output 11 (NC)
Special x 43 Output 11 (NO) 2
x 44
circuit, Output 12 (COM) x 45 Output 12 (NC)
x 46 3 Customer return
form-C, Output 12 (SOL)
x 47 Output 12 (NO)
x 48
ign. xfmr. x 4
JF1, JF2, and JG1 are power plugs
TRLYH1B Terminal Board Wiring

Operation
Relay drivers, fuses, and jumpers are mounted on the TRLYH1B. For simplex operation,
D-type connectors carry control signals and monitor feedback voltages between the
I/O processors and TRLY through JA1.
Relays are driven at the frame rate and have a 3.0 A rating. The rated contact-to-contact
voltage is 500 V ac for one minute. The rated coil to contact voltage is 1,500 V ac for
one minute. The typical time to operate is 10 ms. Relays 1-6 have a 250 V metal oxide
varistor (MOV) for transient suppression between normally open (NO) and the power
return terminals. The relay outputs have a failsafe feature that vote to de-energize the
corresponding relay when a cable is unplugged or communication with the associated
I/O processor is lost.
Output 01
Relay Terminal Board - TRLYH1B
NC 1
Alternate Dry K1
TB3
Power, 20 A FU7 Com 2
1 P125/24 V dc
24 V dc or
125 V dc or 2 JP1
115 V ac or 3 NO 3
230 V ac 4 +
K1 K1 Field
FU1 Solenoid
JF1 1 N125/24 Vdc Sol 4 -
Normal Power
Source,pluggable 3.15 Amp "6" of the above circuits
3
(7 Amp) slow-blow
JF2 Output 07
1
Power NC
3 Monitor
Daisy-Chain >14 Vdc 25
K7
>60 Vac
JA1 Com Dry
26
Contact,
Monitor Select
Form-C
NO
K7 K7 27
R
"5" of these circuits
I/O
Processor JR1
P28V
Relay Coil K#
Driver
Relay ID
Output JS1 RD
Output 12
Monitor
>14 Vdc NC
ID >60 Vac
K12 45
JT1
"12" of the above circuits
Com Special
46 Circuit
NO
ID 47
K12 K12
Available for JG1
GT Ignition Transformers 1 Sol
(6 Amp at 115 Vac
3 "1" of these circuits 48
3 Amp at 230 Vac)
TRLYH1B Circuits, Simplex System

For TMR applications, relay control signals are fanned into TRLY from the three I/O
processors R, S, and T through plugs JR1, JS1, and JT1. These signals are voted and
the result controls the corresponding relay driver. Power for the relay coils comes from
all three I/O processors and is diode-shared. The following figure shows a TRLYH1B
in a TMR system.
Relay Terminal Board - TRLYH1B Output 01

NC 1
Alternate Dry K1
TB3
power, 20 A 1 P125/24 V dc FU7 Com 2
24 V dc or
2 JP1
125 V dc or
3 NO 3
115 V ac or
230 V ac 4 +
K1 K1 Field
FU1 solenoid
JF1 1 N125/24 V dc Sol 4 -
Normal power
source,pluggable 3.15 Amp 6 of the above circuits
3 slow-blow
(7 Amp)
JF2 Output 07
Power 1
NC
daisy-chain 3 Monitor
>14 V dc K7 25
>60 V ac
JA1 Com Dry
26 contact,
Monitor Select
form-C
R NO
I/O K7 K7 27
Processor 5 of these circuits
Relay JR1
P28V
Control
Relay
Coil K#
Driver
ID
RD
JS1
To S I/O Processor Output 12

Monitor
>14 V dc NC
ID >60 V ac
K12 45
JT1
12 of the above circuits Com Special
To T I/O Processor 46 circuit
NO
ID 47
K12 K12
Available for JG1
GT ignition transformers 1 Sol
(6 Amp at 115 V ac 3 1 of these circuits 48
3 Amp at 230 V ac)
TRLYH1B Circuits, TMR System

Specifications
Item Specifications
Number of relay channels on one 12:
TRLY board 6 relays with optional solenoid driver voltages
5 relays with dry contacts only
1 relay with 7 A rating
b: Nominal 115/230 V ac
Max load current a: 0.6 A for 125 V dc operation
Max response time on 25 ms typical
Max response time off 25 ms typical
Maximum inrush current 10 A
Contact material Silver cad-oxide
Contact life Electrical operations: 100,000
Fault detection Loss of relay solenoid excitation current
Physical
Temperature -30 to + 65C (-22 to +149 F)

Diagnostics
The output of each relay (coil current) is monitored and checked against the
command at the frame rate. If there is no agreement for two consecutive checks,
an alarm is latched.
The solenoid excitation voltage is monitored downstream of the fuses and an alarm
is latched if it falls below 12 V dc.
If any one of the outputs goes unhealthy a composite diagnostics alarm,
L3DIAG_xxxx occurs.
When an ID chip is read by the I/O processor and a mismatch is encountered, a
Each terminal board connector has it own ID device that is interrogated by the I/O
When the chip is read by the I/O processor and mismatch is encountered, a hardware
Relay contact voltage is monitored.
Details of the individual diagnostics are available in the configuration application.
The diagnostic signals can be individually latched, and then reset with the
RESET_DIA signal if they go healthy.
Configuration
Refer to figure, TRLYH1C Board adjustments are made as follows:
Terminal Board Wiring for
Jumpers JP1 through JP12. If contact voltage sensing is required, insert jumpers
more information.
for selected relays.
Fuses FU1 through FU12. If power is required for relays 1-6, two fuses should be
placed in each power circuit supplying those relays. For example, FU1 and FU7
supply relay output 1.

TRLYH1C Relay Output with Contact Sensing
The Relay Output with contact sensing (TRLYH1C) terminal board holds 12 plug-in
magnetic relays. The first six relay circuits are Form-C contact outputs to drive external
solenoids. A standard 125 V dc or 115 V ac source with fuses and on-board suppression
is provided for field solenoid power. TRLYH2C holds 12 plug-in magnetic relays. The
first six relay circuits are Form-C contact outputs to drive external solenoids. A standard
24 V dc source with fuses and on-board suppression is provided for field solenoid power.
The next five relays (7-11) are unpowered, isolated Form-C contacts. Output 12 is an
isolated Form-C contact with non-fused power supply, used for ignition transformers. For
example, 12 NO contacts have jumpers to apply or remove the feedback voltage sensing.
TRLYH1C and H2C are the same as the standard TRLYH1B board except for the
following:
Six jumpers for converting the solenoid outputs to dry contact type are removed.
These jumpers were associated with the fuse monitoring.
Input relay coil monitoring is removed from the 12 relays.
Relay contact voltage monitoring is added to the 12 relays. Individual monitoring
circuits have voltage suppression and can be isolated by removing their associated
jumper.
High-frequency snubbers are installed across the NO and SOL terminals on the six
solenoid driver circuits and on the special circuit, output 12.
Mark VI Systems
In the Mark* VI system, the TRLY is controlled by the VCCC or VCRC board and
Mark VIe Systems
In the Mark VIe system, TRLY works with the PDOA I/O pack and supports simplex

Solenoid
power
TB3 X
x JT1
x 2
x 1
x 3 JF1JF2
x 4
x 6
x 5
x 8
x 7
x 10
x 9
x 12
x 11
x 14
x 13
x 16
x 18 x 17
x 20
x 19 JS1
x 21 Plug in PDOA I/O Pack(s)
x 24
x 23
x
Output or
x Relays
x 26
x 25 Cables to VCCC/VCRC
28
x 27 boards for
boards for Mark
Mark VI
VIesystem
system
x Jumpers
x 30
x 29
32
x 31
x
x 33 JA1 JR1 The number and location
x 36
x 35
x 38
x 40
x 39
x 42
x 41
x 44
x 43
x 46
x 45
x 48
x 47
x x

TRLYH1C Relay Output Terminal Board With Voltage Sensing

Installation
terminal board as shown in the figure, TRLYH1C Terminal Board Wiring. Each block
is held down with two screws and has 24 terminals accepting up to #12 AWG wires.
A shield terminal strip attached to chassis ground is located immediately to the left
of each terminal block.
Connect the solenoid power for outputs 1-6 to JF1 normally. JF2 can be used to
daisy-chain power to other TRLYs. Alternatively, power can be wired directly to TB3
when JF1/JF2 are not used. Connect power for the special solenoid, Output 12, to
connector JG1.
Jumpers JP1-12 remove the voltage monitoring from selected outputs.
Alternative Customer Power N125/24 Vdc Power

Power Wiring Return Source
P125/24 Vdc
TB3 JF1 JF2

TRLYH1C (Contact Voltage Sensing)
4 3 2 1
3 3
x
x 1 Output 01 (NC) - +
Output 01 (COM) x 2
Output 01 (SOL) x 4
x 7 Output 02 (NO)
Output 02 (SOL) x 8 FU2 Out 02 FU8 JP2
x 9 Output 03 (NC)
Powered, Output 03 (COM) x 10
Output 03 (SOL) x 11 Output 03 (NO) - +
Fused x 12
Solenoids
Output 04 (SOL) 16
x 15 Output 04 (NO) - +
Form-C x
Voltage
x 18 JP4 Sensing
x 20 - + Boards
x 22
x - +
FU6 Out 06 FU12 JP6
Fuses Fuses
Neg,Return Pos,High
x
Output 07 (NC) JP7 Cable
x 26 Connectors
x 27 Output 07 (NO)
x 28 JA1, JR1,
Dry Output 08 (COM) 30
x JS1, JT1
Contacts x 31 Output 08 (NO) Relays
x 32
Form-C Output 09 (COM) x 33 Output 09 (NC)
x 34 JP9
x 36
x 35 Output 09 (NO)
x 38
x 39 Output 10 (NO) JP10
x 40
x 41 Output 11 (NC)
Special x 43 Output 11 (NO) JP11
x 44
Circuit, Output 12 (COM) x 45 Output 12 (NC)
x 46
Form-C, Output 12 (SOL)
x 47 Output 12 (NO) JP12
x 48
Ign. Xfmr. x
JG1 1 3
Customer Customer
Power Return
Power to Circuit 12
TRLYH1C Terminal Board Wiring

Operation
Relay drivers, fuses, and jumpers are mounted on the TRLYH1C. Relays 1-6 have a 250
V MOV for transient suppression between the NO and power return terminals.
one minute. The typical time to operate is 10 ms. The relay outputs have a failsafe
feature that votes to de-energize the corresponding relay when a cable is unplugged or
communication with the associated I/O board is lost.
For simplex operation, a cable carries control signals and monitor feedback voltages
between the I/O board and TRLY through JA1. For TMR applications, relay control
signals are fanned into TRLY from the three I/O boards R, S, and T through plugs JR1,
JS1, and JT1. These signals are voted and the result controls the corresponding relay
driver. The 28 V power for the relay coils comes in from all three I/O boards and is
diode-shared. The following figure shows a TRLYH1C in a TMR system.

Relay Terminal Board - TRLYH1C Output 01
with Contact Voltage Sensing
NC 1
Alternate K1
TB3
1 P125/24 V dc
24 V dc or
2
125 V dc or
115 V ac or 3 NO 3
240 V ac 4 6 of these +
K1 K1 Field
circuits Snub
FU1 4
Solenoid
JF1 1 N125/24 Vdc -
Normal Power Sol
Source, pluggable 3.15 Amp
3 JP1
(7 Amp) slow-blow
JF2 Output 07
1
Power NC
3 Monitor
K7
>60 Vac
JA1 Com Dry
26
Contact
Monitor Select
Form-C
NO
R
K7 K7 27
I/O
Processor JP7
JR1
P28V
K#
5 of these circuits
Coil
Relay Relay
Driver
Control ID
JS1 RD
To S I/O Processor JP12 Output 12

Monitor
Voltage NC
ID
K12 45
JT1
12 of the above circuits
Com Special
To T I/O Processor
46 Circuit
NO
ID 47
K12 K12
Available for JG1 Snub
GT Ignition 1
Transformers 3
1 of these circuits Sol 48
(6 A at 120 V ac
3 A at 240 V ac)
TRLYH1C Circuits

Specifications
Item Specifications
TRLY board 6 relays with solenoid driver voltages
b: Nominal 120 V ac or 240 V ac
H1C contact feedback threshold 70-145 V dc, nominal 125 V dc, threshold 45 to 65 V dc
90-132 V rms, nominal 115 V rms, 47-63 Hz, threshold 45 to 72 V ac
190-264 V rms, nominal 230 V rms, 47-63 Hz, threshold 45 to 72 V ac
H2C contact feedback threshold 16-32 V dc, nominal 24 V dc, threshold 10 to 16 V dc
Fault detection Loss of relay excitation current
NO contact voltage disagreement with command
Unplugged cable or loss of communication with I/O board; relays de-energize if
Physical
Temperature -30 to + 65C (-22 to 149 F)

Diagnostics
L3DIAG_xxxx occurs.
Configuration
Board adjustments are made as follows:
supply relay output 1. Refer to terminal board wiring diagram for more information.

TRLYH1D Relay Output with Solenoid Integrity Sensing
The Relay Output with Solenoid Integrity Sensing (TRLYH1D) terminal board holds six
plug-in magnetic relays. The six relay circuits are Form-C contact outputs, powered and
fused to drive external solenoids. A standard 24 V dc or 125 V dc source can be used. The
board provides special feedback on each relay circuit to detect a bad external solenoid.
Sensing is applied between the NO output terminal and the SOL output terminal.
TRLYH1D is similar to the standard TRLYH1B board except for the following:
There are only six relays.
The board is designed for 24/125 V dc applications only.
Relay circuits have a NO contact in the return side as well as the source side.
The relays cannot be configured for dry contact use.
Input relay coil monitoring is removed.
The terminal board provides monitoring of field solenoid integrity.
There is no special-use relay for driving an ignition transformer.
Mark VI Systems
In the Mark* VI systems, the TRLY is controlled by the VCCC or VCRC board and
Mark VIe Systems
In the Mark VIe systems, the TRLY works with the PDOA I/O pack and supports
simplex and TMR applications. PDOA plugs into the DC-37 pin connectors on the
terminal board. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and
JT1 are used for TMR systems.

Power,
Normal power source daisy chain
24/125 V dc (14 A) Alternate power
source (14 A)
Barrier type JF1 JF2 X
terminal x TB3 JT1
2
x 1
blocks can be x
x 3
unplugged x 4
x 6
x 5
from board for x 7
x 8
maintenance x 10
x 9
x 12
x 11
x 14
x 13
x 16
x 18
x 17
x 20
x 19 JS1
x 22 for Mark VIe system
6 Relay Outputs x 24
x 23
x
or
TB1
Fuses
Output Cables to VCCC/VCRC
Relays boards for Mark VI;
JA1 JR1 The number and location

depends on the level of
redundancy required.
Shield
bar x
TRLYH1D Relay Output Terminal Board

Installation
Connect the wires for the six relay outputs directly to the TB1 terminal block on the
terminal board as shown in the figure, TRLYH1D Terminal Board Wiring. The block is
shield terminal strip, attached to chassis ground, is located immediately to the left of
the terminal block.
Connect the solenoid power for outputs 1-6 to JF1. JF2 can be used to daisy-chain power
to other TRLYs. Alternatively, power can be wired directly to TB3 when JF1/JF2 are
not used.
N125/110/24 V dc Alternate customer

+ +
Power source power source
- -
JF1 JF2 TB3
Relay Output Terminal Board 1 1 x x x x
TRLYH1D
4 3 2 1 JT1
3 3
x
Output 01 (COM) x 2
x 3 Output 01 (NO) FU1 Out 01 FU7
Output 01 (SOL) x 4
Output 02 (SOL)
x 7 Output 02 (NO)
x 8 FU2 Out 02 FU8
x 9 Output 03 (NC)
x 11 Output 03 (NO) - + J - Port Connections:
x 13 Output 04 (NC) FU3 Out 03 FU9
x 15 Output 04 (NO) - + JS1 Plug in PDOA I/O Pack(s)
Output 05 (COM) x 17 Output 05 (NC) FU4 Out 04
x 18 FU10 for Mark VIe system
x 20 - +
x 22 or
x 23 Output 06 (NO) FU5 Out 05 FU11
x - + Cables to VCCC/VCRC
FU6 Out 06 FU12 boards for Mark VI;
Fuses Fuses
Neg,return Pos, High The number and location
Wiring to JA1 JR1 redundancy required.
six external
solenoids
TRLYH1D Terminal Board Wiring

Operation
The six relays have a MOV and clamp diode for transient suppression between the NO
and power return terminals. The relay outputs have a failsafe feature that votes to
de-energize the corresponding relay when a cable is unplugged or communication with
the associated I/O board is lost.
TRLYH1D monitors each solenoid between the NO and SOL output terminals. When
the relay is de-energized, the circuit applies a bias of less than 8% nominal voltage to
determine if the load impedance is within an allowable band. If the impedance is too low
or high for consecutive scans, an alarm feedback is generated. The contacts must be open
for at least 1.3 seconds to get a valid reading.
110 or 125 V dc Solenoid Voltage
Announce
Yes Unknown No Unknown Yes
Solenoid Failure?
(R_NOM = 644 )
Solenoid Resistance 80 153 2.2 k 2.2 k
24 V dc Solenoid Voltage
Announce
Yes Unknown No Unknown Yes
Solenoid Failure?
(R_NOM = 29 )
Solenoid Resistance 5 11 148 153
TRLYH1D Solenoid Fault Announcement

For simplex operation, cables carry control signals and solenoid monitoring feedback
voltages between the I/O board and TRLY through JA1. For TMR applications, relay
control signals are fanned into TRLY from the three I/O processor boards R, S, and T
through plugs JR1, JS1, and JT1. These signals are voted and the result controls the
corresponding relay driver. Power for the relay coils comes in from all three I/O boards
and is diode-shared. The following figure shows TRLYH1D in a TMR system.
Relay Terminal Board - TRLYH1D

Output 01
NC 1
Alternate power
TB3 K1
source (14 A) FU7
1 P125/24 V dc Com 2
2
3 NO 3
Normal power 4 +
source, pluggable K1 Field
FU1 4 solenoid
24 V dc or JF1 1 N125/24 V dc -
110 V dc or 3.15 Amp Sol
K1
125 V dc 3
slow-blow
(14 Amp) TB1
JF2
1
Power Monitor Solenoid
daisy-chain 3
>14 Vdc Integrity
>60 Vac Monitor 6 of the
JA1
R Fuse Fdback above
Monitor Select
I/O circuits
Processor
24 kHz from
Power Supply
Relay
Control JR1
P28V
Coil K#
Relay
Driver
ID
RD
JS1
To S I/O Processor 6 of the above circuits
ID
JT1
To T I/O Processor
ID
TRLYH1D Circuits, TMR System

Specifications
Item Specification
Number of relay channels Six relays with special customer solenoid monitoring
Rated voltage on relays Nominal 125 V dc or 24 V dc
Relay contact rating for 24 V dc voltage Current rating 10 A, resistive
Current rating 2 A, L/R = 7 ms, without suppression
Relay contact rating for 125 V dc voltage Current rating 0.5 A, resistive
Current rating 0.2 A, L/R = 7 ms, without suppression
Current rating 0.65 A, L/R = 150 ms, with suppression (MOV) across the load
Maximum response time on 25 ms typical
Maximum response time off 25 ms typical
Board size 17.8 cm by 33.0 cm (7 in by 13 in)
Fault detection Loss of solenoid voltage supply (fuse monitor)
Solenoid resistance measured to detect open and short circuits
Unplugged cable or loss of communication with I/O board (relays de-energize
if communication with associated I/O board is lost)
Physical
Temperature -30 to +65C (-22 to +149 F)
Diagnostics
L3DIAG_xxxx occurs.
Configuration

TRLYH1E Solid-State Relay Output
The solid-state Relay Output (TRLYH1E) terminal board is a 12-output relay board using
solid-state relays for the outputs and featuring isolated output voltage feedback on all
12 circuits. The solid-state relays allow the board to be certified for Class 1 Division 2
applications. The use of solid-state relays requires three different board types:
TRLYH1E for 115 V ac applications
TRLYH2E for 24 V dc applications
TRLYH3E for 125 V dc applications
Unlike the form-C contacts provided on the mechanical relay boards, all 12 outputs
on TRLYH1E are single, NO, contacts. There is no user solenoid power distribution
on the board.
Mark VI Systems
In the Mark* VI system, the TRLY is controlled by the VCCC or VCRC board and
Mark VIe Systems

Barrier type
terminal blocks can
be unplugged from
board for
maintenance X
x JT1
x 1 MV
Relay
x 2
MV
x 4
x 3 Relay
x 6
x 5
x 8
x 7 MV
x 10
x 9
x 11 Relay
Relay
x 12
MV
x 14
x 13
x 16
x 15 MV J - Port Connections:
x 18 x 17
Relay
x 20
x 19 JS1
x 24
x 23 MV
x Relay
12 Relay Outputs or
TB1
MV
MV Cables to VCCC/VCRC
Relay
Relay boards for Mark VI;
MV
MV
Relay
Relay
redundancy required.
MV
MV Relay
Relay
Shield
bar Solid-State Output Relays
x
TRLYH1E Solid-State Relay Output Terminal Board

Installation
Connect the wires for the 12 solenoids directly to the I/O terminal block on the terminal
board as shown in the figure, TRLYH1E Terminal Board Wiring. The terminal block is
held down with two screws and has 24 terminals accepting up to #12 AWG wires. The dc
relays are unidirectional, so care should be taken about polarity when connecting load to
these relays. A shield terminal strip attached to chassis ground is located immediately
to the left of each terminal block. The solenoids must be powered externally by the
customer.
Solid-State Relay Output Terminal Board TRLYH1E JT1
x
COM7 (NEG) MV
x 1
Relay
COM1 (NEG) x 2
MV
x 3 NO7 (POS) Relay
NO1 (POS) x 4
COM2 (NEG) x 6
x 5 COM8 (NEG)
NO2 (POS))
x 7 NO8 (POS) MV
x 8
COM3 (NEG) x 10
x 9 COM9 (NEG) Relay
Relay
11 NO9 (POS)
MV
x
NO3 (POS) x 12
x 13 COM10 (NEG) JS1 J - Port Connections:
COM4 (NEG) x 14 MV
NO4 (POS) x 16
x 15 NO10 (POS)
COM5 (NEG) x 17 COM11 (NEG) Relay Plug in PDOA I/O Pack(s)
x 18
NO5 (POS) x 19 NO11 (POS) for Mark VIe system
x 20
COM6 (NEG) x 21 COM12 (NEG) MV
x 22
NO6 (POS) x 24
x 23 NO12 (POS) or
Relay
x
Cables to VCCC/VCRC
MV
Wiring to 12 external solenoids MV
boards for Mark VI;
Relay
Relay
MV depends on the level of
MV redundancy required.
Relay
Relay
MV
MV Relay
Relay
TRLYH1E Terminal Board Wiring

Operation
NO solid-state relays, relay drivers, and output monitoring are mounted on TRLYH1E.
During power up, relays stay de-energized while connected to any control. The relay
outputs have a failsafe feature that votes to de-energize the corresponding relay when a
cable is unplugged or communication with the associated I/O processor is lost.
For simplex operation, control signals and relay output voltage feedback signals pass
between the I/O processor and TRLY through JA1. For TMR applications, relay control
signals are fanned into TRLY from the three I/O processors R, S, and T through plugs
JR1, JS1, and JT1. These signals are voted and the result controls the corresponding
relay driver. Power for the relay drivers comes in from all three I/O processors and is
diode-shared. The following figure shows TRLYH1E in a TMR system.
Relay Terminal Board - TRLYH1E
JA1
Contact
Sensing/
Input
Sensing
R
I/O ID
Processor
Solenoid
JR1 Supply
P28V
NO
Solid-
Relay Relay Relay
ID State
Control Voting Driver
JS1 Relay
COM
Coil
To S I/O Processor TB1
ID 12 of the above circuits
JT1 GND
To T I/O Processor
ID
TRLYH1E Circuits, TMR System

Contact Voltage Feedback
In TRLYH1E, isolated feedback of voltage sensing is connected to the relay outputs.
This allows the control to observe the voltage across the relay outputs without a galvanic
connection. One contact sensing circuit is provided with each relay. This feature is
similar to the voltage sensing on TRLYH1C but with simpler hardware. The voltage
sensing circuit allows a small leakage current to pass to power the isolated circuit. The
typical leakage current is the sum of the leakage through the turned off solid-state relay
and the current through the voltage sensing circuit. The following charts indicate the
typical leakage current as a function of the applied voltage for the three board types.
TRLYH1E Typical Off-State Leakage Current-mA

RMS
25.00
Typical leakage current -

20.00
mA RMS 15.00
10.00
5.00
0.00
40 50 60 70 80 90 100 110 120 130 140
Input Voltage across contacts V RMS
TRLYH2E Typical Off-State Leakage Current
3.50
3.00
2.50
Leakage mA ..
2.00
1.50
1.00
0.50
0.00
15 16 17 18 19 20 21 22 23 24 25 26 27 28
Applied Voltage

TRLYH3E Typical Off-State Leakage Current
3.00
2.50
2.00
Leakage mA ..
1.50
1.00
0.50
0.00
60 65 70 75 80 85 90 95 100 105 110 115 120 125 130
Applied Voltage
Due to the permitted leakage current, the board may give false indications if used in
series with a low input current load, including common contact input circuits such as
those found on TBCI or STCI. To ensure correct operation, the maximum load resistances
for the three board types are as follows:
TRLYH1E: Maximum load resistance at nominal 115 V ac is 2.5 k.
TRLYH2E: Maximum load resistance at nominal 24 V dc is 4.5 k.
TRLYH3E: Maximum load resistance at nominal 125 V dc is 25 k.
Load resistance may be decreased by applying a resistor in parallel with the load so the
parallel combination satisfies the maximum resistance requirement.

Contact Voltage Rating
Solid-state relays have a finite transient voltage capability and require coordinated
voltage protection. TRLYH1E for ac applications uses a load control device that turns
off on a current zero crossing. This turn-off characteristic ensures that no inductive
energy is present in the load at turn-off time. Basic protection of the ac relay is provided
on TRLYH1E using a MOV with clamp voltage coordinated with relay voltage rating.
In addition, there is an R-C snubber circuit on the relay output using a 56 resistor in
series with a 0.25 F capacitor.
Both the TRLYH2E (for 24 V dc applications) and the TRLYH3E (for 125 V dc
applications) can interrupt currents in large inductive loads. Because a wide range of
loads may be encountered, an appropriate R-C or diode snubber circuit must be selected
for each application. The snubber should be applied at the load device using common
engineering practices. If the applied snubber does not fully control inductive switching
voltage transients, both board versions contain an active voltage clamp circuit. This
circuit activates at approximately 50-55 V dc for the H2E and at approximately 164-170
V dc for the H3E (both values below the rating of the relay). While the clamp circuit has
a finite ability to absorb energy, it can handle the wiring inductance of a resistive load.

Specifications
Item Specification
Number of relay channels on 12 relays:
one TRLY board 115 V ac operation with TRLYH1E
24 V dc operation with TRLYH2E
125 V dc operation with TRLYH3E
Maximum operating voltage 1E:
and maximum load current 250 V rms at 47-63 Hz, 10 A at 25C (77 F) maximum
with free convection air flow de-rate current linearly to 6 A at 65C (149 F) maximum
2E:
28 V dc, 10 A dc at 40C (104 F) maximum
de-rate current linearly to 7 A dc at 65C (149 F) maximum
3E:
140 V dc, 3 A dc at 40C (104 F) maximum
de-rate current linearly to 2 A dc at 65C (149 F) maximum
Maximum off state leakage 1E: 3 mA rms
(see charts of leakage vs.
2E: 3 mA A dc at 55 V
applied voltage)
3E: 2.5 mA A dc
Max response time on 1 ms for dc relays; cycle for ac relay
Max response time off 300 micro seconds for dc relays; cycle for ac relay
Relay MTBF 1E: 50 years
2E: 37 years
3E: 47 years
Relay contact voltage sensing 1E: 115 V ac, 70 V 10% ac rms

threshold 2E: 24 V dc, 15 V 2 V dc
3E: 125 V dc, 79 V 10% dc
Operating temperature range -30 to 65C (-22 to +149 F)
Operating humidity 5 to 95% non-condensing
Fault detection Relay current disagreement with command
Unplugged cable or loss of communication with I/O board; relays de-energize if
Physical

Diagnostics
L3DIAG_xxxx occurs.
Configuration

TRLYH1F Relay Output with TMR Contact Voting
TRLYH1F and H2F do not The Relay Output with TMR contact voting (TRLYH1F) terminal board provides 12
support simplex arrangements contact-voted relay outputs. The board holds 12 sealed relays in each TMR section, for
a total of 36 relays. The relay contacts from R, S, and T are combined to form a voted
Form A (NO) contact. 24/125 V dc or 115 V ac can be applied.
TRLYH1F does not have power distribution. However, an optional power distribution
board, IS200WPDFH1A, can be added so that a standard 125 V dc or 115 V ac source,
or an optional 24 V dc source with individual fuses, can be provided for field solenoid
power. IS200WPDFH2A provides a single fuse in the high side (pin 1 of J1J4) of
each power distribution circuit for AC applications where a fuse in neutral return weire
(pin 3 of J1J4) is not desirable.
TRLYH2F is same as TRLYH1F except that the voted contacts form a Form B (NC)
output. Both boards can be used in Class 1 Division 2 applications.
Mark VI Systems
In the Mark* VI system, the TRLY is controlled by the VCCC, VCRC, or VGEN board
and only supports TMR applications. Cables with molded plugs connect JR1, JS1, and
JT1 to the VME rack where the I/O boards are mounted.
Mark VIe Systems
In the Mark VIe system, the TRLY works with PDOA I/O pack and only supports TMR
applications. Three TMR PDOA packs plug into the JR1, JS1, and JT1 37-pin D-type
connectors on the terminal board.

DC-64 pin connector for optional
power distribution daughterboard
TB1 J1 X
x JT1
x 2
x 1 DC-37 pin connector for I/O processor
x 4
x 3
x 5 K1R K1S K1T
x 6
x 8
x 7
x 10
x 9
x 11
x 12
x 13
x 14
x 15
x 16
x 18
x 17
x 20
x 19 JS1 J - Port Connections:
x 21 18 sealed relays
x 23 Plug in 3 PDOA I/O Packs
x 24
x for Mark VIe system
or
x
TB2
x 25
x 26 Cables to VCCC/VCRC or VGEN
x 27
x 28 18 sealed relays boards for Mark VI system
x 30
x 29
x 32
x 31
x 33
JR1
x 34
x 36
x 35
x 37
x 38
x 39
x 40
x 41
x 42
x 43
x 44 K12R K12S K12T
x 46
x 45
x 48
x 47
x
J2 X

Shield bar Barrier type terminal power distribution daughterboard
TRLYH1F Relay Output Terminal Board

Installation
Connect the wires for the 12 solenoids directly to two I/O terminal blocks on the terminal
board as shown in the following figure, TRLYH1F Terminal Board Wiring. Each block is
shield termination strip attached to chassis ground is located immediately to the left
side of each terminal block. Solenoid power for outputs 1-12 is available if the WPDF
daughterboard is used. Alternatively, power can be wired directly to the terminal block.
Relay Output Terminal Board TRLYH1F DC-64 pin connector for

optional power distribution
Wiring connections J1 daughterboard WPDF
JT1
x
x 1 POF1 DC-37 pin connector for I/O
K1b x 2
x 3 K1a K1R K1S K1T processor
PRF1 x 4
x 5 POF2
K2b x 6
x 7 K2a
PRF2 x 8
K3b x 10
x 9 POF3
PRF3 x 12
x 11 K3a
K4b x 14
x 13 POF4
x 15 K4a
PRF4 x 16
x 17 POF5
K5b x 18 J - Port Connections:
x 19 K5a JS1
PRF5 x 20
x 21 POF6 18 sealed relays Plug in three PDOA I/O Packs
K6b x 22
x 23 K6a for Mark VIe system
PRF6 x 24
x
or
Cables to VCCC/VCRC or VGEN

x
x 25 POF7 boards for Mark VI system
K7b x 26
x 27 K7a
PRF7 x 28 18 sealed relays
x 29 POF8
K8b x 30
x 31 K8a
PRF8 x 32
x 33 POF9 JR1
K9b x 34
PRF9 x 36
x 35 K9a
x 37 POF10
K10b x 38
PRF10
x 39 K10a
x 40
K11b x 42
x 41 POF11
PRF11 x 44
x 43 K11a
K12b
x 45 POF12
x 46 K12R K12S K12T
x 47 K12a
PRF12 x 48
x
J2
Signal Name Description, n=1...12
64-pin connector for optional
POFn Power Out Fused #n
PRFn Power Return Fused #n WPDF
Kna Resulting voted relay contact #n
Knb Resulting voted relay contact #n
TRLYH1F Terminal Board Wiring

Power Distribution Board
If using the optional WPDF power distribution board, mount it on top of TRLY on the
J1 and J2 connectors. Secure WPDF to TRLY by fastening a screw in the hole located
at the center of WPDF. Connect the power for the two sections of the board on the
three-pin connectors J1 and J4. Power can be daisy-chained out through the adjacent
plugs, J2 and J3.
3 1 3 1
J2 J1
Input power
Output power P1
daisy chain
FU1 FU13
Plug DC-62 pin connector
into J1 on TRLY
FU6 FU18
Fasten WPDF to
TRLYH1F TRLY with screw
Board
FU19 FU7

into J2 on TRLY
FU24 FU12
Output power
daisy chain P2
Input power
J3 J4
3 1 3 1
WPDF Power Distribution Board

The solenoids must be wired as shown in the following figure. If WPDF is not used, the
customer must supply power to the solenoids.
TRLYH1F WPDF Daughter Board

Power Input,
J2 J1
section 1
Customer K1a 1 +
Solenoid PRF1 2
POF1 3 Vfb
K1b 4
5 +
6
Output #2 7 Vfb
8
P1
Wiring to Solenoid using WPDF

Operation
The 28 V dc power for the terminal board relay coils and logic comes from the three I/O
processors connected at JR1, JS1, and JT1. The same relays are used for ac voltages
and dc voltages, as specified in the Specifications section. H1F and H2F use the same
relays with differing circuits.
Relay drivers are mounted on the TRLYH1F and drive the relays at the frame rate. The
relay outputs have a failsafe feature that votes to de-energize the corresponding relay
when a cable is unplugged or communication with the associated I/O board or I/O pack
is lost
This board only supports TMR applications. The relay control signals are routed into
TRLY from the three I/O processors R, S, and T through plugs JR1, JS1, and JT1. These
signals directly control the corresponding relay driver for each TMR section R, S, and
T. Power for each sections relay coils comes in from its own I/O processor and is not
shared with the other sections.
TRLYH1F features TMR contact voting. The relay contacts from R, S, and T are
combined to form a voted Form A (NO) contact. 24/125 V dc or 115 V ac can be applied.
TRLYH2F is the same except that the voted contacts form a Form B (NC) output. The
following figure shows TMR voting contact circuit.
Contact voting circuit

Relay control
Driver feedback V R R S
Normally
S Open
V T R
contacts
V T S T
TRLYH1F Contact Arrangement for TMR Voting

Field Solenoid Power Option
The WPDFH1A daughterboard supplies power to TRLYH#F to power solenoids. WPDF
holds two power distribution circuits, which can be independently used for standard
125 V dc, 115 V ac, or 24 V dc sources. Each section consists of six fused branches
that provide power to TRLYH#F. Each branch has its own voltage monitor across its
secondary fuse pair. Each voltage detector is fanned to three independent open-collector
drivers for feedback to each of the I/O processors R, S, and T. IS200WPDFH2A provides
a single fuse in the high side (pin 1 of J1J4) of each power distribution circuit for AC
applications where a fuse in the neutral return wire (pin 3 of J1J4) is not desirable).
WPDF should not be used without TRLYH#F. Fused power flows through this board
down to the TRLY terminal board points. TRLY controls the fuse power feedback. The
following figure shows TRLYH1F/WPDF solenoid power circuit.
WPDF Daughterboard
Pwr. Output Power Input,
daisy chain J2 J1
section 1
Fuse
1 +
2 Voltage sense
Output #1 Vfb
3 Fuse
4
5 +
6
Output #2 Vfb
7
8
P1
TRLYH1F 6 circuits
Terminal Board P2
Fuse
+
Voltage sense
Vfb
Fuse
+
Vfb
6 circuits
J3 J4 section 2
daisy chain
Solenoid Power Supply WPDF

The following table lists the relationship between fuses and terminals:
Terminal Name Fuse

1 POF1 FU1
4 PRF1 FU13
5 POF2 FU2
8 PRF2 FU14
9 POF3 FU3
12 PRF3 FU15
13 POF4 FU4
16 PRF4 FU16
17 POF5 FU5
20 PRF5 FU17
21 POF6 FU6
24 PRF6 FU18
25 POF7 FU7
28 PRF7 FU19
29 POF8 FU8
32 PRF8 FU20
33 POF9 FU9
36 PRF9 FU21
37 POF10 FU10
40 PRF10 FU22
41 POF11 FU11
44 PRF11 FU23
45 POF12 FU12
48 PRF12 FU24

Specifications
Item Specification
Number of output relay channels 12
Board types H1F: NO contacts
H2F: NC contacts
Rated voltage on relays a: Nominal 100/125 V dc or 24 V dc
b: Nominal 115 V ac
Maximum load current a: 0.5/0.3 A resistive for 100/125 V dc operation
b: 5.0 A resistive for 24 V dc operation
c: 5.0 A resistive for 115 V ac
Maximum response time on 25 ms
Fault detection Coil Voltage disagreement with command
Blown fuse indication (with WPDF power daughterboard)
Unplugged cable or loss of communication with I/O board; relays
de-energize if communication with associated I/O board is lost
Physical Size 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in)
Operating Temperature -30 to 65C (-22 to 149 F)
Technology Surface-mount
WPDF Solenoid Power Distribution Board
Number of Power Distribution Circuits (PDC) 2: each rated 10 A, nominal 115 V ac or 125 V dc.
Number of Fused Branches 12: six for each PDC
Fuse rating 3.15 A at 25C (77 F)
2.36 A is the recommended maximum usage at 65C (149 F)
Voltage monitor, maximum response delay 60 ms typical
Voltage monitor, minimum detection voltage 16 V dc
72 V ac
Voltage monitor, max current (leakage) 3 mA
Physical
Size - TRLY 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in)
Size - WPDF 10.16 cm wide x 33.02 cm high (4.0 in x 13.0 in)

Diagnostics
The voltage to each relay coil is monitored and checked against the command at the
frame rate. If there is no agreement for two consecutive checks, an alarm is latched.
The voltage across each solenoid power supply is monitored and if it goes below
16 V ac/dc, an alarm is created.
If any one of the outputs goes unhealthy a composite diagnostic alarm,
L3DIAG_xxxx occurs.
board. The connector ID is coded into a read-only chip containing the board serial
number, board type, revision number, and the JR1/JS1/JT1 connector location.
Details of the individual diagnostics are available from the configuration application.
The diagnostic signals can be individually latched, and then reset with the RESET_DIA
signal if they go healthy.
Configuration

DRLY Simplex Relay Output
DRLY does not work with the The Simplex Relay Output (DRLY) terminal board is a compact relay output terminal
PDOA I/O Pack. board designed for wall mounting (not DIN-rail mounting). The board has 12 form-C dry
contact output relays and connects to the VCCC, VCRC, or VTUR processor board with
a single cable. The 37-pin cable connector is identical to those used on the larger TRLY
terminal board. Two DRLY boards can be connected to VCCC, VCRC, or VTUR for a
total of 24 contact outputs. Only a simplex version of this board is available.
There are two versions of the DRLY terminal board:
H1A has higher powered relay contacts than H1B.
H1B is suitable for use in UL listing for Class I, Division 2 Hazardous (classified)
locations.
Installation
DLRY does not have a shield Mount the DRLY board by fastening screws to wall through the four mounting holes in
terminal strip. the corners of metal support plate. Connect the wires for the 12 relay outputs directly to
the odd-numbered screws on the terminal blocks.
SCOM, TB2, must be connected The high-density Euro-Block type terminal blocks plug into the numbered receptacles
to chassis ground. on the board. The two screws on TB2 are provided for the SCOM (chassis ground)

TB2 1 2 P28 OK LED

Output 1 (NC) 1 TB1 SCOM 37 Output 7 (NC)
2 38
Output 1 (COM) 3 K7 39 Output 7 (COM)
4 40
Output 1 (NO) 5 41 Output 7 (NO)
6 K1 42
Output 2 (NC) 7 43 Output 8 (NC)
8 44
Output 2 (COM) 9 45 Output 8 (COM)
K8
10 46
12 K2 48
14 50
Output 3 (COM) 15 K9 Output 9 (COM)
51
16 52
18 K3
54
20 56
22 58
24 K4
60
26 K11 62
28 64
Output 5 (NO) 29 K5 65 Output 11 (NO)
30 66
32 K12 68
34 70
36 72
JR1
LED relay Mounting

state indicator holes
Cable from J3 or J4
on I/O rack, from
I/O processor 37-pin "D" shell
board connector
DRLY Wiring and Cabling

Operation
Three relays on DRLY can be DRLY does not include solenoid source power. There is one set of dry contacts per relay,
controlled by VTUR using the with two NO contacts in series. Unlike TRLY, there is no on-board suppression, and no
DTRT transition board. Six relay state monitoring. The I/O board (VCCC, VCRC, or VTUR) provides the 28 V dc
relays can be controlled if two power for the relay coils, which is indicated with a green LED. DRLY has a yellow LED
DTURs are used. for each relay that indicates voltage across the coil. With an unconnected control cable,
the relays default to a de-energized state.
DRLY Board
JR1
P28V TB1
From J3 or J4
on I/O rack, 1 NC
from I/O P28 OK LED COIL
processor Output 1
3 COM of 12 dry
board Relay contact
Driver outputs
5 NO
RD
TB2 1
2
SCOM
DRLY Board Circuits

DRLYH1A Specifications
Item Specification
Number of relay 12 relays, nominal 24 V dc coil. Two-pole double throw with Form C contacts containing two
outputs and type NO and 2 NC contacts
Relay contact rating Resistive: Inductive:
28 V dc: 10 A 28 V dc: 2 A, L/R = 7 ms, without suppression
120 V ac: 10 A 120 V ac: 2 A, PF= 0.4, 10 A inrush, no suppression, Motor load 1/3 Hp.
240 V ac: 3 A 240 V ac: 2 A, PF= 0.4, 10 A inrush, no suppression, Motor load Hp.
125 V dc: 0.5 A 125 V dc: 0.2 A, L/R = 7 ms without suppression
125 V dc: 0.65 A, L/R = 150 ms, MOV suppression by others (with two
contacts in series on the same relay)
Suppression External suppression will be supplied by customer
Relay response time Operate: 15 ms typical
Release: 10 ms typical
Fault detection in I/O The state of the P28 V dc is monitored using a green LED at the top of the board. Voltage across
board each relay coil is indicated with a yellow LED. There is no relay state monitoring in the VCCC
or VCRC
Physical
Size 21.59 cm long x 20.57 cm wide (8.5 in x 8.1 in wide)

DRLYH1B Specifications
Item Specification
Number of relay outputs 12 relays, nominal 24 V dc coil
Relay type Two-pole double throw with Form C contacts containing two NO and 2 NC contacts. UL listed,
CSA certified, sealed to UL 1604
Relay contact rating 28 V dc: 2 A Max operating voltage: 250 V rms, 220 V dc
(resistive load)
125 V dc: 0.5 A Max operating current: 2 A dc, 1 A rms
120 V ac: 1 A Max switching capacity: 125 VA, 60 W
240 V ac: 0.5 A
Fault detection in I/O The state of the P28 V dc is monitored using a green LED at the top of the board
board Voltage across each relay coil is indicated with a yellow LED
There is no relay state monitoring in the I/O board
Agency requirements UL listed Class I, Division. 2 applications, CSA, and CE, also approvals listed in table above for
TRLYH1A
Physical
Size 21.59 cm long x 20.57 cm wide, (8.5 in x 8.1 in)
Diagnostics
The board contains the following diagnostics; there is no relay state monitoring.
The terminal board connector has an ID device that is interrogated by the I/O board.
The connector ID is coded into a read-only chip containing the board serial number,
board type, and revision number. When this chip is read by VCCC/VCRC or VTUR
and a mismatch is encountered, a hardware incompatibility fault is created.
The voltage across each relay coil is indicated with a yellow LED.
The 28 V supply to the board is indicated with a green LED.
Configuration

Bus Master Controller (VCMI)
VCMI Bus Master Controller
The VME Bus Master Controller (VCMI) board is the communication interface between
the controller and the I/O boards, and the communication interface to the system control
network, known as IONet. VCMI is also the VME bus master in the control and I/O
racks, and manages the IDs for all the boards in the rack and their associated terminal
boards. The two versions of the VCMI are shown in the following figure:
8-1 Bus Master Controller (VCMI) GEH-6421Q Mark* VI Control

VCMI H1 VCMI H2
x x
VCMI is OK
RUN Error or Power up Failure RUN

FAIL FAIL
STATUS STATUS
Pushbutton RESET
RESET
S S
E E
R R
I VME bus to I/O I VME bus to I/O
A A
boards and controller L
boards and controller
L
M
BE 8O
D
TX 4
U
RX 2L
CD 1E
M I
BE 8 O O IONet3 port
4 D N
IONet node E
10Base2
2 U
L T
1 3
E
TX R
RX S
R Channel ID
CD T
S I
T O IONet2 port
N
E 10Base2
Transmitting Packets T
TX Receiving Packets 2
RX Collisions on IONet TX
CD RX
CD
I I
O O
N N
E IONet port E IONet1 port
T T
1 10Base2 2 10Base2
x x
Communication Communication
board - 1 IONet board - 3 IONets
VCMI Boards, Single, and Triple Network Versions
GEH-6421Q System Guide, Volume II Bus Master Controller (VCMI) 8-2

Multiple I/O racks can be connected to the IONet, each rack with its own VCMI board.
The following figure shows three simplex system configurations with local and remote
I/O using the VCMI.
V U Simplex system with

C C I/O local I/O
M V Boards
I X
UCVX is controller
VCMI is bus master
I/O are VME boards
R0 R1 R2
V U V V
C C I/O C C I/O Simplex system with
I/O
M V Boards M Boards M Boards local & remote I/O
I X I I
IONet
Simplex System Configurations with Local and Remote I/O

The following figure shows two sizes of triple modular redundant (TMR) systems. The
first example is a small system where all the I/O is mounted in the VME control rack
so no remote I/O racks are required. Each channel (R, S, T) has its own IONet, and
the VCMI has three IONet ports.
The second example is a larger system with remote I/O racks. Each IONet supports
multiple I/O racks, but only one rack is shown here. All I/O channels (R, S, T) are
identical in terms of I/O boards and points.
R0 S0 T0 TMR system with

V U V U V U local I/O
C C I/O C C I/O C C I/O
M V Boards M V Boards M V Boards UCVX is controller
I X I X I X
VCMI is bus master
I/O are VME
IONet - R Termination boards
IONet - S not shown
IONet - T
R0 S0 T0 TMR system with

V U V U V U remote I/O,
C C C C C C Termination boards
M V M V M V not shown
I X I X I X
IONet - R
IONet - S
IONet - T
R1 S1 T1
V V V
C C C I/O IONet supports
I/O I/O
M Boards M Boards M Boards multiple remote
I I I I/O racks
TMR System Configurations with Local and Remote I/O

The VCMI card receives analog and digital feedback of power status through the J301
backplane connector. J301 connections are as follows:
Backplane VCMI Hardware VCMI Software

J301 Pin Signal VCMI Signal Description Signal Space Signal Space Description
1 P28AA +28 V Power out
2 PCOM Power common
5 SG201C28 AIN4P Analog input 4 + Spare 02 Analog spare 02
6 SG201C27 AIN4N Analog input 4 - Spare 01 Analog spare 01
7 SG201C26 AIN3P Analog input 3 +
8 SG201C25 AIN3N Analog input 3 -
9 SG201C24 DINRET Digital input, Power common
10 SG201C23 DINPWROUT Digital input, Power output
11 SG201C22 DIN12 Digital input 12 Logic_In_12 Spare 05
16 SG201C17 DIN7 Digital input 7 Logic_In_7 Fuse 29, J17 Fault
17 PCOM Power common
18 P28AA +28 V Power out
19 SIGCOM02 SCOM-DCOM JP2 Select
20 N28 -28 V Power out
21 PCOM Power common
26 SG201A26 AIN2P Analog input 2 + N125_Grd N125 with respect to ground
27 SG201A25 AIN2N Analog input 2 -
28 SG201A24 AIN1P Analog input 1 + P125_Grd P125 with respect to ground
29 SG201A23 AIN1N Analog input 1 -
30 SG201A22 DIN6 Digital input 6 Logic_In_6 Fuse 32, J20 Fault
31 SG201A21 DIN5 Digital input 5 Logic_In_5 Fuse 31, J19 Fault
32 SG201A20 DIN4 Digital input 4 Logic_In_4 Miscellaneous contact
33 SG201A19 DIN3 Digital input 3 Logic_In_3 AC2 source fault
34 SG201A18 DIN2 Digital input 2 Logic_In_2 AC1 source fault
35 SG201A17 DIN1 Digital input 1 Logic_In_1 Battery bus fault
36 SIGCOM01 SCOM-DCOM, JP1 Select
37 CBL301ID CBL301ID ID Cable signal

Specifications
Item Specification
Board Type 6U high VME board, 0.787 inch wide
Processor Texas Instruments TMS320C32 32-bit digital signal processor
Memory Dual-port memory: 32 Kbytes in 32-bit transfer configuration
SRAM: 256k x 32
Flash memory: 512k x 8-VCMIH_B; 4096K x 8-VCMIH_C
Communication H1 version: One IONet 10Base2 Ethernet port, BNC connector, 10 Mbits/sec
H2 version: Three IONet 10Base2 Ethernet ports, BNC connectors, 10 Mbits/sec
VME bus block transfers
1 RS-232C Serial port, D-style plug connector, 9600 (only)
Frame Rate 10 ms (100 Hz) for simplex
40 ms (25 Hz) for TMR
20 ms, 80 ms application dependent
Diagnostics
The internal +5 V, 12 V, 15 V, and 28 V power supply buses are monitored and
alarmed. The alarm settings are configurable and usually set at 3.5%, except for the 28 V
supplies, which are set at 5.5%.
Diagnostic signals from the power distribution module (PDM), connected through J301,
are also monitored. These include ground fault and over/under voltage on the P125
V bus, two differential 5V dc analog inputs, P28A and PCOM for external monitor
circuits, and digital inputs.

Configuration
VCMI Toolbox Configuration (Part 1 of 2)

Configuration
System Limits Enable or disable all system limits Enable, disable
PS_Limit1 Power supply limits for P5, P15, N15 in % 0 to 10
PS_Limit2 Power supply limits for P12, N12, P28, N28 in percent 0 to 10
PwrBusLimits Enable or disable power bus diagnostics Enable, disable
125 vBusHlim High limit for 125 V dc bus in volts 0 to 150
125 vBusLlim Low limit for 125 V dc bus in volts 0 to 150
125 vBusGlim Low volts to ground limit for 125 V dc bus (diagnostic) 0 to 150
J3 Power Monitor PDM monitor Connected, not connected
Logic_In_1 First of 12 logical inputs board point signal Point edit (input BIT)
Logic_In Configurable item Used, unused
P125_Grd P125 with respect to ground board point signal Point Edit (Input FLOAT)
Input Type Type of analog input Used, unused
Low_Input Input volts at low value -10 to +10
Low_Value Input value in engineering units at low MA -3.4082e+038 to 3.4028e+038
High_Input Input volts at high value -10 to +10
High_Value Input value in engineering units at high MA -3.4082e+038 to 3.4028e+038
Input _Filter Bandwidth of input signal filter in Hz Unused, 0.75 Hz, 1.5 Hz, 3 Hz,
TMR_DiffLimit Difference limit for voted TMR inputs in % of high-low 0 to 10
values
Sys_Lim_1_Enabl Enable system limit 1 fault check Enable, disable
Less than or equal
Sys_Lim_1 Input limit in engineering units -3.4082e+038 to 3.4028e+038
Sys_Lim_2 Same as above for Sys Lim 1 Same as for Sys_Lim_1
N125_Gnd Same as for P125_Grd board point signal Same as for P125_Grd
Spare 01 Similar to P125_Grd board point signal Similar to P125_Grd
Spare 02 Similar to P125_Grd board point signal Similar to P125_Grd

VCMI Toolbox Configuration (Part 2 of 2)

Board Point Signal Description - Point Edit (Enter Signal Connection) Direction Type
L3Diag_VCMI1 Board diagnostic Input BIT
SysLimit1-1 P125_Grd (Input exceeds limit) Input BIT
SysLimit1-2 N125_Grd (Input exceeds limit) Input BIT
SysLimit1-3 Spare 01 (Input exceeds limit) Input BIT
SysLimit1_125 P125 bus out of limits (Input exceeds limit) Input BIT
SysLimit2-1 P125_Grd (Input exceeds limit) Input BIT
SysLimit2-2 N125_Grd (Input exceeds limit) Input BIT
SysLimit2_125 P125 bus out of limits (Input exceeds limit) Input BIT
P125Bus Calc 125 V dc bus voltage (P125Grd - N125Grd) Input FLOAT
ResetSYS System limit reset (Special VCMI output to I/O bds) Output BIT
ResetDIA Diagnostic reset (Special VCMI output to I/O bds) Output BIT
ResetSuicide Suicide reset (Special VCMI output to I/O bds) Output BIT
MasterReset Master reset L86MR (Special VCMI out to I/O bds) Output BIT
Logic_In_1 Battery bus fault Input BIT
Logic_In_2 AC1 source fault Input BIT
Logic_In_3 AC2 source fault Input BIT
Logic_In_4 Misc contact Input BIT
Logic_In_5 Fuse 31, J19 fault Input BIT
Logic_In_8 Spare 01 Input BIT
P125_Grd P125 with respect to ground, P3 28 to 29 Input FLOAT
N125_Grd N125 with respect to ground, negative number, P3 26 to 27 Input FLOAT
Spare01 Analog spare 01, P3 07 to 08 Input FLOAT
Spare02 Analog spare 02, P3 05 to 06 Input FLOAT

Alarms
1 SOE Overrun. Sequence of Events data overrun Communication problem on IONet
go online)
3 CRC Failure Override is Active Board firmware programming error (board is allowed
to go online)
4 Watchdog circuitry is not armed Board firmware programming error (board is allowed
to go online)
16 System Limit Checking is Disabled System checking was disabled by configuration
17 Board ID Failure Failed ID chip on the VME I/O board
18 J3 ID Failure Failed ID chip on connector J3, or cable problem
22 J3A ID Failure Failed ID chip on connector J3A, or cable problem
24 Firmware/Hardware Incompatibility Invalid terminal board connected to VME I/O board
25 Board inputs disagree with the voted value A problem with the input. This could be the device,
the wire to the terminal board, the terminal board,
or the cable.
30 ConfigCompatCode mismatch; Firmware: #, Tre: A tre file has been installed that is incompatible with
# The configuration compatibility code that the the firmware on the I/O board. Either the tre file or
31 IOCompatCode mismatch; Firmware: #; Tre: # The A tre file has been installed that is incompatible with
32 P5=###.## Volts is Outside of Limits. The P5 power A VME rack backplane wiring problem and/or power
supply is out of the specified operating limits supply problem
33 P15=###.## Volts is Outside of Limits. The P15 If "Remote Control", disable diagnostic and ignore;
power supply is out of the specified operating limits otherwise probably a back plane wiring or VME
power supply problem.
34 N15=###.## Volts is Outside of Limits. The N15 If "Remote Control", disable diagnostic and ignore;
power supply is out of the specified operating limits otherwise probably a VME backplane wiring and/or
35 P12=###.## Volts is Outside of Limits. The P12 If "Remote I/O", disable diagnostic and ignore;
36 N12=###.## Volts is Outside of Limits. The N12 If "Remote I/O", disable diagnostic and ignore;

37 P28A=###.## Volts is Outside of Limits. The P28A If "Remote Control", disable diagnostic and ignore;
38 P28B=###.## Volts is Outside of Limits. The P28B If "Remote Control", disable diagnostic and ignore;
39 P28C=###.## Volts is Outside of Limits. The P28C If "Remote Control" disable diagnostic. Disable
power supply is out of the specified operating limits diagnostic if not used; otherwise probably a
backplane wiring and/or power supply problem.
40 P28D=###.## Volts is Outside of Limits. The P28D If "Remote Control" disable diagnostic. Disable
41 P28E=###.## Volts is Outside of Limits. The P28E If "Remote Control" disable diagnostic. Disable
42 N28=###.## Volts is Outside of Limits. The N28 If "Remote Control" disable diagnostic. Disable
43 125 Volt Bus=###.## Volts is Outside of Limits. The A source voltage or cabling problem; disable 125 V
125-Volt bus voltage is out of the specified operating monitoring if not applicable.
limits
44 125 Volt Bus Ground =###.## Volts is Outside of Leakage or a fault to ground causing an unbalance
Limits. The 125-Volt bus voltage ground is out of the on the 125 V bus; disable 125 V monitoring if not
specified operating limits applicable.
45 IONet-1 Communications Failure. Loss of Loose cable, rack power, or VCMI problem
communication on IONet1
48 VME Bus Error Detected (Total of ### Errors). The The sum of errors 60 through 66 - Contact the
VCMI has detected errors on the VME bus factory.
49 Using Default Input Data, Rack R.#. The VCMI is not IONet communications failure - Check the VCMI
getting data from the specified rack and/or IONet cables.
50 Using Default Input Data, Rack S.#. The VCMI is not IONet communications failure - Check the VCMI
51 Using Default Input Data, Rack T.#. The VCMI is not IONet communications failure - Check the VCMI
52 Missed Time Match Interrupt (## uSec). The VCMI Possible VCMI hardware failure
has detected a missed interrupt
53 VCMI Scheduler Task Overrun. The VCMI did not Possibly too many I/O
complete running all its code before the end of the
frame
54 Auto Slot ID Failure (Perm. VME Interrupt). The I/O board or backplane problem
VCMI cannot perform its AUTOSLOT ID function

55 Card ID/Auto Slot ID Mismatch. The VCMI cannot Board ID chip failed
read the identity of a card that it has found in the rack
56 Topology File/Board ID Mismatch. The VCMI has ID chip mismatch - Check your configuration
detected a mismatch between the configuration file
and what it actually detects in the rack
57 Controller Sequencing Overrun Too much application code used in controller.
Reduce the code size.
58 Controller PCODE Version Mismatch between Error during controller download - revalidate, build,
R,S,and T. R, S, and T have different software and download all 3 controllers.
versions
59 IONet Communications Failure. Loss of Loose cable, rack power, or VCMI problem (VCMI
communications on the slave VCMI IONet slave only)
60-66 VME Error Bit # (Total ## Errors). The VCMI has VME backplane errors - Contact factory.
detected errors on the VME bus
67 Controller Board is Offline. The VCMI cannot Controller failed or is powered down.
communicate with the controller
68-87 I/O Board in Slot # is Offline. The VCMI cannot I/O board is failed or removed. You must replace the
communicate with the specified board board, or reconfigure the system and redownload
to the VCMI, and reboot.
88 U17 Sectors 0-5 are not write protected Sectors not write protected in manufacturing.
Contact the factory.
89 SRAM resources exceeded. Topology/config too The size of the configured system is too large for the
large VCMI. You must reduce the size of the system.
90 UCVx/VCMI Topology revisions disagree. Download application code to controller and reboot.
Download configuration data to VCMIs and reboot.
91 U54 Flashsectors #-## not write protected Sectors not write protected in manufacturing.
Contact the factory

Generator Monitor and Trip (VGEN)
VGEN Generator Monitor and Trip
The Generator Monitor and Trip (VGEN) board and the TGEN terminal board monitor
the generator three-phase voltage and currents, and calculate three-phase power and
power factor. For large steam turbine applications, VGEN provides the power load
unbalance (PLU) and early valve actuation (EVA) functions, using fast acting solenoids
located on a TRLY terminal board.
GEH-6421Q System Guide, Volume II Generator Monitor and Trip (VGEN) 9-1
TGEN Terminal Board VGEN VME Board
TB1 x
x
x 37-pin "D" shell
JT1 type connectors
x 2
x 1 RUN
x 4 x 3 with latching FAIL
Current x 6
x 5
fasteners
STAT
inputs & x 8 x 7
x 10
x 9
gen PT x 11
x 12
signals x 14
x 13
x 16 x 15
x 18
x 17 Cable to VME
x 20 x 19 JS1 rack T
x 22
x 21
x 24 x 23
VME bus to VCMI
x
TB2
Cable to VME
rack S
Gen CT TB3 JR1
signals
VGEN
x
TB4
Connectors on J3
VME rack R
x
Cable to VME
Shield bar rack R
J4
Cable to optional TRLY,

for fast acting solenoids
Generator Terminal Board, Processor Board, and Cabling

Installation
To install the VGEN board
1. Power down the VME I/O processor rack.
2. Slide in the VGEN board and push the top and bottom levers in with your hands to
seat its edge connectors.
3. Tighten the captive screws at the top and bottom of the front panel. These screws
serve to hold the board firmly in place and enhance the board front ground integrity.
The screws should not be used to actually seat the board.
Note Cable connection to the TGEN terminal board is made at the J3 connector on
the lower portion of the VME rack. Cable connection to the optional TRLY terminal
board is made at the J4 connector on the lower portion of the VME rack. J3 and J4
are latching type connectors to secure the cables. Power up the VME rack and check
the diagnostic lights at the top of the front panel. For details, refer to the Diagnostics
section in this document.
9-2 Generator Monitor and Trip (VGEN) GEH-6421Q Mark* VI Control

Operation
A single VGEN can be used VGEN monitors two, three-phase potential transformer (PT) inputs, and three, one-phase
for simplex operation, or three current transformer (CT) inputs. Using jumpers on TGEN, four analog inputs can be
VGENs can be used for TMR configured for 4-20 mA or 5, 10 V dc. VGEN performs signal conversions and power,
operation. power factor, and frequency calculations.
<R>
<S>
<T>
Terminal Board TGEN Controller
Analog inputs 4 circuits per terminal board
Noise
TB1 suppression.
01 P28VV P28V, R Generator
+24 Vdc Current Limit
S
Board
03 Vdc JP1A VGEN
+/-5,10 Vdc T
02 20 ma
4-20 ma
250 ohms
04
Return
JP1B 115 V rms yields Shown
Open Return 1.5333 V rms, for <R>
gen & bus JR1 J3 +28 Vdc
PCOM
17
TB1
18 PCOM Test Points A/D
A 19 TP1
Generator To TRLY
TP2 ID from
3-phase B 20
<R>
volts JS1 J3
C 21
TP3 Buffer <S>
(115 Vac) <T>
A 22
TP4
Bus Same
3-phase B 23
TP5 for <S>
volts ID
C 24
TP6
(115 Vac)
TB2 JT1 J3
H1 01 1:2000
TP8
Current - H2 02 R19 ohms
phase A TP7 0.01%
Same
L1 03
(115 Vac) for <T>
L2 04
TB3 TP10 ID
H1 01 1:2000

phase B TP9 0.01%
L1 03
(115 Vac) L2 04 Connectors at bottom
TB4 H1 01 1:2000
TP12 of VME racks
phase C L1 03
TP11 0.01% 5 A input yields
(115 Vac) L2 04 0.25 V rms (line-neutral) or
Noise suppression 0.433 V rms (line-line)
TB4
TGEN Board Showing Potential and Current Transformer Inputs

Test points are provided for all VGEN monitors generator three-phase power and supplies the PLU and EVA functions
PT and CT inputs to verify the for large steam turbines. The generator and bus PT inputs are three-wire, open delta,
phase in the field. voltage measurements that are used to calculate all three line-to-line voltages. They are
not used for automatic synchronizing, which requires two separate single-phase PT
inputs. Each PT input is magnetically isolated and is nominally 115 V rms.
High frequency and 50/60 Hz Three single-phase CT inputs are provided with a normal current range of 0 to 5 A
noise is reduced with an analog continuous. The CTs are magnetically isolated on TGEN. CTs connect to non-pluggable
hardware filter. terminal blocks with captive lugs accepting are up to #10 AWG wires. The following
parameters are calculated from these inputs:
Total Mwatts
Total Mvars
Total MVA
Power factor
Bus frequency (5 to 66 Hz)
The four analog inputs accept 4-20 mA inputs or 5, 10 V dc inputs. A +24 V dc source
is available for all four circuits with individual current limits for each circuit. The 4-20
mA transducer can use the +24 V dc source from the turbine control or a self-powered
source. A jumper on TGEN selects between current and voltage inputs for each circuit.

Specifications
Item Specification
Inputs to TGEN and VGEN 2 three-phase generator and bus PTs
3 one-phase generator CTs
4 analog inputs (4-20 mA, 5, 10 V dc)
Outputs from VGEN through TRLY 12 relay outputs (for large steam turbines)
Generator and bus voltages Nominal 115 V rms with range of interest of 10 to 120%
Nominal frequency 50/60 Hz with range of interest 45 to 66 Hz
Magnetic isolation to 1,500 V rms and loading less than 3 VA
Input measurement resolution is 0.1%
Input accuracy is 0.5% of rated V rms from 45 to 66 Hz
Input accuracy is 1.0% of rated V rms from 25 to 45 Hz
Input loading less than 3 VA per circuit
Generator current inputs Normal current range is 0 to 5 A with over-range to 10 A
Magnetic isolation to 1,500 V rms
Input accuracy 0.5% of full scale (5 A) with resolution of 0.1% FS
Input burden less than 0.5 per circuit
Analog inputs Current inputs: 4-20 mA
Voltage inputs: 5 V dc or 10 V dc
Transducers can be up to 300 m (984 ft) from the control cabinet with a two-way
cable resistance of 15 .
Input burden resistor on TGEN is 250 .
Jumper selection of single ended or self powered inputs
Jumper selection of voltage or current inputs
Analog Input Filter: Breaks at 72 and 500 rad/sec
Ac common mode rejection (CMR) 60 dB
Dc common mode rejection (CMR) 80 dB
Conversion accuracy Sampling type 16-bit A/D converter, 14 bit resolution
Accuracy 0.1% overall
Frame rate 100 Hz
Calculated values Total MW and MV have an accuracy of 1% FS, and 0.5% for totalizing.
Total m VA and power factor have an accuracy of 1% full scale.
Bus frequency (5 to 66 Hz) has an accuracy of 0.1%.
Diagnostics
Three LEDs at the top of the VGEN front panel provide status information. The normal
RUN condition is a flashing green, and FAIL is a solid red. The third LED shows
exists in the board.
Diagnostics perform a high/low (hardware) limit check on the input signal and a
high/low system (software) limit check. The software limit check is adjustable in the
field. Open wire detection is provided for voltage inputs, and relay drivers and coil
currents are monitored.
Connectors JR1, JS1, and JT1, on TGEN have their own ID device that is interrogated by
VGEN. The ID device is a read-only chip coded with the terminal board serial number,
board type, revision number, and plug location.
Configuration
Configuration
PLU_Enab Enable PLU function Enable, disable
PLU_Del_Enab Enable PLU delay Enable, disable
MechPwrInput Mech. power through TMR (first 3 MA ccts), dual xducer TMR_1 through 3, dual 1 and 2,
(Max), single xducer, or signal space SMX_1, SMX_2, signal space
PLU_Rate Select PLU threshold rate 37.5
PLU_Unbal PLU Unbalance threshold % 20 to 80
PLU_Delay PLU delay, secs 0.5
Press Ratg Reheat press equiv. to 100% mechanical power 50 to 600
Current Ratg Generator current equivalent to 100% electrical power 1,000 to 60,000
EVA_Enab Enable EVA function Enable, disable
EVA_ExtEnab Enable external EVA function Enable, disable
EVA_Rate Select EVA threshold rate LO, ME, HI
EVA_Unbal EVA unbalance threshold % 20 to 80
EVA_Delay EVA drop out time, seconds 0 to 10
MW_Ratg Generator MW equivalent to 100 % electrical power 10 to 1,500
IVT_Enab Enable IVT function Enable, disable
Min_MA_Input Minimum MA for healthy 4-20 mA input 0 to 21
MAx_MA_Input Maximum MA for healthy 4-20 mA input 0 to 21
SystemFreq System frequency in Hz 50 or 60
J3:IS200TGENH1A Connected, Not Connected
AnalogIn1 First analog input (of four) - board point Point edit (input FLOAT)
Input type Type of analog input Unused, 4-20 ma, 5 V, 10 V
Low input Input MA at low value -10 to 20
Low value Input value in engineering units at low MA (configuration -3.4028e+038 to 3.4028e+038
inputs the same as for TBAI)
System limits Standard System Limits (see TBAI configuration)

GenPT_Vab_KV Generator potential transformer input "ab", (first of 3) - Point edit (input FLOAT)
board point
PT_Input PT input in KV rms for PT_output 1 to 1,000
PT_Output PT output in V rms for PT_Input-typically 115 60 to 150
Phase Shift Compensating phase shift, applied to PT signals Zero, plus 30, plus 60, minus
30, minus 60
System limits Standard system limits (similar to analog Inputs)
BusPT_Vab_KV Bus potential transformer input "ab", (first of three) Point edit (input FLOAT)
configuration similar to GenPT - board point
GenCT_A Generator current transformer A (first of three) - board point Point edit (input FLOAT)
CT_Input CT input in amperes rms for rated CT_Output 100 to 50,000
CT_Output Rated CT output in amperes rms, typically 5 1 to 5
System Limits Standard system limits (similar to genPT)
J4:IS200TRLYH1A Connected, not connected
Relay01_Tst Fast acting solenoid #1 test, first of 12 relays - board point Point edit (output BIT)
Relay Output FAS valve type Unused, CV, tst only, CV EVA
RelayDropTime Relay dropout time 0 to 5
Board Points Signals Description Point Edit (Enter Signal Name) Direction Type
L3DIAG_VGEN1 Board diagnostic Input BIT
SysLim1Anal1 System limit 1 exceeded on analog cct #1 Input BIT
: : Input Input
SysLim1Anal4 System limit 1 exceeded on Analog cct #4 Input Input
SysLim2Anal1 System limit 2 exceeded on Analog cct #1 Input BIT
: : Input BIT
SysLim2Anal4 System limit 2 exceeded on analog cct #4 Input BIT
SysL1GenPTab System limit 1 exceeded on gen PT, Vab Input BIT
SysL1GenPTbc System limit 1 exceeded on gen PT, Vbc Input BIT
SysL1GenPTca System limit 1 exceeded on gen PT, Vca Input BIT
SysL1BusPTab System limit 1 exceeded on bus PT, Vab Input BIT
SysL1BusPTbc System limit 1 exceeded on bus PT, Vbc Input BIT
SysL1BusPTca System limit 1 exceeded on bus PT, Vca Input BIT
SysL2GenPTab System limit 2 exceeded on gen PT, Vab Input BIT
SysL2GenPTbc System limit 2 exceeded on gen PT, Vbc Input BIT
SysL2GenPTca System limit 2 exceeded on gen PT, Vca Input BIT
SysL2BusPTab System limit 2 exceeded on bus PT, Vab Input BIT
SysL2BusPTbc System limit 2 exceeded on bus PT, Vbc Input BIT
SysL2BusPTca System limit 2 exceeded on bus PT, Vca Input BIT
SysL1GenCTa System limit 1 exceeded on gen CT, phase A Input BIT
SysL1GenCTb System limit 1 exceeded on gen CT, phase B Input BIT
SysL1GenCTc System limit 1 exceeded on gen CT, phase C Input BIT
SysL2GenCTa System limit 2 exceeded on gen CT, phase A Input BIT
SysL2GenCTb System limit 2 exceeded on gen CT, phase B Input BIT
SysL2GenCTc System limit 2 exceeded on gen CT, phase C Input BIT
Relay01_Fdbk Status of relay 01 Input BIT
: : Input BIT
Relay12_Fdbk Status of relay 12 Input BIT
L10PLU_EVT Power load unbalance event Input BIT
L10EVA_EVA Early valve actuation event Input BIT
GenMW Generator MWatts Input FLOAT
GenMVAR Generator MVars Input FLOAT
GenMVA Generator MVA Input FLOAT
GenPF Generator power factor, 0/1/0 Input FLOAT
BusFreq Bus frequency, Hz Input FLOAT
PLU_Tst Power load unbalance test Output BIT
EVA_Tst Early valve actuation test Output BIT
IV_Trgr Intercept valve trigger command Output BIT
EVA_ExtCmd Early valve actuation external command Output BIT
EVA_ExtPrm Early valve actuation external permissive Output BIT
TN_Hz PLL center frequency, Hz Output FLOAT
MechPower Mechanical power, percent, when configured through signal space Output FLOAT
AnalogIn1 Analog input 1 Input FLOAT
: : Input FLOAT
AnalogIn4 Analog input 4 Input FLOAT
GenPT_Vab_KV Kilovolts rms Input FLOAT
GenPT_Vbc_KV Kilovolts rms Input FLOAT
GenPT_Vca_KV Kilovolts rms Input FLOAT
BusPT_Vab_KV Kilovolts rms Input FLOAT
BusPT_Vbc_KV Kilovolts rms Input FLOAT
BusPT_Vca_KV Kilovolts rms Input FLOAT
GenCT_A Generator Amperes RMS, phase A Input FLOAT
GenCT_B Generator amperes rms, phase B, same configuration as phase A Input FLOAT
GenCT_C Generator amperes rms, phase C, same configuration as phase A Input FLOAT
Relay01_Tst Fast acting solenoid #1 test Output BIT
: : Output BIT

Relay12_Tst Fast acting solenoid #12 test Output BIT
Alarms
go online)
3 CRC failure override is Active Board firmware programming error (board is allowed
to go online)
30 ConfigCompatCode mismatch; Firmware: #; Tre: A tre file has been installed that is incompatible with
32-43 Relay Driver # does not Match Requested State. The relay terminal board may not exist and the relay
There is a mismatch between the relay driver is configured a used, or there may be a faulty relay
command and the state of the output to the relay driver circuit or drive sensors on VGEN.
as sensed by VGEN
44-55 Relay Output Coil # does not Match Requested Relay is defective, or the connector cable J4 to the
State. There is a mismatch between the relay driver relay terminal board J1 is disconnected, or the relay
command and the state of the current sensed on terminal board does not exist.
the relay coil on the relay terminal board
56-59 Analog Input # Unhealthy. Analog Input 4-20 mA ## Analog input is too large, TGEN jumper (JP1,
has exceeded the A/D converter's limits JP3, JP5, JP7) is in the wrong position, signal
conditioning circuit on TGEN is defective, multiplexer
or A/D converter circuit on VGEN is defective.
60-65 Fuse # and/or # Blown. The fuse monitor requires One or both of the listed fuses is blown, or there is
the jumpers to be set and to drive a load, or it will a loss of power on TB3, or the terminal board does
not respond correctly not exist, or the jumpers are not set.
66-69 Analog 4-20 mA Auto Calibration Faulty. One of the 3 Volt or 9 Volt precision reference or null reference
analog 4-20 mA auto calibration signals has failed. on VGEN is defective, or multiplexer or A/D
Auto calibration or 4-20 mA inputs are invalid converter circuit on VGEN is defective.
70-73 PT Auto Calibration Faulty. One of the PT auto Precision reference voltage or null reference is
calibration signals has gone bad. Auto calibration of defective on VGEN, or multiplexer or A/D converter
PT input signals is invalid, PT inputs are invalid circuit on VGEN is defective.

74-79 CT Auto Calibration Faulty. One of the CT auto Precision reference voltage or null reference is
calibration signals has gone bad. Auto calibration of defective on VGEN, or multiplexer or A/D converter
CT input signals is invalid, CT inputs are invalid circuit on VGEN is defective.
96-223 Logic Signal # Voting mismatch. The identified A problem with the input. This could be the device,
or the cable.
224-241 Input Signal # Voting mismatch, Local #, Voted #. A problem with the input. This could be the device,
The specified input signal varies from the voted the wire to the terminal board, the terminal board,
value of the signal by more than the TMR Diff Limit or the cable.
TGEN Generator Monitor
The Generator Monitor (TGEN) terminal board works with the VGEN processor to
monitor the generator three-phase voltage and currents, and calculate three-phase power
and power factor. For large steam turbine applications, VGEN provides the PLU and
EVA functions, using fast acting solenoids located on the TRLY terminal board.
In the Mark* VI system, the TGEN works with the VGEN processor and supports
simplex and TMR applications. One TGEN connects to the VGEN with a single cable.
In TMR systems, TGEN connects to three VGEN boards with three separate cables.
TGEN Terminal Board VGEN VME Board
TB1 x
x
x 37-pin "D" shell
JT1 type connectors
x 2
x 1 RUN
x 4 x 3 with latching FAIL
Current x 6
x 5
fasteners
STAT
inputs & x 8 x 7
x 10
x 9
gen PT x 11
x 12
signals x 14
x 13
x 16 x 15
x 18
x 17 Cable to VME
x 20 x 19 JS1 rack T
x 22
x 21
x 24 x 23
VME bus to VCMI
x
TB2
Cable to VME
rack S
Gen CT TB3 JR1
signals
VGEN
x
TB4
Connectors on J3
VME rack R
x
Cable to VME
Shield bar rack R
J4
Cable to optional TRLY,

for fast acting solenoids
Generator Terminal Board, Processor Board, and Cabling

Installation
Connect the wires for the analog current and PT inputs to TB1. Connect the wires for
the CT inputs to special terminal blocks TB2, TB3, and TB4. The blocks cannot be
unplugged, protecting against an open CT circuit. Use jumpers J#A and J#B to select the
input as a current or voltage input on analog inputs 1 through 4.
Generator Terminal Board TGEN

Analog Input Jumpers JT1
20ma VDC RET OPEN
TB1
x
JP1A JP1B
20 mA (1) x 2
x 1 P24V (1)
RET (1) x 4
x 3 VDC (1)
x 5 P24V (2) JP2A JP2B
20mA (2) x 6
x 7 VDC (2)
RET (2) x 8
x 9 P24V (3)
20mA (3) x 10 JP3A JP3B
x 11 VDC (3)
RET (3) x 12
x 13 P24V (4)
20mA (4) x 14
x 15 VDC (4) JS1
RET (4) x 16 JP4A JP4B
x 17 PCOM
PCOM x 18
x 19 GenA
GenB x 20
x 21 GenC
BusA x 22
24
x 23 BusB
BusC x
x
CurAH1 1
CurAH2 2
CurAL1 TB2
3 JR1
CurAL2 4
CurBH1 1
CurBH2 2
TB3
CurBL1 3
CurBL2 4
CurCH1 1
CurCH2 2 Test points
TB4
CurCL1 3
CurCL2 4
Terminal block 1 can be

unplugged from terminal
board for maintenance. TB2,
TB3, TB4 are not pluggable.
TGEN Terminal Board and Wiring
Operation
Test points are provided for all VGEN monitors two, three-phase PT inputs, and three, one-phase current transformer
PT and CT inputs to verify the CT inputs from TGEN. Using jumpers, four analog inputs can be configured for 4-20
phase in the field. mA or 5, 10 V dc.
Test points on the generator and bus voltages and currents are used to check the phase
of the input signals. VGEN performs signal conversions and power, power factor, and
frequency calculations.
<R>
<S>
<T>
Terminal Board TGEN Controller
Analog inputs 4 circuits per terminal board
Noise
TB1 suppression.
01 P28VV P28V, R Generator
+24 Vdc Current Limit
S
Board
03 Vdc JP1A VGEN
+/-5,10 Vdc T
02 20 ma
4-20 ma
250 ohms
04
Return
JP1B 115 V rms yields Shown
Open Return 1.5333 V rms, for <R>
gen & bus JR1 J3 +28 Vdc
PCOM
17
TB1
18 PCOM Test Points A/D
A 19 TP1
Generator To TRLY
TP2 ID from
3-phase B 20
<R>
volts JS1 J3
C 21
TP3 Buffer <S>
(115 Vac) <T>
A 22
TP4
Bus Same
3-phase B 23
TP5 for <S>
volts ID
C 24
TP6
(115 Vac)
JT1 J3
TB2 TP8
H1 01 1:2000
phase A TP7 0.01%
Same
L1 03 for <T>
(115 Vac)
L2 04
TB3 TP10 ID
H1 01 1:2000

phase B L1 03
TP9 0.01%
(115 Vac) L2 04 Connectors at bottom
TB4 H1 01 1:2000
TP12 of VME racks
TP11 0.01% 5 A input yields
phase C L1 03
(115 Vac) L2 04 0.25 V rms (line-neutral) or
Noise suppression 0.433 V rms (line-line)
TB4

Three single-phase CT inputs are provided with a normal current range of 0 to 5
A continuous. The CTs are magnetically isolated on TGEN. The CTs connect to
non-pluggable terminal blocks with captive lugs accepting are up to #10 AWG wires.
The four analog inputs accept 4-20 mA inputs or 5, 10 V dc inputs. A +24 V dc source
is available for all four circuits with individual current limits for each circuit. The 4-20
mA transducer can use the +24 V dc source from the turbine control or a self-powered
source.
Specifications
Item Specification
Inputs to TGEN and VGEN 2 three-phase generator and bus PTs
3 one-phase generator CTs
4 analog inputs (4-20 mA, 5, 10 V dc)
Generator and bus voltages Nominal 115 V rms with range of interest of 10 to 120%
Magnetic isolation to 1,500 V rms and loading less than 3 VA
Input loading less than 3 VA per circuit
Generator current inputs Normal current range is 0 to 5 A with over-range to 10 A
Magnetic isolation to 1,500 V rms
Input burden less than 0.5 per circuit
Analog inputs Current inputs: 4-20 mA
inputs: 5 V dc or 10 V dc
Transducers can be up to 300 m (984 ft) from the control cabinet with a two-way cable
resistance of 15 .
Input burden resistor on TGEN is 250 .
Jumper selection of single ended or self powered inputs
Jumper selection of voltage or current inputs
Diagnostics
Diagnostics perform a high/low (hardware) limit check on the input signal and a
high/low system (software) limit check. The software limit check is adjustable in the
field. Open wire detection is provided for voltage inputs, and relay drivers and coil
currents are monitored.
Connectors JR1, JS1, and JT1 on TGEN have their own ID device that is interrogated by
VGEN. The ID device is a read-only chip coded with the terminal board serial number,
board type, revision number, and plug location.
Configuration
Configuration of the terminal board is by means of jumpers. For location of these
jumpers refer to the installation diagram. The jumper choices are as follows:
Jumpers J1A through J4A select either current input or voltage input
left open
The following diagrams illustrate connections for common analog inputs.

TRLYH1B Relay Output with Coil Sensing
The Relay Output with coil sensing (TRLYH1B) terminal board holds 12 plug-in
magnetic relays. The first six relay circuits configured by jumpers for either dry, Form-C
contact outputs, or to drive external solenoids. A standard 125 V dc or 115/230 V
ac source, or an optional 24 V dc source with individual jumper selectable fuses and
on-board suppression, can be provided for field solenoid power. The next five relays
(7-11) are unpowered isolated Form-C contacts. Output 12 is an isolated Form-C contact,
used for special applications such as ignition transformers.
Mark VI Systems
In Mark* VI systems, TRLY is controlled by the VCCC, VCRC, or VGEN board and
Mark VIe Systems
Solenoid
power
TB3 X
x JT1
x 2
x 1
JF1JF2
x 4
x 3
x 6
x 5
x 8
x 7
x 10
x 9
x 12
x 11
x 14
x 13
x 16
x 18
x 17
x 20
x 19 JS1
x 21 Plug inPDOA I/O Pack(s)
x 24
x 23
x
or
x
x 26
x 25 Output Cables to VCCC/VCRC or VGEN
28
x 27 boards for Mark VI system
x
x 29
Relays
x 30
x 32
x 33 JA1 JR1 depends on the level of
x 34
x 36
x 38
x 37
x 40
x 39
x 42
x 41
x 44
x 43
x 46
x 45
x 48
x 47
x x

TRLYH1B Relay Output Terminal Board

Installation
terminal board as shown in the figure, TRLYH1B Terminal Board Wiring. Each block is
shield terminal strip attached to chassis ground is located on to the left side of each
terminal block.
Connect the solenoid power for outputs 1-6 to JF1. JF2 can be used to daisy chain power
to other TRLYs. Alternatively, power can be wired directly to TB3 when JF1/JF2 are not
used. Connect power for the special solenoid, Output 12, to connector JG1.
These jumpers are also for Jumpers JP1-JP6 are removed in the factory and shipped in a plastic bag. Re-install
isolation of the monitor circuit the appropriate jumper if power to a field solenoid is required. Conduct individual
when used on isolated contact loop energization checks as per standard practices and install the jumpers as required.
applications. For isolated contact applications, remove the fuses to ensure that suppression leakage
is removed from the power bus.
Alternate customer power wiring N125/24 V dc Power

Terminal 1 - Pos source
Terminal 2 - Neg P125/24 V dc
TB3 JF1 JF2

TRLYH1B
3 3
x
Output 01 (COM) x 2
Output 01 (SOL) x 4
x 7 Output 02 (NO)
Output 02 (SOL) x 8 FU2 Out 02 FU8 To
Powered, Output 03 (COM) x 10 connectors
Output 03 (SOL)
x 11 Output 03 (NO) - +
fused x 12 JA1, JR1,
Output 04 (COM) 14
solenoids x
JS1, JT1
Output 04 (SOL) 16
x 15 Output 04 (NO) - +
form-C x
x 18 JP4
x 20 - +
x 22
x - +
FU6 Out 06 FU12 JP6
Fuses Fuses Jumper
Neg,return Pos, High choices:
x
power (JPx)
x 26 or dry
x 27 Output 07 (NO)
x 28 contact (dry)
Dry Output 08 (COM) x 30
x 29 Output 08 (NC)
contacts x 31 Output 08 (NO) To connectors JA1, JR1, JS1, JT1
x 32
form-C Output 09 (COM) x 33 Output 09 (NC)
x 34
x 36
x 35 Output 09 (NO)
Output 10 (COM) x 37 Output 10 (NC) Power to special circuit 12
x 38
x 40
x 39 Output 10 (NO)
JG1 1 Customer power
x 41 Output 11 (NC)
Special x 43 Output 11 (NO) 2
x 44
circuit, Output 12 (COM) x 45 Output 12 (NC)
x 46 3 Customer return
form-C, Output 12 (SOL)
x 47 Output 12 (NO)
x 48
ign. xfmr. x 4
JF1, JF2, and JG1 are power plugs
TRLYH1B Terminal Board Wiring
Operation
Relay drivers, fuses, and jumpers are mounted on the TRLYH1B. For simplex operation,
D-type connectors carry control signals and monitor feedback voltages between the
I/O processors and TRLY through JA1.
one minute. The typical time to operate is 10 ms. Relays 1-6 have a 250 V metal oxide
varistor (MOV) for transient suppression between normally open (NO) and the power
return terminals. The relay outputs have a failsafe feature that vote to de-energize the
corresponding relay when a cable is unplugged or communication with the associated
I/O processor is lost.
Output 01
Relay Terminal Board - TRLYH1B
NC 1
Alternate Dry K1
TB3
1 P125/24 V dc
24 V dc or
125 V dc or 2 JP1
115 V ac or 3 NO 3
230 V ac 4 +
K1 K1 Field
FU1 Solenoid
JF1 1 N125/24 Vdc Sol 4 -
Normal Power
Source,pluggable 3.15 Amp "6" of the above circuits
3
(7 Amp) slow-blow
JF2 Output 07
1
Power NC
3 Monitor
K7
>60 Vac
JA1 Com Dry
26
Contact,
Monitor Select
Form-C
NO
K7 K7 27
R
"5" of these circuits
I/O
Processor JR1
P28V
Relay Coil K#
Driver
Relay ID
Output JS1 RD
Output 12
Monitor
>14 Vdc NC
ID >60 Vac
K12 45
JT1
"12" of the above circuits
Com Special
46 Circuit
NO
ID 47
K12 K12
Available for JG1
GT Ignition Transformers 1 Sol
(6 Amp at 115 Vac
3 "1" of these circuits 48
3 Amp at 230 Vac)
TRLYH1B Circuits, Simplex System

For TMR applications, relay control signals are fanned into TRLY from the three I/O
processors R, S, and T through plugs JR1, JS1, and JT1. These signals are voted and
the result controls the corresponding relay driver. Power for the relay coils comes from
all three I/O processors and is diode-shared. The following figure shows a TRLYH1B
in a TMR system.
Relay Terminal Board - TRLYH1B Output 01

NC 1
Alternate Dry K1
TB3
power, 20 A 1 P125/24 V dc FU7 Com 2
24 V dc or
2 JP1
125 V dc or
3 NO 3
115 V ac or
230 V ac 4 +
K1 K1 Field
FU1 solenoid
JF1 1 N125/24 V dc Sol 4 -
Normal power
source,pluggable 3.15 Amp 6 of the above circuits
3 slow-blow
(7 Amp)
JF2 Output 07
Power 1
NC
daisy-chain 3 Monitor
>14 V dc K7 25
>60 V ac
JA1 Com Dry
26 contact,
Monitor Select
form-C
R NO
I/O K7 K7 27
Processor 5 of these circuits
Relay JR1
P28V
Control
Relay
Coil K#
Driver
ID
RD
JS1
To S I/O Processor Output 12

Monitor
>14 V dc NC
ID >60 V ac
K12 45
JT1
12 of the above circuits Com Special
To T I/O Processor 46 circuit
NO
ID 47
K12 K12
Available for JG1
GT ignition transformers 1 Sol
(6 Amp at 115 V ac 3 1 of these circuits 48
3 Amp at 230 V ac)
TRLYH1B Circuits, TMR System
Specifications
Item Specifications
TRLY board 6 relays with optional solenoid driver voltages
b: Nominal 115/230 V ac
Maximum inrush current 10 A
Fault detection Loss of relay solenoid excitation current
Physical

Diagnostics
L3DIAG_xxxx occurs.
Configuration
Refer to figure, TRLYH1C Board adjustments are made as follows:
Terminal Board Wiring for
more information.
supply relay output 1.
TRLYH1F Relay Output with TMR Contact Voting
TRLYH1F and H2F do not The Relay Output with TMR contact voting (TRLYH1F) terminal board provides 12
support simplex arrangements contact-voted relay outputs. The board holds 12 sealed relays in each TMR section, for
a total of 36 relays. The relay contacts from R, S, and T are combined to form a voted
Form A (NO) contact. 24/125 V dc or 115 V ac can be applied.
TRLYH1F does not have power distribution. However, an optional power distribution
board, IS200WPDFH1A, can be added so that a standard 125 V dc or 115 V ac source,
or an optional 24 V dc source with individual fuses, can be provided for field solenoid
power. IS200WPDFH2A provides a single fuse in the high side (pin 1 of J1J4) of
each power distribution circuit for AC applications where a fuse in neutral return weire
(pin 3 of J1J4) is not desirable.
TRLYH2F is same as TRLYH1F except that the voted contacts form a Form B (NC)
output. Both boards can be used in Class 1 Division 2 applications.
Mark VI Systems
In the Mark* VI system, the TRLY is controlled by the VCCC, VCRC, or VGEN board
and only supports TMR applications. Cables with molded plugs connect JR1, JS1, and
JT1 to the VME rack where the I/O boards are mounted.
Mark VIe Systems
In the Mark VIe system, the TRLY works with PDOA I/O pack and only supports TMR
applications. Three TMR PDOA packs plug into the JR1, JS1, and JT1 37-pin D-type
connectors on the terminal board.

TB1 J1 X
x JT1
x 2
x 1 DC-37 pin connector for I/O processor
x 4
x 3
x 5 K1R K1S K1T
x 6
x 8
x 7
x 10
x 9
x 11
x 12
x 13
x 14
x 15
x 16
x 18
x 17
x 20
x 19 JS1 J - Port Connections:
x 21 18 sealed relays
x 23 Plug in 3 PDOA I/O Packs
x 24
x for Mark VIe system
or
x
TB2
x 25
x 26 Cables to VCCC/VCRC or VGEN
x 27
x 28 18 sealed relays boards for Mark VI system
x 30
x 29
x 32
x 31
x 33
JR1
x 34
x 36
x 35
x 37
x 38
x 39
x 40
x 41
x 42
x 43
x 44 K12R K12S K12T
x 46
x 45
x 48
x 47
x
J2 X

Shield bar Barrier type terminal power distribution daughterboard
TRLYH1F Relay Output Terminal Board
Installation
Connect the wires for the 12 solenoids directly to two I/O terminal blocks on the terminal
board as shown in the following figure, TRLYH1F Terminal Board Wiring. Each block is
shield termination strip attached to chassis ground is located immediately to the left
side of each terminal block. Solenoid power for outputs 1-12 is available if the WPDF
daughterboard is used. Alternatively, power can be wired directly to the terminal block.
Relay Output Terminal Board TRLYH1F DC-64 pin connector for

optional power distribution
Wiring connections J1 daughterboard WPDF
JT1
x
x 1 POF1 DC-37 pin connector for I/O
K1b x 2
x 3 K1a K1R K1S K1T processor
PRF1 x 4
x 5 POF2
K2b x 6
x 7 K2a
PRF2 x 8
K3b x 10
x 9 POF3
PRF3 x 12
x 11 K3a
K4b x 14
x 13 POF4
x 15 K4a
PRF4 x 16
x 17 POF5
K5b x 18 J - Port Connections:
x 19 K5a JS1
PRF5 x 20
x 21 POF6 18 sealed relays Plug in three PDOA I/O Packs
K6b x 22
x 23 K6a for Mark VIe system
PRF6 x 24
x
or
Cables to VCCC/VCRC or VGEN

x
x 25 POF7 boards for Mark VI system
K7b x 26
x 27 K7a
PRF7 x 28 18 sealed relays
x 29 POF8
K8b x 30
x 31 K8a
PRF8 x 32
x 33 POF9 JR1
K9b x 34
PRF9 x 36
x 35 K9a
x 37 POF10
K10b x 38
PRF10
x 39 K10a
x 40
K11b x 42
x 41 POF11
PRF11 x 44
x 43 K11a
K12b
x 45 POF12
x 46 K12R K12S K12T
x 47 K12a
PRF12 x 48
x
J2
Signal Name Description, n=1...12
64-pin connector for optional
POFn Power Out Fused #n
PRFn Power Return Fused #n WPDF
Kna Resulting voted relay contact #n
Knb Resulting voted relay contact #n
TRLYH1F Terminal Board Wiring

Power Distribution Board
If using the optional WPDF power distribution board, mount it on top of TRLY on the
J1 and J2 connectors. Secure WPDF to TRLY by fastening a screw in the hole located
at the center of WPDF. Connect the power for the two sections of the board on the
three-pin connectors J1 and J4. Power can be daisy-chained out through the adjacent
plugs, J2 and J3.
3 1 3 1
J2 J1
Input power
Output power P1
daisy chain
FU1 FU13
into J1 on TRLY
FU6 FU18
Fasten WPDF to
TRLYH1F TRLY with screw
Board
FU19 FU7

into J2 on TRLY
FU24 FU12
Output power
daisy chain P2
Input power
J3 J4
3 1 3 1
WPDF Power Distribution Board
The solenoids must be wired as shown in the following figure. If WPDF is not used, the
customer must supply power to the solenoids.
TRLYH1F WPDF Daughter Board

Power Input,
J2 J1
section 1
Customer K1a 1 +
Solenoid PRF1 2
POF1 3 Vfb
K1b 4
5 +
6
Output #2 7 Vfb
8
P1
Wiring to Solenoid using WPDF

Operation
The 28 V dc power for the terminal board relay coils and logic comes from the three I/O
processors connected at JR1, JS1, and JT1. The same relays are used for ac voltages
and dc voltages, as specified in the Specifications section. H1F and H2F use the same
relays with differing circuits.
Relay drivers are mounted on the TRLYH1F and drive the relays at the frame rate. The
relay outputs have a failsafe feature that votes to de-energize the corresponding relay
when a cable is unplugged or communication with the associated I/O board or I/O pack
is lost
This board only supports TMR applications. The relay control signals are routed into
TRLY from the three I/O processors R, S, and T through plugs JR1, JS1, and JT1. These
signals directly control the corresponding relay driver for each TMR section R, S, and
T. Power for each sections relay coils comes in from its own I/O processor and is not
shared with the other sections.
TRLYH1F features TMR contact voting. The relay contacts from R, S, and T are
combined to form a voted Form A (NO) contact. 24/125 V dc or 115 V ac can be applied.
TRLYH2F is the same except that the voted contacts form a Form B (NC) output. The
following figure shows TMR voting contact circuit.
Contact voting circuit

Relay control
Driver feedback V R R S
Normally
S Open
V T R
contacts
V T S T
TRLYH1F Contact Arrangement for TMR Voting
Field Solenoid Power Option
The WPDFH1A daughterboard supplies power to TRLYH#F to power solenoids. WPDF
holds two power distribution circuits, which can be independently used for standard
125 V dc, 115 V ac, or 24 V dc sources. Each section consists of six fused branches
that provide power to TRLYH#F. Each branch has its own voltage monitor across its
secondary fuse pair. Each voltage detector is fanned to three independent open-collector
drivers for feedback to each of the I/O processors R, S, and T. IS200WPDFH2A provides
a single fuse in the high side (pin 1 of J1J4) of each power distribution circuit for AC
applications where a fuse in the neutral return wire (pin 3 of J1J4) is not desirable).
WPDF should not be used without TRLYH#F. Fused power flows through this board
down to the TRLY terminal board points. TRLY controls the fuse power feedback. The
following figure shows TRLYH1F/WPDF solenoid power circuit.
WPDF Daughterboard
daisy chain J2 J1
section 1
Fuse
1 +
2 Voltage sense
Output #1 Vfb
3 Fuse
4
5 +
6
Output #2 Vfb
7
8
P1
TRLYH1F 6 circuits
Terminal Board P2
Fuse
+
Voltage sense
Vfb
Fuse
+
Vfb
6 circuits
J3 J4 section 2
daisy chain
Solenoid Power Supply WPDF

The following table lists the relationship between fuses and terminals:
Terminal Name Fuse

1 POF1 FU1
4 PRF1 FU13
5 POF2 FU2
8 PRF2 FU14
9 POF3 FU3
12 PRF3 FU15
13 POF4 FU4
16 PRF4 FU16
17 POF5 FU5
20 PRF5 FU17
21 POF6 FU6
24 PRF6 FU18
25 POF7 FU7
28 PRF7 FU19
29 POF8 FU8
32 PRF8 FU20
33 POF9 FU9
36 PRF9 FU21
37 POF10 FU10
40 PRF10 FU22
41 POF11 FU11
44 PRF11 FU23
45 POF12 FU12
48 PRF12 FU24
Specifications
Item Specification
Number of output relay channels 12
Board types H1F: NO contacts
H2F: NC contacts
Rated voltage on relays a: Nominal 100/125 V dc or 24 V dc
b: Nominal 115 V ac
Maximum load current a: 0.5/0.3 A resistive for 100/125 V dc operation
b: 5.0 A resistive for 24 V dc operation
c: 5.0 A resistive for 115 V ac
Maximum response time on 25 ms
Fault detection Coil Voltage disagreement with command
Blown fuse indication (with WPDF power daughterboard)
Unplugged cable or loss of communication with I/O board; relays
de-energize if communication with associated I/O board is lost
Physical Size 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in)
Operating Temperature -30 to 65C (-22 to 149 F)
WPDF Solenoid Power Distribution Board
Number of Power Distribution Circuits (PDC) 2: each rated 10 A, nominal 115 V ac or 125 V dc.
Number of Fused Branches 12: six for each PDC
Fuse rating 3.15 A at 25C (77 F)
2.36 A is the recommended maximum usage at 65C (149 F)
Voltage monitor, maximum response delay 60 ms typical
Voltage monitor, minimum detection voltage 16 V dc
72 V ac
Voltage monitor, max current (leakage) 3 mA
Physical
Size - TRLY 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in)
Size - WPDF 10.16 cm wide x 33.02 cm high (4.0 in x 13.0 in)

Diagnostics
The voltage to each relay coil is monitored and checked against the command at the
frame rate. If there is no agreement for two consecutive checks, an alarm is latched.
The voltage across each solenoid power supply is monitored and if it goes below
16 V ac/dc, an alarm is created.
If any one of the outputs goes unhealthy a composite diagnostic alarm,
L3DIAG_xxxx occurs.
number, board type, revision number, and the JR1/JS1/JT1 connector location.
Details of the individual diagnostics are available from the configuration application.
The diagnostic signals can be individually latched, and then reset with the RESET_DIA
Turbine Protection Board (VPRO)
VPRO Emergency Turbine Protection
VPRO also has an Ethernet The Emergency Turbine Protection (VPRO) board and associated terminal boards
connection for IONet (TPRO and TREG) provide an independent emergency overspeed protection system. The
communications with the protection system consists of triple redundant VPRO boards in a module separate from
control modules. the turbine control system, controlling the trip solenoids through TREG. The figures
shows the cabling to VPRO from the TPRO and TREG terminal boards.
The VPRO board in the Protection Module provides the emergency trip function. Up
to three trip solenoids can be connected between the TREG and TRPG terminal boards.
TREG provides the positive side of the 125 V dc to the solenoids and TRPG provides the
negative side. Either board can trip the turbine. VPRO provides emergency overspeed
protection and the emergency stop functions. It controls the 12 relays on TREG, nine of
which form three groups of three to vote inputs controlling the three trip solenoids.
The original VPROH1A has been superseded by the functionally equivalent VPROH1B.
VPROH1A and VPROH1B supports a second TREG board driven from VPRO connector
J4. VPROH2B is a lower power version of VPRO that omits support for the second
TREG board. Applications using a second TREG board connected to J4 must use
VPROH1A or VPROH1B, not VPROH2B.
10-1 Turbine Protection Board (VPRO) GEH-6421Q Mark* VI Control

TPRO Terminal Board VPRO- R8
Ethernet
x IONet x x x
x
x 1 JZ1
x 2
x 4 x 3 I RUN
x 5 O FAIL
x 6 N STAT
x 8 x 7 E 8 X
x 10 x 9 T 4 Y
x 12 x 11 T 2 Z
x 14 x 13 R 1
x 15 C
x 16 JZ5
x 18 x 17 S
x 20 x 19 JY1 E
x 22 x 21 Cables to VPRO-T8 R J6
x 24 x 23
x J P5
COM
5
JY5 P28A
x P28B
x 26 x 25 E
x 28 x 27 T
x 30
x 29 H
x 32 x 31 R
x 33 JX1 Cables to VPRO-S8 J J
x 34 P
x 36 x 35 JX5 3 4 P
A
x 38 x 37
R O
x 40 x 39 A
x 41 W
x 42 F N L
x 44 x 43 E
x 45 VPRO
x 46 Cables to VPRO-R8 R
x 48
x 47 x x x
x
x
To TREG
Shield 37-pin "D" shell
Bar type connectors To Second TREG
with latching (optional)
BarrierType Terminal fasteners
VPRO Board, TPRO Terminal Board, and Cabling

The figure shows how the VTUR and VPRO processor boards share in the turbine
protection scheme. Either one can independently trip the turbine using the relays on
TRPG or TREG.
GEH-6421Q System Guide, Volume II Turbine Protection Board (VPRO) 10-2

VTUR Special speed cable
JR5 TTUR
JS5
JT5
J5
Two
JR1
xfrs
JS1
Optional 3 Relays
JT1
daughter- Gen Synch
board
335 V dc from <Q>
J3 J4 J5
JR1
TRPG
JS1
J3
JT1
To second
TRPG board 9 Relays
J4 J4 (optional) (3 x 3 PTR's)
J1
J2
125 VDC
Cable Trip Solenoids,

three circuits
J2 J1
JX1 TREG Trip signal to
TSVO TB's
JY1
VPRO
JZ1
J3
To second 12 Relays
J4 TREG Board
(9 ETR's,
(optional)
J5 3 econ. relays)
JH1
J6
P125 V dc from <PDM>
NEMA class F
Special speed cable

JX5 TPRO
JY5
J7
JZ5
JX1 2 transformers
JY1
125 VDC JZ1
Turbine Control and Protection Boards

Installation
It may be necessary to update To install the V-type board
the VPRO firmware to the latest
to GEH-6403 Control System 2. Slide in the board and push the top and bottom levers in with your hands to seat
Toolbox for a Mark VI Turbine its edge connectors
Controller. 3. Tighten the captive screws at the top and bottom of the front panel
Note Cable connections to the terminal boards are made at the J3, J4, J5, and J6
connectors on VPRO front panel. These are latching type connectors to secure the cables.
Connector J7 is for 125 V dc power. For details refer to the section on diagnostics in
this document.
Operation
The main purpose of the protection module is emergency overspeed (EOS) protection for
the turbine, using three VPRO boards. In addition, VPRO has backup synchronization
check protection, three analog current inputs, and nine thermocouple inputs, primarily
intended for exhaust over-temperature protection on gas turbines.
The protection module is always triple redundant with three completely separate and
independent VPRO boards named R8, S8, and T8 (originally named X, Y, and Z). Any
one of these boards can be powered down and replaced while the turbine is running
without jeopardizing the protection system. Each board contains its own I/O interface,
processor, power supply, and Ethernet communications (IONet) to the controller. The
communications allow initiation of test commands from the controller to the protection
module and the monitoring of EOS system diagnostics in the controller and on the
operator interface. Communications are resident on the VPRO board. The VPRO board
has a VME interface that allows programming and testing in a VME rack. However,
the backplane is neutralized when plugged into the protection module to eliminate any
continuity between the three independent sections.
Speed Control and Overspeed Protection
Speed control and overspeed protection is implemented with six passive, magnetic speed
pickups. The first three are monitored by the controllers, which use the median signal
for speed control and primary overspeed protection. The second three are separately
connected to the R8, S8, and T8 VPROs in the protection module. Provision is made for
nine passive magnetic speed pickups or active pulse rate transducers (TTL type) on the
TPRO terminal board with three being monitored by each of the R8, S8, and T8 VPROs.
Separate overspeed trip settings are programmed into the application software for the
primary and emergency overspeed trip limits, and a second emergency overspeed trip
limit must be programmed into the I/O configurator to confirm the emergency overspeed
(EOS) trip point.
The speed is calculated by counting passing teeth on the wheel and measuring the
time involved. Another protection feature is: after the turbine reaches a predetermined
steady-state speed, the rate of change of speed is continuously calculated and compared
with 100%/sec and transmitted to the controller to trip the unit if it is detected. This
steady-state speed limit is a tuning constant located in the controllers application
software. Another speed threshold which is monitored by the EOS system, is 10% speed.
This is transmitted to the controller to verify that there is no gross disagreement between
the first set of three speed pickups being monitored by the controller (for speed control

and the primary overspeed protection) and the second set of three speed pickups being
monitored by the EOS system.
Speed Difference Detection
There should never be a reason why the speed calculated by PPRO is significantly
different from the speed calculated by the main control. Speed difference detection
looks at the difference in magnitude between pulse rate 1 from both PPRO and the
main control. If the difference is greater than the set threshold for three successive
samples, a SpeedDifTrip is latched. If the main control recovers for 60 seconds, the trip
is removed. This allows the main control to recover with subsequent re-arming of the
backup protection.
Interface To Trip Solenoids
The trip system combines the Primary Trip Interface from the controller with the EOS
Trip Interface from the protection module. Three separate, triple redundant trip solenoids
(also called Electrical Trip Devices - ETDs) are used to interface with the hydraulics.
The ETDs are connected between the TRPG and TREG terminal boards. A separately
fused 125 V dc feeder is provided from the turbine control for each solenoid, which is
energized in the run mode and de-energized in the trip mode.
Backup Synch Check Protection
Backup synch check protection is provided in the Protection Module. The generator and
bus voltages are supplied from two, single phase, potential transformers (PTs) secondary
output supplying a nominal 115 V rms. The maximum cable length between the PTs
and the turbine control is 100 meters of 18 AWG twisted, shielded wire. Each PT is
magnetically isolated with a 1,500 V rms rated barrier and a circuit load less than 3 VA.
The synch algorithms are based on phase lock loop techniques. Phase error between the
generator and bus voltages is less than +/-1 degree at nominal voltage and 50/60 Hz. A
frequency range of 45 to 66 Hz is supported with the measured frequency within 0.05% of
the input frequency. The algorithm is illustrated under TTUR, generator synchronizing.
Each PT input is internally connected in parallel to the R8, S8, and T8 VPROs. The triple
redundant phase slip windows result in a voted logical output on the TREG terminal
board, which drives the K25A relay. This relays contacts are connected in series with
the synch permissive relay (K25P) and the auto synch relay (K25) to insure that no false
command is issued to close the generator breaker. Similarly, contacts from the K25A
contact are connected in series with the contacts from remote, manual synchronizing
equipment to insure no false commands.
Thermocouple and Analog Inputs
Thermocouple and analog inputs are available in the VPRO, primarily for gas turbine
applications. Nine thermocouple inputs are monitored with three connected to each
VPRO. These are generally used for backup exhaust over-temperature protection. Also,
one 5, 10 V dc, 4-20 mA (selectable) input, and two 4-20 mA inputs can be connected
to the TPRO terminal board, which feeds the inputs in parallel to the three VPROs.
Power Supply
Each VPRO board has its own on-board power supply. This generates 5 V dc and 28
V dc using 125 V dc supplied from the cabinet PDM. The entire protection module
therefore has three power supplies for high reliability
TREG is entirely controlled by VPRO, and the only connections to the control modules
are the J2 power cable and the trip solenoids. In simplex systems a third cable carries a
trip signal from J1 to the TSVO terminal board, providing a servo valve clamp function
upon turbine trip

Control of Trip Solenoids
The solenoid circuit has a Both TRPG and TREG control the trip solenoids so that either one can remove power
metal oxide varistor (MOV) for and actuate the hydraulics to close the steam or fuel valves. The three trip solenoids are
current suppression and a 10 supplied with 125 V dc through plug J2, and draw up to 1 A with a 0.1 second L/R time
, 70 W economizing resistor. constant. The nine trip relay coils on TREG are supplied with 28 V dc from VPRO
boards in R8, S8, and T8
A separately fused 125 V dc feeder is provided for the solenoids, which energize in the
run mode and de-energize in the trip mode. Diagnostics monitor each 125 V dc feeder
from the power distribution module at its point of entry on the terminal board to verify
the fuse integrity and the cable connection
Solenoid Trip Tests
Application software in the controller is used to initiate tests of the trip solenoids.
Online tests allow each of the trip solenoids to be manually tripped one at a time either
through the PTR relays from the controller or through the ETR relays from the protection
module. A contact from each solenoid circuit is wired back as a contact input to give
a positive indication that the solenoid has tripped. Primary and emergency offline
overspeed tests are provided too for verification of actual trips due to software simulated
trip overspeed conditions.

Terminal Board TPRO VPRO R8 VPRO S8 VPRO T8
1 Noise Suppression Protection Protection Protection
JX1
Gen. Volts
120 V ac NS
2
from PT
Noise Suppression
3 ID
Bus Volts
120 V ac JY1 J6 J6 J6
NS
from PT 4
To TTUR 1
Thermocouple Inputs CJ
13
TC1RH NS
14 Three TC ccts to R8 ID
TC1RL NS 1 Overspeed Overspeed Overspeed
19 CJ
TC1SH NS JZ1 Em Stop Em Stop Em Stop
20 Three TC ccts to S8 Sync Sync Sync
TC1SL NS 1 Check Check Check
25 CJ
TC1TH NS Overtemp Overtemp Overtemp
26 Three TC ccts to T8
TC1TL NS ID
P28VV
5
P28V,R8
P24V1 Current P28V,S8
Limiter P28V,T8 J5 J5 J5
7
V dc VDC
6 JPA1
20mA1 20 ma
250 ohms
To R8,S8,T8
8 J3
mAret J3 J3
One of the above ccts
Open Ret
JPB1
9 Current P28VV
P24V2 J4 J4 J4
Limiter
10
20 mA2
250
ohms To R8,S8,T8
Two of the above ccts
JX5
#1 MX1H 31 To TREG and
Filter
Emergency Clamp Trip Solenoids
Magnetic NS
MX1H 32 AC
Speed Coupling
Pickup 3 Circuits
ID
#2 MY1H 37 Filter
Emergency Clamp JY5
Magnetic NS
MY1L 38 AC
Speed Coupling
Pickup 3 Circuits
ID
#3 MZ1H 43 Filter
Emergency Clamp JZ5
Magnetic NS
MZ1L 44 AC
Speed Coupling
Pickup 3 Circuits ID
TMR VPROs and TPRO Terminal Board

Specifications
Item Specification
Number of Inputs 3 Passive speed pickups
1 Generator and 1 Bus Voltage
3 Thermocouples, 1 4-20 mA current or voltage
2 4-20 mA current
7 Trip interlocks
2 Emergency Stop
Number of Outputs 6 Trip Solenoids
6 Economizer relays
1 Breaker relay command, K25A on TTUR
1 Servo clamp relay contact, to TSVO boards
Power Supply Voltage Input supply 125 V dc (70-145 V dc)
Output 5 V dc and 28 V dc
Frame Rate Up to 100 Hz
MPU Characteristics Output resistance 200 with inductance of 85 mH.Output generates 150 V p-p into
60 K at the TPRO terminal block, with insufficient energy for a spark. The maximum
short circuit current is approximately 100 mA.
The system applies up to 400 normal mode load to the input signal to reduce the
voltage at the terminals.
MPU Cable Sensors can be up to 300 m (984 ft) from the cabinet, assuming that shielded pair
cable is used, with typical 70 nF single ended or 35 nF differential capacitance, and 15
resistance.
MPU Pulse Rate Range 2 Hz to 20 kHz
MPU Pulse Rate Accuracy 0.05% of reading; resolution is 15 bits at 100 Hz Noise of the acceleration measurement
is less than 50 Hz/sec for a 10,000 Hz signal being read at 10 ms.
MPU Input Circuit Sensitivity Minimum signal is 27 mV pk at 2 Hz
Minimum signal is 450 mV pk at 14 kHz
Generator and Bus Voltage Two Single-Phase Potential Transformers, 115 V rms secondary voltage accuracy is
Sensors 0.5% of rated Volts rms
Frequency Accuracy 0.05%
Phase Difference Measurement better than 1 degree.
Allowable voltage range for synchronizing is 75 to 130 V rms. Each input has a load
of less than 3 VA.
Thermocouple Inputs Same specifications as for VTCC board
Analog Inputs 2 current inputs, 4-20 mA
1 current input, with selection of 4-20 mA, or 5 V dc, or 10 V dc.
Same specifications as for VAIC board

Diagnostics
Three LEDs at the top of the VPRO front panel provide status information. The normal
RUN condition is a flashing green, FAIL is a solid red. The third LED is STATUS and
is normally off but shows a steady orange if a diagnostic alarm condition exists in the
board. VPRO makes diagnostic checks and creates faults as follows:
Trip relay driver and contact feedbacks
Solenoid voltage and solenoid voltage source
Economizer relay driver and contact feedbacks
K25A relay driver and coil
Servo clamp relay driver and contact feedback
High and low limits on all analog inputs
If any one of the above signals goes unhealthy, a composite diagnostic alarm
L3DIAG_VPROR, or S, or T occurs. The diagnostic signals can be individually
latched and then reset with the RESET_DIA signal if they go healthy.
Terminal board connectors on TPRO and TREG have their own ID device that is
interrogated by the I/O board. The ID device is a read-only chip coded with the terminal
board serial number, board type, revision number, and plug location. When the chip is
read by VPRO and a mismatch is encountered, a hardware incompatibility fault is created.

Configuration
Configuration
Turbine_Type Define the type of turbine from selection of ten types Two gas turbine, two LM,
two large steam, one
medium steam, one small
steam, two stag GT
LMTripZEnable On LM machine, when no PR on Z, enable vote for trip Enable, disable
OT_Trip_Enbl Enable overtemperature trip Enable, disable
OvrTemp_Trip Iso-thermal overtemperature trip setting for exhaust thermocouples in -60 to 2,000
degree F
TA_Trip_Enab1 Steam, enable trip anticipation on ETR1 (same for four ETRs) Enable, disable
ContWdogEn Enable trip on loss of control outputs to VPRO Enable, disable
SpeedDifEn Enable trip on speed difference between controller & VPRO Enable, disable
StaleSpdEn Enable trip on speed from controller freezing Enable, disable
DiagSolPwrA For TREL/TRES, sol power, BusA, diagnostic (same for three solenoids) Enable, disable
RatedRPM_TA Steam, rated RPM, used for trip anticipation calc 0 to 20,000
AccelCalType Select acceleration calculation type Slow, medium, fast
Auto Reset Automatic restoring of thermocouples removed from scan Enable, disable
OTBias_RampP Overtemperature bias ramp positive
OTBias_RampN Overtemperature bias ramp negative
Min_MA_Input Minimum MA for healthy 4/20 ma Input 0 to 21
Max_MA_Input Maximum MA for healthy 4/20 ma Input 0 to 21
OTBias_Dflt Overtemperature bias
OS_Diff Absolute speed difference, in percent, for trip threshold (if SpeedDifEn 0 to 10
enabled)
5J6:IS200TPRO
PulseRate1 First of three speed inputs - card point point edit (input FLOAT)
PRType Selects gearing (resolution) Unused, PR < 6000 Hz,
PR > 6000 Hz
PRScale Pulses per revolution (output RPM) 0 to 1,000
OS_Setpoint Overspeed trip setpoint in RPM 0 to 20,000
OS_Tst_Delta Offline overspeed test setpoint delta in RPM -2,000 to 2,000
Zero_Speed Zero speed for this shaft in RPM 0 to 20,000
Min_Speed Minimum speed for this shaft in RPM 0 to 20,000
Accel_Trip Enable acceleration trip Enable, disable
Acc_Setpoint Accelerate trip setpoint in RPM/second 0 to 20,000
TMR_DiffLimt Difference limit for voted pulse rate inputs in engineering units 0 to 20,000
BusPT_KVolts Kilo-Volts RMS, bus potential transformer - card point Point edit (input FLOAT)
PT_Input PT input in kilovolts rms for PT_Output 0 to 1,000

PT_Output PT output in volts rms for PT_Input typically 115 60 to 150
TMR_DiffLimt Difference limit for voted PT inputs in percent 0 to 100
GenPT_KVolts Kilo-Volts RMS, generator PT, configuration similar to Bus PT- card point Point edit (input FLOAT)
TC1R Thermocouple 1, for R module (first of R, S, and T) - card point Point edit (input FLOAT)
ThermCplType Select thermocouple type or mV input Unused, mV, T, K, J, E
Low Pass Filter Enable 2 Hz low pass filter Enable, disable
TC2R Thermocouple 2, for R module (first of R, S, and T) config as above - card Point edit (Input FLOAT)
point
TC3R Thermocouple 3, for R module (first of R, S, and T) config as above - card Point edit (Input FLOAT)
point
Cold Junction Cold junction for thermocouples 1-3 Point edit (Input FLOAT)
TMR_DiffLimt Difference limit for voted TMR cold junction inputs in Deg F -60 to 2,000
AnalogIn1 First of three analog inputs - card point Point Edit (Input FLOAT)
Input Type Type of analog input Unused, 4-20 mA, 10 V
Low_Input Input mA at low value -10 to 20
Low_Value Input value in engineering units at low value -3.402e +38 to 3.402e +38
High_Input Input mA at high value -10 to 20
High_Value Input value in engineering units at high mA -3.402e +38 to 3.402e +38
InputFilter Filter bandwidth in Hz Unused, 12 Hz, 6 Hz,
3Hz, 1.5 Hz, 0.75 Hz
Trip_Enable Enable trip for this mA input Enable, Disable
DiagHighEnab Enable high input limit diag Enable, Disable
DiagLowEnab Enable low input limit diag Enable, Disable
TripSetpoint Trip setpoint in engineering units -3.402e +38 to 3.402e +38
TripTimeDelay Time delay before tripping turbine after signal exceeds setpoint in seconds 0 to 10
TMR_DiffLimt Difference limit for voted TMR inputs in per cent of (High_Value-Low_Value) 0 to 100
J3:IS200TREG First TREG board Connected, not connected
KESTOP1_Fdbk1 Emergency Stop ESTOP1, inverse sense, K4 relay, True=Run - card point Point edit (input BIT)
DiagVoteEnab Enable voting disagreement diagnostic Enable, disable
Contact1 Trip interlock 1 (first of 7) - card point Point edit (Input BIT)
ContactInput Trip interlock 1 used Used, unused
SeqOfEvents Record contact transitions in sequence of events Enable, disable
TrpTimeDelay Time delay before tripping turbine after contact opens (sec) 0 to 10
TripMode Trip mode Direct, conditional, disable
K1_Fdbk Trip relay 1 feedback (first of 3) - card point Point edit (Input BIT)
RelayOutput Relay feedback used Used, unused
DiagSolEnab Enable solenoid voltage diagnostic Enable, disable

KE1_Fdbk Economizer relay for trip solenoid feedbk (first of 3) - card point Point edit (Input BIT)
RelayOutput Economizer relay feedback used Used, unused
K4CL_Fdbk Drive control valve servos closed, use only for steam turbine simplex Point edit (Input BIT)
- card Point
Relay Output Servo valve clamp used Used, unused
K25A_Fdbk Synchronizing check relay on TTUR - card point Point edit (Input BIT)
SynchCheck Synch check relay K25A used Used, unused
SystemFreq System frequency in Hz 50 or 60
ReferFreq Select generator frequency reference for PLL, standard PR input or from PR Std or Sg space
signal space
TurbRPM Rated load turbine RPM 0 to 20,000
VoltageDiff Maximum voltage difference in kV rms for synchronizing 0 to1,000
FreqDiff Maximum frequency difference in Hz for synchronizing 0 to 0.5
PhaseDiff Maximum phase difference in degrees for synchronizing 0 to 30
GenVoltage Minimum generator voltage in kV rms for synchronizing 1 to 1,000
BusVoltage Minimum bus voltage in kV rms for synchronizing 1 to 1,000
J4A:IS200TREG Second TREG board Connected, not con.
KESTOP2_Fdbk Emergency stop ESTOP2, inverse sense, K4 relay, True= run -card point Point edit (Input BIT)
K4_Fdbk Trip relay 4 feedback (first of 4,5,6) - card point Point edit (Input BIT)
KE4_Fdbk Economizing relay for trip solenoid 4 (first of 4,5,6) - card point Point edit (Input BIT)
Card Points(Signals) DescriptionPoint Edit (Enter Signal Connection) Direction Type

L3DIAG-VPROR Card Diagnostic Input BIT
L3DIAG-VPROS Card Diagnostic Input BIT
L3DIAG-VPROT Card Diagnostic Input BIT
PR1_Zero L14HP_ZE Input BIT
PR2_Zero L14IP_ZE Input BIT
PR3_Zero L14LP_ZE Input BIT
K1_FdbkNVR Non voted L4ETR1_FB, Trip Relay 1 Feedback R Input BIT
K1_FdbkNVS Non voted L4ETS1_FB, Trip Relay 1 Feedback S Input Input
K1_FdbkNVT Non voted L4ETT1_FB, Trip Relay 1 Feedback T Input Input
: : : :
K6_FdbkNVR Non voted L4ETR6_FB, Trip Relay 6 Feedback R Input BIT
K6_FdbkNVS Non voted L4ETS6_FB, Trip Relay 6 Feedback S Input BIT
K6_FdbkNVT Non voted L4ETT6_FB, Trip Relay 6 Feedback T Input BIT
OS1_Trip L12HP_TP Input BIT

OS2_Trip L12IP_TP Input BIT
OS3_Trip L12LP_TP Input BIT
Dec1_Trip L12HP_DEC Input BIT
Dec2_Trip L12IP_DEC Input BIT
Dec3_Trip L12LP_DEC Input BIT
Acc1_Trip L12HP_ACC Input BIT
Acc2_Trip L12IP_ACC Input BIT
Acc3_Trip L12LP_ACC Input BIT
TA_Trip Trip Anticipate Trip L12TA_TP Input BIT
TA_StpLoss L30TA Input BIT
OT_Trip L26TRP Input BIT
MA1_Trip L3MA_TRP1 Input BIT
SOL1_Vfdbk When TREG used, Trip Solenoid 1 Voltage detected status Input BIT
: : Input BIT
SOL6_Vfdbk When TREG used, Trip Solenoid 6 Voltage detected status Input BIT
L25A_Cmd L25A Breaker Close Pulse Input BIT
Cont1_TrEnab Config_Contact 1 Trip Enabled Input BIT
: : Input BIT
Cont7_TrEnab Config -contact 7 trip enabled Input BIT
Acc1_TrEnab Config- accel 1 trip enabled Input BIT
OT_TrEnab Config overtemp trip enabled Input BIT
GT_1Shaft Config gas turb, 1 shaft enabled Input BIT
GT_2Shaft Config gas turb, 2 shaft enabled Input BIT
LM_2Shaft Config LM turb, 2 shaft enabled Input BIT
LM_3Shaft Config LM turb, 3 shaft enabled Input BIT
LargeSteam Config Large steam 1, enabled Input BIT
MediumSteam Config medium steam, enabled Input BIT
SmallSteam Config small steam, enabled Input BIT
STag_GT_1S Config - stag 1 shaft, enabled Input BIT
STag_GT_2S Config - stag 2 shaft, enabled Input BIT
ETR1_Enab Config - ETR1 relay enabled Input BIT
: : : :
ETR6_Enab Config - ETR6 relay enabled Input BIT
KE1_Enab Config - economizing relay 1 enabled Input BIT

K4CL_Enab Config - servo clamp relay enabled Input BIT
K25A_Enab Config - sync check relay enabled Input BIT
L5CFG1_Trip HP config Trip Input BIT
L5CFG2_Trip IP config Trip Input BIT
L5CFG3_Trip LP config Trip Input BIT
OS1_SP_CfgEr HP overspeed setpoint config mismatch error Input
OS2_SP_CfgEr IP overspeed setpoint config mismatch error Input BIT
OS3_SP_CfgEr LP overspeed setpoint config mismatch error Input BIT
ComposTrip1 Composite trip 1 Input BIT
L5ESTOP1 ESTOP1 trip, TREG, J3 Input BIT
L5ESTOP2 ESTOP2 trip, TREG, J4 Input BIT
L5Cont1_Trip Contact1 trip Input BIT
: : Input BIT
L5Cont7_Trip Contact7 trip Input BIT
LPShaftLock LP shaft locked Input BIT
Inhbt1_Fdbk Trip inhibit signal feedback for contact 1 Input BIT
: : : :
Inhbt7_Fdbk Trip inhibit signal feedback for contact 7 Input BIT
L3SS_Comm Valid communications with VCMI status Input BIT
Trip1_EnCon Contact1 trip enabled conditional Input BIT
: : Input BIT
Trip7_EnCon Contact7 trip enabled conditional Input BIT
BusFreq Bus frequency SFL 2 Hz Input FLOAT
GenFreq Gen frequency SF 2 Hz Input FLOAT
GenVoltsDiff Gen - bus kV difference rms: gen low is negative Input FLOAT
GenFreqDiff Gen - bus slip Hz: gen slow is negative Input FLOAT
GenPhaseDiff Gen - bus phase difference degrees: gen lag is negative Input FLOAT
PR1_Accel HP accel in RPM/SEC Input FLOAT
PR2_Accel IP accel in RPM/SEC Input FLOAT
PR3_Accel LP accel in RPM/SEC Input FLOAT

PR1_Max HP max speed since last zero speed in RPM (see Vol 1 Chap Input FLOAT
8 overspeed protection)
PR2_Max IP max speed since last zero speed in RPM Input FLOAT
PR3_Max LP max speed since last zero speed in RPM Input FLOAT
OTSPBias Overtemperature setpoint bias Input FLOAT
OTSetpoint Overtemperature setpoint Input FLOAT
SynCk_Perm L25A_PERM sync check permissive Output BIT
SynCk_ByPass L25A_BYPASS sync check bypass Output BIT
Cross_Trip L4Z_XTRP control cross trip Output BIT
OnLineOS1Tst L97HP_TST1 on line HP overspeed test Output BIT
OnLineOS2Tst L97LP_TST1 on line HP overspeed test Output BIT
OnLineOS3Tst L97IP_TST1 on line LP overspeed test Output BIT
OffLineOS1Tst L97HP_TST2 offline HP overspeed test Output BIT
OffLineOS2Tst L97LP_TST2 offline IP overspeed test Output BIT
OffLineOS3Tst L97IP_TST2 offline LP overspeed test Output BIT
TrpAntcptTst L97A_TST trip anticipate test Output BIT
LokdRotorByp L97LR_BYP locked rotor bypass Output BIT
HPZeroSpdByp L97ZSC_BYP HP zero speed check bypass Output BIT
TestETR1 L97ETR1 ETR1 test, true denergizes relay Output BIT
: : Output BIT
TestETR4 L97ETR4 ETR4 Test, true denergizes relay Output BIT
PTR1 L20PTR1 primary trip relay CMD for diagnostic only Output BIT
: : Output BIT
PTR6 L20PTR6 primary trip relay CMD for diagnostic only Output BIT
PR_Max_Rst Max speed reset (see Vol 1 Chap 8 overspeed protection) Output BIT
OnLineOS1X Contact1 trip inhibit Output BIT
Trip1 Inhbt L43EOST_ONL online HP overspeed test with auto reset Output BIT
: : : :
Trip7 Inhbt Contact7 trip inhibit Output BIT
CJBackup Estimated TC cold junction temperature in Deg F Output FLOAT
OS1_Setpoint HP overspeed setpoint in RPM Output FLOAT
OS2_Setpoint IP overspeed setpoint in RPM Output FLOAT
OS3_Setpoint LP overspeed setpoint in RPM Output FLOAT
OS1_TATrpSp PR1 overspeed trip setpoint in RPM for trip anticipate Fn Output FLOAT
OTBias Overtemperature bias signal Output FLOAT
DriveFreq Drive (Gen) Freq (Hz), used for non standard drive config. Output FLOAT
Speed1 Shaft speed 1 in RPM Output FLOAT
ContWdog Controller watchdog counter Output LONG INT

Alarms
go online)
to go online)
415 Reserved for future use
16 System limit checking is disabled System checking was disabled by configuration.
22 J3A ID failure Failed ID chip on connector J3A, or cable problem
23 J4A ID failure Failed ID chip on connector J4A, or cable problem
24 Firmware/Hardware incompatibility Invalid terminal board connected to VME I/O board
25-29 Reserved for future use
30 ConfigCompatCode mismatch; firmware: #; Tre: A tre file has been installed that is incompatible with
31 IOCompatCode mismatch; firmware: #; Tre: # The A tre file has been installed that is incompatible with
32-38 Contact input # not responding to test mode trip Contact input circuit failure on VPRO or
interlock number # is not reliable TREG/TREL/TRES board.
39-40 Contact excitation voltage test failure contact Loss of P125 voltage caused by disconnection of
excitation voltage has failed, trip interlock monitoring JH1 to TREG/TREL/TRES, or disconnect of JX1,
voltage is lost JY1, JZ1 on TREG/TREL/TRES to J3 on VPRO.
41-43 Thermocouple ## raw counts high. The ## A condition such as stray voltage or noise caused
thermocouple input to the analog to digital converter the input to exceed +63 mV.
exceeded the converter limits and will be removed
from scan
44-46 Thermocouple ## raw counts low. The ## The board detected a thermocouple open and
thermocouple input to the analog to digital converter applied a bias to the circuit driving it to a large
exceeded the converter limits and will be removed negative number, or the TC is not connected, or a
from scan condition such as stray voltage or noise caused the
input to exceed -63 mV.
47 Cold junction raw counts high. Cold junction device The cold junction device on the terminal board has
input to the A/D converter has exceeded the limits of failed.
the converter. Normally two cold junction inputs are
averaged; if one is detected as bad then the other
is used. If both cold junctions fail, a predetermined
value is used

48 Cold junction raw counts low. Cold junction device The cold junction device on the terminal board has
input to the A/D converter has exceeded the limits failed.
of the converter
49 Calibration reference # raw counts high. Calibration The precision reference voltage on the board has
reference # input to the A/D converter exceeded the failed.
converter limits. If Cal. Ref. 1, all even numbered TC
inputs will be wrong; if Cal. Ref. 2, all odd numbered
TC inputs will be wrong
50 Calibration reference raw counts low. Calibration The precision reference voltage on the board has
reference input to the A/D converter exceeded the failed.
converter limits
51 Null reference raw counts high. The null (zero) The null reference voltage signal on the board has
reference input to the A/D converter has exceeded failed.
the converter limits
52 Null reference raw counts low. The null (zero) The null reference voltage signal on the board has
reference input to the A/D converter has exceeded failed.
the converter limits
53-55 Thermocouple ## linearization table high. The The thermocouple has been configured as the wrong
thermo-couple input has exceeded the range of type, or a stray voltage has biased the TC outside of
the linearization (lookup) table for this type. The its normal range, or the cold junction compensation
temperature will be set to the table's maximum value is wrong.
56-58 Thermocouple ## linearization table low. The The thermocouple has been configured as the wrong
thermo -couple input has exceeded the range of type, or a stray voltage has biased the TC outside of
the linearization (lookup) table for this type. The its normal range, or the cold junction compensation
temperature will be set to the table's minimum value is wrong.
59-61 Analog Input # unhealthy. The number # analog input The input has exceeded 4-20 mA range, or for input
to the A/D converter has exceeded the converter #1 if jumpered for 10 V, it has exceeded 10 V
limits range, or the 250 W burden resistor on TPRO has
failed.
63 P15=####.## volts is outside of limits. The P15 Analog 15 V power supply on VPRO board has
power supply is out of the specified +12.75 to +17.25 failed.
V operating limits
64 N15=####.## volts is outside of Limits. The N15 Analog 15 V power supply on VPRO board has
power supply is out of the specified 17.25 to 12.75 failed.
V operating limits
67 P28A=####.## Volts is Outside of Limits. The P28A The P28A power supply on VPWR board has failed,
power supply is out of the specified 23.8 to 31.0 V otherwise there may be a bad connection at J9, the
operating limits VPWR to VPRO interconnect.
68 P28B=####.## Volts is Outside of Limits. The P28B The P28B power supply on VPWR board has failed,
power supply is out of the specified 23.8 to 31.0 V otherwise there may be a bad connection at J9, the
operating limits VPWR to VPRO interconnect.
69-82 Relay driver feedback does not match the requested The relay driver or relay driver feedback monitor on
state. The state of the command to the relay does not the TREG/TREL/TRES terminal board has failed, or
match the state of the relay driver feedback signal; the cabling between VPRO and TREG/TREL/TRES
the relay cannot be reliably driven until corrected is incorrect.

69-71 Trip Relay (ETR) Driver # Mismatch requested State. See 69-82 above
Terminal Board 1
72-74 Econ Relay Driver # Mismatch Requested State. See 69-82 above
Terminal Board 1
75 Servo Clamp Relay Driver Mismatch (K4CL) See 69-82 above
Requested State.
76 K25A Relay (Synch Check) Driver Mismatch See 69-82 above
Requested State.
77-79 Trip Relay (ETR) Driver # Mismatch requested State. See 69-82 above
Terminal Board 2
80-82 Econ Relay Driver # Mismatch Requested State. See 69-82 above
Terminal Board 2
83-96 Relay contact feedback does not match the The relay contact or relay contact feedback
requested state. The state of the command to the monitor on the TREG/TREL/TRES terminal board
relay does not match the state of the relay contact has failed, or the cabling between VPRO and
feedback signal; the relay cannot be reliably driven TREG/TREL/TRES is incorrect.
until corrected
83-85 Trip Relay (ETR) Contact # Mismatch requested See 83-96 above
State. Terminal Board 1
86-88 Econ Relay Contact # Mismatch Requested State. See 83-96 above
Terminal Board 1
89 Servo Clamp Relay Driver Mismatch (K4CL) See 83-96 above
Requested State. Terminal Board 1
90 K25A Relay (Synch Check) Contact The K25A relay contact feedback on the
MismatchRequested State. Terminal Board TREG/TREL/TRES board has failed, or the K25A
1 relay on TTUR has failed, or the cabling between
VPRO and TTUR is incorrect. The state of the
command to the K25A relay does not match the
state of the K25A relay contact feedback signal;
cannot reliably drive the K25A relay until the problem
is corrected. The signal path is from VPRO to
TREG/TREL/TRES to TRPG/TRPL/TRPS to VTUR
to TTUR.
91-93 Trip Relay (ETR) Contact # Mismatch Requested See 83-96 above
State. Terminal Board 2
94-96 Econ Relay Contact # Mismatch Requested State. See 83-96 above
Terminal Board 2
97 TREG/TREL/TRES J3 Solenoid Power Source is The power detection monitor on the
Missing. The P125 V dc source for driving the trip TREG1/TREL1/TRES1 board has failed, or there is
solenoids is not detected; cannot reliably drive the a loss of P125 V dc through the J2 connector from
trip solenoids TRPG/TRPL/TRPS board, or the cabling between
VPRO and TREG1/TREL1/TRES1 or between
TREG1/TREL1/TRES1 and TRPG/TRPL/TRPS is
incorrect.

98 TREG/TREL/TRES J4 Solenoid Power Source is The power detection monitor on the
Missing. The P125 V dc source for driving the trip TREG2/TREL2/TRES2 board has failed, or there is
solenoids is not detected; cannot reliably drive the a loss of P125 V dc through the J2 connector from
trip solenoids K4-K6 TRPG/TRPL/TRPS board, or the cabling between
VPRO and TREG2/TREL2/TRES2 or between
TREG2/TREL2/TRES2 and TRPG/TRPS/TRPL is
incorrect. Also trip relays K4-K6 may be configured
when there is no TREG2/TREL2/TRES2 board.
99-104 TREG/TREL/TRES Solenoid Voltage # Mismatch The trip solenoid # voltage monitor on
Requested State. The state of the trip solenoid # TREG/TREL/TRES has failed or ETR # driver
does not match the command logic of the voted failed, or PTR # driver failed. There may be
ETR # on TREG/TREL/TRES, and the voted primary a loss of 125 V dc through the J2 connector
trip relay (PTR) # on TRPG/TRPL/TRPS, the ETR from TRPG/TRPL/TRPS, which has a separate
cannot be reliably driven until corrected diagnostic. See (105-107)
105 TREL/TRES, J3, Solenoid Power, Bus A, Absent. Loss of power bus A through J2 connector from
The voltage source for driving the solenoids is not TRPL/TRPS
detected on Bus A; cannot reliably drive these
solenoids
106 TREL/TRES, J3, Solenoid Power, Bus B, Absent. Loss of power bus B through J2 connector from
detected on Bus B; cannot reliably drive these
solenoids
107 TREL/TRES, J3, Solenoid Power, Bus C, Absent. Loss of Power Bus C through J2 connector from
detected on Bus C; cannot reliably drive these
solenoids
108 Control Watchdog Trip Protection Verify that the ContWdog is set up correctly in the
This alarm can only occur if Configuration -> toolbox and that the source of the signal is changing
ContWdogEn has been enabled. the value at least once a frame.
An alarm indicates that the signal space point ->
ContWdog has not changed for 5 consecutive Check Ethernet cable and connections.
frames. The alarm will reset itself if changes are
seen for 60 seconds.
109 Speed Difference Trip Protection Verify that the Speed1 signal is set up correctly in
This alarm can only occur if Configuration -> the toolbox and that the source of the signal reflects
SpeedDifEnable has been enabled. the VTUR pulse rate speed.
An alarm indicates that the difference between Check Ethernet cable and connections.
the output signal Internal Points -> Speed1 and
the first VPRO pulse rate speed is larger than the
percentage Configuration -> OS_DIFF for more than
3 consecutive frames. The alarm will reset itself if the
difference is within limits for 60 seconds.
110 Stale speed trip protection. Verify that the Speed1 signal is set up correctly in
This alarm can only occur if Configuration -> the toolbox and that the source of the signal reflects
StaleSpdEn has been enabled. An alarm indicates the VTUR pulse rate speed input.
that the signal Internal Points -> Speed1 has not
changed for 5 consecutive frames. The alarm will Check Ethernet cable and connections.
reset itself if the speed dithers for 60 seconds.

128-319 Logic Signal # Voting mismatch. The identified signal A problem with the input. This could be the device,
or the cable.
The specified input signal varies from the voted value the wire to the terminal board, the terminal board,
of the signal by more than the TMR Diff Limit or the cable.

TPROH1B Emergency Protection
The Emergency Protection (TPRO) terminal board provides the VPRO with speed
signals, temperature signals, generator voltage, and bus voltage as part of an independent
emergency overspeed and synchronization protection system. The protection system
consists of triple redundant VPRO boards in a module separate from the turbine control
system, controlling the trip solenoids through TREx (TREG, or TREL, or TRES). TPRO
supplies inputs to all three VPRO boards. The following figure shows the cabling to
VPRO from the TPRO and TREx terminal boards.
The VPRO board provides the emergency trip function. Up to three trip solenoids can be
connected between the TREx and TRPx (TRPG, or TRPL, or TRPS) terminal boards.
TREx provides the positive side of the 125 V dc to the solenoids and TRPx provides the
negative side. Either board can trip the turbine. VPRO provides emergency overspeed
protection and the emergency stop functions. It controls the 12 relays on TREG, nine of
which form three groups of three to vote inputs controlling the three trip solenoids. A
second TREG board may be driven from VPRO through J4.
Mark VI Systems
In the Mark VI system, the TPRO works with the VPRO processor and supports simplex
and TMR applications. In TMR systems, TPROH1B connects to three VPRO boards.
TPROH1B does not support I/O packs, see Mark VIe below.
Mark VIe Systems

For the Mark VIe system, a new design board, the TPROH#C, is used.
This document does not describe the TPROH#C. For details,

refer to GEI-100596 PPRO Emergency Turbine Protection
The following figure shows how the VTUR and VPRO boards share in a gas turbine
protection scheme. Both detect turbine overspeed, and either one can independently trip
the turbine using the relays on TRPG or TREG.

TPRO Terminal Board VPRO- R8
Ethernet
x IONet x x x
x
x 1 JZ1
x 2
x 4 x 3 I RUN
x 5 O FAIL
x 6 N STAT
x 8 x 7 E 8 X
x 10 x 9 T 4 Y
x 12 x 11 T 2 Z
x 14 x 13 R 1
x 15 C
x 16 JZ5
x 18 x 17 S
x 20
x 19 JY1 E
x 22 x 21 Cables to VPRO-T8 R J6
x 24 x 23
x J P5
COM
JY5 5 P28A
x P28B
x 26 x 25 E
x 28
x 27 T
x 30 x 29 H
x 32 x 31 R
x 33 JX1 Cables to VPRO-S8 J J
x 34 P
x 36 x 35 JX5 3 4 P
A
x 38 x 37
R O
x 40 x 39 A
x 41 W
x 42 F N L
x 44 x 43 E
x 45 VPRO
x 46 Cables to VPRO-R8 R
x 48
x 47 x x x
x
x
To TREG
Shield 37-pin "D" shell
Bar type connectors To Second TREG
with latching (optional)
BarrierType Terminal fasteners
TPRO Terminal Board, VPRO Board, and Cabling

VTUR Special speed cable
JR5 TTUR
JS5
JT5
J5
Two
JR1
xfrs
JS1
Optional 3 Relays
JT1
daughter- Gen Synch
board
335 V dc from <Q>
J3 J4 J5
JR1
TRPG
JS1
J3
JT1
To second
TRPG board 9 Relays
J4 J4 (optional) (3 x 3 PTR's)
J1
J2
125 VDC
Cable Trip Solenoids,

three circuits
J2 J1
TREG Trip signal to
JX1
TSVO TB's
JY1
VPRO
JZ1
J3
To second 12 Relays
J4 TREG Board
(9 ETR's,
(optional)
J5 3 econ. relays)
JH1
J6
P125 V dc from <PDM>
NEMA class F
Special speed cable

JX5 TPRO
JY5
J7
JZ5
JX1 2 transformers
JY1
125 VDC JZ1
Turbine Control and Protection Boards, Gas Turbine Control Example

Installation
The generator and bus potential transformers, analog inputs, and thermocouples are
wired to the first terminal block on TPRO. The magnetic speed pickups are wired to
the second block. Jumpers JP1A and JP1B are set to give either a 4-20 mA or voltage
input on the first of the three analog inputs.
The wiring connections are shown in the following figure. Two cables go to each of
the three VPRO boards.
Turbine Protection
JZ1
Terminal Board TPRO ma VOLTS
x JP1A
x 1 Gen (H) Gen
Gen (L) x 2
Bus (L) x 4
x 3 Bus (H) Volts OPEN RETURN
x 5 P24V1
20mA1 x 6
x 7 VDC
mAret x 8 Analog JP1B
x 9 P24V2
20mA2 x 10 Inputs
20mA3 x 12
x 11 P24V3
TC1R (L) x 14
x 13 TC1R (H)
15 To VPRO-T8
TC2R (L) x 16
x TC2R (H)
JZ5 JY1 J6
18
x 17 TC3R (H)
TC3R (L) x
20
x 19 TC1S (H)
TC1S (L) x
x 21 TC2S (H) Thermocouple
TC2S (L) x 22
24
x 23 TC3S (H) Inputs
TC3S (L) x
x
To J5
JY5
x
x 25 TC1T (H)
TC1T (L) x 26
x 27 TC2T (H)
TC2T (L) x 28
TC3T (L) x 30
x 29 TC3T (H) To VPRO-S8
JX1
MX1 (L) x 32
x 31 MX1 (H) J6
x 33 MX2 (H)
MX2 (L) x 34 To J5
MX3 (L) x 36
x 35 MX3 (H) Magnetic
x 37 MY1 (H) Speed JX5
MY1 (L) x 38
x 39 MY2 (H) Pickups
MY2 (L) x 40
x 41 MY3 (H) (MPU)
MY3 (L) x 42
MZ1 (L) x 44
x 43 MZ1 (H)
MZ2 (L) x 46
x 45 MZ2 (H)
x 47 MZ3 (H)
MZ3 (L) x 48
x
To J5
To VPRO-R8
Up to two #12 AWG wires per Terminal Blocks can be J6
point with 300 volt insulation unplugged from terminal board
for maintenance
TPRO Wiring and Cabling

Operation
The main purpose of the TPRO is to supply speed signals to VPRO for the emergency
overspeed (EOS) protection for the turbine. In addition, TPRO supplies generator signals
for backup synchronization check protection, three analog current inputs, and nine
thermocouple inputs, primarily for exhaust over-temperature protection on gas turbines.
VPRO provides 28 V dc to TPRO to power the three analog input transmitters.
Speed Control and Overspeed Protection
Speed control and overspeed protection is implemented with six passive, magnetic speed
pickups. The first three are monitored by the controller, which uses the median signal
for speed control and the primary overspeed protection. The second three are separately
connected to the three VPROs in the protection module. Provision is made for nine
passive magnetic speed pickups or active pulse rate transducers (TTL type) on the TPRO
terminal board, with three being monitored by each of the three VPROs
Backup Synch Check Protection
TPRO provides inputs to the protection module for backup synchronization check. The
generator and bus voltages are supplied from two, single phase, potential transformers
(PTs) secondary output supplying a nominal 115 V rms. The maximum cable length
between the PTs and the turbine control is 100 meters of 18 AWG twisted, shielded
wire. Each PT is magnetically isolated with a 1,500 V rms rated barrier and a circuit
load less than 3 VA.
Each PT input is internally connected in parallel through TPRO to the three VPROs in
the protection module. The triple redundant phase slip windows result in a voted logical
output on the TREG terminal board, which drives the K25A relay. This relays contacts
are connected in series with the synch permissive relay (K25P) and the auto synch relay
(K25) to insure that no false command is issued to close the generator breaker. Similarly,
contacts from the K25A contact are connected in series with the contacts from remote,
manual synchronizing equipment to insure no false commands
Thermocouple and Analog Inputs
TPRO provides thermocouple and analog inputs to the protection module, primarily for
gas turbine applications. Nine thermocouple inputs are monitored with three connected
to each VPRO. These are generally used for backup exhaust over-temperature protection.
Also, one 5, 10 V dc, 4-20 mA input, and two 4-20 mA inputs can be connected to the
TPRO terminal board, which feeds the inputs in parallel to the three VPROs.

Terminal Board TPRO VPRO R8 VPRO S8 VPRO T8
1 Noise Suppression Protection Protection Protection
JX1
Gen. Volts
120 V ac NS
2
from PT
Noise Suppression
3 ID
Bus Volts
120 Vac JY1 J6 J6 J6
NS
from PT 4
To TTUR 1
Thermocouple Inputs CJ
13
TC1RH NS
14 Three TC ccts to R8 ID
TC1RL NS 1 Overspeed Overspeed Overspeed
19 CJ
TC1SH NS JZ1 Em Stop Em Stop Em Stop
20 Three TC ccts to S8 Sync Sync Sync
TC1SL NS 1 Check Check Check
25 CJ
TC1TH NS Overtemp Overtemp Overtemp
26 Three TC ccts to T8
TC1TL NS ID
P28VV
5
P28V,R8
P24V1 Current P28V,S8
Limiter P28V,T8 J5 J5 J5
7
V dc VDC
6 JPA1
20mA1 20 ma
250 ohms To R8,S8,T8
8 J3
mAret J3 J3
One of the above ccts
Open Ret
JPB1
9 Current P28VV
P24V2 J4 J4 J4
Limiter
10
20 mA2
250
ohms To R8,S8,T8
Two of the above ccts
JX5
#1 MX1H 31 To TREG and
Filter
Emergency Clamp Trip Solenoids
Magnetic NS
MX1H 32 AC
Speed Coupling
Pickup 3 Circuits
ID
#2 MY1H 37 Filter
Emergency Clamp JY5
Magnetic NS
MY1L 38 AC
Speed Coupling
Pickup 3 Circuits
ID
#3 MZ1H 43 Filter
Emergency Clamp JZ5
Magnetic NS
MZ1L 44 AC
Speed Coupling
Pickup 3 Circuits ID
TPRO Terminal Board and TMR VPROs

Specifications
Item Specification
Number of Inputs 9 Passive proximity probes for speed pickups
1 Generator and 1 Bus Voltage
9 Thermocouples
1 4-20 mA current or voltage
2 4-20 mA current
Power Supply Voltage Input supply 28 V dc for the analog sensors
Magnetic Pickup (MPU) Output resistance 200 ohms with inductance of 85 mH.
Characteristics
Output generates 150 V p-p into 60 K ohms at the TPRO terminal block, with insufficient
energy for a spark. The maximum short circuit current is approximately 100 mA.
The system applies up to 400 ohm normal mode load to the input signal to reduce the
voltage at the terminals.
MPU Cable Sensors can be up to 300 m (984 ft) from the cabinet, assuming that shielded pair
cable is used, with typical 70 nF single ended or 35 nF differential capacitance, and 15
ohms resistance.
MPU Pulse Rate Range 2 Hz to 20 kHz
MPU Input Circuit Sensitivity Minimum signal is 27 mV pk at 2 Hz
Minimum signal is 450 mV pk at 14 kHz
Generator and Bus Voltage Two Single-Phase Potential Transformers, 115 V rms secondary.
Sensors
Voltage accuracy is 0.5% of rated Volts rms.
Frequency Accuracy 0.05%.
Phase Difference Measurement better than 1 degree.
Allowable voltage range for synchronizing is 75 to 130 V rms.
Each input has a load of less than 3 VA.
Thermocouple Inputs Same specifications as for VTCC board
Analog Inputs 2 current inputs, 4-20 mA
1 current input with selection of 4-20 mA, or 5 V dc, or 10 V dc.
Same specifications as for VAIC board.
Size 17.8 cm Wide x 33.02 cm High (7.0 in x 13 in)

Diagnostics
VPRO makes diagnostic checks on TPRO and its cables and input signals as follows:
If high or low limits on analog inputs are exceeded a fault is created.
L3DIAG_VPROR (or S, or T) occurs. The diagnostic signals can be individually
latched and then reset with the RESET_DIA signal if they go healthy.
Terminal board connectors on TPRO have their own ID device that is interrogated by
the I/O board. The ID device is a read-only chip coded with the terminal board serial
number, board type, revision number, and plug location. When the chip is read by VPRO
Configuration
Configuration of the terminal board is by means of jumpers. For location of these
jumpers refer to the Installation diagram. The jumper choices are as follows:
Jumper JPA1 selects either current input or voltage input
Jumper JPB1 selects whether the return is connected to common or is left open
All other configuration is for VPRO and is done from the toolbox.

TREG Turbine Emergency Trip
The Gas Turbine Emergency Trip (TREG) terminal board provides power to three
emergency trip solenoids and is controlled by the I/O controller. Up to three trip solenoids
can be connected between the TREG and TRPG terminal boards. TREG provides the
positive side of the dc power to the solenoids and TRPG provides the negative side. The
I/O controller provides emergency overspeed protection, emergency stop functions,
and controls the 12 relays on TREG, nine of which form three groups of three to vote
inputs controlling the three trip solenoids.
There are a number of board types as follows:
The H1A version is not used for new production and is replaced by H1B.
H1B is the primary version for 125 V dc applications. Control power from the JX1,
JY1, and JZ1 connectors are diode combined to create redundant power on the board
for status feedback circuits and powering the economizing relays. Power separation
is maintained for the trip relay circuits.
H2B is used for 24 V dc applications. All other features are the same as H1B.
H3B is a special version of H1B for use in systems with redundant TREG boards.
Feedback circuit and economizing relay power is provided only by the JX1
connector.
Feedback circuit and economizing relay power is provided only by the JY1
connector.
Feedback circuit and economizing relay power is provided only by the JZ1 connector.
In redundant TREG applications, it is typical to find one H3B and one H4B board used
together. It is important that system repairs be done with the correct board type to
maintain the control power separation designed into these systems.
Mark VI Systems
In Mark* VI systems, the VPRO works with the TREG terminal board. Cables with
molded plugs connect TREG to the VPRO module.
Mark VIe Systems
In Mark VIe systems, TREG is controlled by the PPRO pack on SPRO. The PPRO I/O
packs plug into the D-type connectors on SPRO. Cables with molded plugs connect
TREG to the SPRO board.

TREG Terminal Board
P125 Vdc
To TRPG
JH1 J1
x
x
x 2
x 1 J2
x 4
x 3 JZ1 To TSVO
x 6
x 5 termination
x 8
x 7
x 9 boards (SMX)
x 10
x 12
x 11
x 14
x 13
x 16
x 15
x 18
x 17 Cable to
x 20
x 19 JY1 Protection
x 22 x 21 VPRO
x 23 Module
x 24
x
x
x 26
x 25
x 28
x 27
x 30
x 29
x 32 x 31
x 33 JX1 Cable to
x 34 x 35
x 36 x 37
VPRO
x 38
x 40
x 39
x 42
x 41
x 44 x 43
x 46 x 45
x 48
x 47 Cable to
x
x
VPRO
Shield bar To second TREG

Barrier type terminal 37-pin D shell type
(optional)
blocks can be connectors with latching
unplugged from board fasteners
for maintenance
TREG Turbine Emergency Trip Terminal Board, and Protection Module I/O Controller

Installation
TREGH2B is a 24 V dc version The three trip solenoids, economizing resistors, and the emergency stop are wired
of the terminal board. directly to the first I/O terminal block. Up to seven trip interlocks can be wired to the
second terminal block. The wiring connections are shown in the following figure.
Power 125V dc To TRPG, 12 wires To TSVO

boards on
SMX systems
Turbine Emergency Trip
J2 J1
Terminal Board TREG JH1
JZ1
x
2
x 1 SOL 1 or 4
PWR_N1 x
4
x 3 RES 1A
RES 1B x
x 6
x 5 SOL 2 or 5
PWR_N2 x 7 RES 2A
RES 2B x 8
x 9 SOL 3 or 6
PWR_N3 x 10
x 12
x 11 RES 3A
RES 3B
x 14
x 13 E-TRP (H)
E-TRP (H) x 15
E-TRP (L) x 16 JUMPER
x 17
x 18
x 19 JY1 VPRO
x 20
x 21
x 22
x 23
x 24
x
x
x 25
x 26
x
x 27
28
PWR_P2 (for probe)
x 29
x 30 JX1 VPRO
x 32
x 31 PWR_P1 (for probe)
x 33
x 34
x 35 Contact TRP1 (H)
Contact TRP1 (L) x 36
x
Contact TRP5 (L) 44
x VPRO
Up to two #12 AWG wires per Terminal blocks can be unplugged

point with 300 volt insulation from terminal board for maintenance
TREG Terminal Board Wiring

Operation
TREG is entirely controlled by the VPRO protection module, and the only connections to
the control modules are the J2 power cable and through the trip solenoids. In simplex
systems a third cable carries a trip signal from J1 to the TSVO terminal board, providing
a servo valve clamp function upon turbine trip.
The solenoid circuit has a Both TRPG and TREG control the trip solenoids so that either one can remove power
metal oxide varistor (MOV) for and actuate the hydraulics to close the steam or fuel valves. The nine trip relay coils on
current suppression and a 10 TREG are supplied with 28 V dc from the I/O controller. The trip solenoids are supplied
, 70 W economizing resistor. with 125 V dc through plug J2, and draw up to 1 A with a 0.1 second L/R time constant.
A separately fused 125 V dc feeder is provided from the turbine control for the solenoids,
which energize in the run mode and de-energize in the trip mode. Diagnostics monitor
each 125 V dc feeder from the power distribution module at its point of entry on the
terminal board to verify the fuse integrity and the cable connection.
Two series contacts from each emergency trip relay (ETR1, 2, 3) are connected to the
positive 125 V dc feeder for each solenoid, and two series contacts from each primary
trip relay (PTR1,2,3 in TRPG) are connected to the negative 125 V dc feeder for each
solenoid. An economizing relay (KE1, 2, 3) is supplied for each solenoid with a normally
closed contact in parallel with the current limiting resistor. These relays are used to
reduce the current load after the solenoids are energized. The ETR and KE relay coils are
powered from a 28 V dc source from the I/O controller. Each I/O controller in each of the
R8, S8, and T8 sections supplies an independent 28 V dc source.
The 28 V dc bus is current limited and used for power to an external manual emergency
trip contact, shown as E-STOP. Three master trip relays (K4X, K4Y, K4Z) disconnect
the 28 V dc bus from the ETR, and KE relay coils if a manual emergency trip occurs.
Any trip that originates in either the protection module (such as EOS) or the TREG (such
as a manual trip) will cause each of the three protection module sections to transmit a
trip command over the IONet to the control module, and may be used to identify the
source of the trip.
In addition, the K4CL servo clamp relay will energize and send a contact feedback
directly from the TREG terminal board to the TSVO servo terminal board. TSVO
disconnects the servo current source from the terminal block and applies a bias to drive
the control valve closed. This is only used on simplex applications to protect against
the servo amplifier failing high.
Note The primary and emergency overspeed systems will trip the hydraulic trip
solenoids independent of this circuit.

Trip
Terminal Terminal Board TREG 
solenoid JX1
Board TRPG VPRO
1 or 4 KE1 KX1 KY1 KX1 RD
02 - + 01 section R8
KX2 J3
KY1 KZ1 RD
J2 J2 ID
Mon KX3 RD
04 KZ1 KX1
Optional
P28X1 Mon
economizing 03
resistor, K4X KX1,2,3
Trip solenoid 28 V dc
100 ohm,
2 or 5 KE2 KX2 KY2 
70W 04 - + 05 JY1
VPRO
KY1 RD
KY2 KZ2 section S8
J2 J2 J3
Mon
KY2 RD
KZ2 KX2 ID
08 KY3 RD
07
Trip P28Y1 Mon
solenoid K4Y KY1,2,3
28 V dc
3 or 6 KE3 KX3 KY3
06 - + 09
JZ1 
KY3 KZ3 KZ1 VPRO
J2 J2 RD section T8
Mon
KZ2 J3
KZ3 KX3 RD
12 ID
11 KZ3 RD
PWR_N1 02 P28Z1
for test
Mon
06
Sol pwr monitor K4Z KZ1,2,3
10 JX1 28 V dc
Mon JY1
J2 J2 JZ1
- N125V
+ P125V KE1,2,3 JX1
P28VV 2 JY1
30 RD
PWR_P1 JX1 3 JZ1
31 PWR_P2 JY1 Mon
for test probe JZ1 KE1,2,3
Three economizing relay circuits
Trip interlock
K4CL JX1 P125X seven circuits
To TSVO P28VV 2 To Exc 35 TRP1H
boards on J1
RD JY1 NS
3 JX1
SMX systems K4CL JZ1 36 TRP1L
K4CL JY1 TRP NS
Servo clamp JZ1
Mon 13
N125X
To relay 14 ETRPH
K25A on J2 P28VV CL
J2 16
TTUR JX1 K4X ETRPL
2 JY1 E-Stop
RD 15
3 JZ1 K4Y JUMPR
JH1 Mon
P125X K4Z 17 JUMPR
JX1
N125X 18 Second E-STOP
JY1
BCOM JZ1 when applicable
TREG Board, Trip Interlocks, and Trip Solenoids

Solenoid Trip Tests
Application software in the controller is used to initiate tests of the trip solenoids. Online
tests allow each of the trip solenoids to be manually tripped one at a time, either through
the PTR relays from the controller, or through the ETR relays from the protection
Specifications
Item Specification
Number of trip solenoids Three solenoids per TREG (total of six per I/O controller)
Trip solenoid rating H1 - 125 V dc standard with 1 A draw
H2 - 24 V dc is alternate with 1 A draw
Trip solenoid circuits Circuits rated for NEMA class E creepage and clearance
Circuits can clear a 15 A fuse with all circuits fully loaded
Solenoid inductance Solenoid maximum L/R time constant is 0.1 second
Suppression MOV across the solenoid
Relay outputs Three economizer relay outputs, two second delay to energize
Driver to breaker relay K25A on TTUR
Servo clamp relay on TSVO
Solenoid control relay contacts Contacts are rated to interrupt inductive solenoid loads at 125 V dc, 1 A
Bus voltage can vary from 70 to 145 V dc
Trip inputs Seven trip interlocks to the I/O controller protection module, 125/24 V dc
One emergency stop hard wired trip interlock, 24 V dc
Trip interlock excitation H1 - Nominal 125 V dc, floating, ranging from 100 to 145 V dc
H2 - Nominal 24 V dc, floating, ranging from 18.5 to 32 V dc
Trip interlock current H1 for 125 V dc applications:
Circuits draw 2.5 mA (50 )
H2 for 24 V dc applications:
Trip interlock isolation Optical isolation to 1500 V on all inputs
Trip interlock filter Hardware filter, 4 ms
Trip interlock ac voltage rejection 60 V rms @ 50/60 Hz at 125 V dc excitation
Size 17.8 cm wide x 33.02 cm, high (7.0 in x 13.0 in)

Diagnostics
The I/O controller runs diagnostics on the TREG board and connected devices.
The diagnostics cover the trip relay driver and contact feedbacks, solenoid voltage,
economizer relay driver and contact feedbacks, K25A relay driver and coil, servo clamp
relay driver and contact feedback, and the solenoid voltage source. If any of these do
not agree with the desired value then a fault is created.
TREG connectors JX1, JY1, and JZ1 have their own ID device that is interrogated by
I/O controller. The ID device is a read-only chip coded with the terminal board serial
number, board type, revision number, and the plug location. When the chip is read by the
I/O board and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
A jumper must be placed across There are no switches on the terminal board.
terminals 15 and 17 if the
second emergency stop input is
not required.

TRES Turbine Emergency Trip
The Small Steam Turbine Emergency Trip (TRES) terminal board is used for the
emergency overspeed protection for small/medium size steam turbines. TRES is
controlled by the VPRO protection module, and provides power to three emergency
trip solenoids, which can be connected between the TRES and TRPS terminal boards.
TRES provides the positive side of the 125 V dc to the solenoids and TRPS provides the
negative side. The VPRO provides emergency overspeed protection, emergency stop
functions, and controls the three relays on TRES, which control the three trip solenoids.
TRES has both simplex and TMR form.
There are seven dry contact inputs for trip interlocks.
TRES has no economizing relays.
There are no emergency stop inputs.
In the TRES, the seven dry contact inputs excitation and signal are monitored and fanned
to the protection module. The board includes the synch check relay driver, K25A,
and associated monitoring, the same as on TREG, and the servo clamp relay driver,
K4CL, and its associated monitoring. A second TRES board cannot be driven from the
protection module.
Installation
The three trip solenoids are wired to the first I/O terminal block. Up to seven trip
interlocks are wired to the second terminal block. The wiring connections are shown in
the following figure
Connector J2 carries three power buses from TRPS, and JH1 carries the excitation
voltage for the seven trip interlocks.

Emergency Trip Terminal Board TRES (Small/Medium Steam Turbine)
Servo
clamp
JH1 JZ1
J25 J1
Trip interlock excitation
J2 K25A
x relay
x 1 SUS1A
SUS1B x 2 Cable to TRPS
4
x 3 SOL1A
SOL1B x
x 5
x 6
PwrA_P
x 7
x 8 ETR1
x 10
x 9 PwrA_N
x 11 SUS2A
SUS2B x 12
x 13 SOL2A JY1 VPRO
SOL2B x 14
x 15
x 16
PwrB_P x 17
x 18
x 20
x 19 PwrB_N
x 21 SUS3A ETR2
SUS3B x 22
x 23 SOL3A
SOL3B x 24
x
ETR3
x
x 25
x 26 JA1 JX1 VPRO
x 27
PwrC_P x 28
x 29 PwrC_N
x 30
x 31
x 32
x 33
x 34
TRP1(L) x 36
x 35 TRP1(H)
38
x 37 TRP2(H)
TRP2(L) x
x 40
x 39 TRP3(H)
TRP3(L) Trip interlocks
42
x 41 TRP4(H)
TRP4(L) x 1 through 7
x 43 TRP5(H)
TRP5(L) x 44
x 45 TRP6(H)
TRP6(L) x 46
TRP7(L) x 48
x 47 TRP7(H) VPRO
Cable for Simplex
x
applications

point with 300V insulation from terminal board for maintenance
TRES Terminal Board Wiring

Operation
The VSVO protection module controls TRES. In simplex systems, a third cable carries a
trip signal from J1 to the TSVO terminal board, providing a servo valve clamp function
upon turbine trip.
The solenoid circuit has an Both TREL and TRES control the trip solenoids 1 and 2 so that either one can remove
MOV for current suppression power and actuate the hydraulics to close the steam or fuel valves. ETR3 is set up to
on TREL. supply power to trip solenoid #3. The nine trip relay coils on TRES are supplied with 28
V dc from the I/O controller. The trip solenoids are supplied with 125 V dc (or 24 V dc)
through plug J2, and draw up to 1 A with a 0.1 second L/R time constant.
A separately fused 125 V dc feeder is provided from the PDM for the solenoids.
Diagnostics monitor each 125 V dc feeder from the PDM at its point of entry on the
Note A normally closed contact from each relay is used to sense the relay status for
diagnostics
Two series contacts from each of the emergency trip relays (ETR1, 2, 3) are connected to
the positive 125 V dc feeder for each solenoid, and two series contacts from each of the
primary trip relays are connected to the negative 125 V dc feeder for each solenoid. The
ETR relay coils are powered from a 28 V dc source from the I/O controller. Each I/O
controller in each of the R8, S8, and T8 sections supplies an independent 28 V dc source.
The K4CL servo clamp relay will energize and send a contact feedback directly from
the TRES terminal board to the TSVO servo terminal board. TSVO disconnects the
servo current source from the terminal block and applies a bias to drive the control
valve closed. This is only used on simplex applications to protect against the servo
amplifier failing high.
Solenoid Trip Tests


J2, power
buses from
TRPS
Terminal Board TRES Terminal
JA1 PwrA_N Board
Simplex P28A PwrB_N PwrC_N
system TRPS
uses JA1 P28X
PwrA_P PwrB_P
PwrC_P
P28Y
P28
P28Z Sol.
ID To JX1, Power
JX1 JY1,JZ1, Monitor
JA1 J2
J2
I/O
2 RD ETR1
Controller
3 SUS1A 01
PwrA_P SUS1B Trip
02
To X,Y,Z, A
Mon solenoid
ETR1
ETR1 SOL1A 03 - +
ID ETR1 SOL1B 04
PwrA_P 08
Several terminals
P28 PwrA_N positions for
JY1 PwrA_N 09 different
I/O applications
Controller 2 RD ETR2
3 J2
J2
To X,Y,Z, A
Mon
SUS2A 11
ETR2
PwrB_P SUS2B 12 Trip
ID
solenoid
ETR2 SOL2A 13
- +
P28 ETR2 SOL2B 14
JZ1 PwrB_P
18
PwrB_N
I/O PwrB_N
2 RD 19
Controller ETR3
J2
3 J2
To X,Y,Z,A SUS3A 21
Mon
ETR3 PwrC_P SUS3B 22 Trip
ID solenoid
ETR3 SOL3A 23 - +
P28VV
To TSVO ETR3 SOL3B 24
boards on J1 K4CL JX1
2 JY1 PwrC_P
SMX systems RD 3 28
JZ1 PwrC_N
PwrC_N
K4CL JA1 29
Servo Clamp To JX1, JY1,
K4CL Mon JZ1, JA1
To TTURH1B J25 Exc_P
Excitation
To relay K25A JX1 volts 35 TRP1A
J2 2 NS
on TTUR JY1
RD 3
JZ1 7 36 TRP1B
JA1 NS
JH1 Mon
Excit_P . Trip interlock
From .
Excitation_N .
PDM
BCOM 7 circuits as above
TRES Terminal Board, Trip Interlocks, and Trip Solenoids

Specifications
Item Specification
Number of trip solenoids Three solenoids per TRES
Trip solenoid rating 125 V dc standard with 1 A draw
24 V dc is alternate with 3 A draw
Solenoid inductance Solenoid maximum L/R time constant is 0.1 sec
Suppression MOV on TRPS across the solenoid
Relay Outputs Driver to breaker relay K25A on TTUR
Solenoid control relay contacts Contacts are rated to interrupt inductive solenoid loads at 125 V dc, 1 A.
Bus voltage can vary from 70 to 145 V dc.
Trip inputs Seven trip interlocks to VPRO protection module
Diagnostics
The I/O controller runs diagnostics on the TRES board and connected devices. The
diagnostics cover the trip relay driver and contact feedbacks, solenoid voltage, K25A
relay driver and coil, servo clamp relay driver and contact feedback, and the solenoid
voltage source. If any of these do not agree with the desired value, a fault is created.
TRES connectors JA1, JX1, JY1, and JZ1 have their own ID device that is interrogated by
the I/O controller. The ID device is a read-only chip coded with the terminal board serial
I/O controller and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration

TREL Turbine Emergency Trip
The Large Steam Turbine Emergency Trip (TREL) terminal board is used for the
emergency overspeed protection for large steam turbines. TREL is controlled by the
VPRO in the protection module, and provides power to three emergency trip solenoids,
which can be connected between the TREL and TRPL terminal boards. TREL provides
the positive side of the 125 V dc to the solenoids and TRPL provides the negative side.
I/O controller provides emergency overspeed protection, emergency stop functions,
and controls the nine relays on TREL, which form three groups of three to vote inputs
controlling the three trip solenoids. The three groups are called ETR (emergency trip) 1,
2, and 3.
TREL is only available in TMR form.
TREL has no economizing relay as with TREG.
TREL has no E-STOP function as with TREG.
A second TREL board may be driven from the protection module.
Installation
The three trip solenoids are wired to the first I/O terminal block. Up to seven trip
interlocks are wired to the second terminal block. The wiring connections are shown
in the following figure. Connector J2 carries three power buses from TRPL, and JH1
carries the excitation voltage for the seven trip interlocks.

Excitation To TRPL
Emergency Trip TTUR

Terminal Board TREL JZ1
(Large Steam Turbine) JH1 J25
J1
J2 Servo
x
x 1 Sol1A clamp
Sol1B x 2
Sol2A x 4
x 3 PwrA_N
PwrB_N x 6
x 5 Sol2B KZ1
Sol3B x 8
x 7 Sol3A
x 10
x 9 PwrC_N
x 11
x 12
PwrB_P x 14
x 13 PwrA_P
x 15 PwrC_P KZ3 KZ2 JY1 VPRO
x 16
x 17
x 18
x 19
x 20
x 21
x 22
x 23
x 24
KY1
x
x
KY3 KY2
x 25
x 26
x 27 VPRO
x 28 JX1
x 29
x 30
x 31
x 32
x 33
x 34 KX3
TRP1(L) x 36
x 35 TRP1(H)
x 37 TRP2(H)
TRP2(L) x 38
x 39 TRP3(H)
TRP3(L) x 40
x 41 TRP4(H)
TRP4(L) x 42
x 43 TRP5(H) KX2
TRP5(L) x 44 KX1
x 45 TRP6(H)
TRP6(L) x 46
x 47 TRP7(H)
TRP7(L) x 48
x VPRO

point with 300V insulation from terminal board for maintenance
TREL Terminal Board Wiring

Operation
TREL is entirely controlled by the VPRO protection module, and the only connections to
the turbine control are the J2 power cable and the trip solenoids. In simplex systems, a
third cable carries a trip signal from J1 to the TSVO terminal board, providing a servo
valve clamp function upon turbine trip.
The solenoid circuit has an Both TRPL and TREL control the trip solenoids 1 and 2 so that either one can remove
MOV for current suppression power and actuate the hydraulics to close the steam or fuel valves. ETR3 is set up to
on TRPL. supply power to trip solenoid #3. The nine trip relay coils on TREL are supplied with 28
V dc from I/O controller. The trip solenoids are supplied with 125 V dc (or 24 V dc)
through plug J2, and draw up to 1 A with a 0.1 second L/R time constant.
A separately fused 125 V dc feeder is provided from the PDM to the solenoids.
Diagnostics monitor each 125 V dc feeder from the PDM at its point of entry on the
Note A normally closed contact from each relay is used to sense the relay status for
diagnostics.
Two series contacts from each of the emergency trip relays (ETR1, 2, 3) are connected to
the positive 125 V dc feeder for each solenoid, and two series contacts from each of the
primary trip relays are connected to the negative 125 V dc feeder for each solenoid. The
ETR relay coils are powered from a 28 V dc source from the I/O controller. Each I/O
controller in each of the R8, S8, and T8 sections supplies an independent 28 V dc source.
The K4CL servo clamp relay will energize and send a contact feedback directly from
the TREL terminal board to the TSVO servo terminal board. TSVO disconnects the
servo current source from the terminal block and applies a bias to drive the control
valve closed. This is only used on simplex applications to protect against the servo
amplifier failing high.
Solenoid Trip Tests


Trip
Terminal
solenoid Terminal Board TREL JX1
Board TRPL 01
#1 or 4 ETR1 KX1 KY1 KX1 RD VPRO
02 - + 02
KY1 KZ1 KX2 RD

J2 J2
KX3 RD ID
KZ1 KX1
03 Mon
PwrA_N
Trip KX1,2,3
PwrA_P
solenoid
04
#2 or 5 ETR2 KX2 KY2 P28X
06 - + 05 JY1
KY1 RD VPRO
KY2 KZ2
J2 J2
KY2 RD
KZ2 KX2
06 KY3 RD ID
PwrB_N
Trip PwrB_P Mon
solenoid 07 KY1,2,3
#3 or 6 ETR3 KX3 KY3
10 - +
08 P28Y
JZ1
J2 KY3 KZ3 KZ1 RD VPRO
J2
KZ3 KX3 KZ2 RD

09 PwrC_N
KZ3 RD
PwrA_P PwrC_P ID
PwrA_N Mon
PwrB_P KZ1,2,3
PwrB_N
Power J2 J2
A P28Z
buses PwrC_P
B Sol Pwr JX1
PwrC_N C Monitor JY1
JZ1 PwrA_P 13
To TSVO P28VV PwrB_P 14
boards on K4CL JX1
SMX systems J1 2 PwrC_P 15
RD JY1
3
JZ1
K4CL
Servo clamp
K4CL Mon To JX1,JY1,JZ1
To relay Exc_P
J25 Excitation Trip interlock
K25 A on J2 volts 35
JX1 NS TRP1A
TTUR J2
RD 2 JY1
3 JZ1 7 36 TRP1B
Mon NS
JH1 Excit_P .
.
Excitation_N .
BCOM
From 7 circuits as above
PDM
TREL Terminal Board, Trip Interlocks, and Trip Solenoids

Specifications
Item Specification
Number of trip solenoids Three solenoids per TREL (total of six per I/O controller)
Trip solenoid rating H1 - 125 V dc standard with 1 A draw
H2 - 24 V dc is alternate with 3 A draw
Solenoid inductance Solenoid maximum L/R time constant is 0.1 sec
Suppression MOV on TRPL across the solenoid
Relay Outputs Driver to breaker relay K25A on TTUR.
Solenoid control relay contacts Contacts are rated to interrupt inductive solenoid loads at 125 V dc, 1 A.
Bus voltage can vary from 70 to 145 V dc
Trip inputs Seven trip interlocks to the I/O controller protection module, 125/24 V dc
Diagnostics
The protection module runs diagnostics on the TREL board and connected devices. The
diagnostics cover the trip relay driver and contact feedbacks, solenoid voltage, K25A
relay driver and coil, servo clamp relay driver and contact feedback, and the solenoid
voltage source. If any of these do not agree with the desired value, a fault is created.
TREL connectors JX1, JY1, and JZ1 have their own ID device that is interrogated by the
I/O controller. The ID device is a read-only chip coded with the terminal board serial
I/O controller and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration

Pyrometer Board (VPYR)
VPYR Pyrometer Input
The Pyrometer Input (VPYR) board provides a dynamic temperature profile of the
rotating turbine blades and computes temperature conditions that can lead to a trip.
Two infrared turbine blade temperature measurement system (TBTMS) thermometers,
known as pyrometers, and to two Keyphasor Proximitor probes for shaft reference
are wired to the TPYR terminal board. Dedicated analog-to-digital converters on VPYR
provide sampling rates up to 200,000 samples per second for burst data from two of
the temperature channels. Fast temperature data is available for display and offline
evaluation. TPYR has simplex and TMR capability as shown in the following figure.
TPYR Terminal Board VPYR VME Board
37-pin "D" shell type x

x connectors with
x JT1
x 2
x 1 latching fasteners RUN
x 4
x 3 FAIL
STAT
x 6
x 5
Pyrometer x 8
x 7
x 10
x 9
wiring x 11
x 12
x 14
x 13 VME bus to VCMI
x 16
x 15
x 18
x 17
x 20
x 19 JS1
x 22
x 21 Cables to VME
x 24
x 23 racks S and T
x
x
x 26
x 25
x 28
x 27
x 30
x 29
KeyPhasor x 31
x 32 JR1
wiring x 34
x 33
x 36
x 35
x 38
x 37
x 40
x 39 Cable to VME VPYR
x 42
x 41 rack R x
44
x 43
x
45
Connectors on
x 46
x J3
x 47 VME rack
x 48
x
x
Shield bar
J4
Barrier type terminal

Pyrometer Terminal Board, Processor, and Cabling
GEH-6421Q System Guide, Volume II Pyrometer Board (VPYR) 11-1

Installation
You may need to update the To install the VPYR board
VPYR firmware to the latest
1. Power down the VME processor rack.
to GEH-6403, Control System 2. Slide in the VPYR board and push the top and bottom levers in with your hands to
Toolbox for the Mark VI seat its edge connectors.
Turbine Controller. 3. Tighten the captive screws at the top and bottom of the front panel. These screws
hold the board firmly in place and enhance the board front ground integrity. The
screws should not be used to actually seat the board.
Note Cable connections to the TPYR terminal boards are made at the J3 and J4
connectors on the lower portion of the VME rack. These are latching type connectors to
secure the cables. Power up the VME rack and check the diagnostic lights at the top of
the front panel. For details, refer to Diagnostics section in this document.
Operation
Analog signals from TPYR are cabled to the VPYR processor board where signal
sampling and conversion take place. VPYR calculates the temperature profiles and runs
turbine protection algorithms using both pyrometer signals. If a trip is indicated and the
signals are validated, VPYR issues the trip signal.
Optical Pyrometer Measurements
Two infrared pyrometers dynamically measure the temperature profile of the rotating
turbine blades. Each pyrometer is powered by a +24 V dc and a -24 V dc source on
the terminal board, diode selected from voltages supplied by the three VPYR boards.
Four 4-20 mA signals are returned from each pyrometer, representing the following
blade measurements:
Average temperature
Maximum peak temperature
Average peak temperature
Fast dynamic profile, with 30 kHz bandpass, providing the full signature.
Each 4-20 mA input generates a voltage across a resistor. The signal is sent to VPYR
where it is multiplexed and converted. A dedicated A/D converter samples the fast input
(#4) at up to 200,000 samples per second. VPYR can be configured for different numbers
of turbine buckets, with up to 30 temperature samples per bucket.
11-2 Pyrometer Board (VPYR) GEH-6421Q Mark* VI Control

<T>
Chan A TPYR Terminal Board <S>
<R>
1 P24A Current P28VX VPYR Pyrometer Board
2 PCOM Limiter
JR1 J3
P 3 N24A Current N28VX Chan A
Limiter Fast
Y 4 PCOM Fan Fast A/D sampling
R 100 ohms Distrib P28VR
5 20ma A1
O -ution N28VR
6 RetA1 Average Chan B Fast
M Fast A/D sampling
E 7 20ma A2
ID
8 RetA2 Max-Pk
T All
E 9 20ma A3 others
Mux A/D
R 10 RetA3 Avg-Pk
11 20ma A4
12 RetA4 Fast JS1 J3
Same for <S>

Chan B P28VS
13 P24B Current P28VX N28VS
14 PCOM Limiter
P 15 N24B Current N28VX ID

16 PCOM Limiter
Y
R 17 20ma B1
O 18 RetB1 Avg
M 19 20ma B2
E 20 RetB2 Max Pk
T JT1 J3
21 20ma B3
E
22 RetB3 Avg-Pk
R Same for<T>
23 20ma B4 P28VT
24 RetB4 Fast N28VT
P 30 N24Pr1 Current N28VX

Limiter ID
R 31 PrH1
O 32 PrL1
X P28VR
KeyPhasor#1 P28VX P28VS
P 33 N24Pr2 Current N28VX P28VT
Limiter
R 34 PrH2
N28VR
O 35 PrL2
X N28VX N28VS
N28VT
KeyPhasor#2 Noise suppression on all
inputs & power outputs
VPYR Processor Board and Terminal Board

Keyphasor Inputs
Two Keyphasor probes are used for shaft position reference, with one used as a backup.
These probes and associated circuitry are identical to those used with VVIB/TVIB. They
sense a shaft keyway or pedestal to provide a time stamp.

Turbine Protection Algorithm
The protection algorithms run every Burst Period. The Burst of Fast data is collected
concurrently from the two pyrometers. The start of each Burst of Fast data is
synchronized with the selected Keyphasor probe. Each burst is continuous and has
a nominal length of three revolutions as determined from the probe. The Keyphasor
time-stamps, associated with this burst (four stamps) are included in the data. The
turbine RPM is also passed to the VPYR card through signal space as a backup to the
Keyphasor RPM value.
The algorithm provides seven buffers to store the fast pyrometer temperature data. The
buffers store the raw A/D data that is loaded into a buffer automatically through the
VPYRs DMA controller. Each buffer stores one burst of data for pyrometer channel A,
one burst of data for pyrometer channel B, and one header that describes the sampling
details, conversion factors, and rate limits used. The seven buffers allow five buffers
to be captured or frozen for a trip function (Trip_minus4, Trip_minus3, Trip_minus2,
Trip_minus1 and Trip_List data), one user or manually operated capture list, and the last
buffer for gathering sampled data for the protection algorithms.
The pyrometer algorithm takes the latest data from the capture buffers and determines
the bucket span (pyrometer samples) that is used for the protection algorithm.
BuckOffsetA/B defines the delay in percent of Bucket Period starting from the Keyphasor
input to the start of the bucket temperatures that is used in the protection algorithm.
BuckSpanA/B defines the percent of the Bucket Period that is used in calculating the
bucket temperature signature for the protection algorithm.
The average temperature per burst, the maximum temperature per bucket signature,
and the minimum temperature per bucket signature are calculated based on the bucket
signature defined by the configuration constants. The average temperature per burst is the
average temperature over the bucket signature for 3.1 revolutions of data (1 burst). The
maximum temperature is stored for each bucket signature for 3.1 revolutions of data. The
minimum temperature is stored for each bucket signature for 3.1 revolutions of data.
A median select is performed on each bucket signature over the three revolutions of
data for both the maximum temperature per bucket and the minimum temperature per
bucket, as shown in the following figure. This results in a filtered maximum for each
bucket over the 3 revolutions of data and a filtered minimum for each bucket over the 3
revolutions of data.
The algorithm performs a maximum select from all the bucket filtered maximums
and stores the value in the signal space variable, FastMxMxPk_A/B. The algorithm
also performs a minimum select from all the bucket filtered minimums and stores the
results in FastMnMnPk_A/B. The algorithm also provides an average of all the filtered
maximums, FastAgMxPk_A/B, and calculates the average of all the filtered minimums,
FastAgMnPk_A/B.
The following block diagram illustrates the algorithms used to calculate the following
from the Pyrometer Channel A and B fast sampled temperature data:
Maximum of the filtered maximum Turbine Blade Temperature per bucket
Average of the filtered maximum Turbine Blade Temperature per bucket
Average of the filtered minimum Turbine Blade Temperature per bucket
Minimum of the filtered minimum Turbine Blade Temperature per bucket

VPYR Hdwr Channel A &
VPYR Firmware (Channel A)
B)
KeyPhasor ChB Fast MAXxy = Maximum Value from Bucket Span
where x is Bucket # and y identifies the revolution.
ChA Fast
Bucket Offset and Span Calc. MIN xy = Minimum Value from Bucket Span
where x is Bucket # and y identifies the revolution.
A/D A/D A/D
REVOLUTION REVOLUTION
Start KeyPhasor;
FPGA Immed. A/D 0 1 2 0 1 2
&
MAX0 MAX0 MAX0
Buffe 0 0 MIN00 MIN01 MIN02
Int 0 1 2
r
DMA Ptr, Size MAX1 MAX1 MAX1
Cntrl 1 1 MIN10 MIN11 MIN12
0 1 2
Assuming no list

Capture Buffers(7) data captured & MAXn MAXn MAXn
T EK CUB
T EK CUB
n n MINn0 MINn1 MINn2

VPYR firmware 0 1 2
Header 0
Pyro ChA Data using Buffer 2 data,
Pyro ChB Data then DMA is
Header 1 updating Buffer 3's ,
MAXFx = Median Select (MAXx0 MAX , ) MIN F = Median Select ( x MIN , x
, x MIN )
Pyro ChA Data x1 MAXx2
data. where x is Bucket # where
x x is Bucket # MIN 0 1 2
Pyro ChB Data
Header 2
Pyro ChA Data
Pyro ChB Data
Header 3
AVG(n-j) = Average of Samples within Fmx Fmn
Pyro ChA Data Bucket Span for 3 revolutions (burst) (n-3) (n-3)
Pyro ChB Data where n is a point in time and
Header 4
Fmx Fmn
Pyro ChA Data
j represents a burst period.
(n-2) (n-2) Burst Delay
Pyro ChB Data
Header 5
Fmx Fmn
Pyro ChA Data (n-1) (n-1)
Pyro ChB Data Filter
Header 6 Filter
Pyro ChA Data
Max(n
Min(n) To Rate Check
Pyro ChB Data AVG(n-3) )
MAX F MIN
Burst Delay 0 F0
AVG(n-2) 0
Delta Avg(n-2) MAXF
AVG(n-1) 1 MINF1 [Delta Filter
1 n-2
Delta Avg(n-1) Max]
AVG(n) [Delta Filter
TSM UDH Delta Avg(n) n-1 [Delta Filter Max1]
Max]
MAXF
T EK CUB
Drivers Drivers n MINFn [Delta Filter

n Max] n
VCMI / Max. Select Average Average Min. Select

RS232 UCxx
Average of one Min. of Filtered

Max. of Filtered Avg. of Filtered Avg. of Filtered
Burst (3 revs) Min.
Max. Max. Min.
Ethernet (FastMnMnPk_A
(FastAvg_A) (FastMxMxPk_A) (FastAgMxPk_A) (FastAgMnPk_A)
)
Signal Space Inputs
Terminal Emulator HMI
kc eh C et a R o T
Pyrometer Board (VPYR) 11-5

The rate limit comparator uses the Delta-Delta matrix and compares this against one
of two limits. The Delta-Delta matrix is the difference in the rate of change of the
filtered maximum temperatures from one burst to another and the rate of change of
the average temperature from one burst to the next on a per bucket basis. The limit
used is determined by the signal space variable, Rate1 Limit Select for Channel A/B,
Rate1_LSel_A/B. If Rate1_LSel_A/B equals FROM_APPLICATION, then the signal
space variable, Rate1_Lmt_A/B, is used. The application software sets the value used.
At initialization the VPYR firmware sets Rate1_Lmt_A/B = Fn1. If Rate1_LSel_A/B
equals FROM VPYR, then Fn1 is used. Fn1 is defined as
Fn = SetptR1B_A/B + SetptR1_A * AVG(n-1)
where SetptR1B_A/B is the set point bias for Rate1, _A for channel A & _B for chB,
SetptR1_A/B is the set point gain for Rate1.
The set point bias and gain are both configuration constants in the VPYR. Rate2, Rate3,
and the Distance calculations are performed similarly. The pyrometer rate limit checks of
the protection algorithm are shown in the following two figures.
Rate Calc:
where SetptRxx_x are IO configurable constants.
[Filter Max] n
[Delta Filter Max] n + [Delta Delta] n
+ A
A>B [Rate1 State] n
[Filter Max]n-1 Delta AVG(n)
_ _ B
AVG(n) SetptR1B_A
+
SetptR1_A Fn a MUX
AVG n-1 b sel
AVG(n-1) _ Rate1_Lmt_A
Rate1_LSel_A
Where:
"Fn" is SetptR1B_A + SetptR1_A * AVG(n-1)
Mark VI Pyrometer Rate Check Portion of Protection Algorithm

Rate Calc Cont'd: [Delta Delta]
n-1
A
SetptR2B_A A>B [Rate2 State]
SetptR2_A Fn a MUX
B
AVG n-2 b sel
Rate2_Lmt_A Where:
Rate2_LSel_A
[Delta Delta]
n-2
A
A>B [Rate3 State]
SetptR3B_A
SetptR3_A Fn a MUX B
AVG n-3 b sel
Rate3_Lmt_A Where:
Distance Calc: Rate3_LSel_A
where SetptDx_A and StptDDepth_A are configurable constant
[Filter Max] n
[Delta Filter Max1]n [Delta Delta1]
+ + n A
A>B [Distance State]
[Filter Max] [Delta AVG]
n-StptDDepth_A _ n-StptDDepth_A _ B
s
AVGn MUX e
SetptDB_A l
+ a b
SetptD_A Fn
AVG n-StptDDepth_A
_ AVG
n-StptDDepth_A
Dist_Lmt_A
Dist_LSel_A
Trip Logic: Where:
"Fn" is SetptDB_A + SetptD_A * AVG(n-StptDDepth_A)
where RatexEnab_A are IO Configuration constants used as disable switches
Signal Space
Matric operation
[Rate1 State]
[Rate2 State]
Rate2Enab_A OR
OR "Chan A" Trip
AND
[Rate3 State]
matrix TripPyrA
elements AND
Rate3Enab_A OR
are "ored"
[Distance State] KP1 or KP2 valid

(Keyphasors)
DistEnab_A OR
Rate2Enab_A: If = 0, then enable or use Rate2State

else disable Rate2 trip logic. AND TripPyrB
"Chan B" Trip
Rate3Enab_A: If = 0, then enable or use Rate3State
else disable Rate3 trip logic.
DistEnab_A : If = 0, then enable or use Distance State

else disable Distance trip logic.
Mark VI Pyrometer Rate/Distance Check Portion of Protection Algorithm

Data Historian Upload of Captured Lists
The Data Historian is used to upload captured lists from VPYR. For a TMR system
configuration, the Data Historian uploads the captured lists from VPYR that is designated
the UDH communicator. If the user wants the Data Historian to upload captured lists
from each of the three VPYRs, then the user must configure the VPYRs as simplex.
VPYR provides two types of captured lists. VPYR runs protection algorithms examining
the rate of temperature rise on the turbine blades. If the rate of rise is too high, then the
protection algorithm flags the application software through the board point, TripPyrA
or TripPyrB, which indicates a rate limit trip for either Channel A and B pyrometer.
The application software in the controller detects the rate limit trip and, based on the
application code sequencing, either requests a list capture for the trip information or does
not. The VPYR captures five individual lists of approximately 12,000 samples or less of
temperature data for each channel. The lists are identified as Trip_minus4, Trip_minus3,
Trip_minus2, Trip_minus1, and TripList. Trip_minus1 stores the actual event that caused
the trip indication. Each list includes a header describing the data captured and the data.
The second type of list capture is a user requested capture. The user capture request is
generated in the controller application software in two different ways. First, the user
can manually request a pyrometer temperature data capture through the HMI screen.
Secondly, the application code periodically pings the VPYR(s) with a request based on a
User Capture Timer set up through an HMI screen. When the board point, User Capture
Request (UserCapReq), is set True by the application software, the VPYR(s) capture a
single list of temperature data for both Channel A and Channel B pyrometers.
The Data Historian uses the voted board point, Trip Captured List (TripCapList), to
determine when the trip list(s) are available by the VPYR for upload. The Data Historian
uses the voted board point, User Captured List (UserCapList), for a User list upload.
When the Boolean TripCapList or UserCapList equal True, the Data Historian checks the
Main Header parameter, ListNumber. For I/O boards with multiple lists to be uploaded
the parameter, ListNumber, indicates the number of the list that is ready to be uploaded.
Application Software State Diagram
Normally, the application software is in the No Pyro Fault Detected state. A pyrometer
trip detection is determined by checking the EGD read variables, TripPyrA and TripPyrB.
If either of these variables are True, then the application software transitions to the
Pyrometer Fault Detected state where the EGD write variable, LogTrigger, is set True.
VPYR freezes the five lists, Trip_minus4, Trip_minus3, Trip_minus2, Trip_minus1,
and TripList per the request, LogTrigger = True, from the application software. Next,
VPYR prepares the Trip_minus4 for upload by the Data Historian. The EGD variable,
TripCapList is set True by VPYR after the Trip_minus4 upload prep work has been
completed. The application software transitions to the Data Historian Uploading state
on the detection of TripCapList = True.
The application software starts a timer in the Data Historian Uploading state. To allow
enough time for the Data Historian to upload the 5 lists, a minimum 2 minutes delay is
required before the HMI Pyrometer Reset button is recognized.
Resetting the EGD variable, LogTrigger, to False before the two

minute delay is complete will corrupt the uploaded data. The
following figure shows how the controller application software
handles the detection of a pyrometer trip.

NO PYRO FAULT DETECTED
1) LogTrigger = False
(Timer >= 2 min.) & (TripPyrA = True) or

(HMI Pyro Reset = True) (TripPyrA = False) & (TripPyrB = True)
(TripPyrB = False)
(Timer < 2 min.) or

TripCapList = False
(HMI Pyro Reset = False)
DATA HISTORIAN UPLOADING PYRO FAULT DETECTED

1) Start Timer 1) LogTrigger = True
TripCapList = True
Record Storage in the Data Historian Archive

At least 450 Mbytes of disk space is required to store the Data Historian Archive for
Operator or User Captured lists from six VPYR boards (TMR system boards configured
as Simplex) at a maximum rate of one upload per day for two years.
Archive Folder Layout
The folder structure for the Mark* VI I/O boards follows the Data Historian standard. In
addition, the main header uploaded from the I/O board provides a subfolder name under
the date folder. The naming convention for the file format is:
<collection-name_date_time_controller_rack#_slot#_list-name_A>.dca
File Description
collection-name Used as the character field for Mark VI I/O board name (VPYR)
date Date format YYMMDD
time Time format: HHMMSS
The time is defined as the trigger time provided in the Main Header. If I/O board does not
provide, then Data Historian will use its computer time.
controller Defines the R, S or T controller
rack# Defines the rack number
slot# Defines the slot number
list-name Defines the Mark VI I/O list name.
ListName is provided in the main header. If list-name is not provided, then an alpha
character will be appends to the file name to insure a unique file name for each list.

Pyrometer Viewer
The Pyrometer Viewer is used to upload the data captured by the Data Historian. The
Viewer is a separate application from the toolbox and is loaded onto the HMI computer
or even the field engineers computer. The user selects the five dca files associated with
the trip as shown in the following figure.

The Pyrometer Viewer uses the raw temperature data from each dca file and re-calculates
the median peak temperatures for each bucket as shown in the following figure.

The rate of change data per each burst is also provided as shown in the following figure.

Specifications
Item Specification
Number of inputs 2 pyrometers, each with 4 analog 420 mA current signals
2 Keyphasor probes, each with 0.5 to 20 V dc inputs
Current inputs from pyrometers 4-20 mA across a 100 ohm resistor.
Common mode rejection: Dc up to 5 V dc, CMRR of 80 dB
Ac up to 5 Volt peak, CMRR of 60 dB
Measurement accuracy of 0.1% full scale, 14-bit resolution.
Bandwidth of 0 to 100 Hz on 6 slow inputs using multiplexed A/D converter.
Bandwidth of 0 to 30,000 Hz on two fast inputs using dedicated A/D converters,
sampling at 200,000 per sec.
Keyphasor inputs Input voltage range of 0.5 to 20 V dc
CMR of 5 V, CMRR of 50 dB at 50/60 Hz
Accuracy 2% of full scale (0.2 V dc)
Dc level detection typically 0.2 V/mil sensitivity
Speed measurement 2 to 5,610 RPM with accuracy of 0.1% of reading
Device excitation Pyrometers have individual power supplies, current limited:
P24V source is diode selected, +22 to +30 V dc, 0.175 A
N24V source is diode selected, -22 to -30 V dc, 0.175 A
Measurement parameters Rated RPM up to 5,100 RPM
Number of buckets per stage, up to 92
Number of samples per bucket, up to 30
Fast inputs sampled in bursts covering three revolutions, at twice per second
Size 26.04 cm high x 1.99 cm, wide x 18.73 cm, deep (10.25 x 0.782 x 7.375)
Diagnostics
Three LEDs at the top of the VPYR front panel provide status information. The normal
board. VPYR makes diagnostic checks including:
System limit checking on the temperature inputs and the Keyphasor gap signals
can create faults.
The two pyrometer inputs are compared against configuration limits to determine if
they are tracking, and the fast data is compared with other inputs to check validity.
L3DIAG_VPYR occurs. The diagnostic signals can be individually latched and then
reset with the RESET_DIA signal if they go healthy.
Terminal board connectors JR1, JS1, and JT1 have their own ID device that is
interrogated by the I/O board. The ID device is a read-only chip coded with the
terminal board serial number, board type, revision number, and plug location. When
the chip is read by VPYR and a mismatch is encountered, a hardware incompatibility
fault is created.

Configuration
Calibration
System limits Enables or disables all system limit checking Enable, disable
Min_MA_Input Minimum MA for healthy 4-20 mA input 0 to 21
Max_MA_Input Maximum MA for healthy 4-20 mA input 0 to 21
RPMrated Rated turbine RPM 300 to 10,000
BuckSamples Minimum samples per bucket at 110 percent speed 10 to 30
BuckOffset_A Offset from key to the first bucket, % bucket, 0 to 100
pyrometer A
BuckSpan_A Percent of bucket to include in protection 0 to 100
algorithm, pyrometer A
BuckNumb_A Number of buckets, pyrometer A 30 to 92
Burst_Period Burst Period for Pyr A & B. 480 to 5000
Value here must match what is in the controller
application software.
SetptR1_A Setpoint, rate 1, pyrometer A -1 to 1
SetptR1B_A Setpoint, rate 1, bias, average temp, pyrometer A 0 to 50
SetptR2B_A Setpoint, rate 2,bias, average temp, pyrometer A 0 to 50
SetptR3B_A Setpoint, rate 3, bias, average temp, pyrometer A 0 to 50
SetptD_A Setpoint distance, pyrometer A -1 to 1
SetptDB_A Setpoint distance bias, average temp, pyrometer A 0 to 50
SetptDDepth_A Setpoint, depth of the distance measurement, 1 to 3
pyrometer A
Rate2Enab_A Enable, temperature rate 2, pyrometer A Enable, disable
Rate3Enab_A Enable, temperature rate 3, pyrometer A Enable, disable
DistEnab_A Enable temperature rate 3, pyrometer A Enable, disable
Same configuration for channel B pyrometer
J3:IS200TPYRH1A Terminal board 1 connected to VPYR through J3 Connected, not connected
SlowAvg_A Slow, average temperature, pyrometer A - board Point edit (input FLOAT)
point
Input use Used, unused
Low_Input Input MA at low value 0 to 21
Low_Value Input value in engineering units at low MA -3.4e+038 to 3.4e+038
High_Input Input MA at high value 0 to 21
High_Value Input value in engineering units at high MA -3.4e+038 to 3.4e+038
TMR_Diff Difference limit for voted TMR inputs in % of (high 0 to 100
value/low value)

SlowMXPk_A Slow, maximum peak temperature, pyrometer A Point edit (input FLOAT)
(configuration similar to above) - board point
SlowAvgPk_A Slow, average peak temp, pyrometer A - board Point edit (input FLOAT)
point
FastAvg_A Fast, average temp, pyrometer A - board point Point edit (input FLOAT)
SlowAvg_B Slow, Average Temperature, Pyr B - board point Point Edit (Input FLOAT)
SlowMXPk_B Slow, Max Peak Temperature, Pyr B - board point Point Edit (Input FLOAT)
SlowAvgPk_B Slow, average peak temperature, Pyr B - board pt. Point Edit (Input FLOAT)
FastAvg_B Fast, average temperature, Pyr B - board point Point Edit (Input FLOAT)
GAP_KPH1 Air Gap, keyPhasor #1 - board point Point Edit (Input FLOAT)
VIB-Type Configurable item Used, Not used
VIB_Scale Volts/mil 0 to 2
KPH_Thrshld Voltage difference from gap voltage where 1 to 5
Keyphasor Trigger
KPH_Type Type of Pulse Generator Slot, Pedestal
SysLim System Limits 1 and 2, and TMR same as above Standard Choices
GAP_KPH2 Air Gap, keyPhasor #2, config. Same as above - Point Edit (Input FLOAT)
board point
Board Points (Signals) Description Point Edit (Enter Signal Direction Type
Name)
L3DIAG_VPYR1 Board diagnostic Input BIT
ProtAlgRun_A Protection Algorithm is running for Pyr Ch. A Input BIT
ProtAlgRun_B Protection Algorithm is running for Pyr Ch. B Input BIT
TripCapList Trip Capture List is ready for upload Input BIT
UserCapList User Capture List is ready for upload Input BIT
Rate1_LSel_A Rate1 Logic Select for Channel A Output BIT
Dist_LSel_A Distance Logic Select for Channel A Output BIT
Rate1_LSel_B Rate1 Logic Select for Channel B Output BIT
Dist_LSel_B Distance Logic Select for Channel B Output BIT
TripPyrA Bucket temperature rate trip, pyrometer A Input BIT
TripPyrB Bucket temperature rate trip, pyrometer B Input BIT
KeyPh1Act Keyphasor 1 Active Input BIT

Board Points (Signals) Description Point Edit (Enter Signal Direction Type
Name)
KeyPh2Act Keyphasor 2 Active Input BIT
SysLim1KP1 System Limit Input BIT
FastMxMxPk_A Fast, Max of the Max Peaks Temp, Pyr A Input FLOAT
FastAgMxPk_A Fast, Average of the Max Peaks Temp, Pyr A Input FLOAT
FastMnMnPk_A Fast, Min of the Min Peaks Temp, Pyr A Input FLOAT
FastAgMnPk_A Fast, Average of the Min Peaks, Pyr A Input FLOAT
FastMxMxPk_B Fast, Max of the Max Peaks Temp, Pyr B Input FLOAT
FastAgMxPk_B Fast, Average of the Max Peaks Temp, Pyr B Input FLOAT
FastMnMnPk_B Fast, Min of the Min Peaks Temp, Pyr B Input FLOAT
FastAgMnPk_B Fast, Average of the Min Peaks, Pyr B Input FLOAT
RPM_KPH1 RPM Keyphasor #1 Input FLOAT
RPM_KPH2 RPM Keyphasor #2 Input FLOAT
Rate1_Lmt_A Rate1 Limit value for Channel A pyro. Output FLOAT
Dist_Lmt_A Distance Limit value for Channel A pyro. Output FLOAT
Rate1_Lmt_B Rate1 Limit value for Channel B pyro. Output FLOAT
Dist_Lmt_B Distance Limit value for Channel B pyro. Output FLOAT
TripBuckIx_A Index of the first Bucket causing trip, Pyr A Input FLOAT
TripBuckNb_A Number of Buckets causing trip, Pyr A Input FLOAT
TripBuckIx_B Index of the first Bucket causing trip, Pyr B Input FLOAT
TripBuckNb_B Number of Buckets causing trip, Pyr B Input FLOAT
LogTrigger When true, records freeze, two before, one Output BIT
after
ResetLists Reset Captured Lists Output BIT
UserCapReq User Capture List request from controller Output BIT
PollStrobe Strobe to keep each TMR based Pyro in synch Output BIT
TurbRPM Turbine Speed in RPM Output FLOAT

Alarms
go online)
to go online)
16 System Limit Checking is Disabled System checking was disabled by configuration.
32&38 Milliamp input associated with the slow average Specified pyrometer's average output is faulty, or
temperature is unhealthy. Pyro## SLOW AVG VPYR or TPYR is faulty.
TEMP unhealthy
33&39 Pyro## Slow Max Pk Temp unhealthy. Milliamp Specified pyrometer's maximum output is faulty, or
input associated with the slow maximum peak VPYR or TPYR is faulty.
temperature is unhealthy
34&40 Pyro## Slow Average Peak Temp. Milliamp input Specified pyrometer's peak output is faulty, or VPYR
associated with the slow average peak temperature or TPYR is faulty.
is unhealthy
35&41 Pyro##Fast Temp Unhealthy. Milliamp input Specified pyrometer's fast output is faulty, or VPYR
associated with the fast temperature is unhealthy or TPYR is faulty.
36&42 Pyro## Fast Cal Reference out of limits. The fast VPYR is faulty
calibration reference is out of limits
37&43 Pyro## Fast Cal Null out of limits. The fast VPYR is faulty
calibration null is out of limits
44 Slow Cal Reference out of limits. The slow VPYR is faulty
calibration reference is out of limits
45 Slow Cal Null out of limits. The slow calibration null VPYR is faulty
is out of limits
128-191 Logic Signal # Voting mismatch. The identified A problem with the input. This could be the device,
or the cable.

TPYR Pyrometer Input
The Pyrometer Input (TPYR) terminal board is wired to two pyrometers and to two
Keyphasor Proximitor probes for shaft reference. The resulting 10 voltage signals are
cabled to the VPYR board, which samples them at up to 200,000 samples per second.
Three DC-37 connectors on TPYR connect to three VPYRs. Connections can be simplex
on a single connector (JR1), or TMR using all three connectors. In TMR applications,
the input signals are fanned to the three connectors for the R, S, and T controls.
In the Mark* VI system, TPYR works with the VPYR I/O board and supports simplex
and TMR applications. With TMR systems, TPYR connects to three VPYR boards
with three cables.
TPYR Terminal Board
37-pin "D" shell type

x
x
JT1 connectors with
x 1
x 2 latching fasteners
x 3
x 4
x 5
x 6
Pyrometers x 8
x 7
x 9
(2) x 10
x 11
x 12
x 13
x 14
x 15
J ports:
x 16
x 17
x 18
x 20
x 19 JS1 Plug in PPYR I/OPack(s)
x 21
x 22 for Mark VIe
x 23
x 24
x
or
x
x 26
x 25 Cable(s) to VPYR
x 28
x 27 board(s) for Mark VI;
x 29
KeyPhasors x 30
x 31
x 32 JR1
(2) x 33 the number and location
x 34
x 36
x 38
x 39
x 40
x 41
x 42
x 43
x 44
x 45
x 46
x 47
x 48
x
x
Shield bar

Pyrometer Terminal Board

Installation
Connect the wires for the two optical pyrometer inputs directly to the first terminal
block. Connect the wires for the two Keyphasor probes directly to the second terminal
block. Each block is held down with two screws and has 24 terminals accepting up
to #12 AWG wires. A shield termination strip attached to chassis ground is located
immediately to the left of each terminal block. 28 V dc power for the sensors comes in
from the R, S, and T VPYR through the JR1, JS1, and JT1 connectors. The following
figure shows TPYR wiring and cabling.
TPYR Terminal Board

JR1
PCOM1 (A) x 2
x 1 P24 (A)
x 3 N24 (A)
PCOM2 (A) x 4
x 5 20ma (A1)
Pyr A Ret (A1) x 6
wiring
x 7 20ma (A2)
Ret (A2) x 8
x 9 20ma (A3)
Ret (A3) x 10
x 11 20ma (A4)
Ret (A4) x 12
14
x 13 P24 (B)
PCOM1 (B) x
x 15 N24 (B) J ports:
PCOM2 (B) x 16
x 17 20ma (B1) JS1
Pyr B Ret (B1) x 18
20
x 19 20ma (B2) Plug in PPYR I/OPack(s)
wiring Ret (B2) x
Ret (B3) x 22
x 21 20ma (B3) for Mark VIe
Ret (B4) x 24
x 23 20ma (B4)
or
x
Cable(s) to VPYR
x board(s) for Mark VI;
x 25
x 26
x 27 the number and location
x 28
Key N24 Pr (1) x 30 redundancy required.
phasors PrL (1) x 32
x 31 PrH (1) JT1
1&2 PrH (2) x 34
x 33 N24Pr (2)
x 35 PrL (2)
x 36
x 37
x 38
x 39
x 40
x 41
x 42
x 43
x 44
x 45
x 46
x 47
x 48
x
Terminal Blocks can be unplugged from

terminal board for maintenance
TPYR Terminal Board Wiring and Cabling

Operation
Analog signals from TPYR are cabled to the VPYR board. The following figure shows
the pyrometer monitoring circuit.
Chan A TPYR Terminal Board PPYR I/O Pack

or
VPYR Pyrometer Board
1 P24A Current P28VX
2 PCOM Limiter <R>
JR1
P 3 N24A Current N28VX Chan A
Limiter Fast
Y 4 PCOM Fan Fast A/D sampling
R 100 ohms Distrib P28VR
5 20ma A1
O -ution N28VR
6 RetA1 Average Chan B Fast
M Fast A/D sampling
E 7 20ma A2
ID
8 RetA2 Max-Pk
T All
E 9 20ma A3 others
10 RetA3
Mux A/D
R Avg-Pk
11 20ma A4
12 RetA4 Fast
JS1
Chan B
13 P24B Current P28VX P28VS PPYR I/O Pack
14 PCOM Limiter
N28VS or
P 15 N24B Current N28VX VPYR Pyrometer Board
16 PCOM Limiter <S>
Y
ID
R 17 20ma B1
O 18 RetB1 Avg
M 19 20ma B2
E 20 RetB2 Max Pk
T JT1
21 20ma B3
E
22 RetB3 Avg-Pk
R PPYR I/O Pack
23 20ma B4 P28VT or
24 RetB4 Fast N28VT VPYR Pyrometer Board
<T>
P 30 N24Pr1 Current N28VX
Limiter ID
R 31 PrH1
O 32 PrL1
X P28VR
KeyPhasor#1 P28VX P28VS
P 33 N24Pr2 Current N28VX P28VT
Limiter
R 34 PrH2
N28VR
O 35 PrL2
X N28VX N28VS
N28VT
KeyPhasor#2 Noise suppression on all
inputs & power outputs
TPYR Terminal Board and I/O Boards

Optical Pyrometer Measurements
Two infrared pyrometers dynamically measure the temperature profile of the rotating
turbine blades. Each pyrometer is powered by a +24 V dc and a 24 V dc source, diode
selected on TPYR from voltages supplied by the three VPYRs. Four 4-20 mA signals are
returned from each pyrometer, representing the following blade measurements:
Average temperature
Maximum peak temperature
Average peak temperature
Fast dynamic profile, with 30 kHz bandpass, providing the full signature.
Each 4-20 mA input generates a voltage across a resistor. The signal is sent to VPYR
where it is multiplexed and converted. VPYR can be configured for different numbers of
turbine buckets, with up to 30 temperature samples per bucket.
Keyphasor Inputs
Two Keyphasor probes are used for shaft position reference, with one used as a backup.
These probes and associated circuitry are identical to those used with VVIB/TVIB.
They sense a shaft keyway or pedestal to provide a time stamp (angle reference for
blade identification).
Specifications
Item Specification
Number of inputs 2 pyrometers, each with 4 analog 420 mA current signals
2 Keyphasor probes, each with 0.5 to 20 V dc inputs
Current inputs from pyrometers 4-20 mA across a 100 ohm resistor.

Common mode rejection: Dc up to 5 V dc, CMRR of 80 dB
Ac up to 5 Volt peak, CMRR of 60 dB
Keyphasor inputs Input voltage range of -0.5 to -20 V dc.
CMR of 5 V, CMRR of 50 dB at 50/60 Hz
Device excitation (outputs) Each Pyrometers has individual power supplies, current limited:
P24V source is diode selected, +22 to +30 V dc, 0.175 A
N24V source is diode selected, -22 to -30 V dc, 0.175 A
Size 10.16 cm wide x 33.02 cm high (4.0 in x 13 in)

Diagnostics
There is system limit checking on the temperature inputs and the Keyphasor gap
signals, and these can create faults.
L3DIAG_VPYR occurs. The diagnostic signals can be individually latched and then
Terminal board connectors JR1, JS1, and JT1 have their own ID device that is
terminal board serial number, board type, revision number, and plug location.
When the chip is read by the I/O board and a mismatch is encountered, a hardware
Configuration

RTD Input (VRTD)
VRTD RTD Input
The Resistance Temperature Device (RTD) Input (VRTD) board accepts 16, three-wire
RTD inputs. These inputs are wired to a RTD terminal board (TRTD or DRTD). Cables
with molded fitting connect the terminal board to the VME rack where the VRTD
processor board is located.
VRTD excites the RTDs and the resulting signals return to the VRTD. VRTD converts
the inputs to digital temperature values and transfers them over the VME backplane
to the VCMI, and then to the controller.
GEH-6421Q System Guide, Volume II RTD Input (VRTD) 12-1

TRTD Terminal Board VRTD VME Board
x
x
x 2
x 1 TRTD capacity for RUN
x 4
x 3 FAIL
8 RTD x 5 16 RTD inputs STAT
x 6
inputs x 8
x 7
x 10
x 9
x 12
x 11
x 14
x 16
x 15
x 18
x 17
x 20
x 19 JA1 37-pin "D" shell
x 22
x 21
x 23 type connectors
x 24
x
with latching
fasteners
x
x 26
x 25
x 28
x 27
8 RTD x 30
x 29
inputs x 32
x 31
x 33 JB1
x 34
x 36
x 35
x 38
x 37 Cables to VME
x 40
x 39 I/O rack
VRTD
x 42
x 41 x
x 44
x 43
x 46
x 45 Connectors on J3
x 48
x 47 VME I/O rack
x
x
Shield
bar
J4

from board for
maintenance
RTD Input Terminal Board, I/O Board, and Cabling

Installation
its edge connectors
12-2 RTD Input (VRTD) GEH-6421Q Mark* VI Control

Operation
VRTD supplies a 10 mA dc multiplexed (not continuous) excitation current to each RTD
through the terminal board. The resulting signal returns to VRTD. The VCO type A/D
converter uses voltage to frequency converters and sampling counters. The converter
samples each signal and the excitation current four times per second for normal mode
scanning and 25 times per second for fast mode scanning, using a time sample interval
related to the power system frequency. Software in the digital signal processor performs
the linearization for the selection of 15 RTD types.
RTD open and short circuits are detected by out of range values. An RTD that is
determined to be outside the hardware limits is removed from the scanned inputs to
prevent adverse effects on other input channels. Repaired channels are reinstated
automatically in 20 seconds or can be manually reinstated.
In triple modular redundant (TMR) configuration, TRTDH1B provides redundant RTD
inputs by fanning the inputs to three VRTD boards in the R, S, and T racks. All RTD
signals have high frequency decoupling to ground at signal entry. RTD multiplexing is
coordinated by redundant pacemakers so that the loss of a single cable or VRTD does not
cause the loss of any RTD signals in the control database. VRTD boards in R, S, and T
read RTDs simultaneously. The RTDs read by each VRTD differ by two RTDs, such that
when R reads RTD3, S reads RTD5, and T reads RTD7, and so on. This ensures that the
same RTD is not excited by two VRTDs simultaneously and hence produce bad readings.
<R> or <S> or <T> I/O rack
Termination RTD Input Board VRTD

Board TRTD
Noise Excit.
suppression JA1 J3
Excitation
RTD
Signal NS
I/O Core
Return Processor
TMS320C32
Grounded or
ungrounded (8) RTDs Connectors
ID at
bottom of A/D Processor VMEbus
VME Bus
VME rack
Noise Excit.
suppression JB1 J4
Excitation
RTD
Signal NS
Return VCO type A/D
Grounded or converter
(8) RTDs
ungrounded
ID
RTD Inputs and Signal Processing, Simplex System

Signals
TerminalBoard TRTDH1B PM= Pacemaker
Tx = VRTD transmit
Rx = VRTD receive
Noise
JRA
suppression ID
Excitation
RTD PM, Tx
Signal NS PM, Rx, S
Return JSA
ID
Grounded or
ungrounded PM, Tx
(8) RTDs to JRA, JSA, JTA
PM, Rx, R
JTA
ID
PM, Tx
PM, Rx, R
Noise JRB
suppression ID
Excitation
RTD PM, Tx
Signal NS PM, Rx, T
Return JSB
ID
Grounded or
ungrounded (8) RTDs to JRB, JSB, JTB PM, Tx
PM, Rx, T
JTB
ID
PM, Tx
PM, Rx, S
RTD Inputs and Connections to three VRTD Processors in TMR System

Specifications
Item Specification
Number of channels 16 channels per VRTD board
RTD types 10, 100, and 200 platinum
10 copper
120 nickel
Span 0.3532 to 4.054 V
A/D converter resolution 14-bit resolution
Scan Time Normal scan 250 ms (4 Hz)
Fast scan 40 ms (25 Hz)
Power consumption Less than 12 W
Measurement accuracy See Tables
Common mode rejection Ac common mode rejection 60 dB @ 50/60 Hz
Dc common mode rejection 80 dB
Common mode voltage range 5 V
Normal mode rejection Rejection of up to 250 mV rms is 60 dB @ 50/60 Hz system frequency for normal scan
Maximum lead resistance 15 maximum two way cable resistance
Fault detection High/low (hardware) limit check
High/low (software) system limit check
Failed ID chip
RTD Accuracy
RTD Type Group Gain Accuracy at 400 F

120 nickel 120 nickel 2 F
200 platinum Normal_ 1.0 2 F
100 platinum -51 to 240C (- 60 to 400 F) Gain_ 2.0 2 F
10 copper 10 Cu_10 10 F

RTD Types and Ranges
RTD inputs are supported over a full-scale input range of 0.3532 to 4.054 V. The
following table shows the types of RTD used and the temperature ranges.
RTD Type Name/Standard Range C Range F

10 copper MINCO_CA GE 10 Copper -51 to 260 -60 to 500
100 platinum SAMA 100 -51 to 593 -60 to 1100
100 platinum DIN 43760 -51 to 700 -60 to 1292
IEC-751
MINCO_PD
MINCO_PE
PT100_DIN
100 platinum MINCO_PA -51 to 700 -60 to 1292
IPTS-68
PT100_PURE
100 platinum MINCO_PB -51 to 700 -60 to 1292

Rosemount 104
PT100_USIND
120 nickel MINCO_NA -51 to 249 -60 to 480
N 120
200 platinum PT 200 -51 to 204 -60 to 400

Diagnostics
Three LEDs at the top of the VRTD front panel provide status information. The normal
RUN condition is a flashing green and FAIL is a solid red. The third LED is normally off,
but shows a steady orange if a diagnostic alarm condition exists in the board. Diagnostic
checks include the following:
Each RTD type has hardware limit checking based on preset (non-configurable) high
and low levels set near the ends of the operating range. If this limit is exceeded,
hardware limits is set, it creates a composite diagnostic alarm, L3DIAG_VRTD,
referring to the entire board. Details of the individual diagnostics are available
Each RTD input has system limit checking based on configurable high and low
levels. These limits can be used to generate alarms, and can be configured for
enable/disable, and as latching/non-latching. RESET_SYS resets the out of limit
signals. In TMR systems, limit logic signals are voted and the resulting composite
diagnostic is present in each controller.
The resistance of each RTD is checked and compared with the correct value, and if
high or low, a fault is created.
Each connector has its own ID device, which is interrogated by the I/O processor
board. The terminal board ID is coded into a read-only chip containing the terminal
board serial number, board type, revision number, and the connector location. If a
mismatch is encountered, a hardware incompatibility fault is created.

Configuration

Configuration
System limits Enable or disable all system limit checking Enable, disable
Auto reset Enable or disable restoring of RTDs removed from scan Enable, disable
Group A rate Sampling rate and system frequency filter for first group of 8 inputs 4 Hz, 50 Hz filter
4 Hz, 60 Hz filter
25 Hz
Group A gain Gain 2.0 is for higher accuracy if ohms <190, first group of 8 inputs Normal_1.0
Gain_2.0
10 ohm Cu_10.0
Group B rate Sampling rate and system frequency filter for second group of 8 inputs 4 Hz, 50 Hz filter
4 Hz, 60 Hz filter
25 Hz
Group B gain Gain 2.0 is for higher accuracy if ohms <190, second group of 8 inputs Normal_1.0
Gain_2.0
10 ohm Cu_10.0
J3J4:IS200TRTDH1C Terminal board Connected, not connected
RTD1 First of 16 RTDs - Board point signal Point edit (input FLOAT)
RTDRTD type RTDs linearizations supported by VRTD;VRTD select RTDRTD or Unused,
Ohms Input (unused inputs are removed from scanning) CU10, MINCO_CA,
PT100_DIN, MINCO_PD,
PT100_PURE,
MINCO_PA,
PT100_USIND,
MINCO_PB, N120,
MINCO_NA,
MINCO_PIA,
PT100_SAMA, PT200,
MINCO_PK, Ohms
SysLim1 Enable Enables or disables a temperature limit for each RTD,RTD can be Enable, disable
used to create an alarm
SysLim1 Latch Determines whether the limit condition will latch or unlatch for each Latch, unlatch
RTD;RTD reset used to unlatch.
SysLim1 Type Limit occurs when the temperature is greater than or equal (>=), or Greater than or equal
less than or equal to (<=) a preset value.
Less than or equal
System Limit 1 Enter the desired value of the limit temperature, Deg F or Ohms -60 to 1,300

SysLim2 Enable Enables or disables a temperature limit which can be used to create Enable, disable
an alarm
SysLim2 Latch Determines whether the limit condition will latch or unlatch; reset used Latch, unlatch
to unlatch.
SysLim2 Type Limit occurs when the temperature is greater than or equal (>=), or Greater than or equal
less than or equal to (<=) a preset value.
Less than or equal
System Limit 2 Enter the desired value of the limit temperature, Deg F or Ohms -60 to 1,300
TMR Diff Limt Limit condition occurs if 3 temperatures in R,S,T differ by more than a -60 to 1,300
preset value; this creates a voting alarm condition.
Board Point Signals Description-Point Edit (Enter Signal Connection) Direction Type
L3DIAG_VRTD1 Board diagnostic Input BIT
SysLim1RTD1 System limit 1 Input BIT
: : Input BIT
: : Input BIT

Alarms
go online)
to go online)
30 ConfigCompatCode mismatch; Firmware: [ ]; Tre: A tre file has been installed that is incompatible with
[ ]. The configuration compatibility code that the the firmware on the I/O board. Either the tre file or
31 IOCompatCode mismatch; Firmware: [ ] ; Tre: [ ] The A tre file has been installed that is incompatible with
32- 47 RTD [ ] high voltage reading, Counts are Y An RTD wiring/cabling open, or an open on the
VRTD board, or a VRTD hardware problem (such as
multiplexer), or the RTD device has failed.
48- 63 RTD [ ] low voltage reading, Counts are Y An RTD wiring/cabling short, or a short on the
64- 79 RTD [ ] high current reading, Counts are Y The current source on the VRTD is bad, or the
measurement device has failed.
80- 95 RTD [ ] low current reading, Counts are Y An RTD wiring/cabling open, or an open on the
96- 111 RTD [ ] Resistance calc high, it is Y Ohms. RTD [ ] The wrong type of RTD has been configured or
has a higher value than the table and the value is Y selected by default, or there are high resistance
values created by faults 32 or 35, or both 32 and 35.
112- 127 RTD [ ] Resistance calc low, it is Y Ohms. TRD [ ] The wrong type of RTD has been configured or
has a lower value than the table and the value is Y selected by default, or there are low resistance
values created by faults 33 or 34, or both 33 and 34.
128- 151 Voltage Circuits for RTDs, or Current Circuits for Internal VRTD problems such as a damaged
RTDs have Reference raw counts high or low, or reference voltage circuit, or a bad current reference
Null raw counts high or low source, or the voltage/current null multiplexer is
damaged.

152 Failed one Clock Validity Test, scanner still VME board, terminal board, or cable could be
running. In TMR mode, the firmware tests whether defective.
the three TMR boards are synchronized and will stop
scanning inputs under certain conditions
153 Failed one Phase Validity Test, scanner still running. VME board, terminal board, or cable could be
In TMR mode, the firmware tests whether the three defective.
TMR boards are synchronized and will stop scanning
inputs under certain conditions
154 Failed both Clock Validity Tests, scanner shutdown. VME board, terminal board, or cable could be
In TMR mode, the firmware tests whether the three defective.
TMR boards are synchronized and will stop scanning
inputs under certain conditions
155 Terminal Board connection(s) wrong. Cables Check cable connections.
crossed between <R>, <S>, and <T>
156 25 Hz Scan not Allowed in TMR Mode, please Configuration error. Choose scan of 4 Hz_50 Hz Fltr
reconfigure or 4 Hz_60 Hz Fltr.
160- 255 Logic Signal [ ] Voting mismatch. The identified A problem with the input. This could be the device,
signal from this board disagrees with the voted value. the wire to the terminal board, the terminal board,
or the cable.
256- 271 Input Signal [ ] Voting mismatch, Local [ ], Voted [ A problem with the input. This could be the device,

TRTD RTD Input
The RTD Input (TRTD) terminal board accepts 16, three-wire RTD inputs. These
inputs are wired to two barrier type terminal blocks. The inputs have noise suppression
circuitry to protect against surge and high frequency noise. TRTD communicates with
one or more I/O processors, which convert the inputs to digital temperature values and
transfer them to the controller.
There are four versions of TRTD as follows:
TRTDH1B is a TMR version that fans out the signals to three VRTD boards using
six DC-type connectors.
TRTDH1C is a simplex board with two DC-type connectors for VRTD.
TRTDH1D is a simplex board with two DC-type connectors for PRTD, normal scan.
TRTDH2D is a simplex board with two DC-type connectors for PRTD, fast scan.
Mark VI Systems
In the Mark* VI system, TRTDH1B and TRTDH1C works with the VRTD processor and
supports simplex and TMR applications. One TRTDH1C connects to the VRTD with two
cables. In TMR systems, TRTDH1B connects to three VRTD processors with six cables.
Mark VIe Systems
In the Mark VIe system, TRTDH1D and TRTDH2D works with the PRTD I/O pack and
support simplex applications only. Two PRTD packs plug into the TRTD for a total of
16 inputs.

TRTDH1C, H1D, H2D Terminal Board TRTDH1B Terminal Board
TRTD capacity for
+ 16 RTD inputs +
2 1 1
3 2
4 4 3
Eight RTD 6 5 DC-37 pin 5 JTA JTB
7 Connectors Eight RTD 6
Inputs 8 8 7
10 9 With latching Inputs 9
11 10
12 fasteners 12 11
14 13 13
15 14
16 16 15
18 17 17
19 18
20 JA1 20 19
22 21 21
23 22 JSA JSB
24 24 23
J Ports:
26 25 Plug in PRTD I/O Pack(s) 25

27 26
28 for Mark VIe 28 27
Eight RTD 30 29 29
31 or Eight RTD 30
Inputs 32 JB1 Cable(s) to VRTD 32 31
33 Inputs 33
34 35 34 JRA JRB
36 board(s) for Mark VI; 35
37 36 37
38 39 38
40 the number and location 40 39
42 41 41
43 depends on the level of 42
44 44 43
46 45 redundancy required . 45
47 46 47
48 48
+ +
Shield Barrier Type terminal

Bar Blocks can be unplugged
from board formaintenance
RTD Input Terminal Boards

Installation
Connect the wires for the 16 RTDs directly to the two terminal blocks on the terminal
board. Each block is held down with two screws and has 24 terminals accepting up to #12
AWG wires. A shield terminal strip attached to chassis ground is located immediately to
the left of each terminal block.
For CE mark applications, double-shielded wire must be used.

All shields must be terminated at the shield terminal strip. Do
not end shields located at the end device.
In a TMR Mark VI system, TRTDH1B provides redundant RTD inputs by fanning

the inputs to three VRTD boards in the R, S, and T racks. The inputs meet the same
environmental, resolution, suppression, and function requirements and codes as the
TRTDH1C terminal board; however, the fast scan is not available.

RTD Terminal Board TRTDH1C

x
x 1 Input 1 (Exc)
Input 1 (Sig) x 2
x 3 Input 1 (Ret)
Input 2 (Exc) x 4
Input 2 (Ret)
x 5 Input 2 (Sig)
x 6
x 7 Input 3 (Exc)
Input 3 (Sig) x 8
x 9 Input 3 (Ret)
Input 4 (Exc) x 10
x 11 Input 4 (Sig)
Input 4 (Ret) x 12
Input 5 (Sig)
x 13 Input 5 (Exc)
x 14
Input 6 (Exc) x 15 Input 5 (Ret) JA1
x 16
x 17 Input 6 (Sig)
Input 6 (Ret) x 18
x 19 Input 7 (Exc)
Input 7 (Sig) x 20
x 21 Input 7 (Ret) First 8 RTDs
Input 8 (Exc) x 22 J-Port Connections:
x 23 Input 8 (Sig) to JA1
Input 8 (Ret) x 24
x Plug in PRTD I/O Pack(s) for
Mark VIe
x
or
x 25 Input 9 (Exc)
Input 9 (Sig) x 26
x 27 Input 9 (Ret)
Input 10 (Exc) x 28 Cable to VRTD I/O board(s) for
x 29 Input 10 (Sig)
Input 10 (Ret) x 30 Mark VI;
x 31 Input 11 (Exc)
Input 11 (Sig) x 32 JB1
x 33 Input 11 (Ret) The number and location
Input 12 (Exc) x 34
x 35 Input 12 (Sig) depends on the number of
Input 12 (Ret) x 36
Input 13 (Sig)
x 37 Input 13 (Exc) inputs required.
x 38 Second 8
x 39 Input 13 (Ret)
Input 14 (Exc) x 40 RTDs to JB1
x 41 Input 14 (Sig)
Input 14 (Ret) x 42
Input 15 (Sig)
x 43 Input 15 (Exc)
x 44
Input 16 (Exc)
x 45 Input 15 (Ret)
x 46
x 47 Input 16 (Sig)
Input 16 (Ret) x 48
x
A Excxx
Application Note:
- Optional Ground: connnect the B wire to ground;
RTD
- RTD Group wiring, that is sharing the B wire;
B Sigxx
tie the B wires together at the RTDs,
C
Retxx tie the Sigxx signals together at the TRTD terminal
b board, and interconnect with one wire.
TRTDH1C RTD Terminal Board Wiring

Operation
TRTD supplies a 10 mA dc multiplexed (not continuous) excitation current to each RTD,
which can be grounded or ungrounded. The 16 RTDs can be located up to 300 m (984 ft)
from the turbine control cabinet with a maximum two-way cable resistance of 15 .
The A/D converter in the I/O processor samples each signal and the excitation current
four times per second for normal mode scanning and 25 times per second for fast mode
scanning, using a time sample interval related to the power system frequency. Software
performs the linearization for the selection of 15 RTD types.
RTD open and short circuits are detected by out-of-range values. An RTD that is
All RTD signals have high-frequency decoupling to ground at signal entry. RTD
multiplexing in the I/O processor is coordinated by redundant pacemakers so that the
loss of a single cable or I/O processor does not cause the loss of any RTD signals in
the control database.
TRTDH1C RTD I/O Processor Board

Terminal Board
I/O Processor is either
remote (Mark VI) or
Noise Excitation
suppression JA1 local (Mark VIe)
Excitation
RTD To
Signal NS controller
Return A/D
Processor VMEbus
Conv
Grounded or
ungrounded ID
(8) RTDs
Noise
Suppression JB1
Excitation
RTD
Signal NS JB1 cables to I/O processor
VRTD for Mark VI systems
Return or
Grounded or connects to PRTD I/O pack
ungrounded for Mark VIe systems
(8) RTDs ID
TRTD (Simplex) Inputs and Signal Processing

Signals
TerminalBoard TRTDH1B PM= Pacemaker
Tx = VRTD transmit
Rx = VRTD receive
Noise
JRA
suppression ID
Excitation
RTD PM, Tx
Signal NS PM, Rx, S
Return JSA
ID
Grounded or
ungrounded PM, Tx
(8) RTDs to JRA, JSA, JTA
PM, Rx, R
JTA
ID
PM, Tx
PM, Rx, R
Noise JRB
suppression ID
Excitation
RTD PM, Tx
Signal NS PM, Rx, T
Return JSB
ID
Grounded or
ungrounded (8) RTDs to JRB, JSB, JTB PM, Tx
PM, Rx, T
JTB
ID
PM, Tx
PM, Rx, S
TRTDH1 TMR-Capable RTD Terminal Board

Specifications
Item Specification
Number of channels Eight channels per terminal board
10 copper
120 nickel
Span 0.3532 to 4.054 V
Maximum lead resistance 15 maximum two-way cable resistance
Failed ID chip
RTD Accuracy
RTD Type Group Gain Accuracy at 400 F

120 nickel 120 nickel 2 F

100 platinum -51 to 240C (- 60 F to 400 F) Gain_ 2.0 2 F
10 copper 10 Cu_10 10 F


10 copper MINCO_CA GE 10 Copper -51 to +260 -60 to +500
100 platinum SAMA 100 -51 to +593 -60 to +1100
100 platinum DIN 43760 -51 to +700 -60 to +1292
IEC-751
MINCO_PD
MINCO_PE
PT100_DIN
100 platinum MINCO_PA -51 to +700 -60 to +1292
IPTS-68
PT100_PURE
100 platinum MINCO_PB -51 to +700 -60 to +1292
Rosemount 104
PT100_USIND
120 nickel MINCO_NA -51 to +249 -60 to +480
N 120
200 platinum PT 200 -51 to +204 -60 to +400

Diagnostics
Diagnostic checks include the following:
hardware limits is set, it creates a composite diagnostic alarm, L3DIAG_xxxx,
Configuration

DRTD Simplex RTD Input
The DRTD board does not work The Simplex RTD Input (DRTD) terminal board is a compact RTD terminal board
with the PRTD I/O pack. designed for DIN-rail mounting. The board has eight RTD inputs and connects to the
VRTD processor board with a single cable. This cable is identical to those used on
the larger TRTD terminal board. The terminal boards can be stacked vertically on the
DIN-rail to conserve cabinet space. Two DRTD boards can be connected to VRTD for a
total of 16 temperature inputs. Only a simplex version of the board is available.
Installation
There is no shield terminal strip Mount the plastic holder on the DIN-rail and slide the DRTD board into place. Connect
with this design. the wires for the eight RTDs directly to the terminal block. The Euro-Block type terminal
block has 36 terminals and is permanently mounted on the terminal board. Typically #18
AWG wires (shielded twisted triplet) are used. Terminals 25 through 34 are spares. Two
screws, 35 and 36, are provided for the SCOM (ground) connection, which should be
as short a distance as possible.
SCOM must be connected to
ground.

DRTD
Screw Connections
1 Input 1 (Excitation)
Input 1 (Signal) 2
3 Input 1 (Return)
Input 2 (Excitation) 4
5 Input 2 (Signal)
37-pin "D" shell Input 2 (Return) 6 Input 3 (Excitation)
JA1 Input 3 (Signal) 7
connector with latching 8
9 Input 3 (Return)
fasteners Input 4 (Excitation) 10
11 Input 4 (Signal)
Input 4 (Return) 12
Input 5 (Signal) 14
15 Input 5 (Return)
17 Input 6 (Signal)
Input 6 (Return) 18
Input 7 (Signal) 20
21 Input 7 (Return
23 Input 8 (Signal)
Input 8 (Return) 24
26 25
27
28
29
30
31
32
Cable to J3 or J4 33
34
connector in I/O rack 35 Chassis Ground
Chassis Ground 36
for VRTD board
SCOM
Euro Block type
terminal block
Plastic mounting
holder
DIN-rail mounting
Application Notes: Excxx A

- Optional Ground: connnect the "B" wire to ground;
- RTD Group wiring, that is sharing the "B" wire; RTD
tie the "B" wires together at the RTDs,
Sigxx B
tie the "Sigxx" signals together at the TRTD termination
C
board, and interconnect with one wire. b Retxx
DRTD Board Wiring and Cabling

Operation
The noise suppression on DRTD is similar to that on TRTD. High-density Euro-Block
type terminal blocks are permanently mounted to the board, with two screw connections
for the ground connection (SCOM). An on-board ID chip identifies the board to VRTD
for system diagnostic purposes.
<R> Control Rack
DRTD Terminal RTD Input Board VRTD

Board
Noise Excitation
. 16 RTD inputs
suppression JA1 J3
Excitation 1
A
RTD
B Signal 2 I/O Core
C
Processor
Return 3 TMS320C32
Grounded or SCOM
ungrounded Connectors at
(8) RTDs bottom of A/D Processor VME Bus
VME rack
ID Excit.
J4
VCO Type A/D

Connector for converter
cable from second
DRTD board
DRTD Board and VRTD Input Board

DRTD supplies a 10 mA dc multiplexed (not continuous) excitation current to each
RTD, which can be grounded or ungrounded. The eight RTDs can be located up to
300 meters (984 feet) from the turbine control cabinet with a maximum two-way cable
resistance of 15 .
VRTDs VCO type A/D converter uses voltage to frequency converters and sampling
counters. The converter samples each signal and the excitation current four times per
second for normal mode scanning and 25 times per second for fast mode scanning, using
a time sample interval related to the power system frequency. Software in the digital
signal processor performs the linearization for the selection of 15 RTD types.
RTD open and short circuits are detected by out of range values. An RTD that is

Specifications
Item Specification
Number of channels Eight channels per terminal board
10 copper
120 nickel
Span 0.3532 to 4.054 V
Maximum lead resistance 15 maximum two-way cable resistance
Failed ID chip


10 copper MINCO_CA GE 10 Copper -51 to +260 -60 to +500
100 platinum SAMA 100 -51 to +593 -60 to +1100
100 platinum DIN 43760 -51 to +700 -60 to +1292
IEC-751
MINCO_PD
MINCO_PE
PT100_DIN
100 platinum MINCO_PA -51 to +700 -60 to +1292
IPTS-68
PT100_PURE
100 platinum MINCO_PB -51 to +700 -60 to +1292
Rosemount 104
PT100_USIND
120 nickel MINCO_NA -51 to +249 -60 to +480
N 120
200 platinum PT 200 -51 to +204 -60 to +400

Diagnostics
hardware limits is set, it creates a composite diagnostic alarm, L3DIAG_xxxx,
Configuration

Servo Control (VSVA)
VSVA Servo Control
The Servo Control (VSVA) board controls up to four electro-hydraulic servo valves that
start the steam/fuel valves. These four channels are divided between two TSVA terminal
boards. The VSVA/TSVA boards provide triple modular redundancy (TMR) control
solution for retrofit applications where 3-coil servo valves are not present. Valve position
is measured with linear variable differential transformers (LVDT) or alinear variable
differential reluctance (LVDR) sensor. Applications allowing dual coil servo valve and
using either single or dual LVDT/LVDR sensors are supported.
Note This board is used typically for retrofit application. In these instances they
have a requirement for one or two coil servos, as opposed to three coil servos like the
VSVO is designed.
13-1 Servo Control (VSVA) GEH-6421Q Mark* VI Control

TSVA Terminal Board
VSVA Servo
Screw
Board
Locking Tab x
TB1 x
x JT1
x 2 x 1
RUN
x 4 x 3 FAIL
x 5 VME Bus to VCMI STAT
x 6
x 8 x 7
x 10 x 9
x 12 x 11
x 13 DC - 37
x 14 connectors with
x 16 x 15 J8
locking fasteners
x 18 x 17
x 20 x 19 JT 6 JS 1
x 22 x 21
x 24 x 23
Cables to
x VME Rack T
J7
x TB2
x 26 x 25 JS 6
x 28 x 27 From Second
x 30 x 29 TSVA
x 32 x 31 J5
x 33 JR 1
x 34
x 36 x 35 Cables to
x 38 x 37 JR 6 VME Rack S
x 40 x 39 JR 5 JS 5 JT 5 VSVA
x 42 x 41 x
x 44 x 43
x 45 Locking Tab
x 46 J3
x 48 x 47 Screw
x
x
P 12
Shield Bar
DA - 15 connectors with
locking fasteners Connectors on J4
VME Rack R
From Second TSVA
Barrier Type Terminal Cables to VME

Blocks can be unplugged Rack R
From Second TSVA
VSVA Processor Board, TSVA Terminal Board and Interconnect Cabling
GEH-6421Q System Guide, Volume II Servo Control (VSVA) 13-2

Installation
1. Power down the controller by turning off the power supply.
2. Loosen the top and bottom screws on the existing servo board, or cover plate.
3. Remove existing board (by pushing up on top extraction tab and pushing down on
lower extraction tab) or remove cover plate.
4. Ensure the board is in the top and bottom tracks.
5. Fully inset the board by pushing in at the top and bottom.
6. Lock the board in place by pushing down on the top and bottom locking tabs.
7. Tighten the top and bottom screws.
8. Power up the controller by turning on the power supply.
Note Sensors and servo valves are wired directly to two removable barrier type terminal
blocks mounted on each terminal board. Each block is held down with two screws, and
has 24 terminals accepting up to two #12 AWG wires each. A shield termination strip
attached to chassis ground is located immediately to the left of each terminal block.

Combined Servo Output/LVDT Terminal Board
TSVAH1A
x
x 1 LVDT 01 (H)
LVDT 01 (L) x 2
x 3 LVDT 02 (H)
LVDT 02 (L) x 4
LVDT 03 (L) x 6
x 5 LVDT 03 (H)
LVDT 04 (L) x 8
x 7 LVDT 04 (H)
x 9 NC
NC x 10
LVDT 06 (L) x 12
x 11 LVDT 06 (H)
Exc R1/S (L) x 14
x 13 Exc R1/S (H)
x 15 Exc R2/T (H)
Exc R2/T (L) x 16
Exc R1 (L) x 17 Exc R1 (H)
x 18
x 20
Exc S (L) x 22
x 21 Exc S (H)
Exc T (L) x 23 Exc T (H) Servo 1 Servo 2
x 24
x
120 mA 120 mA
JP1 JP6
80 mA 80 mA
JP2 JP7
x
Servo 1 R (L) x 25 Servo 1 R (H) 40 mA 40 mA

x 26
x 27 NC JP3 JP8
NC x 28
NC x 30
x 29 NC
20 mA 20 mA
x 31 NC
NC x 32 JP4 JP9
Servo 2 R (L) x 34
x 33 Servo 2 R (H)
x 35 NC 10 mA 10 mA
NC x 36
x 37 NC JP5 JP10
NC x 38
Pulse 02 (TTL) x 40
x 39 Pulse 01 (TTL)
Pulse 01 (24R) x 42
x 41 Pulse 01 (24V)
x 43 Pulse 01 (H)
Pulse 01 (L) x 44 Jumper Choices:
Pulse 02 (24R) x 46
x 45 Pulse 02 (24V) 120A 120 mA (40 ohm coil)
Pulse 02 (L) x 47 Pulse 02 (H) 80 80 mA
x 48
x 40 40 mA
20 20 mA
10 10 mA

point with 300 volt insulation from terminal board for maintenance
TSVA Terminal Board

Operation
The VSVA servo board contains I/O signal conditioning electronics along with a
microprocessor providing four channels of servo loop control with bi-directional servo
current outputs. Valve position is typically measured with either four wire LVDT or three
wire LVDR Sensors. Ten LVDT/LVDR position inputs, two pulse rate inputs and four
LVDT/LVDR excitation source outputs are supported on the VSVA/TSVA boards.
The VSVA/TSVA boards provide a TMR servo control solution using fanned in and
out control and feedback signals needed to support retrofits of older simplex control
applications which commonly have dual coil servo valves. The two coils are either tied
in parallel or split, and have either one or two LVDT/LVDR position feedback sensors
per valve.
One, two or three LVDT/LVDR valve position inputs can be assigned to a servo
control loop from 10 LVDT/LVDR inputs available for all four servo loops. Two Pulse
Rate inputs could be assigned for servo control loop applications requiring flow rate
measurement feedback.
The pulse rate inputs can be used for turbine speed control. It is important to ensure that
speed input signals meet the VSVA board input sensitivity-versus-frequency specification
and that they fall within a 2 Hz to 12 kHz frequency band.
VSVA boards located in the R, S and T VME racks provide individual (local) servo
current outputs that are combined on the TSVA terminal board to produce a TMR output.
A current sense resistor in series with the total servo current output is located on the
TSVA board providing total current feedback to the VSVA current regulator circuits. As
long as any two of the three VSVA boards are online and operating without faults, the
combined servo output loop will continue to function, allowing online replacement of any
one of the three VSVA boards. Refer to the figures for VSVA/TSVA inputs and outputs.
Each VSVA servo control loop output is equipped with an individual suicide relay under
firmware control. It opens the output current signal to the TSVA terminal board during
rack power off, during system startup, for over-current faults, and for out-of-range
position feedback faults.
Inputs, outputs, and critical internal VSVA board functions are continuously monitored
online for out-of-limit conditions. The VSVA servo board generates diagnostic alarms. It
sends associated fault messages to the operator interface as fault conditions are detected.
Green, red, and yellow LEDs on the VSVA front panel display the board-operating status.
Redundant one-bit serial communication busses allow the R, S, and T VSVA boards to
share critical status parameters. The decision to suicide servo current loop outputs, select
LVDT/LVDR excitation switchover sources, and check all three boards are using the
same parameters is continuously shared between VSVA boards over the serial busses.
The TSVA terminal board contains two removable I/O terminal blocks. The terminal
screws, each capable of accepting two #12 AWG wires, provide the interface I/O
customer sensor wiring. Each TSVA supports two servo control loop outputs plus
associated I/O feedback sensors. Signals are fanned in and out on the TSVA board to
and from the three VSVA (R, S, and T) boards. LVDT/LVDR inputs, excitation outputs,
pulse rate inputs and servo loop outputs are voltage-clamped and passively filtered
(suppressed) on the TSVA board. Servo cable lengths, up to 300 m (984 ft), are supported
with a maximum two-way cable resistance of 15 .
Three TMR VSVA boards are connected to either one or two TSVA terminal boards
using cables, with DC-37 pin connectors on each end, between the JR1, JS1, and JT1
connectors and the R, S, or T rack J3 or J4 backplane connectors. VSVA front panel
connectors, J7 and J8, supply feed back signals. They are connected to the TSVA board

JR6, JS6 or JT6 receptacles using twisted shielded pair cables with DA-15 connectors. J7
and J3 must connect to one of the TSVA boards, while J8 and J4 connect to the second
TSVA board, if used. Pulse rate inputs are fanned to the TMR VSVA boards through
twisted shielded pair cables, with DA-15 connectors, between J5 receptacles on the three
VSVA front panels and JR5, JS5 and JT5 receptacles on the TSVA. When Pulse Rate
inputs are used, J5 on the VSVA board must be connected to JR5 on the TSVA terminal
board. JR1 must be connected to J3 on the VME rack using cables with DC-37 pin
connectors. If Pulse rate inputs are not required, J5 can be left unconnected. If J5 is used,
then the J12 4 pin cable must connect the two TSVA boards.
Jumpers on the TSVA are configured to select appropriate in-line resistors that limit servo
output current overdrive depending on coil resistance. Jumpers JP1 through JP5 and JP6
through JP10 select resistors compatible with full-scale servo output current ranges of
10 mA, 20 mA, 40 mA, 80 mA, or 120 mA for servo output channels. Refer to the
figures for VSVA/TSVA inputs and outputs.
TSVA provides five channels of LVDT/LVDR differential inputs and two channels of
redundant automatically switched-over LVDT/LVDR excitation outputs at 7.10 Vrms at
3.2 kHz.
TSVA provides redundant LVDT/LVDR excitation switchover relays to automatically
select a good excitation source from an R, S, or T VSVA board. This feature ensures
that a failure of a single VSVA board will not result in the loss-of-excitation output on
the TSVA board. It also allows any one of the R, S, or T racks to be powered down to
support online VSVA board replacement. TSVA excitation outputs to LVDT/LVDR
sensors minimize effects on servo control when either the high or low side of the input
or output windings are inadvertently shorted to ground.
This excitation output switchover feature is especially useful for retrofit applications
using a single LVDT/LVDR position sensor. The excitation switchover source selection
commands are controlled by software on the R, S, and T VSVA boards, which
continuously monitor the excitation switchover outputs. A redundant hardware voter
circuit on the TSVA board ensures that a single fault on a VSVA board or rack power-off
condition will not result in loss-of -excitation output.
The two pulse rate circuits on the TSVA board have two current-limited 24 V dc outputs,
at 40 mA each, to supply power to active pulse rate input devices.

R
S
T
Controller
Terminal
Board TSVAH1A
(Input Portion) Servo Board
VSVAH1A
4 Circuits
LVDT A/ D Converter
LVDT1H 1 JR1 J3
Digital
3.2k Hz, A/D Regulator Servo
7 V rms Regulator
Excitation P28VR
Source LVDT1L 2 JS1 J3
P28V D/A
D/A Converter
SCOM Same for S
To Servo Driver
P28VS
or LVDR 5 Ckts. J3 pulse
JT1 Local To combined
rate Current Servo Outputs
Diode Same for T Sense TSVA
Voltage P28VT
Select
P24V1 41 CL P28V
Connector on
Front of VSVA
P24VR1 42 J5 Board in R Configurable
JR5 (R) Gain
P1TTL 39 Pulse
Pulse Rate CL
43 Rate
Inputs P1H J5
Active PR TMR Total
Probes TTL P1L 44 JS5 (S) Current
0 - 12 kHz Sense
45 Combined from
P24V2 J5 TMR TSVA
(PR only available 46 (T) Feedback
on 1 of 2 TSVA ) P24VR2 JT5 Control
40
P2TTL Configurable
Pulse Rate Gain
Inputs, P2H 47
PR
Magnetic MPU P2L 48 Excitation
Pickups to TSVA
0 - 12 kHz 3.2KHz
Excitation
Noise
Suppression
LVDT and Pulse Rate Inputs, TMR Servo Outputs
Note Signal pairs from LVDT/LVDR pulse rate devices are twisted shielded pairs.

R
S
T
Controller
Application Software Terminal Board TSVAH1A
(continued)
4 Circuits. TMR Combined

A/D Converter Servo Current Ranges
Digital 10,20,40,80,120 mA
A/D Regulator Servo
Regulator
From
TSVA Suicide 2 Circuits.
D/A
LVDT Relay JR1 TMR Total
Servo Driver 120 Current Sense
Local Current J3 80 25
Servo Coils
40
Sense 20 100 31 S1RH
10
Current
Limit N
Resistors S 26
Configurable
Gain S1RL
Combined
J5 TMR J7 JR6
Pulse Feedback
Rate Control
120
J3 JS1 80
Connector on 40
Configurable J7 Connector
front of VSVA on Front of
20
10
card Gain VSVA Board Current
Limit
Resistors
JS6
120
J3 JT1 80
40
20
10
Current
Limit
Resistors
Servo Board
JT6
VSVAH1A
Combined TMR Servo Output

R
S TSVAH1A Terminal Board
T (continued)
VSVAH1A Servo Card LVDT/LVDR Redundant

(continued) Excitation Switchover Diagram
Relay Coils
3.2 KHz at 7.0 Vrms EXR1 HW P28
LVDT Excitation K1 K2 K3 K4
EXS1 Voter
Outputs to TSVA
EXT1 Ckt's
J3 JR1 x4
3.2KHz P2 ERH1
ER1H 1:1 17
Sinewave
Generator ER1L ERL1
18
ER2H 1:1 ERH2
19
ER2L ERL2
20
K1A K2A
K3A K4A EDR1H 13
LVDT Excitation LVDT/LVDR
Source Selection EXR1
K1B K2B EDR1L 14 Excitation
Outputs to TSVA EXR2
Output 1
K3B K4B
LV5H
RMS Det. LV5L To JS1 & JT1
LV6H To JS1 & JT1 LV6H 11
RMS Det. LV6L To JS1 & JT1 12
To JS1 & JT1 LV6L
J3 JS1
ES1H 1:1 ESH
21
LVDT ES1L ESL
22
Excitatio ES2H
n N.C. K5A K6A
Loss ES2L EDR2H
Detector K7A K8A 15 LVDT/LVDR
EXS1 N.C.
EXS2 EDR2L 16 Excitation
LV5H K5B K6B Output 2
LV5L
LV6H K7B K8B
LV6L
J3 JT1
ET1H 1:1 ETH
23
ET1L ETL
24
ET2H
N.C.
ET2L N.C.
EXT1 P28
EXT2 Relay Coils
LV5H
LV5L
LV6H EXR2 HW K5 K6 K7 K8
LV6L EXS2 Voter
EXT2 Ckt's
x4
LVDT Excitation Switchover Source Selection Relays

R
VSVA
S
VSVA
TSVA
2
JR1 2
37 Pin Cables 2
T
VSVA
2
JS1 2
2
2
JT1 2
J3XX 2
J4XX
TSVA
J3XX
2
JR1 2
2
J4XX
2
J3XX JS1 2
2
J4XX 2
JT1 2
2
VSVA-to-VSVA Serial Communications Bus Interconnection Diagram

Data Format / Transfer Rates for VSVA-to-VSVA Serial Communication Bus
VSVA Function Data Type State Definition VSVA to VSVA Transfer

Rate
Servo outputs 1-4 Servo over-current status bit 1 = Over current 14.4 ms
over-current status 0 = Normal
Servo outputs 1-4 Servo local current polarity status bit 1 = Positive 14.4 ms
local current polarity 0 = Negative
LVDT excitation - out 1 and 3 LVDT source selection status bit 1=S 432 ms
source selection 0 = R1
LVDT excitation - out 2 and 4 LVDT source selection status bit 1=T 432 ms
source selection 0 = R2
Check of R, S, and T Cyclic redundancy check (CRC) of R, S, and T CRCs must 432 ms
VSVA critical configuration critical configuration parameters match at power-up
parameter match at power-up
Examples that define both internal cable and customer sensor wire interconnections to
VSVA and TSVA boards are shown in the following five examples.
Example 1: Two Dual Coil Servo Valves and Single LVDT/LVDR
The first example supports two dual coil servo valves with coils electrically connected in
parallel, and a single LVDT/LVDR position feedback device per valve. Only one servo
valve and associated feedback device are connected to each one of the two TSVA boards.
This supports online TSVA replacement with the loss of only one servo valve function.
Three TMR VSVA boards plus two TSVA boards control a total of two servo valves plus
associated LVDT/LVDR position feedback devices.
This configuration supports steam turbine control retrofit applications that can continue
to operate with the loss of any single servo controlled steam valve. No single point
fault, including online replacement of a TSVA board, will result in losing more than one
servo valve control function. VSVA boards and cables can be replaced online without
the losing servo output functions.
Three TMR VSVA boards, R, S, and T, connect to either one or two TSVA terminal
boards using cables, with DC-37 pin connectors, between the TSVA JR1, JS1 and JT1
connectors and the R, S, or T VME rack backplane J3xx or J4xx connectors. JR6, JS6
and JT6 TSVA connectors feed total servo output combined current sense signals back
to the associated VSVA front panel connectors, J7 and J8, using twisted/shielded pair
cables with DA-15 pin connectors. The J7 and J3xx cables must connect to one of the
TSVA boards, while J8 and J4xx must connect to a second TSVA board, if used. Pulse
rate inputs are fanned into the three TMR VSVA boards using twisted/shielded pair
cables, with DA-15 pin connectors, connected between the J5 connectors on the VSVA
front panels and JR5, JS5, and JT5 connectors on the TSVA. When pulse rate inputs are
used, the J5 cables must be connected to the TSVA board associated with the J3xx 37
pin backplane cable. If pulse rate inputs are not required, connecting the J5 cables is
unnecessary. The 4-pin J12 connectors and cable connect the LVDT switchover relay
status between two TSVA boards. If the J5 cable is not used, the J12 cable is not needed.
Refer to the figure, Application Example 1: Two Dual Coil Servo Valve with Tied Coils
and One LVDT/LVDR per TSVA.
Spare I/O resources are wired at the TSVA terminal block providing redundant
monitoring functions improving VSVA board fault detection and localization. For
example: LVDT inputs 1, 2, and 3 are wired together on the TSVA terminal block
using three different LVDT/LVDR input cables and conditioning circuits on the VSVA

and TSVA boards. Selecting a three-position, mid-select regulator configuration for
regulator 1 and servo output 1 ensures a single fault in any of the three LVDT/LVDR
input conditioning circuits or cables will not adversely affect the servo outputs. Mode
1 configuration enables limit checking on the VSVA board between the three LVDT
regulator inputs while detecting and reporting disagreements between them. Mode 1 also
enables limit checking between LVDT inputs 7, 8, and 9 assigned to servo regulator 3
and servo output 3. Refer to the Configuration section for more detailed information.
Mode 1 configuration checks the R1 excitation sources of both TSVA boards, enhancing
fault detecting and reporting capability.
LVDT inputs 6 and 12 are wired at the TSVA terminal block redundantly monitoring
LVDT excitation switchover outputs 1 and 3. Circuits on the VSVA boards use LVDT
inputs 5 and 11 to detect loss-of-excitation, controlling the excitation 1 and 3 output
switchover functions. LVDT inputs 5 and 11 are internally fed back on the TSVA to the
VSVA boards. Refer to the Configuration section for more detailed information.
Mode 1 only checks the following defined functions: detecting LVDT/LVDR
disagreements and generating diagnostic alarms/messages.

TSVA Terminal Board
17
"R" VSVA 18
x
R1 13 C
B
15 & 37 Pin Cables 14 A
S
J8
15 LVDR
R2
VALVE
J7 T 16 A
JR1 11
LV6 12
J5
LV5 25 SERVO
JS1 SV1 26 VALVE
x
33 A
JT1 34
J3 SV2
1
JR6 LV1 2
J4 3
JS6 LV2 4
LVDT Inputs
5
"S" VSVA JT6
x
LV3 6
JR5 7
LV4 8
JS5 43
J8 PR1
44
JT5 47
PR2
J7 48
J12
TSVA Terminal Board
17
J5 18
x R1 13 C
B
S 14 A
J3
15
R2 LVDR
J4 VALVE
T 16 B
11
"T" VSVA JR1
LV6
x
12
LV5 25 SERVO
JS1 SV1 VALVE
26
B
33
J8 SV2
JT1 34
JR6 LV1 12
J7 3
JS6 LV2 4
LVDT Inputs
J5 5
JT6 LV3 6
7
x JR5 LV4 8
J3 43
JS5 PR1
44
47
J4 JT5 PR2
48
4 Pin Cable J12
Application Example 1: Two Dual Coil Servo Valve with Tied Coils and One LVDT/LVDR per TSVA

Example 2: Four Dual Coil Servo Valves and Single LVDT/LVDR
The second application example supports four dual coil servo valves with tied coils
and a single LVDT/LVDR position feedback device per servo valve. Two servo valves
and associated feedback devices are connected to each of the two TSVA boards. The
three TMR VSVA boards plus two TSVA boards and associated cables shown in the
following figure provide servo control outputs for up to four servo valve functions. The
VSVA boards and internal cables can be replaced online without the loss of servo output
functions. Online replacement of a TSVA board will result in the loss of up to two servo
valve control functions during the replacement time period.
Spare I/O resources are wired at the TSVA terminal block providing redundant
monitoring functions enhancing VSVA board fault detecting and localization. For
example: LVDT inputs 1 and 2 are wired together on the TSVA terminal block utilizing
two different LVDT/LVDR input cables and input conditioning circuits on the VSVA and
TSVA boards. A two position, minimum or maximum, regulator configuration can be
selected for regulators 1 - 4 and servo outputs 1 - 4 ensuring a single fault in either of
two associated LVDT/LVDR input conditioning circuits will not affect the servo output
functions. A mode 2 configuration should be selected enabling limit checking on the
VSVA board between LVDT/LVDR regulator inputs 1 and 2, assigned to servo channel
1, detecting and reporting disagreements between them. Mode 2 enables limit checking
between LVDT input pairs 3 - 4, 7 - 8, and 9 - 10 assigned to servo regulators and servo
outputs 2 through 4. Refer to the Configuration section for more detailed information on
mode 2 servo configuration and operation. Refer to the figure, Application Example 2:
Four Dual Coil Servo Valves with Tied Coils-One LVDT/LVDR per Valve.
Mode 2 checks for LVDT/LVDR input pair disagreements for monitors 1 through 12
when configured to a 2_LVposMIN or 2_LVposMAX configuration and assigned to input
pairs 1 - 2, 3 - 4, 7 - 8, and 9 - 10. Each of the input pairs must be assigned to one of the
12 monitoring functions when enabling mode 2.
Mode 2 only checks between LVDT/LVDR specified pairs on regulators and monitors
detecting disagreements that generate diagnostic alarms and messages.
LVDT input 6 and 12 are wired at the TSVA terminal block to monitor and control
LVDT excitation switchover outputs 2 and 4. Excitation switchover outputs 1 and 3 are
monitored and controlled using LVDT/LVDR inputs 5 and 11. These are internally fed
back to the TSVA detecting loss-of-excitation. Refer to the Configuration section for
specifics on setting up and enabling LVDT excitation switchover circuit function.

"R" VSVA TSVA Terminal Board
x 13
R1 C LVDR
B
15 & 37 Pin Cables 14 A VALVE A
S
J8 15
LVDR
R2 C
B VALVE B
16 A
J7 JR1 T
11
LV6 12
J5 25
LV5
JS1 SERVO
SV1 26
x
VALVE A
33
SERVO
SV2 34
J3 VALVE B
JT1 1
JR6 LV1 2
J4 3
JS6 LV2 4 LVDT Inputs
5
"S" VSVA JT6
x
LV3 6
JR5 7
LV4 8
JS5 43
J8 PR1
44
JT5 47 SPEED PICKUPS
PR2
48
J7 J12
TSVA Terminal Board

J5 13
R1 C LVDR
B
x 14 A VALVE C
S
15 LVDR
J3 C
R2 VALVE D
B
16 A
T
J4 JR1
11
LV6 12
"T" VSVA LV5 25
x SERVO
JS1 SV1 26
VALVE C
33
SV2
SERVO
34
J8 1
VALVE D
JT1
JR6 LV1 2
3
J7 JS6 LVDT Inputs
LV2 4
5
JT6 LV3 6
J5
JR5 7
LV4 8
x
JS5 43
PR1
J3 44
JT5 47
PR2
48
J4 J12
4 Pin Cable
Application Example 2: Four Dual Coil Servo Valves with Tied Coils -One LVDT/LVDR per Valve

Example 3: Four LVDT/LVDR Valve Position Only Monitors
The third application example shows supports four LVDT/LVDR valve position only
monitors. LVDT/LVDR position information from four remotely driven servo valves is
monitored using this configuration. This configuration was developed to support NSTC
monitoring valve positions on customer-controlled valves.
The three TMR VSVA boards plus two TSVA boards and associated cables shown in
the following figure provide four LVDT/LVDR excitation sources and LVDT/LVDR
input position monitoring functions supporting four customer-controlled valves. The
VSVA boards and internal cables can be replaced online without losing LVDT/LVDR
excitation/monitor functions. Online replacement of a TSVA board can result in the loss
of two servo valve monitoring functions during the replacement time period.
LVDT/LVDR input pairs 1 - 2, 3 - 4, 7 - 8, and 9 - 10 are wired at the TSVA terminal
block providing redundant monitoring, enhancing VSVA board fault detecting and
localization. For example: LVDT inputs 1 and 2 are wired together on the TSVA
terminal block utilizing two different LVDT/LVDR input cables and input conditioning
circuits. A two position minimum or maximum monitor configuration can be selected
for monitors 1 through 12 ensuring a single fault in either of the two LVDT/LVDR
input conditioning circuits will not affect the related LVDT/LVDR monitoring function.
A mode 2 configuration can be selected enabling limit checking on the VSVA board
between the two LVDT/LVDR monitor inputs for detecting and reporting disagreements
between LVDT input pairs 3 - 4, 7 - 8, and 9 - 10 assigned to one of the 12 monitors.
Each of these input pairs must only be assigned to one of the 12 monitor functions when
enabling mode 2. Refer to the Configuration section for more detailed information on
mode 2 servo configuration and operation. Refer to the figure, Application Example 3:
Four LVDT/LVDR Value Position Monitors Only Configuration.
LVDT inputs 6 and 12 are wired at the TSVA terminal block monitoring and controlling
monitored and controlled based on LVDT/LVDR inputs 5 and 11. These are internally
fed back to the TSVA board detecting loss-of-excitation. Refer to the Configuration
section for more detailed information on setting up and enabling LVDT excitation
switchover circuit function.

"R" VSVA TSVA Terminal Board
x 13
R1 C
B
LVDR
15 & 37 Pin Cables 14 A VALVE A
S
J8 15
LVDR
R2 C
B VALVE B
16 A
J7 JR1 T
11
LV6 12
J5 LV5 25
JS1 SV1 26
x
33
J3 SV2 34
JT1 1
JR6 LV1 2
J4 3
5
"S" VSVA JT6
x
LV3 6
JR5 7
LV4 8
JS5 43
J8 PR1
44
PR2
48
J7 J12
TSVA Terminal Board

J5 13
R1 C LVDR
B
x 14 A VALVE C
S
15 LVDR
J3 C
R2 VALVE D
B
16 A
T
J4 JR1
11
LV6 12
"T" VSVA LV5
x 25
JS1 SV1 26
33
SV2 34
J8 1
JT1
JR6 LV1 2
3
J7 JS6 LVDT Inputs
LV2 4
5
JT6 LV3 6
J5
JR5 7
LV4 8
x
JS5 43
PR1
J3 44
PR2
48
J4 J12
4 Pin Cable
Application Example 3: Four LVDT/LVDR Valve Position Monitors Only Configuration

Example 4: Two Dual Coil Servo Valves and Two LVDT/LVDR
Devices
The fourth application example supports two dual coil servo valves with split coils and
two separate LVDT/LVDR devices per servo valve. The split coils of the two servo
valves and the associated LVDT/LVDR devices are divided between the two TSVA
boards as shown in the following figure. This supports changing VSVA boards, TSVA
boards and cables while online without losing either of the two servo output functions.
Loss of one servo control output channel to one of the two split servo coils will result
in a 50% reduction in gain and null bias.
Spare I/O resources are wired on the TSVA terminal block providing redundant
monitoring functions while enhancing VSVA board fault detection and localization.
For example: LVDT inputs 1 and 2 are wired together on the TSVA terminal block.
They utilize two different LVDT/LVDR input cables and input conditioning circuits
on the VSVA and TSVA boards while monitoring a single LVDT/LVDR input. A two
position minimum or maximum monitor arrangement can be configured using monitor 1.
LVDT/LVDR inputs 3 - 4, 7 - 8, and 9 - 10 can be configured using monitor 3, monitor
7, and monitor 9. A mode 2 configuration can be selected enabling a limit check on
the VSVA board between these pairs of LVDT/LVDR monitor inputs detecting and
reporting disagreements between them. Refer to the Configuration section for more
detailed information on Mode 2 monitor configuration and operation. Refer to the figure,
Application Example 4: Two Dual Coil Valves with Split Coils - Two LVDT/LVDRs
per Valve.
LVDT input 6 and 12 are wired at the TSVA terminal block to monitor and control
monitored and controlled based on LVDT/LVDR inputs 5 and 11. These are internally
fed back on the TSVA to detect loss-of-excitation. Refer to the Configuration section for
specifics on setting up and enabling LVDT excitation switchover circuit functions.

"R" VSVA TSVA Terminal Board LVDR A
x 13 VALVE A
R1 C
B
15 & 37 Pin Cables 14 A
S
J8 15 LVDR B
R2 C VALVE B
B
16 A
J7 JR1 T
11
LV6 12 SERVO
J5 LV5 25 VALVE A
JS1 SV1 26
x
33
J3 SV2 34
JT1 1
JR6 LV1 2
J4 3
5
"S" VSVA JT6
x
LV3 6
JR5 7
LV4 8
JS5 43
J8 PR1
44
PR2
48
J7 J12
TSVA Terminal Board LVDR B

J5 13 VALVE A
R1 C
B
x
S 14 A
15
J3
R2 C
B
T 16 A
J4 JR1
11 LVDR A
LV6 12 VALVE B
"T" VSVA LV5 25
x
JS1 SV1 26
33
SV2 34
J8 1 SERVO
JT1
JR6 LV1 2 VALVE B
3
J7 JS6 LV2 4 LVDT Inputs
5
JT6 LV3 6
J5
JR5 7
LV4 8
x
JS5 43
PR1
J3 44
PR2
48
J4 J12
4 Pin Cable
Application Example 4: Two Dual Coil Valves with Split Coils Two LVDT/LVDRs per Valve

Example 5: Single Servo Valve - Dual LVDT/LVDR One Value
Per Terminal Board
The fifth application example supports a single-coil servo valve with two separate
LVDT/LVDR devices per servo valve. The single-coil servo valve and the associated
LVDT/LVDR devices are supported by a single TSVA terminal board as shown in the
following figure.
Spare I/O resources are wired on the TSVA terminal block providing redundant
monitoring functions while enhancing the VSVA board fault detection and localization.
For example: LVDT inputs 1 and 2 are wired together on the TSVA terminal block.
They utilize two different LVDT/LVDR input cables and input conditioning circuits
on the VSVA and TSVA boards while monitoring a single LVDT/LVDR input. A two
position minimum or maximum monitor arrangement can be configured using monitor
1. LVDT/LVDR inputs 3-4, 7-8 and 9-10 can be configured using monitor 3, monitor 7
and monitor 9. A mode 2 configuration can be selected enabling a limit check on the
VSVA board between these pairs of LVDT/LVDR monitor inputs detecting and reporting
disagreements between them. Refer to the Configuration section for more detailed
information on Mode 2 monitor configuration and operation.
"R"
V SINGLE SERVO VALVE - DUAL LVDT/LVDR
SJ8 ONE VALVE PER TERMINAL BD
VJ7
A TSVA LVDR 1
J5 VALVE A
R1 C
B
J3XX
S A
J4XX R2 C
B
T
A
LVDR2
"S" LV5 VALVE A
V JR1
SJ8 LV6
VJ7
JS1
A SV1
J5
SERVO
JT1 SV2
VALVE A
J3XX
JR6
LV1
J4XX
JS6
LV2 LVDT Inputs
JT6
LV3
"T"
JR5
V LV4
J8
S JS5
VJ7 PR1
A JT5
SPEED PICKUPS
J5 PR2
J3XX
J4XX
Application Example 5: Single Servo Valve - Dual LVDT/LVDR

Typical Servo Coil Ratings
Coil Type Nominal Nominal Coil Typical Servo Rated Current Internal TSVA J1 J10
Current Resistance Design for Rated Flow Resistance TSVA Jumper
(/Coil) () Setting
1 10 mA 1,000 2 and 3 Coil Gas 10 mA 102 10 mA
2 20 mA 250 25 GPM, 3 and 4 16 mA 416 20 mA
Way, 2 Coil
3 20 mA 500 70 GPM, 3 Way, 2 17 mA 416 10 mA
Coil
4 40 mA 125 50 GPM, 4 Way, 2 34.5 mA 185 40 mA
Coil
The above table defines standard servo coil resistance and associated internal resistance,
selectable with the terminal board jumpers shown in the preceding figure. In addition,
non-standard jumper settings could be used to drive non-standard coils. The total
resistance would be equivalent to the standard setting.
Control valve position is sensed with either a four wire LVDT or a three-wire linear
variable differential reluctance (LVDR). The application software allows maximum
flexibility checks for the feedback devices. LVDT/LVDRs can be mounted up to 300 m
(984 ft) from the turbine control with a maximum two-way cable resistance of 15 .
Note The excitation source is isolated from signal common (floating) and is capable of
operation at common mode voltages up to 35 V dc, or 35 V rms, 50/60 Hz
Two LVDT/LVDR excitation sources are located on each terminal board for Simplex
applications and another two for TMR applications. Excitation voltage is 7 V rms and
the frequency is 3.2 kHz with a total harmonic distortion of less than 1% when loaded.
A typical LVDT/LVDR has an output of 0.7 V rms at the zero stroke position of the
valve stem, and an output of 3.5 V rms at the designed maximum stoke position (some
applications have these reversed). The LVDT/LVDR input is converted to dc and
conditioned with a low pass filter. Diagnostics perform a high/low (hardware) limit check
on the input signal and a high/low system (software) limit check.
Two pulse rate inputs are cabled to a single J5 connector on the VSVA board front. This
is a dedicated connection minimizing noise sensitivity on the pulse rate inputs.
Inputs support both passive magnetic pickups and active pulse rate transducers (TTL
type). Both are interchangeable without configuration. Pulse rate inputs can be located
up to 300 m (984 ft) from the turbine control cabinet, provided 70 NF shielded-pair cable
is used or 35 NF differential capacitance with 15 resistance.
A frequency range of 2 to 12 kHz can be monitored at a normal sampling rate of either
10 or 20 ms. Magnetic pickups typically have an output resistance of 200 and
an inductance of 85 mHz excluding cable characteristics. The transducer is a high
impedance source, generating energy levels insufficient to cause a spark.
Note The maximum short circuit current is approximately 100 mA with a maximum
power output of 1 W.

Specifications
Item Specification
Number of inputs (per TSVA) LVDT 1-4 and 6. Five LVDT windings
Two pulse rate signals (total of two per VSVA)
Number of outputs (per TSVA) Two servo valves (total of four per VSVA board)
Four excitation sources for LVDTs
Two special TMR switchover LVDT/LVDR excitation sources
Two excitation sources (24 V dc) for pulse rate transducers
Internal sample rate 200 Hz
Pulse Rate Excitation Source (TSVA) Nominal 24 V dc 40 mA max
LVDT accuracy 1% with 14-bit resolution
LVDT input filter Low pass filter with three down breaks at 50 rad/sec 15%
LVDT common mode rejection CMR is 1 V, 60 dB at 50/60 Hz
LVDT excitation output Frequency of 3.2 0.2 kHz
Voltage of 7.00 0.14 V rms
Pulse rate accuracy 0.05% of reading with 16-bit resolution at 50 Hz frame rate
Noise of acceleration measurement is less than 50 Hz/sec for a 10,000
Hz signal being read at 10 ms
Pulse rate input Minimum signal for proper measurement at 4 Hz is 33 mVpk, and at 12
kHz is 827 mVpk.
Magnetic PR pickup signal input Generates 150 V peak-to-peak into 60 k
Active PR Pickup Signal input Generates 5 to 27 V peak-to-peak into 60 k
Servo valve output accuracy 2% with 12-bit resolution
Dither amplitude and frequency adjustable; unused, 12.5 Hz, 25 Hz, 33.33
Hz, 50 Hz, 100 Hz; 0 to 10% Amplitude
Fault detecting Suicide servo outputs initiated by:
Servo current out of limits
Regulator feedback signal out of limits
Diagnostics
Three LEDs at the top of the VSVA front panel display status information. The normal
RUN condition is a flashing green, and FAIL is solid red. The third LED is normally off
but displays a steady orange if an alarm condition exists on the board.
Servo diagnostics cover items such as out of range LVDT voltage, servo suicide, servo
current open circuit, and short circuit. If any one of the signals goes unhealthy a
composite diagnostic alarm, L3DIAG_VSVA# occurs. If the associated regulator has
two sensors, the bad sensor is removed from the feedback calculation and the good
sensor is used. Details of the individual diagnostics are available from the toolbox. The
diagnostic signals can be individually latched, and reset with the RESET_DIA signal
if they go healthy.
Connectors JR1, JS1, JT1, JR6, JS6, JT6, JR5, JS5 and JT5 on the TSVA terminal board
have their own ID device that is interrogated by the VSVA board. The ID device is a
read-only chip coded with the terminal board serial number, board type, revision number,
and the plug location.

Configuration
Jumpers on the TSVA must be configured to select appropriate in-line resistors that limit
Servo output current overdrive. Jumpers JP1 to JP5 and JP6 to JP10 select resistor values
that are compatible with full-scale servo output currents of 10 mA, 20mA, 40 mA, 80
mA or 120 mA for servo output channels 1 and 2 respectively.

Configuration
System Limits Enable / Disable system limits for Pulse Rate Inputs. Enable, disable
Mode Modes 1 and 2 for specific VSVA board applications. Unused, Mode 1, Mode 2
Mode 1:
Mode1 generates diagnostic alarms for applications using
one servo valve with dual coils tied in parallel and a single
LVDT for position feedback. Only one servo valve and
associated LVDT is supported per TSVA terminal board.If
Regulator 1 and 3 is used, RegType must be selected to
3_LV_PosMid using LVDT inputs 1, 2 and 3 and 7,8 and 9
respectively.
Regulators 2 and 4 must be selected to RegType unused.
A diagnostic alarm is generated when an LVDT input
assigned to Regulator 1 or 3 exceeds the TMR_DiffLimt
referenced to the voted median value.
If Monitors 4 and 10 are used, they must be assigned to
LVDT inputs 4 and 10 respectively. A diagnostic alarm will be
generated if LVDT input 4 or 10 is < 6.6 Vrms or > 7.7 Vrms.
Excitation sources J3 ER1 and J4 ER1 must be wired to
LVDT Inputs 4 and 10 respectively if Monitors 4 and 10 are
used.
Mode 2:
Mode2 generates diagnostic alarms for applications using
one or two servo valves with dual split coils and one or two
LVDTs each for position feedback.
These applications will typically split the servo valves and
LVDTs between the two TSVA terminal boards.
Mode2 also supports four-valve LVDT position monitoring
only applications.
If Regulators 1,2,3 or 4 are used, they must be selected to
RegType 2_LV_PosMAx or Min using LVDT input pairs (1,2)
(3,4) (7,8) (9,10) respectively.
If Monitors 1-12 are used and assigned to any of LVDT input
pairs (1,2) (3,4) (7,8) or (9,10), they must be selected to
RegType 2_LV_PosMax or Min. Only one Monitor can be
assigned to one of these pairs.
If a Regulator or Monitor is assigned LVDT input pairs (1,2)
(3,4) (7,8) or (9,10) and the difference within the pair exceeds
the associated TMR_DiffLimt value, a diagnostic alarm will
be generated.

SrvOcSiucHld If an over-current condition exists on a used Servo Output Unused, 10 ms, 15 ms, 20 ms, 25
1,2,3 or 4 and it exceeds the selected Curr_Suicide value, ms, 30 ms, 35 ms, 40 ms, 45 ms,
the suicide command will be held off for this time interval 50 ms
to prevent suicide action on a short transient over-current
condition.
LvdtExFlHold Hold-off time to allow LVDT input hardware filter recovery Unused, 5 ms, 10 ms, 15 ms, 20
when LVDT Excitation source switch over occurs. The LVDT ms, 25 ms, 30 ms, 35 ms, 40 ms
input retains last known good value for the time selected.
Regulators
Regulator 1
RegType Algorithm used in the regulator Unused, no_fbk,
1_PulseRate, 2_PlsRateMAX,
1_LVPosition,2_LV_PosMIN,
2_LV_PosMAX,3_LV_PosMid,
2_LV_pilotCyl 4_LVp/cylMAX
RegGain Position loop gain in (%current/%position) Gain -200 to 200
RegNullBias Null bias in % current, balances servo spring force Null Bias -100 to 100
DitherAmpl Dither in % current (minimizes hysteresis) Dither amp: 0 to 10%
Dither Frequency Dither Frequency in Hz Dither Frequency: unused,
12.5Hz, 25Hz, 33.33Hz, 50Hz,
100Hz
MinPOSvalue Position at Min End Stop in engineering units Range: -15 to 150
MAxPOSvalue Position at Max End Stop in engineering units Range: -15 to 150
LVDT#input LVDT Input Selection Unused; LVDT 1 through 12
MnLVDT#_Vrms LVDT# Vrms at Min End Stop Normally set by Range: 0 to 10
Auto-Calibrate
MxLVDT#_Vrms LVDT# Vrms at Max End Stop Normally set by Range: 0 to 10
Auto-Calibrate
LVDT_MArgin Allowable Range Exceeded Error of LVDT in Percent Range: 0 to 7.1
TMR_DiffLimit Diagnostic, Limit TMR Input Vote Difference, Position in Range: -15 to 150
Engineering Units
Monitor 1
Monitor type Monitor algorithm Unused, 1_Lvposition,
2_LVposMIN, 2_LVposMAX,
3_LVposMID
MinPOSvalue Position at Min End Stop in engineering units Range: -15 to 150
MAxPOSvalue Position at Max End Stop in engineering units Range: -15 to 150
LVDT#input LVDT Input Selection Unused: LVDT 1 through 12
MnLVDT#_Vrms LVDT# Vrms at Min End Stop Normally set by Range: 0 to 10
Auto-Calibrate
MxLVDT#_Vrms LVDT# Vrms at Max End Stop Normally set by Range: 0 to 10
Auto-Calibrate
LVDT_MArgin Allowable Range Exceeded Error of LVDT in Percent Range: 0 to.7.1

Engineering Units
Monitor 2
Monitor 12
J3:IS200TSVAH1A Terminal board 1 connected to VSVA through J3 J3 connected, not connected
ExctFailOvr1 Excitation 1 Failover Status: indicates whether excitation (Input BIT)
source R1 or Excitation source S is selected. (R1=0; S=1)
ExciteMode If both LVDT Excitation Failover Outputs 1 and 2 are required, Independent, Redundant
independent should be selected.
If only LVDT Excitation Failover Output 1 is required,
redundant should be selected and LVDT Input 6 must be
wired to LVDT Excitation Failover Output 1. This provides
redundant monitoring of LVDT Input 5 failover detecting
circuits. Switch_R2T must be set to Disable.
Switch_R1S Disable or Enable Excitation 1 Failover. Disable, Enable
RndtLvdtDiag Enable - Configures LVDT 6 Input as a redundant monitor Disable, Enable
of excitation Source Select 1 switchover logic. Produces a
Diagnostic if disagreement occurs.
source R2 or Excitation source T is selected. (R2=0; T=1)
Switch_R2T Disable or Enable Excitation 2 Failover. Set to Disable if Disable, Enable
ExciteMode is set to Redundant.
Servo Output1 Measured Servo Output 1 Current Total in Percent (Input FLOAT)
Reg Number Identify regulator number Unused, Reg1, Reg2, Reg3,
Reg4
Servo_mA_Out Select current output for coil windings 10, 20, 40, 80, 120 mA
EnableCurSuic Select Suicide function based on current Enable, disable
Curr_Suicide Percent current error to initiate suicide 75 to 125% (output current error)
EnablFbkSuic Select Suicide function based on feedback Enable, disable
Fdbk_Suicide Percent position error to initiate suicide 0 to 10% (actuator position error)
Engineering Units
AVSelector Assings One of Five parameters to AntiVotes, to support
toolbox monitoring
Servo Output2 Measured Servo Output 2 Current Total in Percent (input FLOAT)
J4:IS200TSVAH1A Terminal Board 2 connected to VSVA through J4 J4 connected, not connected
source R1 or Excitation source S is selected. (R1=0; S=1)

ExciteMode If both LVDT Excitation Failover Outputs 3 and 4 are required, Independent, Redundant
independent should be selected.
If only LVDT Excitation Failover Output 3 is required,
redundant should be selected and LVDT Input 12 must be
wired to LVDT Excitation Failover Output 3. This provides
redundant monitoring of the LVDT Input 11 failover detecting
circuits. Switch_R2T must be set to Disable.
Switch_R1S Disable or Enable Excitation 3 Failover. Disable, Enable
RndtLvdtDiag Enable - Configures LVDT 12 Input as a redundant monitor Disable, Enable
of excitation Source Select 3 switchover logic. Produces a
Diagnostic if disagreement occurs.
source R2 or Excitation source T is selected. (R2=0; T=1)
Switch_R2T Disable or Enable Excitation 4 Failover. Set to Disable if Disable, Enable
ExciteMode is set to Redundant.
J5:IS200TSVAH1A Pulse Rate inputs cabled to J5 connector Connected, not connected
Note: If used, the J5 cable must be attached to the J3 TSVA
terminal board.
FlowRate1 Pulse rate input selected - Board point (Input FLOAT)
PRType Select speed or flow type signal Unused, speed, or flow
PRScale Convert Hz to engineering units 0 to 1,000
SysLim1Enabl Select system limit Enable, disable
SysLim1Latch Select whether alarm will latch Latch, not latch
SysLim1Type Select type of alarm initiation >= Or <=
SysLimit Select alarm level in GPM or RPM 0 to 12,000
SystemLim2 Same as above Same as above
TMR_DiffLimt Difference limit off voted pulse inputs (EU) 0 to 12,000
FlowRate2 Pulse rate input selected - Board point (as above) (Input FLOAT)
Internal Variables Internal variables to service the auto-calibration display, not configurable
L3DIAG_VSVA# Board diagnostic exists Input BIT
R1_SuicideNV# Servo 1 Output Suicide Status Input BIT
: : Input BIT
R4_SuicideNV# Servo 4 Output Suicide Status Input BIT
ER1_StateNV# Excitation 1 Select Relay State Input BIT
: : Input BIT
ER4_StateNV# Excitation 4 Select Relay State Input BIT
SysLim1PR1 Pulse Rate 1 Limit 1 Status Input BIT

Reg1Suicide Regulator 1 suicide relay status Input BIT
: : Input BIT
RegCalMode Regulator Calibration Status Input BIT
Reg1_Fdbk Regulator 1 Feedback Value Input FLOAT
: : Input FLOAT
Reg4_Fdbk Regulator 4 Feedback Value Input FLOAT
MiscFdbk1a Pilot/Cylinder 1 Input FLOAT
: : Input FLOAT
MiscFdbk4a Pilot/Cylinder 4 Input FLOAT
Reg1_Error Regulator 1 Position Error Input FLOAT
: : Input FLOAT
Reg4_Error Regulator 4 Position Error Input FLOAT
Accel1 GPM/sec Input FLOAT
Accel2 GPM/sec Input FLOAT
Mon1 Position monitor Input FLOAT
: : Input FLOAT
Mon12 Position monitor Input FLOAT
AVSelect1NV# Anti-vote Signal Monitor One of Five Selected Signals. Input FLOAT
(Local Current, Total Current, Compliance Voltage, DAC
Feedback or Position Error)
: : Input FLOAT
AVSelect4NV# Anti-vote Signal Monitor One of Five Selected Signals. Input FLOAT
(Local Current, Total Current, Compliance Voltage, DAC
Feedback or Position Error)
CalibEnab1 Enable Calibration for Regulator 1 Output BIT
: : Output BIT
CalibEnab4 Enable Calibration for Regulator 4 Output BIT
SuicideForce1 Force Suicide for Servo Output 1 Output BIT
: : Output BIT
SuicideForce4 Force Suicide for Servo Output 4 Output BIT
Reg1_Ref Regulator 1 Position Reference Output FLOAT
: : Output FLOAT
Reg4_Ref Regulator 1 Position Reference Output FLOAT
Reg1- GainMod Regulator 1 Gain Modifier Output FLOAT
: : Output FLOAT

Reg4- GainMod Regulator 4 Gain Modifier Output FLOAT
Reg1_NullCor Reg 1 Null Bias Correction Output FLOAT
: : Output FLOAT
Reg4_NullCor Reg 4 Null Bias Correction Output FLOAT

Alarms
2 Flash Memory CRC Failure Board firmware programming error (VSVA board is
not allowed to go online unless override is active)
3 CRC failure override is Active Board firmware programming error (VSVA board
is allowed to go online should not happen on
released code)
Limit checks for J5 Pulse Rate Inputs disabled. This
diagnostic is disabled if the J5 cable is not present
at power-up.
24 Firmware/Hardware Incompatibility Invalid terminal board connected to the VSVA board.
30 ConfigCompatCode Mismatch; Firmware: A tre file has been installed that is incompatible with
{Firmware: #} (Tre: #} the firmware on VSVA board. Either the tre file or
The configuration compatibility code that the firmware must change. Contact the factory.
firmware is expecting is different than what is in the
31 IOCompatCode Mismatch; Firmware: {Firmware: #} A tre file has been installed that is incompatible with
(Tre: #} the firmware on the VSVA board. Either the tre file or
The I/O compatibility code that the firmware is firmware must change. Contact the factory.
expecting is different than what is in the tre file for
this board
33-44 Monitor LVDT #{1-12} rms voltage out of limits Minimum and maximum LVDT rms voltage limits are
{value} configured incorrectly.
Monitor LVDT # rms voltage is out of limits. The The LVDT may need recalibration.
Limits are defined as: May be a problem on the VSVA board.
Monitor MnLVDT#_Vrms ((MxLVDT#_Vrms -
MnLVDT#_Vrms) * LVDT_MArgin percent /100) =
Low Limit
Monitor MnLVDT#_Vrms + ((MxLVDT#_Vrms -
High Limit
45 Calibration Mode Enabled The VSVA is in calibration mode.
A VSVA Servo Regulator was placed into calibration
mode.
46 VSVA board not online, Servos Suicided The controller (R, S, T) or IONet is down, or there is
The servo is suicided because the VSVA is not a configuration problem with the system preventing
online. the VCMI from bringing the VSVA board online.
48-51 Servo current #{1-4} Over current Detected {value} Bad Regulator Position reference or position
Local Servo # Current exceeded 80% for a feedback value.
continuous time period >80 milliseconds. May be a problem on the VSVA board.

52-55 Servo current #{1-4} Current Exceeded Limit {value}, Bad Regulator Position reference or position
Suicided. feedback value.
Produces a diagnostic alarm and suicides the Servo May be a problem on the VSVA board.
# Output when the following four conditions are met:
Servo local current exceeds the Curr_Suicide Limit
in percent.
The time hold off requirement of SrvOcSiucHld
{value} is met
Local Current polarities for R, S and T Servo Outputs
support isolation of a single VSVA board/servo
output to suicide.
Configuring the EnableCurSuic to disable will disable
the suicide action.
56-59 Servo posit. #{1-4} fdbk out of range {value}, Minimum and maximum LVDT rms voltage limits are
Suicided configured incorrectly.
Servo position feedback is out of limits resulting in a The LVDT may need recalibration.
Suicide. The Limits are defined as: May be a problem on the VSVA board.
Regulator # MinPOSvalue - Servo # Fdbk_Suicide
value = low limit
Regulator # MAxPOSvalue + Servo # Fdbk_Suicide
value = high limit.
Configuring the EnableFbkSuic to disable will disable
the suicide action.
60 ConfigMsg error for regulator #{1-4} The LVDT minimum and maximum voltages are
Configuration Message Error for Regulator equal or reversed, or an invalid LVDT, regulator, or
Number #. There is a problem with the servo number is specified.
VSVA configuration and the servo will not operate
properly.
61 On board ref voltages {Pos ref} {Neg ref} Problem on the VSVA board.
Onboard Calibration Voltage Range Fault for Positive
9.09 V dc and/or Negative 9.09 V dc References.
Message displays the values for the P9.09 and
N9.09 reference voltage readings.
62 VSVA LVDT Exct Out Mon to J3 {ER1, ES, ET} May be a problem on the VSVA board.
voltage out of range {value}
LVDT Excitation Voltage out of range. (<6.3Vrms or
>7.7Vrms)
63 VSVA LVDT Exct Out Mon to J4 {ER1, ES, ET} May be a problem on the VSVA board.
voltage out of range {value}
>7.7Vrms)
64 VSVA LVDT Exct Out Mon to J3 {ER2, ES2 unused, May be a problem on the VSVA board.
ET2 unused} voltage out of range {value}
>7.7Vrms)
65 VSVA LVDT Exct Out Mon to J4 {ER2, ES2 unused, May be a problem on the VSVA board.
ET2 unused} voltage out of range {value}
>7.7Vrms)

66 Servo Output Assignment Mismatch Fix the regulator configurations.
Servo output assignment mismatch. Regulator types
8 and 9 (pilot cylinder configurations) use two-servo
outputs each. They have to be consecutive pairs,
and they have to be configured as the same range
67-68 J3 Excitation failure #{1-2} Excitation Switchover The Power Supply for the R, S or T rack may have
An excitation switchover has occurred due to loss of been turned off. (R or S for #1, R or T for #2).
LVDT Excitation output for {1} J3 Exc R1/S or {2}
J3 Exc R2/T.
69-70 J4 Excitation failure #{3-4} Excitation Switchover The Power Supply for the specified R or T rack may
An excitation switchover has occurred due to loss of have been turned off. R and S for #3, R and T for
LVDT Excitation output for {3} J4 Exc R1/S or {4} #4.
J4 Exc R2/T.
71 J3 {R, S, T}_Pack DIO Communication Failure on The Power Supply for the specified R or S rack may
{R, S} channels 1+2 be off..
Both J3 Serial Communication channels 1 and 2 for The specified R or S VSVA board may have a
the specified R or S channel are not communicating. problem sending or receiving serial communications
J3 R or J3 S or J3 T clarifies which VSVA board saw The 37 pin J3 cable associated with the specified
the fault and generated this diagnostic alarm. VSVA may not be properly mated at the TSVA
terminal board or the rack backplane connector
72-73 J3 {R, S, T}_Pack DIO Communication Failure on The specified R or S VSVA board may have a
{R, S} channel #{1 or 2) problem.
One of the J3 Serial Communication channels The 37 pin J3 cable associated with the specified R
1 or 2 for the specified R or S channel is not or S VSVA may not be properly mated at the TSVA
communicating. terminal board or the rack backplane connector or
J3 R or J3 S or J3 T clarifies which VSVA board saw may have a shorted / open wire or pin.
the fault and generated this diagnostic alarm. The terminal board may have a signal net open or
shorted to another signal.
74 J3 {R, S, T}_Pack DIO Communication Failure on The Power Supply for the specified S or T rack may
{S, T} channels 1+2 be off.
Both J3 Serial Communication channels 1 and 2 for The specified S or T VSVA board may have a
the specified S or T channel are not communicating. problem sending or receiving serial communications
{S, T} channel #{1 or 2) problem.
1 or 2 for the specified S or T channel is not or S VSVA may not be properly mated at the TSVA

77 J3 {R, S, T}_Pack DIO Communication Failure on The Power Supply for the specified R, S or T rack
{R, S, T} channels 1+2 may be off.
Both J3 Serial Communication channels 1 and The specified R, S or T VSVA board may have a
2 for the specified R or S or T channel are not problem sending or receiving serial communications
communicating. The 37 pin J3 cable associated with the specified
J3 R or J3 S or J3 T clarifies which VSVA board saw VSVA may not be properly mated at the TSVA
the fault and generated this diagnostic alarm. terminal board or the rack backplane connector
78-79 J3 {R, S, T}_Pack DIO Communication Failure on The specified R, S or T VSVA board may have a
{R, S, T} channel #{1 or 2) problem.
One of the J3 Serial Communication channels 1 The 37 pin J3 cable associated with the specified R,
or 2 for the specified R or S or T channel is not S or T VSVA may not be properly mated at the TSVA
communicating. terminal board, the rack backplane connector or may
J3 R or J3 S or J3 T clarifies which VSVA board saw have a shorted / open wire or pin.
80 J4 {R, S, T}_Pack DIO Communication Failure on The Power Supply for the specified R or S rack may
{R, S} channels 1+2 be off.
Both J4 Serial Communication channels 1 and 2 for The specified R or S VSVA board may have a
the specified R or S channel are not communicating. problem sending or receiving serial communications
{R, S} channel #{1 or 2) problem.
1 or 2 for the specified R or S channel is not or S VSVA may not be properly mated at the TSVA
83 J4 {R, S, T}_Pack DIO Communication Failure on The Power Supply for the specified S or T rack may
{S, T} channels 1+2 be off.
Both J4 Serial Communication channels 1 and 2 for The specified S or T VSVA board may have a
the specified S or T channel are not communicating. problem sending or receiving serial communications
84-85 J4 {R, S, T}_Pack DIO Communication Failure The specified S or T VSVA board may have a
on {S, T} channel #{1 or 2) One of the J4 Serial problem.
Communication channels 1 or 2 for the specified S The 37 pin J4 cable associated with the specified S
or T channel is not communicating. or T VSVA may not be properly mated at the TSVA
J4 R or J4 S or J4 T clarifies which VSVA board saw terminal board or the rack backplane connector or
the fault and generated this diagnostic alarm. may have a shorted / open wire or pin.
The terminal board may have a signal net open or

86 J4 {R, S, T}_Pack DIO Communication Failure on The Power Supply for the specified R, S or T rack
{R, S, T} channels 1+2 may be off.
Both J4 Serial Communication channels 1 and The specified R, S or T VSVA board may have a
2 for the specified R or S or T channel are not problem sending or receiving serial communications
communicating. The 37 pin J4 cable associated with the specified
J4 R or J4 S or J4 T clarifies which VSVA board saw VSVA may not be properly mated at the TSVA
the fault and generated this diagnostic alarm. terminal board or the rack backplane connector
87-88 J4 {R, S, T}_Pack DIO Communication Failure on The specified R, S or T VSVA board may have a
{R, S, T} channel #{1 or 2} problem.
One of the J4 Serial Communication channels 1 The 37 pin J4 cable associated with the specified R,
or 2 for the specified R or S or T channel is not S or T VSVA may not be properly mated at the TSVA
97-100 Suicide relay #{1-4} does not match commanded There is a problem on the associated VSVA board.
state
Suicide relay status contact feedback does not
match the relay commanded state.
101-104 Excitation relay Driver #{1-4} does not match There may be a problem on the associated VSVA
commanded state board.
The VSVA excitation switchover driver state output The TSVA terminal board may be the problem.
to the TSVA terminal board does not match the The J3 or J4 37 pin cable may be the problem.
VSVA commanded state.
105-106 J3 Excitation relay #{1-2} does not match The J3 TSVA terminal board may be the problem.
commanded state Switchover Excitation Output (1 or 2) may be shorted
The TSVA LVDT Excitation 1 or 2 relay driver at the J3 TSVA TB Screws.
state does not match the commanded state. If
the J5 cable is not connected, this diagnostic is
suppressed. If the J5 cable and two TSVA terminal
boards are used, the J12 cable must be installed.
107-108 J4 Excitation relay #{3-4} does not match The J4 TSVA terminal board may be the problem.
commanded state Switchover Excitation Output (1 or 2) may be shorted
The TSVA LVDT Excitation 3 or 4 relay driver state at the J4 TSVA TB Screws.
does not match the commanded state. If the J4
TSVA terminal board is used and J5 is connected to
the J3 TSVA board, the J12 cable must be installed.
109-112 Regulator #{1-4} failed, exceeded position limits Minimum and maximum Regulator LVDT rms voltage
{value} limits are configured incorrectly.
Regulator position feedback is out limits. The limits The assigned LVDTs may need recalibration.
are defined as: May be a problem on the VSVA board.
Regulator # MinPOSvalue - Servo # Fdbk_Suicide
value = low limit.
Regulator # MAxPOSvalue + Servo # Fdbk_Suicide
value = high limit.

113-116 Excitation Failover #{1-4} limit exceeded {value} The LVDT Excitation output may be shorted.
The LVDT Excitation # output is faulted. The VSVA The LVDT Excitation output may be faulted to an
fault detecting circuitry has toggled the selection open state on the TSVA terminal board.
relays on the TSVA terminal board four times within
a 100 msec period attempting to select a good
excitation source.
This action has been repeated after waiting 16
seconds for the fault to go away. After 3 attempts
separated by 16 seconds each, the VSVA boards
will stop commanding the failover relays to toggle to
prevent excessive long-term stress on the relays.
(Nominal limit value displayed will be 12)
If the fault goes away at any time and the Excitation
Output returns to a healthy state, the failover detector
circuits will restart and return to an active mode.
117-120 Excitation #{1-4} Not Valid Excitation Outputs may be shorted at the TSVA TB-1
LVDT Excitation # Failover output has been faulted Screw Inputs.
for more than three seconds at the failover detector
comparator circuit.
128 J3 TB ID not found or invalid The TSVA ID devices may have a problem.
JR1, JS1 or JT1 cable ID device on the TSVA The VSVA has a problem reading the ID.
terminal board connected to the J3 cable was not The J3 cable connectors may not be properly mated.
found.
JR1, JS1 or JT1 cable ID device on the TSVA The J4 cable connectors may not be properly mated.
terminal board connected to the J4 cable was not
found.
found.
found.
found.
133 J3 + J7 TB ID Barcode Do NOT MATCH The J3 37 pin cable and the J7 15 pin cables must
J3 and J7 cables must be connected to the same be connected to the same TSVA.
TSVA Terminal Board to properly close the Servo The TSVA ID devices may have a problem.
TMR total current regulation loops. The VSVA board may have a problem reading the
If both the J3 and J7 cables are unconnected at ID devices.
power up, this diagnostic is suppressed.

134 J4 + J8 TB ID Barcode Do NOT MATCH The J4 37 pin cable and the J8 15 pin cables must
J4 and J8 cables must be connected to the same be connected to the same TSVA.
TSVA Terminal Board to properly close the Servo The TSVA ID devices may have a problem.
TMR total current regulation loops. The VSVA board may have a problem reading the
If both the J4 and J8 are unconnected at power up, ID devices.
this diagnostic is suppressed.
135-138 Servo #{1-4} Suicided VSVA Board may be off line or in the process of
Status of Servo Suicide state independent of a startup.
reason for the suicide condition. Vsva board may have a problem.
139 RST Configuration mismatch of critical items Critical configuration parameters or the firmware
The VSVA is not allowed to go Online following revision do not match the other R, S or T VSVA
power on because one or more critical configuration boards in this slot location.
parameters do not match between the R, S and Download the firmware and configuration to this
T boards. If the code revision is a match, a board.
configuration download is required.
140 Redundant LVDT5+LVDT6 Vrms Diff >0.5v {value} Wires on J3 TSVA Between TB-1 Screws 11 and 13
LVDT Excitation Output 1 ExciteMode is selected to or 12 and 14 may be loose or missing.
Redundant and the LVDT 5 and 6 Vrms input values The VSVA board may have a problem.
are not within 0.5VRMS of each other.
141 Redundant LVDT11+LVDT12 Vrms Diff >0.5v {value} Wires on J4 TSVA Between TB-1 Screws 11 and 13
LVDT Excitation Output 3 ExciteMode is selected to or 12 and 14 may be loose or missing.
Redundant and LVDT 11 and 12 Vrms input values The VSVA board may have a fault.
are not within 0.5VRMS of each other.
142 J3 Redundant Excitation Loss Failure Detected Wires on J3 TSVA Between TB-1 Screws 11 and 13
LVDT5+LVDT6 or 12 and 14 may be loose or missing.
LVDT Excitation Output 1 ExciteMode is selected The VSVA board may have a problem.
to Redundant and the LVDT 6 input redundant loss
detector disagreed with the LVDT 5 detector event
detecting time.
143 J4 Redundant Excitation Loss Failure Detected Wires on J4 TSVA Between TB-1 Screws 11 and 13
LVDT11+LVDT12 or 12 and 14 may be loose or missing.
LVDT Excitation Output 3 ExciteMode is selected to The VSVA board may have a fault.
Redundant and the LVDT 12 input redundant loss
detector disagreed with the LVDT 11 detector event
detecting time.
160 LVDT4 Pre-Relay R1 Excitation Low {value} The R VSVA board ER1 LVDT Excitation out has a
Mode 1 specific diagnostic alarm. The ER1 problem.
Excitation output for the J3 TSVA terminal board The transformer on the TSVA board may have an
which must be wired to LVDT4 Input at the TSVA open winding.
terminal board screws is <6.6Vrms or >7.7 Vrms. The J3 cable may be improperly mated, have an
open wire/connector pin or a short between signal
and ground.

161 LVDT10 Pre-Relay R1 Excitation Low {value} The R VSVA board ER1 LVDT Excitation out has a
Mode 1 specific diagnostic alarm. The ER1 problem.
Excitation output for the J4 TSVA terminal board The transformer on the TSVA board may have an
which must be wired to LVDT4 Input at the J4 TSVA open winding.
terminal board screws is <6.6Vrms or >7.7 Vrms. The J4 cable may be improperly mated, have an
open wire/connector pin or a short between signal
and ground.
162 Mode1 REG1 3_LVDT (1,2,3){#1 or 2 or 3} Exceeded VSVA Board Electronics or the associated 37 pin
TMR Median Diff Limit {value} LVDT 1, 2 and 3 cable may have an LVDT Input fault.
inputs to Regulator 1 are compared to the median Wire on LVDT input screws may be loose or missing.
selected value.
A diagnostic alarm is generated and the faulted
LVDT # and value is inserted into the message if the
TMR Median Diff Limit value is exceeded.
165 Mode1 REG3 3_LVDT (7,8,9){#7 or 8 or 9} Exceeded VSVA Board Electronics or the associated 37 pin
TMR Median Diff Limit {value} LVDT 7, 8 and 9 cable may have an LVDT Input fault.
inputs to Regulator 3 are compared to the median Wire on LVDT input screws may be loose or missing.
selected value.
LVDT # and value is inserted into the message if the
170 Mode2 REG1 LVDT (1,2) Exceeded Diff Limit VSVA Board Electronics or the associated 37 pin
({value}) {value} cable may have an LVDT Input fault.
LVDT 1and 2 inputs to Regulator 1 are compared Wire on LVDT input screws may be loose or missing.
to either the Min or Max value dependent upon the
RegType selection.
A diagnostic alarm is generated and the fault value
is inserted into the message if the TMR Median Diff
Limit value is exceeded.
LVDT 3 and 4 inputs to Regulator 2 are compared Wire on LVDT input screws may be loose or missing.
RegType selection. A diagnostic alarm is generated
and the fault value is inserted into the message if the
RegType selection. A diagnostic alarm is generated
and the fault value is inserted into the message if the

RegType selection.
A diagnostic alarm is generated and the fault value
is inserted into the message if the TMR Median Diff
Limit value is exceeded.
174 Mode2 MON {1-12} LVDT (1,2) Exceeded Diff Limit VSVA Board Electronics or the associated 37 pin
{value} cable may have an LVDT Input fault.
If LVDT input pair 1 and 2 are assigned to any of Wire on LVDT input screws may be loose or missing.
the Monitors 1-12, the LVDT inputs 1 and 2 are
compared to either the Min or Max value dependent
upon the Monitor type selection.
Monitor # is inserted into the message if the TMR
Median Diff Limit value is exceeded.
upon the Monitor type selection. A diagnostic alarm
is generated and the faulted Monitor # is inserted
into the message if the TMR Median Diff Limit value
is exceeded.

180-191 Regulator LVDT #{1-12} rms voltage out of limits Minimum and maximum Regulator LVDT rms voltage
{value} limits are configured incorrectly.
Regulator LVDT # position input is out of limits. The The LVDT may need recalibration.
Limits are defined as: May be a problem on the VSVA board.
Regulator MnLVDT#_Vrms ((MxLVDT#_Vrms -
Low Limit
Regulator MnLVDT#_Vrms + ((MxLVDT#_Vrms -
High Limit
192-255 Logic Signal {name) Voting Mismatch A problem with the input. This could be the device,
The specified signal from this VSVA disagrees with the wire to the terminal board, the terminal board, or
the TMR voted value. the cable.
Voter Disagreement Diagnostic
288-323 Input Signal {name} Voting Mismatch, Local={value}, A problem with the input. This could be the device,
Voted={value} the wire to the terminal board, the terminal board, or
The specified input signal from this VSVA varies from the cable
the voted value of the signal by more than the TMR
Diff Limit value. Voter Disagreement Diagnostic.

Serial Communication Input/Output
(VSCA)
VSCA Serial Communication Input/Output
The Serial Communication Input/Output (VSCA) board provides I/O interfaces for
external devices using RS-232C, RS-422, and RS-485 serial communications. Currently
the IS200VSCAH2A version is available. The DSCB terminal board connects to the
external devices, which include intelligent pressure sensors such as smart Honeywell
pressure transducers and Kollmorgen electric drives.
VSCA connects to the DSCB terminal board(s) through the J6 and J7 front panel
connectors. These are parallel connected using 37-pin D shell connectors with group
shielded twisted pair wiring. For RS-422 and RS-485, DSCB can interface with external
devices at distances up to 1000 ft, at baud rates up to 375 kbps. For RS-232C, the
distance is only 50 ft or 2500 pF of cable capacitance (including the cable from VSCA to
the DSCB). It supports short haul modems for longer distances.
Installation
1. Power down the VME I/O processor rack.
2. Slide in the board and push the top and bottom levers in with your hands to seat its
edge connectors.
3. Tighten the captive screws at the top and bottom of the front panel.
Note Cable connections to the terminal boards are made at the J6 and J7 connectors on
the front panel. These are latching type connectors to secure the cables. Power up the
VME rack and check the diagnostic lights at the top of the front panel; for details refer to
the section on diagnostics in this document.
It may be necessary to update the VSCA firmware to the latest level. For instructions,
refer to GEH-6403 Control System Toolbox for the Mark VI Turbine Controller.
14-1 Serial Communication Input/Output (VSCA) GEH-6421Q Mark* VI Control

Operation
Note VSCA/DSCB is a data terminal device (DTE).
The VSCA is a single slot board with six serial communication ports. Each port can
be independently configurable as an RS-232C, RS-485, or RS-422 interface, using a
three-position group jumper (berg array). Both RS-232C and R-S422 support full duplex.
The line drivers on VSCA include appropriate termination resistors with configurable
jumpers to accommodate multi-drop line networks. RS-422 and RS-485 outputs have
tri-state capability. I/O goes to a high impedance condition when powered down. They
do not cause significant disturbance when powered down/up (less than 10 ms) on a party
line. The open wire condition on a receiver is biased to a high states.
RS-232C supports: RXD, TXD, DTR/RTS, GND, CTS (five wire)
RS-422 supports: TX+, TX-, RX+, RX-, GND
RS-485 supports: TX/RX+, TX/RX-, GND
Data Flow from VSCA to Controller
The data flow from VSCA to the UCV_ controller is of two types: fixed I/O and
Modbus I/O. Fixed I/O is associated with the smart pressure transducers and the
Kollmorgen electric drive data. This data processes completely, every frame, as with
conventional I/O. The required frame rate is 100 Hz. These signals are mapped into
signal space, using the .tre file, and have individual health bits, use system limit checking,
and have offset/gain scaling.
Note Two consecutive time outs are required before a signal is declared unhealthy.
Diagnostic messages are used to annunciate all communication problems.
Modbus I/O is associated with the Modbus ports. Because of the quantity of these
signals, they are not completely processed every frame. Instead they are packetized
and transferred to the UCV_ processor over the IONet through a special service. This
accommodates up to 2400 bytes at 4 Hz, or 9600 bytes at 1 Hz, or combinations thereof.
This I/O is known as second class I/O, where coherency is at the signal level only, not at
the device or board level. Health bits are assigned at the device level, the UCV_ expands
(fully populate) for all signals, and system limit checking is not performed.
Ports 1 and 2only (as an option) support the Honeywell pressure configuration. It reads
inputs from the Honeywell smart pressure transducers, type LG-1237. This service is
available on ports 1 and 2 as an option (pressure transducers or Modbus, or drives). The
pressure transducer protocol uses the XDSAG#AC interface board and RS-422. Each
port can service up to six transducers. The service is 375 kbaud, asynchronous, and with
nine data bits (11 bits including start and stop). It includes the following failsafe features:
Communication miss counters, one per device, and associated diagnostics
After four consecutive misses it forces the input pressure to 1.0 psi, and posts a
diagnostic. After four consecutive hits (good values) it removes the forcing and
the diagnostic.
Three ports (any three, but no more than three) support the Kollmorgen electric drive. It
communicates with a Kollmorgen electric fast drive FD170/8R2-004 at a 19200 baud
rate, point-to-point, using RS-422.
GEH-6421Q System Guide, Volume II Serial Communication Input/Output (VSCA) 14-2

Modbus service
The current Modbus design supports the master mode. However the design does not
prevent the future enhancement of Modbus slave mode of operation. It is configurable at
the port level as follows:
Used, not used
Baud Rate RS-232C: 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600
Baud Rate RS-485/422: 19200, 38400, 57600, 115000
Parity: none, odd, even
Data bits: seven, eight
Stop bits: one, two
Station addresses
Multi-drop, up to eight devices per port; maximum of 18 devices per board
RTU
Time out (seconds) per device
The Modbus service is configurable at the signal level as follows:
Signal type
Register number
Read/write
Transfer rate, 0.5, 1, 2, or 4 Hz
Scaling, offset, and gain
The service supports function codes 1-7, 15, and 16. It also supports double 16-bit
registers for floating point numbers and 32-bit counters. It periodically tries 20 attempts
to reestablish communications with a dead station. The VSCA and toolbox support type
casting and scaling of all I/O signals to/from engineering units, for both fixed I/O and
Modbus I/O.
Physical interfaces
Special connections are required for RS-485 applications with VSCA/DSCB located
somewhere in the middle of the transmission path. Because of the potential length of
the connection between VSCA and DSCB, there may be substantial stub length to the
connection that will affect signal quality. For this reason, VSCA supports the connection
of two DSCB boards wired in parallel. This permits RS-485 signals to come in one
DSCB, pass through VSCA with the RS-485 transceiver, and go out the opposite DSCB.
This ensures that the stub-length of the RS-485 path is minimized.
Note The above arrangement is not required when the VSCA/DSCB is located at one
end of the RS-485 wiring.
The following figure shows the physical interface to the electric drives. For the
Honeywell transducer interface using DSCB and DPWA, refer to the section, DSCB
Serial Input/Output.

Twisted shielded pair
AWG#18 min, up to
1000 ft, ground shields at
Mark VI end only
Mark VI Control J2
8+ Electric Drive
9 - Rx FD170/8F2-004
4+
6 - Tx
5 Grd
V D J4
S S 3
C C 6 Enable
A B 7 P24 V
8 enable
31 Crit fault
32 relay Chassis
J1 J4 23 18 20 22
4 5 1 2 3 6 30 27 17 19 21 28
+
T 125 V dc power
R -
Ph PhPhGrd
V L Ref Sin Cos
A B C
C Y Drive enable relay
C L4FMVn_ENAX
T
C Enable = Close
B
C
I Contact input
L5FMVn_CFZ 1 2 3 5 46 7 8 FE A BDCG
Fault = Open Motor Grd Ther Resolver
Motor
frame
Shield
(int)
exc 1
exc 2 Actuator/Valve
sec2 3 L
V
sec2 4 D
sec1 5 T
sec1 6
V T
S S Monitoring signals
V V
O O
VSCA Interface to Electric Servo Drive using DSCB Board

Specifications
Item Specification
Number of Serial Ports 6 per VSCA board
Devices Port Pressure Transducer Electric Drive* Modbus Comm.
1 Y Y Y
2 Y Y Y
3 Y Y
4 Y Y
5 Y Y
6 Y Y
Type RS-422 (375 KB) RS-422 (19.2 KB) RS-232 (57.6 KB)
RS-422 (115 KB)
RS-485 (115 KB)
Boards DSCB, DPWA DSCB DSCB
Choices (jumper select)
RS-232C 50 ft Baud Rates up to 57.6 kbps. Full duplex
RS-422 1000 ft Baud Rates up to 375 kbps
RS-485 1000 ft Baud Rates up to 375 kbps Full duplex
Ports 1 and 2 Honeywell pressure transducers, 6 transducers per port using XDSA board
Ports 1 through 6 Modbus operation or Kollmorgen electric fast drive FD170/8R2-004. * Note
Size 26.04 cm high x 1.99 cm wide x 18.73 cm deep (10.25 in. x 0.78 x 7.375 in.)
Note Any three ports, but no more than three, can support the electric drive.

Diagnostics
Three LEDs at the top of the VSCA front panel provide status information. The normal
RUN condition is a flashing green, and FAIL is a solid red. The third LED shows a
steady orange if a diagnostic alarm condition exists in the board. Diagnostic checks
include the following:
Each port checks communications and if there is no response, or bad data, or the
communication port is non functional, a diagnostic fault is set. This creates a
composite diagnostic alarm, L3DIAG_VSCA, referring to the entire board. The
diagnostic signals can be individually latched, and then reset with the RESET_DIA
signal.
Each terminal board has its own ID device, which is interrogated by the I/O board.
The board ID is coded into a read-only chip containing the terminal board serial
number, board type, revision number, and the JA1 connector. When the chip is
read by the I/O board and a mismatch is encountered, a hardware incompatibility
fault is created.
Details of diagnostic faults generated by the electric actuator are a separate category and
are listed in the Alarms section of this document.
Configuration
VSCA is configured with board jumpers and with the toolbox. Jumpers JP1 through JP6
are block jumpers, used to select the port electrical characteristic, RS-232C, RS-422, or
RS-485. Each jumper has three positions marked 232, 422, and 485.
Jumpers JP7 through JP12 are block jumpers, used to select the correct termination
configuration for all the transmission lines (Tx). Each jumper has three positions marked
TRM, THR, and PRK where:
TRM means with terminating resistor.
THR means no terminating resistor, pass through to J7.
PRK means no terminating resistor, or park position
Jumpers JP13 through JP18 are block jumpers, and are used to select the correct
termination configuration for all the receive lines (Rx). Each jumper has three positions
marked, TRM, THR, and PRK, where the meanings are the same as above.
A two-position jumper, JPU1, selects between Honeywell pressure transducer and
Modbus operation for ports 1 and 2. The default position for JPU1 is X2, which enables
the serial clock for operation with Honeywell transducers. Position X1 selects the clock
needed for Modbus operation. JPU1 is located at the bottom of the board towards the
backplane connector (away from the other jumpers).

VSCA Board Jumper Positions
Network Port Number 232/422/485 Communication Tx TRM/THR/PRK Rx TRM/THR/PRK

Port 1 JP1 JP7 JP13
Port 2 JP2 JP8 JP14
Port 3 JP3 JP9 JP15
Port 4 JP4 JP10 JP16

VSCA_Crd_Cfg
Pressure_ Port1_Cfg
PortNum Toolbox Parameter, Applicable port, Port 1 only
PortType Type of VSCA port
Priority Priority None, Odd, Even
PhyConnect Type of physical connection RS-232, RS-422, RS-485
TermType Type of Termination None, Terminated, Pass through
BitsPerChar Bits per character 7 Bits, 8 Bits, 9 Bits
Parity Normal parity None, Odd, Even
StopBits Normal Parity 1 StopBit, 2 StopBit
Baud Baud rate
DevAddr1 Device Address for transducer
(first of six devices)
TimeOut Time out in msec 10 60000
Pressure_ Port2_Cfg (Similar configuration, for six devices)
PressureXdr_Pnt_Cfg
RawMin Scaling Factor Raw Limit -3.4E+038, +3.4E+038
RawMax Scaling Factor Raw Limit -3.4E+038, +3.4E+038
EngMin Scaling Factor eng limit -3.4E+038, +3.4E+038
EngMax Scaling Factor eng limit -3.4E+038, +3.4E+038
Lim1Enable Enable Limit 1 check Disable, Enable
Lim1_Latch Latch error limit 1 NotLatch, Latch
Lim1Comp Latch error compare <=, >=
(Similar for Lim2)
Limit1 Limit 1
Limit2 Limit 2
ElectDrive_Port_Cfg
PortNum Toolbox Parameter, Applicable port, Port 1 thru 6

Priority Priority None, Odd, Even
StopBits Normal parity 1 StopBit, 2 StopBit
Baud Baud rate
ATA Drive parameter, Ampl Temp Alarm
PCP Drive parameter, Position Loop Comp
PDP Drive parameter, Position Loop Comp
PIN Drive parameter, Position Integral Gain
PPN Drive parameter, Position Loop Proportional Gain
RES_p1 Drive parameter, Resolver excit amplitude
RES_p2 Drive parameter, Resolver excit freq
RMS_p1 Drive parameter, Resolver excit freq
RMS_p2 Drive parameter, Resolver excit freq
RTL_p1 Drive parameter, Time limit
RTL_p2 Drive parameter, Time limit
TOF Drive parameter, Torque Offset
TimeOut Time Out in msec 10 60000
ElectDriveRefCfg
RawMin Scaling Factor Raw Limit -3.4E+038, +3.4E+038
RawMax Scaling Factor Raw Limit -3.4E+038, +3.4E+038
EngMin Scaling Factor eng limit -3.4E+038, +3.4E+038
EngMax Scaling Factor eng limit -3.4E+038, +3.4E+038
ElectDrivePosCfg (Similar to PressureXdr_Pnt_Cfg)
ElectDriveVelCfg (Similar to ElectDriveRefCfg)
ElectDriveTorCfg (Similar to ElectDriveVelCfg)
Modbus_Port_Cfg
PortNum Toolbox Parameter, which port, Port 1 thru 6
Priority Priority 07
StopBits Normal Parity 1 StopBit, 2 StopBit

Baud Baud rate 300, 600, 800, 1200, 2400, 9600,
115000, 192000, 384000, 57600,
375000.
StationCount Toolbox Parameter, Number of stations
Modbus_Station_Cfg
StationAddr What is station address 1 255
PageCount Toolbox Parameter, Number of Pages
TimeOut Time Out in msec 10 60000
FuncCode15 The connected station supports Modbus command Enable, Disable
FC15 Force Mult Coils.
FuncCode16 The connected station supports Modbus command Enable, Disable
FC16 Write Mult Registers.
DataSwap Float Data Format, swap words, ie Most Significant LswFirst, MswFirst
first
MaxBools Maximum Number of Booleans per request -32768 +32767
MaxReg Maximum Number of Registers per request -32768 +32767
DeviceDelay Transmit Delay Time in msec for non Modbus 0 60000
compliant slaves
Modbus_Page_Cfg
PageType What is the page type HC, HR, OC, CC
PointCount Toolbox Parameter, Number of points
Modbus_Bit_Cfg
Address Address of remote Register/Discrete 1 9999
BitNumber Bit-Packed register bit number 1 = Not Used 0 or 1
RemDataType Data-type of remote register/discrete UNS16, PAC16, SIGN16
UpdateRate The rate at which inputs are updated Never , 1, 2, 4 Hz
means spare
RawMin Scaling factor raw minimum -3.4E+038, +3.4E+038
RawMax Scaling factor raw maximum -3.4E+038, +3.4E+038
EngMin Scaling factor engineering minimum -3.4E+038, +3.4E+038
EngMax Scaling factor engineering maximum -3.4E+038, +3.4E+038
Modbus_Long_Cfg (Similar to Modbus_Bit_Cfg)
Modbus_Float_Cfg
Address Address of remote Register/Discrete
BitNumber Bit-Packed register bit number 0 = LSB -1 or 0
(Similar to Modbus_Bit_Cfg)
PointDefs
Pressure Transducer Port 1 and 2 Point Definitions.
Electric Drive Port Point Definitions (see drive
Faults in the Alarm section).

Alarms
VSCA I/O Board Diagnostic Alarms

2 Flash ,memory CRCCRC failure Board firmware programming error (board will not
go online)
3 CRCCRC failure override is active Board firmware programming error (board is allowed
to go online)
30 ConfigCompatCode mismatch; Firmware: [ ] A tre file has been installed that is incompatible with
firmware must change. Contact the factory
31 IOCompatCode mismatch; Firmware: [ ] A tre file has been installed that is incompatible with
32 Port [ ] Device/Station [ ] No Response Message sent but no response received. Hardware
or software configuration error.
33 Port [ ] Device/Station [ ] Bad Data Message sent but bad data received. Software
configuration error
34 Configure problem, Port [ ] , Communications No communications taking place. Hardware or
nonfunctional software configuration error
35 Electric drive, Port [ ], save command non functional
36 Card ID failure
37 P6 ID failure
Electric Actuator Diagnostic Alarms
Fault (Point Definition) Note

L5FMV_CF Drive critical fault
L3FMV_RST Drive reset fault feedback
L5FMV_LRC Drive LRC fault
L5FMV_BOV Fault, Bus overvoltage > 240 V)
L5FMV_BUV Fault, Bus undervoltage (< 90 V)
L30FMV_LVA Alarm, Low Volts (< 100 V)
L5FMV_WDT Fault, Watch Dog Timer
L5FMV_OVC Fault, Bridge Over-Current
L5FMV_POR Fault, Power On Reset
L5FMV_ATF Fault, Ampl. Temperature
L5FMV_MTF Fault, Motor Temperature
L30FMV_RMS Alarm, Alarm, RMS Over-current
L5FMV_PCF Fault, Position Control
L5FMV_RTL Fault, Commun. Time Limit.

Fault (Point Definition) Note
L5FMV_CSL Fault, Check Sum Limit.
L5FMV_CVL Fault, Control Volts Limit
L5FMV_PF Fault, Processor Failure
L5FMV_RF Fault, Resolver Limit

DSCB Simplex Serial Communication Input/Output
The Simplex Serial Communication Input/Output (DSCB) terminal board is a compact
interface terminal board, designed for DIN-rail mounting. DSCB connects to the VSCA
board with a 37-wire cable. VSCA provides communication interfaces with external
devices, using RS-232C, RS-422, and RS-485 serial communications. DSCB is wired
to the external devices, which include intelligent pressure sensors such as the smart
Honeywell Pressure Transducers and Kollmorgen Electric Drives used for valve
actuation.
Wiring to devices uses shielded twisted pair. DSCB communication signals have
on-board noise suppression. An on-board ID chip identifies the board to VSCA for
system diagnostic purposes.
Note DSCB does not work with the PSCA I/O pack.
Installation
Mount the plastic holder on the DIN-rail and slide the DSCB board into place. Connect
the wires for the external devices to the Euro-Block type terminal block as shown in the
following figure. Four terminals are provided for the SCOM (ground) connection, which
should be as short as possible. Connect DSCB to VSCA using the 37 pin JA1 connector.
Note Jumpers J1 - J6 direct SIGRET directly to SCOM or through a capacitor to

SCOM. The shield must be grounded at one end or the other, but not both. If the shield
is grounded at the device end, the jumpers should be set to include the capacitor in the
circuit. If the shield is not grounded at the device end, the jumpers should be set to go
directly to SCOM.

DSCB DIN-rail mounted
terminal board
Twisted shielded pair,
JA1 s AWG#18, to external
To/from VSCA, J6 s devices.
37 wire cable, SCOM Configurable to RS232,
with twisted pair, Cap RS422, or RS485.
group shielding J1 SIGRET
Six channels, screw
SCOM
definitions below
s
s
Six channels
SCOM GRD
DSCB Terminal Assignments
RS422 TX+ TX- RX+ RX- NC SIGRET JPx SCOM

RS485 NC NC Tx/RX+ Tx/RX- NC SIGRET JPx SCOM
RS232 CTS DTR/RTS RX NC TX SIGRET JPx SCOM
Chan 1 1 2 3 4 5 6 JP1 7
Chan 2 8 9 10 11 12 13 JP2 14
Chan 3 15 16 17 18 19 20 JP3 21
Chan 4 22 23 24 25 26 27 JP4 28
Chan 5 29 30 31 32 33 34 JP5 35
Chan 6 36 37 38 39 40 41 JP6 42
43,44,45,46
Comments: The RS422/RS485 transmit and receive pairs must use
a twisted pair in the VSCA to DSCB
DSCB Wiring, Cabling, and Jumper Positions

Operation
The three XDSA boards are intermediate distribution boards for the RS-422 multi-drop
signals. The pressure transducers plug into ports P1, P2, P3, and P4 on these boards. The
following figure shows DSCB using two of the six VSCA channels, Ports 1 and 2, to
interface with 12 Honeywell pressure transducers.
Mark VI control Fuel skid

From VSCA
board front, XDSAG1ACC
P1
Outer valve
J6 1 Power
Adr= 0 Press Xdr
GP1OA
2 LG-1237
Chan A, RS422
DSCB +
3 Chan A
1 4 P2
JA1 Tx 2 5 Outer valve
Adr= 1 Press Xdr
Port #1
6
LG-1237
GP2OA
+ 7
Rx 34 8
P3 Outer valve
Chan B, RS422 Adr= 2 Press Xdr
9 Power
LG-1237 GP1OB
8 + 10
Tx 9 11 Chan B
Port #2 12 P4 Outer valve
+ 13 Adr= 3 Press Xdr
Rx 10
11
14
LG-1237
GP2OB
15
16 Stab-on
nearest gnd
XDSAG1ACC
P1 Pilot valve
Adr= 4 Press Xdr
1 Power
LG-1237
GP1PA
2
3 Chan A
4 P2 Pilot valve
5 Press Xdr
Adr= 5
6
LG-1237
GP2PA
7
8
43
44 P3 Pilot valve
45 Adr= 6 Press Xdr
46 9 Power LG-1237
GP1PB
10
SCOM 11 Chan B
Gnd 12
13
P4 Pilot valve
Adr= 7 Press Xdr
14
LG-1237
GP2PB
15
16 Stab-on
nearest gnd
XDSAG1ACC
XDSA Jumper Settings P1 Inner valve
Adr= 8 Press Xdr
1 Power
LG-1237
GP1IA
Termination: Tx Only, JP1, JP2: 2
3 Chan A
Set to "IN" if end of line; 4 P2 Inner valve
5 Press Xdr
Set to "OUT" if not end of line. Adr= 9
6
LG-1237
GP2IA
7
Address: 8
Jumper Outer Pilot Inner
P3 Inner valve
Adr=10 Press Xdr
JP3 0 1 0 Chan A 9 Power
LG-1237
GP1IB
10
JP4 0 0 1 Chan A 11 Chan B
12 P4
13
Inner valve
Adr=11 Press Xdr
14
LG-1237
GP2IB
JP5 0 1 0 Chan B 15
16 Stab-on
JP6 0 0 1 Chan B
nearest gnd
DSCB Connections to XDSA and Pressure Transducers

Specifications
Item Specification
Number of Channels Six
Choices (jumper select on VSCA)
RS-232C 50 feet Baud Rates up to 57.6 kbps Full duplex
RS-422 1000 feet Baud Rates up to 375 kbps
RS-485 1000 feet Baud Rates up to 375 kbps Full duplex
Connector for VSCA cable 37-pin D shell connector
Size, with support plate 8.6 cm Wide X 16.2 cm High (3.4 in x 6.37 in)
Diagnostics
The DSCB terminal board has its own ID device, which is interrogated by VSCA. The
board ID is coded into a read-only chip containing the terminal board serial number,
board type, revision number, and the JA1 connector. When the chip is read by VSCA and
a mismatch is encountered, a hardware incompatibility fault is created. Communication
and device problems are detected by the VSCA and reported to the toolbox.
Configuration
Each of the six channels has a jumper to connect the cable shield to ground through a
capacitor. These are used when the shield is grounded at the device end. The jumper
positions are shown in the Installation section. All other configuration is done on the
VSCA board and in the toolbox.

DPWA Transducer Power Distribution
DPWA provides excitation The Transducer Power Distribution (DPWA) terminal board is a DIN-rail mounted power
power to LG-1237 Honeywell distribution board. It accepts input voltage of 28 V dc 5%, provided through a two-pin
pressure transducers. Mate-N-Lok connector. Connectors are provided for two independent power sources
to allow the use of redundant supplies. The input can accept power from a floating
isolated voltage source. The input to DPWA includes two 1 k resistors from positive
and negative input power to SCOM. These center a floating power source on SCOM.
Attenuated input voltage is provided for external monitoring. Output power of 12 V dc
5% is connected to external devices through a Euro- type terminal block, using screw
terminals and AWG#18 twisted-pair wiring. DPWA provides three output terminal pairs
with a total output rated at 0 to 1.2 A. The outputs are compatible with the XDSAG#AC
interface board. Outputs are short circuit-protected and self-recovering.
Installation
Mount the DPWA assembly on a standard DIN-rail. Connect input power to connector
P1. If multiple DPWA boards are used, use connector P2 as a pass-through connection
point for the power to additional boards. If a redundant power input is provided, connect
power to connector P3 and use connector P4 as the pass-through to additional boards.
Connect the wires for the three output power circuits on screw terminal pairs 9-10,
11-12, and 13-14.
Note The DPWA terminal board includes two screw terminals, 15 and 16, for SCOM
(ground) that must be connected to a good shield ground.

DPWA Power Distribution Terminal Board P12 9
s P12V1
10
P28V dc P12R1
P28V dc to P12Vdc,
1 P1 P12 V dc 1.2 Amp P12 11
s P12V2
2 Isolation 12
P12R2
P2
P12 13
s P12V3
Return 14
s P12R3
15
SCOM
P3 16
SCOM
100k
P4
20 k
1
1k 1k PSRet
SCOM 2
Bus SCOM
centering
bridge 100 k 100 k
SCOM
20 k 20 k
3
SCOM PS28VA
4 SCOM
5
PS28VB
6
SCOM
DPWA Board Block Diagram

Operation
DPWA has an on-board power converter that changes the 28 V dc to 12 V dc for the
transducers. A redundant 28 V dc supply can be added if needed. The following figure
shows the DPWA power distribution system feeding power to 12 LG-1237 pressure
transducers.
Controller Fuel skid
Power for channel A XDSA P1

Outer valve
+ Adr= 0 Press Xdr
1 GP1OA
DPWA 12 Vdc +/-5% 2
Power LG-1237
1.2 Amp 3 Chan A
P1 P12 9 + 4
1 + 28 V P2
Return 10 5 Outer valve
2 to Adr= 1 Press Xdr
12 V 6 GP2OA
28 Vdc +/- 5% P12 LG-1237
11 + 7
Return 8
Isol 12
P2
1 P12 13 +
2 Return P3
14 Outer valve
+ Adr= 2 Press Xdr
Grd1 9 Power GP1OB
15 LG-1237
Redundant Grd2 10
power supply
16 11 Chan B
when required P3 12 P4
13 Outer valve
Adr= 3 Press Xdr
14 LG-1237 GP2OB
15
Return 100K Stab-on
1 16
SCOM 20K
2
P4
P28_J1 100K nearest gnd
3
SCOM 20K
4
P28_J2 100K 5
SCOM 20K 6 XDSA P1
Pilot valve
+ Adr= 4 Press Xdr
1 LG-1237 GP1PA
Power
2
3 Chan A
4 P2
5 Pilot valve
Adr= 5 Press Xdr
6 LG-1237 GP2PA
7
8
P3
Pilot valve
Adr= 6 Press Xdr
Power for channel B + 9 Power LG-1237
GP1PB
10
DPWA 12 V dc +/-5% 11 Chan B
12 P4
1.2 Amp Pilot valve
P1 13 Adr= 7 Press Xdr
P12 9 + 14 GP2PB
28 V LG-1237
to Return 10 15
12 V 16 Stab-on
P12 11 +
Return 12
Isol
P2 nearest gnd
P12 13 +
Return 14
Grd1 15
XDSA P1
Grd2 16 Inner valve
+ Adr= 8 Press Xdr
P3 1 Power LG-1237 GP1IA
2
3 Chan A
4 P2
5 Inner valve
Adr= 9 Press Xdr
Return 100K 6 LG-1237 GP2IA
P4 1 VDCx 7
SCOM 20K 2 Retx 8
P28_J1 100K 3 VDCx
SCOM 20K 4 Retx P3
Inner valve
P28_J2 100K + Adr= 10 Press Xdr
5 VDCx 9 Power GP1IB
20K LG-1237
SCOM 6 Retx 10
11 Chan B
12 P4
13 Inner valve
Power supply Adr=11 Press Xdr
14 LG-1237 GP2IB
monitoring 15
voltage 16 Stab-on
inputs
nearest gnd
DPWA Power Distribution to XDSA and Smart Pressure Transducers

Specifications
Item Specification
Number of Channels Three power output terminal pairs
Input voltage 28 V dc 5%, provisions for redundant source
Input current Limited by protection to no more than 1.6 A steady state
Output voltage 12 V dc 5%, maximum total current of 1.2 A, short circuit protected, and self-recovering
Monitor voltages Attenuated by 6:1 ratio
Diagnostics
DPWA features three voltage outputs to permit monitoring of the board input power.
The voltage monitor outputs are all attenuated by a 6:1 ratio to permit reading the 28
V dc using an input voltage with 5 V dc full scale input. Terminal 1 (PSRet) is the
attenuated voltage present on the power input return line. Terminal 3 (PS28VA) is the
attenuated voltage present on the P1 positive power input line. Terminal 5 (PS28VB) is
the attenuated voltage present on the P3 positive power input line. Terminals 2, 4, and 6
provide a return SCOM path for the attenuator signals. In redundant systems, monitoring
PS28VA and PS28VB permits the detection of a failed or missing redundant input. In
systems with floating 28 V power, with the input centered on SCOM, the positive and
return voltages should be approximately the same magnitude as a negative voltage on the
return. If a ground fault is present in the input power, it may be detected by positive or
return attenuated voltage approaching SCOM while the other signal doubles.
Configuration

Servo Control (VSVO)
VSVO Servo Control
The Servo Control (VSVO) board controls four electro-hydraulic servo valves that
actuate the steam/fuel valves. These four channels are usually divided between two
servo terminal boards (TSVO or DSVO). Valve position is measured with linear variable
differential transformers (LVDT). The loop control algorithm is run in the VSVO.
Three cables connect to VSVO on J5 plug on the front panel and the J3/J4 connectors
on the VME rack. TSVO provides simplex signals through the JR1 connector, and fans
out TMR signals to the JR1, JS1, and JT1 connectors. Plugs JD1 or JD2 are for external
trips from the protection module.
TSVO Terminal Board External VSVO Processor Board

trip
x
x x
x 1 JT1
x 2 37-pin "D" shell RUN
x 4 x 3 FAIL
x 5 JD1 type connectors STAT
x 6
x 8 x 7 with latching
x 10 x 9 JD2 fasteners
x 12 x 11
LVDT inputs x 13
Pulse rate inputs x 16 x 15
x 18 x 17
LVDT excitation x 19 Cables to VME
x 20 JT5 JS1
Servo coil outputs x 22 x 21 rack T
x 24 x 23
x
x
x 26 x 25 JS5
x 28 x 27 Cables to VME
x 30 x 29 rack S
x 32 x 31 J5
x 34 x 33 JR1
x 36 x 35
x 38 x 37 JR5
x 40 x 39 VSVO
x 42 x 41 x
x 44 x 43
x 46 x 45
x 47 J3
x 48
x
x
Shield Connectors on
bar VME rack R J4
Barrier type terminal Cables to VME

blocks can be unplugged rack R
From second TSVO
Servo/LVDT Terminal Board, VSVO Processor Board, and Cabling
GEH-6421Q System Guide, Volume II Servo Control (VSVO) 15-1

Installation
its edge connectors
Operation
VSVO provides four channels consisting of bi-directional servo current outputs, LVDT
position feedback, LVDT excitation, and pulse rate flows inputs. The TSVO provides
excitation for, and accepts inputs from, up to six LVDT valve position inputs. There is a
choice of one, two three, or four LVDTs for each servo control loop. Three inputs are
available for gas turbine flow measuring applications. These signals come through TSVO
and go directly to the VSVO board front at J5.
Each servo output is equipped with an individual suicide relay under firmware control
that shorts the VSVO output signal to signal common when de-energized, and recovers to
nominal limits after a manual reset command is issued. Diagnostics monitor the output
status of each servo voltage, current, and suicide relay.
Simplex Systems
VSVO circuits for a simplex system are shown in the following figures.
15-2 Servo Control (VSVO) GEH-6421Q Mark* VI Control

Capacity <R> Control Module
6 LVDT/R inputs on each of 2
boards, and total of 2 active/passive Controller
magnetic pickups. Application Software
Termination
Board TSVOH1B
(Input portion) Servo Board
VSVO
JR1 J3
LVDT LVDT1H 1 Digital
3.2k Hz, SCOM
A/D Regulator servo
7 V rms regulator
excitation P28VR
A/D converter
2
source LVDT1L D/A D/A converter
6 Ckts. P28V Servo driver P28V J3

or LVDR Voltage
Limit
Current
Suicide
P24V1 41 limit Relay
P24VR1 42 Configurable
Gain To Servo
Pulse rate 39
P1TTL Outputs
inputs 43( JR5 J5 3.2KHz
active probes PR P1H Pulse Excitation To TSVO
2 - 20 k Hz TTL P1L 44 Rate
To
Connector second
(PR only available 45 CL
P24V2 on front of TSVO
on 1 of 2 TSVOs)
46 VSVO
P24VR2
Pulse rate 40 board
P2TTL
inputs, P2H 47(
magnetic PR
MPU P2L 48
pickups
2 - 20 k Hz Noise suppr.
LVDT and Pulse Rate Inputs, Simplex

Each servo output channel can drive one or two-coil servos in simplex applications, or
two or three-coil servos in TMR applications. The two-coil TMR applications are for
200# oil gear systems where each of two control modules drive one coil each and the
third module interfaces with the servo. Servo cable lengths up to 300 meters (984 feet)
are supported with a maximum two-way cable resistance of 15 ohms. Because there
are many types of servo coils, a variety of bi-directional current sources are selectable
by configuring jumpers.
Another trip override relay, K1, is provided on each terminal board and is driven from
the Protection Module. If an emergency overspeed condition is detected in the
Protection Module, the K1 relay energizes and disconnects the VSVO servo output from
the terminal block and applies a bias to drive the control valve closed. This is only
used on simplex applications to protect against the servo amplifier failing high, and is
functional only with respect to the servo coils driven from <R>.
Note The primary and emergency overspeed systems can trip the hydraulic solenoids
independent of this circuit.

<R>
Controller Terminal Board

TSVOH1B (continued)
Servo Board
Coil current range
VSVO
10,20,40,80,120 ma
A/D converter
Digital
P28VR JD1
A/D Regulator servo 1 Trip input from
K1 module (J1)
regulator 2
From
LVDT D/A D/A converter P28VR JD2
JP1 1
TSVO 120B
120 2
Servo driver J3 JR1 80
Servo coil from<R>
Voltage 40 25 SR1H
Limit 20
10 31
SRS1H
N
Suicide 1k 22 ohms
S
P28V Relay 2 Ckts. ohm 89 ohms
26 1k ohm
Configurable SR1L
Gain SCOM
17 ER1H
J5 3.2KHz,
3.2KHz
Pulse N 7V rms
Excitation
S 18 ER1L excitation
Rate
2 Ckts. SCOM source
Connector on Noise for LVDTs
front of VSVO To suppr-
second ession
TSVO
Servo Coil and LVDT Outputs, Simplex (continued) LVDT Outputs, Simplex

TMR Systems
In TMR applications, the LVDT signals on TSVO fan out to three racks through JR1,
JS1, and JT1. Three connectors also bring power into TSVO where the three voltages are
diode high-selected and current limited to supply 24 V dc to the pulse rate active probes.
VSVO circuits for a TMR system are shown in the following figures.
Note Only two pulse rate probes on one TSVO are used.
<R>
<S>
<T>
Controller
Terminal
Board TSVOH1B Servo Board
(Input Portion) VSVO
LVDT JR1 J3 A/D converter Digital

LVDT1H 1
3.2k Hz, A/D Regulator servo
7 V rms regulator
P28VR
excitation
2
JS1 J3
source LVDT1L P28V D/A D/A converter
SCOM Same for <S>
6 Ckts. P28VS
Servo driver To servo
Voltage
JT1 J3 Limit outputs
on TSVO
Same for <T>
P28VT
Diode Voltage
Select
P24V1 41 CL P28V Connector on Configurable
front of VSVO Gain
P24VR1 42 card in <R>
JR5 J5 To TSVO
Pulse rate P1TTL 39 3.2KHz
Pulse excitation
inputs
active probes 43( Rate
P1H
2 - 20 kHz PR
P1L 44 JS5 J5 in <S>
TTL

P24V2
on 1 of 2 TSVOs) 46 JT5 J5 in <T>
P24VR2
P2TTL
40
Pulse rate
P2H 47 (
inputs, PR
magnetic MPU P2L 48
pickups
Noise
2 - 20 kHz
suppression
LVDT and Pulse Rate Inputs, TMR

For TMR systems, each servo channel has connections to three output coils with a range
of current ratings up to 120 mA selected by jumper.
<R>
<S>
<T>
Controller
Terminal Board
TSVOH1B (continued)
Servo Board
VSVO Servo current range
Digital 10,20,40,80,120 ma
A/D converter servo
JD1 Trip input from
regulator
A/D Regulator P28VR 1
2
 not used for
From Suicide TMR
TSVO P28VR JD2
D/A relay JP1
LVDT 120B
1
120 2
Servo coil from <R>
25 S1RH
Voltage 40
Limit 20
10 31
N
22 ohms
2 Ckts. S
89 ohms
26 S1RL 1k ohm
Configurable
Gain
17 ER1H 3.2KHz,
J5 3.2KHz 7V rms
Pulse excitation
N
2 Ckts S 18 excitation
Rate ER1L
source
Connector on J3 JS1 JP2 For LVDTs
front of VSVO 120B
120 Servo coil from <S>
card 80 27 S1SH
40
20
10 N
S
2 Ckts. 28 S1SL
21 ESH 3.2KHz,
1 Ckt. N 7V rms
S 22 ESL excitation
J3 JT1 source
JP3
120B
120
80
Servo coil from <T>
29 S1TH
40
20
10
N
S
2 Ckts. 30 S1TL
23 ETH 3.2KHz,
N 7V rms
1 Ckt. S 24 ETL excitation
source
Noise suppression
For LVDTs
Servo Coil Outputs and LVDT Excitation, TMR

The following table defines the standard resistance of servo coils, and their associated
internal resistance, selectable with the terminal board jumpers shown in the figure above.
In addition to these standard servo coils, non-standard coils can be driven by using a
non-standard jumper setting. For example, an 80 mA, 125 coil can be driven by using
a jumper setting 120B.
Servo Coil Ratings
Coil Type Nominal Current Coil Resistance (Ohms) Internal Resistance Application
(Ohms)
1 10 mA 1,000 180 Simplex and TMR
2 20 mA 125 442 Simplex
3 40 mA 62 195 Simplex
4 40 mA 89 195 TMR
5 80 mA 22 115 TMR
6 120 mA (A) 40 46 Simplex
7 120 mA (B) 75 10 TMR
Note The total resistance is equivalent to the standard setting.
The control valve position is sensed with either a four-wire LVDT or a three-wire linear
variable differential reluctance (LVDR). Redundancy implementations for the feedback
devices are determined by the application software to allow the maximum flexibility.
LVDT/Rs can be mounted up to 300 meters (984 feet) from the turbine control with a
maximum two-way cable resistance of 15 .
Each terminal has two LVDT/R excitation sources for simplex applications and four for
TMR applications. Excitation voltage is 7 V rms and the frequency is 3.2 kHz with a
total harmonic distortion of less than 1% when loaded.
Note The excitation source is isolated from signal common (floating) and is capable of
operation at common mode voltages up to 35 V dc, or 35 V rms, 50/60 Hz.
A typical LVDT/R has an output of 0.7 V rms at the zero stroke position of the valve
stem, and an output of 3.5 V rms at the designed maximum stoke position (these are
reversed in some applications). The LVDT/R input is converted to dc and conditioned
with a low pass filter. Diagnostics perform a high/low (hardware) limit check on the
input signal and a high/low system (software) limit check.
Two pulse rate inputs connect to a single J5 connector on the front of VSVO. This
dedicated connection minimizes noise sensitivity on the pulse rate inputs. Both passive
magnetic pickups and active pulse rate transducers (TTL type) are supported by the inputs
and are interchangeable without configuration. Pulse rate inputs can be located up to 300
meters (984) from the turbine control cabinet, assuming a shielded-pair cable is used with
typically 70 nF single ended or 35 nF differential capacitance and 15 resistance.
Note The maximum short circuit current is approximately 100 mA with a maximum
power output of 1 W.

10 or 20 ms. Magnetic pickups typically have an output resistance of 200 and an
inductance of 85 mH excluding cable characteristics. The transducer is a high impedance
source, generating energy levels insufficient to cause a spark.
Digital Servo Regulators
The Digital Servo Regulators n = 1-4 in the following figure divides the servo regulators
into the software and hardware portions of the control loop. The user can choose the
LVDT and pulse rate inputs as the servo feedback. The LVDT input is a 3.2 kHz
sinusoidal signal with a magnitude proportional to the position of the electro-mechanical
valve that is controlled by the servo output. The pulse rate input is TTL-type signal or a
periodic signal that triggers a comparator input. The comparator output transitions are
counted by an FPGA on VSVO and converted to a flow rate. For LVDT feedbacks,
LVDT1 12 are scaled and conditioned in the Position Feedback function of the Digital
regulator and can also be independently conditioned by a separated Monitoring function.
The asterisk after a block name indicates a more detailed drawing exists to better define
the block function. All signal space I/O for the VSVO is identified as either si for system
input (the controller reads the signal space variable from the servo) or so for system
output (the controller writes the signal space variable to the servo card). Italic text is
defined as a configuration parameter that can be changed in the toolbox to redefine the
operation of the VSVO. Internal variables, for example Variable_Name, are not visible
to the user through the toolbox.

Digital Servo Regulators n = 1 - 4
SystemLimits
PRType Dither_Freq I/O Configuration
RegNumber EnableCurSui
PRScale
MonitorType RegType DitherAmpl EnablFdbkSui
SuicideForcen (VSVO Servo firmware)

CalibEnabn Regn_Error
(so) (si)
(so)
RegnSuicide
Digital Reg. (RegType)* (si)
Regn_Ref MasterReset
(so) + (so) Servo Suicide Rn_SuicideNV
100%
Control* (si)
G mA_cmdn
Regn_Fdbk Servo
(si) - -100% L3DIAG_VSVO
Open/Short
SuicideReset (si)
FlowRate1 Monitor*
(so)
Pulse (si) Dither Control
Position SuicDrv
Rate FlowRate2 Calibration +
Fdbk +
Calc. (si) Function K_comp %
Function ServoOutnNV
IMFBKn function -----
(I range) cnt (si)
50% Duty Cyl

ServoOutputn
Monitor* (si)
ServoOutnNV
volts / cnt -1
(si)
ServoOutIn
Monx
(si)
(si) x=1- 12
Execution Rate = 200 Hz
(VSVO Hardware)
FPGA Registe
r
PulsRate1H/L
Pulse Rate
SUIMON Servo Current Regulator n
Support Logic
PulsRate2H/L I/O SUICDRVH
AE1H/L K1
BE1H/L ACOM T
P28 o
LVDT1-12 10
AE2H/L SERVOxH
Servo n D/A DACIREF Op BUF
BE2H/L D/A Amp
Controller +/- 4.0V FS ohm
T
f LV1H/L M
ACOM S
r A/D U Diff
LV2H/L cntrl X V
o IMFBK +/- 2.0V @full scale Amp SERVOxL O
m LV3H/L A/D Controller & Register
A/ Servo1
Interface to PSVO Programmable
LV4H/L D Gain /4 ACOM
T M Microprocessor Gain
Reg
S U cntrl
LV5H/L
V X
O LV6H/L Logic
I/O
LV7H/L Param_Name - Servo config parameter (Toolbox view)
Signal_Name - signal from A/D in (no Toolbox view)
LV8H/L Variable_Name - internal vars to Servo (no Toolbox view)
* - indicates a detailed drawing with title per block name.
LV9H/L
Input_Name - Input to controller from Servo
LV10H/L (si) (Toolbox view)
Output_Name - Output from controller to Servo
LV11H/L (so) (Toolbox view)
LV12H/L

Servo Suicide Control
The Servo Suicide Control function compares the absolute value of the filtered servo
current error against the configuration parameter value, Sui_Margin. This function
determines if the hardware servo current regulator has lost control of the current. If the
current feedback is not following the current command, a diagnostic is generated and the
servo current output is suicided (disabled and put in a safe state).

Servo Suicide Control
SuicideForce
Master_Reset (so)
(so) EnablCurSuic(cfg)
1
0
0
LowPass > Reg_Type(cfg) =
Y Time 4_LV_LM
Filter ABS Sui_Margin S
Delay
Tc = .5 sec (cfg) Latch OR
R
Suicide_Reset N
(so) No Time Delay
+ - Master_Reset
(so)
Master_Reset 1
mA_cmdx IMFBx (so)
<= 1) Clear Servo I Diag.
where where Suicide_Reset
Sui_Margin
x = 1- 4 x = 1- 4 Y (so)
(cfg) 2) Servo State = OK
Servo State =

N Suicide_Reset Failed
(so) 1
Cur_Sui_En(cfg) 1) Set Servo I Diag. EnablCurSuic(cfg)
2) Servo State = Failed
suicide
1) Servo State = OK
Limit_Check_Servo_Output_Current
1) Set Servo Current Range
Suicide_Reset
(so) 2) FPGA out = no suicide
Master_Reset OR
CalibEnabn (so) 3) Servo State = OK
n=1- 4 (so) 1) Set Servo Current Range = 120 mA
4) Servo Reg Health = OK
2) FPGA out = suicide
NOT
3) Servo State = Failed
4) Servo Reg Health = Not OK
1) Set Servo Current Range
2) FPGA out = no suicide
3) Servo State = OK
Param_Name(cfg) - Servo config parameter (Toolbox view) 4) Clear I/O Diagnostic

Variable_Name - internal vars to Servo (no Toolbox view) 5) Servo Reg Health = OK
Input_Name - Input to controller from Servo 1) Set Servo Current Rng = 120 mA
(si) (Toolbox view)
2) FPGA out = suicide
(so) (Toolbox view) 3) Servo State = Failed
4) Set I/O Offline Diagnostic

DPM_State_Online
(Servo is OnLine) 5) Servo Reg Health = OK

Open/Short Detect Function
The servo output open circuit detection function checks for open or broken wires between
the terminal screws of the terminal board and the servo coil. If the servo driver voltage is
high and no current is flowing, the diagnostic alarm, Msg_Servo_Open, is issued.
Diagnostic Alarm
(Msg_Servo_Short)
|ServoOutVn| <= Diag = True
|ServoOutnNV * ohms * delta_mA_pct + 0.2| Servo State /= Failed
Diagnostic Alarm
(Msg_Servo_Short)
Diag = False
Presently, disabled in PSVO
Diagnostic Alarm
(Msg_Servo_Open)
Diag = True
|ServoOutVn| > 5 V ServoOutnNV < 10 %
Diagnostic Alarm
(Msg_Servo_Open)
Diag = False
Open_Short_Detect is called by the Servo routine every 5ms.
Open Short Detect Function
1 PulseRate /2 PulseRateMax
The Digital Servo Regulator is configured as a flow-rate regulator. A pulse signal with
a frequency proportional to the flow-rate of the liquid fuel is the feedback for the 1
PulseRate version of the flow-rate regulator. With the dual input, the larger pulse rate
frequency is selected as the feedback for the flow rate regulator. System Limit functions
monitor each pulse rate input and are enabled through the configuration parameter,
SysLimxEnabl. It can latch the signal space limit flags SysLimxPR1 and/or SysLimxPR2.

Digital Servo Regulator RegType = 1_PulseRate
PR_Scale (EU * sec / pulse) SysLim1Enabl I/O Configuration

SysLim2Type Reg_Gain RegType
SysLim2Enabl SysLim1Type
PRateInput1 SysLimit2 SysLimit1 RegNullBias
SysLim2Latch SysLim1Latch
Sys2 Lmt En
Regn_error
>= Lmt
<= Value
SysLim2PR1 n=1- 4 (si)
0
(si)
input
Latch Option
Param_Name - Servo config parameter (Toolbox view) Regn_Ref
Signal_Name - signal from A/D in (no Toolbox view) n=1- 4(so)
Variable_Name - internal vars to Servo (no Toolbox view)
Sys1 Lmt En
Input_Name - Input to controller from Servo >= Lmt + +
(si) (Toolbox view) <= Value
0 +
SysLim1PR1
Servo_mA_ref(%)

Output_Name - Output from controller to Servo input (si) -
(so) (Toolbox view) Latch Option +
Regn_fdbk
0 M
(si) n=1- 4
U FlowRate1
fs1 = (# pulses/sec) /
X Regn_NullCor
(# pulses/entry)
n=1- 4 (so)
fs1 Pulse Rate 1 Calc.
# of fs2 = 100hz
Pulses # of Entries to # of Pulses /
List Use List Entry
Flow Spd LM HiSpd Flow Spd LM HiSpd
PLE0
PLE1 Eng. Units
1 4 3 2 Gear5 24 24 24 32
PLE2 Hysteresis
PLE3
from 1 4 4 2 Gear4 8 12 12 16
FPGA .
PR1 . 1 4 6 2 Gear3 4 6 8 8
Pulse . 1 2 2 1 Gear2 2 3 8 4
Ctr PLE127 1 1 1 1 Gear1 1 2 8 2
PLE(x) - PLE(x - # of Speed (rpm)
# of entries to use) pulses Flow (pulses/sec) 362 724 1448 2896
--------------------------------------- pulses / sec Spd (pulses/sec) 724 1448 2896 5793
Tics
TLE(x) - TLE(x - # of tic
List LM (pulses/sec) 724 1448 2600 5400
entries to use)
TLE0 HSpd(pulses/sec) 724 1448 2896 5793
TLE1
TLE2 6.25 e +06 tics
TLE3 ------
Accel1
from . sec PR_Scale
PLE(x) - PLE(x - 24) PLE(x) - PLE(x - 12) (si)
FPGA .
TLE(x) - TLE(x - 24) TLE(x) - TLE(x - 12) pulses/sec/sec
Timer .
TLE12 (TLE(x) - TLE(x - 24)) / 2
7
PR_Scale
PR_Type
I/O Configuration

Digital Servo Regulator RegType = 2_PlsRateMAX
PRateInput2 SysLim2Enabl SysLim1Enabl I/O Configuration

Reg_Gain RegType
PR_Scale SysLim2Type SysLim1Type
(EU * sec / SysLimit2 SysLimit1 RegNullBias
pulses) PRateInput1 SysLim2Latch SysLim1Latch
Sys2 Lmt En Sys2 Lmt En
>= Lmt >= Lmt Param_Name - Servo config parameter(Toolbox view)

<= Value <= Value
SysLim2PR1 Signal_Name - signal from A/D in (no Toolbox view)
0 0
SysLim2PR2 (si) Regn_error Variable_Name - internal variables(no Toolbox view)
from input (si) input
n=1- 4 (si) * - IDs a detailed drawing with title per block name.
FPGA Accel2 Latch Option Latch Option
PR2 (si)
Regn_Ref (si) (Toolbox view)
Pulse
Sys1 Lmt En Sys1 Lmt En n=1- 4(so) Output_Name - Output from controller to Servo
15-14 Servo Control (VSVO)

Ctr (so) (Toolbox view)
Pulse >= Lmt >= Lmt
Rate 2 <= Value <= Value
0 0
SysLim1PR2 SysLim1PR1
Calc. input input (si) + +
from (si)
Latch Option Latch Option +
FPGA Servo_mA_ref(%)
Timer PR2 0 M -
Regn_fdbk +
M U FlowRate1
0 Maximum (si) n=1- 4
U X
Select
X FlowRate2 Regn_NullCor
PR1 n=1- 4 (so)
fs1 Pulse Rate 1 Calc.
Pulse fs2 = 100hz

Count PR1 # of Entries to # of Pulses /
List Use List Entry
fs1 = (# pulses/sec) / Flow Spd LM HiSpd Flow Spd LM HiSpd
PLE0
(# pulses/entry)
PLE1 1 4 3 2 24 24 24 32
Gear5
PLE2 Hysteresis
PLE3
from PR_Scale 1 4 4 2 8 12 12 16
. Gear4
FPGA
PR1 . 1 4 6 2 Gear3 4 6 8 8
Pulse . 1 2 2 1 Gear2 2 3 8 4
Ctr PLE127 1 1 1 1 Gear1 1 2 8 2
PLE(x) - PLE(x - # of Speed (rpm)
# of entries to use)
pulses Flow (pulses/sec) 362 724 1448 2896
-------------------------------------- pulses / sec Spd (pulses/sec) 724 1448 2896 5793
Tics
TLE(x) - TLE(x - # of tic
List LM (pulses/sec) 724 1448 2600 5400
entries to use)
TLE0 HSpd(pulses/sec) 724 1448 2896 5793
TLE1
TLE2 6.25 e +06 tics
TLE3 ------
Accel1
from . sec PR_Scale
PLE(x) - PLE(x - 24) PLE(x) - PLE(x - 12) (si)
FPGA . pulses/sec/sec
Timer . TLE(x) - TLE(x - 24) TLE(x) - TLE(x - 12)
TLE12 (TLE(x) - TLE(x - 24)) / 2
7
PR_Scale
PR_Type I/O Configuration
GEH-6421Q Mark* VI Control

1 LVposition, 2 LVposMIN, 2LVposMAX, 3LVposMID
The following LVDT feedback configurations are provided for the servo value position
loop:
1_LVposition one LVDT signal is used as the position feedback.
2_LVposMIN the minimum of two LVDT signals is selected as the position
feedback.
2_LVposMAX the maximum of two LVDT signals is selected as the position
feedback.
3_LVposMID the median of three LVDT signals is selected as position feedback.
The LVDT feedback signals are bounded and scaled using the Calibration function.
The Calibration function uses the following configuration parameters: position at
the minimum end stop in engineering units (EU), MinPOSvalue, and the position at
the maximum end stop in EU, MaxPOSvalue. In the calibration mode the LVDT
sensors are forced into the minimum and maximum positions. The feedback voltages,
MnLVDTx_Vrms and MxLVDTx_Vrm,s are recorded for each of the LVDT feedbacks used.
From these values, the internal constants Reg_Sensor_Hdwr_Hi, Reg_Sensor_Hdwr_Lo,
Reg_Sensor_Offset, Reg_Sensor_Gain, and Reg_Sensor_End_Stop_Min are calculated.
These internal constants are used by the Regulator Calculation Position function.
The Regulator Calculation Position function performs an input boundary check
that makes sure the input signal is between the values, Reg_Sensor_Hdwr_Hi and
Reg_Sensor_Hdwr_Lo. If the feedback input is out of range a diagnostic alarm is
generated. The scaling from volts_rms to position feedback in EU is calculated next. A
limit check is then performed on the selected feedback.

Digital Servo Regulator RegType = 1_LVposition
I/O Configuration
Reg_Gain
LVDT1input
RegType RegNullBias
TMR_DiffLimt
Regn_Ref CalibEnabn

n=1- 4 (so) Regn_error n=1- 4 (so)
(si) n=1- 4
+ +
LVDT1 +
LVDT2 X Servo_mA_ref(%)
LVDT3
LVDT4 - +
LVDT5
M
LVDT6 Reg Calc. Limit
U Position(%) Regn_NullCor
LVDT7 Position* Check*
X Regn_fdbk n=1- 4 (so)
LVDT8
LVDT9 (si) n=1- 4
LVDT10
LVDT11
LVDT12
Calibrate
Function* MnLVDT1_Vrms(cfg),
Reg_Sensor_Hdwr_Hi
MxLVDT1_Vrms(cfg)
Reg_Sensor_Hdwr_Lo
RegCalMode
Reg_Sensor_Offset
(si)
Reg_Sensor_Gain
CalibEnabn
Reg_Sensor_End_Stop_Min
(so) n=1- 4
Param_Name(cfg) - Servo config parameter (Toolbox view)

Input_Name - Input to controller from Servo (Toolbox MaxPosValue LVDT_Margin
(si) view)
Output_Name - Output from controller to Servo MinPosValue
(so) (Toolbox view) I/O Configuration

Digital Servo Regulator RegType = 2_LVposMIN
I/O Configuration
LVDT1input
Reg_Gain
LVDT2input
RegType RegNullBias
TMR_DiffLimt
LVDT1
LVDT2
Regn_error
LVDT3
Status_B (si) n=1- 4
LVDT4
LVDT5 M Status_A
LVDT6 Reg Calc. Regn_Ref
U CalibEnabn
LVDT7 Position*
X n=1- 4 (so) n=1- 4 (so)
LVDT8
PositionA(%)
LVDT9
LVDT10 StatA StatB
LVDT11 A + +

LVDT12 +
X Servo_mA_ref(%)
B
LVDT1
- +
M PositionB(%)
Reg Calc.
U Limit Regn_NullCor
Position* MIN M
X Check* n=1- 4 (so)
Regn_fdbk
(si) n=1- 4
LVDT12
Minimum Select
Calibrate MnLVDT1_Vrms(cfg),
Function* MxLVDT1_Vrms(cfg)
Reg_Sensor_Hdwr_Hi
Reg_Sensor_Hdwr_Lo
MnLVDT2_Vrms(cfg),
MxLVDT2_Vrms(cfg)
Reg_Sensor_Offset
RegCalMode
Reg_Sensor_Gain
(si)
Reg_Sensor_End_Stop_Min CalibEnabn
(so) n=1- 4

(si) view)

Digital Servo Regulator RegType = 2_LVposMAX
LVDT1input I/O Configuration
Reg_Gain
LVDT2input
RegType
RegNullBias
TMR_DiffLimt
LVDT1
LVDT2
LVDT3
Status_B
LVDT4
LVDT5
M Status_A
LVDT6 Reg Calc.
U CalibEnabn

LVDT7 Position* Regn_error
X Regn_Ref n=1- 4 (so)
LVDT8 PositionA(%) n=1- 4 (si)
LVDT9 n=1- 4 (so)
LVDT10 StatA StatB
LVDT11 A + +
LVDT12 +
B X Servo_mA_ref(%)
LVDT1
- +
PositionB(%)
M Reg Calc. Limit
MAX M Regn_NullCor
U Position* Check*
(si) n=1- 4
LVDT12
Maximum Select
Calibrate MnLVDT1_Vrms(cfg),
Function* MxLVDT1_Vrms(cfg)
Reg_Sensor_Hdwr_Hi
MnLVDT2_Vrms(cfg),
Reg_Sensor_Hdwr_Lo
MxLVDT2_Vrms(cfg)
Reg_Sensor_Offset
RegCalMode
Reg_Sensor_Gain
(si)
CalibEnabn
(so) n=1- 4

(si) view)

Digital Servo Regulator RegType = 3_LVposMID
LVDT1input I/O Configuration

RegNullBias
LVDT2input
RegType Reg_Gain
LVDT3input TMR_DiffLimt
LVDT1
LVDT2
LVDT3
LVDT4
LVDT5 M
LVDT6 Reg Calc. Regn_Ref
U CalibEnabn
LVDT7 Position* Regn_error
X n=1- 4 (so) n=1- 4 (so)
LVDT8
(si) n=1- 4
LVDT9
LVDT10
LVDT11 + +
PositionA(%)
LVDT12 +
X Servo_mA_ref(%)

LVDT1
- +
M Reg Calc. Median Limit

U PositionB(%) Regn_NullCor
Position* Select Check*
(si) n=1- 4
LVDT12
PositionC(%)
LVDT1
M
Reg Calc.
U MnLVDT1_Vrms(cfg),
Position*
X MxLVDT1_Vrms(cfg)
Calibrate
LVDT12 Function* MnLVDT2_Vrms(cfg),
Reg_Sensor_Hdwr_Hi
MxLVDT2_Vrms(cfg)
Reg_Sensor_Hdwr_Lo
MnLVDT3_Vrms(cfg),
MxLVDT3_Vrms(cfg)
Reg_Sensor_Offset
RegCalMode
Reg_Sensor_Gain
(si)
CalibEnabn
(so) n=1- 4

(si) view)

Reg_Calc_Position
Reg_Sensor_Hdwr_Lo[x] <= LVDT[x].volt_rms <= Reg_Sensor_hdwr_Hi[x]

Reg_Sensor_Offset[x] Reg_Sensor_End_Stop_Min[x]
Is a LVDT selected? Reg_Sensor_Fail_Ctr < Failed_2 Reg_Sensor_Gain[x]
- +
LVDTx + +

X Reg_Sensor[x].Pos (%)
where x = 1 - 12
+ Reg_Sensor[x].Pos(%)
Reg_Sensor is used for RegTypes:
_Hdwr_Hi[x] 1_LVposition
2_LVposMIN
X 1) Reg_Sensor.state = OK 2_LVposMAX
2) Reg_Sensor_Fail_Ctr = 0 3_LVposMID
3) Clear Diagnostic Alarm
1.1
Reg_Sensor[x].volts_rms
Reg_Sensor[x].volts_rms
is used for RegTypes:
4_LVLM
1) Reg_Sensor.state = Fail
2) Set Diagnostic Alarm
1) Increment Reg_Sensor_Fail_Ctr
2) Don't update Reg_Sensor_Pos
Reg_Sensor_Hdwr_Lo[x] = MnLVDT_Vrms(cfg) - (MxLVDT_Vrms(cfg) - MnLVDT_Vrms(cfg)) * LVDT_Margin(cfg) / 100 before calibration.
Reg_Sensor_Hdwr_Hi[x] = MxLVDT_Vrms(cfg) + (MxLVDT_Vrms(cfg) - MnLVDT_Vrms(cfg)) * LVDT_Margin(cfg) / 100 before calibration.


Limit Check Function
Fdbk_lo_limit < Regn_fdbk < Fdbk_hi_limit

(si) GoodFdbk = True
RegType(cfg) /=
Fdbk_lo_limit < Fdbk_hi_limit 4LV_LM
Regn_PosAFlt =False
(si)
Fdbk_hi_limit < Regn_fdbk < Fdbk_lo_limit
(si)
Regn_PosBFlt =False
(si)
Master_Reset
GoodFdbk = True (so)
1) Clear Diag. Alarm "Msg Sel Pos"
2) Regn_fdbk health bit "OK"
3) Fbk_Fail_ctr = 0
Suicide_Reset
(so)
Increment Fbk_Fail_ctr
Fbk_Fail_Ctr < Threshold
1) Regn_fdbk health bit "Not OK"

2) Fdbk_state = Failed
EnableFdbkSuic = True 1) Set Diag. Alarm "Msg Sel Pos"

(so)
Fdbk_lo_limit = MinPOSvalue(cfg) - Fdbk_suicide_margin
Fdbk_hi_limit = MaxPOSvalue(cfg) + Fdbk_suicide_margin

(si) (Toolbox view)
(so) (Toolbox view)

4 LV_LM
The 4_LV_LM Digital Servo regulator uses four LVDT inputs to calculate the single
position feedback required for the servo position loop. The Regulator Calculation
Position performs the boundary check for the LVDT input signals. The scaling from
volts_rms to position in EU is not calculated, but the volts_rms value for each of the
LVDT feedbacks is calculated. The ratio of (A B) / (A + B) is performed on the LVDT
input pairs and scaling is calculated using the input from the Calibration function.
The internal variables, Reg_2LV[A].pos, PosA and Reg_2LV[B].pos, PosB are checked
against the configuration parameter limits, MinPOSvalue and MaxPOSvalue in the
Position A & B Diagnostic function. Results from PosA, PosB, and the diagnostic
Booleans feed the Position Feedback Selection function. Refer to the Position Feedback
Selection block diagram to understand the details of the function.
Other differences in the LM servo regulator are the following:
Gain Modifier function
Lead/Lag filter on the position error
Configurable servo position error output clamp

Digital Servo Regulator RegType = 4_LV_LM
RegType I/O Configuration
CurSlope2 LagTau
MaxPosValue LeadTau
LVDT1input CurBreak
LVDT2input RegNullBias CurClpPs
MinPosValue CurSlope1
LVDT3input TMR_DiffLimt
Reg_Gain CurClpNg
LVDT4input
Reg_Sensor_Hdwr_Hi[x]
Reg_Sensor_Hdwr_Lo[x]
Reg_2LV[0].pos.gain
LVDT1
Reg_2LV[0].pos.offset
M Reg_Sensor[B]. CalibEnabn
Reg Calc.
U volts_rms n=1- 4 (so)
Position*
X (refer to details) Regn_Ref
A + B /= 0 MiscFdbknA
n=1- 4 (si) n=1- 4 (so)
LVDT12 -
A-B +
-------- X
Reg_2LV[A].pos

A +B + Regn_error +
LVDT1
(si) n=1- 4 + 1 + s * LeadTau Servo_
Regn_ mA_
0 X
M Pos AFlt 1 + s * LagTau ref%)
Reg Calc. n=1- 4 (si) - +
U
Position* Reg_Sensor[B].volts_rms Regn_fdbk Gain Modifier Lead/Lag Filter Clamp
X PosA
Reg_2LV[A]. (si) n=1- 4
Diag.* Regn_NullCor
Reg_2LV[0].sum_failed pos.failed
LVDT12 Sum NOT USED
Reg_2LV[0].sum_lim_hi (si) n=1- 4
Check* Limit
Reg_2LV[0].sum_lim_lo PosDiffEnabn Regn_GainMod
Check*
n=1- 4 (si) (si) n=1- 4
Reg_2LV[1].sum_lim_hi
Sum Pos.
Reg_2LV[1].sum_lim_lo
LVDT1 Check* Reg_2LV[B]. Fdbk Reg_2LV[0].sum_lim_hi, Reg_2LV[0].sum_lim_lo
Reg_2LV[1].sum_failed PosB pos.failed Sel
Diag.* Reg_2LV[1].sum_lim_hi, Reg_2LV[1].sum_lim_lo
M Func*
Reg Calc. Reg_Sensor[C].volts_rms Reg_2LV[0].pos.failed_lim
U
Position* Regn_
X 0 Reg_2LV[0].pos.offset
Pos BFlt Regn_PosDif1(si) n=1- 4
n=1- 4 (si) Reg_2LV[0].pos.gain
LVDT12 Regn_PosDif2(si) n=1- 4
C-D Reg_2LV[B].pos Reg_2LV[1].pos.failed_lim
-------- X
+ Reg_2LV[1].pos.offset
C+D Calibrate
LVDT1 -
Function* Reg_2LV[1].pos.gain
C + D /= 0 Reg_Sensor_Hdwr_Lo[x], Reg_Sensor_Hdwr_Hi[x]
M
Reg Calc. Reg_2LV[1].pos.offset
U Reg_Sensor_Gain[x], Reg_Sensor_Offset[x]
Position
X (refer to details)
Reg_Sensor[D].volts_rms
MnLVDT1_Vrms(cfg), MxLVDT1_Vrms(cfg)
LVDT12 MiscFdbknB
Reg_2LV[1].pos.gain
n=1- 4 (si) MnLVDT3_Vrms(cfg), MxLVDT3_Vrms(cfg)
Reg_Sensor_Hdwr_Lo[x]
Reg_Sensor_Hdwr_Hi[x]
RegCalMode
Param_Name - Servo config parameter (Toolbox view) (si)
CalibEnabn
PosSelect PosDiffCmp1 LVDT_Margin n=1- 4 (so)
* - indicates a detailed drawing with title per block name. MinPosValue
PosDefltEnab PosDiffTime1
Input_Name - Input to controller from Servo LVDTVsumMarg
SelectMinMax PosDiffCmp2
(si) (Toolbox view) MaxPosValue I/O Configuration
DefltValue PosDiffTime2

(so) (Toolbox view)
Position A & B Diagnostic Function
PosA Diag Function
MinPosValue(cfg) <= Reg_2LV[A].pos <= If Reg_2LV[A].pos.failed_limit = 1 for MiscFdbk1A

MaxPosValue(cfg) then MiscFdbk1A (si)
(si) Health bit = OK
else MiscFdbk1A
LATCH
Reg_2LV[A].pos.failed_limit (si) Health bit = Not OK
1
S
If Reg_2LV[A].pos.failed_limit = 1 for MiscFdbk2A
then MiscFdbk2A (si)
R
0 else MiscFdbk2A
(si) Health bit = Not OK
Master_Reset
(so)
OR Reg_2LV[A].pos.failed
Reg_2LV[0].sum_failed
PosB Diag Function

Reg_2LV[1].sum_failed
OR Reg_2LV[B].pos.failed
MinPosValue(cfg) <= Reg_2LV[B].pos <=

MaxPosValue(cfg)
If Reg_2LV[A].pos.failed_limit = 1 for MiscFdbk1B
then MiscFdbk1B (si)
1 else MiscFdbk1B
LATCH
S
0 Reg_2LV[B].pos.failed_limit If Reg_2LV[A].pos.failed_limit = 1 for MiscFdbk2B
then MiscFdbk2B (si)
R
else MiscFdbk2B

Input_Name - Input to controller from Servo (Toolbox
(si) view)
(so) (Toolbox view)

Position Feedback Selection Function
| Reg_2LV[A].pos - Reg_2LV[B].pos | > | Reg_2LV[A].pos - Reg_2LV[B].pos | >
PosDiffCmp2 (cfg) for PosDiffTime2 (cfg) PosDiffCmp1 (cfg) for PosDiffTime1 (cfg) PosSelect(cfg) = 1
Reg_2LV[A] Reg_2LV[B] PosDefltEnab(cfg) PosSelect(cfg) = 0 PosSelect(cfg) = 2
.pos.failed .pos.failed PosDiffEnab
Reg_2LV[A]
(so) SelectMinMax(cfg)
.pos
MIN Select
Reg_2LV[B]
.pos

MAX Select
(A+B)/2
DefltValue
(cfg)
Regn_fdbk
(si)
where n=1 or 2
Regn_PosDif1(si)
Set
0
False
Set
False
1
After Time
Delay1, set
True After Time
Delay2, set
True
Param_Name(cfg) - Servo config parameter (Toolbox view) PosDiffTime1(cfg)
Variable_Name - internal vars to Servo (no Toolbox view) Regn_PosDif2(si)
Input_Name - Input to controller from Servo (Toolbox PosDiffTime2(cfg)
(si) view)

(so) (Toolbox view)
Sum Check Calc
+ Y
Reg_Sensor[A].volts_rms >= Reg_2LV[0]. sum_lim_hi
OR Reg_2LV[0].sum_failed = True
+
N
Reg_Sensor[B].volts_rms
Y
<= Reg_2LV[0]. sum_lim_lo
Reg_2LV[0].sum_failed =
N AND
False
+ Y
Reg_Sensor[C].volts_rms >= Reg_2LV[1]. sum_lim_hi
OR Reg_2LV[1].sum_failed = True
+
N
Reg_Sensor[D].volts_rms
Y
<= Reg_2LV[1]. sum_lim_lo
Reg_2LV[1].sum_failed =
N AND
False
Monitors - 1 LVposition, 2 LVposMIN, 2LVposMAX, 3LVposMID

The following Monitor configurations are available:
1_LVposition one LVDT signal is used as the position feedback.
2_LVposMIN the minimum of two LVDT signals is selected as the position
feedback.
2_LVposMAX the maximum of two LVDT signals is selected as the position
feedback.
3_LVposMID the median of three LVDT signals is selected as the position
feedback.

Monitor MonitorType = 1_LVposition
MinPosValue MonitorType I/O Configuration
LVDT1input
MaxPosValue
MnLVDT1_Vrms
MxLVDT1_Vrms LVDT_Margin TMR_DiffLimt
Offset1 = MinPosValue -
((MaxPosValue - MinPosValue) /
(MxLVDT1_Vrms - MnLVDT1_Vrms)) *
LVDT1 MnLVDT1_Vrms
LVDT2 Gain1 = (MaxPosValue - MinPosValue) /
LVDT3 (MxLVDT1_Vrms - MnLVDT1_Vrms)
LVDT4
LVDT5 Gain1 Offset1

+
LVDT6 M +
Monx
U X x=1- 12 (si)
LVDT7 X
LVDT8 If LVDTx > MxLVDT1_Vrms + LVDT_Margin *
(MxLVDT1_Vrms - MnLVDT1_Vrms)
LVDT9 then 1) Assign Monx unhealthy
LVDT10 x=1- 12 (si)
2) If Out_of_Limits 3 passes
LVDT11
then Set Diagnostic Alarm
LVDT12 else if LVDTx < -MnLVDT1_Vrms + LVDT_Margin *
then 1) Assign Monx unhealthy
x=1- 12 (si)
2) If Out_of_Limits 3 passes Param_Name - Servo config parameter (Toolbox view)
then Set Diagnostic Alarm Signal_Name - signal from A/D in (no Toolbox view)
else 1) Assign Monx healthy Variable_Name - internal vars to Servo (no Toolbox view)
2) Reset Out_of_limits counter. Input_Name - Input to controller from Servo (Toolbox
(si) view)
Note: x = 1 - 12

Monitor MonitorType = 2_LVposMIN or 2_LVposMAX
LVDT1input
MaxPosValue
LVDT2input MnLVDT1_Vrms MnLVDT2_Vrms
MxLVDT1_Vrms MxLVDT2_Vrms TMR_DiffLimt LVDT_Margin
If LVDTx > MxLVDTz_Vrms + LVDT_Margin *

Offset1 = MinPosValue - (MxLVDTz_Vrms - MnLVDTz_Vrms)
((MaxPosValue - MinPosValue) / then 1) Assign Monx unhealthy
x=1- 12 (si)
MnLVDT1_Vrms 2) If Out_of_Limits 3 passes
LVDT1

LVDT2 Gain1 = (MaxPosValue - MinPosValue) / else if LVDTx < -MnLVDTz_Vrms + LVDT_Margin *
LVDT3 (MxLVDT1_Vrms - MnLVDT1_Vrms) (MxLVDTz_Vrms - MnLVDTz_Vrms)
LVDT4 x=1- 12 (si)
LVDT5 Gain1 Offset1 2) If Out_of_Limits 3 passes
+
M + then Set Diagnostic Alarm
LVDT6
U X else 1) Assign Monx healthy
LVDT7 X 2) Reset Out_of_limits counter.
LVDT8 Offset2 = MinPosValue -
((MaxPosValue - MinPosValue) / Note: z = 1 - 2 and x = 1 - 12
LVDT9
LVDT10 MnLVDT2_Vrms
LVDT11
Gain2 = (MaxPosValue - MinPosValue) /
LVDT12
LVDT1
Gain2 Offset2 Maximum Select
+
M + if MonitorType = 2_LVposMAX
Monx
U X or
x=1- 12 (si)
X Minimum Select
if MonitorType = 2_LVposMIN
LVDT12
Param_Name - Servo config parameter (Toolbox view)

(si) view)

Monitor MonitorType = 3_LVposMID
LVDT1input
MaxPosValue
LVDT2input MnLVDT1_Vrms MnLVDT2_Vrms MnLVDT3_Vrms
MxLVDT1_Vrms MxLVDT2_Vrms MxLVDT3_Vrms TMR_DiffLimt LVDT_Margin
LVDT3input
If LVDTx > MxLVDTz_Vrms + LVDT_Margin *

Offset1 = MinPosValue - (MxLVDTz_Vrms - MnLVDTz_Vrms)
((MaxPosValue - MinPosValue) / then 1) Assign Monx unhealthy
x=1- 12 (si)
MnLVDT1_Vrms 2) If Out_of_Limits 3 passes
LVDT1
LVDT2 Gain1 = (MaxPosValue - MinPosValue) / else if LVDTx < -MnLVDTz_Vrms + LVDT_Margin *
LVDT3 (MxLVDT1_Vrms - MnLVDT1_Vrms) (MxLVDTz_Vrms - MnLVDTz_Vrms)
LVDT4 x=1- 12 (si)
LVDT5 Gain1 Offset1 2) If Out_of_Limits 3 passes

+
M + then Set Diagnostic Alarm
LVDT6
U X else 1) Assign Monx healthy
LVDT7 X 2) Reset Out_of_limits counter.
LVDT8 Offset2 = MinPosValue -
((MaxPosValue - MinPosValue) / Note: z = 1 - 3 and x = 1 - 12
LVDT9
LVDT10 MnLVDT2_Vrms
LVDT11
LVDT12
LVDT1
Gain2 Offset2
+
M +
Median Monx
U X x=1- 12 (si)
Select
X
Offset3 = MinPosValue -
LVDT12 ((MaxPosValue - MinPosValue) /
MnLVDT3_Vrms

LVDT1
Gain3 Offset3
M +
+
U X
X
LVDT12 Param_Name - Servo config parameter (Toolbox view)

(si) view)

Specifications
Item Specification
Number of inputs (per TSVO) 6 LVDT windings
2 pulse rate signals (total of 2 per VSVO)
External trip signal
Number of outputs (per TSVO) 2 servo valves (total of 4 per VSVO board)
4 excitation sources for LVDTs
2 excitation sources for pulse rate transducers
Internal sample rate 200 Hz
Power supply voltage Nominal 24 V dc
LVDT accuracy 1% with 14-bit resolution
LVDT input filter Low pass filter with 3 down breaks at 50 rad/sec 15%
LVDT common mode rejection CMR is 1 V, 60 dB at 50/60 Hz
Pulse rate accuracy 0.05% of reading with 16-bit resolution at 50 Hz frame rate
Noise of acceleration measurement is less than 50 Hz/sec for a
10,000 Hz signal being read at 10 ms
Pulse rate input Minimum signal for proper measurement at 2 Hz is 70 mVpk, and at
12 kHz is 827 mVpk.
Magnetic PR pickup signal Generates 150 V p-p into 60 k
Active PR Pickup Signal Generates 5 to 27 V p-p into 60 k
Servo valve output accuracy 2% with 12-bit resolution
Dither amplitude and frequency adjustable
Fault detection Suicide servo outputs initiated by:
Servo current out of limits or not responding

Diagnostics
Three LEDs at the top of the VSVO front panel show status information. The normal
RUN condition is a flashing green, and FAIL is solid red. The third LED is STATUS and
is normally off but displays a steady orange if an alarm condition exists on the board.
The output servo current is out of limits or not responding, which creates a fault.
The regulator feedback (LVDT) signal is out of limits. A fault is created and if the
associated regulator has two sensors, the bad sensor is removed from the feedback
calculation and the good sensor is used.
The servo has suicided. This creates a fault.
The A/D converter calibration voltage is out of limits and a default value is being
used.
The LVDT excitation voltage is out of range. A fault is created
The input signal varies from the voted value by more than the TMR differential
limit. This causes a fault to be created indicating a problem with this sensor input.
If any one of the above signals go unhealthy a composite diagnostic alarm,
L#DIAG_VSVO, occurs. Details of the individual diagnostics are available from
the toolbox. The diagnostic signals can be individually latched, and reset with the
Connectors JR1, JS1, JT1 on the terminal board have their own ID device that is
terminal board serial number, board type, revision number, and the plug location.
When the chip is read by VSVO and a mismatch is encountered, a hardware

Configuration
Configuration
System Limits Select system limits Enable, disable
Regulator 1 LVDT/R calibration Online LVDT calibration, yes/no
RegType Algorithm used in the regulator Unused 1_PulseRate
2_PlsRateMAX 1_LVposition
2_LVposMIN 2_LVposMAX
3_LVposMID 2_LvpilotCyl
4_LVp/cylMAX 4_LV_LM no_fbk
RegGain Position loop gain in (%current/%position) -200 to 200
RegNullBias Null bias in % current, balances servo spring force -100 to 100
DitherAmpl Dither in % current (minimizes hysteresis) Dither amp: 0 to 10
MinPOSvalue Position at Min End Stop in engineering units. -15 to 150
MaxPOSvalue Position at Max End Stop in engineering units. -15 to 150
MnLVDT1_Vrms LVDT1_Vrms at Min End Stop (Normally set by 0 to 7.1
the Calibration function)
MxLVDT1_Vrms LVDT1_Vrms at Max End Stop (Normally set by 0 to 7.1
:
MnLVDT4_Vrms LVDT4_Vrms at Min End Stop (Normally set by 0 to 7.1
MxLVDT4_Vrms LVDT4_Vrms at Max End Stop (Normally set by 0 to 7.1
LVDT_Margin Used in the calibration function to calculate the 0 to 7.1
internal variables, Reg_Sensor_Hdwr_Lo and
Reg_Sensor_Hdwr_Hi for LVDT sensor check.
TMR_DiffLimt Difference limit off voted pulse inputs (EU) 0 to 12000
Monitor 1
Monitor type Monitor algorithm Unused 1_LVposition
2_LVposMIN 2_LVposMAX
3_LVposMID
MinPOSvalue Position at Min End Stop in engineering units. -15 to 150
MaxPOSvalue Position at Max End Stop in engineering units. -15 to 150
MnLVDT1_Vrms LVDT1_Vrms at Min End Stop (not set by the 0 to 7.1
Calibration function)
MxLVDT1_Vrms LVDT1_Vrms at Max End Stop (not set by the 0 to 7.1
:
MnLVDT4_Vrms LVDT4_Vrms at Min End Stop (not set by the 0 to 7.1

MxLVDT4_Vrms LVDT4_Vrms at Max End Stop (not set by the 0 to 7.1
LVDT_Margin Used in the calibration function to calculate the 0 to 7.1
internal variables, Reg_Sensor_Hdwr_Lo and
Reg_Sensor_Hdwr_Hi for LVDT sensor check
done by the Monitor function.
TMR_DiffLimt Difference limit off voted pulse inputs (EU) 0 to 12000
J3:IS200TSVOH1A Terminal board 1 connected to VSVO through J3 Connected, not connected
Servo Output1 Measured output current in percent Board point Point edit (input FLOAT)
Reg Number Identify regulator number Unused, Reg1, Reg2, Reg3, Reg4
Servo_MA_Out Select current output for coil windings 10, 20, 40, 80, 120 mA
EnableCurSuic Select Suicide function based on current Enable, disable
Curr_Suicide Percent current error to initiate suicide 0 to 100% (output current error)
EnablFbkSuic Select Suicide function based on position feedback Enable, disable
Fdbk_Suicide Percent position error to initiate suicide 0 to 100% (actuator position error)
Servo Output2 Measured output current in percent - Board point Point edit (input FLOAT)
J4:IS200TSVOH1A Terminal Board 2 connected to VSVO via J4 Connected, not connected
Servo Output3 Servo current output wired to valve - Board point Point edit (input FLOAT)
Servo Output4 Servo current output wired to valve - Board point Point edit (input FLOAT)
J5:IS00TSVOH1A Pulse Rate inputs cabled to J5 connector Connected, not connected
FlowRate1 Pulse rate input selected - Board point Point edit (input FLOAT)
PRType Select speed or flow type signal Unused, Speed, Flow, Speed_High, Speed_LM
PRScale Convert Hz to engineering units 0 to 1,000
SysLim1Enabl Select system limit Enable, disable
SysLim1Type Select type of alarm initiation >= or <=
SysLimit Select alarm level in GPM or RPM 0 to 12,000
SystemLim2 Same as above Same as above
TMR_DiffLimt Difference limit off voted pulse inputs (EU) 0 to 12,000
FlowRate2 Pulse rate input selected - Board point (as above) Point edit (input FLOAT)
L3DIAG_VSVOR Board diagnostic Input BIT
L3DIAG_VSVOS Board diagnostic Input BIT
L3DIAG_VSVOT Board diagnostic Input BIT
R1_SuicideNVR Regulator 1 Suicide relay status, non-voted for VSVO-R Input BIT
R1_SuicideNVS Regulator 1 Suicide relay status, non-voted for VSVO-S Input BIT
R1_SuicideNVT Regulator 1 Suicide relay status, non-voted for VSVO-T Input BIT

SysLim1PR1 System Limit 1 indication for Pulse Rate 1 Input BIT
: : Input BIT
Reg1_PosAFlt Reg1, LM machine only, position A failure Input BIT
: : Input BIT
Reg4_PosAFlt Reg4, LM machine only, position A failure Input BIT
Reg1_PosBFlt Reg1, LM machine only, position B failure Input BIT
: : Input BIT
Reg4_PosBFlt Reg4, LM machine only, position B failure Input BIT
Reg1_PosDif1 Reg1, LM machine only, position difference failure Input BIT
: : Input BIT
: : Input BIT
RegCalMode Regulator under calibration Input BIT
Reg1_Fdbk Regulator 1 feedback Input FLOAT
: : Input FLOAT
Reg4_Fdbk Regulator 4 feedback Input FLOAT
MiscFdbk1a Reg1, PosA when 4_LV_LM or Pilot when 2_LvpilotCy or Input FLOAT
4_LVp/cylMax
MiscFdbk1b Reg1, PosB when 4_LV_LM or otherwise not used. Input FLOAT
4_LVp/cylMax
4_LVp/cylMax

4_LVp/cylMax
Reg1_Error Regulator 1 position or flow rate error Input FLOAT
: : Input FLOAT
Reg4_Error Regulator 4 position or flow rate error Input FLOAT
Accel1 GPM/sec based on Pulse Rate 1 Input FLOAT
Accel2 GPM/sec based on Pulse Rate 2 Input FLOAT
Mon1 Position feedback based on Monitor 1 Input FLOAT
: : Input FLOAT
Mon12 Position feedback based on Monitor 12 Input FLOAT
ServoOut1NVR Servo Current Output 1, non-voted for VSVO-R Input FLOAT
ServoOut1NVS Servo Current Output 1, non-voted for VSVO-S Input FLOAT
ServoOut1NVT Servo Current Output 1, non-voted for VSVO-T Input FLOAT
CalibEnab1 Enable calibration Reg 1 Output BIT
: : Output BIT
CalibEnab4 Enable calibration Reg 4 Output BIT
SuicideForce1 Force suicide on Reg 1 Output BIT
: : Output BIT
SuicideForce4 Force suicide on Reg 4 Output BIT
PossDiffEnab1 Position difference enable reg 1, LM only Output BIT
: : Output BIT
PossDiffEnab4 Position difference enable reg 4, LM only Output BIT
Reg1_Ref Reg 1 position reference Output FLOAT
: : Output FLOAT
Reg4_Ref Reg 4 position reference Output FLOAT
Reg1-GainMod Reg 1 gain modifier (dont use) Output FLOAT
: : Output FLOAT

Reg4-GainMod Reg 4 gain modifier (dont use) Output FLOAT
Reg1_NullCor Reg 1 null bias correction Output FLOAT
: : Output FLOAT
Reg4_NullCor Reg 4 null bias correction Output FLOAT
Internal Variables Internal variables to service the auto-calibration display, not configurable

Alarms
go online)
to go online)
33-44 LVDT # RMS Voltage Out of Limits. Minimum and The LVDT may need recalibration.
maximum LVDT limits are configured
45 Calibration Mode Enabled The VSVO was put into calibration mode.
46 VSVO Board Not Online, Servos Suicided. The The controller (R, S, T) or IONet is down, or there is
servo is suicided because the VSVO is not on-line a configuration problem with the system preventing
the VCMI from bringing the board on line.
47-51 Servo Current # Disagrees with Reference, Suicided. A cable/wiring open circuit, or board problem.
The servo current error (reference - feedback) is
greater than the configured current suicide margin
52-56 Servo Current # Short Circuit. This is not currently NA
used
57-61 Servo Current # Open Circuit. The servo voltage is A cable/wiring open circuit, or board problem.
greater than 5V and the measured current is less
than 10%
62-66 Servo Position # Feedback Out of Range, Suicided. LVDT or board problem
Regulator number # position feedback is out of
range, causing the servo to suicide
67-71 Configuration Message Error for Regulator Number The LVDT minimum and maximum voltages are
#. There is a problem with the VSVO configuration equal or reversed, or an invalid LVDT, regulator, or
and the servo will not operate properly servo number is specified.

72 Onboard Calibration Voltage Range Fault. The A/D A problem with the Field Programmable Gate Array
calibration voltages read from the FPGA are out of (FPGA) on the board
limits, and the VSVO will use default values instead
73-76 LVDT Excitation # Voltage out of range There is a problem with the LVDT excitation source
on the VSVO board.
77 Servo output assignment mismatch. Regulator types Fix the regulator configurations.
8 & 9 use two servo outputs each. They have to be
consecutive pairs, and they have to be configured
as the same range
or the cable.

TSVO Servo Input/Output
The Servo Input/Output (TSVO) terminal board interfaces with two electro-hydraulic
servo valves that actuate the steam/fuel valves. Valve position is measured with LVDTs.
Two cables connect to VSVO using the J5 plug on the front of VSVO and the J3 or J4
connector on the VME rack. TSVO provides simplex signals through the JR1 connector,
and fans out TMR signals to the JR1, JS1, and JT1 connectors. Plugs JD1 or JD2 are for
an external trip from the protection module.
TSVO Terminal Board External VSVO Processor Board

trip
x
x x
x 1 JT1
x 2 37-pin "D" shell RUN
x 4 x 3 FAIL
x 5 JD1 type connectors STAT
x 6
x 8 x 7 with latching
x 10 x 9 JD2 fasteners
x 12 x 11
LVDT inputs x 13
Pulse rate inputs x 16 x 15
x 18 x 17
LVDT excitation x 19 Cables to VME
x 20 JT5 JS1
Servo coil outputs x 22 x 21 rack T
x 24 x 23
x
x
x 26 x 25 JS5
x 28 x 27 Cables to VME
x 30 x 29 rack S
x 32 x 31 J5
x 34 x 33 JR1
x 36 x 35
x 38 x 37 JR5
x 40 x 39 VSVO
x 42 x 41 x
x 44 x 43
x 46 x 45
x 47 J3
x 48
x
x
Shield Connectors on
bar VME rack R J4
Barrier type terminal Cables to VME

blocks can be unplugged rack R
From second TSVO
TSVO Servo Terminal Board and VSVO Processor Board

Installation
Connect the wires for the sensors and servo valves directly to two I/O terminal blocks on
the terminal board, as displayed in the figure Servo Terminal Board Wiring. Each block is
held down with two screws and has 24 terminals accepting up to #12 AWG wiring. A
shield termination strip attached to chassis ground is located immediately to the left of
each terminal block. Connect the wires for the external trip into JD1 or JD2. Cable the
J5 connectors to the front of VSVO boards in racks <R>, <S>, and <T>. Cable the J1
connectors to the VME rack below VSVO in <R>, <S>, and <T>.
Each servo output can have three coils in TMR configuration. Each coil current is jumper
selected using JP1-6.
Servo/LVDT Terminal Board TSVOH1B

1 External Trip from 
2 GND
x
x 1 LVDT 01 (H)
LVDT 01 (L) x 2 JD1 1 External Trip
x 3 LVDT 02 (H)
LVDT 02 (L) x 4
x 5 LVDT 03 (H) 2 GND
LVDT 03 (L) x 6
LVDT 04 (L) x 8
x 7 LVDT 04 (H)
x 9 LVDT 05 (H) JD2
LVDT 05 (L) x 10
LVDT 06 (L) x 12
x 11 LVDT 06 (H)
x 13
x 14
x 15
x 16 To connectors
x 18 JR5, JS5, JT5,
Exc R2 (L)
x 19 Exc R2 (H)
x 20 JR1, JS1, JT1
Exc S (L) x 21 Exc S (H)
x 22
Exc T (L) x 24
x 23 Exc T (H)
x JP1 Servo 01 R
JP2 Servo 01 S
x
Servo 01 R (L) x 25 Servo 01 R (H) JP3 Servo 01 T

x 26
Servo 01 S (L)
x 27 Servo 01 S (H)
x 28
Servo 01 T(L) x 30
x 29 Servo 01 T (H)
x 31 Servo 01 SMX (H) JP4 Servo 02 R
Servo 02SMX(H) x 32
Servo 02 R (L) x 34
x 33 Servo 02 R (H)
Servo 02 S (L) x 36
x 35 Servo 02 S (H) JP5 Servo 02 S
x 37 Servo 02 T (H)
Servo 02 T (L) x 38
Pulse 02 (TTL)
x 39 Pulse 01 (TTL)
x 40 JP6 Servo 02 T
Pulse 01 (24R) x 42
x 41 Pulse 01 (24V)
x 43 Pulse 01 (H) Jumper Choices:
Pulse 01 (L) x 44
x 45 Pulse 02 (24V) 120B +/-120 ma (75 ohm coil)
Pulse 02 (24R) x 46
x 47 Pulse 02 (H) 120A +/-120 ma (40 ohm coil)
Pulse 02 (L) x 48
80 +/- 80 ma
x
40 +/- 40 ma
20 +/- 20 ma
10 +/- 10 ma
point with 300 V insulation from terminal board for maintenance
Servo Terminal Board Wiring

Operation
VSVO provides four channels consisting of bi-directional servo current outputs, LVDT
position feedback, LVDT excitation, and pulse rate flows inputs. The TSVO provides
excitation for, and accepts inputs from, up to six LVDT valve position inputs. There is a
choice of one, two, three, or four LVDTs for each servo control loop. If three inputs are
used they are available for gas turbine flow measuring applications. These signals come
through TSVO and go directly to the VSVO board front at J5.
Each servo output is equipped with an individual suicide relay under firmware control
that shorts the VSVO output signal to signal common when de-energized, and recovers to
nominal limits after a manual reset command is issued. Diagnostics monitor the output
status of each servo voltage, current, and suicide relay.
Capacity <R> Control Module

6 LVDT/R inputs on each of 2
boards, and total of 2 active/passive
Termination Controller
magnetic pickups. Application Software
Termination
Board TSVOH1B
(Input portion) Servo Board
VSVO
JR1 J3
LVDT LVDT1H
1 Digital
3.2k Hz, SCOM A/D Regulator servo
7 V rms regulator
excitation P28VR
A/D converter
2
source LVDT1L D/A D/A converter
6 Ckts. P28V Servo driver P28V J3

Voltage
or LVDR Limit
Current
Suicide
P24V1 41 limit Relay
P24VR1 42 Configurable
Gain To Servo
Pulse rate P1TTL 39 Outputs
inputs 43( JR5 J5 3.2KHz
active probes PR P1H Pulse Excitation To TSVO
2 - 20 k Hz TTL P1L 44 Rate
To
Connector second
P24V2
on front of TSVO
on 1 of 2 TSVOs)
46 VSVO
P24VR2
Pulse rate 40 board
P2TTL
inputs, P2H 47(
magnetic PR
MPU P2L 48
pickups
2 - 20 k Hz Noise suppr.
LVDT and Pulse Rate Inputs, Simplex (Part 1 of 2)

Each servo output channel can drive one or two-coil servos in simplex applications, or
two or three-coil servos in TMR applications. The two-coil TMR applications are for
200# oil gear systems where each of two control modules drive one coil each, and the
third control module has no servo coil interface. Servo cable lengths up to 300 meters
(984 feet) are supported with a maximum two-way cable resistance of 15 . Because
there are many types of servo coils, a variety of bi-directional current sources are
selectable by configuring jumpers.

Another trip override relay K1 is provided on each terminal board and is driven from
the Protection Module. If an emergency overspeed condition is detected in the
Protection Module, the K1 relay energizes and disconnects the VSVO servo output from
the terminal block and applies a bias to drive the control valve closed. This is only
used on simplex applications to protect against the servo amplifier failing high, and is
functional only with respect to the servo coils driven from <R>.
<R>
Controller Terminal Board

TSVOH1B (continued)
Servo Board
Coil current range
VSVO
10,20,40,80,120 ma
A/D converter
Digital
P28VR JD1
A/D Regulator servo 1 Trip input from
K1 module (J1)
regulator 2
From
LVDT D/A D/A converter P28VR JD2
JP1 1
TSVO 120B
120 2
Servo coil from<R>
Voltage 40 25 SR1H
Limit 20
10 31
SRS1H
N
Suicide 1k 22 ohms
S
P28V Relay 2 Ckts. ohm 89 ohms
26 1k ohm
Configurable SR1L
Gain SCOM
17 ER1H
J5 3.2KHz,
3.2KHz
Pulse N 7V rms
Excitation
S 18 ER1L excitation
Rate
2 Ckts. SCOM source
Connector on Noise for LVDTs
front of VSVO To suppr-
second ession
TSVO
Servo Coil and LVDT Outputs, Simplex (Part 2 of 2)

In TMR applications, the LVDT signals on TSVO fan out to three racks through JR1,
JS1, and JT1. Three connectors also bring power into TSVO where the three voltages are
diode high-selected and current limited to supply 24 V dc to the pulse rate active probes.
<R>
<S>
<T>
Controller
Terminal
Board TSVOH1B Servo Board
(Input Portion) VSVO
LVDT JR1 J3 A/D converter Digital

LVDT1H 1
3.2k Hz, A/D Regulator servo
7 V rms regulator
P28VR
excitation
2
JS1 J3
source LVDT1L P28V D/A D/A converter
SCOM Same for <S>
6 Ckts. P28VS
Servo driver To servo
Voltage
JT1 J3 Limit outputs
on TSVO
Same for <T>
P28VT
Diode Voltage
Select
P24V1 41 CL P28V Connector on Configurable
front of VSVO Gain
P24VR1 42 card in <R>
JR5 J5 To TSVO
Pulse rate 39 3.2KHz
P1TTL Pulse
inputs excitation
active probes
43( Rate
P1H
2 - 20 kHz PR
P1L 44 JS5 J5 in <S>
TTL

P24V2
on 1 of 2 TSVOs) 46 JT5 J5 in <T>
P24VR2
P2TTL
40
Pulse rate
P2H 47 (
inputs, PR
magnetic MPU P2L 48
pickups
Noise
2 - 20 kHz
suppression
LVDT and Pulse Rate Inputs, TMR (Part 1 of 2)

For TMR systems, each servo channel has connections to three output coils with a range
of current ratings up to 120 mA, selected by jumper.
<R>
<S>
<T>
Controller
Terminal Board
TSVOH1B (continued)
Servo Board
VSVO Servo current range
Digital 10,20,40,80,120 ma
A/D converter servo
JD1 Trip input from
regulator
A/D Regulator P28VR 1
2
 not used for
From Suicide TMR
TSVO P28VR JD2
D/A relay JP1
LVDT 120B
1
120 2
Servo coil from <R>
25 S1RH
Voltage 40
Limit 20
10 31
N
22 ohms
2 Ckts. S
89 ohms
26 S1RL 1k ohm
Configurable
Gain
17 ER1H 3.2KHz,
J5 3.2KHz 7V rms
Pulse excitation
N
2 Ckts S 18 excitation
Rate ER1L
source
Connector on J3 JS1 JP2 For LVDTs
front of VSVO 120B
120 Servo coil from <S>
card 80 27 S1SH
40
20
10 N
S
2 Ckts. 28 S1SL
21 ESH 3.2KHz,
1 Ckt. N 7V rms
S 22 ESL excitation
J3 JT1 source
JP3
120B
120
80
Servo coil from <T>
29 S1TH
40
20
10
N
S
2 Ckts. 30 S1TL
23 ETH 3.2KHz,
N 7V rms
1 Ckt. S 24 ETL excitation
source
Noise suppression
For LVDTs
Servo Coil Outputs and LVDT Excitation, TMR System (Part 2 of 2)

The following table defines the standard servo coil resistance and their associated internal
resistance, selectable with the terminal board jumpers shown in the figure above. In
addition to these standard servo coils, it is possible to drive non-standard coils by using
a non-standard jumper setting. For example, an 80 mA, 125 coil could be driven by
using a jumper setting 120B.
Servo Coil Ratings
Jumper Label Nominal Current Coil Resistance Internal Resistance Application

(Ohms) (Ohms)
10 10 mA 1,000 180 Simplex and TMR
20 20 mA 125 442 Simplex
40 40 mA 62 195 Simplex
40 40 mA 89 195 TMR
80 80 mA 22 115 TMR
120A 120 mA (A) 40 46 Simplex
120B 120 mA (B) 75 10 TMR
The excitation source is isolated The control valve position is sensed with either a four-wire LVDT or a three-wire LVDR.
from signal common (floating) Redundancy implementations for the feedback devices are determined by the application
and is capable of operation at software to allow the maximum flexibility. LVDT/Rs can be mounted up to 300 meters
common mode voltages up to (984 feet) from the turbine control with a maximum two-way cable resistance of 15 .
35 V dc, or 35 V rms, 50/60 Hz.
Each terminal board has two LVDT/R excitation sources for simplex applications and
four for TMR applications. Excitation voltage is 7 V rms and the frequency is 3.2 kHz
with a total harmonic distortion of less than 1% when loaded.
The maximum short circuit A typical LVDT/R has an output of 0.7 V rms at the zero stroke position of the valve
current is approximately 100 stem, and an output of 3.5 V rms at the designed maximum stoke position (these are
mA with a maximum power reversed in some applications). The LVDT/R input is converted to dc and conditioned
output of 1 W. with a low pass filter. Diagnostics perform a high/low (hardware) limit check on the
input signal and a high/low system (software) limit check.
Two pulse rate inputs connect to a single J5 connector on the front of VSVO. This
dedicated connection minimizes noise sensitivity on the pulse rate inputs.
Both passive magnetic pickups and active pulse rate transducers (TTL type) are
supported by the inputs and are interchangeable without configuration. Pulse rate inputs
can be located up to 300 meters (984) from the turbine control cabinet; this assumes
shielded-pair cable is used with typically 70 nF single ended or 35 nF differential
capacitance and 15 ohms resistance.
10 or 20 ms. Magnetic pickups typically have an output resistance of 200 and an
inductance of 85 mH excluding cable characteristics. The transducer is a high impedance
source, generating energy levels insufficient to cause a spark.

Specifications
Item Specification
Number of inputs 6 LVDT windings
2 pulse rate signals (total of 2 per VSVO)
Number of outputs 2 servo valves (total of 4 per VSVO board)
Power supply voltage Nominal 24 V dc
Pulse rate input Minimum signal for proper measurement at 2 Hz is 33 mVpk, and at 12 kHz is
827 mVpk.
Magnetic PR pickup signal Generates 150 V p-p into 60 k
Active PR Pickup Signal Generates 5 to 27 V p-p into 60 k
Fault detection Servo current out of limits or not responding
Failed ID chip
Size 17.8 cm high x 33.02 cm wide (7 in. x 13 in.)
Diagnostics
VSVO performs diagnostic checks on the terminal board, including the following:
If the output servo current is out of limits or not responding, a fault is created.
If the regulator feedback (LVDT) signal is out of limits, a fault is created and if the
L#DIAG_VSVO occurs. Details of the individual diagnostics are available from
board serial number, board type, revision number, and the J connector location.
When this chip is read by the I/O processor and a mismatch is encountered, a
Configuration
For a simplex system, jumper JP1 configures the coil current of Servo 1, and jumper
JP4 configures the coil current of Servo 2. Refer to the table Servo Coil Ratings for
more information.
In a TMR system, each servo output can have three coils.Jumpers JP 1 3 configure the
coil currentfor Servo 1, and Jumpers JP 4 6 configure the coil current for Servo 2. All
other configuration is done from the toolbox.

DSVO Simplex Servo Input/Output
The Simplex Servo Input/Output (DSVO) terminal board is a compact terminal board
designed for DIN-rail mounting. This board has two servo outputs, I/O for six LVDT
position sensors, and two active pulse rate inputs for flow measurement. Servo coil
currents ranging from 10 to 120 mA can be selected using jumpers. DSVO connects to
the VSVO processor board with a 37-pin cable, which is identical to those used on the
larger TSVO board. The terminal boards can be stacked vertically on the DIN-rail to
conserve cabinet space. Two DSVO boards can be connected to the VSVO, if required.
Only a simplex version of this board is available.
The on-board functions and high frequency decoupling to ground are the same as those
on the TSVO. High density Euro-Block type terminal blocks are permanently mounted
to the board with six screws for the ground connection (SCOM). Connectors JR1 and
J5 connect to signals from on-board ID chips that identify the board to the VSVO for
system diagnostic purposes.
Two versions of the DSVO, H1B and H2B, are available. The H1B is a direct
replacement for the previous H1A design. The H2B is certified by UL for Class 1
Division 2 applications.
DSVOH1B vs. DSVOH2B
Function H1B H2B

Class 1, Div. 2 certification No Yes
Servo valves accommodated 75, 40, 22, 62, 89, 125, 1 k 1 k (10 mA)
LVDT excitation outputs 2 at 120 mA each 4 at 60 mA each
Excitation for pulse rate probes 2 at 24 V dc, 100 mA each No
Additional pulse rate inputs for TTL signals No 2
Installation
Mount the plastic holder on the DIN-rail and slide the DSVO board into place. Connect
the wires for the servo I/O directly to the terminal block. The Euro-Block type
terminal block has 36 terminals (DSVOH1A) or 42 terminals (DSVOH1B,H2B) and is
permanently mounted on the terminal board. Typically #18 AWG shielded twisted pair
wiring is used. Six screws, 31 36, are provided for SCOM (ground) connection, which
should be as short as distance as possible.
Note There is no shield termination strip with this design.

DSVOH1A Servo Terminal Board
LVDT1 (Low) 2 1 LVDT 1 (High)

37-pin "D" shell 3 LVDT 2 (High)
LVDT2 (Low) 4
connector with 5 LVDT 3 (High)
Coil LVDT3 (Low) 6
latching fasteners 7 LVDT 4 (High)
Current LVDT4 (Low) 8
9 LVDT 5 (High)
Jumpers LVDT5 (Low) 10
11 LVDT 6 (High)
LVDT6 (Low) 12
JP1 13 Excitation 1 (High)
Excitat1(Low) 14
15 Excitation 2 (High)
Excitat2(Low) 16
17 ServoR1 (High)
10 2040 80 120B ServoR1(Low) 18
19 ServoR2 (High)
120A ServoR2(Low) 20
JP2 21 ServoS1 (High)
ServoS2(High) 22
23 Pulse 1 (24V)
Pulse 1(24R) 24
25 Pulse 1 (High)
Pulse1 (Low) 26
10 2040 80 120B 27 Pulse 2 (24V)
120A Pulse 2(24R) 28
29 Pulse 2 (High)
Pulse2 (Low) 30
31 Chassis Ground
Chassis Ground 32
JR1 33 Chassis Ground
Cable to J3 Chassis Ground 34
35 Chassis Ground
connector in I/O Chassis Ground 36
rack for VSVO
board Euro-Block type
JR5 terminal block
SCOM
JD2 JD1
External trip
circuits
Cable to J5 on
front of VSVO
board
Plastic mounting
holder
DIN-rail mounting
DSVOH1A Wiring and Cabling

H1B and H2B Connection Differences
Screw # H1B H2B
23, 24 N/C
DSVOH1B, H2B 27, 28 N/C
JP1 JP2 37, 38 N/C
Coil 39, 40 N/C
Current 120B 120B
120A 120A 41, 42 N/C
Jumpers 80 80
40 40 N/C = Not Connected
20 20
10 10 Screw Connections
Screw Connections
LVDT1 (Low) 2 1 LVDT 1 (High)
37-pin "D" shell 3 LVDT 2 (High)
connector with LVDT2 (Low) 4
5 LVDT 3 (High)
latching fasteners LVDT3 (Low) 6
7 LVDT 4 (High)
LVDT4 (Low) 8
9 LVDT 5 (High)
LVDT5 (Low) 10
11 LVDT 6 (High)
LVDT6 (Low) 12
Excitat1(Low) 14
Excitat2(Low) 16
17 ServoR1 (High)
ServoR1(Low) 18
19 ServoR2 (High)
ServoR2(Low) 20
21 ServoS1 (High)
ServoS2(High) 22
23 Pulse 1 (24V)
Pulse 1(24R) 24
25 Pulse 1 (High)
Pulse1 (Low) 26
27 Pulse 2 (24V)
Pulse 2(24R) 28
29 Pulse 2 (High)
Pulse2 (Low) 30
31 Chassis Ground
Chassis Ground 32 Chassis Ground
JR1 33
Chassis Ground 34 Chassis Ground
35
Chassis Ground 36
37 Pulse1TTL (High)
Pulse2TTL (High) 38 39 Excitation3 (High)
Cable to J3 Excitation3 (Low) 40 Excitation4 (High)
41
JR5 Excitation4 (Low) 42
connector in I/O
rack for VSVO Euro-Block type
board External trip
terminal block
circuits
JD2 JD1
Cable to J5 on
front of VSVO Plastic mounting
board
holder
DIN-rail mounting
DSVOH1B, H2B Wiring and Cabling

Operation
DSVO Version H1A
The following figures show operation of two versions of the DSVO board.
ID DSVOH1A
JR1
Cable to J3 connector Jumper position: JD1
1
in I/O rack for VSVO board P28V 120B is 75 ohm coil 2
120A is 40 ohm coil
K1 JD2 External trip
P28VT 1
Noise
2
LVDT Suppression
LVDT1H P28VR Noise
JP1
1 120B suppression
3.2k Hz, 7 V rms 120A
SCOM 80
excitation source 40 17 SR1H
LVDT1L 2 20
10 21 SS1H
3 N Servo valve
Total of six S coil
LVDT input 18 SR1L
circuits 4
K1
Current SCOM
23 Limit P28VR JP2
P1 24V P28V 120B
120A
P1 24R 24 80
40
19 SR2H
Pulse rate 20
P1 H 25
inputs - 10 22 SS2H
active probes N
P1 L 26 Servo valve
2 - 20 kHz S coil
P2 24V 27 P28V 20 SR2L
CL
P2 24R 28
SCOM 13 E1H
Pulse rate P2 H 29 3.2 kHz excitation
14 E1L
inputs - LVDT
active probes P2 L 30 15 E2H
excitation
2 - 20 kHz 16 E2L
SCOM JR5 SCOM
Cable to front of VSVO board
DSVOH1A Terminal Board

DSVO Versions H1B, H2B
(IS200DSVOH1B Replaces IS200DSVOH1A)

External
Trip
From PCOM
H2B is certified to UL-1604 Class 1 Div 2 JD1
control rack {
P28VR
P28 1
2
CONN SHLD
JR1 K1
P28VR RP28V JD2
1
2
PCOM
12 ID
Exc 1 LV1H
P28VR 332
S 4 H1B ONLY
PCOM
K1 0 120B Servo
2 LV1L
S
36 120A JP1 valve
105 80
10 IN VSVO 185
LVDT 40 SR1H 17 coils
3 LV2H 432 20 S
S 170
10
SS1H 21
4 LV2L 170 10mA, 1K Coil
S
S
H2B ONLY 10mA, 1K Coil
SR1L 18
S
Total of six LVDT JPx (mA) Coil Res.
input circuits LVDT Input TB Locations: 120 B 75 ohm
LVx H L. 120 A 40 ohm
Current limit 1 1 2 80 22 ohm
40 62 or 89 ohm
P24V1 P28VR 2 3 4 20 125 ohm
23
S CL 3 5 6 10 1000 ohm
P24R1
4 7 8
24 4 H1B ONLY
S 5 9 10 0
PCOM 120B Servo
6 11 12 36 120A JP2
105 80 valve
185 40 19 coils
37 TTL1 432 SR2H
170
20 S
10 IN VSVO K1 10
PR1H SS2H 22
25 P28VR 332 170 10mA, 1K Coil
S S
PR H2B ONLY 10mA, 1K Coil
SR2L 20
26 PR1L
S S
10 IN VSVO
(SCREWS 37 & 38 ARE NC IN H1B)

(SCREWS 23, 24,27,28 ARE NC IN H2B)
27 P24V2 P28VR ERH1 13

S CL S
28 P24R2 ERL1 14
S
PCOM
ERH3 39
38 TTL2
ERL3 40
LVDT Excitation
29 PR2H
S
PR (SCREWS 39-42 ARE NC IN H1B)
30 PR2L
S 15
ID S
ERH2
4
ERL2 16
CONN SHLD
JR5
From
control rack {
ERH4 41
ERL4 42
31 32 33 34 35 36 SCOM
CHASSIS
DSVOH1B, H2B Board (Part 1 of 2)

Servo Driver Circuit: JD1
TSVO Ext Trip
Ckt
VSVO JD2
P28VR JP1
P28V 120B (75 ohm coil)
Voltage
36 120A (40) flow of current to
Limiter
11 vlt 105 shutdown actuated
80 device
Current Ref 185
10 ohm 40
432 20
170
Suicide 10
Relay 170
Servo
Coils
Configurable
Gain
DSVOH1B, H2B board (Part 2 of 2)

Specifications
Item Specification
Number of inputs 6 LVDT windings
2 pulse rate signals
Number of outputs 2 servo valves
LVDT excitation output 2 Outputs: Frequency of 3.2 0.2 kHz
Pulse rate input Minimum signal for proper measurement at 2 Hz is 33 mVpk, and at 12 kHz is 827 mVpk.
Magnetic PR pickup signal Generates 150 V p-p into 60 , used on DSVOH2B.
Active PR Pickup Signal Generates 5 to 27 V p-p into 60 , used on DSVOH1B.
Fault detection Servo current out of limits or not responding.
The LVDT excitation is out of range.
The LVDT feedback is out of limits.
Failed ID chip.
Size 23.8 cm high x 8.6 cm wide (9.37 in. x 3.4 in.) complete with support plate

Diagnostics
VSVO performs diagnostic checks on DSVO including the following:
If the output servo current is out of limits or not responding, a fault is created.
If the regulator feedback (LVDT) signal is out of limits, a fault is created and if the
L#DIAG_VSVO, occurs. Details of the individual diagnostics are available from
Connector JR1 on the terminal board has its own ID device that is interrogated by
the I/O board. The ID device is a read-only chip coded with the terminal board
serial number, board type, revision number, and the connector location. When the
chip is read by VSVO and a mismatch is encountered, a hardware incompatibility
fault is created.
Configuration
On DSVOH1B, jumpers JP1 and JP2 select the desired coil current and servo valve coil
resistance, which varies from 22 W to 1,000 W. The following table shows the coil
currents and resistances (for example, jumper 120B provides a 120 mA coil current).
Jumper J1/2 Label (mA) Coil Resistance

120B 75
120A 40
80 22
40 62 or 89
20 125
10 1,000
With DSVOH2B, only a 1,000 , 10 mA coil can be driven, so there are no jumper
settings.

Thermocouple Input (VTCC)
VTCC Thermocouple Input
The Thermocouple Input (VTCC) board accepts 24 thermocouple inputs. These inputs
are wired to the TBTC or DTTC terminal boards. Cables with molded plugs connect
the terminal board to the VME rack where the VTCC thermocouple processor board is
located. The TBTC can provide both simplex (TBTCH1C) or triple module redundant
(TMR) control (TBTCHIB). Two groups of the VTCC provide different temperature
ranges optimized for gas turbine control applications (VTCCH1) and general-purpose
applications (VTCCH2). The same terminal boards are used with both groups of the
VTCC card.
VTCCH1 supports E, J, K, S, and T types of thermocouples and mV inputs. The mV
span is -8mV to +45mV.
VTCCH2 supports E, J, K, S, T as well as B, N, and R types of standard thermocouples
and mV inputs. The mV span for VTCCH2 is -20mV to +95mV.
Note Input data is transferred over the VME backplane from VTCC to the VCMI
and then to the controller.
16-1 Thermocouple Input (VTCC) GEH-6421Q Mark* VI Control

TBTC Terminal Board VTCC VME Board
x
x
x 2
x 1 TBTC, capacity for RUN
x 3 FAIL
x 4 24 thermocouple inputs STAT
TC x 6
x 5
inputs x 8
x 7
x 10
x 9
x 11 VME Bus to VCMI
x 12
x 14
x 13 communication board
x 16
x 15
x 18
x 17
x 19 37-pin "D" shell
x 20 JA1
x 21 type connectors
x 22
x 23 with latching
x 24
x
fasteners
x
x 26
x 25
x 28
x 27
TC x 30
x 29
32
x 31
inputs x
x 33 JB1
x 34
x 36
x 35
x 38
x 37 Cables to VME
x 39 VTCC
x 40 rack
x 42
x 41 x
x 44
x 43
x 46
x 45 Connectors on J3
x 48
x 47 VME rack
x
x
Shield bar
ground
J4

from board for
maintenance
Thermocouple Input Terminal Board, I/O Board, and Cabling

Installation
its edge connectors
GEH-6421Q System Guide, Volume II Thermocouple Input (VTCC) 16-2

Operation
Type E, J, K, S, and T thermocouples can be used with VTCCH1, and they can be
grounded or ungrounded. Type E, J, K, S, T, B, N and R thermocouples can be used with
VTCCH2, and they can be grounded or ungrounded. They can be located up to 300 m
(984 ft) from the turbine control cabinet with a maximum two-way cable resistance of
450 . High frequency noise suppression and two cold junction (CJ) reference devices
are mounted on the terminal board.
Linearization for individual thermocouple types is performed in software by VTCC. A
thermocouple that is determined to be out of the hardware limits is removed from the
scanned inputs to prevent adverse affects on other input channels.
Cold Junctions
If both CJ devices are within the configurable limits, then the average of the two is used
for CJ compensation. If only one CJ device is within the configurable limits, then that CJ
is used for compensation. If neither CJ device is within the configurable limits, then a
default value is used. The thermocouple inputs and cold junction inputs are automatically
calibrated using the filtered calibration reference and zero voltages.
Note VTCC boards manufactured after software version VTCC-100100C and higher
have additional thermocouple and cold junction features. The newly designed boards
permit the use of S-type thermocouples, in addition to all previous types. They also
provide for a remote CJ compensation feature for thermocouple inputs. This allows the
user to select whether CJ compensation is done based on a temperature reading at a
remote location or at the terminal board as explained above. The calculations are the
same as previous VTCC boards, only the source of the CJ reading changes.
Two CJ references are used per VTCC, one each for connectors J3 and J4. Each reference
can be selected as either remote (from VME bus) or local (from associated terminal
board, T-type or D-type). All references are then treated as sensor inputs (for example,
averaged, limits configured). The two references can be mixed, one local and one
remote. CJ signals go into signal space and are available for monitoring. Normally the
average of the two is used. Acceptable limits are configured, and if a CJ goes outside the
limit, a logic signal is set. A 1 F error in the CJ compensation causes a 1 F error in
the thermocouple reading.
Hard coded limits are set at 32 to 158 F, and if a CJ goes outside this range, it is regarded
as bad. Most CJ failures are open or short circuit. If one CJ fails, the good one is used.
If both CJs fail, the backup value is used. This backup value can be derived from CJ
readings on other terminal boards, or can be the configured default value.

<R> or <S> or <T> Rack
Terminal Board TBTC
Thermocouple Input Board VTCC
Local
cold junction Excitation
JA1 J3
reference
Remote cold
junction
Thermocouple references
High
Noise
Low Suppression
Grounded or (12) thermocouples Connectors at

ungrounded ID I/O Core
bottom of
VME rack A/D Processor
Local
TMS320C32
cold junction Excit. VMEbus
JB1 J4
reference
Thermocouple
High
Noise
Low Suppression
(12) thermocouples
ID
Simplex Thermocouple Inputs to VTCC Processor Board

Terminal Board TBTCH1B <R> Rack

JRA J3
Local ID Excitation.
CJ reference
Thermocouple High
Low NS
Remote CJ
Grounded or JSA references
Noise
ungrounded suppression ID
To
<S>
(12) thermocouples Rack
JTA A/D Processor

ID
To VMEbus
<T>
Rack
I/O Core
Processor
TMS320C32
JRB J4 Excit.
Local ID
Cold Junction
Reference
Thermocouple High
Low NS
Grounded or JSB
ungrounded ID
(12) thermocouples Analog-Digital
To Converter
<S>
Rack
JTB
ID
To
<T>
Rack
TMR Thermocouple Inputs to VTCC Processor Boards

Thermocouple inputs are supported over a full-scale input range of -8.0 mV to +45.0
mV. The following table shows typical input voltages for different thermocouple types
versus the minimum and maximum temperature range. The CJ temperature is assumed
to range from +32 to +158 F.
Thermocouple E J K S T
Low range, F / C -60 /-51 -60 /-51 -60 /-51 0 / -17.78 -60 / -51
mV at low range with reference at 158 F (70C) -7.174 -6.132 -4.779 -0.524 -4.764
High range, F / C 1100 / 593 1400 / 798 2000 / 1093 3200 / 1760 750 / 399
mV at high range with reference at 32 F (0C) 44.547 42.922 44.856 18.612 20.801

VTCCH1 Thermocouple Range
Thermocouple inputs are supported over a full-scale input range of -8.0 mV to +45.0
mV. The following table shows typical input voltages for different thermocouple types
versus the minimum and maximum temperature range. The CJ temperature is assumed to
range from 0 to 70C (+32 to +158 F).
Thermocouple Type VTCCH1 E J K S T

Low range, F -60 -60 -60 0 -60
C -51 -51 -51 -17.78 -51
mV at low range with reference at 70C (158 F) -7.174 -6.132 -4.779 -0.524 -4.764
High range, F 1100 1400 2000 3200 750

C 593 760 1093 1760 399
mV at high range with reference at 0C (32 F) 44.547 42.922 44.856 18.612 20.801
VTCCH2 Thermocouple Rang

Thermocouple inputs support a full-scale input range of -20.0 mV to + 95.0 mV. The
following table shows typical input voltages for different thermocouple types versus the
minimum and maximum temperature range. The CJ temperature is assumed to range
from 0 to 70C (+32 to +158 F).
Thermocouple Type VTCCH2 E J K S T

Low range, F -60 -60 -60 0 -60
C -51 -51 -51 -17.78 -51
mV at low range with reference at 70C (158 F) -7.174 -6.132 -4.779 -0.524 -4.764
High range, F 1832 2192 2372 3200 752

C 1000 1200 1300 1760 400
mV at high range with reference at 0C (32 F) 76.373 69.553 52.41 18.612 20.869
Thermocouple Type VTCCH2 B N R

Low range, F 32 -60 0
C 0 -51 -17.78
mV at low range with reference at 70C (158 F) -0.0114 -3.195 -0.512
High range, F 3272 2282 3092

C 1800 1250 1700
mV at high range with reference at 0C (32 F) 13.593 45.694 20.220

Specifications
Item Specifications
Number of channels 24 channels per terminal board and I/O board
Thermocouple types E, J, K, S, T thermocouples, and mV inputs for VTCCH1
E, J, K, S, T, B, N, R thermocouples, and mV inputs for VTCCH2
Span -8 mV to +45 mV for VTCCH1
-20 mV to +95 mV for VTCCH2
A/D converter Sampling type 16-bit A/D converter with better than 14-bit resolution
CJ compensation Reference junction temperature measured at two locations on each terminal board
(option for remote CJs).
TMR board has six CJ references.
Cold junction temperature accuracy Cold junction accuracy 1.1C (2 F)
Conformity error Maximum software error 0.14C (0.25 F)
Measurement accuracy VTCCH1 = 53 V (excluding cold junction reading).
Example: For type K, at 1000 F, including cold junction contribution,
RSS error= 3 F
VTCCH1 = 115 V (excluding cold junction reading).
Example: For type K, at 1000 F, including cold junction contribution,
RSS error= 6 F
Common mode rejection Ac common mode rejection 110 dB @ 50/60 Hz, for balanced impedance input
Common mode voltage 5 V
Normal mode rejection Rejection of 250 mV rms is 80 dB @ 50/60 Hz
Scan time All inputs are sampled at 120 times per second for 60 Hz operation; for 50 Hz
operation it is 100 times per second
High/low system (software) limit check
Monitor readings from all TCs, CJs, calibration voltages, and calibration zero readings

Diagnostics
Three LEDs at the top of the front panel provide status information. The normal run
condition is a flashing green, and fail is a solid red. The third LED shows a steady
orange if a diagnostic alarm condition exists in the board. Diagnostic checks include
the following:
Each thermocouple type has hardware limit checking based on preset
(non-configurable) high and low levels set near the ends of the operating range. If
this limit is exceeded a logic signal is set and the input is no longer scanned. If
any one of the 24 inputs hardware limits is set it creates a composite diagnostic
alarm, L3DIAG_VTCC, referring to the entire board. The diagnostic signals can be
individually latched, and then reset with the RESET_DIA signal.
Each thermocouple input has system limit checking based on configurable high and
low levels. These limits can be used to generate alarms, and can be configured
for enable/disable, and as latching/non-latching. RESET_SYS resets the out of
limit signals.
In TMR systems, if one signal varies from the voted value (median value) by more
than a predetermined limit, that signal is identified and a fault is created. This can
provide early indication of a problem developing in one channel.
Each terminal board and I/O board has its own ID device, which is interrogated by
the I/O board. The board ID is coded into a read-only chip containing the terminal
board serial number, board type, revision number, and the JA1/JB1 connector
location. When the chip is read by the I/O processor and a mismatch is encountered,
a hardware incompatibility fault is created. Details of diagnostic faults are in the
Alarms section of this document.

Configuration

Configuration
SysFreq System frequency (used for noise rejection) 50 or 60 Hz
SystemLimits Enables or disables all system limit checking Enable, disable
Auto Reset Automatic Restoring of Thermocouples removed from Enable, disable
scan
J3J4:I200TBTCH1A Terminal board Connected, Not Connected
ThermCpl1 First of 24 thermocouples - board point signal Point edit (input FLOAT)
ThermoCpl Type Thermocouples supported by VTCC; unused inputs are Unused, mV, S, T, K, J, E
removed from scanning, mV inputs are primarily for
maintenance.
When configured for mV input, the signal span is 8 mV
to +45 mV. The input is not compensated for CJ and is a
straight reading of the terminal board mV input. In order
to detect open wires, each input is biased using plus and
minus 0.25 V through 10 resistors. This should be taken
into account if high impedance mV signals are to be read.
LowPassFiltr Enable 2 Hz low pass filter Enable, disable
SysLim1 Enabl Enables or disables a temperature limit which can be used Enable, disable
to create an alarm.
SysLim1 Latch Determines whether the limit condition will latch or unlatch; Latch, unlatch
reset used to unlatch.
SysLim1 Type Limit occurs when the temperature is greater than or equal Greater than or equal, less than
(>=), or less than or equal to (<=) a preset value. or equal
SysLimit 1 Enter the desired value. Engineering units
SysLim2 Enabled Enables or disables a temperature limit which can be used Enable, disable
to create an alarm.
SysLim2 Latch Determines whether the limit condition will latch or unlatch; Latch, unlatch
reset used to unlatch.
SysLim2 Type Limit occurs when the temperature is greater than or equal Greater than or equal, less than
(>=), or less than or equal to (<=) a preset value. or equal
SysLimit 2 Enter the desired value. Engineering units
TMR Diff Limt Limit condition occurs if 3 temperatures in R, S, T differ by -60 to 2,000
more than a preset value (deg F); this creates a voting
alarm condition.
ColdJunc1 First CJ reference - Board point signal (similar As above (input FLOAT)
configuration as for thermocouples but no low pass filter
or CJ type choices of local or remote).

ColdJunc2 Second CJ reference Board point signal (similar As above (input FLOAT)
configuration as for thermocouples but no low pass filter
or CJ type choices of local or remote).
Board Points (Signals) Description-Point Edit (Enter Signal Connection Name) Direction Type
L3DIAG_VTCC1 Board diagnostic Input BIT
SysLim1TC1 System limit 1 for thermocouple Input BIT
: : Input BIT
SysLim1CJ1 System limit 1 for CJ Input BIT
SysLim1JC2 System limit 1 for CJ Input BIT
: : Input BIT
CJ Backup CJ backup Output FLOAT
CJ Remote 1 CJ remote 1 Output FLOAT
CJ Remote 2 CJ remote 2 Output FLOAT
ThermCpl1 Thermocouple reading Input FLOAT
: : Input FLOAT
ThermCpl24 Thermocouple reading Input FLOAT
ColdJunc1 CJ for thermocouples (TC) 1-12 Input FLOAT
ColdJunc2 CJ for TCs 13-24 Input FLOAT

Alarms
go online)
to go online)
19 J4 ID Failure. Failed ID chip on connector J4, or cable problem
30 ConfigCompatCode mismatch; Firmware: [ ] ; Tre: A tre file has been installed that is incompatible with
31 IOCompatCode mismatch; Firmware: [ ]; Tre:[ ] The A tre file has been installed that is incompatible with
32-55 Thermocouple [ ] Raw Counts High. The [ A condition such as stray voltage or noise caused
] thermocouple input to the analog to digital the input to exceed +63 millivolts.
converter exceeded the converter limits and will be
removed from scan
56-79 Thermocouple [ ] Raw Counts Low. The [ The board has detected a thermocouple open and
] thermocouple input to the analog to digital has applied a bias to the circuit driving it to a large
converter exceeded the converter limits and will be negative number, or the TC is not connected, or a
removed from scan condition such as stray voltage or noise caused the
input to exceed -63 millivolts.
80,81 Cold Junction [ ] Raw Counts High. CJ device The CJ device on the terminal board has failed.
number [ ] input to the A/D converter has exceeded
the limits of the converter. Normally two CJ inputs are
averaged; if one is detected as bad then the other is
used. If both CJs fail, a predetermined value is used
82,83 Cold Junction [ ] Raw Counts Low. CJ device The CJ device on the terminal board has failed.
number [ ] input to the A/D converter has exceeded
the limits of the converter. Normally two CJ inputs are
averaged; if one is detected as bad then the other is
used. If both CJs fail, a predetermined value is used

84,85 Calibration Reference [ ] Raw Counts The precision reference voltage on the board has
High. Calibration Reference [ ] input to the A/D failed.
converter exceeded the converter limits. If Cal. Ref.
1, all even numbered TC inputs will be wrong; if Cal.
Ref. 2, all odd numbered TC inputs will be wrong
86,87 Calibration Reference [ ] Raw Counts The precision reference voltage on the board has
Low. Calibration Reference [ ] input to failed.
the A/D converter exceeded the converter limits. If
Cal. Ref. 1, all even numbered TC inputs will be
wrong; if Cal. Ref. 2, all odd numbered TC inputs
will be wrong
88,89 Null Reference [ ] Raw Counts High The null reference voltage signal on the board has
failed.
90,91 Null Reference [ ] Raw Counts Low. The null (zero) The null reference voltage signal on the board has
reference number [ ] input to the A/D converter has failed.
exceeded the converter limits. If null ref. 1, all even
numbered TC inputs will be wrong; if null ref. 2, all
odd numbered TC inputs will be wrong
92-115 Thermocouple [ ] Linearization Table High. The The thermocouple has been configured as the wrong
thermo-couple input has exceeded the range of type, or a stray voltage has biased the TC outside of
the linearization (lookup) table for this type. The its normal range, or the CJ compensation is wrong.
temperature will be set to the table's maximum value
116- 139 Thermocouple [ ] Linearization Table Low. The The thermocouple has been configured as the wrong
thermo -couple input has exceeded the range of type, or a stray voltage has biased the TC outside of
the linearization (lookup) table for this type. The its normal range, or the CJ compensation is wrong.
temperature will be set to the table's minimum value
160- 255 Logic Signal [ ] Voting mismatch A problem with the input. This could be the device,
the wire to the terminal board, the terminal board,
or the cable.
256- 281 Input Signal [ ] Voting mismatch, Local [ ], Voted [ A problem with the input. This could be the device,

TBTC Thermocouple Input
The Thermocouple Input (TBTC) terminal board accepts 24-type E, J, K, S, or T
thermocouple inputs. It accepts additional B, N and R types of thermocouple inputs only
when used with PTCCH2 in Mark VIe. These inputs are wired to two barrier-type blocks
on the terminal board. TBTC communicates with the I/O processor through DC-type
connectors. Two types of the TBTC are available, as follows:
TBTCH1C for simplex applications has two DC-type connectors.
TBTCH1B for TMR applications has six DC-type connectors.
Mark VI Systems
In the Mark VI system, TBTC works with the VTCC processor and supports simplex
and TMR applications. One TBTCH1C connects to the VTCC with two cables. In TMR
systems, TBTCH1B connects to three VTCC boards with six cables.
Mark VIe Systems
In the Mark VIe system, TBTC works with the PTCC I/O pack and supports simplex,
dual, and TMR applications. In simplex systems, two PTCC packs plug into the
TBTCH1C for a total of 24 inputs. With the TBTCH1B, one, two, or three PTCC packs
can be connected, supporting a variety of system configurations.
Simplex pack 12 inputs
Simplex packs 24 inputs
TMR packs 12 inputs
The Thermocouple Input (TBTC) terminal board accepts 24-type E, J, K, S, or T
thermocouple inputs for PTCCH1 pack and 24-type E, J, K, S,T,B,N or R thermocouple
inputs for PTCCH2 pack.

TBTCH1C Terminal Board TBTCH1B Terminal Board
Simplex TMR
x x
x TBTCH1C, x TBTCH1B,
x 1 x 1 JTA JTB
x 2 capacity for x 2 capacity for
x 4
x 3 x 4
x 3
x 5 24 thermocouple x 5 24 thermocouple
12 TC x 6 x 6
x 7 inputs x 7 inputs (with Packs
Inputs x 8 x 8
x 9 x 9 only 12 inputs)
x 10 x 10
x 12
x 11 x 12
x 11
x 13 x 13
x 14 x 14
x 16
x 15 x 16
x 15
x 18
x 17 J ports: x 18
x 17
x 19 JA1 x 19
x 20 x 20 JSA JSB
x 22
x 21 Plug in PTCC I/O Pack(s) x 22
x 21
x 24
x 23 for Mark VIe system x 24
x 23
x x
or
x x
x 26
x 25 Cables to VTCC boards x 26
x 25
x 28
x 27 for Mark VI system; x 28
x 27
x 29 x 29
12 TC x 30 x 30
32
x 31 32
x 31
Inputs x JB1 x JRA JRB
x 34
x 33 For TBTCH1B the number x 34
x 33
x 36
x 35 and location of PTCC I/O x 36
x 35
x 37 points depends on the level x 37
x 38 x 38
x 39 of redundancy required. x 39
x 40 x 40
x 42
x 41 x 42
x 41
x 44
x 43 x 44
x 43
x 46
x 45 x 46
x 45
x 48
x 47 x 48
x 47
x x
x x
Shield Bar BarrierType Terminal Shield Bar BarrierType Terminal

Ground Blocks can be unplugged Ground Blocks can be unplugged
from board for from board for
maintenance maintenance
Thermocouple Terminal Board, I/O Processor, and Cabling

Installation
Connect the thermocouple wires directly to the two I/O terminal blocks. These removable
blocks are mounted on the terminal board and held down with two screws. Each block
has 24 terminals accepting up to #12 AWG wires. A shield terminal strip attached to
chassis ground is located on the left side of each terminal block.
In Mark VI systems, cable the TBTC J-type connectors to the I/O processors in the
VME rack.
In Mark VIe systems, plug the I/O packs directly into the TBTC J-type connectors. The
number of cables or I/O packs depends on the level of redundancy required.
Operation
The 24 thermocouple inputs can be grounded or ungrounded. They can be located up to
300 m (984 ft) from the turbine control panel with a maximum two-way cable resistance
of 450 . TBTC features high-frequency noise suppression and two CJ reference
devices, as shown in following figure. The I/O processor performs the analog-to-digital
conversion and the linearization for individual thermocouple types.
In Mark VI simplex systems using TBTCH1C, one VTCC is used. In Mark VIe simplex
systems, two PTCC packs plug into TBTC, obtaining 24 thermocouple inputs.
Terminal Board TBTCH1C

Thermocouple I/O Processor

Cold Junction Excitation
JA1 remote (Mark VI) or local
Reference
(Mark VIe)
Thermocouple
High
Noise
Low Suppression
A/D
Processor
Conv
Grounded or (12) thermocouples
ungrounded ID
Cold Junction
JB1
Reference
JB1 cables to I/O controller

Thermocouple
High
Noise
Low Suppression
(12) thermocouples
ID
Thermocouple Inputs and I/O Processor, Simplex

For TMR systems using TBTCH1B, the thermocouple signals fan out to three
J-connectors. The Mark VI system accommodates 24 inputs and the Mark VIe system
accommodates 12 inputs.
The TBTC terminal board supports all thermocouple spans documented for the associated
thermocouple I/O processor.
Termination Board TBTCH1B Thermocouple I/O Processor

<R>
JRB Excitation.
ID I/O Processor is either
Cold Junc. remote (Mark VI) or
Refer. local (Mark VIe)
Thermocouple High
Low NS
Grounded or Noise JSB

ungrounded Suppression ID
A/D Processor
(12) thermocouples Conv.
JTB
ID
JRA
ID
Cold Junc.
Refer.
Thermocouple High
Low NS
Grounded or JSA
ungrounded ID
(12) thermocouples
Other selected J-ports cable to I/O
Processor VTCC for Mark VI systems,
or
connect PTCC I/O Packs for Mark VIe,
JTA for <S> and <T>.
ID
Thermocouple Inputs and I/O Processor, TMR systems

Thermocouple Limits
TBTC with PTCCH1 or VTCC
from -30 to 65C (-22 to +149 F).
The units (C or F) are based
on the ThermCplUnit settings.
Thermocouple Type PTCCH1 E J K S T
See section ThermCplUnit
Parameter Low range, F -60 -60 -60 0 -60
C -51 -51 -51 -17.78 -51
mV at low range with reference -7.174 -6.132 -4.779 -0.524 -4.764
at 70C (158 F)
High range, F 1100 1400 2000 3200 750
C 593 760 1093 1760 399
mV at high range with reference 44.547 42.922 44.856 18.612 20.801
at 0C (32 F)
TBTC with PTCCH2

from -30 to 65C (-22 to +149 F).

Low range, F -60 -60 -60 0 -60
C -51 -51 -51 -17.78 -51
at 70C (158 F)
High range, F 1832 2192 2372 3200 752
C 1000 1200 1300 1760 400
at 0C (32 F)
Thermocouple Type PTCCH2 B N R

C 0 -51 -17.78
mV at low range with reference at 70C -0.0114 -3.195 -0.512
(158 F)
High range, F 3272 2282 3092
C 1800 1250 1700
mV at high range with reference at 0C (32 13.593 45.694 20.220
F)

Cold Junctions
The CJ signals go into signal space and are available for monitoring. Normally the
average of the two is used. Acceptable limits are configured, and if a CJ goes outside
the limit, a logic signal is set. A 1 F error in the CJ compensation will cause a 1 F
error in the thermocouple reading.
Hard-coded limits are set at -40 to 85C (-40 to +185 F), and if a CJ goes outside this,
it is regarded as bad. Most CJ failures are open or short circuit. If the CJ is declared
bad, the backup value is used. This backup value can be derived from CJ readings on
other terminal boards, or can be the configured default value (refer to signals in the
section, Configuration).

Operation
The 24 thermocouple inputs can be grounded or ungrounded. They can be located up to
300 m (984 ft) from the turbine control panel with a maximum two-way cable resistance
of 450 . TBTC features high-frequency noise suppression and two CJ reference
devices, as shown in following figure. The I/O processor performs the analog-to-digital
conversion and the linearization for individual thermocouple types.
In Mark VI simplex systems using TBTCH1C, one VTCC is used. In Mark VIe simplex
systems, two PTCC packs plug into TBTC, obtaining 24 thermocouple inputs.
Terminal Board TBTCH1C

Thermocouple I/O Processor

Cold Junction Excitation
JA1 remote (Mark VI) or local
Reference
(Mark VIe)
Thermocouple
High
Noise
Low Suppression
A/D
Processor
Conv
Grounded or (12) thermocouples
ungrounded ID
Cold Junction
JB1
Reference
JB1 cables to I/O controller

Thermocouple
High
Noise
Low Suppression
(12) thermocouples
ID
Thermocouple Inputs and I/O Processor, Simplex

For TMR systems using TBTCH1B, the thermocouple signals fan out to three
J-connectors. The Mark VI system accommodates 24 inputs and the Mark VIe system
accommodates 12 inputs.
The TBTC terminal board supports all thermocouple spans documented for the associated
thermocouple I/O processor.
Termination Board TBTCH1B Thermocouple I/O Processor

<R>
JRB Excitation.
ID I/O Processor is either
Cold Junc. remote (Mark VI) or
Refer. local (Mark VIe)
Thermocouple High
Low NS
Grounded or Noise JSB

ungrounded Suppression ID
A/D Processor
(12) thermocouples Conv.
JTB
ID
JRA
ID
Cold Junc.
Refer.
Thermocouple High
Low NS
Grounded or JSA
ungrounded ID
(12) thermocouples
Other selected J-ports cable to I/O
Processor VTCC for Mark VI systems,
or
connect PTCC I/O Packs for Mark VIe,
JTA for <S> and <T>.
ID
Thermocouple Inputs and I/O Processor, TMR systems

Thermocouple Limits
TBTC with PTCCH1 or VTCC
from -30 to 65C (-22 to +149 F).
The units (C or F) are based
on the ThermCplUnit settings.
See section ThermCplUnit
Parameter Low range, F -60 -60 -60 0 -60
C -51 -51 -51 -17.78 -51
at 70C (158 F)
High range, F 1100 1400 2000 3200 750
C 593 760 1093 1760 399
at 0C (32 F)
TBTC with PTCCH2

from -30 to 65C (-22 to +149 F).

Low range, F -60 -60 -60 0 -60
C -51 -51 -51 -17.78 -51
at 70C (158 F)
High range, F 1832 2192 2372 3200 752
C 1000 1200 1300 1760 400
at 0C (32 F)
Thermocouple Type PTCCH2 B N R

C 0 -51 -17.78
mV at low range with reference at 70C -0.0114 -3.195 -0.512
(158 F)
High range, F 3272 2282 3092
C 1800 1250 1700
mV at high range with reference at 0C (32 13.593 45.694 20.220
F)

Cold Junctions
The CJ signals go into signal space and are available for monitoring. Normally the
average of the two is used. Acceptable limits are configured, and if a CJ goes outside
the limit, a logic signal is set. A 1 F error in the CJ compensation will cause a 1 F
error in the thermocouple reading.
Hard-coded limits are set at -40 to 85C (-40 to +185 F), and if a CJ goes outside this,
it is regarded as bad. Most CJ failures are open or short circuit. If the CJ is declared
bad, the backup value is used. This backup value can be derived from CJ readings on
other terminal boards, or can be the configured default value (refer to signals in the
section, Configuration).
Specifications
Item Specification
Number of channels 24 channels per terminal board
Thermocouple types E, J, K, S, T thermocouples, and mV inputs if TBTC is connected to PTCCH1 or
VTCCH1
E, J, K, S, T, B, N ,R thermocouples, and mV inputs if TBTC is connected to
PTCCH2 or VTCCH2
Span -8 mV to +45 mV if TBTC is connected to PTCCH1 or VTCCH1
-20 mV to +95 mV if TBTC is connected to PTCCH2 or VTCCH2
Cold junction compensation Reference junction temperature measured at two locations on each H1C terminal
board TMR H1B board has six CJ references. Only three available with Mark
VIe I/O packs.
Cold junction temperature accuracy CJ accuracy 1.1C (2 F)
Monitor readings from all TCs, CJs, calibration voltages, and calibration zero
readings.
Diagnostics
Each thermocouple type has hardware-limit checking based on preset
this limit is exceeded, a logic signal is set and the input is no longer scanned. If any
one of the inputs hardware limits is set, it creates a composite diagnostic alarm.
Each terminal board connector has its own ID device that is interrogated by the
I/O board. The board ID is coded into a read-only chip containing the terminal
board serial number, board type, revision number, and the J connector location. If a
When operating with the I/O processor a very small current is injected into each
thermocouple path. This is done to detect open circuits and is of a polarity to create a
low temperature reading should a thermocouple open.

Configuration
Note The following information is extracted from the ToolboxST application and
represents a sample of the configuration information for this board. Refer to the actual
configuration file within the ToolboxST application for specific information.

PTCC_Mod_Config
SysFreq System Frequency (used for noise rejection) 60Hz, 50Hz
SystemLimits Enable or Disable All System Limit Checking Disable, Enable
AutoReset Automatic restoring of thermocouples removed Disable, Enable
from scan
PTCC Point Config
Thermocouple01 First of 24 thermocouples, point signal Point Edit (Input FLOAT)
Thermocouple12
ThermCplType Select thermocouples type or mV input For PTCCH1- Unused, mV, T,K,J,E, or S
Unused inputs are removed from scanning. The For PTCCH2- Unused, mV, T,K,J,
mV inputs are primarily for maintenance, but can E,S,B,N or R
also be used for custom remote CJ compensation.
Standard remote CJ compensation is also
available.
ThermCplUnit Select thermocouples display unit in C or F. This
value needs to match units of attached variable.
See section ThermCplUnit Parameter.
ReportOpenTC H1A is not available. H2A can select open Fail_Cold, Fail_Hot
thermocouple to be reported on either Failed_Hot
or Failed_Cold
LowPassFiltr Enable 2 Hz low pass filter Enable, Disable
SysLimit1 System Limit 1 in C, F, or mV -450 to 3500 (FLOAT)
SysLim1Enabl Enable system limit 1 fault check , a temperature Enable, Disable
limit which can be used to create an alarm.
SysLim1 Latch Latch system limit 1 fault NotLatch, Latch
Determines whether the limit condition will latch or
unlatch; reset used to unlatch
SysLim1Type System limit 1 check type limit occurs when the >=, <=
temperature is greater than or equal (>=), or less
than or equal to (<=) a preset value
SysLimit2 System Limit 2 in C, F, or mV -450 to 3500 (FLOAT)

SysLim2 Enabled Enable system limit 2 fault check , Enable,
a temperature limit which can be used to create Disable
an alarm.

SysLim2Latch Latch system limit 2 fault NotLatch, Latch
Determines whether the limit condition will latch or
unlatch; reset used to unlatch >=, <=
System limit 2 check type limit occurs when the
temperature is greater than or equal (>=), or less
than or equal to (<=) a preset value
SysLim2Latch
TMR_DiffLimt Diagnostic limit, TMR input vote difference in -450 to 3500 (FLOAT)
engineering units
Limit condition occurs if three temperatures in
R,S,T differ by more than a preset value (F); this
creates a voting alarm condition.
PTCC_CJ_Config Cold junction reference similar configuration as for
thermocouples but no low pass filter
ColdJuncType Select CJ Type Remote, Local
ColdJuncUnit Select TC Display Unit Deg C or F. Value needs to Deg_F, Deg_C
match units of attached variable
SysLimit1 System Limit 1 - Deg F or Deg C -40 to 185 (FLOAT)
SysLim1Enabl Enable System Limit 1 Fault Check Disable, Enable
SysLim1Latch Latch System Limit 1 Fault NotLatch, Latch
SysLim1Type System Limit 1 Check Type ( >= or <;= ) >;=, <;=
SysLimit2 System Limit 2 - Deg F or Deg C -40 to 185 (FLOAT)
SysLim2Enabl Enable System Limit 2 Fault Check Disable, Enable
SysLim2Latch Latch System Limit 2 Fault NotLatch, Latch
SysLim2Type System Limit 2 Check Type ( >;= or < ) >=, <;=
TMR_DiffLimt Diag Limit, TMR Input Vote Difference, in Eng -450 to 3500 (FLOAT)
Units
Variable Description Direction Type

L3DIAG_PTCC_R I/O Diagnostic Indication Input BIT
L3DIAG_PTCC_S I/O Diagnostic Indication Input BIT
L3DIAG_PTCC_T I/O Diagnostic Indication Input BIT
LINK_OK_PTCC_R I/O Link Okay Indication Input BIT
LINK_OK_PTCC_S I/O Link Okay Indication Input BIT
LINK_OK_PTCC_T I/O Link Okay Indication Input BIT
ATTN_PTCC_R I/O Attention Indication Input BIT
ATTN_PTCC_S I/O Attention Indication Input BIT
ATTN_PTCC_T I/O Attention Indication Input BIT
PS18V_PTCC_R I/O 18V Power Supply Indication Input BIT
PS18V_PTCC_S I/O 18V Power Supply Indication Input BIT
PS18V_PTCC_T I/O 18V Power Supply Indication Input BIT

PS28V_PTCC_R I/O 28V Power Supply Indication Input BIT
PS28V_PTCC_S I/O 28V Power Supply Indication Input BIT
PS28V_PTCC_T I/O 28V Power Supply Indication Input BIT
IOPackTmpr_R IO Pack Temperature (deg F) AnalogInput FLOAT
IOPackTmpr_S IO Pack Temperature (deg F) AnalogInput FLOAT
IOPackTmpr_T IO Pack Temperature (deg F) AnalogInput FLOAT
SysLim1TC1 System limit 1 for thermocouple 1 Input BIT

SysLim1CJ1 System limit 1 for cold junction 1 Input BIT

SysLim2CJ1 System limit 1 for cold junction 2 Input BIT
CJBackup Backup Cold Junction Temperature (F or C based on Cold AnalogOutput FLOAT
Junction configuration)
CJRemote1 Remote Cold Junction Temperature. Used when Cold Junction AnalogOutput FLOAT
set to Remote (F or C based on Cold Junction configuration)
ThermCplUnit Parameter
The ThermCplUnit parameter affects the native units of the controller application
variable. It is only indirectly related to the tray icon and associated unit switching
capability of the HMI. This parameter should not be used to switch the display units of
the HMI.
Do not change the ThermCplUnit parameter in the ToolboxST
application because these changes will require corresponding
changes to application code and to the Format Specification or
units of the connected variable. This parameter modifies the
actual value sent to the controller as seen by application code.
Application code that is written to expect degrees Fahrenheit will
not work correctly if this setting is changed. External devices,
such as HMIs and Historians, may also be affected by changes
to this parameter.

DTTC Simplex Thermocouple Input
The Simplex Thermocouple Input (DTTC) terminal board is a compact terminal board
designed for DIN-rail mounting. The board has 12 thermocouple inputs and connects
to the VTCC thermocouple processor board with a single 37-pin cable. This cable is
identical to the one used on the larger TBTC terminal board. The on-board signal
conditioning and CJ reference are identical to those on the TBTC board.
Note An on-board ID chip identifies the board to the VTCC for system diagnostic
purposes.
Two DTTC boards can be connected to the VTCC for a total of 24 inputs. High- density
Euro-Block type terminal blocks are permanently mounted to the board with two screw
connections for the ground connection (SCOM). Every third screw connection is for the
shield. Only the simplex version of the board is available. The terminal boards can be
stacked vertically on the DIN-rail to conserve cabinet space.
Note The DTTC board does not work with the PTCC I/O pack.
Installation
Note Shield screws are provided on this board and are internally connected to SCOM.
Mount the plastic holder on the DIN-rail and slide the DTTC board into place. Connect
the thermocouples wires directly to the terminal block. The Euro-Block type terminal
block has 42 terminals and is permanently mounted on the terminal board. Typically #18
AWG wires are used. Two screws, 41 and 42, are provided for the SCOM (ground)
Note SCOM must be connected to ground.

DIN Thermocouple Terminal Board DTTC
1 Input 1 (+)
Input 1 (-) 2
3 Input 1 Shld
Input 2 Shld 4
5 Input 2 (+)
37-pin "D" shell Input 2 (-) 6 Input 3 (+)
7
connector with latching JA1 Input 3 (-) 8
9 Input 3 Shld
fasteners Input 4 Shld 10
11 Input 4 (+)
Input 4 (-) 12
13 Input 5 (+)
Input 5 (-) 14
15 Input 5 Shld
Input 6 Shld 16
17 Input 6 (+)
Input 6 (-) 18
19 Input 7 (+)
Input 7 (-) 20
21 Input 7 Shld
Input 8 Shld 22
23 Input 8 (+)
Input 8 (-) 24
25 Input 9 (+)
Input 9 (-) 26
27 Input 9 Shld
Input 10 Shld 28
29 Input 10 (+)
Input 10 (-) 30
31 Input 11 (+)
Input 11 (-) 32
33 Input 11 Shld
Cable to J3 Input 12 Shld 34
connector in I/O 35 Input 12 (+)
Input 12 (-) 36
37
rack for the VTCC 38
39
board 40
41 Chassis Ground
Chassis Ground 42
SCOM
Euro-Block type
terminal block
Plastic mounting
holder
DIN-rail mounting
DTTC Wiring and Cabling

Operation
VTCC provides excitation for the CJ reference on DTTC. The 12 thermocouple signals,
the CJ signal, and the connection to the identity chip (ID) come through connector JA1
and are cabled to the VME control rack R. The following figure shows DTTC connected
to VTCC, which contains the A/D converter.
<R> Control Rack

DTTC Terminal Board
Local CJ Excitation
JA1 J3
reference (1)
24 Thermocouples
Remote CJ
Thermocouple Noise Suppression references
1 Pos
2 Neg
3 Shld
Grounded or
Connectors at
ungrounded SCOM bottom of A/D Processor
(12) thermocouples VME rack
ID VMEbus
J4 Excit.
I/O Core
Processor
TMS320C32
Connector for cable
from second DTTC Sampling type
terminal board A/D converter
DTTC and VTCC for Thermocouple Inputs

Specifications
Item Specification
Number of Channels 12 channels per terminal board
Cold junction compensation Reference junction temperature measured at one location
Cold junction temperature accuracy CJ accuracy 1.1C (2 F)
Fault detection High/low (hardware) limit check.
Check ID chip on J3 connector.

Diagnostics
Each thermocouple type has hardware limit checking based on preset
VTCC finds this limit is exceeded a logic signal is set and the input is no longer
scanned. If any one of the input hardware limits is set it creates a composite
diagnostic alarm, L3DIAG_VTCC, referring to the entire board.
Each terminal board cable has its own ID device that is interrogated by VTCC.
The board ID is coded into a read-only chip containing the terminal board serial
number, board type, and revision number. If a mismatch is encountered, a hardware
When operating with the I/O processor a very small current is injected into each
thermocouple path. This is done to detect open circuits and is of a polarity to create a
high temperature reading should a thermocouple open.
signals can be individually latched, and then reset with the RESET_DIA signal.
Configuration

Turbine Specific Primary Trip (VTUR)
VTUR Primary Turbine Protection
The Primary Turbine Protection (VTUR) board, has the following functions:
Measures the turbine speed with four passive pulse rate devices and passes the signal
to the controller, which generates the primary overspeed trip
Provides automatic generator synchronizing and closes the main breaker
Monitors induced shaft voltage and current
Monitors eight Geiger-Mueller flame detectors on gas turbine applications. The
detectors connect to TRPG and use 335 V dc, 0.5 mA from an external supply.
Controls three primary overspeed trip relays on the TRPx terminal board. The
controller generates the trip signal, which is sent to VTUR and then to TRPx to
trip the emergency solenoids. The turbine overspeed trip can come from VTUR or
VPRO. TRPx contains nine magnetic relays to interface with three trip solenoids,
known as the electrical trip devices (ETD). Nine relays are used in TMR systems,
three in simplex systems.
Board Versions
There are two board versions as follows:
VTURH1 drives three trip solenoids using one TRPx board and accepts eight flame
detectors
VTURH2 is a two-slot version that drives six trip solenoids using two TRPx boards,
but only accepts eight flame detectors
GEH-6421Q System Guide, Volume II Turbine Specific Primary Trip (VTUR) 17-1
TTURH1B Terminal Board VTUR VME Board
Breakers
x
Generator volts x 37-pin "D" shell
x
Bus volts x 1 JT1 type connectors
x 2 RUN
Shaft volts x 4 x 3 with latching FAIL
x 6
x 5 fasteners STAT
Shaft current x 7
x 8
x 10
x 9
x 12
x 11
x 14 x 13
x 16
x 15
x 18
x 17 Cables to VME
x 20
x 19 JT5 JS1 rack T
x 22
x 21
x 24
x 23
VME bus to VCMI
x
x
Magnetic x 25 JS5
x 26
speed x 28 x 27 Cables to VME
x 30 x 29 rack S J
pickups (12) x 31
x 32 5
x 34 x 33 JR1
x 36
x 35
x 38
x 37 JR5
x 40
x 39 VTUR
x 42
x 41 x
x 44
x 43
x 46
x 45
x 47 J3
x 48
x
TB3 x
Wiring to
Shield bar TTL speed Connectors on
pickups VME rack R J4
Cables to VME
Barrier type terminal rack R
Cable to TRPG
VTUR Turbine Control Board, Terminal Boards, and Cabling
17-2 Turbine Specific Primary Trip (VTUR) GEH-6421Q Mark* VI Control

Installation
its edge connectors
Note Cable connections to the terminal boards are made at the J3 connector on the
lower portion of the VME rack. These are latching type connectors to secure the cables.
Cable connection to the J5 connector on TTUR is made from J5 on the front panel. The
cable to TRPG connects at J4. Power up the VME rack and check the diagnostic lights at
the top of the front panel, for details refer to the section on diagnostics in this document.
Operation
VTUR contains the pulse rate to In simplex applications, up to four pulse rate signals can be used to measure turbine
digital circuits. VTUR alarms speed. Generator and bus voltages are brought into VTUR for automatic synchronizing
high voltages and tests the in conjunction with the turbine controller and excitation system. TTUR has permissive
integrity and continuity of the generator synchronizing relays and controls the main breaker relay coil 52G. Shaft
circuitry. voltage is picked up with brushes and monitored along with the current to the machine
case.
The following figures show the VTUR simplex and TMR turbine speed inputs and
generator synchronizing circuits.
TTURH1B Terminal Board <R> Control Generator Breaker 52G
(input portion) Rack feedback
a
JR1 J3 Turbine
Gen. 17 suppression 02 01
GENH
Board Terminal Board TTURH1B
volts
VTUR (continued)
120 V ac NS
from PT GENL 18 28Vdc
Pulse
Rate J3 JR1 TMR JP1
SMX
MUX K25P
Bus BUSH 19 ID A/D RD Synch. Perm.
volts
120 Vac NS Ac&Dc Mon
20 Shaft
from PT BUSL TMR
test SMX
JP2
To K25
TPRO Trip RD Auto Synch
solenoids
SVH
21 Mon
Flame
NS sensors K25A
175V SVL 22 Synch. check
from VPRO
Shaft J5
23 Mon
SCH J4
14V NS
SCL 24
J8 08 06,7 05 04 03
Connectors
5 (TB3)
Machine case TTL1_R
JR5 at bottom of
B M A
)
41 VME rack
#1 Primary
MPU1RH
Filter K A U
Magnetic NS Clamp Trip R N T
MPU1RL 42 AC
signals O
Speed PU Coupling H
6 (TB3) to
TTL2_R
TRPG P125Gen
)
MPU2RH 43 Filter
#2 Primary
Clamp Note 1: TTL option only
Magnetic
44 NS AC ID
Speed PU MPU2RL
Coupling
available on first two
Speed pickups. 52G
45 Note 2: An external normally
#3 Primary Filter b
Clamp
Magnetic NS AC closed auxiliary breaker
46
Speed PU Coupling
contact must be provided in
Breaker coil
47 the breaker close coil circuit
#4 Primary Filter
Magnetic Clamp as indicated.
48 NS AC N125Gen
Speed PU Coupling Note 3: Signal to K25A
comes from TREG/VPRO
through TRPG & VTUR.
VTUR Turbine Speed Inputs and Generator Synchronizing on TTUR, Simplex

52G
a
<T> Generator Breaker
<S> Feedback
Terminal Board TTURH1B <R>
(input portion) Turbine Terminal Board TURH1B 02 01
B52GH
B52GL
Board (continued)
Noise JR1 J3 VTUR
GENH 17 Suppression
J3 JR1
Gen. Volts 28Vdc
NS f( )
120 Vac
GENL 18 JP1 TMR
from PT Pulse
Rate/ SMX
Digital K25P
2 RD Synch.
BUSH 19 MUX
JS1 3 Permissve
Bus Volts J3 JS1
A/D
120 Vac NS JP2 TMR
BUSL 20
from PT AC&DC SMX
shaft K25
To 2
test RD Auto Synch.
TPRO 3
Trip J3 JT1
SVH 21 solenoids
JT1
175V NS Flame K25A
SVL 22
sensors Synch. check
from VPRO
J4
Shaft J5
23
SCH Mon
14V Connectors
NS at bottom of
SCL 24
VME rack
5 (TB3) J8 08 07 06 05 04 03
TTL1R JR5
Machine Case
)
MPU1RH 41
BKRH
MAN
#1 Primary
AUTO
Filter
Magnetic
Clamp Trip
NS AC
Speed PU MPU1RL 42 Coupling
Signals to
4 Circuits* TRPG
3 (TB3) P125Gen
TTL1S JS5 Note 1: TTL option only
)
MPU1SH 33 available on first two circuits.

#2 Primary Filter
of each group of 4 pickups*. 52G
Clamp
Magnetic NS AC
b
Speed PU MPU1SL 34 Coupling
Note 2: An external normally
4 Circuits*
1
closed auxiliary breaker
(TB3) Bkr Coil
TTL1T JT5 contact must be provided in
To Rack S
)
MPU1TH 25 the Breaker close coil circuit

#3 Primary Filter
Clamp as indicated.
Magnetic NS AC N125Gen
MPU1TL 26 Coupling
Speed PU Note 3: Signal to K25A
4 Circuits* comes from TREG/VPRO
To Rack T
VTUR Turbine Speed Inputs and Generator Synchronizing, TMR
Speed Pickups
The median speed signal is used VTUR interfaces with four passive, magnetic speed inputs with a frequency range
for speed control and for the of 2 to 20,000 Hz. Using passive pickups on a sixty- tooth wheel, circuit sensitivity
primary overspeed trip signal. allows detection of 2-RPM turning gear speed to determine if the turbine is stopped
(zero speed). If automatic turning gear engagement is provided in the turbine control,
this signal initiates turning gear operation.
The primary overspeed trip calculations are performed in the controller using algorithms
similar to (but not the same as) those in the VPRO protection board. The fast trip option
used on gas turbines runs in VTUR.
Primary Trip Solenoid Interface
The normal primary overspeed trip is calculated in the controller and passed to the VTUR
and then to the chosen primary trip terminal board. TRPx contains relays to interface
with the ETDs. TRPx typically works in conjunction with an emergency trip board
(TREx) to form the primary and emergency sides of the interface to the ETDs. VTUR
supports up to three ETDs driven from each TRPx/TREx combination.
VTUR supports the following trip boards:
TRPG is targeted at gas turbine applications and works in conjunction with the
TREG board for emergency trip.
TRPS is used for small and medium size steam turbine systems and works in
conjunction with the TRES board for emergency trip.
TRPL is intended for large steam turbine systems and works in conjunction with the
TREL board for emergency trip.
Note Additional trip boards are being developed for other specific applications.
To support trip board operation, VTUR provides discrete inputs used to monitor signals
such as trip relay position, synchronizing relay coil drive, and ETD power status.
Fast Overspeed Trip
In special cases where a faster overspeed trip system is required, the VTUR Fast
Overspeed Trip algorithms can be enabled. The system employs a speed measurement
algorithm using a calculation for a predetermined tooth wheel. Two overspeed algorithms
are available as follows:
PR_Single uses two redundant VTURs by splitting up the two redundant PR
transducers, one to each board. PR_Single provides redundancy and is the preferred
algorithm for LM gas turbines.
PR_Max uses one VTUR connected to the two redundant PR transducers. PR_Max
allows broken shaft and deceleration protection without the risk of a nuisance trip if
one transducer is lost.
The fast trips are linked to the output trip relays with an OR-gate. VTUR computes
the overspeed trip instead of the controller, so the trip is very fast. The time from the
overspeed input to the completed relay dropout is 30 ms or less.

Input Signal Space
Firmware
Config. Inputs
param. Scaling
Input, PR1 RPM PulseRate1
PR1Type, d RPM/sec Accel1
PR1Scale 2
PulseRate2 dt
------ Four Pulse Rate Circuits ------- RPM PulseRate2
PulseRate3 Accel1 RPM/sec Accel2
Accel2 RPM PulseRate3
PulseRate4 Accel3 RPM/sec Accel3
Accel4 RPM PulseRate4
AccelCal Type RPM/sec Accel4
Fast Overspeed Protection
FastTripType PR_Single
PulseRate1 A
PR1Setpoint A>B S FastOS1Trip
PR1TrEnable B
R
PR1TrPerm
PulseRate2 A
A>B S
PR2Setpoint B FastOS2Trip
PR2TrEnable R
PR2TrPerm
PulseRate3 A
PR3Setpoint A>B S FastOS3Trip
PR3TrEnable B
R
PR3TrPerm
PulseRate4 A
A>B S FastOS4Trip
PR4Setpoint B
PR4TrEnable R
PR4TrPerm
InForChanA Accel1
Accel2 Input AccelA
Accel3 cct. A S
Accel4 select A>B AccATrip
AccASetpoint
B R
AccelAEnab
AccelAPerm
InForChanB Accel1
Accel2 Input AccelB
Accel3 cct. A S AccBTrip
Accel4 select A>B
AccBSetpoint B R
AccelBEnab Fast Trip
AccelBPerm Path
ResetSys, VCMI, Mstr False = Run
OR
PTR1 Primary Trip Relay, normal Path, True= Run True = Run Output, J4,PTR1
AND
PTR1_Output
PTR2 Primary Trip Relay, normal Path, True= Run AND True = Run Output, J4,PTR2
PTR2_Output
PTR3 True = Run Output, J4,PTR3
PTR3_Output -------------Total of six circuits -----
PTR4 True = Run Output, J4A,PTR4
PTR4_Output Output, J4A,PTR5
PTR5 True = Run
PTR5_Output True = Run Output, J4A,PTR6
PTR6
PTR6_Output
Fast Overspeed Algorithm, PR-Single
Input Config. Signal Space
Firmware
param. Scaling inputs
Input, PR1 PulseRate1 RPM PulseRate1
PR1Type, RPM/sec Accel1
2 d
PR1Scale
dt RPM PulseRate2
PulseRate2
Accel1 Accel2
------ Four Pulse Rate Circuits -------RPM/sec
PulseRate3 Accel2 RPM PulseRate3
Accel3 RPM/sec Accel3
PulseRate4 Accel4 RPM PulseRate4
AccelCal Type RPM/sec Accel4
FastTripType PR_Max Fast Overspeed Protection
DecelPerm
DecelEnab
DecelStpt
InForChanA
InForChanB
Accel1 Input AccelA
Neg A
Accel2 cct. S
Accel3 AB
PulseRate4 AccelB PulseRateB B
PR1/2Max
PulseRate1 A
PulseRate2 MAX A>B S FastOS1Trip
FastOS1Stpt B
FastOS1Enab R
FastOS1Perm
PR3/4Max
PulseRate3 A
PulseRate4 MAX A>B S FastOS2Trip
FastOS2Stpt B
FastOS2Enab R
FastOS2Perm
N/C FastOS3Trip
PR1/2Max N/C FastOS4Trip
A
|A-B| A
PR3/4Max A>B S
DiffSetpoint B FastDiffTrip
B
DiffEnab R
DiffPerm
Fast Trip
ResetSys, VCMI, Mstr Path
OR
False = Run
True = Run Output, J4,PTR1

PTR1 Primary Trip Relay, normal Path, True= Run AND
PTR1_Output
True = Run Output, J4,PTR2
PTR2 Primary Trip Relay, normal Path, True= Run AND
PTR2_Output
PTR3 True = Run Output, J4,PTR3
PTR3_Output -------------Total of six circuits --------- True = Run Output, J4A,PTR4
PTR4
PTR5_Output
PTR6_Output
Fast Overspeed Algorithm, PR-Max

Shaft Voltage and Current Monitor
Bearings can be damaged by the flow of electrical current from the shaft to the case.
This current can occur for several reasons:
A static voltage can be caused by droplets of water being thrown off the last stage
buckets in a steam turbine. This voltage builds up until a discharge occurs through
the bearing oil film.
An ac ripple on the dc generator field can produce an ac voltage on the shaft with
respect to ground through the capacitance of the field winding and insulation. Note

that both of these sources are weak, so high impedance instrumentation is used to
measure these voltages with respect to ground.
A voltage can be generated between the ends of the generator shaft due to
dissymmetries in the generator magnetic circuits. If the insulated bearings on the
generator shaft breakdown, the current flows from one end of the shaft through the
bearings and frame to the other end. Brushes can be used to discharge damaging
voltage buildup, and a shunt should be used to monitor the current flow.
The turbine control continuously monitors the shaft to ground voltage and current,
and alarms excessive levels. There is an ac test mode and a dc test mode. The ac test
applies an ac voltage to test the integrity of the measuring circuit. The dc test checks
the continuity of the external circuit, including the brushes, turbine shaft, and the
interconnecting wire.
Note The dc test is driven from the R controller only. If the R controller is down, this
test cannot be run successfully.
Flame Detectors
When used with TRPG, VTUR monitors signals from eight Geiger-Mueller flame
detectors. With no flame present, the detector charges up to the supply voltage. The
presence of the flame causes the detector to charge to a level and then discharge through
TRPG. As the flame intensity increases the discharge frequency increases. When the
detector discharges, VTUR and TRPG convert the discharged energy into a voltage
pulse. The pulse rate varies from 0 to 1,000 pulses/sec. These voltage pulses are fanned
out to all three modules. Voltage pulses above 2.5 V generate a logic high, and the pulse
rate over a 40 ms time period is measured in a counter.
Automatic Synchronizing
All synchronizing connections are located on the TTUR terminal board. The generator
and bus voltages are provided by two, single phase, potential transformers (PTs) with a
fused secondary output supplying a nominal 115 V rms. Measurement accuracy between
the zero crossing for the bus and generator voltage circuits is 1 degree.
Turbine speed is matched against the bus frequency. The generator and bus voltages are
matched by adjusting the generator field excitation voltage from commands sent between
the turbine controller and the EX2000 over the Unit Data Highway (UDH). A command
is given to close the breaker when all permissions are satisfied. The breaker is predicted
to close within the calculated phase/slip window. Feedback of the actual breaker closing
time is provided by a 52G/a contact from the generator breaker (not an auxiliary relay)
to update the database. An internal K25A sync check relay is provided on the TTUR;
the independent backup phase/slip calculation for this relay is performed in the 
protection module. Diagnostics monitor the relay coil and contact closures to determine
if the relay properly energizes or de-energizes upon command.
Synchronizing Modes
There are three basic synchronizing modes. Traditionally, these modes are selected from
a generator panel mounted selector switch:
Off The breaker cannot be closed by the controller. The check relay will not pick up.
Manual The operator initiates breaker close, which is still subject to the K25A Sync
Check contacts driven by the VPRO. The manual close is initiated from an external
contact on the generator panel, normally connected in series with a sync mode in manual
contact.
Auto The system automatically matches voltage and speed, and then closes the breaker
at the right time to hit top dead center on the synchroscope. All three of the following
functions must agree for this closure to occur:
- K25A - sync check relay, checks the allowable slip/phase window, from VPRO
- K25 - auto sync relay, provides precision synchronization, from VTUR
- K25P - sync sequence permissive, checks the turbine sequence status, from
VTUR
The K25A relay should close before the K25 or else the sync check function will interfere
with the auto sync optimizing. If this sequence is not executed, a diagnostic alarm is
posted, a lockout signal is set true in signal space, and the application code may prevent
any further attempts to synchronize until a reset is issued and the correct coordination is
set up. Details of the various checks are discussed in the following sections.
Sync Check
The K25A sync check function is based on phase lock loop techniques. The VPRO
performs the calculations for this function, but interfaces to the breaker close circuit are
located on the TTUR board, not TPRO. Limit checks are performed against adjustable
constants as follows:
Generator under-voltage
Bus under-voltage
Voltage error
Frequency error (slip), with a maximum value of 0.33 Hz, typically set to 0.27 Hz
Phase error with a maximum rotational value of 30 , typically set to 10 .
In addition, sync check arms logic to enable the function, and provides bypass logic for
deadbus closure. The sync window below is based on typical settings:
SLIP
+0.27 Hz
PHASE
-10 +10 Degrees
-0.27 Hz
Typical Sync Window

Auto Sync
The Auto Sync K25 function uses zero voltage crossing techniques. It compensates for
the breaker time delay, which is defined by two adjustable constants with logic selection
between the two (for two breaker applications). VTUR performs the calculations for
phase, slip, acceleration, and anticipated time lead for the breaker delay. The time delay
parameter is adjusted (up to certain limits) based on the measured breaker close time.
In addition, auto sync arms logic to enable the function, and bypasses logic to provide for
deadbus or manual closure. The auto sync projected sync window is shown below, where
positive slip indicates that the generator frequency is higher than the bus frequency.
SLIP
0.3 Hz
0.12 Hz
Gen. Lag 0 10 Gen. Lead (phase degrees)
Auto Sync Projected Window

The projected window is based on current phase, current slip, and current acceleration.
The generator must currently be lagging and have been lagging for the last 10 consecutive
cycles, and projected (anticipated) to be leading when the breaker actually reaches
closure. Auto sync does not allow the breaker to close with negative slip; speed matching
typically aims at around + 0.12 Hz slip.
Synchronization Display
A special synchronization screen is available on the HMI with a real-time graphical
phase display and control pushbutton. The display items are listed in table.
Sync Display Description

Dynamic Parameters Voltages: Generator, Bus, Difference
Frequencies: Generator, Bus, Slip (difference)
Phase: Difference angle, degrees
Status Indication Mode: Sync OFF, MANUAL, AUTO
Sync Monitor: OFF, ON
Dead bus breaker: Open/close
Second breaker if Open/close
applicable: K25P
Sync permissive:
Auto sync enabled Raise/lower
Speed adjust: Raise/lower
Voltage adjust:
Sync Permissive Gen voltage: OK/not OK
Bus voltage: OK/not OK
Gen frequency: OK/not OK
Bus frequency: OK/not OK
Difference volts: OK/not OK
Difference frequ: OK/not OK
Phase: K25, OK/not OK
K25A, OK/not OK
Limit Constants Upper and lower limits for the above permissive
Breaker Performance Diagnostics: Slow check relay

Sync relay lockup
Breaker #1 close time out of limits
Breaker #2 close time out of limits
Relay K25P trouble
Breaker closing voltage (125 V dc) missing
Control Pushbuttons Sync monitor: ON, OFF
Speed adjust: RAISE, LOWER
Voltage adjust: RAISE, LOWER

Specifications
Item Specification
Number of inputs 4 passive speed pickups
1 shaft voltage and 1 current measurement
1 generator and 1 bus voltage
Generator breaker status
8 flame detectors from first TRPG
Number of outputs Synch permissive and Auto synch relays.
Primary trip solenoid interface, 3 outputs to TRPx
Additional 3 trip outputs from second TRPx using VTURH2
MPU pulse rate range 2 Hz to 20 kHz
MPU pulse rate accuracy 0.05% of reading
MPU input circuit sensitivity 27 mV pk (detects 2 rpm speed)
Shaft voltage monitor Signal is frequency of 5 V dc (0 1 MHz) pulses from 0 to 2,000 Hz
Shaft voltage wiring Up to 300 m (984 ft), with maximum two-way cable resistance of 15
Shaft voltage dc test Applies a 5 V dc source to test integrity of the external turbine circuit and
measures dc current flow. Circuit computes a differential resistance between
0 and 150 within 5 and compares against shunt limit and brush limit.
Readings above 50 indicate a fault.
Return signal is filtered to provide 40 dB of noise attenuation at 60 Hz.
Shaft voltage ac test Applies a test voltage of 1 kHz to the input of the VTUR shaft voltage circuit (R
module only). Shaft voltage monitor circuit on R, S, and T displays an offset of
1000 Hz from normal reading.
Shaft current input Measures shaft current in amps ac (shunt voltage up to 0.1 V pp)
Generator and bus voltage sensors Two single phase potential transformers, with secondary output supplying
a nominal 115 V rms
Each input has less than 3 VA of loading
Allowable voltage range for synch is 75 to 130 V rms
Each PT input is magnetically isolated with a 1,500 V rms barrier
Cable length can be up to 1,000 ft. of 18 AWG wiring
Synchronizing measurements Frequency accuracy 0.05% over 45 to 66 Hz range
Zero crossing of the inputs is monitored on the rising slope
Phase difference measurement is better than 1 degree
Contact voltage sensing 20 V dc indicates high and 6 V dc indicates low
Each circuit is optically isolated and filtered for 4 ms
Trip solenoids 6 per VTURH2 (3 per TRPx terminal board)
3 per VTURH1
Flame detectors 8 per VTUR
Diagnostics
Three LEDs at the top of the VTUR front panel provide status information. The normal
board. VTUR makes diagnostic checks including:
If feedback from the solenoid relay drivers differs with the control signal a fault
is created
If feedback from the relay contacts differs with the control signal a fault is created
Loss of solenoid power creates a fault
High and low flame detector voltage creates a fault
Slow synch check relay, slow auto synch relay, and locked up K25 relay; all of
these condition creates a fault
L3DIAG_VTUR occurs. The diagnostic signals can be individually latched and then
reset with the RESET_DIA signal if they go healthy
Terminal board connectors JR1, JS1, JT1, JR5, JS5, JT5 have their own ID device
that is interrogated by the I/O board. The ID device is a read-only chip coded with
the terminal board serial number, board type, revision number, and plug location.
When the chip is read by VTUR and a mismatch is encountered, a hardware
incompatibility fault is created

Configuration

Configuration
VTUR system limits Select system limits Enable, disable
SMredundancy Select Simplex or TMR system Simplex or TMR
AccelCalType Select acceleration calculation type Slow, medium, fast
FastTripType Select Fast Trip algorithm Unused, PR_Single, PR_Max
J3J5:IS200TTURH1A TTUR connected to VTUR through J3 Connected, not connected

and J5
PulseRate1 Pulse rate input 1 - board point Point edit (input FLOAT)
PRType Select Speed or Flow type input Unused, speed, flow, Speed_LM
PRScale Select pulses per revolution 0 to 1,000
SysLim1Enable Select system limit 1 Enable, disable
SysLimit1 Select alarm level in GPM or RPM 0 to 20,000
SysLim2Enable Select system limit 2 (as above) Enable, disable
TMRDiffLimit Difference limit for voted PR inputs EU 0 to 20,000
ShVoltMon Shaft voltage monitor - board point Point edit (input FLOAT)
SysLim1Enable Select System Limit 1 Enable, disable
SysLimit1 Select alarm level in frequency 0 to 100
SysLim2Enable Select system limit 2 (as above) Enable, disable
ShCurrMon Shaft current monitor - board point Point edit (input FLOAT)
ShuntOhms Shunt resistance 0 to 100
Shunt limit Shunt maximum ohms 0 to 100
Brush limit Shaft brush maximum ohms 0 to 100
SysLimit1 Select alarm level in amps 0 to 100
GenPT_KVolts Generator potential transformer - board Point edit (input FLOAT)

point
PT_Input PT input in kVrms for PT output 0 to 1,000
PT_Output PT output in Vrms, nominal 115 V rms 0 to 150
SysLim1 Select alarm level in kVrms 0 to 1,000
SysLim2 Select alarm level in kVrms 0 to 1,000
BusPT_Kvolts Bus potential transformer - board point Point edit (input FLOAT)
Ckt_Bkr Circuit breaker - board point Point edit (input BIT)
System Frequency Select frequency in Hz 50 or 60
CB1CloseTime Breaker 1 closing time, ms 0 to 1,000
CB1 AdaptLimit Breaker 1 self adaptive limit, ms 0 to 1,000
CB1 AdaptEnabl Select breaker 1 self adaptive limit Enable, disable
CB1FreqDiff Breaker 1 special window frequency 0 to 10

difference, Hz
CB1PhaseDiff Breaker 1 special window phase 0 to 30
difference, degrees
CB2CloseTime Breaker 2 closing time, ms (as above) 0 to 1,000
J4:IS200TRPGH1A TRPG terminal board, 8 flame detectors Connected, not connected
L3DIAG_VTUR1 Board diagnostic Input BIT

ShShntTst_OK Shaft voltage monitor shunt test OK Input BIT
ShBrshTst_OK Shaft voltage brush test OK Input BIT
CB_Volts_OK L3BKR_VLT circuit breaker coil voltage available Input BIT
CB_K25P_PU L3BKR_PERM sync permissive relay picked up Input BIT
CB_K25_PU L3KBR_GES auto sync relay picked up Input BIT
CB_K25A_PU L3KBR_GEX sync check relay picked up Input BIT
Gen_Sync_LO Generator sync trouble (lockout) Input BIT
L25_Command Input BIT
Kq1_Status Input BIT
: : Input BIT
Kq6_Status Input BIT
FD1_Flame Input BIT
: : Input BIT
FD16_Flame Input BIT
SysLim1PR1 Input BIT
: : Input BIT
SysLim1PR4 Input BIT
SysLim1SHV Ac shaft voltage frequency high L30TSVH Input BIT
SysLim1SHC Ac shaft current high L30TSCH Input BIT
SysLim1GEN Input BIT
SysLim1BUS Input BIT
SysLim2PR1 (same set as for Limit1 above) Input BIT
GenFreq Hz frequency Input FLOAT
BusFreq Hz frequency Input FLOAT
GenVoltsDiff KiloVolts rms-Gen Low is negative Input FLOAT
Gen Freq Diff Slip Hz-Gen Slow is negative Input FLOAT
Gen Phase Diff Phase Degrees-Gen Lag is negative Input FLOAT
CB1CloseTime Breaker #1 close time in milliseconds Input FLOAT
CB2CloseTime Breaker #2 close time in milliseconds Input FLOAT
Accel1 RPM/SEC Input FLOAT
: : Input FLOAT
Accel4 RPM/SEC Input FLOAT
FlmDetPwr1 335 V dc Input FLOAT
ShTestAC L97SHAFT_AC SVM_AC_TEST Output BIT
ShTestDC L97SHAFT_DC SVM_DC_TEST Output BIT
FD1_Level 1 = high detection counts level Output BIT
: : Output BIT
FD16_Level 1 = high detection counts level Output BIT
Sync_Perm_AS L83AS - auto sync permissive Output BIT
Sync_Perm L25P - sequencing sync permissive Output BIT
Sync_Monitor L83S_MTR - monitor mode Output BIT
Sync_Bypass1 L25_BYP-1 = auto aync bypass Output BIT
Sync_Bypass0 L25_BYPZ-0 = auto sync permissive Output BIT
CB2_Selected L43SAUT2 - 2nd breaker selected Output BIT
AS_Win_Sel L43AS_WIN - special window selected Output BIT
Sync_Reset L86MR_SYNC - sync trouble reset Output BIT
Kq1 L20PTR1 - primary trip relay Output BIT
: : Output BIT
Kq6 L20PTR6 - primary trip relay Output BIT

Alarms
go online)
to go online)
30 ConfigCompatCode mismatch; Firmware: [ ]; Tre:[ A tre file has been installed that is incompatible with
] The configuration compatibility code that the the firmware on the I/O board. Either the tre file or
31 IOCompatCode mismatch; Firmware: [ ]; Tre:[ ] The A tre file has been installed that is incompatible with
32-37 Solenoid [ ] Relay Driver Feedback Incorrect. The solenoid relay driver on the TRPG/L/S board has
Solenoid (1-6) relay driver feedback is incorrect as failed, or the cabling between VTUR and TRPG/L/S
compared to the command; VTUR cannot drive the is incorrect.
relay correctly until the hardware failure is corrected
38-43 Solenoid [ ] Contact Feedback Incorrect. Solenoid The solenoid relay driver or the solenoid relay on the
(1-6) relay contact feedback is incorrect as compared TRPG/L/S board has failed, or the cabling between
to the command; VTUR cannot drive the relay VTUR and TRPG/L/S is incorrect.
correctly until the hardware failure is corrected
44-45 TRPG [ ] Solenoid Power Absent. P125/24 V dc Power may not be coming into TRPG/L/S on the J1
power is not present on TRPG terminal board; connector, or the monitoring circuit on TRPG/L/S is
VTUR cannot energize trip solenoids 1 through 3, or bad, or the cabling between TRPG/L/S and VTUR is
4 through 6 until power is present at fault.
46,48 TRPG [ ] Flame Detector Volts Low at Y Volts. TRPG Power comes into TRPG through J3, J4, and J5. If
1 or 2 flame detect voltage is low; the ability to detect the voltage is less than 314.9 V dc, this should be
flame by detectors 1 through 8, or 9 through 16 is investigated. If the voltage is above this value, the
questionable monitoring circuitry on TRPG or the cabling between
TRPG and VTUR is suspect.
47,49 TRPG [ ] Flame Detector Volts High at Y Volts. This power comes into TRPG through J3, J4, and J5.
TRPG 1 or 2 flame detect voltage is high; the ability If the voltage is greater than 355.1 V dc, this should
to detect flame by detectors 1 through 8, or 9 through be investigated. If the voltage is below this value, the
16 is questionable because the excitation voltage is monitoring circuitry on TRPG or the cabling between
too high and the devices may be damaged TRPG and VTUR is suspect.
50 L3BKRGXS Synch Check Relay is Slow. The auto The synch check relay I3BKRGXS, known as K25A,
synchronization algorithm has detected that during on TTUR is suspect; also the cabling between
synchronization with no dead bus closure (synch VTUR and TTUR may be at fault.
bypass was false) the auto synch relay I3BKRGES
closed before synch relay I3BKRGEX closed
51 L3BKRGES Auto Synch Relay is Slow. The auto The Auto synch relay I3BKRGES also known as
synchronization algorithm has detected that the auto K25, on TTUR is suspect; also the cabling between
synch relay I3BKRGES had not closed by two cycle VTUR and TTUR may be at fault.
times after the command I25 was given
52-53 Breaker [ ] Slower than Adjustment Limit Allows. The breaker is experiencing a problem, or
Breaker 1 or 2 close time was measured to be slower the operator should consider changing the
than the auto synch algorithms adaptive close time configuration (both nominal close time and
adjustment limit allows self-adaptive limit in ms can be configured).
54 Synchronization Trouble - K25 Relay Locked Up. K25 on TTUR is most likely stuck closed, or the
The auto synchronization algorithm has determined contacts are welded.
that the auto synch relay I3BKRGES, also known as
K25, is locked up. Auto synch will not be possible
until the relay is replaced
55 Card and Configuration File Incompatibility. You Install the correct TRE file from the factory
are attempting to install a VTUR board that is not
compatible with the VTUR TRE file you have installed
56 Terminal Board on J5X and Config File Check your configuration.
Incompatibility. VTUR detects that the terminal board
that is connected to it through J5 is different than the
board that is configured
57 Terminal Board on J3 and Config File Check your configuration.
58 Terminal Board on J4 and Config File Check your configuration.
59 Terminal Board on J4A and Config File Check your configuration.
that is connected to it through J4A is different than
the board that is configured
60 Terminal Board TTUR and card The TTUR or VTUR must be changed to a compatible
VTUR Incompatibility. VTUR detects that the combination.
TTUR connected to it is an incompatible hardware
revision
61 TRPL or TRPS Solenoid Power Bus "A" Absent Cabling problem or solenoid power source
62 TRPL or TRPS Solenoid Power Bus "B" Absent Cabling problem or solenoid power source
63 TRPL or TRPS Solenoid Power Bus "C" Absent Cabling problem or solenoid power source
64-66 TRPL/S J4 Solenoid [ ] Voltage mismatch. The PTR or ETR relays, or defective feedback circuitry
voltage feedback disagrees with the PTR or ETR
feedback

128- 223 Logic Signal [ ] Voting mismatch. The identified A problem with the input. This could be the device,
or the cable.
224- 251 Input Signal [ ] Voting mismatch, Local [ ], Voted A problem with the input. This could be the device,
[ ]. The specified input signal varies from the voted the wire to the terminal board, the terminal board, or
value of the signal by more than the TMR Diff Limit the cable.
TTURH1B Primary Turbine Protection Input
The Primary Turbine Protection Input (TTURH1B) terminal board works with VTUR
and has the following inputs and outputs:
Twelve passive pulse rate devices sensing a toothed wheel to measure the turbine
speed
Generator voltage and bus voltage signals from potential transformers
125 V dc output to the main breaker coil for automatic generator synchronizing
Inputs from the shaft voltage and current sensors to measure induced shaft voltage
and current
TTUR has three relays, K25, K25P, and K25A, that all have to close to provide 125 V
dc power to close the main breaker, 52G. The speed signal cable to VTUR uses the JR5
connector, and the other signals use the JR1 connector. For TMR systems, signals fan
out to the JR5, JS5, JT5, JR1, JS1, and JT1 connectors.
Mark VI Systems
In the Mark* VI system, the TTUR works with the VTUR processor and supports simplex
and TMR applications. In TMR systems, TTURH1B connects to three VTUR boards.
Note TTURH1B does not support I/O packs, see Mark VIe below.
Mark VIe Systems

For the Mark VIe system, a new design board, the TTURH1C, is used.
Note This document does not describe TTURH1C. For details, refer to GEI-100575
PTUR Turbine Specific Primary Trip.

TTURH1B Terminal Board VTUR VME Board
Breakers
x
Generator volts x 37-pin "D" shell
x
Bus volts x 1 JT1 type connectors
x 2 RUN
Shaft volts x 4
x 3 with latching FAIL
x 6
x 5 fasteners STAT
Shaft current x 7
x 8
x 10
x 9
x 12
x 11
x 14
x 13
x 16
x 15
x 18
x 17 Cables to VME
x 20
x 19 JT5 JS1 rack T
x 22
x 21
x 24
x 23
VME bus to VCMI
x
x
Magnetic x 25 JS5
x 26
speed x 28
x 27 Cables to VME
x 30
x 29 rack S J
pickups (12) x 31
x 32 JR1 5
x 34
x 33
x 36
x 35
x 38
x 37 JR5
x 40
x 39 VTUR
x 42
x 41 x
x 44
x 43
x 46
x 45
x 47 J3
x 48
x
TB3 x
Wiring to
Shield bar TTL speed Connectors on
pickups VME rack R J4
Cables to VME
Barrier type terminal rack R
Cable to TRPG
TTUR Turbine Terminal Board, Processor Board, and Cabling
Installation
Connect the wires for the magnetic pick ups, shaft pick ups, potential transformers, and
breaker relays to the two I/O terminal blocks TB1 and TB2, as shown in the figure, TTUR
Terminal Board Wiring. Each block is held down with two screws and has 24 terminals
accepting up to #12 AWG wires. A shield termination strip attached to chassis ground
is located immediately to the left of each terminal block.
Use jumpers JP1 and JP2 to select either SMX or TMR for relay drivers K25 and K25P.
If used, connect the wires for optional TTL active speed pick ups to TB3; these require
an external power supply.
Simplex systems use cable connectors JR5 and JR1. TMR systems use all six cable
connectors.
Turbine Terminal Board TTURH1B

JP1 JP2
K25P
TB1
x TMR SMX TMR SMX
x 1 52G (H)
52G (L) x 2
x 3 P125GEN K25A
AUTO x 4
BKRH x 6
x 5 MAN
x 7 BKRH
N125GEN x 8
x 9
x 10
x 11
x 12 K25
x 13
x 14
x 15
x 16
x 17 Gen (H)
Gen (L) x 18
Bus (L) x
x 19 Bus (H)
20
ShaftV (L) x 22
x 21 ShaftV (H)
x 23 ShaftC (H)
ShaftC (L) x 24
x
To connectors JR5,
JS5, JT5, JR1, JS1, JT1
TB2
TB3 Screw Connections
x
x 25 MPU 1T (H) TTL1T 01
MPU 1T (L) x 26
x 27 MPU 2T (H) TTL2T 02
MPU 2T (L) x 28
x
MPU 3T (L) x 30
29 MPU 3T (H)
x 31 MPU 4T (H)
MPU 4T (L) x 32
x 33 MPU 1S (H) TTL1S 03
MPU 1S (L) x 34
x 35 MPU 2S (H) TTL2S 04
MPU 2S (L) x 36
x
MPU 3S (L) x 38
37 MPU 3S (H)
x 39 MPU 4S (H)
MPU 4S (L) x 40 01
x 41 MPU 1R (H) TTL1R
MPU 1R (L) x 42 05
x 43 MPU 2R (H) TTL2R 06 J8 x
MPU 2R (L) x 44
x
MPU 3R (L) x 46
45 MPU 3R (H)
x 47 MPU 4R (H)
MPU 4R (L) x 48
x
TB3
TTUR Terminal Board Wiring

Operation
In simplex applications, up to four pulse rate signals can be used to measure turbine
speed. Generator and bus voltages are brought into TTUR for automatic synchronizing
in conjunction with VTUR, the turbine controller, and excitation system. TTUR has
permissive generator synchronizing relays and controls the main breaker relay coil, 52G.
TTURH1B Terminal Board <R> Control Generator Breaker 52G

(input portion) Rack feedback
a
JR1 J3 Turbine
Gen. 17 suppression 02 01
GENH
Board Terminal Board TTURH1B
volts
VTUR (continued)
120 V ac NS
from PT GENL 18 28Vdc
Pulse
Rate J3 JR1 TMR JP1
SMX
MUX K25P
Bus BUSH 19 ID A/D RD Synch. Perm.
volts
120 Vac NS Ac&Dc Mon
20 Shaft
from PT BUSL TMR
test SMX
JP2
To K25
TPRO Trip RD Auto Synch
solenoids
SVH
21 Mon
Flame
NS sensors K25A
175V SVL 22 Synch. check
from VPRO
Shaft J5
23 Mon
SCH J4
14V NS
SCL 24
J8 08 06,7 05 04 03
Connectors
5 (TB3)
Machine case TTL1_R
JR5 at bottom of
B M A
)
41 VME rack
#1 Primary
MPU1RH
Filter K A U
Magnetic NS Clamp Trip R N T
MPU1RL 42 AC
signals O
Speed PU Coupling H
6 (TB3) to
TTL2_R
TRPG P125Gen
)
MPU2RH 43 Filter
#2 Primary
Clamp Note 1: TTL option only
Magnetic
44 NS AC ID
Speed PU MPU2RL
Coupling
available on first two
Speed pickups. 52G
45 Note 2: An external normally
#3 Primary Filter b
Clamp
Magnetic NS AC closed auxiliary breaker
46
Speed PU Coupling
contact must be provided in
Breaker coil
47 the breaker close coil circuit
#4 Primary Filter
Magnetic Clamp as indicated.
48 NS AC N125Gen
Speed PU Coupling Note 3: Signal to K25A
comes from TREG/VPRO
TTUR Control I/O and VTUR Board, Simplex

In TMR applications all inputs fan to the three control racks. Control signals coming into
TTUR from R, S, and T are voted before they actuate permissive relays K25 and K25P.
Relay K25A is controlled by the VPRO and TREG boards.
Note All three relays have two normally open contacts in series with the breaker close
coil.
52G
a
<T> Generator Breaker
<S> Feedback
Terminal Board TTURH1B <R>
(input portion) Turbine Terminal Board TTURH1B 02 01
B52GH
B52GL
Board (continued)
Noise JR1 J3 VTUR
GENH 17 Suppression
J3 JR1
Gen. Volts 28Vdc
NS f( )
120 Vac
GENL 18 JP1 TMR
from PT Pulse
Rate/ SMX
Digital K25P
2 RD Synch.
BUSH 19 MUX
JS1 3 Permissve
Bus Volts J3 JS1
A/D
120 Vac NS JP2 TMR
BUSL 20
from PT AC&DC SMX
shaft K25
To 2
test RD Auto Synch.
TPRO 3
Trip J3 JT1
SVH 21 solenoids
JT1
175V NS Flame K25A
SVL 22
sensors Synch. check
from VPRO
J4
Shaft J5
SCH 23 Mon
14V Connectors
NS at bottom of
SCL 24
VME rack
5 (TB3) J8 08 07 06 05 04 03
Machine Case TTL1R JR5
)
MPU1RH 41
#1 Primary BKRH
MAN
AUTO
Filter
Magnetic
Clamp Trip
NS AC
Speed PU MPU1RL 42 Coupling
Signals to
4 Circuits* TRPG
3 (TB3) P125Gen
TTL1S JS5 Note 1: TTL option only
)
MPU1SH 33 available on first two circuits.

#2 Primary Filter
of each group of 4 pickups*. 52G
Clamp
Magnetic NS AC
b
Speed PU MPU1SL 34 Coupling Note 2: An external normally
4 Circuits*
1 (TB3)
closed auxiliary breaker
Bkr Coil
TTL1T JT5 contact must be provided in
To Rack S
)
MPU1TH 25 the Breaker close coil circuit

#3 Primary Filter
as indicated.
Clamp
Magnetic NS AC N125Gen
26
Speed PU MPU1TL Coupling
Note 3: Signal to K25A
4 Circuits* comes from TREG/VPRO
To Rack T
TTUR Control I/O and VTUR Board, TMR

Specifications
Item Specification
Number of inputs 12 passive speed pickups.
1 shaft voltage and 1 shaft current measurement.
1 generator and 1 bus voltage.
Generator breaker status contact.
Signal to K25A relay.
Number of outputs Generator breaker coil, 5 A at 125 V dc
Power supply voltage Nominal 125 V dc to breaker coil
Shaft voltage monitor Signal is frequency of 5 V dc (0 1 MHz) pulses from 0 to 2,000 Hz
Shaft voltage wiring Up to 300 m (984 ft), with maximum two-way cable resistance of 15
Shaft voltage dc test Applies a 5 V dc source to test integrity of the external turbine circuit and
measures dc current flow.
Shaft voltage ac test Applies a test voltage of 1 kHz to the input of the VTUR shaft voltage circuit
(R module only).
Shaft current input Measures shaft current in amps ac (shunt voltage up to 0.1 V pp)
Generator and bus voltage sensors Two single phase potential transformers, with secondary output supplying
a nominal 115 V rms
Each input has less than 3 VA of loading
Allowable voltage range for synch is 75 to 130 V rms
Each PT input is magnetically isolated with a 1,500 V rms barrier
Cable length can be up to 1,000 ft. of 18 AWG wiring
Generator breaker circuits (synchronizing) External circuits should have a voltage range within 20 to 140 V dc. The
external circuit must include a NC breaker auxiliary contact to interrupt the
current
Circuits are rated for NEMA class E creepage and clearance
250 V dc applications require interposing relays
Contact voltage sensing 20 V dc indicates high and 6 V dc indicates low
Each circuit is optically isolated and filtered for 4 ms
Diagnostics
VTUR makes diagnostic tests on the terminal board and connections as follows:
Feedback from the solenoid relay drivers; if they do not agree with the control signal
a fault is created.
Feedback from the relay contacts; if they do not agree with the control signal a
fault is created.
Loss of solenoid power, which creates a fault.
Slow synch check relay, slow auto synch relay, and locked up K25 relay; all of
these create a fault.
L3DIAG_VTUR occurs. The diagnostic signals can be individually latched and then
Terminal board connectors JR1, JS1, JT1, JR5, JS5, JT5 have their own ID device
that is interrogated by the I/O board. The ID device is a read-only chip coded with
the terminal board serial number, board type, revision number, and plug location.
When the chip is read by VTUR and a mismatch is encountered, a hardware
Configuration
Jumpers JP1 and JP2 select either simplex or TMR for relay drivers K25 and K25P.
There are no switches on the board.

TRPG Turbine Primary Trip
The Gas Turbine Primary Trip (TRPG) terminal board is controlled by the Primary
Turbine Protection controller (VTUR or PTUR). TRPG contains nine magnetic relays in
three voting circuits to interface with three trip solenoids (ETDs). The TRPG works in
conjunction with the TREG to form the primary and emergency sides of the interface to
the ETDs. TRPG also accommodates inputs from eight Geiger-Mueller flame detectors
for gas turbine applications. There are two board types as follows:
The H1A and H1B version for TMR applications has three voting relays per trip
solenoid.
The H2A and H2B version for simplex applications has one relay per trip solenoid.
Mark VI System
In the Mark* VI system, the TRPG works with the VTUR board and supports simplex
and TMR applications. Cables with molded plugs connect TRPG to the VME rack
where the VTUR board is located.
Mark VIe System
In the Mark VIe system, the TRPG is controlled by the PTUR packs on TTURH1C and
supports simplex and TMR applications. The I/O packs plug into the D-type connectors
on TTURH1C, which is cabled to TRPG.
Version Difference
Board TMR Simplex Output contact, Output contact, 28 V Power use

125 V dc, 1 A 24 V dc, 3 A
TRPGH1A* Yes No Yes No Normal
TRPGH2A* No Yes Yes No Normal
TRPGH1B Yes No Yes Yes Normal
TRPGH2B No Yes Yes Yes Normal
TRPGH3B Yes No Yes Yes Special
* H1A and H2A are not used for new applications. TRPGH3B features special handling of 28 V control power and is
otherwise identical to a TRPGH1B. Consult factory for additional details.
ETD power
x DC-37 pin type

x
x 1 JT1 connectors
x 2 J1
x 4
x 3 with latching
Trip solenoids x 5
x 6 fasteners
Power monitoring x 7
x 8
x 10
x 9
x 12
x 11
x 14
x 13
x 16
x 15
x 18
x 17
x 19 JS1
x 22
x 21
x 24
x 23
Cables to TTURH1C
x
for Mark VIe system
x or
x 26
x 25
x 28
x 27
x 29
Cables to VTURboards
x 30 for Mark VI system
Flame sensor x 31
x 32
signals (8) x 33 JR1
x 34
x 36
x 35
x 38
x 37
x 40
x 39
x 42
x 41 J2
x 44
x 43
x 45 J4
x 46 J5
x 48
x 47
x
J3
x
Shield bar
335 V from rack

power supplies
Cable to
R, S, T
TREG
TRPG Terminal Board and Cabling

Installation
Connect the wires for the three trip solenoids directly to the first I/O terminal block.
Connect the wires for the flame detectors (if used) to the second terminal block. Connect
the power for the flame detectors to the J3, J4, and J5 plug.
Connect the 125 V dc power for the trip solenoids to the J1 plug. Transfer power to the
TREG board using the J2 plug.
Turbine Primary Trip Terminal Board TRPG

125 V dc
J1
JT1
x
x 1 125 Vdc (P)
Trip Solenoid 1 or 4 x 2
4
x 3 125 Vdc (P)
Trip Solenoid 2 or 5 x
6
x 5 125 Vdc (P)
Trip Solenoid 3 or 6 x
x 7
x 8
125 Vdc (N) x 10
x 9 125 Vdc (N)
x 12
x 14
x 13 JS1
x 16
x 15 Cables to TTURH1C
x 18
x 19
x 20
x 21 or
x 22
x 23
x 24
Cables to control rack VTUR boards
x
for Mark VI system
JR1
x
x 25
x 26
x 27
x 28
x 30
x 29 J2
x 31
x 32
Flame 1 (L) x 33 Flame 1 (H)
x 34
Flame 2 (L) x 36
x 35 Flame 2 (H) Cable to TREG
x 37 Flame 3 (H)
Flame 3 (L) x 38
x 39 Flame 4 (H)
Flame 4 (L) x 40
335 V dc
Flame 5 (L) x 42
x 41 Flame 5 (H) J4
Flame 6 (L)
x 43 Flame 6 (H)
x 44 335 V dc
x 45 Flame 7 (H) J5
Flame 7 (L) x 46
x 47 Flame 8 (H) 335 V dc
Flame 8 (L) x 48 J3
x

TRPG Terminal Board Wiring
Operation
The I/O pack/board provides the primary trip function by controlling the relays on
TRPG, which trip the main protection solenoids. In TMR applications, the three inputs
are voted in hardware using a relay ladder logic two-out-of-three voting circuit. The I/O
pack/board monitors the current flow in its relay driver control line to determine its
energize or de-energize vote/status of the relay coil contact status. Supply voltages are
monitored for diagnostic purposes. A normally closed contact from each relay on TRPG
is monitored by the diagnostics to determine its proper operation.
PDM 125 V dc + - Monitoring outputs

Terminal Board TRPG J1 01 03 05 09 10
H1A (TMR), H2A (Simplex) P125 Terminal
Trip Board TREG
JR1 N125 Solenoid
From R "PTR 1/4"
RD KR1 KR1 KS1 1 or 4 KE1
02 - + 01
RD KR2 KS1 KT1

ID J2 J2
RD KR3 Mon
KT1 KR1 04
28 Vdc
Optional 03
Mon economizing Trip
"PTR 2/5" resistor Solenoid
KR1,2,3
KR2 KS2 04 2 or 5 05 KE2
- +
These relays in TMR systems
From S JS1 KS2 KT2 J2 J2
RD KS1
Mon
KT2 KR2 08
RD KS2
ID 07
RD KS3
Trip
28 Vdc "PTR 3/6" Solenoid
KR3 KS3 3 or 6 KE3
Mon 06 - + 09
KS1 ,2,3 KS3 KT3 J2 J2

JT1 Mon
From T
RD KT1 KT3 KR3 12
11
RD KT2
ID To JR1, 02
RD KT3 JS1, JT1 06
Solenoid
28 Vdc Power Monitor 10
Mon J2 J2
N125 Vdc -
KT1,2,3 +
8 signals to 3 monitor
JR1 ,JS1,JT1 signals to J3
JR1,JS1,JT1 Voltage Supply
and Monitor 335 V dc from R
FLAME1H 33 NS 335 V dc Voltage Supply
J4
34 and Monitor 335 V dc from S
NS J5
FLAME1L Voltage Supply
Supply 8 and Monitor 335 V dc from T
Eight flame detectors
detector circuits
TRPG and Connections to Controller and Trip Solenoids
Note A metal oxide varister (MOV) and a current limiting resistor are used in each
ETD circuit

The primary overspeed trip comes from the controller and is passed to the I/O
pack/board, and then to TRPG. TRPG works in conjunction with the TREG board, which
is controlled by the emergency overspeed system. This TRPG/TREG combination can
drive three ETDs.
Flame Detectors
The primary protection system monitors signals from eight Geiger-Mueller flame
detectors. With no flame present, the detector charges up to the supply voltage. The
presence of flame causes the detector to charge to a level and then discharge through
TRPG. As the flame intensity increases, the discharge frequency increases. When the
detector discharges, the I/O pack/board and TRPG convert the discharged energy into a
voltage pulse. The pulse rate varies from 0 to 1,000 pulses/sec. These voltage pulses are
fanned out to all three modules. Voltage pulses above 2.5 volts generate a logic high, and
the pulse rate over a 40 ms time period is measured in a counter.
Specifications
Item Specification
Trip solenoids 3 solenoids per TRPG
Solenoid rated voltage/current 125 V dc standard with up to 1 A draw
24 V dc is alternate with up to 1 A draw (H1B, H2B, H3B)
Solenoid response time L/R time constant is 0.1 sec
Current suppression MOV on TREG
Current economizer Terminals for optional 10 , 70 W economizing resistor on TREG
Control relay coil voltage supply Relays are supplied with 28 V dc from JR1, JS1, and JT1
Flame detectors 8 detectors per TRPG
Flame detector supply voltage/current 335 V dc with 0.5 mA per detector
Diagnostics
The I/O board runs the TRPG diagnostics. These include feedback from the trip solenoid
relay driver and contact, solenoid power bus, and the flame detector excitation voltage
too low or too high. A diagnostic alarm is created if any one of the signals go unhealthy
(beyond limits). Connectors JR1, JS1, and JT1 on the terminal board have their own ID
device, which is interrogated by the I/O board, and if a mismatch is encountered, a
hardware incompatibility fault is created. The ID device is a read-only chip coded with
the terminal board serial number, board type, revision number, and the plug location.
Configuration
TRPL Turbine Primary Trip
The Large Steam Turbine Primary Trip (TRPL) terminal board is used for the primary
overspeed protection of large steam turbines. TRPL is controlled by the turbine Primary
Turbine Protection controller (VTUR or PTUR), and contains nine magnetic relays
in three voting circuits to interface with three trip solenoids (ETDs). TRPL works in
conjunction with the TREL terminal board to form the primary and emergency sides of
the interface to the ETDs. These two terminal boards are used in a similar way as TRPG
and TREG are used on gas turbine applications.
Up to three trip solenoids can be connected between the TREL and TRPL terminal boards.
TREL provides the positive side of the 125 V dc to the solenoids and TRPL provides the
negative side. In addition, two manual emergency stop functions can be connected.
Mark VI Systems
In the Mark* VI system, the TRPL works with the VTUR board and only supports
TMR systems applications. Cables with molded plugs connect TRPL to the VME rack
where the VTUR board is located.
Mark VIe Systems
In the Mark VIe system, the TRPL is controlled by the PTUR I/O packs on TTURH1C
and only supports TMR applications. The I/O packs plug into the D-type connectors
on TTURH1C, which is cabled to TRPL.

Installation
Connect the wires for the three trip solenoids directly to the first I/O terminal block.
Connect the wires for the primary emergency stop and optional secondary emergency
stop to the second terminal block. Connect the trip solenoid power to plugs JP1, JP2, and
JP3. The wiring connections are shown in the following figure.
Install a jumper across terminals 9 and 11 for the PTR3 trip. If a second emergency stop
is required, remove the jumper from terminals 46 and 47 and connect the wires here.
TRPL Primary Trip Terminal Board JT1

(Large Steam Turbine) 125/24 V dc, bus A JP1
125/24 V dc, bus B JP2

x
x 1
Trip solenoid 1 or 4 x 2
x 3 PwrA_P 125/24 V dc, bus C JP3
PwrA_P x 4
x 5
PwrB_P x 8
x 7 PwrB_P
x 9
x 11
x 12
x 13 JS1
x 15
x 16
x 17
PwrC_P x 18 Cables to TTURH1C
x 19 PwrC_P
x 21
PwrA_N x 22
PwrC_N x 24
x 23 PwrB_N
or
x
Cables to VTUR boards

for Mark VI system
x
x 25 JR1
x 26
x 27
x 28
x 29
x 30
x 31
x 32
x 33
x 34
x 35
x 36
x 37
x 38
x 39 NC1 Misc. tie points, J2
NC2 x 40
x 41 NC3 no internal
NC4 x 42
connection
Primary E- x 43 TRP1
TRP2 x 44
Stop x 45 TRP4 Primary E-Stop Cable to TREL
TRP3 x 46
x 47 TRP5
To second TRP6 x 48
TRPL x
Up to two #12 AWG wires To add secondary E-Stop, Terminal blocks can be
per point with 300 volt remove jumper across unplugged from board for
insulation terminals 46 and 47 maintenance
TRPL Terminal Board Wiring
Operation
TRPL is used for TMR applications only. Three separate power buses, PwrA, PwrB, and
PwrC for solenoid power, are brought in through connectors JP1, JP2, and JP3, and then
distributed to TREL through connector J2.
The power buses have a nominal voltage of 125 V dc (70 to 145 V dc) or 24 V dc (18
to 32 V dc). The board includes power bus monitoring (three buses). The maximum
current per bus is 3 A.
Each of the three trip solenoids is controlled by three relays using 2/3 contact voting. The
relay output rating (for 100,000 operations) is as follows:
At 24 V dc, 3 A, L/R = 100 ms, with suppression
At 125 V dc, 1.0 A, L/R = 100 ms, with suppression
The trip circuits include solenoid suppression, associated solenoid voltage monitoring,
and trip relay contact monitoring. In the TRPL, the hardwired trip (E-STOP) and
associated monitoring provides approximately 6.6 V dc to the I/O board when the K4
relays are picked up.

125/24 Vdc bus C
125/24 Vdc bus B J2, power
buses to
125/24 Vdc bus A
TREL
JP1 JP2 JP3

Terminal Board TRPL
PwrA_P PwrB_P PwrC_P Terminal
Board TREL
P28R1 to PwrB_N PwrC_N Trip
JR1 PwrA_N
monitor solenoid
R J4
RD KR1 KS1 #1 or 4
KR1 SOL1 02 02 ETR1
- +
PTR 1
RD KR2 KS1 KT1
J2 J2
RD KR3
KT1 KR1 01
ID P28 VR
03
Solenoid volts monitor
Mon K4R Trip
to JR1,JS1,JT1 04
PwrA_N
PwrA_P solenoid
KR1,2,3
PTR 2 KR2 KS2 #2 or 5
SOL2 06 - + 05 ETR2
JS1 P28S1 to
monitor KS2 KT2
S J4 J2 J2
RD KS1
KT2 KR2 05
RD KS2
07
Solenoid volts monitor
RD KS3 to JR1,JS1,JT1 08
ID
PwrB_N Trip
PwrB_P
P28 VS solenoid
#3 or 6
Mon K4S 10 08 ETR3
- +
PwrC_N J2
KS1,2,3 J2
P28T1 to
JT1 Solenoid volts monitor
T J4 monitor
to JR1,JS1,JT1 9
RD KT1
"PTR 3" KR3 KS3
11
RD KT2
KS3 KT3
RD KT3
ID
P28 VT KT3 KR3
39
Miscellaneous tie Mon K4T
40 PwrC_P PwrC_P 18
points; no internal
41
connections KT1,2,3 19
42 To JR1,
JS1, JT1 Sol PwrA_P
TRP1 43 Pwr PwrB_P
Primary E-Stop TRP2 44 Monitor PwrC_P
CL P28VV
TRP4 45 PwrA_N 22
K4R
PwrB_N 23
Jumper TRP3 46 K4S PwrC_N 24
TRP5 47 K4T
JR1
Secondary E-Stop when JS1
applicable, remove jumper To To relay JT1
48 P28R1 JR1 K25A on
to enable function. Mon
P28S1 JS1 TTUR driven
TRP6 (3) from TREL
P28T1 JT1
J2
TRPL Terminal Board
Specifications
Item Specification
Trip solenoids 3 solenoids per TRPx
24 V dc is alternate with up to 3 A draw
Solenoid response time L/R time constant is 0.1 sec with suppression
Current suppression MOVs
Primary Emergency Stop, manual One with optional secondary E-stop
Diagnostics
The I/O controller runs the TRPx diagnostics. These include feedback from the trip
solenoid relay driver and contact, solenoid voltage, and solenoid power bus. A diagnostic
alarm is created if any one of the signals goes unhealthy (beyond limits).
The Jx1 connectors on the terminal board have their own ID device, which is interrogated
by the I/O board, and if a mismatch is encountered, a hardware incompatibility fault
is created.
Note The ID device is a read-only chip coded with the terminal board serial number,
board type, revision number, and the plug location.
Configuration
There are no switches or hardware settings on the terminal board. Terminals 9 and 11
must use a jumper to include the PTR 3 trip. Terminals 46 and 47 must use a jumper if
only one manual emergency stop is required.

TRPS Turbine Primary Trip
The Small Steam Turbine Primary Trip (TRPS) terminal board is used for the primary
overspeed protection of small and medium size steam turbines. TRPS is controlled by the
Primary Turbine Protection controller (VTUR or PTUR), and contains three magnetic
relays to interface with three trip solenoids (ETDs). TRPS works in conjunction with the
TRES terminal board to form the primary and emergency sides of the interface to the
ETDs. These two terminal boards are used in a similar way as TRPG and TREG are used
on gas turbine applications, except with the following differences:
Two-out-of-three voting is done in the relay drivers and not using relay contacts as
with TRPG and TRPL.
In a simplex application, the voting is bypassed and the relay drivers are controlled
by a single signal from JA1.
There are no economizing relays.
There are no flame detector inputs.
Up to three trip solenoids can be connected between the TRES and TRPS terminal boards.
TRES provides the positive side of the 125 V dc to the solenoids and TRPS provides the
negative side. In addition, two manual emergency stop functions can be connected.
Mark VI Systems
In the Mark* VI system, the TRPS works with the VTUR board and supports simplex
and TMR applications. Cables with molded plugs connect TRPS to the VME rack where
the VTUR board is located.
Mark VIe Systems
In the Mark VIe system, TRPS is controlled by the PTUR I/O packs on TTURH1C and
supports simplex and TMR applications. The I/O packs plug into the D-type connectors
on TTURH1C, which is cabled to TRPS.
Installation
Connect the wires for the three trip solenoids to the first I/O terminal block. Connect
the wires for the primary emergency stop and optional secondary emergency stop to the
second terminal block. Connect the trip solenoid power to plugs JP1, JP2, and JP3. If a
second emergency stop is required, remove the jumper from terminals 46 and 47, and
connect the wires here. The wiring connections are shown in the following figure.
Primary Trip Terminal Board TRPS JP1 JT1

(Small/Medium Steam Turbine) 125/24 V dc, bus A
JP2
125/24 V dc, bus B
x
x 1 PwrA_P1 JP3
PwrA_P2 x 2
x 3 PwrA_P3 125/24 V dc, bus C
SUS1A x 4
x 6
x 5 SUS1B
SUS1C x 7 SUS1D
SOL1A x 8
x 10
x 9 SOL1B PTR1
PwrB_P2 x 12
x 11 PwrB_P1
x 14
x 13 PwrB_P3 JS1
SUS2A
x 16
x 15 SUS2B J - Port Connections:
SUS2C
18
x 17 SUS2D
SOL2A x
PTR2
x 20
x 19 SOL2B Cables to TTURH1C
PwrC_P2 x 22
x 21 PwrC_P1 for Mark VIe system
x 23 PwrC_P3
SUS3A x 24
x
or
PTR3
Cables to VTUR boards
for Mark VI system
x
x 25 SUS3B K4_3
SUS3C x 26 JA1 JR1
x 27 SUS3D
SOL3A x 28
x 29 SOL3B
x 30 K4_1
x 31
x 32
x 33
x 34
x 35 K4_2
PwrA_N x 36
PwrC_N x 38
x 37 PwrB_N
NC2 x 40
x 39 NC1 J2
x 41 NC3
NC4 x 42
Primary E- x 43 TRP1
TRP2 x 44
Stop x 45 TRP4 Primary
TRP3 x 46
TRP6 x 48
x 47 TRP5 E-Stop Cable to TRES
x
Jumper

TRPS Terminal Board Wiring

Operation
TRPS is used for TMR and simplex applications. Three separate power buses, PwrA,
PwrB, and PwrC for solenoid power, are brought in through connectors JP1, JP2, and
JP3, and then distributed to TRES through connector J2.
The power buses have a nominal voltage of 125 V dc (70 to 145 V dc) or 24 V dc (18
to 32 V dc). The board includes power bus monitoring (three buses). The maximum
current per bus is 3 A.
Each of the three trip solenoids is controlled by a relay driver. The relay output rating
(for 100,000 operations) is as follows:
At 24 V dc, 3 A, L/R = 100 ms, with suppression
At 125 V dc, 1.0 A, L/R = 100 ms, with suppression
The trip circuits include solenoid suppression, associated solenoid voltage monitoring,
and trip relay contact monitoring. In the TRPS, the hardwired trip (E-Stop) and
associated monitoring provides approximately 6.6 V dc to the I/O board when the K4
relays are picked up.
125/24 V dc bus C
J2, power
125/24 V dc bus B
125/24 V dc bus A buses to
TRES
Terminal Board TRPS JP1 JP2 JP3
Simplex JA1
system P28A PwrB_P PwrC_P Terminal
PwrA_P
uses Board TRES
P28R PwrA_N PwrB_N PwrC_N
JA1
K4_1
P28S PwrA_P1 01
P28 PwrA_P2 02
P28T PwrA_P
PwrA_P3 03
ID
SUS1A 04
JR1 J2
Solenoid volts
J2
monitor to JR1, SOL1A
R 2 RD PTR1 JS1, JT1, JA1
3 SUS1B 05
SUS1C 06
PwrA_N Trip
To R,S,T, A SUS1D 07
Mon solenoid
PTR1 08 -
PTR1 SOL1A +
PTR1 SOL1B 09
ID
K4_2 36 Several terminal
P28 positions for
JS1 different
PwrB_P1 11 applications
S 2 RD PTR2 PwrB_P2 12
3 PwrB_P
PwrB_P3 13
To R,S,T, A SUS2A 14
Mon Solenoid volts J2
SOL2A J2
PTR2 monitor to JR1,
JS1, JT1, JA1
ID SUS2B 15
K4_3 SUS2C 16
PwrB_N Trip
P28 SUS2D 17 solenoid
PTR2
JT1 SOL2A 18 - +
PTR2 SOL2B 19
2 RD PTR3 37
T
3
To R,S,T, A PwrC_P1 21
Mon
PwrC_P2 22
PTR3 PwrC_P
PwrC_P3 23
NC1 39 ID
Misc. tie points, To JR1, SUS3A 24
NC2 40 JS1,JT1, Solenoid volts J2
no internal PwrA_P SOL3A J2
NC3 41 JA1 Sol. monitor to JR1,
connections Power PwrB_P JS1, JT1, JA1
NC4 42 Monitor SUS3B 25
PwrC_P
TRP1 43 SUS3C 26
PwrC_N Trip
Primary E-Stop SUS3D 27
TRP2 44 solenoid
CL P28VV PTR3
SOL3A 28 - +
TRP4 45 K4_1 PTR3 SOL3B 29
Jumper
TRP3 46 K4_2 38
TRP5 47 K4_3
Secondary E-Stop when JA1
AND J2 To relay K25A on
applicable, remove jumper JR1 To R,S,T,A
48 Monitor TTUR driven from
to enable function. JS1
(3) TRES
TRP6 JT1
TRPS Terminal Board

Specifications
Item Specification
Trip solenoids 3 solenoids per TRPx
24 V dc is alternate with up to 3 A draw
Solenoid response time L/R time constant is 0.1 sec with suppression
Current suppression MOVs
Primary Emergency Stop, manual One with optional secondary E-stop
Diagnostics
The ID device is a read-only The I/O controller runs the TRPx diagnostics. These include feedback from the trip
chip coded with the terminal solenoid relay driver and contact, solenoid voltage, and solenoid power bus. A diagnostic
board serial number, board alarm is created if any one of the signals goes unhealthy (beyond limits).
type, revision number, and the
The Jx1 connectors on the terminal board have their own ID device, which is interrogated
plug location.
by the I/O board, and if a mismatch is encountered, a hardware incompatibility fault
is created.
Configuration
There are no switches or hardware settings on the terminal board. Terminals 46 and 47
must use a jumper if only one manual emergency stop is required; remove jumper if
secondary E-Stop is used.
TTSA Trip Servo Interface
The Trip Servo Interface (TTSA) terminal board provides four sets of power resistors in
a configuration to support bipolar currents in two-coil trip servos. All connections to the
board are made through pluggable barrier terminal strips. The board is the functional
equivalent of the 194B5725 Servo Module in a smaller physical design. Power ratings
are adequate to withstand a high DC line of 145 V dc and zero coil impedance.
Mark VI and Mark VIe Systems
The TTSA function is independent of the control in use and is compatible with Mark V,
Mark VI, and Mark VIe.
Servo Interface Terminal Board

Installation
Connect the wires for up to four trip servos to the terminal blocks to provide bipolar coil
current, as shown in the following figure. Connect the barrier terminal strips to the
appropriate tripping board and servo coils.
TTSAG1A
External Dual
2 TS1-YEL 20 Coil Servo
TS-NEG
5k
TS1-POS
3 TS1-RED 21
2.2k
Trip
Run
TS1-WHT 22
5k
TS1-NEG
4 TS1-GRN 23
2.2k
External Dual
TS2-YEL 28 Coil Servo
5k
TS2-POS
5 29
TS2-RED
2.2k
Trip
Run
TS2-WHT 30
5k
TS2-NEG
6 TS2-GRN 31
2.2k
External Dual
5k
TS3-POS
7 37
TS3-RED
2.2k
Trip
Run
TS3-WHT 38
5k
TS3-NEG
8 TS3-GRN 39
2.2k
External Dual
5k
TS4-POS
9 45
TS4-RED
2.2k Trip
Run
11 TS-POS TS4-WHT 46
5k
TS4-NEG
10 TS4-GRN 47
2.2k
Mark VI Trip Servo Interface Board, TTSA
Operation
Fixed 125 V nominal dc power is applied to terminals 11 (positive) and 02 (negative).
With no other power, a trip current is applied to the external solenoid coil pair with
magnitude equal to V dc / (10k + parallel solenoid impedance). If a 1 servo coil is
used and V dc is 125 V, the current in each coil equals * 125 / (10,000 + 500) = 5.95
mA.
When running current is desired in the servo coils, positive dc is applied to the
TS#-POS terminal and negative dc is applied to the TS#-NEG terminal. This causes a
reverse current in the coil with magnitude equal to [ V dc / (4.4k + parallel solenoid
impedance)] trip current. For the previous example, this equals [ * 125 / (4,400 +
500)] 5.95 mA = 6.8 mA.
Specifications
Item Specification
Maximum applied V dc 145 V
Resistor tolerance 5%
Minimum servo coil impedance 0
Diagnostics
No diagnostic features are provided on this module.
Configuration

DTUR Simplex Pulse Rate Input
The Simplex Pulse Rate Input (DTUR) terminal board is a compact pulse-rate terminal
board designed for DIN-rail mounting. The board accepts four passive pulse-rate
transducers (magnetic pickups) for speed and flow measurement. It connects to the
VTUR processor board with a 37-pin cable and a 15-pin cable. These cables are identical
to those used on the larger TTUR terminal board. VTUR only accommodates one
DTUR board.
Note DTUR does not work with the Mark VIe system.
Note Only the simplex version is available.
Installation
Mount the plastic holder on the DIN-rail and slide the DTUR board into place. DTUR
boards can be stacked vertically on the DIN-rail to conserve cabinet space. Connect the
wires for the magnetic pickups directly to the terminal block, which has 36 terminals.
Typically #18 AWG shielded twisted pair wiring is used. Two screws, 35 and 36, are
provided for the SCOM (ground) connection, which should be as short a distance as
possible. Connect DTUR to VTUR using the JR1 and JR5 connectors.
Note Only the JR5 cable carries signals to VTUR.
MPU means
magnetic pick up
JR5 DTUR
1 MPU 1 (High)
MPU 1 (Low) 2
3 MPU 2 (High)
MPU 2 (Low) 4
5 MPU 3 (High)
MPU 3 (Low) 6
7 MPU 4 (High)
MPU 4 (Low) 8
Cable to J5 on 9
10
front of VTUR 11
12
board 13
14
15
JR1 16
17
18
19
20
37-pin "D" shell 21
22
connector with 23
24
latching fasteners 25
26
27
28
29
30
31
32
33
34
35 Chassis ground
Chassis ground 36
Cable to J3
connector in I/O
rack for VTUR SCOM
board Euro-Block type
terminal block
Plastic mounting
holder
DIN-rail mounting
DTUR Wiring and Cabling

Operation
DTUR accepts four magnetic pulse rate sensors and has onboard signal conditioning
identical to that on the TTUR. The pulse frequency circuits are in the VTUR. DTUR
does not accept generator and bus voltage signals, or shaft current and voltage signals,
as with TTUR. Two on-board ID chips identify the connectors and terminal board to
VTUR for system diagnostic purposes.
<R> Control Rack
VTUR
DTUR Board
Noise JR5
suppresion f( )
MPU1H 1
Filter Pr/D
#1 Magnetic SCOM
Clamp
Speed Pickup
NS MUX
MPU1L 2 Ac
A/D
Coupling
ID J5
MPU2H 3
Filter
#2 Magnetic SCOM
Clamp
Speed Pickup
NS
MPU2L 4 Ac
Coupling
MPU3H 5
Filter
#3 Magnetic SCOM Clamp
Speed Pickup NS Ac
MPU3L 6
Coupling
MPU4H 7 Filter JR1 J3 J4

#4 Magnetic SCOM Clamp
Speed Pickup NS Ac
MPU4L 8
Coupling
Connectors
Unused VTUR at bottom of
circuits grounded VME rack
ID
DTUR Board Circuits

Specifications
Item Specification
Number of inputs 4 passive speed pickups. TRPG
Size 16.2 cm high x 8.6 cm wide (6.37 in. x 3.4 in.) with support holder
Diagnostics
Terminal board connectors JR1 and JR5 have their own ID device that is interrogated by
VTUR. The ID device is a read-only chip coded with the terminal board serial number,
board type, revision number, and plug location. When the chip is read by VTUR and a
Configuration

DTRT Simplex Primary Trip Relay Interface
The Simplex Primary Trip Relay Interface (DTRT) terminal board is a DIN-rail mounted
trip transition board that connects the VTUR with the DRLY board. DTRT allows three
trip functions on the VTUR to interface with DRLY, instead of with the TRPG, TRPL,
or TRPS board. Two VTUR boards can connect to the DTRT to control a total of six
relays on DRLY.
Note Only the simplex version of this board is available.
Installation
Note DTRT does not have a shield terminal strip.
Mount the plastic holder on the DIN-rail and slide the DTRT board into place. The three
cables connecting VTUR and DRLY plug into the DC-37 connectors. Connect DTRT to
the first VTUR using the J1 connector. Connect DTRT to the second VTUR using the J2
connector. Connect DTRT to DRLY using the J3 connector. Three screws are provided on
TB1 for the SCOM (ground) connection, which should be as short a distance as possible.
DTRT
TB1
1 Chassis Ground
2 Chassis Ground
3 Chassis Ground
J1 J2 J3
SCOM
DIN-rail Plastic mounting holder

mounting
Cable from first VTUR

To DRLY board
(Six relay circuits)
Cable from second VTUR
DTRT Wiring

Operation
DTRT must be used in applications where a trip is required that is faster than VTUR, the
controller, and TRPG can provide. DTRT cannot be eliminated if the application requires
only one VTUR. A high density Euro-Block type terminal block is permanently mounted
to the board with three screw connections for the ground connection (SCOM). The first
three DRLY circuits are driven by the first VTUR and the second three DRLY circuits are
driven by the second VTUR, as shown in the following figure.
DTRT transfers board identification from the ID chip on DRLY to VTUR for diagnostic
purposes. DTRT has its own ID chip connected to J2.
DTRT Terminal Board
J1
J3 J4
Three relay circuits
To DRLY board Primary Trip

Controller
J2
(Six relay circuits )
Three relay circuits
ID
chip
DTRT Terminal Board

Specifications
Item Specification
Number of Inputs Two DC-37 pin connectors for cables from VTUR, J4. 3 trip relays per cable
Number of Outputs One DC-37 pin connector for cable to DRLY. Total of 6 trip relays
Diagnostics
Diagnostic tests are made on components on the terminal board as follows:
number, board type, revision number, and the J connector location. When the chip is
read by the I/O processor and a mismatch is encountered, a hardware incompatibility
fault is created.
DTRT also transfers ID information from DRLY to VTUR through J1.
Configuration
DRLY Simplex Relay Output
DRLY does not work with the The Simplex Relay Output (DRLY) terminal board is a compact relay output terminal
PDOA I/O Pack. board designed for wall mounting (not DIN-rail mounting). The board has 12 form-C dry
contact output relays and connects to the VCCC, VCRC, or VTUR processor board with
a single cable. The 37-pin cable connector is identical to those used on the larger TRLY
terminal board. Two DRLY boards can be connected to VCCC, VCRC, or VTUR for a
total of 24 contact outputs. Only a simplex version of this board is available.
There are two versions of the DRLY terminal board:
H1A has higher powered relay contacts than H1B.
H1B is suitable for use in UL listing for Class I, Division 2 Hazardous (classified)
locations.
Installation
DLRY does not have a shield Mount the DRLY board by fastening screws to wall through the four mounting holes in
terminal strip. the corners of metal support plate. Connect the wires for the 12 relay outputs directly to
the odd-numbered screws on the terminal blocks.
SCOM, TB2, must be connected The high-density Euro-Block type terminal blocks plug into the numbered receptacles
to chassis ground. on the board. The two screws on TB2 are provided for the SCOM (chassis ground)

TB2 1 2 P28 OK LED

Output 1 (NC) 1 TB1 SCOM 37 Output 7 (NC)
2 38
4 40
6 K1 42
8 44
K8
10 46
12 K2 48
14 50
Output 3 (COM) 15 K9 Output 9 (COM)
51
16 52
18 K3
54
20 56
22 58
24 K4
60
26 K11 62
28 64
30 66
32 K12 68
34 70
36 72
JR1
LED relay Mounting

state indicator holes
Cable from J3 or J4
on I/O rack, from
I/O processor 37-pin "D" shell
board connector
DRLY Wiring and Cabling
Operation
Three relays on DRLY can be DRLY does not include solenoid source power. There is one set of dry contacts per relay,
controlled by VTUR using the with two NO contacts in series. Unlike TRLY, there is no on-board suppression, and no
DTRT transition board. Six relay state monitoring. The I/O board (VCCC, VCRC, or VTUR) provides the 28 V dc
relays can be controlled if two power for the relay coils, which is indicated with a green LED. DRLY has a yellow LED
DTURs are used. for each relay that indicates voltage across the coil. With an unconnected control cable,
the relays default to a de-energized state.
DRLY Board
JR1
P28V TB1
From J3 or J4
on I/O rack, 1 NC
from I/O P28 OK LED COIL
processor Output 1
3 COM of 12 dry
board Relay contact
Driver outputs
5 NO
RD
TB2 1
2
SCOM
DRLY Board Circuits

DRLYH1A Specifications
Item Specification
Number of relay 12 relays, nominal 24 V dc coil. Two-pole double throw with Form C contacts containing two
outputs and type NO and 2 NC contacts
Relay contact rating Resistive: Inductive:
28 V dc: 10 A 28 V dc: 2 A, L/R = 7 ms, without suppression
120 V ac: 10 A 120 V ac: 2 A, PF= 0.4, 10 A inrush, no suppression, Motor load 1/3 Hp.
240 V ac: 3 A 240 V ac: 2 A, PF= 0.4, 10 A inrush, no suppression, Motor load Hp.
125 V dc: 0.5 A 125 V dc: 0.2 A, L/R = 7 ms without suppression
125 V dc: 0.65 A, L/R = 150 ms, MOV suppression by others (with two
contacts in series on the same relay)
Fault detection in I/O The state of the P28 V dc is monitored using a green LED at the top of the board. Voltage across
board each relay coil is indicated with a yellow LED. There is no relay state monitoring in the VCCC
or VCRC
Physical
Size 21.59 cm long x 20.57 cm wide (8.5 in x 8.1 in wide)

DRLYH1B Specifications
Item Specification
Number of relay outputs 12 relays, nominal 24 V dc coil
Relay type Two-pole double throw with Form C contacts containing two NO and 2 NC contacts. UL listed,
CSA certified, sealed to UL 1604
Relay contact rating 28 V dc: 2 A Max operating voltage: 250 V rms, 220 V dc
(resistive load)
125 V dc: 0.5 A Max operating current: 2 A dc, 1 A rms
120 V ac: 1 A Max switching capacity: 125 VA, 60 W
240 V ac: 0.5 A
Fault detection in I/O The state of the P28 V dc is monitored using a green LED at the top of the board
board Voltage across each relay coil is indicated with a yellow LED
There is no relay state monitoring in the I/O board
Agency requirements UL listed Class I, Division. 2 applications, CSA, and CE, also approvals listed in table above for
TRLYH1A
Physical
Size 21.59 cm long x 20.57 cm wide, (8.5 in x 8.1 in)
Diagnostics
The board contains the following diagnostics; there is no relay state monitoring.
The terminal board connector has an ID device that is interrogated by the I/O board.
The connector ID is coded into a read-only chip containing the board serial number,
board type, and revision number. When this chip is read by VCCC/VCRC or VTUR
The voltage across each relay coil is indicated with a yellow LED.
The 28 V supply to the board is indicated with a green LED.
Configuration
Vibration Monitor Board (VVIB)
VVIB Vibration Monitor
The Vibration Monitor (VVIB) board processes vibration probe signals from the TVIB
or DVIB terminal board. Up to 14 probes connect directly to the terminal board. Two
TVIB can be cabled to the VVIB processor board. VVIB digitizes the various vibration
signals, and sends them over the VME bus to the controller. The Mark* VI system uses
Bently Nevada* probes for shaft vibration monitoring. The following vibration probes
are compatible:
Proximity
Velocity
Acceleration
Seismic
Phase
Note If desired, a Bently Nevada 3500 monitoring system can be connected to the
terminal board.
Vibration probes are normally used for four protective functions in turbine applications
as follows:
Vibration Proximity probes monitor the peak-to-peak radial displacement of the shaft
(the shaft motion in the journal bearing) in two radial directions. This system uses
non-contacting probes and Proximitors, and detects alarms, trips, and faults.
Rotor Axial Position A probe is mounted in a bracket assembly off the thrust
bearing casing to observe the motion of the thrust collar on the turbine rotor. This
system uses non-contacting probes and Proximitors, and detects thrust bearing wear
alarms, trips, and faults.
Differential Expansion This application uses non-contacting probe(s) and
Proximitor(s) and detects alarms, trips, and faults for excessive expansion differential
between the rotor and the turbine casing.
Rotor Eccentricity A probe is mounted adjacent to the shaft to continuously sense
the surface and update the turbine control. The calculation of eccentricity is made
once per revolution while the turbine is on turning gear. Alarm and fault indications
are provided.
There are two types of TVIB terminal boards, H1A and H2A. The H2A type board has
BNC connectors allowing portable vibration data gathering equipment to be plugged in
for predictive maintenance purposes. Both types have connectors so that Bently Nevada
vibration monitoring equipment can be permanently cabled to the terminal board to
measure and analyze turbine vibration.
18-1 Vibration Monitor Board (VVIB) GEH-6421Q Mark* VI Control

TVIB Terminal Board VVIB VME Board
x
x
x 37-pin "D" shell
x 1 ...JA1
... JT1 type connectors
x 2 ...
. RUN
x 4 x 3 ... with latching FAIL
...
6
x 5 . STAT
x
x 7
...
... fasteners
Vibration x 8 .
...
x 10
x 9 ...
.
signals x 11 ...
x 12 . JB1
...
x 14 x 13 ...
...
.
x 16
x 15
x 17
...
...
.
Cable to
x 18
x 20
x 19 ...
...
. JS1 rack T
x 22 x 21
24 x 23 JC1
x VME bus to VCMI
x
x
x 26 x 25
x 28 x 27 Cable to
x 29 JD1 rack S
Vibration x 30
x 32
x 31
signals x 33 JR1
x 34 P2 P1
x 36 x 35
x 38 x 37
x 40 x 39 P6 P5 P4 P3 VVIB
x 42 x 41 x
x 44
x 43
x 46 x 45 P10 P9 P8 P7 Connectors on J3
x 48
x 47
14 13 12 P11 VME rack R
x
x
Shield bar
Plugs for Portable Bently- J4

Cable to VME
Nevada data gathering &
rack R
monitoring equipment
Cables to fixed Bently- Cable from second TVIB

Nevada 3500 Vibration
Monitoring System
Vibration Processor Board, Terminal Board, and Cabling

Installation
its edge connectors
GEH-6421Q System Guide, Volume II Vibration Monitor Board (VVIB) 18-2

Operation
The terminal board supports Proximitor, Seismic, Accelerometer, and Velomitor probes
of the type supplied by Bently Nevada. Power for the vibration probes comes from the
VVIB boards, in either simplex or TMR mode. The probe signals return to VVIB where
they are A/D converted and sent over the VME bus to the controller.
<R>
<S>
<T>
Vibration Board
Terminal Board TVIBH2A VVIB
JR1 J3
N28V 28 V dc
To
N28VR controller
<S>
<T> Amp A/D
Current
Limit ID Sampling
1 N24V1
S CL type A/D
P V 2 PR01H converter
S JS1 J3 (16 bit)
R s V 3mA
S N28V
O JP1A P,A
3 PR01L Same as
X S
Vib. or pos. PCOM <S>
Eight of the
prox. (P), or
above ccts. ID
seismic (S), P,V,A
or accel (A), TMR
or velomiter N28V Applications
JT1 J3
(V) S
N28V
CL JP1B
Negative Same as
25 N24V9 Volt Ref <T>
S
P 26 PR09H ID
R S
JA1
O 27 PR09L D
S
X B2
Four of the 5
above ccts. Buffer
Position Amplifiers
prox PCOM JB1 J4
D
B2
N28V 5
Buffer P1-P8 JC1 J4

CL Amplifiers D
B2
37 N24V13 5
S
P 38 PR13H
R S
O 39 PR13L P9-P12
S BNC JD1
X J4
Buffer Connectors D
Reference or Amplifiers B9
PCOM
keyphasor
prox. One of the above ccts for Mark VI
(Two of the above ccts for B/N
interface) P13-P14
Four cables to Bently
Nevada 3500 system
VVIB Processor, Vibration Probes, and Bently Nevada Interface, TMR system

VVIB supplies -28 V dc to the terminal board for Proximitor power. In TMR systems,
a diode high-select circuit selects the highest -28 V dc bus for redundancy. Regulators
provide individual excitation sources, -23 to -26 V dc, short circuit protected.
Probe inputs are sampled at high speeds up to 4600 samples per second over discrete time
periods. The maximum and minimum values are accumulated, the difference is taken
(max-min) for vibration, and the results are filtered. The resulting peak-to-peak voltage
is scaled to yield engineering units (EU) (peak-to-peak) displacement for Proximitors
inputs, EU (pk) for velocity inputs from accelerometers, integrated outputs, seismics,
and Velomitors.
Vibration Monitoring Firmware
The Vibration Monitoring on the VVIB in partitioned in the following manner:
Channels 1 3:
Channels 1 through 3 can be used for position information from Proximitors, wideband
vibration information from Proximitors, accelerometers with integrated outputs,
Velomitors, and Seismics. 1X and 2X information can be derived from Proximitors
viewing axial vibration information when a Keyphasor probe is used. Tracking filters
are normally used in LM applications with accelerometers.
Gapx_Vibx Vibration Filtering section runs the low-pass filter for the gap calculation,
the wideband vibration filter, and the maximum / minimum detect for the peak-to-peak
calculation at a 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are
configured as vibration channels. The Gap Scaling and Limit Check runs at the frame
rate. This function converts the gap value from volts to the desired EU. The system limit
check provides two detection limits and Boolean outputs for the status. The Vpp, Filter
and Limit Check block runs every 160 ms. The peak-to-peak calculation is based on the
Vfmax and Vfmin values of the Gapx_Vibx Wideband Vibration Filtering section. The
wideband peak-to-peak signal is filtered and then scaled to EU.
Note Vibx is expressed in EU (pk) for the configuration parameter, VibTypes:

accelerometers with integrated outputs, seismics, and Velomitors. Vibx is expressed
in EU(pk pk) for Proximitors.
The re-scaled wideband signal is the input for the limit check function. The limit check
provides the Booleans, SysLim1VIBx, and SysLim2VIBx for the limit check status.
Three tracking filters are provided to calculate the peak vibration for the LM applications
when accelerometers are used. The tracking filters provide the vibration that occurs at
the rotor speeds defined by the System outputs, LM_RPM_A, LM_RPM_B, and/or
LM_RPM_C. LMVib1A is the vibration detected on channel 1 based on the rotor speed,
LM_RPM_A. LMVib1B is the vibration detected on channel 1 based on rotor speed,
LM_RPM_B. LMVib1C is based on LM_RPM_C.
The 1X and 2X filters provide the peak-to-peak vibration vector relative to the Keyphasor
input from channel 13. VIB1X1 is the peak-to-peak magnitude of the vibration from
channel 1 relative to the rpm based on the Keyphasor input. Vib1xPH1 is the phase
angle in degrees of the vibration vector from channel 1 relative to the Keyphasor input.
VIB2X1 is the peak-to-peak magnitude of the vibration from channel 1 relative to twice
the Keyphasor rpm. Vib2xPH1 is the phase angle in degrees of the 2X vibration vector
from channel 1.

Channels 4 8:
Channels 4 through 8 can be used for position information from Proximitors, wideband
vibration information from Proximitors, Velomitors, and Seismics. 1X and 2X
information can be derived from Proximitors viewing axial vibration information when a
Keyphasor probe is used. Channels 4 through 8 are identical to channels 1 through 3 with
the exception of the Tracking filters. Channels 4-8 do not include the Tracking filters.

Terminal
Board Pts
ScaleOff
PRO01/14H Diff Amp,
Vgap GAP1/14_VIB1/9
MUX & A/D
PRO01/14L SysLimit2 *
VIB_Scale SysLim2GAP1/14
Limit Chk
A/D GAIN & SysLim1GAP1/14
SysLimit1 *
OFFSET Gap Scaling & Limit Check
COMP. (Exec Rate = Frame Rate = 25, 50 or 100 hz)
VOLTS LOW PASS * Additional SysLimit Config. Parm.

----------- FILTER SysLim1Enable (En or Dis)
COUNT (8 Hz) SysLim1Latch (Latch or Not Latch)
SysLim1Type (>= or <=)
ScaleOff
Vib1/9
V_wb VIBScale SysLimit2 *
SysLim2VIB1/9
Limit Chk
Mag. (db) LP Filter
SysLim1VIB1/9
0 (1-pole) SysLimit1 *
-3
Vib_PP_Fltr (Hz)
Vmax
Wideband Vibration Filtering
and Vfmax
Peak Detection +
Vfpp
- CLAMP
Vfmin
FilterType
Fltrhpcutoff Fltrhpattn
Fltrlpcutoff Fltrlpattn Vmin
Filtering Vpp, Filter & Limit Check

(Exec. Rate = 4.6khz for <= 8 chs. & 2.3khz for > 8 chs.) (Exec Rate = 6.25 hz)
Gap1_Vib1(TVIB1) & Gap14_Vib9(TVIB2) Vibration Calculations
PRO02/15H GAP2/15_VIB2/10
SysLim2GAP2/15
PRO02/15L SysLim1GAP2/15
Vib2/10
SysLim2VIB2/10
SysLim1VIB2/10
PRO08/21H GAP8/21_VIB8/16
SysLim2GAP8/21
Vib8/16
SysLim2VIB8/16
SysLim1VIB8/16
Signal
Space
(Sys Inputs)

Channels 9 12:
Channels 9 12 are used for position information only. The Gapx_Pos_Filtering runs at
4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration
channels. This section provides an 8 Hz low pass filter for the gap calculation. Gapx_Pos
Scaling and Limit Check runs every frame. This function rescales the gap value from
volts to EU based on the configuration. The System Limit Check can be used set a
Boolean at minimum and/or maximum limit values configured by the user.
Channnel 13:
Channel 13 supports position feedback and Keyphasor feedback. The Key_Phasor
Filtering is executed 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are
configured as vibration channels. The Filtering function performs a median select filter
for the gap signal.
A hardware comparator circuit with a software controlled hysteresis limit is used to
detect the leading edge of the slot or pedestal gap transition. The Keyphasor timing pulse
is fed into an FPGA with counters that determine the time between Keyphasor pulses and
the firmware uses this information to calculate the rotor speed in rpm. At very low speeds
the hardware Keyphasor comparator is not usable and the runtime application code
determines speed by counting pulses detected through the system input, GAP13_KPH1.
The Gap13 KP Scaling and Limit Check runs every frame. The gap scaling and System
Limit Check performs the same way it does for channels 1 through 12.

Terminal Signal
Board Pts Space
ScaleOff (Sys Inputs)
PRO09/22H Diff Amp,
Vgap GAP9/22_POS1/5
MUX & A/D
PRO09/23L SysLimit2 *
Scale SysLim2GAP9/22
Limit Chk
SysLimit1 *
OFFSET
COMP. LOW PASS * Additional SysLimit Config. Parm.
FILTER SysLimxEnable (En or Dis)
(8 Hz) SysLimxLatch (Latch or Not Latch)
VOLTS SysLimxType (>= or <=)
-----------
COUNT
Gap9 Position Filtering Gap9 Position Scaling & Limit Check
( Rate = 4.6khz for <= 8 vib chs. or 2.3khz for > 8 chs.) (Exec Rate = Frame Rate = 25, 50 or 100 hz)
Gap9_Pos1(TVIB1) and Gap22_Pos5(TVIB2) Gap Calculations
PRO10/23H GAP10/23_POS2/6
Gap10_Pos2(TVIB1) & Gap23_Pos6(TVIB2) Gap Calculations SysLim2GAP10/23
PRO12/25H GAP12/25_POS4/8
Gap12_Pos4(TVIB1) & Gap25_Pos8(TVIB2) Gap Calculations SysLim2GAP12/25
Gap13/26 Filtering ScaleOff

PRO13H Diff Amp, ( Rate = 4.6khz for <= 8 vib chs.
or 2.3khz for > 8 chs.) Vgap GAP13/26_KPH1/2
MUX & A/D
PRO13L SysLimit2 *
Scale SysLim2GAP13/26
Limit Chk
SysLimit1 *
OFFSET
COMP.
MEDIAN
* Additional SysLimit Config. Parm.
SELECT SysLimxEnable (En or Dis)
VOLTS SysLimxLatch (Latch or Not Latch)
-1 -1 SysLimxType (>= or <=)
-----------
Z Z
COUNT
Key Phasor Support
KPH_Thrshld
KPH_Type
Comparator Speed
Timer RPM_KPH1/2
/ Interrupt Calculation Gap13/26 Scaling & Limit Check
(Exec Rate = Frame Rate = 25, 50 or 100 hz)
Gap13_KP1(TVIB1) & Gap26_KP2(TVIB2) Calculations

The Wideband_Vibration Filtering function is executed at 4.6 kHz rate and 2.3 kHz rate
if input channels 14 through 21 are configured as vibration channels. The vibration input
for this function comes from the FPGA that controls the A/D and multipler circuit. The
gap or position filter is a 2-pole low pass filter with a cutoff frequency set at 8 Hz. The
output of the gap filter is expressed in volts and provides the input the Gap Scaling
and Limit Check function.
The wideband vibration information can be shaped or conditioned based on the
configuration parameter, FilterType. FilterTypes equal to Low-pass, Band-pass or
High-pass are used for the Seismic and Velomitor sensor types. FilterType = None is
used by all the other sensor types. The Low-Pass filter can be configured for 2, 4, 6 or 8
pole attenuation behavior through the parameter, Filtrlpattn. The 3 db cutoff frequency,
Filtrlocutoff is also adjustable. The High-pass filter can also be configured for 2, 4, 6
and 8 pole to sharpen the attenuation characteristics of the filter through the parameter,
Filtrhpattn. The cutoff frequency, Filtrhpcutoff is adjustable in configuration.
The wideband filtered vibration output, Vfout goes through a minimum/maximum
peak detect function. The capture window for the minimum/maximum detect is 160
milliseconds wide for Keyphasor based speeds greater than 12 rpm. The objective is
to capture at least 2 cycles of vibration information to get an accurate peak-to-peak
calculation.
The wideband unfiltered vibration output, goes through a second minimum/maximum
peak detect function. The outputs, Vmax and Vmin, are used to clamp the filtered
vibration output peak-to-peaks.

and Peak Detection
Exec. Rate = 4600 / 2300 Hz
Note 1: Text in BLUE are PVIB configuration parameters.
Mag. (db) Low Pass Filter Note 2: This filter type is only used for Seismics and VelomitorsTM.
V_wb
0 (2,4,6 or 8-pole)
-3
Note 3: This filter type is used for all other sensor types.
Filtrlpcutoff Freq. (Hz)
Filtrlpattn = 8 6 4 2

High Pass Filter Mag. (db) Low Pass Filter
Mag. (db) Vfmax
(2,4,6 or 8-pole) 0 (2,4,6 or 8-pole) FilterType MAX
(cnts)
0 -3
-3 Lowpass(Note2)
Bandpass(Note2) Vfout
MIN Vfmin
(cnts)
Highpass(Note2) (cnts)
Filtrlpcutoff Freq. (Hz) Pk-Pk Scan Time
Freq. (Hz)
160 ms
Filtrlpattn = 8 6 4 2 none(Note3)
Filtrhpcutoff
Filtrhpattn = 2 4 6 8
High Pass Filter

Mag. (db)
(2,4,6 or 8-pole)
0
-3
MAX
Freq. (Hz)
Filtrhpcutoff
Filtrhpattn = 2 4 6 8
MIN Vmin
(cnts)
Pk-Pk Scan Time
160 ms
Vmax
(cnts)
Vibration Monitor Board (VVIB) 18-10

Vpp Filter and Limit Check
The Vpp, Filter and Limit Check operates on channels 1 through 8 for TVIB1 and
channels 14 through 21 for TVIB2. The execution rate for the function is 6.25 Hz. The
Vpp, Filter, and Limit Check inputs are the following:
Vfmax filtered maximum peak vibration
Vfmin filtered minimum peak vibration
Vmin unfiltered min peak vibration
Vmax unfiltered max peak vibration
The system inputs or Vpp, Filter, and Limit Check outputs are:
VIBx - the wideband vibration in EU where the units for EU are in peak for the
configuration parameter, VibType = Seismic, Velomitor or Accelerometer and the EU
units are peak-to-peak for VibType = Proximitor
SysLim1VIBx the System Limit #1 Boolean (Boolean is True if VIBx is in the limit 1)
SysLim2VIBx the System Limit #2 Boolean (Boolean is True if VIBx is in the limit 2)
The system output used is the System Limit Reset Boolean. If Reset is True, a latched
System Limit Boolean is cleared.
The filtered peak-to-peak wideband vibration signal, Vfpp = Vfmax Vfmin. Vfpp is
then clamped based on the unfiltered peak-to-peak wideband value. The clamp prevents
outputs from the Infinite Impulse Response (IIR-based) filter designs used for the
high-pass and low-pass filters to exceed the original input values. The clamped wideband
vibration signal, Vpp passes through a single-pole low-pass filter with an adjustable
cutoff frequency, VIB_PP_Fltr.
The Vpp, Filter, and Limit Check scaling block converts the clamped and filtered
wideband peak-to-peak vibration from volts to EU or Volts peak (Vp) depending on the
configuration parameter VibType.
VibType determines the A/D conversion value, AD_CONV in units of volts
/ counts and the default value for the sensor offset and the final EU units being
expressed in peak or peak-to-peak.
VIBScale gain factor expressed in volts peak / EU (peak) irregardless to the
VibType setting.
ScaleOffset offset value in EU (peak).
The Vpp, Filter and Limit Check provides two System Limit blocks. The following
configuration parameters control the behavior of the System Limit block:
SysLimxEnabl the System Limit (x=1 or 2) Enable is set True to select the use
of the block.
SysLimxType the System Limit (x=1 or 2) Type selects whether the limit check
does a >= check or a <= check.
SysLimitx System Limit (x=1 or 2) is the limit value used in the >= or <=
check.
SysLimxLatch System Limit (x=1 or 2) Latch determines whether the Boolean
status flag is latched or unlatched. If the Boolean status flag is latched the flag will
remain True even if the limit value is no longer exceeded.

The system input or System Limit Boolean status flag is SysLimxVIBy where x is the
System Limit block number (1 or 2) and y is the VVIB channel input number (1 8 for
TVIB1 and 14 21 for TVIB2).
Gap Scaling and Limit Check
The Gap Scaling and Limit Check operates on channels 1 through 8 for TVIB1 and
channels 14 through 21 for TVIB2. The execution rate for the function is 25, 50, or 100
Hz. The rate of execution is based on the frame rate selected for IONet. The system
inputs or Gap Scaling and Limit Check outputs are:
Gapx_VIBx the position or gap value in EU for Proximitors and bias voltage in Vdc for
accelerometers with integrated outputs, seismics, and Velomitors
SysLim1GAPx the System Limit #1 Boolean; (Boolean is True if GAPx_VIBx is
in the limit 1)
SysLim2GAPx the System Limit #2 Boolean. (Boolean is True if GAP_VIBx is in
the limit 2)
The Gap Scaling and Limit Check scaling block converts the 8 Hz filtered output gap
signal from volts to EU or Volts peak (Vp) depending on the configuration parameter
VibType. The scaling is determined by the following configuration parameters:
VIB_Scale gain factor expressed in volts peak / EU (peak) irregardless to the
VibType setting.
ScaleOffset offset value in EU (peak)
The Gap Scaling and Limit Check provides two System Limit blocks. The following
of the block.
check.
The system input or System Limit Boolean status flag is SysLimxGAPy where x is the
System Limit block number (1 or 2) and y is the VVIB channel input number (1 8 for
TVIB1 and 14 21 for TVIB2).

Gapx_POSy Gap Calculations
The Gapx_POSy Gap Calculations is comprised of the Gapx Position Filtering and the
Gapx_Pos Scaling and Limit Check where x is the VVIB channel number 9 through 12
for TVIB1 and 22 through 25 for TVIB2 and y is the position number 1 4 for TVIB1
and 5 8 for TVIB2. The Gapx_POSy Gap Calculations outputs are:
Gapx_POSy the position or gap value in EU for Proximitors
SysLim1GAPx the System Limit #1 Boolean (Boolean is True if GAPx_POSy is
in the limit 1)
SysLim2GAPx the System Limit #2 Boolean (Boolean is True if GAP_POSy is in
the limit 2)
The Gapx_Position Filtering is executed at 4.6 kHz rate and 2.3 kHz rate if input
channels 14 through 21 are configured as vibration channels. The position input for this
function comes from an FPGA that controls the multiplexed A/Ds. The A/D value is
compensated for A/D gain and offset errors and converted to volts. A median select
filter is then applied.
The Gapx_Position Scaling and Limit Check scaling block converts the filtered gap
signal from volts to EU or Volts peak (Vp) depending on the configuration parameter
VibType. The configuration parameters are:
Scale gain factor expressed in volts peak / EU (peak)
The Gapx_Position Scaling and Limit Check provides two System Limit blocks. The
following configuration parameters control the behavior of the System Limit block:
of the block.
check.
The system input or System Limit Boolean status flag is SysLimxGAPy where x is
the System Limit block number (1 or 2) and y is the VVIB channel input number (9
12 for TVIB1 and 22 25 for TVIB2).

Gap13/26_KPH1/2 Calculations
The Gap13/26_KPH12 Calculations is comprised of the Gap13/26 Filtering and the
Gap13/26_KP Scaling and Limit Check. The Gap13/26_KPH1/2 Calculation system
inputs are:
GAP13_KPH1 the position or gap value in EU for the Keyphasor Proximitor for TVIB1
GAP26_KPH2 the position or gap value in EU for the Keyphasor Proximitor for TVIB2
SysLim1GAP13 the System Limit #1 Boolean for TVIB1 (Boolean is True if
GAP13_KPH1 is in the limit 1)
The Gap13_KPH1 system outputs are:
SysLimReset the System Limit Reset Boolean (If Reset is True, a latched System
Limit Boolean is cleared)
LM_RPMx rotor shaft speed in rpm from different stages of the turbine (x = A, B or C)
The Gap 13/26 Filtering is executed at 4.6 kHz rate and 2.3 kHz rate if input channels 14
through 21 are configured as vibration channels. The input for this function comes from a
multiplexed A/D controlled by an FPGA. The Gap 13/26 Filtering uses the median select
function to calculate the filtered gap. The median select filter uses the present value (n),
the previous (n-1), and the value 2 samples back (n-2) to perform a median select on.
The output is expressed in volts and passes to the Gap13/26 Scaling and Limit Check.
The Gap13/26 Scaling and Limit Check scaling block converts the filtered gap signal
from volts to EU. The Gap13/26 runs at the frame rate of either 25, 50 or 100 Hz. The
gap conversion is based on the following configuration parameters:
The Gap13/26 Scaling & Limit Check provides two System Limit blocks. The following
of the block.
check.
The system input or System Limit Boolean status flag is SysLimxGAP13 for TVIB1 and
SysLimxGAP26 for TVIB2 where x is the System Limit block number (1 or 2).

1X and 2X Calculations based on Keyphasor Input
The 1X and 2X Calculations based on a Keyphasor input provides a peak-to-peak
vibration component (magnitude and phase) at both the Keyphasor frequency and twice
the frequency. The calculations are comprised of two sections:
Modulator and Filter
Magnitude and Phase Calculation
The system inputs from the 1X & 2X calculations are:
Vib1Xy the peak-to-peak magnitude of the vibration phasor that is rotating at
the Keyphasor frequency
Vib1xPHy the phase angle between the Keyphasor input and the ViB1Xy vibration
phasor
Vib2Xy the peak-to-peak magnitude of the vibration phasor that is rotating at the
twice the Keyphasor frequency
Vib1xPHy the phase angle between the Keyphasor input and the Vib2Xy vibration
phasor, and where y is the VVIB channel number, 1 through 8 for TVIB1 and 14
through 21 for TVIB2
The Modulator and Filter for both the 1X and 2X calculations are executed at 4.6 kHz
rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration channels.
The 1X modulator has two inputs: delta_1/delta_2 and the vibration channel input. The
delta_1/ delta_2 is the point in the key_phasor cycle where the vibration channel input
was sampled. The range for delta_1/delta_2 is from 0 to 1. Delta_1/delta_2 is converted
to radians and is the index into a cosine and sine lookup table. The result from the cosine
and sine lookup table is modulated with the vibration channel input. The modulated
signal is filtered through a 4-pole low pass filter with a cutoff frequency of 0.25 Hz.
The filter output provides the dc value of the de-modulated components: the real and
imaginary phasors of the vibration component that is rotating at 1X speed.
The Vibration 1X function uses the real and imaginary vibration components based on
the Keyphasor frequency as the inputs to the RMS calculator. The square root of the sum
of the squares of the real and imaginary vibration components times the scaling block
results in the peak-to-peak magnitude of the 1X vibration phasor, Vib1Xy rotating at the
Keyphasor frequency. The phase, Vib1xPHy, is the arccosine of the absolute value of
Fpi / (VMK ).
The Vibration 2X function is the same calculation except the input delta_1/delta_2 is
multiplied by 4 * PI instead of 2 * PI. The results are a peak-to-peak magnitude of the
2X vibration phasor, Vib2Xy, rotating at twice the Keyphasor frequency and a phase
of Vib2xPHy.
The scaling block converts the VMK * 4 signal to EU. The scaling is based the following
configuration parameters:

Terminal
Board Pts
Ch 1/14 Signal Cond. & A / D Input Block
PRO01/14H Diff Amp, A/D GAIN VOLTS

MUX & & OFFSET -----------
PRO01/14L A/D COMP. COUNT
Signal
Vibration 1X for Ch 1/14
Space
LOW PASS (Sys Inputs)
Fs = 100 Hz
COS X FILTER X
(.25 Hz, 4P)
delta_1 ips
------------- 2 * PI + SQRT 4 ------ Vib1X1/9
delta_2 volt
LOW PASS 57.29578 Vib1xPH1/9
VMK
SINE X FILTER X
(.25 Hz, 4P)
D
Fs = 4.6khz for <= 8 chs. or -1
Fpi N ABS
2.3khz for > 8 vib ch. COS
DIVIDE
Vibration 2X for Ch 1
LOW PASS
Fs = 100 Hz
COS X FILTER X
(.25 Hz, 4P)
ips
4 * PI + SQRT 4 ------ Vib2X1/9
volt
LOW PASS 57.29578 Vib2xPH1/9
VMK
SINE X FILTER X
(.25 Hz, 4P)
D
Fs = 4.6khz for <= 8 chs. or -1
Fpi N ABS
2.3khz for > 8 vib ch. COS
DIVIDE
where delta_1 Time from KeyPhasor to A/D Read

---------- = --------------------------------------------------- + ( Channel # - 1 ) * A/D Conv. Time
Terminal delta_2 KeyPhasor Period
Board Pts
PRO02/15H Vib1X2/10
Ch 2/15 Signal Cond. &
Vibration 1X for Ch2/15
A / D Input Block
PRO02/15L Vib1xPH2/10
Vib2X2/10
Vib2xPH2/10
PRO08/21H Vib1X8/16
Ch 8/21 Signal Cond. &
Vibration 1X for Ch8/21
A / D Input Block
PRO08/21L Vib1xPH8/16
Vib2X8/16
Vib2xPH8/16

Tracking Filters based on LM_RPM_A/B and C
The Tracking Filters based on LM_RPM_A/B and C provide the peak vibration
component (magnitude only) at the frequencies: LM_RPM_A, LM_RPM_B, and
LM_RPM_C. The Tracking filters require both Modulation & filter stage executing at 4.6
kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration
channels and the Magnitude calculation.
The system inputs from the Tracking filters are:
LMVibxA the peak magnitude of the vibration component rotating at LM_RPM_A
speed
LMVibxB the peak magnitude of the vibration component rotating at LM_RPM_B
speed
LMVibxC the peak magnitude of the vibration component rotating at LM_RPM_C
speed
SysLim1ACCx the System Limit Boolean status of Limit1 where x = 1 through 9
SysLim2ACCx the System Limit Boolean status of Limit2 where x = 1 through 9
The Modulator and Low-pass filter for the LMVibxA, LMVibxB, and LMVibxC tracking
filters are executed at 4.6 kHz rate. The low-pass filter is identical for all tracking
filters. The filter is a 5-pole low-pass filter with a cutoff frequency equal to 2.5 Hz.
The LMVibxA filter inputs are the modulated signals cos(2pi/60Fs * LM_RPM_A) *
Vibration Input and sin(2pi/60Fs * LM_RPM_A) * Vibration Input. The filtered output of
the modulated vibration input with the sine is the de-modulated imaginary component of
the channel vibration based on the rotor shaft speed, LM_RPM_A and the filtered output
of the modulated vibration input with the cosine is the de-modulated real component of
the channel vibration based on the rotor shaft speed, LM_RPM_A.
The LMVibxB and LMVibxC tracking filters perform the same task as the LMVibxA
filter, except the de-modulated real and imaginary components of the vibration input are
based on the rotor speeds: LM_RPM_B and LM_RPM_C.
The scaling block converts the VMx where x = A, B, or C magnitude to EU. The scaling
is based on the following configuration parameters:
The Tracking Filter provides two System Limit blocks. The following configuration
parameters control the behavior of the System Limit block:
of the block.
check.

Terminal
Board Pts Ch 1 Signal Cond. & A / D Input Block
PRO01H Diff Amp, A/D GAIN VOLTS

MUX & & OFFSET -----------
PRO01L A/D COMP. COUNT
Signal
Space
Ch 1Tracking Filter for LM_RPM_A (Sys Inputs)
Fs = 4.6khz for <= 8 chs. or
Signal 2.3khz for > 8 vib ch. LOW PASS ips
Space COS X FILTER X 2 ------ LMVib1A
(Sys Outputs) (2.5 Hz, 5P) volt
2 * PI
LM_RPM_A ---------- X + SQRT
60 * Fs SysLimit2 * SysLim2ACC1
LOW PASS
n SINE X FILTER X Limit Chk
(2.5 Hz, 5P) SysLimit1 * SysLim1ACC1
( 1 to Fs / (LM_RPM_A/60) ) SysLimxEnable (En or Dis)
SysLimxLatch (Latch or Not Latch) Fs = 100 Hz
SysLimxType (>= or <=)
Ch 1 Tracking Filter for LM_RPM_B

2.3khz for > 8 vib ch. LOW PASS ips
COS X FILTER X 2 ------ LMVib1B
(2.5 Hz, 5P) volt
2 * PI
LM_RPM_B ---------- X + SQRT
SysLimit2 * SysLim2ACC2
60 * Fs
LOW PASS Limit Chk
n
SINE X FILTER X SysLimit1 * SysLim1ACC2
(2.5 Hz, 5P) * Additional SysLimit Config. Parm.
SysLimxEnable (En or Dis)
( 1 to Fs / (LM_RPM_B/60) ) SysLimxLatch (Latch or Not Latch)
SysLimxType (>= or <=) Fs = 100 Hz
Ch 1 Tracking Filter for LM_RPM_C

2.3khz for > 8 vib ch. LOW PASS ips
COS X FILTER X 2 ------ LMVib1C
(2.5 Hz, 5P) volt
2 * PI
LM_RPM_C ---------- X + SQRT
SysLimit2 * SysLim2ACC3
60 * Fs
LOW PASS Limit Chk
SINE X FILTER X SysLimit1 * SysLim1ACC3
n (2.5 Hz, 5P)
SysLimxEnable (En or Dis)
( 1 to Fs / (LM_RPM_C/60) ) SysLimxLatch (Latch or Not Latch) Fs = 100 Hz
SysLimxType (>= or <=)
LMVib2A
Ch 2 Tracking Filter for LM_RPM_A SysLim2ACC4
SysLim1ACC4
LMVib2B
Terminal
Ch 2 Tracking Filter for LM_RPM_B SysLim2ACC5
Board Pts
SysLim1ACC5
PRO02H LMVib2C
Ch 2 Signal Cond. &
Ch 2 Tracking Filter for LM_RPM_C SysLim2ACC6
A / D Input Block
PRO02L SysLim1ACC6
LMVib3A
Ch 3 Tracking Filter for LM_RPM_A SysLim2ACC7
SysLim1ACC7
LMVib3B
Ch 3 Tracking Filter for LM_RPM_B SysLim2ACC8
SysLim1ACC8
PRO03H LMVib3C
Ch 3 Signal Cond. &
Ch 3 Tracking Filter for LM_RPM_C SysLim2ACC9
A / D Input Block
PRO03L SysLim1ACC9

Specifications
Item Specification
Number of Channels TVIB: 13 probes: 8 vibration, 4 position, 1 Keyphasor
VVIB: 26 probes with two TVIB boards
Vibration Measurement Range Accuracy Frequency
Proximity Displacement 0 to 4.5 V pp 0 .030 V pp 5 to 200 Hz
Displacement 0 to 4.5 V pp 0 .150 V pp 200 to 500 Hz
Seismic Velocity 0 to 2.25 V p Max [2% reading, 5 to 200 Hz
Velocity 0 to 2.25 V p 0.008 Vp] 200 to 500 Hz
Max [5% reading,
0.008 Vp]
Velomitor Velocity 0 to 2.25 V p Max [2% reading, 5 to 200 Hz
Velocity 0 to 2.25 V p 0.008 Vp] 200 to 500 Hz
Max [5% reading,
0.008 Vp]
Accelerometer Velocity (track filter) 0 to 2.25 V p 0.015 Vp 0 to 233 Hz
Position Position -.5 to -20 V dc 0.2 V dc Air gap (average)
Phase Degrees 0 to 360 degrees 2 degrees Up to 14,000 rpm
(1X vibration component with respect to key slot)
Probe power -24 V dc from the -28 V dc bus; each probe supply is current limited
12 mA load per transducer
Probe signal sampling 16-bit A/D converter with 14-bit resolution on the VVIB
Sampling rate is 4,600 samples per second in fast scan mode (4,000 to 17,500 rpm)
Sampling rate is 2,586 samples per second for nine or more probes (less than 4,000 rpm)
All inputs are simultaneously sampled in time windows of 160 ms
Rated RPM If greater than 4,000 rpm, can use eight vibration channels, (others can be prox/position)
If less than 4,000 rpm, can use 16 vibration channels, and other probes
Buffered outputs Amplitude accuracy is 0.1% for signal to Bently Nevada 3500 vibration analysis system
Diagnostics
Diagnostics perform a high/low (hardware) limit check on the input signal and a high/low
system (software) limit check. The software limit check is adjustable in the field.
A probe fault, alarm, or trip condition occurs if either of an X or Y probe pair exceeds its
limits. In addition, the application software prevents a vibration trip (the ac component)
if a probe fault is detected based on the dc component.
Position inputs for thrust wear protection, differential expansion, and eccentricity are
monitored similar to the vibration inputs except only the dc component is used for a
position indication. A 16-bit sampling type A/D converter is used with 14-bit resolution
and overall circuit accuracy of 1% of full scale.

Vibration Monitoring and Analysis
Note The Mark VI system provides vibration protection and displays the basic vibration
parameters.
Each input is actively isolated and the signals made available through four plugs for direct
cabling to a Bently Nevada 3500 monitor. This configuration provides the maximum
reliability by having a direct interface from the Proximitors to the turbine control for trip
protection and still retaining the real-time data access to the Bently Nevada system for
static and dynamic vibration monitoring.
Note The Mark VI system displays the total vibration, the 1X vibration component, and
the 1X vibration phase angle, but it is not intended as a vibration analysis system.
Fourteen BNC connectors on TVIB provide buffered signals available to portable data
gathering equipment for predictive maintenance purposes. Buffered outputs have unity
gain, 10 k internal impedance, and can drive loads up to 1500 configuration.
Configuration
Configuration
System limits Enable system limits Enable, disable
Vib_PP_Fltr First order filter time constant (sec) 0.01 to 2
LMVib1A Vib, 1X component, for LM_RPM_A, input #1 - board Point edit (input FLOAT)
point
SysLim1Enable Enable system limit 1 fault check Enable, disable
SysLim1Latch Latch system limit 1 fault Latch, not latch
SysLim1Type System limit 1 check type >= or <=
SysLimit1 System Limit 1 - Vibration in mils (Prox) or Inch/sec -100 to +100
(seismic, accel)
SysLim2Enable Enable system limit 2 (same configuration as above) Enable, disable
TMR_DiffLimt Difference limit for voted TMR inputs in volts or mils -100 to +100
LMVib1B Vib, 1X component, for LM_RPM_B, #1 - board point Point edit (input FLOAT)
LMVib1C Vib, 1X component, for LM_RPM_C, #1 - board point Point edit (input FLOAT)
LMVib2A Vib, 1X component, for LM_RPM_A, #2 - board point Point edit (input FLOAT)
LMVib3A Vib, 1X component, for LM_RPM_A, #3 - board point Point edit (input FLOAT)
J3:IS200TVIBH1A Vibration terminal board, first of two Connected, not connected
GAP1_VIB1 Average air gap (for Prox) or dc volts (for others) - Point edit (input FLOAT)
board point

VIB_Type Type of vibration probe Unused, PosProx, VibProx,
VibProx-KPH1, VibProx-KPH2,
VibLMAccel, VibVelomitor, KeyPhasor
VIB_Scale Volts/mil or volts/ips 0 to 2
ScaleOff Scale offset for prox position only, in mils 0 to 90
SysLim1Enable Enable system limit 1 Enable, disable
SysLim1Latch Latch the alarm Latch, not latch
SysLim1Type System limit 1 check type >= or <=
SysLimit1 System limit 1 GAP in negative volts (for vel) or -100 to +100
positive mils (prox)
SysLim2Enabl Enable system limit 2 (same configuration as above) Enable, disable
TMR_DiffLimt Difference limit for voted TMR inputs in volts or mils -100 to +100
Vib1 Vibration, displacement (pk-pk) or velocity (pk) - board Point edit (input FLOAT)
point
SysLim1Enable System limits configured as above Enable, disable
GAP2_VIB2 Second vibration probe of 8 - board point Point edit (input FLOAT)
point
GAP9_POS1 First position probe of 4 - board point Point edit (input FLOAT)
GAP13_KPH1 KeyPhasor probe air gap - board point Point edit (input FLOAT)
J4:IS200TVIBH1A Second vibration terminal board Connected, not connected
GAP14_VIB9 First Vibration Probe of 8 - board point Point edit (input FLOAT)
point
GAP22_POS5. First position probe of 4 - board point Point edit (input FLOAT)
GAP26_KPH2 KeyPhasor probe air gap - board point Point edit (input FLOAT)
L3DIAG_VVIB1 Board diagnostic Input BIT
SysLim1GAP1 Gap signal limit Input BIT
: : Input BIT
: : Input BIT
SysLim1VIB1 Vibration signal limit Input BIT
: : Input BIT

SysLim1ACC1 Acceleration signal limit Input BIT
: : Input BIT
: : Input BIT
: : Input BIT
RPM_KPH1 Speed RPM, of KP #1 Input FLOAT
RPM_KPH2 Speed RPM, of KP #2 Input FLOAT
Vib1X1 Vibration, 1X component only, displacement Input FLOAT
: : Input FLOAT
Vib1X16 Vibration, 1X component only, displacement Input FLOAT
Vib1XPH1 Angle of 1X component to KP Input FLOAT
: : Input FLOAT
Vib1XPH16 Angle of 1X component to KP Input FLOAT
LM_RPM_A Output FLOAT
LM_RPM_B Output FLOAT
LM_RPM_C Output FLOAT

Alarms
go online)
to go online)
24 Firmware/Hardware Incompatibility Invalid terminal board connected to VME I/O board.
32 VVIB A/D Converter 1 Calibration Outside of Spec. The hardware failed (if so replace the board) or
VVIB monitors the Calibration Levels on the 2 A/D. If there is a voltage supply problem
any one of the calibration voltages is not within 1%
of its expected value, this alarm is set
33 VVIB A/D Converter 2 Calibration Outside of Spec. The hardware failed (if so replace the board) or
VVIB monitors the Calibration Levels on the 2 A/D. If there is a voltage supply problem
any one of the calibration voltages is not within 1%
of its expected value, this alarm is set
34 TVIB J3 Analog Input (channel #) Out of Limits Possible open circuit, customer cable short or
sensor failure
35 TVIB J4 Analog Input (channel #) Out of Limits Possible open circuit, customer cable short or
sensor failure
65-77/ 81-93 TVIB/DVIB J3/J4 Analog Input # out of limits. VVIB The TVIB/DVIB board(s) may not exist but the
monitors the Signal Levels from the 2 A/D. If any sensor is specified as used, or the sensor may be
one of the voltages is above the max value, this bad, or the wire fell off, or the device is miswired.
diagnostic is set
or the cable.

TVIB Vibration Input
The Vibration Input (TVIB) terminal board accepts up to 14 vibration probes, two of
which can be cabled directly to the VVIB board. VVIB processes and digitizes the
displacement and velocity signals, which are then sent over the VME bus to the controller.
The Mark* VI system uses Bently Nevada probes for shaft vibration monitoring. The
following vibration probes are compatible with TVIB:
Proximity
Velocity
Acceleration
Seismic
Phase
There are two types of TVIB terminal boards, H1A and H2A. The H2A type board has
BNC connectors allowing portable vibration data gathering equipment to be plugged in
for predictive maintenance purposes. Both types have connectors so that Bently Nevada
vibration monitoring equipment can be permanently cabled to the terminal board to
measure and analyze turbine vibration.
In the Mark VI system TVIB works with the VVIB processor and supports simplex and
TMR applications. Two TVIBs connect to VVIB with two cables. In TMR systems,
TVIB connects to three VVIB processors with three cables.
Note TVIBH does not support Mark VIe I/O packs.

TVIB Terminal Board VVIB VME Board
x
x
x 37-pin "D" shell
x 1 ...JA1
... JT1 type connectors
x 2 ...
. RUN
x 4 x 3 ... with latching FAIL
...
6
x 5 . STAT
x
x 7
...
... fasteners
Vibration x 8 .
...
x 10
x 9 ...
.
signals x 11 ...
x 12 . JB1
...
x 14 x 13 ...
...
.
x 16
x 15
x 17
...
...
.
Cable to
x 18
x 20
x 19 ...
...
. JS1 rack T
x 22 x 21
24 x 23 JC1
x VME bus to VCMI
x
x
x 26 x 25
x 28 x 27 Cable to
x 29 JD1 rack S
Vibration x 30
x 32
x 31
signals x 33 JR1
x 34 P2 P1
x 36 x 35
x 38 x 37
x 40 x 39 P6 P5 P4 P3 VVIB
x 42 x 41 x
x 44
x 43
x 46 x 45 P10 P9 P8 P7 Connectors on J3
x 48
x 47
14 13 12 P11 VME rack R
x
x
Shield bar
Plugs for Portable Bently- J4

Cable to VME
Nevada data gathering &
rack R
monitoring equipment
Cables to fixed Bently- Cable from second TVIB

Nevada 3500 Vibration
Monitoring System
Vibration Terminal Board, Processor Board, and Cabling

Installation
Connect the wires for the 14 vibration probes to the two terminal blocks, three wires per
probe. In simplex systems, connect the TVIB1 JR1 connector to VVIB J3 on the VME
rack and the TVIB JR1 connector to VVIB J4. In TMR systems, connect the VVIB
JR1, JS1, and JT1 connectors to the R, S, and T VVIBs. Use jumpers JP1 through JP8
to select the probe type for the first eight probes. Optionally, connect TVIB to a Bently
Nevada system using connectors JA1, JB1, JC1, and JD1.
Note Permanent cable connections to BNCs P1 through P14 are not made.

S P,V,A
Vibration Terminal JPxB B/N buffer: Jumper
Board TVIBH2A JPxA sensor input: V P,A positions
S
JP1B Probe
x JP1A selection
x 1 N24V01 JP2B jumpers
PR01 (H) x 2
N24V02 x 4
x 3 PR01 (L) JP2A
x 5 PR02 (H) JP3B
PR02 (L) x 6
x 7 N24V03 JP3A
PR03 (H) x 8 JP4B
x 9 PR03 (L)
N24V04 x 10 JP4A
x 11 PR04 (H) Vibration
PR04 (L) x 12 JP5B
x 13 N24V05 probes
PR05 (H) x 14 JP5A
N24V06 x 16
x 15 PR05 (L) JP6B
PR06 (L) x 18
x 17 PR06 (H) JP6A
PR07 (H)
x 19 N24V07 JP7B
x 20
N24V08 x 21 PR07 (L) JP7A
x 22
x 23 PR08 (H) JP8B
PR08 (L) x 24
JP8A
x
Connectors JR1, JS1, JT1, to VME racks
Connectors JA1,JB1, JC1, JD1 to optional

x Bentley Nevada 3500 system
PR09 (H) x 26
x 25 N24V09
N24V10 x 28
x 27 PR09 (L) BNC
x 29 PR10 (H) Position connectors
PR10 (L) x 30
x 31 N24V11 probes P2 P1 for portable
PR11 (H) x 32
x 33 PR11 (L) data
N24V12 x 34
x 35 PR12 (H) gathering
PR12 (L) x 36
PR13 (H) x 38
x 37 N24V13 P6 P5 P4 P3 equipment
N24V14 x 40
x 39 PR13 (L)
PR14 (L) x 42
x 41 PR14 (H)
x 43 P10 P9 P8 P7
x 44 P1 is PR01
x 45 Reference P2 is PR02
x 46
x 47 probe and so on.
x 48 P14 P13 P12 P11
x Bently Nevada P14 is for
probe Bently Nevada
Connector Pin Assignments Px, BNC
Ckt Sensor Conn Comm Sign Shld Connector Jumper JPXA:
01 Vib 1 JA1 2 3 4 P1 S = Seismic
02 Vib 2 JA1 6 7 8 P2 V = Velomitor
03 Vib 3 JA1 10 11 12 P3 P = Proximitor
04 Vib 4 JA1 24 23 22 P4 A = Accelerometer
05 Vib 5 JB1 2 3 4 P5
Jumper JPXB:
06 Vib 6 JB1 6 7 8 P6
07 Vib 7 JB1 10 11 12 P7 S = Seismic
08 Vib 8 JB1 24 23 22 P8 V = Velomitor
09 Pos 1 JC1 2 3 4 P9 P = Proximitor
10 Pos 2 JC1 6 7 8 P10 A = Accelerometer
11 Pos 3 JC1 10 11 12 P11
12 Pos 4 JC1 24 23 22 P12
13 Ref probeJD1 3 1 2 P13
14 B/N only JD1 9 5 4 P14
Terminal Board TVIB Wiring

Operation
TVIB supports Proximitor, Seismic, Accelerometer, and Velomitor probes supplied by
Bently Nevada. Power for the vibration probes comes from the VVIB boards in simplex
or TMR mode. The probe signals return to VVIB where they are A/D converted and sent
over the VME bus to the controller. Vibration, eccentricity, and axial position alarms and
trip logic are generated in the controller.
A -28 V dc source is supplied to the terminal board from the VME board for Proximitor
power. In TMR systems, a diode high-select circuit selects the highest -28 V dc bus for
redundancy. Regulators provide individual excitation sources, -23 to -26 V dc, that
are short circuit protected. VVIB samples the probe inputs at high speed over discrete
time periods.

<R>
<S>
<T>
Vibration Board
Terminal Board TVIBH2A VVIB
JR1 J3
N28V 28 V dc
To
N28VR controller
<S>
<T> Amp A/D
Current
Limit ID Sampling
1 N24V1
S CL type A/D
S JS1 J3 (16 bit)
R s V 3mA
S N28V
O JP1A
3 PR01L P,A Same as
X S
Vib. or pos. PCOM <S>
Eight of the
prox. (P), or
above ccts. P,V,A ID
seismic (S),
or accel (A), TMR
or velomiter N28V
JT1
Applications
S J3
(V) N28V
CL JP1B
Negative Same as
25 N24V9 Volt Ref <T>
S
P 26 PR09H ID
R S
JA1
O 27 PR09L D
S
X B2
Four of the 5
above ccts. Buffer
Position Amplifiers
prox PCOM JB1 J4
D
B2
N28V 5
Buffer P1-P8 JC1 J4

CL Amplifiers D
B2
37 N24V13 5
S
P 38 PR13H
R S
O 39 PR13L P9-P12
S BNC JD1
X J4
Buffer Connectors D
Reference or Amplifiers B9
PCOM
keyphasor
prox. One of the above ccts for Mark VI
(Two of the above ccts for B/N
interface) P13-P14
Four cables to Bently
Nevada 3500 system
TVIB Board, Vibration Probes, and Bently Nevada Interface

Specifications
Item Specification
Number of Channels 13 probes: 8 vibration, 4 position, 1 Keyphasor
Probe Type Measurement Range Accuracy
Proximity Displacement 0 to 4.5 V pp 0 .030 V pp
5 to 200 Hz
Displacement 0 to 4.5 V pp 0 .150 V pp
200 to 500 Hz
Seismic Velocity 0 to 2.25 V p Max [2% reading, 0.008
5 to 200 Hz Vp]
Velocity 0 to 2.25 V p
200 to 500 Hz Max [5% reading, 0.008
Vp]
Velomitor Velocity 0 to 2.25 V p Max [2% reading, 0.008
5 to 200 Hz Vp]
Velocity 0 to 2.25 V p
200 to 500 Hz Max [5% reading, 0.008
Vp]
Accelerometer Velocity (track filter) 0 to 2.25 V p 0 .015 Vp
10 to 233 Hz
Position Position -.5 to -20 V dc 0.2 V dc
Air gap (average)
Phase Degrees
0 to 360 degrees 2 degrees
Up to 14,000 rpm
(1X vibration component with respect
to key slot)
Buffered outputs Amplitude accuracy is 0.1% for signal to Bently Nevada* 3500 vibration analysis system

Diagnostics
Diagnostic tests are performed on the terminal board components by VVIB as follows:
Diagnostics perform a high/low (hardware) limit check on the probe input signals
and a high/low system (software) limit check. These limits create faults.
A probe fault, alarm, or trip condition will occur if either of an X or Y probe pair
exceeds its limits.
position indication. If a maximum limit is exceeded a fault is created.
Fourteen BNC connectors on TVIB provide buffered signals available to portable data
gathering equipment for predictive maintenance purposes. Buffered outputs have unity
gain, 10 internal impedance, and can drive loads up to 1500 .
Configuration
Jumpers JP1A through JP8A select the type of the first eight probes as follows:
S = Seismic
V = Velocity
P = Proximity
A = Accelerometer
Refer to the Installation section for more information.

DVIB Simplex Vibration Input
The Simplex Vibration Input (DVIB) terminal board is a compact vibration terminal
board for DIN-rail mounting. It is designed to meet UL 1604 specification for operation
in a 65C Class 1, Division 2 environment. DVIB accepts 13 vibration probes, including
8 vibration inputs, 4 position inputs, and 1 Keyphasor input. It connects to the VVIB
processor board with a 37-pin cable identical to those used on the larger TVIB terminal
board. VVIB accommodates two DVIB boards.
Note Only a simplex version is available.
Installation
Mount the plastic holder on the DIN-rail and slide the DVIB board into place. Connect
the wires for the vibration probes to the terminal block, which has 42 terminals. Typically
#18 AWG shielded twisted triplet wiring is used. Two screws, 41 and 42, are provided
for the SCOM (ground) connection, which should be as short distance as possible.

DIN Vibration Terminal Board
DVIB

JP1A
V P 1 N24V01
PR01 (H) 2
S 3 PR01 (L)
N24V02 4
5 PR02 (H)
37-pin "D" shell JP2A PR02 (L) 6 7 N24V03
connector with latching JR1 V P PR03 (H) 8
S 9 PR03 (L)
fasteners N24V04 10 Vib
11 PR04 (H)
JP3A PR04 (L) 12
V P 13 IN24V05 1-8
PR05 (H) 14
S 15 PR05 (L)
N24V06 16
JP4A 17 PR06 (H)
PR06 (L) 18
V P 19 N24V07
PR07 (H) 20
S 21 PR07 (L)
N24V08 22
JP5A PR08 (L) 23 PR08 (H)
24
V P 25 N24V09
PR09 (H) 26
S 27 PR09 (L)
N24V10 28 Pos
JP6A 29 PR10 (H)
PR10 (L) 30 1-4
V P 31 N24V11
PR11 (H) 32
Cable to J3 S 33 PR11 (L)
N24V12 34
connector in I/O JP7A 35 PR12 (H)
PR12 (L) 36
rack for the VVIB V P 37 N24V13 Ref
PR13 (H) 38 39 PR13 (L)
board S probe
40
JP8A SCOM 41 SCOM
42
V P
S
SCOM
Euro-Block type
terminal block
Plastic mounting
DIN-rail mounting holder
DVIB Wiring and Cabling

Operation
The eight vibration inputs on each DVIB can be applied as either Proximitor,
accelerometer, seismic (velocity), or Velomitor inputs. Jumpers on DVIB assign a
specific vibration sensor type to each input point, with the seismic type assigned to point
(S), the Velomitor type assigned to point (V), and the Proximitor and accelerometer
types sharing point (P/A). The Proximitor reads a shaft keyway to generate a once per
revolution Keyphasor input for phase angle reference.
On DVIB, the high frequency decoupling to ground on all signals is the same as on
TVIB. An on-board ID chip identifies the board to VVIB for system diagnostic purposes.
<R>
Vibration Board
DVIB Board VVIB
JR1 J3
N28V 28Vdc
To
N28VR controller
Amp A/D
Current
limit ID Sampling
1 N24V1
S CL type A/D
S (16-bit)
R S V 3mA
O S
3 PR01L JP1A P,A
X S
Vib. or pos.
Eight of the PCOM
prox. (P), or
above circuits P28V
seismic (S),
or accel (A),
N28V
or velomiter
(V)
CL
25 N24V9
S
P 26 PR09H
R S
O 27 PR09L J4
S
X Four of the
Position above circuits
Prox PCOM
N28V
CL
37 N24V13
S
P 38 PR13H
R S
O 39 PR13L
S
X
Reference or PCOM
peyPhasor
prox.
DVIB Terminal Board

Specifications
Item Specification
Number of Channels 13 probes: 8 vibration, 4 position, 1 Keyphasor
Probe Type Measurement Range Accuracy
Proximity Displacement 0 to 4.5 V pp 0 .030 V pp
5 to 200 Hz
Displacement 0 to 4.5 V pp 0 .150 V pp
200 to 500 Hz
Seismic Velocity 0 to 2.25 V p Max [2% reading, 0.008 Vp]
5 to 200 Hz
Velocity 0 to 2.25 V p Max [5% reading, 0.008 Vp]
200 to 500 Hz
Velomitor Velocity 0 to 2.25 V p Max [2% reading, 0.008 Vp]
5 to 200 Hz
Velocity 0 to 2.25 V p Max [5% reading, 0.008 Vp]
200 to 500 Hz
Accelerometer Velocity (track filter) 0 to 2.25 V p 0 .015 Vp
10 to 233 Hz
Position Position -.5 to -20 V dc 0.2 V dc
Air gap (average)
Phase Degrees
0 to 360 degrees 2 degrees
Up to 14,000 rpm
(1X vibration component with
respect to key slot)
Buffered outputs Amplitude accuracy is 0.1% for signal to Bently Nevada* 3500 vibration analysis system

Diagnostics
Diagnostic tests are performed on the terminal board components by VVIB as follows:
Diagnostics perform a high/low (hardware) limit check on the probe input signals
and a high/low system (software) limit check. These limits create faults.
A probe fault, alarm, or trip condition occurs if either of an X or Y probe pair
exceeds its limits.
position indication. If a maximum limit is exceeded a fault is created.
Buffered signals for portable data gathering equipment or external vibration analysis
equipment are not available as with the TVIB board.
Configuration
Jumpers JP1A through JP8A select the type of the first eight probes as follows:
S = Seismic
V = Velocity
P = Proximity
A = Accelerometer
Refer to the Installation section for more information.

Power Conditioning Board (TTPW)
TTPW Power Conditioning
The Power Conditioning (TTPWH1A) terminal board power conditioning board provides
branch circuit protection and distribution between one or more Mark* VI rack mounted
+28 V dc power supplies and discrete wiring to peripheral devices. The H1A has three
2-pin inputs for +28 V dc from the Mark VI power supply. It provides diode OR selection
between the three inputs to power the +28 V dc outputs. Outputs are rated 22 30 V
dc, 0 0.25 A individually and capable of parallel operation. There is high frequency
isolation between the inputs and the outputs and the voltage drop is less than +4 V dc
when delivering rated current.
<R>
Power
VME rack supply
PL2
PS28C PL3
"Isolation" PS28C
<S>
Power TB2
T Nine 0.25 A
VME rack supply P1
T outputs
PL2
P2 P
PL3 W
PS28C P3
PS28C T
"Isolation"
TB1 B
Discret A
<T> ewiring I
Power
Monitoring
VME rack supply
PL2
PL3
PS28C
PS28C
"Isolation"
TTPWH1A Application Diagram
19-1 Power Conditioning Board (TTPW) GEH-6421Q Mark* VI Control

Large steam turbines use 24 V dc electrical trip solenoid valves (ETSV). Power for
these valves is provided to the TRPL and TREL trip boards by a power transition board
TTPW. Wiring from the rack power supplies, through TTPW, to the trip board is shown
in the figure.
<R>
Power Single ETSV Applications:
VME rack supply
PL2
PS28C PL3
"Isolation" PS28C
<S>
Power
VME rack supply P1
T JA1 PwrA JP1 T
PL2 T R
P2 P P
PL3 W
PS28C P3 L ETSV
PS28C T
"Isolation"
B
Discret A
<T> ewiring I T
Power R
Monitoring
VME rack supply E
PL2 L
PL3
PS28C
PS28C
"Isolation"
Double ETSV Applications:

<R>
Power P1 T JA1 PwrA
VME rack supply
T
PL2 P
PL3 W
PS28C
"Isolation" PS28C T
B
A T
<S> I JP1 R
Power Monitoring P
JP2
VME rack supply L ETSV1 ETSV2
PL2 P2 T JA1 PwrB
T
PL3 P
PS28C T
"Isolation" PS28C W R
T E
<T> B L
A
Power I
VME rack supply Monitoring
PL2
PS28C PL3
"Isolation" PS28C
TTPWG1B Wiring to the ETSV
GEH-6421Q System Guide, Volume II Power Conditioning Board (TTPW) 19-2

Installation
TTPWG1B
Three 28 V dc supplies are wired from I/O racks R, S, and T to plugs P1, P2, and P3.
The primary 28 V dc output comes from plug JA1 and is wired to the trip board TRPL.
The power monitoring signals are wired to the top terminal block (TB1) and go to an
analog input board. The secondary voltage outputs are wired to the lower terminal block
(TB2) as shown in the following figure.
Power Conditioning Board TTPWG1B
28 V power from
racks R, S, T
x
x 1 P1 P28R
x 2 1
x 3 PCOM (Sig) (R)
PCOM (Gnd) x 4 2 PCOM
x 5
x 6
P28R (Gnd) x 8
x 7 P28R (Sig) P2
x 9 1 P28S
x 10 (S)
x 11 P28S (Sig) Monitoring 2 PCOM
P28S (Gnd) x 12
x 13 signals to
x 14
x 15 P28T (Sig) TBAI board P3
P28T (Gnd) x 16 1 P28T
x 17 (T)
x 18 PCOM
x 19 P28V (Sig) 2
P28V (Gnd) x 20
x 21
x 22
x 23
x 24
x 28 V power to
TRPL trip board
x
x 25 P28V1 (Pos) JA1 1 P28V
P28V1 (Neg) x 26
x 27 P28V2 (Pos) (P28V)
P28V2 (Neg) x 28 2 PCOM
x 29
x 30
P28V3 (Neg)
x 31 P28V3 (Pos)
x 32 Power
x 33 P28V4 (Pos)
P28V4 (Neg) x 34 outputs
P28V5 (Neg) x 36
x 35 P28V5 (Pos)
P28V6 (Neg) x 38
x 37 P28V6 (Pos)
x 39
x 40
x 41
x 42
x 43
x 44
x 45
x 46
x 47
x 48
x
TTPWG1B Board with Wiring and Cabling

TTPWH1A
Three 28 V dc supplies are wired from I/O racks R, S, and T to plugs P1, P2, and P3.
The power monitoring signals are wired to the top terminal block (TB1) and go to an
analog input board. The secondary voltage outputs are wired to the lower terminal block
(TB2) as shown in the following figure.
Power Conditioning Board TTPWH1A
28 V power from
racks R, S, T
x
x 1 P1 P28R
x 2 1
x 3 PCOM (Sig) (R)
PCOM (Gnd) x 4 2 PCOM
x 5
x 6
P28R (Gnd) x 8
x 7 P28R (Sig) P2
x 9 1 P28S
x 10 (S)
x 11 P28S (Sig) Monitoring 2 PCOM
P28S (Gnd) x 12
x 13 signals to
x 14
x 15 P28T (Sig) TBAI board P3
P28T (Gnd) x 16 1 P28T
x 17 (T)
x 18 PCOM
x 19 P28V (Sig) 2
P28V (Gnd) x 20
x 21
x 22
x 23
x 24
x
P28V1 (Neg) x 26
x 25 P28V1 (Pos)
x 27 P28V2 (Pos)
P28V2 (Neg) x 28
P28V3 (Neg) x 29 P28V3 (Pos)
x 30
P28V4 (Neg)
x 31 P28V4 (Pos)
x 32
x 33 P28V5 (Pos) Power
P28V5 (Neg) x 34
x 35 P28V6 (Pos) outputs
P28V6 (Neg) x 36
P28V7 (Neg) x 38
x 37 P28V7 (Pos)
P28V8 (Neg) x 39 P28V8 (Pos)
x 40
x 41 P28V9 (Pos)
P28V9 (Neg) x 42
x 43
x 44
x 45
x 46
x 47
x 48
x
TTPWH1A Wiring and Cabling Diagram

Operation
TTPWG1B
The turbine ETSV is a 24 V dc device with a 24 watt, 20-22 ohm coil. Power is supplied
from the three I/O rack supplies to TTPWG1B, where the three 28 V supplies are diode
ORed to produce a single 28 V dc output. The primary output is 0 - 2 A (total), 22 - 30 V
dc, and there are four secondary outputs of 0.25 A each.
P1 P2 P3
TTPWG1B 2 1 2 1 2 1
Power Supply Monitoring

PCOM
(screw compatible to TBAI)
100k PCOM
Sig 3
PCOM 4 10k
Gnd P28R
P28S
SCOM
100k P28T
Sig 7
P28R 8
Gnd 10k
SCOM 100k
Sig 11
P28S Gnd 12 10k
100k
15 SCOM P28V
Sig
P28T Gnd
16 10k
SCOM 100k
Sig 19
P28V Gnd 20 10k Bus voltage
centering bridge
SCOM 1k 1k
Peripheral Power Outputs

22 - 30 V dc, 2.0 A total SCOM
25 P28V
(+)
P28V1 (-) 26
2.0 A
27 SCOM
(total) P28V2 (+) 28
(-)
1
To TRPL
2
JA1
(+) 31
P28V3 32
(-)
33
0.25 A P28V4 (+) 34
(-)
outputs
(each) (+) 35
P28V5 (-) 36
(+) 37
P28V6 38
(-)
PCOM PCOM
TTPWG1B Board Diagram

TTPWH1A
The TTPWH1A power conditioning board provides branch circuit protection and
distribution between one or more Mark VI rack mounted +28 V dc power supplies and
discrete wiring to peripheral devices. The H1A has three 2-pin inputs for +28 V dc from
the Mark VI power supply. It provides diode or selection between the three inputs to
power the +28 V dc outputs. Outputs are rated 22 30 V dc, 0 0.25 A individually and
capable of parallel operation. There is high frequency isolation between the inputs and
the outputs and the voltage drop is less than +4 V dc when delivering rated current.
Typical applications power the H1A from the P28C output of the VME rack power
supply. When this is done, the isolation jumper on the rack is placed in the isolated
position removing all connections between the P28C output and the rack. The
TTPWH1A then provides a resistive bridge to ground to center the power circuit with
respect to ground. Voltage feedback monitoring signals are provided using 0.1% resistors
allowing monitoring of three input voltages, output voltage, and voltage between PCOM
and SCOM.
Note The TTPWH1A internal signal paths are shown in the figure. Nine current limited
0.25 A outputs are provided and may be paralleled for higher current applications.
The +28 V dc power source should have an isolated common (return), especially if
the load is external to the cabinet and is grounded. The rack power supplies are wired
through TTPWH1A to the trip board.

P1 P2 P3
2 1 2 1 2 1
TTPWH1A
Power Supply PCOM
Monitoring
3 100k PCOM
PCOM 4 10k
P28R
P28S
SCOM P28T
7 100k
P28R 8
10k
11 SCOM 100k
P28S 12 10k
100k
15 SCOM
P28T 16 10k
19 100k Bus voltage

P28V 20 10k
centering
bridge
SCOM 1k 1k
SCOM
Peripheral
power 25
P28V
26
SCOM
27
22 - 30 V dc 28
0.25 A each
29
30
31
32
33
34
35
36
37
38
39
40
41
42 PCOM
TTPWH1A Board Diagram

Specifications
TTPWH1A Specification
Item Description
Inputs Three 28 V dc inputs from the VME rack power supplies
Outputs Nine current limited outputs of 0.25 A, 22 30 V dc, 28 V dc nom.
Monitoring Three 28 V dc inputs
Output 28 V dc power
PCOM voltage
Accuracy Resistors in measuring circuits are 0.1%
TTPWG1B Specification
Item Description
Inputs Three 28 V dc inputs from the VME rack power supplies
Outputs Three outputs with total of 2.0 A, 22 30 V dc, 28 V dc nom. (to TRPL board).
Four current limited outputs of 0.25 A, 22 30 V dc, 28 V dc nom
Monitoring Three 28 V dc inputs
Output 28 V dc power
PCOM voltage
Accuracy Resistors in measuring circuits are 0.1%
Diagnostics
The five monitored voltages are wired to an analog input terminal board, TBAI. The I/O
processor board, VAIC, creates a fault if an input signal goes out of configured limits,
either high or low.
Configuration
There are no switches or jumpers on the power conditioning boards. On the VME rack
power supply, place the P28C isolation jumper in the isolated position.
Alarms
The alarms associated with this board depend on system use of the feedback signals.

Rack Power Supply (VME)
VME Rack Power Supply
The Mark* VI VME rack power supply mounts on the side of the VME control and
interface racks. It supplies +5, 12, 15, and 28 V dc to the VME backplane, and an
optional 335 V dc output for powering flame detectors connected to TRPG.
Two supply input voltage selections are available. There is a 125 V dc input supply that
is powered from a Power Distribution Module (PDM) and a low voltage version for
24 V dc operation.
Note A different power supply is used on the stand-alone control rack which only
powers the Mark VI controller, VDSK, and VCMI.
20-1 Rack Power Supply (VME) GEH-6421Q Mark* VI Control

PSA PSB
POWER
SUPPLY
PULL TO TOGGLE
1 (ON)
SWITCH
0 (OFF)
GREEN LED NORMAL
RED LED FAULT
YELLOW LED AVAILABLE
REV. NO.
GE CAT. NO.
S/N
A82 SP B82 SP C82 SP 533 SP 42 SPr o 521 SP

IS2020LVPSG1
and
IS2020RKPSG1
T AT SSP 82 SP 533 SP 42 SPr o 521 SP

IS2020LVPSG2 -4
and
IS2020RKPSG2-3
VME Rack Power Supply types G1 and G2, Front, Side, and Bottom Views
GEH-6421Q System Guide, Volume II Rack Power Supply (VME) 20-2

IS2020RKPSG1 & IS2020LVPSG1
125/24VDC Input P335VDC 3 2 1 To safety Ground
Control
+
IS2020RKPSG1 On/Off 400 W Output Ret
Power
125V Input Power Supplies
yl ppu S
Suppression switch
Red Fault
PS28C
PS125
P125 2 + 3
V521 mor F
Suppression
Yellow Avail 2
N125 1 OV Protect 1
+
3 Green Normal
NC PS28A
V533 P
W86. 1
4 UV Detect RKPSG1 335V + 3
ci goL
2
t eR
1
yl ppu S
P24 3 125 or 24V OV Faults
N24 2 Power PS28B
V42 mor F
Enable
1 + 3
2
PS24 1
l ort no C el ban E
P5.0V P12V N12V P15V N15V N28V P28V (A) P28V (B) P28V (C) P28V (D) P28V (E)
75 W x 2 50 W 25 W 50 W 50 W 25 W 50 W 50 W 50 W 50 W 50 W
+ s s Ret + Ret - Ret + Ret - Ret - Ret + Ret + Ret + Ret + Ret + Ret
20-3 Rack Power Supply (VME)

Suppression Suppression Suppression Suppression Suppression Suppression Suppression Suppression Suppression Suppression
OV Protect OV Protect OV Protect OV Protect OV Protect OV Protect OV Protect OV Protect OV Protect OV Protect
t upnI V42
Suppression
OV Protect
1 GSPVL0202 SI
PSB PSA
24,28,32,20 18,22,26,30 16 14 12 10 8 6 32 30 28 26 24 22 20 18 16 14 12 10 8 6
IS2020RKPSG2 & G3 3 2 1
PSSTAT 1 2 3 4 P335VDC
125V Input Control To safety Ground
+
Power On/Off Ret
yl ppu S
Suppression switch
PS125 Red Fault
P125 2
V521 mor F
Suppression
Yellow Avail
N125 1
1 T AT S
2 T AT S
OV Protect
DI DNGI GSDIDI
+
3 Green Normal
NC
RKPSG2 & LVPSG4
V533 P
W86. 1
4 UV Detect
ci goL 335V Option
t eR
IS2020RKPSG2- 3 & IS2020RKPSG2- 3
yl ppu S
P24 3
125/24VDC Input
N24 2
V42 mor F
125 or 24V Enable/Status 300/400 W Output RKPSG2 & LVPSG2
1 Power Supplies 400W Option
Power
PS24
l ort no C el ban E
P5.0V P12V N12V P15V N15V N28V P28V (A) P28V (B) P28V (C) P28V (D)
150 W 25 W 10 W 100 W 100 W 50 W 100 W 100 W 100 W 100 W
+ s s Ret + Ret - Ret + Ret - Ret - Ret + Ret + Ret + Ret + Ret
Block Diagram of RKPS and LVPS versions of VME Power Supply

IS2020LVPSG2,
G3 & G4 Suppression Suppression Suppression Suppression Suppression Suppression Suppression Suppression
24V Input OV Protect OV Protect OV Protect OV Protect OV Protect Suppression OV Protect OV Protect OV Protect
OV Protect
PS28
Suppression
3
OV Protect 2
1
PSB PSA
24,28,32 20 18 22,26,30 16 14 12 10 8 6 32 30 28 26 24 22 20 18 16 14 12 10 8 6

There are currently seven major variations of the VME rack power supply. These
variations provide different power supply input and output requirements. The following
table defines these variations.
IS2020 Part Input Output +28V PSA +28V PS335 Status ID Support
Number Voltage Rating Outputs Remote Output Output Redundant
Outputs Operation
LVPSG1 24 V dc 400W Qty. 5 Qty. 3 No No No
RKPSG1 125 V dc 400W Qty. 5 Qty. 3 Yes No No
RKPSG2* 125 V dc 400W Qty. 5 Qty. 1 Yes Yes Yes
RKPSG3* 125 V dc 400W Qty. 5 Qty. 1 No Yes Yes
LVPSG2* 24 V dc 400W Qty. 5 Qty. 1 No Yes Yes
LVPSG3* 24 V dc 300W Qty. 3 None No Yes Yes
LVPSG4* 24 V dc 300W Qty. 3 None Yes Yes Yes
* Newer design power supplies

With the exception of the number of remote 28 V outputs, the RKPSG2 and LVPSG2
are designed to be direct replacements for the RKPSG1 and LVPSG1 respectively.
These two supplies have been replaced with the newer designs (marked with asterisk
in the table above).
Installation
The power supply is mounted to the right-hand side of the VME rack on a sheet metal
bracket. The dc input, 28 V dc output, and 335 V dc output connections are at the
bottom. The newer design also has a status connector on the bottom. Two connectors,
PSA and PSB, at the top of the assembly mate with a cable harness carrying power
to the VME rack.
Each of the five 28 V dc power modules supplies a section of the VME rack. These
sections are labeled A, B, C, D, E, and F. The P28C output or PS28 at the bottom of
the power supply can be used to power an external peripheral device. To do this the
jumper plug shown on the bracket to the left of the rack must be moved from the Normal
position to the Isolated position below.
The fan is only used when the controller is mounted in the rack. It is powered from the
top connector on the same bracket, located on the left side of the rack.
To prevent electric shock, turn off power to the RPSM to be

replaced, then test to verify that no power exists on the module
before touching it or any connected circuits.
To prevent equipment damage, do not remove, insert, or adjust

any connections while power is applied to the equipment.

Power cables to
VME chassis
5 slots - A 4 slots - B 4 slots - C 4 slots - D 4 slots - E
Fan
+24 V x x x x x x x x x x x x x x x x x x x PSA
to fan, used PSB
with controller Power
Supply
Plug position
P28 normal
Plug position
P28 isolated
VME chassis,
21 slots for I/O
and control, or x x x x x x x x x x x x x x x x x x x x x
for just I/O
J301
Power supply
Testpoints
GND
Rack Ethernet
ID plug 125
V dc
input
from
P28C power to external PDM
peripheral device (move
Cable from
plug from normal to 335 V dc
PDM monitor
isolated position)
Power Supply, VME Chassis, and Cabling to External Devices

To remove the power supply
1. Loosen the PSA/PSB bracket captive fastener at the top front of the module.
2. Separate the PSA/PSB bracket assembly from the RPSM.
3. Disconnect the bottom connectors.
4. Loosen the two front sheet metal bracket captive fasteners.
5. Pull the sheet metal bracket/power module assembly forward, disconnect the four
rear side connectors and then slide the assembly off of the control rack.
6. Remove the four mounting screws that hold the RPSM to the bracket and remove it.
Note Reinstall the screws and bracket on the control rack if a replacement module is
not going to be installed.

To install the power supply
1. Locate the supply mounting sheet metal bracket and four mounting screws.
2. Position the module on the bracket with the front of the module at the captive
fasteners, then install the four mounting screws and tighten.
3. Slide the module bracket assembly on to the control rack, connect the four rear side
connectors and then push the assembly in to tighten the two front captive fasteners.
4. Slide the PSA/PSB assembly rear tab into the slot on the bracket located at the
top rear of the RPSM.
5. Push the connector assemble into the mating connectors on the top of the RPSM.
6. Tighten the PSA/PSB bracket captive fastener.
7. Connect the power supply bottom connectors.

23
PIN32 5V 03
PIN30 5V RET 82
PIN28 5V 62
PIN26 5V RET
PIN24 5V 42
PIN22 5V RET 22
PSB
PIN20 5V 02
PIN18 5V RET 81
PIN16 +12V 61
PIN14 RET 41
PIN12 -12V 21
PIN10 RET 01
PIN8 +15V 8
PIN6 RET 6
PIN4 N/C 4
PIN2 N/C
PIN32 -15V 23
PIN30 RET 03
PIN28 -28V 82
PIN26 RET 62
PIN24 28VA 42
PIN22 RET 22
PIN20 28VB
PSA
02
PIN18 RET 81
PIN16 28VC 61
PIN14 RET 41
PIN12 28VD 21
PIN10 RET 01
PIN8 28VE 8
PIN6 RET 6
PIN4 N/C 4
PIN2 N/C
Power Supply, Top Connectors

IS2020LVPSG1 IS2020LVPSG2 - 4
and and
IS2020RKPSG1 IS2020RKPSG2 - 3
PS24
GND
RETURN
CIRCUIT
PS125 or PS24
PS125 or PS24
+24VDC
NO.1
PS125
RETURN
+125VDC
N/C
CIRCUIT
GND
NO.1
PS335
PS335
PS335
RETURN
GND
+335VDC
CIRCUIT
NO.1
PS28C
PS28
PS28 &
PS28A-C
RETURN
GND
+28VDC
CIRCUIT
NO.1
PS28B
STAT2
IDGND
NO.4
NO.2
PSSTAT
PSSTAT
PS28A
STAT1
IDSIG
NO.3
NO.1
WITH STAR WASHER

1/4 X 20 STUD
AND TWO (2)

JAM NUTS
Power Supply, Bottom Connectors

Operation
The VME Rack power supply has only one user control, the power switch, and three
status LED indicators. The power switch provides front-panel control of the power
supply output voltages and when toggled serves as a fault reset. The yellow, red and
green LEDs indicate the status of the input power, fault presence, and normal operation.
Note Newer supply designs also have a status output that mimics the status of the green
LED and an ID output that uniquely identifies the supply back to the system.
Power Switch
The front panel power switch is a locking type that must be pulled out to change position.
This switch is a low voltage control to enable or disable the output voltages. If the red
LED is ON indicating a fault condition the power switch can be toggled OFF and then
back ON again to clear the fault. The fault will only be cleared if the condition that
caused it no longer exists.
Yellow LED
When the power switch is OFF the yellow LED will indicate the status of the input
power. If this LED is ON there is power present on the supply input connector. For
the newer design, the yellow LED will only turn ON if the input voltage is above the
input under-voltage fault threshold.
Red LED
This LED will only be ON if there is input power, the power switch is ON, and a fault
has been detected.
Green LED/Status Output
If there is input power, the power switch is ON, and there are no detectable faults,
the Green LED will be ON. The newer designs also have a status output that mimics
the status of this LED. The status output is a NO solid-state relay contact that will be
CLOSED when the green LED is ON.
Fault Conditions
There are three classes of power supply faults:
Those that transiently shutdown an output
Those that require some reset action to clear
Permanent failures that require the replacement of the supply.
This section describes the first two fault classes and assumes the cause of the fault
is external. For a detailed fault diagnostics, refer to the section, Diagnostics and
Troubleshooting.
Note When the external condition causing the current limit condition is corrected,
the output voltage will return to normal.

If an overcurrent condition exists on an output, the voltage on that output will fold back
as required to maintain the constant current limit output. For every output other than the
5 V supply, this condition is not detectable at the supply and the green LED will remain
ON. Detection of a low output voltage due to excessive output current has to be detected
at the system level through the power supply voltage monitoring. The newer design also
has an over temperature monitor of the output modules and a current limit detector on
the optional 335V supply. These additional fault detectors may cause the red LED to
come on when an output is in current limit but the red LED will also go out when the
output voltage returns to normal.
The 5 V current limit is a special case due to the 5 V under-voltage detector. If the
current limit causes the 5 V output voltage to fold back below the UV threshold, all of
the other outputs will be disabled until the 5 V output voltage returns to a voltage above
the UV threshold.
All of the other faults will shut down one or all of the outputs until the external cause of
the fault condition is removed and the supply is reset. A reset can be initiated through
the front panel power switch or by removing and reapplying input power to the supply.
Output over-voltage faults on the newer design require the removal of input power for a
minimum of one minute to reset the fault once the source of the fault has been removed.
Below is a power supply fault summary.
Input under-voltage (Latched)
Input over-voltage (Newer Design Only)
P5 output under-voltage
Output over-voltage (Latched)
Over temperature (Newer Design Only)
The following figure shows the power supply connections to the VME rack and the
distribution of the power supply outputs.

* PS28 or PS28C Configuration:
Note: The power supply PS28 or PS28C may be

isolated from the I/O rack for external use. One plug,
two positions Normal (PL2), Isolation (PS3), for
selection; Plug is located on left side of rack (from the
front). P28A and P28B are for internal cabinet use only,
Input power
notto go outside of the cabinet.

Power Supply
PS335 PS28A PS28B *PS28 or
PS125 or *PS28C
PS24 Remote
28V
IS2020RKPSG1 - 3 or IS2020LVPSG1 - 4
To safety ground
PSB PSA
24,28,32,20 18,22,26,30 16 14 12 10 8 6 32 30 28 26 24 22 20 18 16 14 12 10 8 6
P28C
P28D
P28A
P28B
P28E
N15
N28
Ret
Ret
Ret
Ret
Ret
Ret
Ret
N12
P12
P15
P5
P5
P5
P5
Ret
Ret
Ret
Ret
Ret
Ret
Ret
VME Rack
P5 P5
P28A DCOM DCOM
1
Fan P12 P12
2
Power N12 N12
PL1 PCOM
s
1 P15 P15
*PS28C 2
"Normal" 3 s
ACOM ACOM
21 Slot Only
4 PL2
s
1 N15 N15
*PS28C 2
s
"Isolation" 3
4
PL3
PL2
Test Pts
P15 N15
PL3
ACOM P28AA
P28BB
P28CC s s s s s s
P28DD
P28A P28B P28C P28D P28E
P28EE
PCOM
N28
DCOM s s s s s s
SCOM PCOM PCOM
N28 N28
SCOM SCOM
J5
Ether IO
Slots 1 thru 5 Slots 6 thru 9 Slots 10 thru 13 Slots 14 thru 17 Slots 18 thru 21
SCOM
I/O 21 slot rack only
The symbol, s represents a "pi" suppression filter: Note: SCOM must be connected to ground via therack
scom mounting hardware, metal to metal conductivity, to the
mounting base and hence to ground.
VME I/O Rack Power Supply and Cables

Specifications
Item Description
Input voltage
125 V input 70 V to 145 V dc floating supply Up to 10 V pp ripple
24 V input 18.5 V to 32 V dc floating supply Up to 2 V pp ripple
Input under-voltage Under-voltage protection provided to prevent supply operation when the input voltage is
below the minimum operating level.
Input over-voltage* Over-voltage protection provided to prevent supply operation when the input voltage is
above the maximum operating level.
Isolation True isolation from input to output, 1500 V
Output voltages Output Voltage Voltage Regulation Capacity Typical Over
Voltage
For the RKPSG1 and P5 +5 V dc Less than 3% 150 W 120% 5%
LVPSG1 supplies
P15 +15 V dc Less than 3% 50 W 120% 5%
N15 -15 V dc Less than 3% 50 W 120% 5%
P12 +12 V dc Less than 3% 50 W 120% 5%
N12 -12 V dc Less than 3% 25 W 120% 5%
P28 +28 V dc Less than 5% 50 W 120% 5%
N28 -28 V dc Less than 5% 25 W 120% 5%
P335 +335 V dc Less than 5% 1.68 W 110% to 120%
For the RKPSG2 -3 and P5 +5 V dc Less than 3% 150 W 130% 5%
LVPSG2 - 4 supplies*
P15 +15.35 V dc Less than 3% 100 W 120% 5%
Note: P5 on these supplies
has remote voltage sensing. N15 -15.35 V dc Less than 3% 100 W 120% 5%
P12 +12.3 V dc Less than 3% 25 W 120% 5%
N12 -12.3 V dc Less than 3% 10 W 120% 5%
P28 +28 V dc Less than 5% 100 W 120% 5%
N28 -28 V dc Less than 5% 50 W 120% 5%
P335 +335 V dc Less than 5% 1.68 W 110% to 120%
Power sequencing The 5 V dc supply comes up first, then all the others
Total Output Maximum of 400 W
Total output LVPSG3 & 4 Maximum of 300 W
only*
Short circuit Short circuit protection on all power supplies, with self-recovery.
Note: A 5 V short circuit on the new design will cause a latched fault.
Temperature Ambient air convection cooling 0 to 60C
Indicating lights Green: Normal Status is OK
Red: Fault Power is applied, but one or more outputs off due to a fault.
Yellow: Available Power is applied, but switch is OFF
Status output* NO SSR contact .5 A @ 55 V dc - Closed when the green indicating light is on
ID tag output* Dallas DS2502 output. 2502 data = Week and year tested, unit number, part number
and revision

Item Description
*Only pertain to the newer design power supplies
Diagnostics
Incoming and outgoing voltages and currents are monitored for control and protection
purposes. If the red LED is ON, this is not a direct indication that the power supply has
failed and has to be replaced. The LED ON could indicate that something is wrong in
the system and the fault LED is latched on. The following is a description of the power
supply parameters that are monitored and the conditions that can cause faults.
Input Under-voltage (below the minimum operating voltage)
The input voltage has to be above the under-voltage threshold or operation of the supply
will be inhibited. For the newer design this is indicated by no LEDs ON. The red LED
will come ON and remain on until the input voltage is above the under-voltage threshold
and the power switch is toggled. If an under-voltage fault occurs during normal operation,
the outputs will be disabled and the red LED will come ON and remain ON until the
input voltage is above the under-voltage threshold and the power switch is toggled.
Note If the supply power switch is turned on in this condition there will be no output
voltages.
Input Over-voltage (newer design above maximum operating voltage)

If the supply power switch is turned on in this condition there, will be no output voltages
and the red LED will come ON and remain on until the input voltage is below the
over-voltage threshold and the power switch is toggled. If an over-voltage fault occurs
during normal operation, the outputs will be disabled and the red LED will come ON
and remain ON until the input voltage is below the over voltage threshold and the power
switch is toggled.
Note The input voltage has to be below the over-voltage threshold or operation of the
supply will be inhibited and the yellow LED will be ON.
5 V Output Under-voltage (typically below 4.7 V)

The P5 output voltage has to be above the under-voltage threshold or operation of the
supply will be inhibited, all supply outputs will be turned off, and the red LED will
be ON. If an under-voltage fault occurs during normal operation, the outputs will be
disabled and the red LED will come ON and remain ON until the output voltage is
above the under-voltage threshold.
5 V Output Over-voltage (typically above 6 V)
The P5 output voltage has to be below the over-voltage threshold or operation of the
supply will be inhibited. All supply outputs will be latched OFF and the red LED will be
ON until the power switch is toggled. For the newer design, this fault must be reset by
removing input power to the supply (wait for one minute and re-apply input power).

Output Over-voltage other than P5 (typically above 120%)
The output voltage has to be below the over-voltage threshold or operation of the supply
output that is above the threshold will be inhibited (latched OFF) until the power switch
is toggled. The red LED will be ON during this fault. For the newer design, this fault
must be reset by removing input power to the supply (wait for one minute and re-apply
input power).
Output Over-temperature (newer design typically above 100 degrees C)
The modules that supply the output voltage have to be operated below the
over-temperature threshold. A specific supply output module operated above the
threshold will be inhibited until the temperature is lowered below the threshold. The red
LED will be ON during this fault. An over-temperature of the 5 V module will cause a
5 V under-voltage fault.
Troubleshooting
The supply has no field serviceable components. If a supply is found to be defective it
must be replaced. The power supply cover should not be removed in the field.
There are only two indications of a problem on the power supply itself. A problem is
indicated when there are no LEDs ON or the red LED is ON. Both conditions will be
annunciated on the newer designs through the status output.
No LEDs ON is a good indication of an input voltage problem or a defective supply. If
the red LED is ON, the cause could be any of the fault conditions listed above or a
defective supply. Below is a list of troubleshooting hints.
Note Over-voltage faults on the newer design must be reset by removing input power to
the supply, waiting for one minute, and re-applying input power.
No LEDs ON
Verify that the input connector and voltage to the supply are correct. If they are, then
replace the supply. Use caution when powering on the replacement supply because the
failure could have been caused by a problem in the system.
Red LED ON and system up
This condition indicates that the 5 V power is OK. Use the system diagnostics and or
testpoints on the left bottom of the control rack or at the supply connectors to find the
faulted outputs. Try and clear the fault with the input power or switch reset. If the green
LED comes ON, the fault was a transient one and may come back. If the red LED is still
ON, remove the connector supplying the faulted output and reset the supply. If the red
LED is still ON, then a defective supply is the most probable cause. If the green LED
comes ON, then the problem is most likely in the system.
Red LED ON and system down
This condition indicates that the 5 V power is not OK. In this case, all of the supply
outputs should be off. Try and reset the fault with the input power. If the green LED
comes on the fault was a transient one and may come back. If the red LED is still ON,
remove the PSA/PSB output connector at the top of the supply and reset the supply. If
the red LED is still ON, then a defective supply is the most probable cause. If the green
LED comes ON, then the problem is most likely in the system.

Green LED ON and system up but one or more of the voltages out of specification
This condition indicates that the 5 V power is OK. Each supply output has a current
limit and short circuit protection. This condition could be caused by a short or failed
component in the system. Remove the connector supplying the failed output voltage. If
the voltage returns to normal this is an indication of a system problem. If the voltage
does not return to normal then the most probable cause is a defective supply.
Thermal over-temperature faults (new design only)
Even in the worst case ambient conditions, a thermal fault should not occur if the outputs
are not overloaded. A sustained current limit on a supply output will be the most likely
cause of a thermal fault.
Configuration
The P28C output or PS28 at the bottom of the power supply can be used to power an
external peripheral device. To do this the jumper plug on the bracket to the left of the
rack must be moved from the Normal position to the Isolated position below.

Alarms
32 P5=###.## Volts is Outside of Limits. The P5 power A VME rack backplane wiring problem and/or power
supply is out of the specified operating limits supply problem
33 P15=###.## Volts is Outside of Limits. The P15 If "Remote Control", disable diagnostic and ignore;
power supply is out of the specified operating limits otherwise probably a back plane wiring or VME
power supply problem
34 N15=###.## Volts is Outside of Limits. The N15 If "Remote Control", disable diagnostic and ignore;
35 P12=###.## Volts is Outside of Limits. The P12 If "Remote I/O", disable diagnostic and ignore;
36 N12=###.## Volts is Outside of Limits. The N12 If "Remote I/O", disable diagnostic and ignore;
37 P28A=###.## Volts is Outside of Limits. The P28A If "Remote Control", disable diagnostic and ignore;
38 P28B=###.## Volts is Outside of Limits. The P28B If "Remote Control", disable diagnostic and ignore;
39 P28C=###.## Volts is Outside of Limits. The P28C If "Remote Control" disable diagnostic. Disable
backplane wiring and/or power supply problem
40 P28D=###.## Volts is Outside of Limits. The P28D If "Remote Control" disable diagnostic. Disable
41 P28E=###.## Volts is Outside of Limits. The P28E If "Remote Control" disable diagnostic. Disable
42 N28=###.## Volts is Outside of Limits. The N28 If "Remote Control" disable diagnostic. Disable

Redundant Power Supply
Redundant Power Supply
The redundant power supply module (RPSM) parallels two independent power supplies
to provide ten output voltages with improved reliability. ORing diodes are used to OR
the outputs of one supply with the outputs from the second redundant supply. Nine of
the paralleling circuits have an additional current limit function. All output circuits have
an LED status indicator.
The following figure shows the power and signal flow for two paralleled power supplies
that provide power to a Mark* VI control rack. To provide redundancy, the outputs of
each supply are passed into the RPSM, ORed and the redundant voltages are passed out
the RPSM outputs. The RPSM module mounts on the side of the control rack in place of
the power supply. The two power supplies that feed the RPSM are remotely mounted.
PSSTAT
Power Supply PSA

1
PSB
1PSSTAT
1PSA
PSA
1PSB
PSB MarkVI rack

RPSM
connections
2PSA
2PSB PSSTAT
PS28
PSA
2PSSTAT
Power Supply PSB
2
PSSTAT
Power Supply and RPSM Signal Flow
21-1 Redundant Power Supply GEH-6421Q Mark* VI Control

Installation
Top View
PSA PSB
Captive
fastener
Mounting Mounting
1PSB
3 1
screw screw
15 13
3 1
2PSB
IS2020RPSM
15 13
Status
LEDs
3 1
1PSA
15 13
3 1
2PSA
1PSSTAT PSSTAT 15 13
2PSSTAT PS28
Mounting
screw Slide Mounting
mounting screw
Captive plate
fastener
Side View
Control
rack
RPSM Module and VME Chassis
GEH-6421Q System Guide, Volume II Redundant Power Supply 21-2

The RPSM module is mounted to the right hand side of the VME rack on a sheet metal
bracket. The status and 28 V dc output connections are at the bottom. Two connectors,
PSA and PSB, at the top of the assembly connect with a cable harness carrying power
to the VME rack. The four 15-pin connect-N-Lock connectors at the back side of the
module are the primary power feeds from the remotely mounted power supplies.
To prevent electric shock, turn off power to the RPSM to be

replaced, then test to verify that no power exists on the module
before touching it or any connected circuits.

any connections while power is applied to the equipment.
The RPSM module is mounted to the right hand side of the VME rack on a sheet metal
bracket. The status and 28 V dc output connections are at the bottom. Two connectors,
PSA and PSB, at the top of the assembly connect with a cable harness carrying power
to the VME rack. The four 15-pin connect-N-Lock connectors at the back side of the
module are the primary power feeds from the remotely mounted power supplies.
To remove the RPSM
1. Loosen the PSA/PSB bracket captive fastener at the top front of the module.
2. Separate the PSA/PSB bracket assembly from the RPSM.
3. Disconnect the bottom connectors.
4. Loosen the two front sheet metal bracket captive fasteners.
5. Pull the sheet metal bracket/power module assembly forward, disconnect the four
rear side connectors and then slide the assembly off of the control rack.
6. Remove the four mounting screws that hold the RPSM to the bracket and remove it.
Note Reinstall the screws and bracket on the control rack if a replacement module is
not going to be installed.
To reinstall the RPSM

1. Locate the supply mounting sheet metal bracket and four mounting screws.
2. Position the module on the bracket with the front of the module at the captive
fasteners, then install the four mounting screws and tighten.
3. Slide the module bracket assembly on to the control rack, connect the four rear side
connectors and then push the assembly in to tighten the two front captive fasteners.
4. Slide the PSA/PSB assembly rear tab into the slot on the bracket located at the
top rear of the RPSM.
5. Push the connector assemble into the mating connectors on the top of the RPSM.
6. Tighten the PSA/PSB bracket captive fastener.
7. Connect the power supply bottom connectors.

23
PIN32 5V 03
PIN30 5V RET 82
PIN28 5V 62
PIN26 5V RET
PIN24 5V 42
PIN22 5V RET 22
PSB
PIN20 5V 02
PIN18 5V RET 81
PIN16 +12V 61
PIN14 RET 41
PIN12 -12V 21
PIN10 RET 01
PIN8 +15V 8
PIN6 RET 6
PIN4 N/C 4
PIN2 N/C
PIN32 -15V 23
PIN30 RET 03
PIN28 -28V 82
PIN26 RET 62
PIN24 28VA 42
PIN22 RET 22
PIN20 28VB
PSA
02
PIN18 RET 81
PIN16 28VC 61
PIN14 RET 41
PIN12 28VD 21
PIN10 RET 01
PIN8 28VE 8
PIN6 RET 6
PIN4 N/C 4
PIN2 N/C
RPSM Top Connectors

1 & 2PSB
Pin
13 15 1 P5V1/2
2 P5V1/2
1PSB
3 P5V1/2
4 P5RTN
5 P5RTN
6 P5RTN
1 3
7 NC
8 P5SENP
9 P5SENN
13 15 10 P15V1/2
11 N12
2PSB
12 P12V1/2
13 P15RTN
14 N12RTN1/2
1 3 15 P12RTN
1 & 2PSA
Pin
3 1
1 P28AB1/2
1PSA
2 N28
3 N15
4 AB28RTN
5 N28RTN1/2
15 13 6 N15RTN1/2
7 NC
8 P28AB1/2
3 1 9 AB28RTN
2PSA
10 P28E1/2
11 P28D1/2
12 P28C1/2
13 E28RTN
15 13 14 D28RTN
15 C28RTN
RPSM Back Side Connectors

PS28
Pin
1 P28E
2 CHASS
1
3 E28RTN
PS28
3
PSSTAT
Pin
1 IDSIG
4 IDGND
2 1STAT1
1
4
PSSTAT
5 1STAT2
3 2STAT1
6 2STAT2
3
6
2PSSTAT
Pin
1 IDSIG
2 IDGND
2PSSTAT
3 2STAT1
3
1
4 2STAT2
3 4
1 2
1PSSTAT
1PSSTAT
Pin
1 IDSIG
4
2
2 IDGND
3 1STAT1
4 1STAT2
RPSM Bottom Connectors

Operation
1
1PSSTAT 2
3
RPSA
4
ID 1
4
2 PSSTAT
1 5
2 3
2PSSTAT 3 6
4
1PSA 1 4 8 9 12 15 11 14 10 13
2PSA 1 4 8 9 12 15 11 14 10 13
P28V (B) ECB

ECB ECB ECB
3
P28V (A) P28V (C) P28V (D) P28V (E) 2 PS28
100 W 100 W 100 W 100 W 1
+ Ret + Ret + Ret + Ret
PSA 24 22 20 18 16 14 12 10 8 6
1PSA 1PSB
5 2 6 3 10 13 14 11 12 15 1, 2, 3 8 9 4, 5, 6
2PSB
2PSA 5 2 6 3 10 13 14 11 12 15 1, 2, 3 8 9 4, 5, 6
+s -s
ECB ECB ECB ECB ECB

P5V
N28V N15V P15V N12V P12V 150 W
50 W 100 W 100 W 10 W 25 W
Ret Ret + Ret Ret + Ret + Ret
PSA 26 28 30 32 8 6 10 12 16 14 20,24,28,32 18,22,26,30
PSB
RPSM Block Diagram

Output Voltage ORing
The ten outputs of two supplies are ORed together using low forward drop Schottky
diodes. If an output of one of the supplies fails, the corresponding output on the other
supply will pick up the full load through the diode. It is not intended that the two supplies
equally share the load current, but if a short occurs on a RPSM output, it is possible to
supply twice the normal short circuit current to the load. To prevent this, all of the outputs
of the ORing diodes, with the exception of the 5 V, have an additional current limit circuit.
Note These circuits will hold the short circuit current to an acceptable level.
Refer to the Specifications section for expected RPSM output voltages accounting for
the voltage losses introduced by passing the supply outputs through the ORing circuits.
Due to the wiring impedance between the supply outputs and the RPSM, the supplies
will tend to share the load. The sharing will reduce the diode and conductor losses so the
expected losses for normal operations will be less than with one supply faulted.
Current Limit ECB
Nine of the outputs have electronic circuit breakers (ECBs) to limit the short circuit
current. These circuit breakers are of the auto-reset type. Once the supplied output
current exceeds the over-current threshold the output will be turned OFF and the reset
timer started. Once the reset timer has expired the output will be turned back ON. If the
over-current condition still exists, the output will be turned OFF and the reset timer
started again. This cycle will continue until the short is removed. The output will then
return to normal operation.
Note No current limiting is provided on the RPSM module for the 5 V output.
RPSM Electronic Circuit Breaker Limits
Parameter Min. Typical Max. Units

Reset Time 500 msec
12 OC Threshold 2.78 3.3 3.89 Amps
15 OC Threshold 8.30 10 11.70 Amps
28 OC Threshold 4.15 5 5.85 Amps

Indicator LEDs
All the RPSM supply outputs have green status LEDs to indicate that power is being
supplied to the load. The LEDs are located on the front panel of the module. For normal
operations these LEDs will be ON solid. If the RPSM is not supplying the correct power
to the load, one or more of these LEDs are OFF or flashing.
Note A flashing LED indicates that the output ECB is tripped
LED Definitions
LED Description
P5 P5 output voltage indicator
N12 N12 output voltage indicator
P28AB P28A/B output voltage indicator
P28C P28C output voltage indicator
P28D P28D output voltage indicator
P28E P28E output voltage indicator
Specification
Item Description
Output Voltage Conditions Minimum Typical Maximum Units
+5 V 20 - 30 A 4.90 5.05 5.20 V dc
12 V 0.1 - 1.6 A 11.64 12.0 12.72 V dc
15 V 0.1 - 5.3 A 14.55 15.0 15.97 V dc
28 V 0.2 - 3.2 A 26.6 28.0 29.4 V dc
Outputs P28V (A), P28V (B), P28V (C), P28V (D), P28V (E), all with 100 W capability
PS28 External 28 V output, from P28 (E)
N28V 50 W
N15V 100 W
P15V 100 W
N12V 10 W
P12V 25 W
P5V 150 W

Diagnostics
Below is a list of fault indications and the possible causes.
All RPSM green LEDs OFF - This is an indication of a problem back at the power
supplies and not an RPSM failure.
One or more RPSM green LEDs OFF (but not all) - An RPSM LED OFF condition
is an indication that there is no output voltage due to a short in the control rack or an
RPSM failure.
5 V output problems - The 5 V output is unique from all of the other outputs. This
RPSM output does not have current limit protection and has remote voltage sensing from
the power supplies to the RPSM module. With a 5 V transient short or problem in the
system, the most likely failure mode will be a 5 V output over-voltage fault back at the
power supplies. Under high currents the losses will become high enough to cause the
voltage at the power supplies to exceed the over-voltage threshold. Refer to the 5 V
paragraph in GEI-100567 VME Power Supply for details. Any time the RPSM P5 green
LED is on, the RPSM 5 V output voltage is above 4.55 V.
Redundant power supply replacement - As long as one of the power supplies is fully
operational, the RPSM green LEDs will be ON and the correct power will be supplied
to the system. When one of the power supplies fails, replacement can be postponed
until it is convenient to do so. Before replacing the supply, refer to the troubleshooting
guidelines outlined in GEI-100567 VME Power Supply to rule out a transient fault that
can be reset such as an input power under-voltage. If the supply is found to be defective,
follow removal and installation procedure outlined in the Power Supply section.
Parallel Status/ID
Each status connector from the power supplies has a status and ID signal. The ID signals
from the two supplies are wired together along with the ID signal from the RPSM and
passed out through the PSSTAT connector. The ID signal output is a single wire LAN line
with three DALLAS 2502 ID ICs connected on it. The NO SSR contact status signals
from the both supplies are passed through the RPSM and out the PSSTAT connector.
Power Supply 1 and 2 Status SSR NO Contacts
Parameter Conditions Min. Max. Units

V dc rating 55 V dc
V ac rating 55 V peak
Current rating 500 mA
ON resistance 1.0 Ohm
Isolation 1500 V dc
There are no field serviceable components in the RPSM module. If one or more of the
green front panel LEDs are OFF, this is not a direct indication that the RPSM module has
failed and has to be replaced. An LED OFF could indicate that something is wrong in
the system and the fault is not due to the RPSM module.
Configuration

Power Distribution Modules
PDM Power Distribution Modules
The Power Distribution Modules (PDM) provides 125 V dc and 115 V ac (or 230 V ac)
to the Mark* VI system for all racks and terminal boards. There is a second version of
the PDM for the control cabinet in those systems using remote I/O cabinets.
Diagnostics to
VCMI through J301
in <R> rack
Power cables to
interface modules
125 V dc, 115/230 V ac
DIN-rail
termination
Output power board
connectors
Power Distribution Module

(for interface modules)
TB2 TB1
Power
TB3 Input filters
terminals Filtered dc
and ac power
to PDM
JTX1 AC/DC
115 V Converter
Cable to
Cable to PDM JZ2
transformer or JZ3
inside ac/dc JTX2
JZ
converter 230 V
TB1
Customer's power TB2

cables, 125 V dc
One or two converters and 115/230 V ac
Power Distribution Module, Ac to Dc Converter, and Diagnostic Cabling
22-1 Power Distribution Modules GEH-6421Q Mark* VI Control

Installation
The cabling, wiring connections, and fuse locations for the PDM in the interface cabinet
are shown in the figure.
PDM Cable Destination
JPD Diagnostic term. brd.

JZ2 Ac/dc convert #1
JZ3 Ac/dc convert #2
JZ1 Cable to door resis.
J1R <R> power supply

J2R <R> power supply
J1S <S> power supply
J2S <S> power supply
J1T <T> power supply
J2T <T> power supply
J1C Spare
J1D Spare
J7X <X> power supply

J7Y <Y> power supply
J7Z <Z> power supply
J7A TRPG#1
J7W TREG
J8A TRLY
J8B TRLY
JZ1 J8C TRLY
J8D TRLY
J12A TBCI
Ground reference J12B TBCI
jumper BJS J12C TBCI
J15 Miscellaneous
J16 Miscellaneous
J17 TRLY
J18 TRLY
J19 TRLY
J20 TRLY
Note : When connecting ac power

to the power distribution (TB1),verify 125 V dc supply
that JTX connector on both ac
source selectors (see Ac/dc 120 V ac supply
converter) are plugged into JTX1 for
115 V ac, or JTX2 for 230 V ac. Auxiliary 120
V ac supply
Interface Cabinet PDM Circuit Board
GEH-6421Q System Guide, Volume II Power Distribution Modules 22-2

Fuses in Interface and Control Cabinet PDM
Values of the fuses for the PDM interface cabinet are shown in the following table.
Interface Cabinet PDM Fuse Ratings
PDM Fuse* No. J Connector Current Rating Voltage Rating Vendor Catalog No.
FU1-FU6 J1R, S, T 15 A 125 V Bussmann GMA-15A
FU7-FU10 J1C, D 5A 125 V Bussmann GMA-5A
FU13-FU20 J8A, B, C, D 15 A 125 V Bussmann GMA-15A
FU21-FU26** J12A, B, C 1.5 A 250 V Bussmann GMC-1.5A
FU27-FU28*** J15, 16 3.2 A 250 V Bussmann MDL-3.2A
FU29 J17 15 A 250 V Bussmann ABC-15A
FU30 J18 5A 250 V Bussmann ABC-5A
FU31-FU32 J19, 20 15 A 250 V Bussmann ABC-15A
FU34-FU39 J7X, Y, Z 5A 125 V Bussmann GMA-5A
*All fuses are ferrule type 5 mm x 20 mm, except for FU27-FU32 which are 0.25" x 1.25 ".
**The short circuit rating for FU21-FU26 is 100 A
***The short circuit rating for FU27-FU28 is 70 A
The PDM in the control cabinet (IS2020CCPD) does not supply power to any terminal
boards except the TRLY boards. Values for the fuses in the control cabinet PDM
are similar to those in the I/O cabinet PDM, except the rating for fuses FU1-FU6 is 5
A instead of 15 A.
Operation
The customers 125 V dc and 115/230 V ac power is brought into the PDM through
power filters. The ac power is cabled out to one or two ac/dc converters which produce
125 V dc. This dc voltage is then cabled back into the PDM and diode coupled to the
main dc power, forming a redundant power source. This power is distributed to the
VME racks and terminal boards.
Either 115 V ac or 230 V ac can be handled by the ac/dc converters. The transformer
cable must be plugged into either JTX1 for 115 V ac, or JTX2 for 230 V ac operation.
Diagnostic information is collected in the PDM and wired out to a DIN rail mounted
terminal board. A cable then runs to the VCMI in rack <R> through J301.
Ac feeders, J17-20, are fused and cabled out to the relay terminal boards. 125 V dc
feeders are fused and cabled to the interface (I/O) cabinets, protection modules, TRPG,
TREG, and TRLY. To ensure a noise free supply to the boards, the PDM is supplied
through a control power filter (CPF), which suppresses EMI noise. The CPF rack holds
either two or three Corcom 30 A filter modules as shown in the following figure.
Power to the contact inputs first passes through resistors R3 and R4, through TB2,
before being fused and cabled to the TBCI boards. Contact inputs operate with 125 V
dc excitation.
Control Cabinet PDM
Power requirements for the control cabinet are less than for the interface cabinet. The
PDM has the same layout but different fuse ratings, since only the control racks and relay
output boards require power. For additional noise filtering for the controllers, Corcom
power filters are included with the PDM.

125 V dc Ac 1 Ac 2
+ P125 - N125 115/230 V ac 115/230 V ac
TB2 5 6 3 4 1 2
DCF1 ACF1 ACF2 Power filter board

TB1 5 6 3 4 1 2
TB1 1 2 3 4 5 6 7 8 9 10 11 12
Chassis Chassis
DS2020PDMAG6 DS200TCPD
FU29 Ac feeders
DCLO AC1N
DCHI AC1H AC2H AC2N J17
FU30
JZ4 J18
FU31
For bus P125V JZ5 J19
monitoring FU32 125 V dc
BJS J20 to TREG,
TB3 ACSHI JH1,
P125 VR JZ2 DACA#1
1 Contact
P125S
2 332k inputs
(+1.82V)
JZ3 DACA#2 +
3
10k -
Chassis 4
5 TB3
10k 12 11 10
6
Dc feeders
N125 S 7
SW1
332k FU1/FU2 J1R
(-1.82V) 8
[J2R
9 J1S
[J2S J1T
N125 VR
FU9/FU10 SW5 [
J1C J2T R1 R2
J1D 22 22
FU13/FU14
J8A ohm ohm
J8B 70 70
JZ1 W W
1
FU19/FU20 J8C
10 J8D
TB2 Door
9 FU34/FU35 SW6
1 2 3 4 6
J7X
FU38/FU39 SW8 J7Y
P125 VR 4 J7Z
N125 VR 7
11 J7A
12
R3 R4 1 J7W P125 V
FU21/FU22 2 N125 V
22 22 Door
J12A
ohm ohm
FU25/FU26 J12B
70 W 70 W 3 J12C
2 + P125 V 3 J15
2
R5, 50 ohm,* 70 W FU28 1
FU27
3.2 3.2 A
A 1
J16
2
R6, 50 ohm,* 70 W 3
Diagnostic info
JPD
*Note: Field configurable
Distribution Module for I/O Cabinet

Ac1 Ac2 To safety
125 V dc ground
115/230 115/230
V ac V ac
+P125 - N125 AC1H AC1N AC2H AC2N IS2020CCPD
TB1 1 2 3 4 5 6
Chassis
MOV suppression
In+ Gnd In- In+ Gnd In- In+ Gnd In-
DCF1 ACF1 ACF2
120/250 V, 30 Amp 120/250 V, 30 Amp 120/250 V, 30 Amp Power filters
Out+ Out- Out+ Out- Out+ Out-
DS200TCPD Ac feeders to
AC1H AC1N TRLY boards
DCHI DCLO AC2H AC2N FU29
J17
FU30
P125V JZ4 J18
JZ5 FU31
J19
BJS FU32
J20
DACA#1
ACSHI
DACA#2
JZ2 JZ3
FU1/FU2 SW1 J1R

Dc feeders to
FU3/FU4 SW2 J1S
controller racks
FU5/FU6 SW3 J1T <R0>,<S0>,<T0>
DIN-rail transition terminal board
+ 28 Analog In 1 37- pin
P125 V TB2 P125S (+1.82V)
29 P125_Grd connector
1
332k
2 + 27 Analog In 2
3 26 N125_Grd
10k N125 S
4
(-1.82V) + 7 Analog In 3 Cable to VCMI
5
10k 8 Spare 01 via VDSK on
6 Chassis
+ 5 Analog In 4 One to one front of <R0>
7
8 332k control rack.
6 Spare 02 compatability
9 between screw
N125 V 10 P5V (TB) and 37-pin
connector
9 DCOM numbers.
Diagnostic information JPD 35 DIN1, Logic_In_1
P5V 7 34 DIN2, Logic_In_2
DCOM 8
33 DIN3, Logic_In_3
BAT 1
AC1 2 32 DIN4, Logic_In_4
AC2 3
31 DIN5, Logic_In_5
Spare 4
J19 Fuse31 5 30 DIN6, Logic_In_6
J20 Fuse32 6 16 DIN7, Logic_In_7
J17 Fuse29 9
PDM for Controller Cabinet

Ground Fault Detection Sensitivity
Note Ground fault detection is performed by the VCMI using signals from the PDM.
Ground fault detection on the floating 125 V dc power bus is based upon monitoring
the voltage between the bus and the ground. The bus voltages with respect to ground
are normally balanced (in magnitude), that is the positive bus to ground is equal to the
negative bus to ground. The bus is forced to the balanced condition by the bridging
resistors, Rb (refer to the figure). Bus leakage (or ground fault) from one side will cause
the bus voltages with respect to ground to be unbalanced.
Power Distribution Module
P125 Vdc
Rb Rf Vout,Pos
Monitor1
Jumper Grd Fault
Grd Vout,Neg
Rb Monitor2
N125 Vdc
Electrical Circuit Model
Rb/2
Vbus/2 Vout,
Rf Bus Volts
wrt Ground
Ground Fault on Floating 125 Vdc Power Bus

There is a relationship between the bridge resistors, the fault resistance, the bus voltage,
and the bus to ground voltage (Vout) as follows:
Vout = Vbus*Rf / [2*(Rf + Rb/2)]

Therefore the threshold sensitivity to ground fault resistance is as follows:
Rf = Vout*Rb / (Vbus 2*Vout).

The ground fault threshold voltage is typically set at 30 V, that is Vout = 30 V. The
bridging resistors are 82 K each. Therefore, from the formula above, the sensitivity
of the control panel to ground faults, assuming it is on one side only, is as shown in
the following table.
Note On Mark V systems, the bridging resistors are 33 K each so different Vout values
result.

Sensitivity to Ground Faults
Vbus - Bus voltage Vout - Measured Bus Rb - bridge resistors Rf -fault resistor Control System
to ground voltage (balancing)
(threshold)
105 30 82 k 55 k Mark VI
125 30 82 k 38 k Mark VI
140 30 82 k 31 k Mark VI
105 19 82 k 23 k Mark VI
125 19 82 k 18 k Mark VI
140 19 82 k 15 k Mark VI
105 10 82 k 10 k Mark VI
125 10 82 k 8 k Mark VI
140 10 82 k 7 k Mark VI
105 30 33 k 22 k Mark V
125 30 33 k 15 k Mark V
140 30 33 k 12 k Mark V
The results for the case of 125 V dc bus voltage with various fault resistor values is
shown in the following figure.
40.0
30.0 Fault Resistance (Rf) Vs Threshold
Fault, Rf
Voltage (Vout) at 125 V dc on

20.0
Mark VI
10.0
0.0
0 10 20 30
Voltage, Vout
Threshold Voltage as Function of Fault Resistance

Results
On Mark VI, when the voltage threshold is configured to 30 V and the voltage bus is 125
V dc, the fault threshold is 38 k. When the voltage threshold is configured to 17 V and
the voltage bus is 125 V dc, the fault threshold is 15 k.
The sensitivity of the ground fault detection is configurable. Balanced bus leakage
decreases the sensitivity of the detector.

Specifications
Item Specification
Number of input sources One 125 Volt battery
One or two 115/230 V ac sources
Control Power filters Dc: One Corcom 30 A filter modules - 120/250 V, 30 A
Ac: One or two Corcom 30 A filter modules - 120/250 V, 30 A
AC to DC converters One or two DACA converters 115 or 230 V ac
Redundancy The two or three dc sources are diode coupled to form a redundant power source for
the I/O racks
Outputs Two TMR I/O racks, six total
Three VPRO protection modules
One TRPG and one TREG board
Four AC feeders to TRLY boards
Four DC feeders to TRLY boards
Three TBCI boards
Two spare, two miscellaneous outputs
Diagnostics
As shown in the following figure, the 125 V dc is reduced by a resistance divider network
to signal level for monitoring. Other items monitored include the battery voltage, two
ac sources, and fuses in the feeders to the relay output boards. In the interface cabinet
this diagnostic data is monitored by the VCMI. In the control cabinet it is cabled to
the VDSK board and then to the VCMI.

DS2020PDMAGx Din Rail Transition
Termination Board
TB3
P125 VR
1 37-pin
332k P125S (+1.82V) connector
2
+ 28 Analog In 1
3
10k 29 P125_Grd
4 Chassis
5 27 Analog In 2
10k
6 + 26 N125_Grd
7 37-wire cable
N125 S (-1.82V)
N125 VR 8 332k +7 Analog In 3
9 8 Spare01
One to one
+5 Analog In 4 Connect to VCMI
compatability
6 Spare02 between via J301, in <Rx>
screw (TB) I/O rack
and 37-pin
10 P5V connector
numbers
9 DCOM
JPD
35 DIN1, Logic_In_1
P5V 34 DIN2, Logic_In_2
7
DCOM
8 33 DIN3, Logic_In_3
BAT
AC1
2
AC2 31 DIN5, Logic_In_5
3
Spare
J19 Fuse31
5
J20 Fuse32 16 DIN7, Logic_In_7
6
J17 Fuse29
9
PDM Diagnostic Monitoring

Configuration
The PDM for the I/O cabinets has a number of jumpers and switches as follows. Refer to
the circuit diagrams for location and function.
Switch Indicator Output Cable Destination

SW1 Yes J1R, J2R <R> Power Supply, 125 V dc
SW2 Yes J1S, J2S <S> Power Supply, 125 V dc
SW3 Yes J1T, J2T <T> Power Supply, 125 V dc
SW4 Yes J1C Spare 125 V dc supply
SW5 Yes J1D Spare 125 V dc supply
SW6 Yes J7X <X> (or R8) Power, 125 V dc supply
SW7 Yes J7Y <Y> (or S8) Power, 125 V dc supply
SW8 Yes J7Z <Z> (or T8) Power, 125 V dc supply
Jumpers
Jumpers are located on TB1, and TB2. Resistors are located on TB3 to reduce the 125 V
dc to 1.82 V dc for monitoring the bus.
Jumper BJS is supplied for isolation of ground reference on systems with an external
ground reference. The ground reference bridge across the 125 V dc power has two
resistances, one on each side, and BJS connects the center to ground.
Note When more than one PDM is supplied from a common 125 V dc source, remove
all the BJS connections except one.
PDM variables including the ac and dc sources, P125 and N125 voltages, and the status
of fuses 31, 32, and 33, are monitored by the VCMI in <R> rack. Refer to the VCMI
toolbox configuration in GEI-100551, VCMI Bus Master Controller.

Alarms
43 125 Volt Bus = [ ] Volts is Outside of Limits. A source voltage or cabling problem; disable 125 V
The 125 Volt bus voltage is out of the specified monitoring if not applicable.
operating limits.
44 125 Volt Bus Ground = [ ] Volts is Outside of Limits. Leakage or a fault to ground causing an unbalance
The 125 Volt bus voltage ground is out of the on the 125 V bus; disable 125 V monitoring if not
specified operating limits. applicable.

PPDA Power Distribution System Feedback
The Power Distribution System Feedback (PPDA) pack accepts inputs from up to six
different power distribution boards. It conditions the board feedback signals and provides
a dual redundant Ethernet interface to the controllers. PPDA feedback is structured to
be plug and play uses electronic IDs to determine the power distribution boards wired
into it. This information is then used to populate the IONet output providing correct
feedback from connected boards.
Compatibility
The PPDA I/O pack is hosted by the JPDS, JPDM, or JPDC 28 V dc Control Power
boards on the Mark* VIe Modular Power Distribution (PDM) system. It is compatible
with the feedback signals created by JPDB, JPDE, and JPDF.
Installation
The PPDA I/O pack mounts on a JPDS, JPDM, or JPDC 28 V dc control power terminal
board.
To install the PPDA pack
1. Securely mount the desired terminal board.
2. Directly plug the PPDA I/O pack into the terminal board connectors.
3. Mechanically secure the packs using the threaded studs adjacent to the Ethernet
ports. The studs slide into a mounting bracket specific to the terminal board type.
The bracket location should be adjusted such that there is no right-angle force
applied to the DC-62 pin connector between the pack and the terminal board. The
adjustment should only be required once in the life of the product.
4. Plug in one or two Ethernet cables depending on the system configuration. The pack
will operate over either port. If dual connections are used, the standard practice is to
connect ENET1 to the network associated with the R controller.
5. Apply power to the pack by plugging in the connector on the side of the pack. It
is not necessary to insert this connector with the power removed from the cable
as the I/O pack has inherent soft-start capability that controls current inrush on
power application.
6. Configure the I/O pack as necessary. See also the Auto-Reconfiguration section.
7. Connect ribbon cables from connector P2 on JPDS, JPDM, or JPDC to daisy chain
other core boards feeding information to PPDA.
Note Additional PDM feedback signals may be brought into the PPDA I/O pack through
the P2 connector on the host board. The P1 connector is never used on a board that hosts
the PPDA I/O pack, PPDA must always be at the end of the feedback cable daisy chain.

Configuration
Auto-Reconfiguration
The Auto-Reconfiguration feature allows I/O packs to be replaced without the operator
having to manually reconfigure each pack. If the Auto-Reconfiguration feature is
enabled, a reconfiguration file is automatically downloaded from the controller to the
pack when the controller detects a pack booting with a different configuration. This
reconfiguration includes the bootload, baseload, firmware, and parameters. Each pack
is updated with the current configuration that matches the configuration used by the
controller, unless the pack already contains the latest version.
While an Auto-Reconfiguration is in progress, the controller does not reboot until
Auto-Reconfiguration has finished. Other downloads to the pack cannot be initiated while
the pack is being Auto-Reconfigured. If a pack is already running, Auto-Reconfiguration
only performs diagnostics.
Auto-Reconfiguration is enabled or disabled in the ToolboxST application through the
component editor. For more information please refer to GEH-6700 ToolboxST* for
Mark* VIe Control. This allows the operator to manually reconfigure each pack if
necessary. Terminal boards and controllers are not supported in this version, therefore, if
a terminal board is replaced the pack will have to be manually reconfigured.
Note The Auto-Reconfiguration feature does not currently work with PAMB, PCAA,
or Safety packs. The ControlST* application V3.05 or later is required to use the
Auto-Reconfiguration feature. For more information, refer to GEI-100694, ControlST
Upgrade Instructions
LED Diagnostics
ATTN LED Pattern Description
Green Solid BIOS (at power on) - if it remains in this state, the
pack is dead. Older packs may not have the ability
to display the green LED at power on.
Red Solid Booting - prior to reading Dallas ID
Red 2 Hz 50% Awaiting an IP Address
Red 1 Hz 50% No Firmware to load (Program Mode)
Diagnostic active Application not loaded (Controller)
Red 1/2 Hz 50% Application not loaded (Pack)
Green 2 Hz 50% Awaiting Auto-Reconfiguration release
Green 1 Hz 50% I/O pack in WAIT or STANDBY
Green Two 4 Hz blinks every 4 sec Application Online
Red 4 Hz 50% Diagnostic present
A green LED labeled PWR shows the presence of control power.

A green LED labeled LINK is provided for each Ethernet port to indicate that a valid
Ethernet connection is present.
A yellow LED labeled TxRx is provided for each Ethernet port to indicate when the pack
is transmitting or receiving data over the port.

Pack Reboot
Install or replace the pack in accordance with the procedure in the Installation section.
When power is applied, the pack boots up and the Auto-Reconfiguration process starts.
The pack generates a signal to the controller to indicate it needs an IP address and
configuration. (The yellow LED labeled TxRx is on and the red LED is blinking at
medium speed.) The controller queries the pack to identify existing files to determine if a
reconfiguration is needed. The controller then starts to download the pack IP address
and reconfiguration files. (The yellow LED labeled TxRx is on and the red LED is
blinking slowly.) The controller signals the pack when the download is complete. (The
yellow LED labeled TxRx is off and the red LED is off.) The pack reboots, performs a
self-diagnostic test, and goes on-line. (The green LED labeled PWR is on. The green
LED labeled LINK is on.)
Note When replacing a pack with a new one that has a similar file structure (a current
revision pack with another current revision pack) the Auto-Reconfiguration process takes
a relatively short amount of time. When the file structure of the replacement pack varies
from the pack being replaced (a current revision pack with an older revision pack), the
Auto-Reconfiguration process takes a longer time to complete.
Pack Recalibration
Liquid Fuel regulators do not The recalibration of a servo board may be required when a new acquisition board is used
have to be recalibrated. on a system. The controller saves the barcode of the acquisition board and compares
it against the current acquisition board during reconfiguration load time. Any time a
recalibration is saved, it updates the barcode name to the current board. Recalibration is
required for PSVO, PCAA, MVRA and MVRF.
Diagnostics
The PPDA performs the following self-diagnostic tests:
A power-up self-test including checks of RAM, flash memory, Ethernet ports, and
most of the processor board hardware
Continuous monitoring of the internal power supplies for correct operation
A check of the electronic ID information from the terminal board, acquisition
card, and processor card confirming the hardware set matches, followed by a
check confirming the application code loaded from flash memory is correct for the
hardware set
The analog input hardware includes precision reference voltages in each scan.
Measured values are compared against expected values and are used to confirm
health of the A/D converter circuits.
Details of the individual diagnostics are available from the ToolboxST* application.
The diagnostic signals are individually latched, and then reset with the RESET_DIA

Configuration
L3DIAG_PPDA_R I/O Diagnostic Indication Input BOOL
L3DIAG_PPDA_S I/O Diagnostic Indication Input BOOL
L3DIAG_PPDA_T I/O Diagnostic Indication Input BOOL
LINK_OK_PPDA_R I/O Link Okay Indication Input BOOL
LINK_OK_PPDA_S I/O Link Okay Indication Input BOOL
LINK_OK_PPDA_T I/O Link Okay Indication Input BOOL
ATTN_PPDA_R I/O Attention Indication Input BOOL
ATTN_PPDA_S I/O Attention Indication Input BOOL
ATTN_PPDA_T I/O Attention Indication Input BOOL
PS18V_PPDA_R I/O 18 V Power Supply Indication Input BOOL
PS18V_PPDA_S I/O 18 V Power Supply Indication Input BOOL
PS18V_PPDA_T I/O 18 V Power Supply Indication Input BOOL
PS28V_PPDA_R I/O 28 V Power Supply Indication Input BOOL
PS28V_PPDA_S I/O 28 V Power Supply Indication Input BOOL
PS28V_PPDA_T I/O 28 V Power Supply Indication Input BOOL
IOPackTmpr_R I/O pack Temperature (deg F) AnalogInput REAL
IOPackTmpr_S I/O pack Temperature (deg F) AnalogInput REAL
IOPackTmpr_T I/O pack Temperature (deg F) AnalogInput REAL
Pbus_R_LED Pbus R is in Regulation Input BOOL
Pbus_S_LED Pbus S is in Regulation Input BOOL
Pbus_T_LED Pbus T is in Regulation Input BOOL
Src_R_LED All R Pbus Sources OK Input BOOL
Src_S_LED All S Pbus Sources OK Input BOOL
Src_T_LED All T Pbus Sources OK Input BOOL
Aux_LED Aux 28 outputs OK Input BOOL
Batt_125V_LED 125 V battery volts OK Input BOOL
Batt_125G_LED 125 V battery floating Input BOOL
JPDD_125D_LED 125 V JPDD feeds OK Input BOOL
Pbus_125P_LED 125 V Pbus feeds OK Input BOOL
Batt_24V_LED 24 V battery volts OK Input BOOL
Batt_24G_LED 24 V battery floating Input BOOL
JPDD_24D_LED 24 V JPDD feeds OK Input BOOL
Pbus_24P_LED 24 V Pbus feeds OK Input BOOL
AC_Input1_LED Ac input 1 OK Input BOOL
AC_Input2_LED Ac input 2 OK Input BOOL
AC_JPDA_LED Ac JPDA feeds OK Input BOOL
AC_Pbus_LED Ac Pbus feeds OK Input BOOL

JPDR_LED JPDR Src Select OK Input BOOL
Accelerometer_X Vibration input, X-coordinate AnalogInput REAL
Accelerometer_Y Vibration input, Y-coordinate AnalogInput REAL
App_1_LED Application driven Output BOOL
Fault_LED Fault Led - Application driven Output BOOL
Board Type Description Selections

JPDC Terminal board connected to PPDA
JPDC Inputs Analog Inputs tab Variable Edit (Input FLOAT)
InputDiagEnab Disables all related diagnostics for the selected input (DC_125 Disable, Enable
VFdbkMag or ac_Fdbk1_Volt). This is typically set to Disable
when one of the inputs (125 V or ac) on the JPDC is not used.
ACFdbkInVoltage AC input voltage threshold Range 100 250
ACFdbkInTol AC input voltage feedback tolerance 0pct, 5pct, 10pct, 20pct
ACDiffVolOff AC input voltage difference voltage offset Float value
PS28vEnable PS 28 v Feedback enable Disable, Enable
JPDC Fuse/DryContacts Fuse and Dry Contact status tab Variable Edit (BOOL)
FuseDiag Enable fuse diagnostic alarm Disable, Enable

JPDS Terminal board connected to PPDA
JPDS Inputs Analog Inputs tab Variable Edit (BOOL)

JPDM Terminal board connected to PPDA
JPDM Inputs Analog Inputs tab Variable Edit (BOOL)

JPDE Auxiliary terminal Board Not used, 1 or 2
JPDE Inputs Analog Inputs tab Variable Edit (Input FLOAT)
InputDiagEnab Enables all diagnostic alarms for the JPDE. Should only be set Disable, Enable
to Disable if no voltage input is connected to the JPDE.
DC_24v_Trig_Volt DC 24 v/ 48 v Input Magnitude trigger voltage configuration Range 0 60
JPDE Gnd Volts Variable Edit (Input FLOAT)
Gnd_Mag_Trig_Volt Ground Magnitude trigger voltage Range 1 30
JPDE Fuse Fuse status tab Variable Edit (BOOL)


JPDB Auxiliary terminal Board Not used, 1 or 2
JPDB Inputs Analog Inputs tab Variable Edit (Input FLOAT)
InputDiagEnab Enables all diagnostic alarms for the specified input on the Disable, Enable
JPDB. Should only be set to Disable if the voltage input is not
connected to the JPDB.
ACFdbkInVoltage AC input voltage threshold Range 100 250 float
ACFdbkInTol AC input voltage feedback tolerance 0pct, 5pct, 10pct, 20pct
ACDiffVolOff AC input voltage difference voltage offset Float value
JPDB Fuse Fuse status tab Variable Edit (BOOL)

JPDF Auxiliary terminal Board Not used, 1 or 2
JPDF Inputs Analog Inputs tab Variable Edit (Input FLOAT)
InputDiagEnab Enables all diagnostic alarms for the JPDF. Should only be set Disable, Enable
to Disable if the voltage input is not connected to the JPDF.
DC_125v_Trig_Volt DC 124 v Input Magnitude trigger voltage configuration Range 0 500
JPDF Gnd Volts Variable Edit (Input FLOAT)
Gnd_Mag_Trig_Volt Ground Magnitude trigger voltage
JPDF Fuse Fuse status tab Variable Edit (BOOL)

DS2020DACAG2 ac-dc Power Conversion
The DS2020DACAG2 is a drop in replacement for the DS2020DACAG1. It is backward
compatible in systems that used the previous version and it should be used as a
replacement part for the previous model. The DACA converts 115/230 V ac input power
into 125 V dc output power, and the output power rating is approximately 1000 W.
A DACA is used when the primary power source for a control system is 125 V dc with
or without a battery. In addition to power conversion, DACA provides additional local
energy storage to extend the ride-through time whenever the Mark VIe control has a
complete loss of control power.
The DS2020DACAG2 model has a higher power rating than the previous module. Also,
this new model can be paralleled for greater output current, whereas paralleling was not
recommended for the previous model. The DS2020DACAG2 is recommended for all
new panel designs.
Installation
The DACA module has four mounting holes in its base. Ac power input and dc output is
through a single 12-position connector JZ that is wired into connector JZ2 or JZ3 of the
PDM. Selection of 115 V ac or 230 V ac input is made by plugging the DACA internal
cable into connector JTX1 for 115 V or JTX2 for 230 V.
Ensure the proper voltage is selected before power is applied to

the equipment.
JTX1 DACA
115 V Converter
Cable to
transformer JTX2
230 V JZ Cable to
inside DACA PDM JZ2
converter Or JZ3
DACA Module Wiring

DACA Filter Capacitor Wear Out
The electrolytic capacitors in the DACA module wear out over time due to the ambient
temperature of the environment where they are used. The following table shows the
calculated life expectancy and recommended replacement schedule for the DACA
modules.
DACA Replacement Schedule
Calculated Life Expectancy of DACA Capacitor Recommended Replacement Schedule*

At 20C (68 F) ambient 100 years
*Due to wear out of Electrolytic Capacitor
To replace a DACA power conversion module

1. Remove power from the DACA module. Allow 1 minute for the output voltage
to discharge.
2. Remove the power input/output cable (JZ) on the right side of the module top.
3. Remove the four bolts securing the DACA module to the floor of the cabinet.
4. Remove the DACA module.
5. Make note of which receptacle the capacitor power plug is in. This is on the left side
of the module top. JTX1 is for 115 V ac and JTX2 is for 230 V ac.
6. Ensure the capacitor power plug is in the same position as the one removed. JTX1 is
for 115 V ac and JTX2 is for 230 V ac.
7. Place the new DACA module in the same position as the one removed
8. Secure the DACA module to the cabinet floor with the four bolts removed from the
previous module.
9. Install the power input/output plug (JZ) on the right side of the module top
10. Restore power to the DACA module.

DACA Power Conversion Modules
Hole size for 1 / 4"

TAPTITE (4PL)
Drill Plan
Note: Keep out area is 8.65 in. x 13.9 in.
DACA Mounting Pattern

Operation
DACA receives ac power through the cable harness that is plugged into connector JZ.
DACA uses a full wave bridge rectifier and an output filter capacitor. If needed, the user
must provide an input filter to attenuate harmonic currents injected into the incoming line.
Single DACA Module, Maximum Output Current is 9.5 A dc
Input to DACA Input Current Output Voltage Output Voltage

V ac RMS at Max Load Load = 1 A dc Load = 9.5 A dc
115 V ac 11 A 119 V dc 107 V dc
230 V ac 6A
The DACAG2 can be paralleled for greater output current. In parallel operation, current
sharing between the two DACAs is critical. Uneven current sharing can cause one of
the DACAs to operate beyond its output current rating.
Two DACA Modules with Outputs Paralleled, Maximum Output Current is 16.5 A dc*
Input to DACA Input Current Output Voltage Output Voltage

V ac RMS at Max Load Load = 1 A dc Load = 15 A dc
115 V ac 20 A 120 V dc 110 V dc
230 V ac 11 A
* The two paralleled DACAs must be connected to one ac voltage source for even output current sharing.
For proper implementation of parallel DACAs, the following must be observed:

The DACAs must be connected to the same ac source to ensure equal input voltages
to the DACAs.
The maximum output current per DACA is derated for parallel operation. This
derating accounts for variance in DACA open circuit voltages and variance in
DACA output impedances. The following curve should be used. The maximum
recommended total panel current is 16.5 A dc.
Probability of overloading one DACA when two

DACAs are paralled; Plotted at various panel loads
exceeding 9.5 A dc rating
Probability of one DACA
Total panel Load, A dc

Specifications
Item Specification
Input Voltage 105-132 V ac or 210-265 V ac, 47 to 63 Hz
Output Voltage 90 to 145 V dc with a load of 1 to 9.5 A
Over the full range of input voltage
Output Current Rating 9.5 A dc, -30 to 45C (-22 to 113 F)
Linearly derate to 7.5 A dc at 60C (140 F)
Output Ripple Voltage 4 V p-p
Discharge Rate Nominal input of 115 or 230 V ac, no load, discharge to less than 50 V dc within 1 minute
of removal of input power.
Hold Up (time for output to V in (V ac) 105 115 132
discharge to 70 V dc with Initial Load (A dc) 9.5 9.5 9.5
constant power load) Pout (W) 882 974 1131
Hold Up Time (ms) 19.5 29.5 48.8
Temperature -30 to 60C (-22 to +140 F) free convection
Humidity 5 to 95%, non-condensing
UL 508C Safety Standard Industrial Control Equipment
CSA 22.2 No. 14 Industrial Control Equipment
EN 61010 Section 14.7.2 Overload Tests
EN 61010 Section 14.7.1 Short Circuit Test
EN 61000-4-2 Electrostatic Discharge Susceptibility
EN 61000-4-3 Radiated RF Immunity
EN 61000-4-4 Electrical Fast Transient Susceptibility
EN 61000 4-5 Surge Immunity
EN61000-4-6 Conducted RF Immunity
EN 50082-2:1994 Generic Immunity Industrial Environment
ENV 55011:1991 - ISM equipment emissions
IEC 529 Intrusion Protection Codes/NEMA 1/IP 20
Diagnostics
No diagnostic features are provided on this module.
Configuration
Input voltage selection is made on DACA by plugging the captive cable harness into
connector JTX1 for 115 V ac nominal input or connector JTX2 for 230 V ac nominal
input.

Replacement/Warranty
Pack/Board Replacement
Handling Precautions
To prevent component damage caused by static electricity, treat
all boards with static sensitive handling techniques. Wear a
wrist grounding strap when handling boards or components,
but only after boards or components have been removed from
potentially energized equipment and are at a normally grounded
workstation.
This equipment contains a potential hazard of electric shock,

burn, or death. Ensure that all Lockout/Tag Out procedures are
followed prior to replacing terminal boards. Only personnel
who are adequately trained and thoroughly familiar with the
equipment and the instructions should install, operate, or
maintain this equipment.
Printed wiring boards may contain static-sensitive components. Therefore, GE ships

all replacement boards in anti-static bags.
Use the following guidelines when handling boards:
Store boards in anti-static bags or boxes.
Use a grounding strap when handling boards or board components (per previous
Caution criteria).
Replacement Procedures
System troubleshooting should be at the circuit board level. The failed pack/board should
be removed and replaced with a spare.
Note The failed pack/board should be returned to GE for repair. Do not attempt to
repair it on site.
To prevent electric shock, turn off power to the turbine control,

then test to verify that no power exists in the board before
touching it or any connected circuits.

board connections while power is applied to the equipment.
23-1 Replacement/Warranty GEH-6421Q Mark* VI Control

Replacing a Pack
To replace the pack
1. Lockout and/or tagout the field equipment and isolate the power source.
2. Remove the power plug located in the connector on the side of the pack.
3. Unplug the Ethernet cables and mark the positions of the cables to remove.
4. Loosen the two mounting nuts on the pack threaded shafts.
5. Unplug the pack and install the new pack.
Replacing V-type Boards
To replace the board
1. Power down the rack and remove the failed board.
2. Replace the board with a spare board of the same type, and move the Ethernet ID
plug from the old VPRO board to the replacement.
3. Power up the rack.
4. From the toolbox Outline View, under item Mark VI I/O, locate the failed
protection rack.From the shortcut menu, click Download. The board firmware and
configuration downloads.
5. Cycle power to the rack to establish communication with the controller.
Replacing T-type Boards
2. Check the voltage on each terminal and ensure no voltage is present.
3. Unplug the I/O cable (J-Plugs).
4. If applicable, unplug JF1, JF2 and JG1.
5. If applicable, remove TB3 power cables.
6. Loosen the two screws on the wiring terminal blocks and remove the blocks, leaving
the field wiring attached.
7. Remove the terminal board and replace it with a spare board, check that all jumpers
are set correctly (the same as in the old board).
8. Screw the terminal blocks back in place and plug in the J-plugs and connect cable
to TB3 as before
GEH-6421Q System Guide, Volume II Replacement/Warranty 23-2

Replacing D-type Boards
1. Lockout and/or tag out the field equipment and isolate the power source.
2. Unplug the I/O cable (J-plugs).
3. Disconnect all field wire and thermocouples along with shield wire.
4. Remove the terminal board and install the new board.
5. Reconnect all field wire and thermocouples as before.
6. Plug the I/O cable (J-plug) back.
Replacing J-type Boards
1. Lockout and/or tag out the field equipment and isolate the power source.
2. Check the voltage on each terminal to ensure no voltage is present.
3. Verify the label and unplug all connectors.
4. Loosen the two screws on each of the terminal blocks and remove the top portion
leaving all field wiring in place. If necessary, tie the block to the side out of the way.
5. Remove the mounting screws and the terminal board.
6. Install a new terminal board. Check that all jumpers, if applicable, are in the same
position as the ones on the old board.
7. Tighten it securely to the cabinet.
8. Replace the top portion of the terminal blocks and secure it with the screws on each
end. Ensure all field wiring is secure.
9. Plug in all wiring connectors.
Replacing S-type Boards
2. Check the voltage on each terminal to ensure there is no voltage present.
3. Unplug the I/O cable (J-plugs)
4. If applicable, unplug JF1, JF2, and JG1.
5. If applicable, remove the TB3 power cables.
6. A S-type terminal board uses a Euro-style box terminal block. Gently pry the
segment of the terminal block, containing the field wiring, away from the part
attached to the terminal board, leaving the wiring in place. If necessary, tie the
block to the side out of the way.
7. Remove the mounting screws and terminal board.
8. Install a new terminal board. Check to ensure all jumpers, if applicable, are in the
same position as the ones on the old board.
9. Tighten it securely to the cabinet.
10. Slide the segments containing field wiring into the terminal block. Ensure the
numbers on the segment with the field wires match the numbers on the terminal
block. Press together firmly. Ensure all field wiring is secure.

Renewal Warranty
How to Order a Board

When ordering a replacement board for a GE product, you need to know:
How to accurately identify the part
If the part is under warranty
How to place the order
Board Identification
A printed wiring board is identified by an alphanumeric part (catalog) number located
near its edge. The following figure explains the structure of the part number.
The boards functional acronym, shown below, is normally based on the board
description, or name.
IS 200 xxxx G# A A A
Artwork revision
Functional revision 1
Hardware form 2
Hardware form
Functional acronym
Assembly level 3
Manufacturer (DS & IS for GE in Salem, VA)

1
Backward compatible
2
Not backward compatible
3200 = a base-level board
215 = a higher level assembly or added components

220 = pack specific assembly
230 = a higher level module
Board Part Number Conventions

Placing the Order
Renewals/spares (or those not under warranty) should be ordered by contacting the
nearest GE Sales or Service Office, or an authorized GE Sales Representative. Be sure
to include:
Complete part number and description
Serial number
Material List (ML) number
GEH-6421Q System Guide, Volume II Replacement/Warranty 23-4

Note All digits are important when ordering or replacing any board. The factory
may substitute later versions of replacement boards based on availability and design
enhancements. However, GE Energy ensures backward compatibility of replacement
boards.

Glossary of Terms
application code Software that controls the machines or processes, specific to the
application.
ARCNET Attached Resource Computer Network. A LAN communications protocol
developed by Datapoint Corporation. The physical (coax and chip) and datalink (token
ring and board interface) layer of a 2.5 MHz communication network which serves as the
basis for DLAN+. See DLAN+.
attributes Information, such as location, visibility, and type of data that sets something
apart from others. In signals, an attribute can be a field within a record.
Balance of Plant (BOP) Plant equipment other than the turbine that needs to be
controlled.
baud A unit of data transmission. Baud rate is the number of bits per second transmitted.
Bently Nevada A manufacturer of shaft vibration monitoring equipment.
BIOS Basic input/output system. Performs the controller boot-up, which includes
hardware self-tests and the file system loader. The BIOS is stored in EEPROM and
is not loaded from the toolbox.
bit Binary Digit. The smallest unit of memory used to store only one piece of
information with two states, such as One/Zero or On/Off. Data requiring more than two
states, such as numerical values 000 to 999, requires multiple bits (see Word).
block Instruction blocks contain basic control functions, which are connected together
during configuration to form the required machine or process control. Blocks can perform
math computations, sequencing, or continuous control. The ToolboxST application
receives a description of the blocks from the block libraries.
board Printed wiring board.
Boolean Digital statement that expresses a condition that is either True or False. In the
toolbox, it is a data type for logical signals.
Bus An electrical path for transmitting and receiving data.
byte A group of binary digits (bits); a measure of data flow when bytes per second.
CIMPLICITY Operator interface software configurable for a wide variety of control
applications.
COI Computer Operator Interface that consists of a set of product and application specific
operator displays running on a small panel computer hosting Embedded Windows NT.
COM port Serial controller communication ports (two). COM1 is reserved for
diagnostic information and the Serial Loader. COM2 is used for I/O communication
configure To select specific options, either by setting the location of hardware jumpers
or loading software parameters into memory.
CRC Cyclic Redundancy Check, used to detect errors in Ethernet and other
transmissions.
CT Current Transformer, used to measure current in an ac power cable.
GEH-6421Q System Guide, Volume II Glossary of Terms 24-1

data server A PC which gathers control data from input networks and makes the
data available to PCs on output networks.
DCS (Distributed Control System) Control system, usually applied to control
of boilers and other process equipment.
DDPT IS200DDPT Dynamic Pressure Transducer Terminal Board that is used in
conjunction with the IS200VAMA VME Acoustic Monitoring Board that is used to
monitor acoustic or pressure waves in the turbine combustion chamber.
dead band A range of values in which the incoming signal can be altered without
changing the output response.
device A configurable component of a process control system.
DIN-rail European standard mounting rail for electronic modules.
DLAN+ GE Energy LAN protocol, using an ARCNET controller chip with modified
ARCNET drivers. A communications link between exciters, drives, and controllers,
featuring a maximum of 255 drops with transmissions at 2.5 MBPS.
DRAM Dynamic Random Access Memory, used in microprocessor-based equipment.
EGD Ethernet Global Data is a control network and protocol for the controller. Devices
share data through EGD exchanges (pages).
EMI Electro-magnetic interference; this can affect an electronic control system
Ethernet LAN with a 10/100 M baud collision avoidance/collision detection system
used to link one or more computers together. Basis for TCP/IP and I/O services layers
that conform to the IEEE 802.3 standard, developed by Xerox, Digital, and Intel.
EVA Early valve actuation, to protect against loss of synchronization.
event A property of Status_S signals that causes a task to run when the value of the
signal changes.
EX2000 (Exciter) GE generator exciter control; regulates the generator field current
to control the generator output voltage.
EX2100 (Exciter) Latest version of GE generator exciter control; regulates the
generator field current to control the generator output voltage.
fanned input An input to the terminal board which is connected to all three TMR
I/O boards.
fault code A message from the controller to the HMI indicating a controller warning
or failure.
firmware The set of executable software that is stored in memory chips that hold their
content without electrical power, such as EEPROM.
flash A non-volatile programmable memory device.
forcing Setting a live signal to a particular value, regardless of the value blockware
or I/O is writing to that signal.
frame rate Basic scheduling period of the controller encompassing one complete
input-compute-output cycle for the controller. It is the system dependent scan rate.
function The highest level of the blockware hierarchy, and the entity that corresponds
to a single .tre file.
gateway A device that connects two dissimilar LAN or connects a LAN to a wide-area
network (WAN), pc, or a mainframe. A gateway can perform protocol and bandwidth
conversion.
24-2 Glossary of Terms GEH-6421Q Mark* VI Control

Graphic Window A subsystem of the ToolboxST application for viewing and setting
the value of live signals.
health A term that defines whether a signal is functioning as expected.
heartbeat A signal emitted at regular intervals by software to demonstrate that it
is still active.
hexadecimal (hex) Base 16 numbering system using the digits 0-9 and letters A-F to
represent the decimal numbers 0-15. Two hex digits represent 1 byte.
HMI Human Machine Interface, usually a PC running CIMPLICITY software.
HRSG Heat Recovery Steam Generator using exhaust from a gas turbine.
ICS Integrated Control System. ICS combines various power plant controls into a
single system.
IEEE Institute of Electrical and Electronic Engineers. A United States-based society
that develops standards.
initialize To set values (addresses, counters, registers, and such) to a beginning value
prior to the rest of processing.
I/O Device Input/output hardware device that allow the flow of data into and out
I/O Input/output interfaces that allow the flow of data into and out of a device
I/O drivers Interface the controller with input/output devices, such as sensors, solenoid
valves, and drives, using a choice of communication networks.
I/O mapping Method for moving I/O points from one network type to another without
needing an interposing application task.
IONet The Mark VI I/O Ethernet communication network (controlled by the VCMIs)
insert Adding an item either below or next to another item in a configuration, as it is
viewed in the hierarchy of the Outline View of the ToolboxST application.
instance Update an item with a new definition.
item A line of the hierarchy of the Outline view of the ToolboxST application, which
can be inserted, configured, and edited (such as Function or System Data)
IP Address The address assigned to a device on an Ethernet communication network.
LCI Static Starter This runs the generator as a motor to bring a gas turbine up to
starting speed.
logical A statement of a true sense, such as a Boolean
macro A group of instruction blocks (and other macros) used to perform part of an
application program. Macros can be saved and reused.
Mark VIe Turbine controller A controller hosted in one or more VME racks that
perform turbine-specific speed control, logic, and sequencing.
median The middle value of three values; the median selector picks the value most
likely to be closest to correct.
Modbus A serial communication protocol developed by Modicon for use between
PLCs and other computers.
module A collection of tasks that have a defined scheduling period in the controller.
MTBFO Mean Time Between Forced Outage, a measure of overall system reliability.
NEMA National Electrical Manufacturers Association; a U.S. standards organization.

non-volatile The memory specially designed to store information even when the
power is off.
online Online mode provides full CPU communications, allowing data to be both
read and written. It is the state of the ToolboxST application when it is communicating
with the system for which it holds the configuration. Also, a download mode where the
device is not stopped and then restarted.
pcode A binary set of records created by the ToolboxST application, which contain
the controller application configuration code for a device. Pcode is stored in RAM and
flash memory.
period The time between execution scans for a module or task - also a property of a
module that is the base period of all of the tasks in the module
pin Block, macro, or module parameter that creates a signal used to make
interconnections.
Plant Data Highway (PDH) Ethernet communication network between the HMI
Servers and the HMI Viewers and workstations
PLC Programmable Logic Controller. Designed for discrete (logic) control of
machinery. It also computes math (analog) function and performs regulatory control.
PLU Power load unbalance, detects a load rejection condition which can cause
overspeed.
Power Distribution Module (PDM ) The PDM distributes 125 V dc and 115 V ac
to the VME racks and I/O terminal boards.
PROFIBUS An open fieldbus communication standard defined in international
standard EN 50 170 and is supported in simplex Mark VIe systems.
Proximitor Bently Nevadas proximity probes used for sensing shaft vibration.
PT Potential Transformer, used for measuring voltage in a power cable.
QNX A real time operating system used in the controller.
real time Immediate response, referring to process control and embedded control
systems that must respond instantly to changing conditions.
reboot To restart the controller or the ToolboxST application.
RFI Radio Frequency Interference is high frequency electromagnetic energy which can
affect the system.
register page A form of shared memory that is updated over a network - register
pages can be created and instanced in the controller and posted to the SDB
resources Also known as groups. Resources are systems (devices, machines, or work
stations where work is performed) or areas where several tasks are carried out. Resource
configuration plays an important role in the CIMPLICITY system by routing alarms to
specific users and filtering the data users receive.
RPSM IS2020RPSM Redundant Power Supply Module for VME racks that mounts
on the side of the control rack instead of the power supply. The two power supplies
that feed the RPSM are mounted remotely.
RTD Resistance Temperature Device used for measuring temperature.
runtime See product code.
runtime errors Controller problems indicated on the front panel by coded flashing
LEDS, and also in the Log View of the ToolboxST application.

sampling rate The rate at which process signal samples are obtained, measured
in samples/second.
Serial Loader Connects the controller to the toolbox PC using the RS-232C COM
ports. The Serial Loader initializes the controller flash file system and sets its TCP/IP
address to allow it to communicate with the ToolboxST application over Ethernet.
Server A pc which gathers data over Ethernet from plant devices, and makes the data
available to PC-based operator interfaces known as viewers.
SIFT Software Implemented Fault Tolerance, a technique for voting the three incoming
I/O data sets to find and inhibit errors. Note that Mark VIe also uses output hardware
voting.
signal The basic unit for variable information in the controller.
Simplex Operation that requires only one set of control and I/O, and generally uses
only one channel. The entire Mark VIe control system can operate in simplex mode, or
individual VME boards in an otherwise TMR system can operate in implex mode.
stall detection Detection of stall condition in a gas turbine compressor.
SOE Sequence of Events, a high-speed record of contact closures taken during a plant
upset to allow detailed analysis of the event.
Static Starter See LCI.
symbols Created by the ToolboxST application and stored in the controller, the symbol
table contains signal names and descriptions for diagnostic messages.
task A group of blocks and macros scheduled for execution by the user.
TBAI Analog input terminal board, interfaces with VAIC.
TBAO Analog output terminal board, interfaces with VAOC.
TBCC Thermocouple input terminal board, interfaces with VTCC.
TBCI Contact input terminal board, interfaces with VCCC or VCRC.
TCP/IP Communications protocols developed to inter-network dissimilar systems. It
is a de facto UNIX standard, but is supported on almost all systems. TCP controls data
transfer and IP provides the routing for functions, such as file transfer and e-mail.
TGEN Generator terminal board, interfaces with VGEN.
TMR Triple Modular Redundancy. An operation that uses three identical sets of control
and I/O (channels R, S, and T) and votes the results.
ToolboxST A Windows-based software package used to configure the Mark VIe
controllers, also exciters and drives.
TPRO Turbine protection terminal board, interfaces with VPRO.
TPYR Pyrometer terminal board for blade temperature measurement, interfaces with
VPYR.
TREG Turbine emergency trip terminal board, interfaces with VPRO.
trend A time-based plot to show the history of values, similar to a recorder, available in
the Historian and the ToolboxST application.
TRLY Relay output terminal board, interfaces with VCCC or VCRC.
TRPG Primary trip terminal board, interfaces with VTUR.
TRTD RTD input terminal board, interfaces with VRTD.

TSVO Servo terminal board, interfaces with VSVO.
TTUR Turbine terminal board, interfaces with VTUR.
TVIB Vibration terminal board, interfaces with VVIB.
UCVB A version of the Mark VIe controller.
Unit Data Highway (UDH) Connects the Mark VIe controllers, LCI, EX2000,
PLCs, and other GE provided equipment to the HMI Servers.
validate Makes certain that the ToolboxST application items or devices do not contain
errors, and verifies that the configuration is ready to be built into pcode.
VAMA IS200VAMA VME Acoustic Monitoring Board that is used in conjunction with
the IS200DDPT Dynamic Pressure Transducer Terminal Board to monitor acoustic or
pressure waves in the turbine combustion chamber.
VCMI The Mark VIe VME communication board which links the I/O with the
controllers.
VME board All the Mark VIe boards are hosted in Versa Module Eurocard (VME)
racks.
VPRO Mark VIe Turbine Protection Module, arranged in a self contained TMR
subsystem.
Windows NT Advanced 32-bit operating system from Microsoft for 386-based PCs
and above.
word A unit of information composed of characters, bits, or bytes, that is treated as an
entity and can be stored in one location. Also, a measurement of memory length, usually
4, 8, or 16-bits long.

Notes
application code Software that controls the machines or processes, specific to the
application.
ARCNET Attached Resource Computer Network. A LAN communications protocol
developed by Datapoint Corporation. The physical (coax and chip) and datalink (token
ring and board interface) layer of a 2.5 MHz communication network which serves as the
basis for DLAN+. See DLAN+.
attributes Information, such as location, visibility, and type of data that sets something
apart from others. In signals, an attribute can be a field within a record.
Balance of Plant (BOP) Plant equipment other than the turbine that needs to be
controlled.
baud A unit of data transmission. Baud rate is the number of bits per second transmitted.
Bently Nevada A manufacturer of shaft vibration monitoring equipment.
BIOS Basic input/output system. Performs the controller boot-up, which includes
hardware self-tests and the file system loader. The BIOS is stored in EEPROM and
is not loaded from the toolbox.
bit Binary Digit. The smallest unit of memory used to store only one piece of
information with two states, such as One/Zero or On/Off. Data requiring more than two
states, such as numerical values 000 to 999, requires multiple bits (see Word).
block Instruction blocks contain basic control functions, which are connected together
during configuration to form the required machine or process control. Blocks can perform
math computations, sequencing, or continuous control. The ToolboxST application
receives a description of the blocks from the block libraries.
board Printed wiring board.
Boolean Digital statement that expresses a condition that is either True or False. In the
toolbox, it is a data type for logical signals.
Bus An electrical path for transmitting and receiving data.
byte A group of binary digits (bits); a measure of data flow when bytes per second.
CIMPLICITY Operator interface software configurable for a wide variety of control
applications.
COI Computer Operator Interface that consists of a set of product and application specific
operator displays running on a small panel computer hosting Embedded Windows NT.
COM port Serial controller communication ports (two). COM1 is reserved for
diagnostic information and the Serial Loader. COM2 is used for I/O communication
configure To select specific options, either by setting the location of hardware jumpers
or loading software parameters into memory.
CRC Cyclic Redundancy Check, used to detect errors in Ethernet and other
transmissions.
CT Current Transformer, used to measure current in an ac power cable.
data server A PC which gathers control data from input networks and makes the
data available to PCs on output networks.

DCS (Distributed Control System) Control system, usually applied to control
of boilers and other process equipment.
DDPT IS200DDPT Dynamic Pressure Transducer Terminal Board that is used in
conjunction with the IS200VAMA VME Acoustic Monitoring Board that is used to
monitor acoustic or pressure waves in the turbine combustion chamber.
dead band A range of values in which the incoming signal can be altered without
changing the output response.
device A configurable component of a process control system.
DIN-rail European standard mounting rail for electronic modules.
DLAN+ GE Energy LAN protocol, using an ARCNET controller chip with modified
ARCNET drivers. A communications link between exciters, drives, and controllers,
featuring a maximum of 255 drops with transmissions at 2.5 MBPS.
DRAM Dynamic Random Access Memory, used in microprocessor-based equipment.
EGD Ethernet Global Data is a control network and protocol for the controller. Devices
share data through EGD exchanges (pages).
EMI Electro-magnetic interference; this can affect an electronic control system
Ethernet LAN with a 10/100 M baud collision avoidance/collision detection system
used to link one or more computers together. Basis for TCP/IP and I/O services layers
that conform to the IEEE 802.3 standard, developed by Xerox, Digital, and Intel.
EVA Early valve actuation, to protect against loss of synchronization.
event A property of Status_S signals that causes a task to run when the value of the
signal changes.
EX2000 (Exciter) GE generator exciter control; regulates the generator field current
to control the generator output voltage.
EX2100 (Exciter) Latest version of GE generator exciter control; regulates the
generator field current to control the generator output voltage.
fanned input An input to the terminal board which is connected to all three TMR
I/O boards.
fault code A message from the controller to the HMI indicating a controller warning
or failure.
firmware The set of executable software that is stored in memory chips that hold their
content without electrical power, such as EEPROM.
flash A non-volatile programmable memory device.
forcing Setting a live signal to a particular value, regardless of the value blockware
or I/O is writing to that signal.
frame rate Basic scheduling period of the controller encompassing one complete
input-compute-output cycle for the controller. It is the system dependent scan rate.
function The highest level of the blockware hierarchy, and the entity that corresponds
to a single .tre file.
gateway A device that connects two dissimilar LAN or connects a LAN to a wide-area
network (WAN), pc, or a mainframe. A gateway can perform protocol and bandwidth
conversion.
Graphic Window A subsystem of the ToolboxST application for viewing and setting
the value of live signals.

health A term that defines whether a signal is functioning as expected.
heartbeat A signal emitted at regular intervals by software to demonstrate that it
is still active.
hexadecimal (hex) Base 16 numbering system using the digits 0-9 and letters A-F to
represent the decimal numbers 0-15. Two hex digits represent 1 byte.
HMI Human Machine Interface, usually a PC running CIMPLICITY software.
HRSG Heat Recovery Steam Generator using exhaust from a gas turbine.
ICS Integrated Control System. ICS combines various power plant controls into a
single system.
IEEE Institute of Electrical and Electronic Engineers. A United States-based society
that develops standards.
initialize To set values (addresses, counters, registers, and such) to a beginning value
prior to the rest of processing.
I/O Device Input/output hardware device that allow the flow of data into and out
I/O Input/output interfaces that allow the flow of data into and out of a device
I/O drivers Interface the controller with input/output devices, such as sensors, solenoid
valves, and drives, using a choice of communication networks.
I/O mapping Method for moving I/O points from one network type to another without
needing an interposing application task.
IONet The Mark VI I/O Ethernet communication network (controlled by the VCMIs)
insert Adding an item either below or next to another item in a configuration, as it is
viewed in the hierarchy of the Outline View of the ToolboxST application.
instance Update an item with a new definition.
item A line of the hierarchy of the Outline view of the ToolboxST application, which
can be inserted, configured, and edited (such as Function or System Data)
IP Address The address assigned to a device on an Ethernet communication network.
LCI Static Starter This runs the generator as a motor to bring a gas turbine up to
starting speed.
logical A statement of a true sense, such as a Boolean
macro A group of instruction blocks (and other macros) used to perform part of an
application program. Macros can be saved and reused.
Mark VIe Turbine controller A controller hosted in one or more VME racks that
perform turbine-specific speed control, logic, and sequencing.
median The middle value of three values; the median selector picks the value most
likely to be closest to correct.
Modbus A serial communication protocol developed by Modicon for use between
PLCs and other computers.
module A collection of tasks that have a defined scheduling period in the controller.
MTBFO Mean Time Between Forced Outage, a measure of overall system reliability.
NEMA National Electrical Manufacturers Association; a U.S. standards organization.
non-volatile The memory specially designed to store information even when the
power is off.

online Online mode provides full CPU communications, allowing data to be both
read and written. It is the state of the ToolboxST application when it is communicating
with the system for which it holds the configuration. Also, a download mode where the
device is not stopped and then restarted.
pcode A binary set of records created by the ToolboxST application, which contain
the controller application configuration code for a device. Pcode is stored in RAM and
flash memory.
period The time between execution scans for a module or task - also a property of a
module that is the base period of all of the tasks in the module
pin Block, macro, or module parameter that creates a signal used to make
interconnections.
Plant Data Highway (PDH) Ethernet communication network between the HMI
Servers and the HMI Viewers and workstations
PLC Programmable Logic Controller. Designed for discrete (logic) control of
machinery. It also computes math (analog) function and performs regulatory control.
PLU Power load unbalance, detects a load rejection condition which can cause
overspeed.
Power Distribution Module (PDM ) The PDM distributes 125 V dc and 115 V ac
to the VME racks and I/O terminal boards.
PROFIBUS An open fieldbus communication standard defined in international
standard EN 50 170 and is supported in simplex Mark VIe systems.
Proximitor Bently Nevadas proximity probes used for sensing shaft vibration.
PT Potential Transformer, used for measuring voltage in a power cable.
QNX A real time operating system used in the controller.
real time Immediate response, referring to process control and embedded control
systems that must respond instantly to changing conditions.
reboot To restart the controller or the ToolboxST application.
RFI Radio Frequency Interference is high frequency electromagnetic energy which can
affect the system.
register page A form of shared memory that is updated over a network - register
pages can be created and instanced in the controller and posted to the SDB
resources Also known as groups. Resources are systems (devices, machines, or work
stations where work is performed) or areas where several tasks are carried out. Resource
configuration plays an important role in the CIMPLICITY system by routing alarms to
specific users and filtering the data users receive.
RPSM IS2020RPSM Redundant Power Supply Module for VME racks that mounts
on the side of the control rack instead of the power supply. The two power supplies
that feed the RPSM are mounted remotely.
RTD Resistance Temperature Device used for measuring temperature.
runtime See product code.
runtime errors Controller problems indicated on the front panel by coded flashing
LEDS, and also in the Log View of the ToolboxST application.
sampling rate The rate at which process signal samples are obtained, measured
in samples/second.

Serial Loader Connects the controller to the toolbox PC using the RS-232C COM
ports. The Serial Loader initializes the controller flash file system and sets its TCP/IP
address to allow it to communicate with the ToolboxST application over Ethernet.
Server A pc which gathers data over Ethernet from plant devices, and makes the data
available to PC-based operator interfaces known as viewers.
SIFT Software Implemented Fault Tolerance, a technique for voting the three incoming
I/O data sets to find and inhibit errors. Note that Mark VIe also uses output hardware
voting.
signal The basic unit for variable information in the controller.
Simplex Operation that requires only one set of control and I/O, and generally uses
only one channel. The entire Mark VIe control system can operate in simplex mode, or
individual VME boards in an otherwise TMR system can operate in implex mode.
stall detection Detection of stall condition in a gas turbine compressor.
SOE Sequence of Events, a high-speed record of contact closures taken during a plant
upset to allow detailed analysis of the event.
Static Starter See LCI.
symbols Created by the ToolboxST application and stored in the controller, the symbol
table contains signal names and descriptions for diagnostic messages.
task A group of blocks and macros scheduled for execution by the user.
TBAI Analog input terminal board, interfaces with VAIC.
TBAO Analog output terminal board, interfaces with VAOC.
TBCC Thermocouple input terminal board, interfaces with VTCC.
TBCI Contact input terminal board, interfaces with VCCC or VCRC.
TCP/IP Communications protocols developed to inter-network dissimilar systems. It
is a de facto UNIX standard, but is supported on almost all systems. TCP controls data
transfer and IP provides the routing for functions, such as file transfer and e-mail.
TGEN Generator terminal board, interfaces with VGEN.
TMR Triple Modular Redundancy. An operation that uses three identical sets of control
and I/O (channels R, S, and T) and votes the results.
ToolboxST A Windows-based software package used to configure the Mark VIe
controllers, also exciters and drives.
TPRO Turbine protection terminal board, interfaces with VPRO.
TPYR Pyrometer terminal board for blade temperature measurement, interfaces with
VPYR.
TREG Turbine emergency trip terminal board, interfaces with VPRO.
trend A time-based plot to show the history of values, similar to a recorder, available in
the Historian and the ToolboxST application.
TRLY Relay output terminal board, interfaces with VCCC or VCRC.
TRPG Primary trip terminal board, interfaces with VTUR.
TRTD RTD input terminal board, interfaces with VRTD.
TSVO Servo terminal board, interfaces with VSVO.
TTUR Turbine terminal board, interfaces with VTUR.

TVIB Vibration terminal board, interfaces with VVIB.
UCVB A version of the Mark VIe controller.
Unit Data Highway (UDH) Connects the Mark VIe controllers, LCI, EX2000,
PLCs, and other GE provided equipment to the HMI Servers.
validate Makes certain that the ToolboxST application items or devices do not contain
errors, and verifies that the configuration is ready to be built into pcode.
VAMA IS200VAMA VME Acoustic Monitoring Board that is used in conjunction with
the IS200DDPT Dynamic Pressure Transducer Terminal Board to monitor acoustic or
pressure waves in the turbine combustion chamber.
VCMI The Mark VIe VME communication board which links the I/O with the
controllers.
VME board All the Mark VIe boards are hosted in Versa Module Eurocard (VME)
racks.
VPRO Mark VIe Turbine Protection Module, arranged in a self contained TMR
subsystem.
Windows NT Advanced 32-bit operating system from Microsoft for 386-based PCs
and above.
word A unit of information composed of characters, bits, or bytes, that is treated as an
entity and can be stored in one location. Also, a measurement of memory length, usually
4, 8, or 16-bits long.

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www.geenergy.com

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To prevent personal injury or equipment damage caused by

I/O Overview 1-1

GEH-6421Q System Guide, Volume II Contents i

ii Contents GEH-6421Q Mark* VI Control

GEH-6421Q System Guide, Volume II Contents iii

iv Contents GEH-6421Q Mark* VI Control

GEH-6421Q System Guide, Volume II Contents v

vi Contents GEH-6421Q Mark* VI Control

GEH-6421Q System Guide, Volume II Contents vii

viii Contents GEH-6421Q Mark* VI Control

GEH-6421Q System Guide, Volume II Contents ix

x Contents GEH-6421Q Mark* VI Control

GEH-6421Q System Guide, Volume II Contents xi

I/O Processor Boards and Standard Terminal Boards

1-1 I/O Overview GEH-6421Q Mark* VI Control

GEH-6421Q System Guide, Volume II I/O Overview 1-2

Terminal Board Terminal Block Features

Top View Front View Side View

TBSW Mounted to Terminal Block

The TBSW is not to be used for live circuit interruption. The

1-3 I/O Overview GEH-6421Q Mark* VI Control

Board Type TBSW Applications

GEH-6421Q System Guide, Volume II I/O Overview 1-4

Class Voltage Description

1-5 I/O Overview GEH-6421Q Mark* VI Control

Mark VI Relay Board Features

Feature DRLYH1A TRLYH1B TRLYH1C TRLYH1D TRLYH1E TRLYH1F

GEH-6421Q System Guide, Volume II I/O Overview 1-6

Mark VI Trip Terminal Board Features

Board TMR Simplex Output Output ESTOP Input Input Economy

1-7 I/O Overview GEH-6421Q Mark* VI Control

GEH-6421Q System Guide, Volume II I/O Overview 1-8

Small Simplex System Rack, Boards, and Cabling

1-9 I/O Overview GEH-6421Q Mark* VI Control

2 Analog current outputs, with choice of 20 mA or VAIC

GEH-6421Q System Guide, Volume II I/O Overview 1-10

2-1 UCV Controller GEH-6421Q Mark* VI Control

VCMIH2 Communication Board with Controller Interface Board

Cooling Fan Fan 24 Vdc

Typical Controller Mounted in Rack with Communication Board

GEH-6421Q System Guide, Volume II UCV Controller 2-2

2-3 UCV Controller GEH-6421Q Mark* VI Control

GEH-6421Q System Guide, Volume II UCV Controller 2-4

UCVG Controller Side View

2-5 UCV Controller GEH-6421Q Mark* VI Control

Expansion site PMC expansion site available, IEEE 1386.1 5V PCI

GEH-6421Q System Guide, Volume II UCV Controller 2-6

Mark VI Controller UCVFH2

Note: To connect the

2-7 UCV Controller GEH-6421Q Mark* VI Control

GEH-6421Q System Guide, Volume II UCV Controller 2-8