EXPERIMENT NO: 2

RC INTEGRATING AND DIFFERENTIATING CIRCUITS

AIM

To design and set up integrator and differentiator circuits.

COMPONENTS AND EQUIPMENTS REQUIRED

Capacitor, Resistor, Signal generator, Bread board and CRO

THEORY

A differentiator gives the derivative of input voltage as output. Differentiator using

passive components resistors and capacitors is basically a high pass filter. It acts as a
differentiator only when the time constant is too small. The voltage at output is proportional to

the current through capacitor. The current through the capacitor can be expressed as I = C .

The output is taking across the resistor. So output will be RC dv/dt. Thus differentiation of input
takes place. When a square wave is applied at the input, during the positive half cycle capacitor
charges. So initially the voltage across the resistor will be the applied voltage. As the capacitor
charges, the voltage across resistor decreases.
Integrator is a low pass filter with large time constant. Here output is taking across the
capacitor. As the input square wave is applied, during the positive half cycle the voltage across
capacitor increases from zero, to the maximum (peak value of applied voltage). During the
negative half cycle, the capacitor starts to discharge and comes to zero. This process repeats for
the remaining cycles and a triangular wave is obtained.

PROCEDURE:

Set up the circuit on the breadboard.

Apply a square wave input.
Observe the input and output simultaneously on the CRO.
Repeat the procedure for different types of signals.

DESIGN
DIFFERENTIATOR
For a differentiator, RC<= 0.0016T.
For an input signal of frequency 1 kHz, T=1ms.
Let R=6.8K (Ten times output impedance of function generator to avoid the loading)
So C=235.3 pF. Use a 220pF capacitor

INTEGRATOR
For an integrator, RC>=16 T.
For an input signal of frequency 1 kHz, T=1ms.
Let R=6.8K (Ten times output impedance of function generator)
So C=2.35F (approximately). Use a 2.2F capacitor

CIRCUIT DIAGRAM:

RC DIFFERENTIATOR

RC INTEGRATOR
TYPICAL OUTPUT WAVEFORM S

RESULT
Integrator and differentiator circuits are designed and waveforms are plotted
EXPERIMENT NO: 3

CLIPPING AND CLAMPING CIRCUITS

AIM

To design and setup different clipping and clamping circuits

COMPONENTS AND EQUIPMENTS REQUIRED

Diode IN4007, Resistor, Function Generator, CRO and Power supply

THEORY
Clippers are a variety of diode networks that have the ability to clip off a portion of the input
signal without distorting the remaining part of the waveform. Clippers or limiters are circuits that
tend to maintain the output voltage within some specified limits. Hence clippers are also called
as amplitude selectors or slicers. The half wave rectifier is the simplest form of diode clipper.
There are two general categories of clippers series and parallel. The series configuration is
defined as one where the diode is in series with the load, while the parallel configuration has the
diode in a branch parallel to the load. Clipper circuits are used in radio and TV receivers.
A clamping circuit is one that will clamp a signal to a different dc level. They are also
known as inserting circuits or dc restoring circuits. They are used in TV receivers for restoring
lost dc levels in signals from transmission. The network consists of a capacitor, diode and a
resistive element. A dc supply can be used to introduce an additional phase shift. The magnitude
of R and C must be chosen such that time constant = RC is large enough to ensure that the
capacitor cannot discharge significantly during the interval the diode is non-conducting. The
capacitor charges through the diode and reaches the peak input voltage. The diode become
reverse biased once the input voltage is less than the peak voltage.
The clamping circuit shifts either the positive and negative peak of the signal to a desired
level. The circuits which clamps the input signal to the positive side is called positive clamper
and that to the negative side is called negative clamper.

PROCEDURE
Set up the circuit as shown in the figures

Note down the waveforms using CRO

DESIGN

CLIPPER

Select 1N4001

The series resistance for current limiting,

R = = 1K, Where Rf is the forward resistance and Rr is the reverse resistance

Typical values of Rf = 30 and Rr = 300K

Substituting R=3.3K

CIRCUIT DIAGRAM
MODEL WAVEFORMS
DESIGN
CLAMPER

Select 1N4001

Let f = 1KHz , T = 1 = 1 ms

RCT, hence RC 1ms

Let RC = 100T , i.e. RC = 100ms.

100
Let C = 1f, hence R = = 100K
1

The resistor R is optional because the CRO input impedance will serve the purpose of it.

CIRCUIT DIAGRAM
MODEL WAVEFORMS
RESULT

Different clipping and clamping circuits are designed and waveforms are plotted
EXPERIMENT NO: 4

FULL WAVE RECTIFIERS-WITH AND WITHOUT FILTER

RIPPLE FACTOR AND REGULATION

AIM
To Rectify the AC signal and then to find out Ripple factor and percentage of
Regulation in Full-wave rectifier center tapped circuit with and without Capacitor
filter.

COMPONENTS AND EQUIPMENTS REQUIRED

Transformer, Diode , Capacitors ,Decade Resistance Box , Multimeter ,Bread Board and
connecting wires ,Dual Trace CRO.

THEORY
A full wave rectifier circuit produces an output voltage or current which is purely DC or
has some specified DC component. Full wave rectifiers have some fundamental
advantages over their half wave rectifier counterparts. The average (DC) output voltage is
higher than for half wave, the output of the full wave rectifier has much less ripple than
that of the half wave rectifier producing a smoother output waveform. In a Full Wave
Rectifier circuit two diodes are now used, one for each half of the cycle. A multiple
winding transformer is used whose secondary winding is split equally into two halves
with a common centre tapped connection, This configuration results in each diode
conducting in turn when its anode terminal is positive with respect to the transformer
centre point C producing an output during both half cycles.

PROCEDURE:

WITHOUT FILTER:
1. Connecting the circuit on bread board as per the circuit diagram.
2. Connect the primary of the transformer to main supply i.e. 230V, 50Hz
3. Connect the decade resistance box and set the RL value to 100
4. Connect the Multimeter at output terminals and vary the load resistance (DRB)
from 100 to 1K and note down the Vac and Vdc as per given tabular form
5. Disconnect load resistance ( DRB) and note down no load voltage Vdc .
6. Connect load resistance at 1K and connect Channel II of CRO at output
terminals and CH I of CRO at Secondary Input terminals observe and note down
the Input and Output Wave form on Graph Sheet.
Vac
7. Calculate ripple factor = Vdc
VNL VFL
8. Calculate Percentage of Regulation % = 100%
VNL

WITH CAPACITOR FILTER:

Connect the circuit as per the circuit Diagram and repeat the above procedure
from steps 2 to 8.

CIRCUIT DIAGRAM

Full wave Rectifier without filter

FULLWAVE RECTIFIER WIH CAPACITOR FILTER

OUTPUT WAVEFORM

Fullwave Rectifier with capacitor filter waveform

RESULT:

Observe Input and Output Wave forms and Calculate ripple factor and
percentage of regulation in Full-wave rectifier with and without filter.

Without Filter:
Ripple Factor :
Regulation :

With Capacitor Filter:

Ripple Factor :
Regulation :
EXPERIMENT NO: 5

SIMPLE ZENER VOLTAGE REGULATOR (LOAD AND LINE

REGULATION)

AIM

To set up and study a zener diode voltage regulator and to plot its line and load regulation
characteristics.

COMPONENTS AND EQUIPMENTS REQUIRED

Zener diode, resistor, rheostat, voltmeter, ammeter, DC sources and bread board.

THEORY
A Zener diode is a type of diode that permits current not only in the forward direction
like a normal diode, but also in the reverse direction if the voltage is larger than the breakdown
voltage known as "Zener knee voltage" or "Zener voltage". The device was named after Clarence
Zener, who discovered this electrical property. A Zener diode exhibits almost the same
properties, except the device is specially designed so as to have a greatly reduced breakdown
voltage, the so-called Zener voltage. By contrast with the conventional device, a reverse-biased
Zener diode will exhibit a controlled breakdown and allow the current to keep the voltage across
the Zener diode close to the Zener voltage. For example, a diode with a Zener breakdown voltage
of 3.2 V will exhibit a voltage drop of very nearly 3.2 V across a wide range of reverse currents.
The Zener diode is therefore ideal for applications such as the generation of a reference voltage
(e.g.foran amplifier stage), or as a voltage stabilizer for low-current applications. Zener diodes
are widely used as voltage references and as shunt regulators to regulate the voltage across small
circuits. When connected in parallel with a variable voltage source so that it is reverse biased, a
Zener diode conducts when the voltage reaches the diode's reverse breakdown voltage. From that
point on, the relatively low impedance of the diode keeps the voltage across the diode at that
value.
A series resistance RSE is connected in series with the unregulated (or input), supply.
Zener diode is connected across the base and collector terminals of the NPN transistor and the
transistor is connected across the output.Unregulated voltage is reduced, due to voltage drop in
series resistance RSE, by an amount that depends on the current supplied to the load RL. The
voltage across the load is fixed by the Zener diode and transistor base-emitter voltage VBE and is
given as
Vout = Vz + VBE = Vin I RSE

Since both Vz and VBE remain nearly constant so output voltage Vout remains nearly constant.
This is explained below:

If the input (or supply) voltage increases, it causes increase in Vout and VBE resulting in
increase in base current IB and therefore, increase in collector current Ic (Ic = IB). Thus with the
increase in supply voltage, supply current I increases causing more voltage drop in series
resistance RSE and thereby reducing the output voltage. This decrease in output voltage is enough
to compensate the initial increase in output voltage. Thus output voltage remains almost
constant. Reverse happens should the supply voltage decrease.

If the load resistance RL decreases, output current IL increases and this increase in output
current is supplied by decrease in base and collector currents IB and Ic. Thus the input current I
remains almost constant causing no change in voltage drop across series resistance R SE. Thus
output voltage Vout being the difference of supply voltage (fixed) and series resistor drop VR
(fixed) remains constant. Reverse happens should the load resistance increase.

PROCEDURE:

Make the circuits as shown in figures.

LOAD REGULATION: Fig shows the connection diagram of Load regulation. Here
an ammeter is connected in series with RL & a volt meter is connected across the variable
load rsistance. Here the dc supply is fixed at 25 volts. Vary the load resistance from 0
onward.
SOURCE REGULATION: Fig shows the connection diagram of Source regulation.
Here two voltmeters are connected in parallel with supply voltage and fixed load
resistance (RL) and dc supply is varied from 0 volt and on wards in the step of 1 volt.
DESIGN

To get a 5.6 V as output, select SZ 5.6 as Zener diode .Take load current as 5 mA.

Load Resistance RL=output voltage/output current.

RSmax> RS>RSmin

RSmax= (Vimax-VZ) )/IZ=(13-5.6)/15mA=493

RSmin= (Vimin-VZ )/IS=(7-5.6)/15mA=93

IS= IL+IZ=5+10=15mA.

CIRCUIT DIAGRAM:

LOAD REGULATION
LINE REGULATION

OBSERVATION:

LOAD REGULATION

Sl.no Source voltage (volts) Current through load Voltage across load
resistance ( ) in ma ( )
in volts

LINE REGULATION

Sl.no Input Voltage ( ) volts Voltage Across Series Load Voltage

resistance ( ) volts =
MODEL WAVEFORM

LOAD REGULATION

LINE REGULATION

CALCULATIONS

1.Percentage of Line Regulation = (Vo/Vi)*100

2 .Percentage of Load Regulation = (VNL-VFL)/VFL*100

RESULT

Zener diode shunt regulator and its line and load characteristics are studied.
EXPERIMENT NO: 6

CHARACTERISTICS OF BJT IN CE CONFIGURATION

AIM

To plot the input and output characteristics of transistor in CE configuration & to calculate the
dynamic input resistance, dynamic output resistance and common emitter current gain

COMPONENTS AND EQUIPMENTS REQUIRED

Transistor (BC 107 or SL100), Voltmeter, Ammeter, Resistor, Bread board, power source and
CRO

THEORY

In common emitter configuration, input voltage is applied between base and emitter
terminals and output is taken across the collector and emitter terminals. Therefore the emitter
terminal is common to both input circuits and output circuits. The input characteristics resemble
that of a forward biased diode curve. CE configuration is most commonly used configuration for
amplification since it provides voltage, current and power gain more than unity and has moderate
values of input and output impedances.

Input impedance: It is the ratio of the change in base-emitter voltage ( ) to the change in
base current ( ) at constant . i.e,

Input impedance , = =constant

Output impedance: It is the ratio of the change in collector-emitter voltage ( ) to the

change in collector current ( ) at constant . i.e,

Output impedance , = =constant

Forward current gain: It is the ratio of the change in collector current to the corresponding
change in base current,keeping collector-emitter voltage constant

Forward current gain , = =constant

DESIGN

A current limiting resistor RB is used to protect base terminal from excess voltage. Maximum
voltage at the base terminal is 0.6 or 0.8V

RB = (5v-VBE)/IB

=5v-.6v/.0001

= 44K Use 47 K

BC107: Maximum ratings

VCB = 50V, VCE = 45V, IC = 100mA

Nominal ratings:

VCE = 5V, hFE = 100 to 500 measured at IC = 2mA

PROCEDURE

INPUT CHARACTERISTICS

1. Connect the circuit as per the circuit diagram.

2. For plotting the input characteristics the output voltage VCE is kept constant at 1V and for
different values of VBE. Note down the values of IC

3. Repeat the above step by keeping VCE at 2V and 4V.

4. Tabulate all the readings.

5. Plot the graph between VBE and IB for constant VCE.

OUTPUT CHARACTERISTICS

1. Connect the circuit as per the circuit diagram

2. For plotting the output characteristics the input current IB is kept constant at 10 A and for
different values of VCE note down the values of IC

3. Repeat the above step by keeping IB at 75 A 100 A

4. Tabulate the all the readings

5. Plot the graph between VCE and IC for constant IB.

CIRCUIT DIAGRAM
OBSERVATIONS

INPUT CHARACTERISTICS

VCE = 0V VCB= 3V VCB = 6V

VBE(V) IB(A) VBE(V) IB(A) VBE(V) IB(A)

OUTPUT CHARACTERISTICS

IB =60A IB =80A IB =100A

VCE(V) IC(mA) VCE(V) IC(mA) VCE(V) IC(mA)

MODEL GRAPH

INPUT CHARACTERISTICS

OUTPUT CHARACTERISTICS

CALCULATIONS

1. Dynamic input resistance , = =constant

2. Dynamic output resistance , = =constant

 =

3. Common emitter current gain, = =constant

RESULT

The input and output characteristics of a transistor in CE configuration are designed and
dynamic input and output resistance and current gains are calculated.
EXPERIMENT NO: 7

CHARACTERISTICS OF MOSFET

AIM

To study and plot the MOSFET characteristics.

COMPONENTS AND EQUIPMENTS REQUIRED

MOSFET, voltmeter, ammeter, resistor, DC source, bread board and CRO.

THEORY

The metaloxidesemiconductor field-effect transistor (MOSFET, MOS-FET, or MOS

FET) is a transistor used for amplifying or switching electronic signals. Although the MOSFET
is a four-terminal device with source (S), gate (G), drain (D), and body (B) terminals, the body
(or substrate) of the MOSFET often is connected to the source terminal, making it a three-
terminal device like other field-effect transistors. Because these two terminals are normally
connected to each other (short-circuited) internally, only three terminals appear in electrical
diagrams. The MOSFET is by far the most common transistor in both digital and analog
circuits, though the bipolar junction transistor was at one time much more common.

The working principle of MOSFET depends up on the MOS capacitor. The MOS
capacitor is the main part. The semiconductor surface at below the oxide layer and between the
drain and source terminal can be inverted from p-type to n-type by applying a positive or
negative gate voltages respectively. When we apply positive gate voltage the holes present
beneath the oxide layer experience repulsive force and the holes are pushed downward with the
substrate. The depletion region is populated by the bound negative charges, which are associated
with the acceptor atoms. The positive voltage also attracts electrons from the n+ source and drain
regions in to the channel. The electron reach channel is formed. Now, if a voltage is applied
between the source and the drain, current flows freely between the source and drain. Gate
voltage controls the electrons concentration in the channel. Instead of positive if negative
voltage is applied , a hole channel will be formed beneath the oxide layer.
PROCEDURE:

DRAIN CHARACTERISTICS

1. Connect the circuit as per the circuit diagram.

2. For plotting the drain characteristics the VGS is kept constant at 0V and vary VDS for
different values of VGS, 2V and 4V.
3. Reverse the polarity of Vgs and the voltmeter measuring it. Note down Id for negative
values of Vds ,-2V and -4V . Plot a graph with VDS along x axis and ID along y axis

TRANSFER CHARACTERISTICS

1. Fix VDS at 10V .Note down drain current ID for various values of VGS. Plot a graph with
VGS along x axis and ID along y axis

CIRCUIT DIAGRAM
OBSERVATIONS

DRAIN CHARACTERISTICS

VGS=1V VGS=2V VGS=3V

VDS ID VDS ID VDS ID

TRANSFER CHARACTERISTICS

VDS=5V VDS=10V
VGS ID VGS ID
MODEL WAVEFORM

RESULT

Plotted the characteristics of a MOSFET.

|
Dynamic drain resistance, =VDS/ID VGS=constant

= ..K

Mutual conductance, = ID/VGS |VDS= constant

= .ms

|
Amplification factor = VDS/VGS ID=constant

= ..
EXPERIMENT NO: 8

RC COUPLED CE AMPLIFIER- FREQUENCY RESPONSE

CHARACTERISTICS

AIM

To design and set up an RC coupled CE amplifier using BJT and to plot its frequency response .

COMPONENTS AND EQUIPMENTS REQUIRED

Transistor, DC source, capacitor, resistor, bread board, signal generator, multi-meter and CRO.
THEORY
The common emitter RC coupled amplifier is one of the simplest and elementary transistor
amplifier that can be made. The main purpose of this circuit is pre-amplification i.e to make weak
signals strong enough for further processing or amplification. If designed properly, this amplifier can
provide excellent signal characteristics.
Capacitor Cin is the input DC decoupling capacitor which blocks any DC component if
present in the input signal from reaching the Q1 base. If any external DC voltage reaches the base of
Q1, it will alter the biasing conditions and affects the performance of the amplifier.
R1 and R2 are the biasing resistors. This network provides the transistor Q1s base with the necessary
bias voltage to drive it into the active region. The region of operation where the transistor is
completely switched of is called cut-off region and the region of operation where the transistor is
completely switched ON (like a closed switch) is called saturation region. The region in between cut-
off and saturation is called active region.
For a transistor amplifier to function properly, it should operate in the active region. Let us
consider this simple situation where there is no biasing for the transistor. As we all know, a silicon
transistor requires 0.7 volts for switch ON and surely this 0.7 V will be taken from the input audio
signal by the transistor. So all parts of the input wave form with amplitude 0.7V will be absent in
the output waveform. In the other hand if the transistor is given with a heavy bias at the base ,it will
enter into saturation (fully ON) and behaves like a closed switch so that any further change in the
base current due to the input audio signal will not cause any change in the output. The voltage across
collector and emitter will be 0.2V at this condition (Vce sat = 0.2V). That is why proper biasing is
required for the proper operation of a transistor amplifier
Cout is the output DC decoupling capacitor. It prevents any DC voltage from entering into
the succeeding stage from the present stage. If this capacitor is not used the output of the amplifier
(Vout) will be clamped by the DC level present at the transistors collector.
Rc is the collector resistor and Re is the emitter resistor. Values of Rc and Re are so selected that
50% of Vcc gets dropped across the collector & emitter of the transistor. This is done to ensure that
the operating point is positioned at the center of the load line. 40% ofVcc is dropped across Rc and
10% of Vcc is dropped across Re. A higher voltage drop across Re will reduce the output voltage
swing and so it is a common practice to keep the voltage drop across Re = 10%Vcc . Ce is the emitter
by-pass capacitor. At zero signal condition (i.e, no input) only the quiescent current (set by the
biasing resistors R1 and R2 flows through the Re). This current is a direct current of magnitude in
few milli amperes and Ce does nothing. When input signal is applied, the transistor amplifies it and
as a result a corresponding alternating current flows through the Re. The job of Ce is to bypass this
alternating component of the emitter current. If Ce is not there, the entire emitter current will flow
through Re and that causes a large voltage drop across it. This voltage drop gets added to the Vbe of
the transistor and the bias settings will be altered. It reality, it is just like giving a heavy negative
feedback and so it drastically reduces the gain.

PROCEDURE:

1.Test all the components using a multimeter. Set up the circuit and verify DC bias conditions.

2. Connect the capacitors in the circuit. Apply a 100 mv peak to peak sinusoidal signal from the
function generator to the circuit input. Observe the input and output waveforms.

3. Keeping input voltage constant; vary the frequency of the input signal from 0 to 1 MHz. Observe
waveforms.

4. Plot the frequency response characteristics.

5. Calculate the bandwidth.

CIRCUIT DIAGRAM:

DESIGN:

Design of Re and Ce.

Let voltage across Re; VRe = 10%Vcc=1.2V

Voltage across Rc; VRc = 40% Vcc=4.8V
The remaining 50% will drop across the collector-emitter .
From (1) and (2) Rc =2.4K USE 2.2K and Re = 600 USE 680

Design of R1 and R2.

Base current Ib = Ic/hfe.=20A
Let Ic Ie .
Let current through R1; IR1 = 10Ib.
Also voltage across R2 ; VR2 =Vbe + Vre=1.8V
Therefore VR1 = Vcc-VR2=10.2V
R1 = VR1/IR1=50K and R2 = VR2/IR=10K.

Finding Ce.
Impedance of emitter by-pass capacitor should be one by tenth of Re.
i.e, XCe = 1/10 (Re) .
Also XCe = 1/2FCe
F can be selected to be 100Hz.
Ce=23F USE 22F

Finding Cin.
Impedance of the input capacitor (Cin) should be one by tenth of the transistors input
impedance(Rin).
Rin = R1 parallel R2 parallel (1 + (hfe re))=1.1Ki.e, XCin = 1/10 (Rin)=110
re = 25mV/Ie.
Xcin = 1/2FCin.
Cin=15F

Finding Cout.
Impedance of the output capacitor (Cout) must be one by tenth of the circuits output resistance
(Rout).
i.e, XCout = 1/10 (Rout).
Rout = Rc.
XCout = 1/ 2FCout.
Cout=10F
OBSERVATION

f in Hz V0 (V) 20log(V0/ Vin)(dB)

Vin =100mV p-p

WAVEFORM
RESULT
Circuit is designed and frequency response is plotted.
Mid band gain of the CE amplifier = ______
Bandwidth of the amplifier = ______Hz
EXPERIMENT NO: 9

MOSFET AMPLIFIER (CS) - FREQUENCY RESPONSE

CHARACTERISTICS

AIM

To design and study the frequency response of MOSFET (CS ) amplifier.

COMPONENTS AND EQUIPMENTS REQUIRED

MOSFET, DC source, capacitor, resistor, bread board, signal generator, multi-meter and CRO.

THEORY
A metal oxide field-effect transistor, or MOSFET, is an electronic component that
amplifies and switches electrical currents. In the 1970s, electronics manufacturers made them
with metal oxides, but more recently, silicon has been the material of choice. The device has
three terminals, called the gate, source and drain. A voltage at the gate terminal controls the
current flow between the source and drain. A MOSFET can detect and boost very weak signals,
making it a useful amplifier.

Audio amplifiers boost the strength of weak sound signals. For example, the signal in a
radio starts at an antenna, which produces a signal too weak to drive a speaker directly. An
amplifier increases the strength of the signal so you can hear it clearly. In electronic amplifier
design, a trade-off exists between efficiency and fidelity. Amplifiers called Class A reproduce a
signal faithfully but consume a great deal of power. Class B and C amplifiers have better
efficiency but introduce distortion into the sound. Many MOSFET amplifiers are Class D, but
with changes that improve sound.

PROCEDURE

1.Test all the components using a multi-meter. Set up the circuit and verify DC bias conditions.
2. Connect the capacitors in the circuit. Apply a 100 mv peak to peak sinusoidal signal from the
function generator to the circuit input. Observe the input and output waveforms.
3. Keeping input voltage constant, vary the frequency of the input signal from 0 to 1 MHz.
Observe waveforms.
4. Plot the frequency response characteristics.
5. Calculate the bandwidth.

DESIGN

Selection of FET
Select BFW10 or BFW11
DC biasing conditions
VDD =12V, . VGS = -1V, VRS = 20% of VDD =2.4V
VRD = VSD = 45% of VDD = 5.4 V.
Design of RD
Given, VRD =ID R D =5.4V.

From this, we get R D =2.7k.

Use 2.7k std.
Design of R S
R S = VRS /IS = VRS /ID . But ID =IS =2m A and VRS =1.2V. R S =1.2V/2m A=600.Use 680.
Design ofR1 =andR 2 =
VR2 = VGS + VRS = 1.2V.
Also, VR2 =VDD R 2 /(R1 +R 2 )
Use a large value for R1 to ensure zero gate current.
Take R1 ==1M.
Substituting the known values in the expression for VR2, we get,

R 2 ==13.2 k. Use 12 k.
Design of RL

Gain of CS amplifier A=15=gm(RDRL).

Since required A=15, we get R L =4.7 k.
Design of blocking capacitors Cc1 and Cc2
Impedance of the coupling capacitor XC RG/10.
Then X c1 0.1 M.
SoCc1 =0.016F if fL =100Hz.
Use Cc1 =0.022F.
Take Cc1 = Cc2 = 0.022F.

Design of bypass capacitor CS

Take XCS = R S /10 at 100Hz to bypass this frequency.
Then X CS 100.
So, CS 23F. Use CS = 22F std.

CIRCUIT DIAGRAM:
OBSERVATIONS

F in Hz V0 (V) AV (dB)

FREQUENCY RESPONSE

RESULT

Frequency response of MOSFET amplifier in CS configuration is studied.

Bandwidth = --------------

Midband gain = --------------

EXPERIMENT NO:10

CASCADE AMPLIFIER
AIM

To design, set up and study a two stage RC coupled CE amplifier using BJT.

COMPONENTS AND EQUIPMENTS REQUIRED

Transistor, dc source, capacitors, resistors, bread board, signal generator and CRO.

THEORY

More stages of RC coupled amplifiers can be used in cascade to increase the voltage gain
of an amplifier. A two stage amplifier provides an overall voltage gain of A1 A2 if A1 and A2 are
the gains of first and second stages respectively. Since each stage provides a phase inversion,
the final output is in phase with the input.
The input impedance of the second stage is in parallel with R C of the first stage. The
voltage gain A1 of the first stage is:

RC Zin (second stage)

A1 =
re

where Zin (second stage)= R1 R 2 hFE re

The voltage gain A2 of the second stage is:

RC RL
A2 =
re

PROCEDURE
1. Test all components using a multimeter. Set up the circuit and verify dc bias conditions.
2. Apply a 100 mV peak to peak sinusoidal signal from the function generator to the circuit
input. Observe the input and output waveforms on the CRO screen simultaneously.
3. Keeping the input amplitude constant, vary the frequency of the input signal from 0 Hz to
1 MHz or more. Measure the output amplitude corresponding to different frequencies and
enter it in tabular column.
4. Plot the frequency response characteristics on a graph sheet with gain on y-axis and log f
on x-axis. Mark log and log fL and fH corresponding to 1/2 of the maximum gain.
5. Calculate the bandwidth of the amplifier using the expression BW = fH fL

DESIGN
CIRCUIT DIAGRAM

RESULT

Circuit of cascade amplifier is set up and frequency response is plotted.

EXPERIMENT NO: 11

CASCODE AMPLIFIER
AIM

To design and setup a cascode amplifier using BJT and to plot its frequency response . Calculate
the bandwidth of the amplifier.

COMPONENTS AND EQUIPMENTS REQUIRED

BC107, resistors, capacitors, dc source, breadboard, multimeter, function generator and CRO.

THEORY

A cascode amplifier consist of a common emitter stage feeding a common base stage.
This is used to provide high input impedance with low voltage gain to ensure that the input
miller capacitance is at a minimum with the CB stage providing good high frequency operation.
It is used in IC amplifiers as a dc level shifter when the voltage of interest consists of ac
component and a fixed dc level.

The second transistor T2 will act as a voltage controlled current source. The output
resistance of a transistor is 100k or greater, so it makes a good current source, even if the
collector voltage is varied. This current is then injected into the emitter of T|, which simply
passes this current through it (since current gain of common base amplifier is unity). The base of
T1 , is grounded for signal purposes by the capacitor. The collector voltage of T2 makes it a very
good current source, with an output resistance of many mega-ohms. The only defect is the
voltage divider used to get the correct bias voltages on the bases of the two transistors, which
lowers the input resistance and requires a large value of grounding capacitor. The reactance of
capacitor at the lowest signal frequency should be lower than the resistance looking into the
voltage divider. The cascode has a wide bandwidth due to the absence of miller capacitance.
Hence it also called as wide band amplifier.
CIRCUIT DIAGRAM

DESIGN
PROCEDURE

1. Set up the circuit on the breadboard and verify the dc bias conditions
2. Apply a sine wave from the function generator to the circuit input.
3. Observe the input and output waveforms on the CRO screen simultaneously.
4. Keeping the amplitude of the input constant, vary the frequency of the input signal from 0
Hz to 2MHz.
5. Measure the output amplitude corresponding to different frequencies
6. Plot the frequency response characteristics on a semi log graph and mark fL and fH
corresponding to 3 dB point.
7. Calculate the bandwidth of the amplifier using the expression,
Bandwidth = fH fL

RESULT
Circuit of cascode amplifier is set up and frequency response is plotted.
Bandwidth of the amplifier =. Hz
EXPERIMENT NO: 12

FEEDBACK AMPLIFIERS (CURRENT SERIES AND VOLTAGE

SERIES), GAIN AND FREQUENCY RESPONSE

AIM

To design and set up current series and voltage series feedback amplifiers and analyze the gain
and frequency response.

COMPONENTS AND EQUIPMENTS REQUIRED

Transistor, DC source, capacitor, resistor, bread board, signal generator, multi-meter and CRO
THEORY
When any increase in the output signal results into the input in such a way as to cause the
decrease in the output signal, the amplifier is said to have negative feedback.
The advantages of providing negative feedback are that the transfer gain of the amplifier
with feedback can be stabilized against variations in the hybrid parameters of the transistor or the
parameters of the other active devices used in the circuit. The most advantage of the negative
feedback is that by proper use of this, there is significant improvement in the frequency response
and in the linearity of the operation of the amplifier. The disadvantage of the negative feedback
is that the voltage gain is decreased.
In Voltage-Series feedback , the input impedance of the amplifier is decreased and the
output impedance is increased. Noise and distortions are reduced considerably.
In Current-Series Feedback, the input impedance and the output impedance are increased. Noise
and distortions are reduced considerably.

PROCEDURE
Voltage Series Feedback Amplifier

Connections are made as per circuit diagram.

 Keep the input voltage constant at 20mV peak-peak and 1kHz frequency. For different
values of load resistance, note down the output voltage and calculate the gain by using
the expression Av = 20log(V0 / Vi ) dB
Add the emitter bypass capacitor and repeat STEP 2.And observe the effect of Feedback
on the gain of the amplifier
For plotting the frequency the input voltage is kept constant at 20mV peak-peak and the
frequency is varied from 100Hz to 1MHz.
Note down the value of output voltage for each frequency. All the readings are tabulated
and the voltage gain in dB is calculated by using expression Av = 20log(V0 / Vi ) dB
A graph is drawn by taking frequency on X-axis and gain on Y-axis on semi log graph
sheet
The Bandwidth of the amplifier is calculated from the graph using the expression
Bandwidth B.W = f2 f1, where f1 is lower cut off frequency of CE amplifier and f 2 is
upper cut off frequency of CE amplifier .
The gain-bandwidth product of the amplifier is calculated by using the expression Gain-
Bandwidth Product = 3-dB midband gain X Bandwidth

Current Series Feedback Amplifier

.Connections are made as per circuit diagram.

Keep the input voltage constant at 20mV peak-peak and 1 kHz frequency. For different
values of load resistance, note down the output voltage and calculate the gain by using
the expression Av = 20log(V0 / Vi ) dB
Remove the emitter bypass capacitor and repeat STEP 2.And observe the effect of
feedback on the gain of the amplifier.
For plotting the frequency the input voltage is kept constant at 20mV peak-peak and the
frequency is varied from 100Hz to 1MHz.
Note down the value of output voltage for each frequency. All the readings are tabulated
and the voltage gain in dB is calculated by using expression , Av = 20log (V0 / Vi ) dB
A graph is drawn by taking frequency on X-axis and gain on Y-axis on semi log graph
sheet
 The Bandwidth of the amplifier is calculated from the graph using the expression
Bandwidth B.W = f2 f1. Where f1 is lower cut off frequency of CE amplifier f 2 is
upper cut off frequency of CE amplifier
The gain-bandwidth product of the amplifier is calculated by using the expression Gain-
Bandwidth Product = 3-dB midband gain X Bandwidth

CIRCUIT DIAGRAM:

Voltage Series Feedback Amplifier

Current Series Feedback Amplifier

OBSERVATIONS:

Voltage Series Feedback Amplifier

Voltage Gain:

S.NO Output Voltage Output Voltage Gain(dB) with Gain(dB)

(Vo) with (Vo) without feedback without
feedback feedback feedback
Frequency Response: Vi = 20mV

S.NO Frequency Output Voltage) Gain in dB

Gain ,A =
20log(Vo/Vi)

Current Series Feedback Amplifier

Voltage Gain:

S.NO Output Voltage Output Voltage Gain(dB) with Gain(dB) without

(Vo) with feedback (Vo) without feedback feedback
feedback
Frequency Response: Vi = 20mV

S.NO Frequency Output Voltage) Vo Gain in dB

Gain ,A = Vi
20log(Vo/Vi)

Frequency Response
RESULT:

The effect of negative feedback on the amplifier is observed. The voltage gain and
frequency response of the amplifier are obtained.
EXPERIMENT NO: 13

LOW FREQUENCY OSCILLATORS RC PHASE SHIFT, WIEN BRIDGE

AIM

To design and setup RC phase shift and Wein bridge oscillator using BJT

COMPONENTS AND EQUIPMENTS REQUIRED

Transistor BF195 and BC107, resistors, capacitors, dc source, bread board, multimeter and CRO

THEORY

Any circuit that generates a periodic alternating voltage without an input signal is called
an oscillator. To generate this ac voltage, energy must be supplied to the circuit from a dc source.
The Barkhausen criterion for sustaining oscillation.

1. There must be a positive feedback

2. Initially the value of the loop gain A must be greater then the unity
3. After a desired level is reached, the loop gain A must decrease to unity

RC PHASE SHIFT OSCILLATOR

 RC oscillators are more sustainable for generating low frequencies. Here a single stage of
voltage divider amplifier is used to amplify the input signal. The amplifier gives a 180 phase
shift to the input signal. The output of the amplifier goes to the feedback network. The feedback
network consist of three identical RC sections. Each RC section provides a phase shift of 60.
Thus tha feedback network provides a total of 3x60 phase shift. If the condition A =1 is
satisfied, oscillations will be maintained. The frequency at which the RC network provides
1
exactly the 180 phase shift is 26

WEIN BRIDGE OSCILLATOR

The Wein bridge oscillator is a circuit for generating low frequencies in the range of 10
KHz to about 1 MHz. It is widely used in all commercial generators. Basically, the oscillator
consists of a two-stage RC coupled amplifier and a feedback network as in the figure below.

Here the basic network forms a bridge in the feedback that is why it is called as Wein
bridge oscillator. It contains a two stage RC coupled amplifier. These two stages provides 360
phase shift to the signal. So bridge should not introduce any phase shift. The output of the second
stage goes to the feedback network.

The voltage across the parallel combination R2-C2 is fed to the input of the first stage.
The net phase shift through the two amplifiers is zero. Therefore, the phase shift is provided by
the coupling network must be zero for maintaining the oscillation. This condition occurs when
1
f=2 and when =1/3.

PROCEDURE

1. Set up the circuit on the bread board

2. Verify the dc bias condition of the amplifier
3. Ensure that the transistor is operating as an amplifier with required gain
4. Connect the feedback network and observe the output on the CRO
5. Adjust the potentiometer in the bridge/Rs to get a distortionless output
6. Measure its amplitude and frequency

TYPICAL OUTPUT WAVEFORM

RC PHASE SHIFT OSCILLATOR

WEIN BRIDGE OSCILLATOR

RESULT

Study of RC phase shift oscillator

Amplitude of the sine wave =V

Frequency of the sine wave =Hz

Study of Wein bridge oscillator

Amplitude of the sine wave =V

Frequency of the sine wave =Hz
EXPERIMENT NO: 14

HIGH FREQUENCY OSCILLATORS HARTLEY AND COLPITTS

AIM

To design and setup Hartley oscillator and Colpitts oscillator using BJT

COMPONENTS AND EQUIPMENTS REQUIRED

Transistor BF195 and BC107, resistors, capacitors, dc source, bread board, multimeter, function
generator and CRO

THEORY

HARTLY OSCILLATOR:

LC oscillator are used for high frequency. Hartley and Colpitts oscillators are two
practically used LC oscillators. These oscillators are widely used in radio, TV receivers, high
frequency heating etc.
 Hartley oscillators is a tuned base oscillator circuit using two inductor coils. One end of
these coils is connected to the ground. Here the parallel tuned circuit acts as feedback network.
The oscillations are produced in this tank circuit. The tuned circuit uses two inductors 1 and 2
and capacitor C. The junction of 1 and 2 is grounded.

When the supply is switched ON , a voltage V1 is developed across 1 and V2 is

developed across 2 . V1 is the oscillator output. There is a phase difference of 180 between the
voltages of 1 and 2 . The voltage v2 is given as the feedback signal. Since the amplifier is in
CE configuration it produces a phase difference of 180. Hence it produces a total phase
1
difference of 360. The frequency of oscillation is given f =2

COLPITTS OSCILLATOR:

Colpitts oscillator is widely used with frequency above 1MHz. it is similar to Hartley
oscillator. The only difference is that colpitts oscillator uses a tapped capacitor instead of a
tapped inductor. The circuit consists of an amplifier with a positive feedback network formed by
L, C1, C2 . The resistors R1, R2, RE, capacitor CE and the dc voltage source together provides
the required biasing for the transistor.
 The voltage developed across the capacitor C2 provides the positive feedback required
for the sustained oscillations. The output voltage appears across C1 and the feedback voltage
appears across C2. So the feedback factor of the oscillator is given by = C1/C2. This means
that the gain of the amplifier section has to be A = C2/C1to start the oscillation. The frequency of
1
oscillation determines values of L, C1 and C2. The frequency of oscillation is given f =2

Where = C1C2/C1 + C2, since C1 and C2 are in series

PROCEDURE:

1. Setup the circuit breadboard as in the figure below.

2. Verify the dc bias conditions of the amplifier
3. Ensure that the transistor is operating as an amplifier with the required gain
4. Connect the feedback network and observe the output in the CRO
5. Measure its amplitude and frequency

TYPICAL OUTPUT WAVEFORM:

HARTLEY OSCILLATOR
COLPITTS OSCILLATOR

RESULT:

Study of Hartley oscillator

Amplitude of the sine wave=V

Frequency of the sine wave = Hz

Study of colpitts oscillator

Amplitude of the sine Wave =V

Frequency of the Sine wave =..Hz
EXPERIMENT NO: 15

POWER AMPLIFIERS

AIM

To set up and study the working of a complementary symmetry class B and class AB push pull
audio power amplifiers.

COMPONENTS AND EQUIPMENTS REQUIRED

Transistors, diodes, DC sources, capacitors, resistors, bread board, CRO and function generator

THEORY

An amplifier designed to deliver electric power to a desired load is known as a power

amplifier. Power amplifiers find applications in transmitter, servomotor amplifiers, industrial
control circuits, and audio amplifiers. In general, power amplifiers designed to de1iver the
maximum power output at the highest efficiency. Since power amplifiers inherently involve
excursions in voltage and current, the transistor may operate in the non-linear regions of the
characteristic curve resulting distortion in the output. Furthermore, the transistor subjected to
large values of current and voltage, thermal instability may become a problem and thus the
power amplifier must biased to guard against thermal runaway.Depending on their operation,
power amplifiers can be grouped into four main classes:
- CLASS A operation
- CLASS AB operation
- CLASS B operation
- CLASS C operation
In class B operation, exactly half of the input signal appears amplified at the output.
Transistor is biased such that Ic =0. Therefore the amplifier dissipates power only when it is
being used to amplify signals (input signal present). Hence, the efficiency is higher but the
distortions are considerable. In order to obtain high efficiency and low distortion PUSH - PULL
amplifiers are used. In positive half cycle one transistor provides output current while in negative
half cycle other transistor provides output current. By this way output current is continuous.
In class AB operation output (collector) current flows for more than half of the input signal
cycle. Hence, more than half of the signal is amplify and appears at the output.

DESIGN

Design of class B power amplifier

Required output power Po =25mW

Selection of transistor
Select SK100 as T1 and SL100 as T2.

Vp =Vin=1V
25mW=1/2RL Then RL =20 Use 22
Design of coupling capacitors
RLCC>>TS Where TS is the lowest signal frequency=20Hz
CC=1/(2*20*RL)=360F Use 470F
Design of class AB power amp
Required output power Po=25mW
Selection of transistor
Select SK100 as T1 and SL100 as T2.

Output power=
Vp = Vin = 1V
25mW=1/2RL Then RL=20 Use 22
Design of coupling capacitors
RLCC>>TS Where TS is the lowest signal frequency=20Hz
CC=1/(2*20*RL)=360F Use 470F
Design of R
Icsat= VCEQ/RL =3/RL = 43mA
ID=(VCC-VBE)/2R=(6-1.2)/2R
Since ICQ=ID=Icsat*5%=2.15mA. R=1.1K Use 1K.

CIRCUIT DIAGRAM:

CLASS B POWER AMPLIFIER

CLASS AB POWER AMPLIFIER

PROCEDURE

Set up class B power amplifier circuit using dual power supply as shown in figure after testing
all components. Observe cross over distortion on CRO screen shorting diodes.

Apply a low frequency 2 Vpp sine wave at the input and observe the input and output wave
forms on the CRO screen. Calculate AC power delivered to the load using expression
VP^2/2RL.

Repeat the experiment for class AB amplifier and observe that cross over distortion is
eliminated.

MODEL WAVEFORM:

INPUT WAVEFORM
CLASS B

CLASS AB

RESULT
Designed and studied power amplifier and plotted the output waveform of Class A and Class
AB.
EXPERIMENT NO: 16

TRANSISTOR SERIES VOLTAGE REGULATOR

AIM

To design and setup a series voltage regulator using transistor and zener diode. Plot the line
regulation and load regulation graph and find its regulation factor.

COMPONENTS AND EQUIPMENTS REQUIRED:

Transistor 2N3Q55, Zener diode SZ12, resistor, voltmeter, breadboard, voltage source etc

THEORY

The linear voltage usually uses transistors as the pass element. There are two types of dissipative
voltage regulators - the series regulator and the shunt voltage regulator. Each type of circuit can
provide an output dc voltage that is regulated or maintained at a set value even if the input
voltage varies or if the load connected to the output changes.

A simple series regulator circuit is shown in figure. The transistor Q is the series control
element and the zener diode provides the reference voltage.; V0 = VZ -VBE ; VBE =VZ -V0 ; V0 = Vin -
VCE . If the output voltage decreases, the increased base-emitter voltage causes transistor Q to
conduct more, thereby reducing VCE . The decrease in VCE results in raising of the output voltage,
maintaining the output constant. That is if V0 ,VBE , VCE V0 . If the output voltage increases
the decreased base-emitter voltage causes transistor Q to conduct less, increasing VCE and
thereby
reducing the output voltage. That is if V0 ,VBE , VCE , V0 .

PROCEDURE

Setup the circuit on the breadboard .

For load regulation, keep the input voltage as constant (say 20V), vary the load current
(by varying the load rheostat or potentiometer). Note the corresponding output voltage
 .Plot the load regulation graph with load current along x-axis and output voltage along y-
axis.
To calculate regulation factor, mark VNL and VFL on y-axis on the load regulation
graph. VNL is the output voltage in the absence of load resistor and VFL is the output
voltage at the rated current.
VNL VFL
Percentage load regulation = 100%
VNL

For line regulation, keep the load current as constant (say 500mA), vary the input
voltage.
Note the corresponding output voltage. Plot the line regulation graph with input voltage
along x-axis and output voltage along y-axis.
V0
Percentage line regulation = 100%
VS

CIRCUIT DIAGRAM
RESULT

Study of series voltage regulator

Study of load regulation and line regulation
Percentage load regulation = ----------------%
Percentage line regulation = -----------------%
 EXPERIMENT NO: 17

TUNED AMPLIFIER- FREQUENCY RESPONSE

AIM

To design and setup an IF amplifier for a frequency of 455KHz and to plot the frequency
response curve.

COMPONENTS AND EQUIPMENTS REQUIRED

Transistor, BF194/BF195, resistor, capacitor, IFT 455KHz, dc source, bread board, multimeter,
function generator and CRO

THEORY

The IF amplifier is also known as single tuned amplifier. The output is inductively
coupled. The coil has a primary winding and a secondary winding either of which has a tuned
circuit. Here the tuned circuit is on primary side. The circuit diagram shows a class A tuned
amplifier. The resistor R1 and R2 provides the biasing. is for stabilizing the operating point.
CE is the emitter bypass capacitor.

A tuned amplifier will amplify the signals of a particular frequency only. A intermediate
frequency transformer (IFT) with 455KHz IF is used for tuning. The resonant frequency is given
1
by f = 2 . The selectivity of the circuit is given as Q = =
21

DESIGN

Let = 6V, = 200, = 2mA = 10% of = 0.1 = 0.6V

=

= = 300

2= + = 0.6 + 0.6 = 1.2

1= 6 1.2 = 1.2

Let the current through 1 = 10 and through 2 = 9

2 = 9 2 , 2 = 13.3

1 = 10 1 , 1 = 48

PROCEDURE:

1. Setup the circuit breadboard as in the figure below.

2. Verify the dc bias condition of the amplifier
3. Observe the input and output waveforms in the CRO
4. Keeping the input constant vary the frequency
5. Measure the output amplitude corresponding to different frequencies
6. Plot the frequency response characteristics on the semi log graph sheet with gain on X-
axis and log f on Y-axis. calculate the bandwidth and quality factor

CIRCUIT DIAGRAM
OBSERVATIONS

Input voltage = .V

Frequency (f) in Log f Output ( ) Gain in dB

Gain ( )
Hz

TYPICAL FREQUENCY RESPONSE:

RESULT

Study of IF amplifier

Bandwidth of the amplifier = .Hz

Q-factor =..
EXPERIMENT NO:18

BOOTSTRAP SWEEP CIRCUIT

AIM

To set up and study a Bootstrap sweep circuit.

COMPONENTS AND EQUIPMENTS REQUIRED

Transistors, diode, resistors, capacitors, signal generator, bread board and dc supplies.

THEORY

If the charging and discharging currents of a capacitor is made constant, the voltage
across the capacitor will rise or fall linearly. Bootstrap circuit achieves constant current through
the capacitor.
When the VCC supply is switched ON, capacitor C1 charges from VCC supply through
diode D. Once the charging is over, the potential at the left side of the capacitor is positive and
hence the diode becomes reverse biased,. Transistor Q1 acts as a switch and transistor Q2
functions in emitter follower configuration. When the trigger voltage rises to logic high state, the
transistor Q1 will switch to saturation. Now the transistorQ1 is made OFF by applying a negative
going gating pulse. The capacitor C charges through R. Then the potential at the base of Q2
increases and emitter of Q2 follows the input since it is an emitter follower. Capacitor will charge
with a constant current established by the constant potential difference across the resistor R and
hence the charging will be very linear. RC time constant will determine the slope of the sweep.
For linear charging of the capacitor to VCC circuit is designed so that Ts = RC. Resistor R must be
a high value resistor since the base current of Q2 is dependent on it. To provide sufficient base
current to transistor Q1 , R B should be less than hFE R. The capacitor C1 must be much higher than
C to function as a voltage source.

PROCEDURE
1. Verify the condition of all components and set up the circuit.
2. Input trigger must be a square wave or pulse waveform with 1 ms time period for negative
part of the cycle. Amplitude must be sufficiently high.
3. Observe the trigger waveform and output waveform on CRO screen.
4. Vary RC product and R B and observe the changes in the output waveform.

DESIGN
CIRCUIT DIAGRAM

RESULT

Bootstrap sweep circuit is set up and verified.

EXPERIMENT NO: 19

MULTIVIBRATORS ASTABLE, MONOSTABLE AND BISTABLE

AIM

To design and setup Astable, Monostable, Bistable multivibrators using BJT

COMPONENTS AND EQUIPMENTS REQUIRED

Transistor BF195 and BC107, resistors, capacitors, dc source, bread board, multimeter, function
generator and CRO

THEORY

ASTABLE MULTIVIBRATOR

The figure shows the circuit of a typical transistor astable multivibrator or free running
oscillator using two identical transistors T1 and T2. The circuit essentially consists of two
symmetrical common emitter amplifier stages , each providing a feedback to the other .The
collector loads of these two stages are equal Rc1=Rc2, and base resistors also equal, ie R1=R2.
The output of transistor T1 is coupled to the input of transistor T2 though C1 while the output of
T2 is fed to the input of T1 through C2. The output is taken from either of the collector terminal
of T1 or T2.

Assume that when the circuit is switched ON, T1 conducts slightly more than T2( due to
the difference in ). So the current through T1 is more than through T2. This will make a drop in
the voltage Vc1.This drop is coupled by the capacitor C1 to the base of T2 thereby reducing its
base emitter voltage. So the transistor T2 will conduct less. This will reduce the collector current
Ic2 and increase collector voltage Vc2. This rise in voltage is coupled by the capacitor C2 to the
base of T1 thereby increasing its base emitter voltage. Therefore T1 conducts more and more
and T2 conducts less and less, each action reinforcing the other. Finally T1 gets saturated and
becomes fully ON and T2 becomes OFF.
 Now the capacitor C1 discharges through R1 and Vb2 rises exponentially towards the
cut in voltage Vr2(=0.7V) of T2. When Vb2 becomes Vr2, T2 conducts. Therefore Vc2 drops
and this drop is coupled through C2 to the base of T1. This will cause Vb1 to drop: Hence T1
becomes OFF and Vc1 rises towards Vcc with a time constant of 1. Now T1 becomes OFF and
T2 becomes ON.

Again the capacitor C2 discharges causing Vb1 to rise exponentially and when Vb1
reaches the cut -in voltage Vr1 of T1, T1 becomes ON. Therefore , Vc1 drops causing Vb2 to
become negative and cutting OFF transistor T2. So Vc2 rises towards Vcc with time constant 2.
Now T1 becomes ON and T2 becomes OFF again. The process repeats again causing the
transistors to become ON and OFF with a fixed time period. If R1C1=R2C2, then ON time will
be equal to OFF time.

Total time period = 1 + 2 =0.693(R1C1+R2C2)

If R1=R2 and C1=C2, =1.38RC

MONOSTABLE MULTIVIBRATOR

A multivibrator in which the current stage is maintained until it is triggered, and when
triggering occur the multivibrator make the other stage to conduct for a predetermined length of
time and is then switched back to its original state automatically is called as one shot or
monostable multivibrator.

The monostable circuit below, consist of two similar transistors T1 and T2 with equal collector
loads , that is RC1 and RC2. The value of resistors R1 and R2 and the negative supply voltage
VEE, are chosen such that the transistor T1 is in ON state and T2 is in OFF state in stable state.
Capacitor C1 is a commutating capacitor used to couple the instantaneous voltage changes
across it.

When a negative pulse of short duration and sufficient , magnitude is applied to the base
of T1, it turns OFF and its collector voltage turns to Vcc from VCEsat. The voltage at the base
2 1
of T2 is 2+1VCC 1+2VEE. This voltage is sufficient to turn T2 ON.
 Now capacitor C2 charges through RB2 and T2. Voltage across the capacitor increases
and when it becomes VBEsat , the transistor T1 starts conducting. When T1 saturates , its
collector voltage VC1 turns to VCEsat from Vcc. Now the voltage at the base of T2 is given by

2 1
VCEsat 1+2VEE. The voltage VCC and values of resistance R1 and R2 are such that
2+1

VB@ must be negative. This negative value of VB2 will turns T1 OFF. This is the stable state
and the circuit will continue to remain in this state until the application of a new negative pulse
to the base of T1. The pulse width is T = .69RC

BISTABLE MULTIVIBRATOR

A bistable multivibrator is one which can exist indefinitely in either of a stable state. A transition
from state to another can be obtained by means -of an external trigger pulse
input. There is no quasi-stable state in its operation; both of the states are stable. The possible
states of output are high or low. The states are complementary. Figure 3.24.1 shows the basic
circuit of a bistable multivibrator. Let S1 and S2 be the two stable states. Let at S1, Q1 is ON and
Q2 OFF. At S2, Q1 is OFF and Q2 is ON. If of Q1 is greater than of Q2, then IC1 is greater
than IC2. So QI will turn ON and Q2 will turn OFF at its initial state (state S1).

In order to change the state, an external triggering signal is required. The trigger signal is used to
turn OFF the ON transistor in the previous state. The trigger signal used is a negative going
signal that is enough to turn OFF an ON transistor. The negative going pulse is applied at the
base of the ON transistor Q1 to change the state of the circuit. If we apply a negative trigger to
the base of Q1, the multivibrator will change into state S2 from SI . In order to change the state
from S2 to S1, we require another negative trigger applied to the base of Q2. That will change its
state into S1. There are two types of triggering can be used with bistable multivibrators
symmetrical triggering and unsymmetrical triggering. In symmetrical triggering the same trigger
is used to change S1 to S2 or S2 to S1. In unsymmetrical triggering two trigger signals are used.
Symmetrical triggering is again divided into symmetrical base triggering and symmetrical
collector triggering. In the base triggering R and C constitutes a differentiator circuit that will
convert the square wave into positive going and negative going narrow pulses. Then the diodes
rectify that and apply only
negative pulses to the base of the transistors. The positive and negative going pulses vary with
respect to ground reference. In symmetrical collector triggering, the R and C constitutes the
differentiator circuit, but the positive and negative going pulses vary with respect to the supply
voltage VEC. The unsymmetrical triggering is also divided into unsymmetrical base triggering
an unsymmetrical collector triggering.

PROCEDURE

1. Setup the circuit on the bread board

2. Apply the power to the circuit
3. Apply the trigger pulses through the differentiator
4. Check the collector and base waveforms on a CRO and plot it on a graph paper

CIRCUIT DIAGRAM

ASTABLE MULTIVIBRATOR
MONOSTABLE MULTIVIBRATOR
BISTABLE MULTIVIBRATOR
 TYPICAL OUTPUT WAVEFORM

ASTABLE MULTIVIBRATOR

MONOSTABLE MULTIVIBRATOR

Trigger

BISTABLE MULTIVIBRATOR

RESULT

Study of Astable, Monosatable, and Bistable multivibrator and waveforms at base and collector
EXPERIMENT NO: 20

SCHMITT TRIGGER

AIM

To design and setup a schmitt trigger for different values of UTP and LTP

COMPONENTS AND EQUIPMENTS REQUIRED:

Transistor BC107, resistor, capacitor, breadboard, voltage source, function generator etc

THEORY
Schmitt trigger is an emitter coupled binary trigger circuit. It has two stable states - the
transistor Q1 ON and Q2 OFF or vice versa depending on the input voltage given. So it is a
bistable multivibrator. It is also known as squaring circuit. In the absence of an input to
transistor Q1 it will be in cutoff and hence Q1 will act as an open switch. R c1 , R B2 and R1 form a
potential divider network and keep the voltage at the base of Q2 at a positive potential relative to
the emitter. Thus Q2 operates in saturation. Due to the current flow in Q2 , the voltage developed
across the common emitter resistor R E maintains Q1 at cut-off. Since the base of Q2 is at ground
potential, it is negative relative to the emitter. Thus the stable state in the absence of a signal is
Q2 ON and Q1 OFF and the output voltage is in the low state.

When an input sine wave is applied, as soon as the input voltage attains a value sufficient
to make on theVB1 , greater than VRE by 0.6 V (VBE > 0.6V) , Q1 turns ON . Applying
Kirchoffs voltage law

VS -VRB1 -VBE1 -VRE =0.

VBE1 = VS -(VRB1 +VRE ).

Q1 is driven saturation. The collector voltage of Q1 drops, which in turn is coupled b

the network R B2 -R1 to the base of Q2 . This eliminates the forward bias on Q2 and hence it is
driven to cut-off. This state persists as long as the sum of the voltage across R B1 and R E by at
least 0.6 V. When Q2 is driven to cut-off, output voltage switches to the difference between Vcc
and the voltage across R C2 .

When the input voltage drops below the sum of the voltages across R B1 and R E , Q1 turns
off and by regenerative action Q2 again turns ON. The output voltage across R E and the
saturation voltage of Q2 . Thus a square wave is produced.

The turn ON voltage is called the upper threshold point or UTP and the turn OFF voltage
is called lower threshold point or LTP since the voltage required to turn ON a device is more
than that required to turn it OFF.

DESIGN
PROCEDURE

1. Set up the circuit on the breadboard.

2. Apply a sine wave having amplitude greater than UTP from the function generator.
3. Verify the output waveforms using CRO.

CIRCUIT DIAGRAM
TYPICAL OUTPUT WAVEFORM

RESULT

Schmitt trigger circuit is designed for different values of UTP and LTP.