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GATEPreviousQuestionsonAsynchronous&
SynchronousCounterswithSolutions(1987TillDate)

1987
1.AripplecounterusingnegativeedgetriggeredDflipflopsisshownbelow.Theflip
flopsareclearedto0attheRinput.Thefeedbacklogicistobedesignedtoobtainthe
countsequenceshowninthesamefigure.Thecorrectfeedbacklogicis:

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Answer:A
Solution:https://www.youtube.com/watch?v=qljzFR3B6TM

1990
1.A4bitmodulo16ripplecounterusesJKflipflops.Ifthepropagationdelayofeach
flipflopis50nsec,themaximumclockfrequencythatcanbeusedisequalto

a.20MHz
b.10MHz
c.5MHz
d.4MHz

Answer:C
Solution:https://www.youtube.com/watch?v=v4RIzGm0DGY

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BlogArchive

2016(18)
1993
2015(34)
2014(143) 1.Apulsetrainwithafrequencyof1MHziscountedusingamodulo1024ripple
December(14) counterbuiltwithJKflipflops.Forproperoperationofthecounter,themaximum
November(12)
permissiblepropagationdelayperflipflopstageis____nsec.
GATEAnalogCircuitsFiveMarkQuestionswith Answer:50nSec
Solu...
Solution:https://www.youtube.com/watch?v=VXYFD01hQDU
PreviousGATEQuestionsonAnalogtoDigital&
Dig...
PreviousGATEQuestionsonMicroprocessors
andMem...
GATEPreviousQuestionsonMemories(ROM,
2.Aclockedsequentialcircuithasthreestates,A,BandCandoneinputX.Aslongas
PLAandP... theinputXis0,thecircuitalternatesbetweenthestatesAandB.iftheinputX
becomes1(eitherinstateAorinstateB),thecircuitgoestostateCandremainsin
GATEPreviousQuestionsonAsynchronous&
Synchron... stateCaslongasXcontinuestobe1.ThecircuitreturnstostateAiftheinputbecomes
0onceagainandfromthenonrepeatsitsbehavior.Assumethatthestateassignments
GATEPreviousQuestionsonLatches&Flip
Flops... areA=00,B=01andC=10.
a.Drawthestatediagramofthecircuit.
PreviousGATEQuestionsonICLogicFamilies
with...
b.Givethestatetableofthecircuit.
c.DrawthecircuitusingDflipflops.
PreviousGATEQuestionsonMultiplexers
(MUX)with...
Solution:https://www.youtube.com/watch?v=uEwqg5Ho7Vo
PreviousGATEQuestionsonCombinational
Circuits...
PreviousGATEQuestionsonKMap,SOPand
POSexpr... 1994
PreviousGATEQuestionsonLogicGates(1987
toTi... 1.Synchronouscountersare________thantheripplecounters.
PreviousGATEQuestionsonNumberSystems& Answer:Faster
Subtra... Solution:https://www.youtube.com/watch?v=1qBwgRPMMU8
October(20)
September(7)
August(8) 2.Aringoscillatorconsistingof5invertersisrunningatafrequencyof1MHz.the
July(5) propagationdelaypereachgateis________nsec.
Answer:100nSec
June(6)
Solution:https://www.youtube.com/watch?v=aAm0ZPJhAM
May(20)
April(27)
March(24) 1996
1.Astatemachineisrequiredtocyclethroughthefollowingsequenceofstates:

ABC:000>010>111>100>011>101.

Onepossibleimplementationofthestatemachineisshowninfigure.Specifywhat
signalsshouldbeappliedtoeachofthemultiplexerinputs.

Solution:https://www.youtube.com/watch?v=fNIP5XoARP0

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1997
1.Asequencegeneratorisshowninfigure.Thecounterstatus(Q0Q1Q2)isinitialized
to010usingpreset/clearinputs.

Theclockhasaperiodof50nsandtransitionstakeplaceattherisingclockedge.
a.GivethesequencegeneratesatQ0tillrepeats.
b.Whatistherepetitionrateofthegeneratedsequence?

Solution:https://www.youtube.com/watch?v=iOk6PXkY8

1998
1.ThefigureisshowsamodKcounter,hereKisequalto

a.1
b.2
c.3
d.4
Answer:C
Solution:https://www.youtube.com/watch?v=M521kKIu3U

2.Themod5counterisshowninthefigurecountsthroughstatesQ2Q1Q0=000,001,
010,011and100.

a.Willthecounterlockoutifithappentobeinanyoneoftheunusedstates?
b.Findthemaximumrateatwhichthecounterwilloperatesatisfactorily.
AssumethepropagationdelaysofflipflopandANDgatetobetFFandtA
respectively.

Solution:https://www.youtube.com/watch?v=We99dI2DCJw

1999
1.Theripplecountershowninthegivenfigureisworksasa

a.Mod3upcounter

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b.Mod5upcounter
c.Mod3downcounter
d.Mod5downcounter
Answer:D
Solution:https://www.youtube.com/watch?v=JYOaavMXJzE

2.Thecircuitdiagramofasynchronouscounterisshowninthegivenfigure.
Determinethesequenceofstatesofthecounterassumingthattheinitialstateis000.
GiveyouranswerinatabularformshowingthepresentstateQA,QB,QC,JKinputs
(JA,KA,JB,KB,JC,KC)andthenextstateQA+ ,QB+ ,QC+ .Fromthetable,determine
themodulusofthecounter.

Answer:Mod6
Solution:https://www.youtube.com/watch?v=wnKE1bQlfhg

2000
1.Inthegivenfigure,theJandKinputsofallthefourflipflopsaremadehigh.The
frequencyofthesignalatoutputYis

a.0.833KHz
b.1.0KHz
c.0.91KHz
d.0.77KHz
Answer:B
Solution:https://www.youtube.com/watch?v=ed2xKY4lc2c

2001
1.Fortheringoscillatorshownintehfigure,thepropagationdelayofeachinverteris
100picosec.Whatisthefundamentalfrequencyoftheoscillatoroutput?

a.10MHz
b.100MHz
c.1GHz
d.2GHz
Answer:C
Solution:https://www.youtube.com/watch?v=HefE3DzUfOo

2.Thedigitalblockinthefigure,realizedusingtwopositiveedgetriggeredDflip
flops.Assumethatfort<t0,Q1=Q2=0.Thecircuitinthedigitalblockisgivenby

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Answer:C
Solution:https://www.youtube.com/watch?v=gkkCKeFhQs

2002
1.Itisrequiredtodesignabinarymod5synchronouscounterusingABflipflop,such
thattheoutputQ2Q1Q0changesas000>001>010.....andsoon.Thetruthtablefor
theABflipflopisgiveninfigure.

a.Writedownthestatetableforthemod5counter
b.ObtainsimplifiedSOPexpressionsfortheinputsA2,B2,A1,B1,A0andB0
intermsofQ2,Q1,Q0andtheircomplements.
c.Hencecompletethecircuitdiagramforthemod5countergiveninthefigure
usingminimumnumberof2inputNANDgateonly.

Solution:https://www.youtube.com/watch?v=2HJzJKC38Y

2003
1.A0to6counterconsistsof3flipflopsandacombinationcircuitof2inputgate(s).
Thecombinationcircuitconsistsof
a.oneANDgate
b.oneORgate
c.oneANDgateandoneORgate
d.twoANDgates

Answer:D
Solution:https://www.youtube.com/watch?v=eQA5gMcQSuw

2.A4bitripplecounteranda4bitsynchronouscounteraremadeusingflipflops
havingapropagationdelayof10nseach.Iftheworstcasedelayintheripplecounter
andthesynchronouscounterbeRandSrespectively,then
a.R=10ns,S=40ns
b.R=40ns,S=10ns
c.R=10ns,S=30ns
d.R=30ns,S=10ns
Answer:B
Solution:https://www.youtube.com/watch?v=cAStF7mPky8

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2004
1.Inthemodulo6ripplecountershowninthegivenfigure,theoutputofthe2input
gateisusedtocleartheJKflipflops.

The2inputgateis
a.NANDgate
b.NORgate
c.ORgate
d.ANDgate
Answer:C
Solution:https://www.youtube.com/watch?v=2b1wBH220Oo

2005
1.Thegivenfigureshowsaripplecounterusingpositiveedgetriggeredflipflops.If
thepresentstateofthecounterisQ2Q1Q0=011,thenitsnextstateQ2Q1Q0willbe

a.010
b.100
c.111
d.101
Answer:B
Solution:https://www.youtube.com/watch?v=iZWdwF2lfmw

2006
1.TwoDflipflopsaretobeconnectedasasynchronouscounterasshownbelow,that
goesthroughthefollowingQ1Q0sequence00>01>11>10>00>..

TheinputsD0andD1respectivelyshouldbeconnectedas

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Answer:A
Solution:https://www.youtube.com/watch?v=u3fgelNywPs

2007
1.Forthecircuitshown,thecounterstate(Q1Q0)followsthesequence

a.00,01,10,11,00..
b.00,01,10,00,01..
c.00,01,11,00,01..
d.00,10,11,00,10..
Answer:B
Solution:https://www.youtube.com/watch?v=aLGSUebXUW4

2008
1.ForeachofthepositiveedgetriggeredJKflipflopusedinthefollowingfigure,the
propagationdelayisT.

WhichofthefollowingwaveformscorrectlyrepresentstheoutputatQ1?

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Answer:B
Solution:https://www.youtube.com/watch?v=N7ZYplccPcA

2009
1.Whatarethecountingstages(Q1,Q2)forthecountershowninthefigurebelow?

a.11,10,00,11,10.
b.01,10,11,00,01.
c.00,11,01,10,00..
d.01,10,00,01,10..
Answer:A
Solution:https://www.youtube.com/watch?v=marTcMTzg0Y

2010
1.Assumingthatallflipflopsareinresetconditioninitially,thecountsequence
observedatQAinthecircuitshownis

a.0010111.
b.0001011.
c.0101111.
d.0110100.
Answer:D
Solution:https://www.youtube.com/watch?v=UsicxIAMqx0

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2011
1.WhentheoutputYinthecircuitbelowis1,itimpliesthatdatahas

a.Changedfrom0to1
b.Changedfrom1to0
c.Changedineitherdirection
d.Notchanged
Answer:A
Solution:https://www.youtube.com/watch?v=amudsVzHy88

2.Theoutputofa3stageJohnson(twistedring)counterisfedtoadigitaltoanalog
(D/A)converterasshowninthefigurebelow.Assumeallstatesofthecountertobe
unsetinitially.ThewaveformwhichrepresentstheD/AconverteroutputVois

Answer:A
Solution:https://www.youtube.com/watch?v=g9vVeVizDIM

3.TwoDflipflopsareconnectedasasynchronouscounterthatgoesthroughthe
followingQBQAsequence00>11>01>10>00>.Theconnectionsof
theinputsDAandDBare

Answer:D
Solution:https://www.youtube.com/watch?v=_9k8tNpWn7w

2012
1.Thestatetransitiondiagramforthelogiccircuitshownis

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Answer:D
Solution:https://www.youtube.com/watch?v=S2ytlAcBkFk

2014
1.FiveJKflipflopsarecascadedtoformthecircuitshowninfigure.Clockpulsesata
frequencyof1MHzareappliedasshown.Thefrequency(inKHz)ofthewaveformat
Q3is

Answer:62.5
Solution:https://www.youtube.com/watch?v=ID70DQCpDCg

2.ThedigitallogicshowninthefiguresatisfiesthegivenstatediagramwhenQ1is
connectedtoinputAoftheXORgate.SupposetheXORgateisreplacedbytheXNOR
gate.Whichoneofthefollowingoptionspreservesthestatediagram?

Answer:D
Solution:https://www.youtube.com/watch?v=tBqtKpt1oSE

3.Inthecircuitshown,choosethecorrecttimingdiagramoftheoutput(y)fromthe

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givenwaveformsW1,W2,W3andW4.

a.W1
b.W2
c.W3
d.W4
Answer:C
Solution:https://www.youtube.com/watch?v=E3XeZjGgzqY

4.TheoutputsofthetwoflipflopsQ1,Q2inthefigureshownareinitializedto0,0.
ThesequencegeneratedatQ1uponapplicationofclocksignalis

a.01110.
b.01010..
c.00110.
d.01100..
Answer:D
Solution:https://www.youtube.com/watch?v=wNoctGWwcfs

5.Thecircuitshowninthefigureisa

a.Toggleflipflop
b.JKflipflop
c.SRLatch
d.MasterSlaveDflipflop
Answer:D
Solution:https://www.youtube.com/watch?v=AvKzOVpre_k

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3 comments

Add a comment as Ambresh Biradar

Top comments

Sindhu Gaddam 8 months ago - Shared publicly



max error=quantised error + cummulative error
quantised error= full scale voltage/2^number of bits
=2.55/2^8 =10mv(approx)
now max error= 10mv+2.55mv =12.55mv

+2 1 Reply
3

shubhranshu kumar 5 months ago


thanks but sorry

Monika Kunwal 10 months ago - Shared publicly


can you u please solve this question
Sir,
An 8-bit ADC has full scale of 2.55volt. If other cumulative error has 2.55
mV. determine maximum error.
(a)10m V (b) 12.55mV (c) 7.45 mV (d) 2.55 mV

+4 1 Reply
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