Beruflich Dokumente
Kultur Dokumente
Contents Page No
Abstract iii
List of Figures iv
List of Tables vi
List of Abbreviation vii
Chapter 1- Introduction 01-17
1.1 Introduction 01
1.2 Inverter 01
1.3 Type of inverters 01
1.3.1 Voltage- source inverter 02
1.3.2 Current- source inverter 03
1.3.3 Z- source inverter 04
1.4 Multilevel inverter 05
1.5 Advantages of multilevel converter 09
1.6 Multilevel voltage concept 10
1.6.1 Advantages of multilevel voltages 11
1.7 Applications 12
1.8 Switched Capacitor 13
1.8.1 Switched capacitor inverter 14
1.9 Problem statement 16
1.10 Objective 16
1.11 Thesis organization 17
Chapter 2- Literature Survey 18-39
2.1 Multilevel inverters 18
2.2 Inverters 18
2.3 Two level inverter 20
2.4 Multilevel inverter 23
2.5 Types of multilevel inverters 28
2.5.1 Diode-Clamped multilevel inverter 28
2.5.2 Flying-Capacitor multilevel inverter 32
2.5.3 Cascaded H-bridge multilevel inverter 34
2.5.4 Symmetrical Cascaded H-bridge multilevel inverter 36
2.5.5 Asymmetrical Cascaded H-bridge multilevel 37
inverter
2.6 Conclusion 39
Chapter 3- Considered Concept 40-48
3.1 Introduction 40
3.2 Basic unit 41
3.3 Switched capacitor topology 42
3.3.1 First topology 44
3.3.2 Second topology 45
3.4 Comparison of the considered topologies with other 46
conventional topologies
Chapter 4- Induction Motor 49-58
4.1 History 49
i
4.2 Standards Of Operation 51
4.3 Synchronous Speed 52
4.4 torque 53
4.5 Beginning 53
4.6 Speed Control 55
4.7 Development 55
4.8 Pivot Inversion 56
4.9 Control Consider 56
4.10 Proficiency 56
Chapter 5- MATLAB/ Simulation Results 59-72
5.1 Simulation 59
5.2 Simulation results 60
Chapter 6- Conclusion And Future Scope 73
6.1 Conclusion 73
ABSTRACT
ii
harmonics is highly reduced. The results are simulated using MATLAB/Simulink
software version R2012b.
LIST OF FIGURES
iii
2.12 Symmetrical five level Cascaded H-Bridge inverter 37
2.13 Asymmetrical Cascaded H-Bridge multilevel Inverter 38
3.1 Basic unit 40
3.2 (a) Capacitor charging (VL=vc=vdc). (b) Capacitor 41
discharging (iL=ic=is)
3.3 switched capacitor unit. 42
3.4 (a) First considered topology. (b) Second considered 43
topology.
5.1 Basic circuit diagram of 17-level inverter topology 60
5.2 MATLAB/Simulink model of 17-level inverter topology 60
iv
LIST OF TABLES
v
LIST OF ABBREVIATIONS
vi
MATLAB Matrix Laboratory
vii