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HANDOUT of DIGITAL CIRCUIT

Compiled by:
Machmud Effendy

Electronic Department Faculty of Engineering


University of Muhammadiyah Malang
2015
PATIENCE AND PRAYER

References
1. Budiono Mismail, Dasar dasar Rangkaian Logika Digital, ITB.
2. Anil K.Maini, Digital Electronics, John Wiley & Sons
3. Louis Noshelsky, Introduction to Digital Computer Technology, John Wiley & Sons
4. Samuel C.Lee, Digital Circuit and Logic Design, Prentice Hall.

Session-1.
1. Syllabus and Rule of Lecture
2. Analog Versus Digital
3. Number System : Decimal, Biner, Octal, and Hexadecimal
4. 1s complement , 2s complement
5. Binary to Decimal Conversion, Octal to Decimal Conversion, Hexadecimal to Decimal Conversion
Session-2 and 3
1. Decimal to Binary Conversion, Decimal to Octal Conversion, Decimal to Hexadecimal Conversion
2. Binary to Octal and Octal to Binary, Hex to Binary and Binary to Hexa, Hex to Octal, Octal to Hexa
3. Aritmatical Operation: Addition, substraction, Multiplication, division
Session-4 and 5
1. Binary Coded Decimal (BCD) : BCD to Binary, Binary to BCD
2. Excess-3 Code
3. Gray Code : Binary to Gray Code, Gray Code to Binary
4. Alphanumeric Codes: ASCII Code
5. Seven Segment Display Code
6. Error Detection and Correction Codes: Parity Code, Repetition Code, Hamming Code
Session -6 and 7
1. Logic Gates and Related Devices
Session -8.
1. Middle Test
Session -9.
1. Boolean Algebra and Simplification Techniques I
Session -10.
1. Simplification Techniques II
Session -11.
1. Combinational Circuit and Arithmatic Circuit
Session -12 and 13
1. Flip-Flop and Related Devices: Bistable, Astable, dan Monostable
2. RS Flip-flop, J-K Flip-Flop, D-Flip flop, T Flip-flop
Session -14
1. Counter dan Register
Session -15
1. Application of Digital Circuit
Session -16.
1. Final Test

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SESSION-1
Rule of Lectures:
Attendance=15%, Task and Quiz = 25%, Middle Test = 30%, Final Test=30%.
Each followed the course, must bring handouts
Students who are late up to 20 minutes, not allowed to follow the course.
Shall create a group with at least 4 people.

1.1 Analogue Versus Digital

Analogue,is to express the numerical value of the quantity as a CONTINUOUS RANGE of values
between the two expected extreme values. For example, the temperature of an oven settable
anywhere from 0 to 100 C may be measured to be 65 C or 64.96 C or 64.958 C or even 64.9579 C
and so on, depending upon the accuracy of the measuring instrument. Similarly, voltage across a
certain component in an electronic circuit may be measured as 6.5 V or 6.49 V or 6.487 V or 6.4869 V
Digital, represents the numerical value of the quantity in STEPS OF DISCRETE VALUES. The numerical
values are mostly represented using binary numbers. For example, the temperature of the oven may
be represented in steps of 1 C as 64 C, 65 C, 66 C and so on.
Digital techniques and systems have the advantages of being relatively much easier to design and
having higher accuracy, programmability, noise immunity, easier storage of data and ease of
fabrication in integrated circuit form, leading to availability of more complex functions in a smaller
size. The real world, however, is analogue. Most physical quantities position, velocity, acceleration,
force, pressure, temperature and flowrate, for example are analogue in nature.
Logika positif (active-high logic): tegangan tinggi=1, tegangan rendah=0
x= 0 jika tegangan = 0v
1 jika tegangan = 1.2V /3.3V /5V

logika negatif (active-low logic): tegangan tinggi=0, tegangan rendah=1


x= 0 jika tegangan = 1.2V /3.3V /5V
1 jika tegangan = 0v

1.2 Number System

Decimal number : 0,1,2,3,4,5,6,7,8,9 ---- 8010


Binary number : 0,1 ---- 01112
Octal number : 0,1,2,3,4,5,6,7 ---- 678
Hexadecimal number : 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F ---- AF16
Bit is an abbreviation of term binary digit and is the smallest unit of information. It is either 0 or 1.
1 kilo bit = 210 = 1024 bit ; 2 kilo bit = 211 = 2048 bit ......
1 mega bit = 1024 kilo bit
1 bytes = 8 bit ; 1 nibble = 4 bit ; 1 word = 16 bit
The1s complement of a binary number is obtained by complementing all its bits, i.e. by replacing 0
with 1 and 1 with 0. For example, the 1s complement of 10010110 is (01101001)
The 2s complementof a binary number is obtained by adding 1 to its 1s complement. The 2s
complement of (10010110) is (01101010)

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PATIENCE AND PRAYER
Binary-to-Decimal Conversion
The decimal equivalent of the binary number (1001.0101)2 is determined as follows:
The integer part=1001
The decimal equivalent= (120) +(02 1) +(022) +(123) =1+0+0+8=9
The fractional part= .0101
Therefore, the decimal equivalent=(021) +(122) +(023) +(124) =0+0.25+0 +0.0625=0.3125
Therefore, the decimal equivalent of (1001.0101)2 =9.312510
Octal-to-Decimal Conversion
The decimal equivalent of the octal number (137.21)8 is determined as follows:
The integer part=137
The decimal equivalent=(780) +(381) +(182) =7+24+64=95
The fractional part=.21
The decimal equivalent= (281) +(182) =0.265
Therefore, the decimal equivalent of (137.21)8 =(95.265)10
Hexadecimal-to-Decimal Conversion
The decimal equivalent of the hexadecimal number (1E0.2A)16 is determined as follows:
The integer part=1E0
The decimal equivalent=(0160) +(14161) +(1162) =0+224+256=480
The fractional part=2A
The decimal equivalent=(216 1) +(1016 2) =0.164
Therefore, the decimal equivalent of (1E0.2A)16 =(480.164)10

Example-1
Find the decimal equivalent of the following binary numbers:
(a) 00001110
(b) 10001110
Solution:
(a) The decimal equivalent=020 + 121 + 122 + 123 + 024 + 025 + 026 + 0 x 27
=0+2+4+8+0+0+0+0=14
Therefore, 00001110 represents = 14
(b) The decimal equivalent=020 + 121 + 122 + 123 + 024 + 025 + 026 + 127
=0+2+4+8+0+0+0+128=142
Therefore, 10001110 represents= 142

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SESSION 2

2.1 Decimal to Binary Conversion

2.2 Decimal to Octal Conversion

2.3 Decimal to Hexadescimal Conversion

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Desimal Biner Hexadesimal Octal


9 1001 9 11
13 1101 D 15
20
58
97
120
XX
XX+10
XX+20
Xx+30
XX+40
XX+50

2.4 Binary-Octal and Octal-Binary Conversion

2.5 Hex-Binary and Binary-Hex Conversion

2.6 Hex-Octal and Octal-Hex Conversion

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2.7 Negatif decimal to Binary


-7 -- 111 - 1s omplement = 000 - 2s Complement = 001
Therefore, -7 = 1001
-12 -- 1100 - 1s omplement = 0011 - 2s Complement = 0100
Therefore, -12 = 10100
-XX = .......

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SESSION 3: Digital Arithmetic

3.1 Basic Rules of Binary Addition and Subtraction

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3.2 Hexadecimal Addition, Substraction, and Multiplication

A+3=D F + 1 = 10 A + 9 = 13 C + 5 = 11
A x 3 = 1E F x 3 = 2D A x 9 = 5A C x 5 = 3C
A-3 =7 F-1 =E A-9=1 C-5=7

XX + 3 = XX + 7= XX + A = .. XX + F = ..
XX x 3 = XX x 7= XX x A = .. XX x F = ..
XX - 3 = XX - 7= XX - A = .. XX - F = ..

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SESSION 4

4.1 Binary Coded Decimal (BCD)


The binary coded decimal (BCD) is a type of binary code used to represent a given decimal number
in an equivalent binary form. BCD-to-decimal and decimal-to-BCD conversions are very easy and
straightforward. It is also far less cumbersome an exercise to represent a given decimal number in
an equivalent BCD code than to represent it in the equivalent straight binary form discussed in the
previous chapter.
The BCD equivalent of a decimal number is written by replacing each decimal digit in the integer
and fractional parts with its four-bit binary equivalent. As an example, the BCD equivalent of (23.15)10
is written as (0010 0011.0001 0101)BCD. The BCD code described above is more precisely known as the
8421 BCD code, with 8, 4, 2 and 1 representing the weights of different bits in the four-bit groups,
starting from MSB and proceeding towards LSB. This feature makes it a weighted code,
which means that each bit in the four-bit group representing a given decimal digit has an assigned
weight. Other weighted BCD codes include the 4221 BCD and 5421 BCD codes. Again, 4, 2, 2 and
1 in the 4221 BCD code and 5, 4, 2 and 1 in the 5421 BCD code represent weights of the relevant
bits. Table 2.1 shows a comparison of 8421, 4221 and 5421 BCD codes. As an example, (98.16)10
will be written as 1111 1110.0001 1100 in 4221 BCD code and 1100 1011.0001 1001 in 5421 BCD
code. Since the 8421 code is the most popular of all the BCD codes, it is simply referred to as the
BCD code.

BCD to Binary Conversion

Binary to BCD Conversion

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4.2 Excess-3 Code

4.3 Gray Code

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4.3.1 Binary-Gray Code Conversion

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4.3.2 Gray Code Binary Conversion

4.3.3 Exercise

4.4 Alphanumeric Codes

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4.4.1 ASCII Code

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4.4.2 EBCDIC

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SESSION 5

5.1 Seven Segment Display Code

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5.2 Error Detection and Correction Codes

5.2.1 Parity Code

Jika jumlah bit ganjil (termasuk bit parity) berubah pada waktu transmisi, maka bit parity
menjadi tidak benar dan mengindikasikan adanya kesalahan pada waktu pengiriman. Oleh
karena itu, bit parity merupakan kode pendeteksi kesalahan (error detecting code), dan bukan
merupakan kode pengoreksi kesalahan (error correcting code) karena tidak ada cara untuk
menentukan bit mana yang keliru. Data harus diabaikan seluruhnya dan mengulangi lagi
transmisi dari awal. Pada media transmisi yang terganggu, transmisi yang berhasil akan
membutuhkan banyak waktu atau tidak berhasil sama sekali. Parity mempunyai keuntungan,
yaitu hanya menggunakan satu bit saja dan membutuhkan satu saja gerbang XOR untuk men-
generate-nya.

Bit parity checking sering digunakan untuk transmisi karakter ASCII, karena karakter ini hanya
mempunyai 7 bit dan bit ke-8 dapat digunakan untuk bit parity. Sebagai contoh, diasumsikan
pengiriman 4 bit dengan nilai 1001, dengan bit parity terletak di sebelah paling kanan.
Penjelasan transmisi menggunakan even parity, sebagai berikut:

A akan mengirim : 1001


A menghitung nilai bit parity : 1^0^0^1 = 0
A menambahkan bit parity dan kirim : 10010
B menerima : 10010
B menghitung keseluruhan parity : 1^0^0^1^0 = 0
B melaporkan bahwa transmisi berhasil dengan parity yang benar (genap).

Jika transmisi menggunakan odd parity, maka penjelasannya sebagai berikut:

A akan mengirim : 1001


A menghitung nilai bit parity : ~(1^0^0^1) = 1
A menambahkan bit parity dan kirim : 10011
B menerima : 10011
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PATIENCE AND PRAYER
B menghitung keseluruhan parity : 1^0^0^1^1 = 1
B melaporkan bahwa transmisi berhasil dengan parity yang benar (ganjil).

Mekanisme ini dapat mendeteksi kesalahan bit tunggal, karena jika satu bit berubah ketika
melewati jalur yang jelek, maka akan terdapat jumlah angka satu yang tidak benar pada saat
data diterima. Pada contoh di atas, B menghitung nilai parity dan mencocokkan dengan bit
parity pada nilai yang diterima, mengindikasikan bahwa tidak ada kesalahan bit tunggal. Pada
contoh di bawah ini akan terjadi kesalahan transmisi pada bit kedua:

A akan mengirim : 1001


A menghitung nilai bit parity : 1^0^0^1 = 0
A menambahkan bit parity dan kirim : 10010 *TRANSMISSION ERROR*
B menerima : 11010
B menghitung keseluruhan parity : 1^1^0^1^0 = 1
B melaporkan terjadi transmisi yang tidak benar, karena nilai parity tidak sama.

Pada kasus di atas, B menghitung nilai parity (0) tidak sama dengan bit parity (1) pada nilai
yang diterima. Hal ini mengindikasikan terjadi kesalahan. Di bawah ini contoh yang sama
tetapi dengan kesalahan pada bit parity-nya sendiri.

A akan mengirim : 1001


A menghitung nilai bit parity : 1^0^0^1 = 0
A menambahkan bit parity dan kirim : 10010 *TRANSMISSION ERROR*
B menerima : 10011
B menghitung keseluruhan parity : 1^0^0^1^1 = 1
B melaporkan terjadi transmisi yang tidak benar, karena nilai parity tidak sama.

Sekali lagi, B menghitung keseluruhan odd parity, dan mengindikasikan kesalahan bit. Ada
keterbatasan pada skema parity ini, yaitu ketika ada kesalahan pada pengiriman data dengan bit
yang salah berjumlah genap seperti pada contoh di bawah ini:

A akan mengirim : 1001


A menghitung nilai bit parity : 1^0^0^1 = 0
A menambahkan bit parity dan kirim : 10010 *TRANSMISSION ERROR*
B menerima : 11011
B menghitung keseluruhan parity : 1^1^0^1^1 = 0
B melaporkan transmisi berhasil dengan parity yang benar walaupun sebenarnya data sudah
tidak benar.

5.2.2 Repetition Code

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5.2.3 Hamming Code

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SESSION 6: Logic Gates

6.1 Positive and Negative Logic

6.2 Truth Table

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6.2 Logic Gates

6.2.1 OR-Gate

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6.2.2 And Gate

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6.2.3 NOT Gate

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6.2.4 Exclusive Or Gate

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6.2.5 NAND Gate

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6.2.6 NOR Gate

6.2.7 Exclusive NOR Gate

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6.2.8 Inhibit-Gate

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6.2.9 Universal Gate

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6.2.10 Gates With Open Collector/Drain Outputs

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6.2.11 Trisate Logic Gates

6.2.12 And-Or-Invert Gates

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6.2.13 Schmitt Gates

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6.2.14 IEEE (Institute of Electrical and Electronis Engineer)/ANSI (American National Standard
Institue) Standards Symbol

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6.2.15 Some Common Applications of Logic Gates

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6.2.16 Application Relevant Information

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