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LED TV
SERVICE MANUAL
CHASSIS : LD31B/LD36B

MODEL : 37LN54** 37LN54**-Z*

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67651303 (1301-REV00) Printed in Korea


CONTENTS

CONTENTS . ............................................................................................. 2

SAFETY PRECAUTIONS ......................................................................... 3

SERVICING PRECAUTIONS ................................................................... 4

SPECIFICATION ....................................................................................... 6

ADJUSTMENT INSTRUCTION .............................................................. 10

BLOCK DIAGRAM ................................................................................. 16

EXPLODED VIEW .................................................................................. 19

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE


Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.

Before returning the receiver to the customer,

Always perform an AC leakage current check on the exposed


metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)


With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder
on page 3 of this publication, always follow the safety precau- ES devices.
tions. Remember: Safety First. 4. Use only an anti-static type solder removal device. Some sol-
der removal devices not classified as anti-static can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board 6. Do not remove a replacement ES device from its protective
module or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug (Most replacement ES devices are packaged with leads elec-
or other electrical connection. trically shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective mate-
installation of electrolytic capacitors may result in an explo- rial to the chassis or circuit assembly into which the device will
sion hazard. be installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or cir-
high voltage meter or other voltage measuring device (DVM, cuit, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropri-
(by volume) isopropyl alcohol (90 % - 99 % strength) ate tip size and shape that will maintain tip temperature within
CAUTION: This is a flammable mixture. the range or 500 F to 600 F.
Unless specified otherwise in this service manual, lubrication 2. Use an appropriate gauge of RMA resin-core solder composed
of contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks Do not use freon-propelled spray-on cleaners.
are correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 F to 600 F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 F to 600 F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand
ily by static electricity. Such components commonly are called against the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor chip components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharg-
ing wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.

Copyright LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed when-
gently prying up on the lead with the soldering iron tip as the ever this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. Carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remain- good copper pattern. Solder the overlapped area and clip off
ing on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.

Fuse and Conventional Resistor


Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.

Copyright LG Electronics. Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range 3. Test method


This specification is applied to the LCD TV used LD31B/ 1) Performance: LGE TV test method followed
LD36B chassis. 2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
2. Requirement for Test
Each part is tested as below without special appointment.

1) Temperature: 25 C 5 C(77 F 9 F), CST: 40 C 5 C


2) Relative Humidity: 65 % 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.

4. Model General Specification


No. Item Specification Remarks
1 Market EU(PAL Market-37Countries) DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) :37 countries
UK/Italy/Germany/France/Spain/Sweden/Finland/Neth-
erlands/ Belgium/Luxemburg/ Greece/Denmark/Czech/
Austria /Hungary/Swiss/Croatia/TurkeyNorway/Slovenia/
Poland/Ukraine/Portugal/Ireland/Morocco/Latvia/Estonia/
Lithania/Rumania/Bulgaria/Russia/SlovakiaBosnia/Serbia/
Albania/Kazakhstan/Belarus

DTV (MPEG2/4, DVB-T2): 8 countries


UK/Denmark/Sweden/Finland/Norway/Ireland/Ukraine/
Kazakhstan

DTV (MPEG2/4, DVB-C): 37 countries


UK/Italy/Germany/France/Spain/Sweden/Finland/Nether-
lands/ Belgium/Luxemburg/ Greece/Denmark/Czech/Aus-
tria /Hungary/Swiss/Croatia/TurkeyNorway/Slovenia/Poland
/Ukraine/Portugal/Ireland/Morocco/Latvia/Estonia/Lithania/
Rumania/Bulgaria/Russia/SlovakiaBosnia/Serbia/Albania/
Kazakhstan/Belarus

DTV (MPEG2/4,DVB-S): 29 countries


Italy/Germany/France/Spain/Netherlands/ Belgium/Luxem-
burg/Greece/Czech/Austria /Hungary/Swiss/Croatia/Turkey/
Slovenia/Poland/Portugal/ Morocco/Latvia/Estonia/Lithania/
Rumania/Bulgaria/Russia/Slovakia/Bosnia/Serbia/Albania/
Belarus

Supported satellite : 22 satellites


HISPASAT 1C/1D, ATLANTIC BIRD 2, NILESAT 101/102,
ATLANTIC BIRD 3, AMOS 2/3, THOR 5/6, IRIUS 4,
EUTELSAT-W3A, EUROBIRD 9A, EUTELSAT-W2A,
HOTBIRD 6/8/9, EUTELSAT-SESAT, ASTRA 1L/H/M/
KR, ASTRA 3A/3B, BADR 4/6, ASTRA 2D, EUROBIRD 3,
EUTELSAT-W7, HELLASSAT 2, EXPRESS AM1, TURK-
SAT 2A/3A, INTERSAT10

Copyright LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
No. Item Specification Remarks
Analogue TV
1) PAL-BG Analogue TV : (RF) VHF: E2 to E12, UHF : E21 to E69
2) PAL-DK (CATV) S1 to S20, HYPER: S21 to S47
3) PAL-I/I
4) SECAM-BG Digital TV : VHF, UHF
5) SECAM-DK
2 Broadcasting system 6) SECAM L/L Satellite TV : VHF, UHF,
C-Band, Ku-Band
Digital TV
1) DVB-T/C/T2 * DVB-T2 ( T2 model only support )
* DVB-S/S2 (Satellite model only support )
Satellite Digital TV
1) DVB-T/C/S/S2
DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

DVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
Analog : Upper Heterodyne
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
3 Receiving system Digital : COFDM, QAM
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM

DVB-S/S2
- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
4 Scart Jack (1EA) PAL, SECAM Scart 1 Jack is Full scart and support RF-OUT(analog).
4 System : PAL, SECAM, NTSC, PAL60
5 Video Input RCA(1EA) PAL, SECAM, NTSC
Common port
Y/Cb/Cr
6 Component Input (1EA) Common port
Y/Pb/Pr
7 HDMI Input (2EA) HDMI1/2-DTV Support HDCP
8 Audio Input (1EA) Component & AV Component & AVs audio input is used by common port.
9 SDPIF out (1EA) SPDIF out
Antenna, AV1, AV2, Component,
10 Earphone out (1EA) LA58 Only
HDMI1, HDMI2
11 USB (1EA) EMF, DivX HD, For SVC (download) JPEG, MP3, DivX HD
CI : U
 K, Finland, Denmark, Norway, Sweden, Russia,
DVB-T Spain, Ireland, Luxemburg, Belgium, Netherland
CI+ : France(Canal+), Italy(DGTVi)
12 DVB CI : Switzerland, Austria, Slovenia, Hungary, Bulgaria
DVB-C CI+ : S witzerland(UPC,Cablecom), Netherland(Ziggo),
Germany(KDG,CWB), Finland(labwise)
DVB-S CI + : Germany(Astra HD+ )
LA58 : for DLNA
13 Ethernet (1EA) DLNA(Wired, DMP only)
T2 Model ( LA58V, LA58U, LN54V, LN54U ) : for MHEG

Copyright LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
5. Video resolutions (2D)
5.1. Component Input (Y, CB/PB, CR/PR)
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed
1 720*576 15.625 50.00 13.5 SDTV ,DVD 576I
2 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
3 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
4 720*576 31.25 50.00 27.00 SDTV 576P
5 720*480 31.50 60.00 27.027 SDTV 480P
6 720*480 31.47 59.94 27.00 SDTV 480P
7 1280*720 37.50 50.00 74.25 HDTV 720P
8 1280*720 45.00 60.00 74.25 HDTV 720P
9 1280*720 44.96 59.94 74.176 HDTV 720P
10 1920*1080 28.125 50.00 74.25 HDTV 1080I
11 1920*1080 33.75 60.00 74.25 HDTV 1080I
12 1920*1080 33.72 59.94 74.176 HDTV 1080I
13 1920*1080 56.25 50.00 148.50 HDTV 1080P
14 1920*1080 67.50 60.00 148.50 HDTV 1080P
15 1920*1080 67.432 59.94 148.352 HDTV 1080P
16 1920*1080 27.00 24.00 74.25 HDTV 1080P
17 1920*1080 26.97 23.94 74.176 HDTV 1080P
18 1920*1080 33.75 30.00 74.25 HDTV 1080P
19 1920*1080 33.71 29.97 74.176 HDTV 1080P

5.2. HDMI Input(PC/DTV)


No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
PC(DVI) DDC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 80.00 VESA O
7 1360*768 47.712 60.015 85.50 VESA (WXGA) O
8 1280*1024 63.981 60.020 108.0 VESA (SXGA) O FHD only
9 1920*1080 67.50 60.00 148.5 HDTV 1080P O FHD only
DTV
1 720*480 31.47 59.94 27.00 SDTV 480P
2 720*480 31.50 60.00 27.027 SDTV 480P
3 720*576 31.250 50.00 27.00 SDTV 576P
4 1280*720 37.50 50.00 74.25 HDTV 720P
5 1280*720 45.00 60.00 74.25 HDTV 720P
6 1280*720 44.96 59.94 74.176 HDTV 720P
7 1920*1080 28.125 50.00 74.25 HDTV 1080I
8 1920*1080 33.75 60.00 74.25 HDTV 1080I
9 1920*1080 33.72 59.94 74.176 HDTV 1080I
10 1920*1080 56.250 50.00 148.50 HDTV 1080P
11 1920*1080 67.50 60.00 148.50 HDTV 1080P
12 1920*1080 67.432 59.94 148.352 HDTV 1080P
13 1920*1080 27.00 24.00 74.25 HDTV 1080P
14 1920*1080 26.97 23.976 74.176 HDTV 1080P
15 1920*1080 33.75 30.00 74.25 HDTV 1080P

Copyright LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
6. Video resolutions (3D)
6.1. HDMI Input
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1. 1920*1080 53.95 / 54 23.98 / 24 148.35/148.5 HDTV 1080P Frame packing
2. 1280*720 89.9 / 90 59.94/60 148.35/148.5 HDTV 720P Frame packing
3. 1280*720 75 50 148.5 HDTV 720P Frame packing
4 1920*1080 67.5 60 148.5 HDTV 1080P Side by Side(half), Top and bottom
5 1920*1080 56.3 50 148.5 HDTV 1080P Side by Side(half), Top and bottom
6 1280*720 45 60 74.25 HDTV 720P Side by Side(half), Top and Bottom
7 1280*720 37.5 50 74.25 HDTV 720P Side by Side(half), Top and Bottom
8 1920*1080 33.7 60 74.25 HDTV 1080i Side by Side(half), Top and Bottom
9 1920*1080 28.125 50 74.25 HDTV 1080i Side by Side(half), Top and Bottom
10 1920*1080 27 24 74.25 HDTV 1080P Side by Side(half), Top and Bottom
11 1920*1080 33.7 30 89.1 HDTV 1080P Side by Side(half), Top and Bottom

6.2. RF 3D Input(DTV)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1. 1280*720 37.500 50 74.25 HDTV 720P Side by Side, Top & Bottom
2. 1920*1080 28.125 50 74.25 HDTV 1080I Side by Side, Top & Bottom

6.3. USB Input


No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
Side by Side, Top & Bottom **support
1. 1920*1080 33.75 30.000 74.25 HDTV 1080P
MPO(Photo)

6.4. DLNA Input


No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1. 1920*1080 33.75 30 74.25 HDTV 1080p Side by Side, Top & Bottom

6.5. 3D Input mode


No. Side by Side Top & Bottom Single Frame Sequential Frame Packing

Copyright LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range (4) Click "Connect" tab. If "Can't" is displayed, check connection
between computer, jig, and set.
This specification sheet is applied to all of the LCD TV with
LD31B/ LD36B chassis.
(2) (3)

2. Designation
(1) The adjustment is according to the order which is designated
and which must be followed, according to the plan which
can be changed only on agreeing.
(2) Power adjustment : Free Voltage.
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation : Above 5 Minutes (Heat Run) Please Check the Speed :
Temperature : at 25 C 5 C To use speed between
Relative humidity : 65 10 % from 200KHz to 400KHz
Input voltage : 220 V, 60 Hz
(6) Adjustment equipments: Color Analyzer(CA-210 or CA-110), (5) Click "Auto" tab and set as below.
DDC Adjustment Jig, Service remote control. (6) Click "Run".
(7) Push the "IN STOP" key - For memory initialization. (7) After downloading, check "OK" message.

Case1 : Software version up


(4)
1. After downloading S/W by USB , TV set will reboot
automatically. filexxx.bin
2. Push In-stop key. (5)
3. Push Power on key.
4. Function inspection
5. After function inspection, Push In-stop key. (7)...........OK
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
In-stop key at first. (6)
2. Push Power on key for turning it on.
If you push Power on key, TV set will recover
channel information by itself.
3. After function inspection, Push In-stop key.
* USB DOWNLOAD
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
3. Main PCB check process - If your downloaded program version in USB Stick is Low,
APC - After Manual-Insert, executing APC it didn't work. But your downloaded version is High, USB
data is automatically detecting.
(3) Show the message "Copying files from memory".
* Boot file Download (4) Updating is starting.
(1) Execute ISP program "Mstar ISP Utility" and then click
"Config" tab.
(2) Set as below, and then click "Auto Detect" and check "OK"
message.
If "Error" is displayed, check connection between computer,
jig, and set.
(3) Click "Read" tab, and then load download file(XXXX.bin)
by clicking "Read". (5) Updating Completed, The TV will restart automatically in 5
seconds.
(1) (6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
filexxx.bin * If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didnt have a DTV/
ATV test on production line.

Copyright LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
* After downloading, have to adjust Tool Option again. 3.3. EDID data
(1) Push "IN-START" key in service remote control. (1) HD HDMI EDID data(2D Model)
(2) Select "Tool Option 1" and push "OK" key. 0 1 2 3 4 5 6 7 8 9 A B C D E F
(3) Punch in the number. (Each model has their number) 00 00 FF FF FF FF FF FF 00 1E 6D a b
(4) Completed selecting Tool option. 10 c 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 01 01
30 01 01 01 01 01 01 66 21 50 B0 51 00 1B 30 40 70
3.1. ADC Process 40 36 00 40 84 63 00 00 1E 64 19 00 40 41 00 26 30
* If ADC processes as OTP, There is no need to proceed 50 18 88 03 06 40 84 63 00 00 18 00 00 00 FD 00 3A
60 3E 1E 53 10 00 0A 20 20 20 20 20 20 d
internal ADC.
70 d 01 e
- Enter Service Mode by pushing "ADJ" key,
80 02 03 22 F1 4E 10 1F 04 93 05 14 03 02 12 20 21
- Enter Internal ADC mode by pushing "" key at "7. ADC 90 22 15 01 26 15 07 50 09 57 07 f
Calibration". A0 80 1E 01 1D 80 18 71 1C 16 20 58 2C 25 00 A0 5A
EZ ADJUST ADC Calibration B0 00 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00
0. Tool Option1 ADC Comp 480i OK
C0 20 C2 31 00 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E
1. Tool Option2 ADC Comp 1080p OK D0 96 00 A0 5A 00 00 00 18 02 3A 80 18 71 38 2D 40
2. Tool Option3 ADC Type OTP
3. Tool Option4
E0 58 2C 45 00 A0 5A 00 00 00 1E 00 00 00 00 00 00
4. Tool Option5 Start Reset F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e
5. Tool Option Commercial
6. Country Group
7. Area Option
8.ADC Calibration
(2) Detail EDID Options are below
9. White Balance a. Product ID
10. 10 Point WB
11. Test Pattern MODEL NAME HEX EDID Table DDC Function
12 EDID D/L
13. Sub B/C HD/FHD Model 0001 01 00 Analog/Digital
14. Ext. Input Adjust
b. Serial No: Controlled on production line.
c. Month, Year: Controlled on production line:
<Caution> Using "power on" key of the Adjustment remote ex) Week : '01' -> '01'
control, power on TV. Year : '2013' -> '17' fix
d. Model Name(Hex):
* ADC Calibration Protocol (RS232) cf) TV sets model name in EDID data is below.
NO Item CMD 1 CMD 2 Data 0
Model name MODEL NAME(HEX)
Enter Adjust When transfer the Mode In,
A A 0 0 LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)
Adjust MODE Mode In Carry the command.
Automatically adjustment
ADC adjust ADC Adjust A D 1 0
(The use of a internal pattern) e. Checksum: Changeable by total EDID data.
HD
EDID C/S data
Adjust Sequence HDMI
aa 00 00 [Enter Adjust Mode] Block 0 A3
Check sum
xb 00 40 [Component Input480i)] 5B (HDMI1)
(Hex) Block 1
ad 00 10 [Adjust 480i Comp1] 4B (HDMI2)
aa 00 90 End Adjust mode
* Required equipment : Adjustment remote control. f. Vendor Specific(HDMI)
Input Model name(HEX)
3.2. EDID Download
After enter Service Mode by pushing "ADJ" key. HDMI1 67030C001000801E
Enter EDID D/L menu. HDMI2 67030C002000801E
Enter "START" by pushing "OK" key.
EZ ADJUST EDID D/L
0. Tool Option1 HDMI1 NG
1. Tool Option2 HDMI2 NG
2. Tool Option3
3. Tool Option4
Start Reset
3.4 Function Check
4. Tool Option5 - Check display and sound
5. Tool Option Commercial
6. Country Group
Check Input and Signal items.
7. Area Option 1) TV
8. ADC Calibration
9. White Balance
2) AV (SCART / CVBS)
10. 10 Point WB 3) COMPONENT (480i)
11. Test Pattern
4) HDMI
12. EDID D/L
13. Sub B/C * Display and Sound check is executed by Remote control.
14. Ext. Input Adjust

<Caution>
<Caution> Never connect HDMI && D-sub cable when EDID Not to push the INSTOP key after completion if the function
downloaded. inspection.

Copyright LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
4. Total Assembly line process * Auto-control interface and directions
(1) Adjust in the place where the influx of light like floodlight
4.1. White Balance adjustment around is blocked. (illumination is less than 10 lux).
W/B Equipment condition (2) Adhere closely the Color analyzer(CA210) to the module
CA210 : LED -> CH14, Test signal: Inner pattern(80IRE) less than 10 cm distance, keep it with the surface of the
Above 5 minutes H/run in the inner pattern. (power on key Module and Color analyzer's prove vertically.(80 ~ 100).
of adjust remote control) (3) Aging time
If it is executed W/B adjustment in 2~3 minutes H/run, it is - After aging start, keep the power on (no suspension of
adjusted by Target data. power supply) and heat-run over 5 minutes.
(For OS LED / Direct LED module) - Using 'no signal' or 'POWER ONLY' or the others, check
Mode Temp Coordinate spec Target the back light on.
X=0.269 (0.002) X=0.271
Cool 13,000 K
Y=0.273 (0.002) Y=0.276 Auto adjustment Map(using RS-232C to USB cable)
X=0.285 (0.002) X=0.287 RS-232C COMMAND
Medium 9,300 K
Y=0.293 (0.002) Y=0.296 [CMD ID DATA]
X=0.313 (0.002) X=0.315 Wb 00 00 White Balance Start
Warm 6,500 K
Y=0.329 (0.002) Y=0.332 Wb 00 ff White Balance End
RS-232C COMMAND CENTER
Normal line
[CMD ID DATA] MIN (DEFAULT) MAX
Cool Medium Warm
Aging time Cool Mid Warm Cool Mid Warm
NetCase4 X y x y x y
(Min) R Gain jg Ja jd 00 172 192 192 192
269 273 285 293 313 329
1 0-2 280 287 296 307 320 337 G Gain jh Jb je 00 172 192 192 192
2 3-5 279 285 295 305 319 335 B Gain ji Jc jf 00 192 192 172 192
3 6-9 277 284 293 304 317 334 R Cut 64 64 64 128
4 10-19 276 283 292 303 316 333 G Cut 64 64 64 128
5 20-35 274 280 290 300 314 330 B Cut 64 64 64 128
6 36-49 272 277 288 297 312 327
7 50-79 271 275 287 295 311 325 <Caution>
8 80-119 270 274 286 294 310 324 Color Temperature : COOL, Medium, Warm.
9 Over 120 269 273 285 293 309 323 One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.(When R/G/B Gain are all
* Aging chamber C0, it is the FULL Dynamic Range of Module)
Cool Medium Warm
Aging time
NetCase4
(Min)
X y x y x y * Manual W/B process using adjust Remote control.
269 273 285 293 313 329 After enter Service Mode by pushing "ADJ" key,
1 0-2 276 282 292 302 316 332 E nter White Balance by pushing " " key at "8. White
2 3-5 274 280 290 300 314 330 Balance".
EZ ADJUST
3 6-9 273 278 289 298 313 328
0. Tool Option1
4 10-19 272 276 288 296 312 326 Whit Balance
1. Tool Option2

5 20-35 271 274 287 294 311 324 2. Tool Option3 Color Temp.
R-Gain
Cool
172

3. Tool Option4
6 36-49 270 272 286 292 310 322 4. Tool Option5 G-Gain 172
5. Tool Option Commercial B-Gain 192
7 50-79 266 269 282 289 306 319 6. Country Group R-Cut 64

8 80-119 264 267 280 287 304 317 7. Area Option G-Cut
B-Cut
64
64
8. ADC Calibration
9 Over 120 263 266 279 286 303 316 9. White Balance Test-Pattern ON
10. 10 Point WB Backlight 100
11. Test Pattern Reset To Set

* Connecting picture of the measuring instrument 12 EDID D/L


13. Sub B/C
(On Automatic control) 14. Ext. Input Adjust

Inside PATTERN is used when W/B is controlled. Connect to


auto controller or push Adjustment R/C POWER ON
* CASE Cool Mode
Enter the mode of White-Balance, the pattern will come out.
First adjust the coordinate far away from the target
value(x, y).B.
1) x, y > target
Full White Pattern CA-210 2) x, y < target
3) x >target, y < target
COLOR
ANALYZER 4) x < target, y > target
TYPE : CA-210
-E  very 4 case have to fit y value by adjusting B Gain
and then fit x value by adjusting R-Gain.
- In this case, increasing/decreasing of B Gain and R
RS-232C Communication Gain can be adjusted.

Copyright LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
How to adjust (3) Don't wear a 3D Glasses, Check the picture like below.
1) In case G gain more than 172
Adjust R Gain and B Gain less than 192
2) if the G gain value be adjusted down to 172
G
 gain increase to 172 and R gain / B gain increase
same as G gain increases.
3) if R Gain / B Gain is more than 255 , the G gain adjust
to less than 172.

* CASE Medium / Warm


First adjust the coordinate far away from the target 4.3. IR emitter inspection
value(x, y). (1) Start 3D pattern inspection.
1) x, y > target (2) If IR emitter signal is correctly received to IR receiver, the
i) Decrease the R, G. lamp of IR tester turns on.
2) x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.
3) x > target, y < target
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R
4) x < target, y > target
i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G

* After you finished all adjustments, Press "In-start" key and


compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
For correct it to the model's module from factory Jig model.
* P ush the "IN STOP" key after completing the function
inspection. And Mechanical Power Switch must be set
ON.

4.2. 3D function test


(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])
* HDMI mode NO. 872 , pattern No.83
(1) Please input 3D test pattern like below.
4.4. MHL Test
(1) Turn on TV
(2) Select HDMI2 mode using input Menu.
(3) Set MHL Zig(M1S0D3617) using MHL input, output and
power cord.
(4) Connect HDMI cable between MHL Zig and HDMI4 port.

(2) When 3D OSD appear automatically , then select OK key.

Result) I f, The LED light is green and the Module shows


normal stream OK, Else NG

Copyright LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
4.5. Outgoing condition Configuration 6.2. Command Set
When pressing IN-STOP key by SVC remocon, Red LED Adjust mode CMD(hex) LENGTH(hex) Description
are blinked alternatively. And then automatically turn off. EEPROM WRITE A0h 84h+n n-bytes Write (n = 1~16)
(Must not AC power OFF during blinking)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
5. HI-POT Test Phase
Data write : Model Name and Serial Number write in EEPROM,.
5.1. HI-POT auto-check preparation
- Check the POWER cable and SIGNAL cable insertion condition
6.3. Method & notice
(1) Serial number D/L is using of scan equipment.
5.2. HI-POT auto-check (2) S etting of scan equipment operated by Manufacturing
(1) Pallet moves in the station. (POWER CORD / AV CORD is Technology Group.
tightly inserted) (3) Serial number D/L must be conformed when it is produced in
(2) Connect the AV JACK Tester. production line, because serial number D/L is mandatory by
(3) Controller (GWS103-4) on. D-book 4.0.
(4) HI-POT test (Auto)
- If Test is failed, Buzzer operates. * Manual Download(Model Name and Serial Number)
- If Test is passed, GOOD Lamp on and move to next proc- If the TV set is downloaded by OTA or Service man, sometimes
ess automatically. model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
5.3. Checkpoint 1) Press the "Instart" key of Adjustment remote control.
(1) Test voltage 2) Go to the menu "6.Model Number D/L" like below photo.
- Touchable Metal : 3 KV / min at 100 mA 3) Input the Factory model name or Serial number like photo.
- SIGNAL : 3KV / min at 100 mA
(2) TEST time: 1 second. (case : mass production )
(3) TEST POINT
- Touchable Metal => LIVE & NEUTRAL : Touchable Metal.
- SIGNAL => LIVE & NEUTRAL : SIGNAL.

6. Model name & Serial number D/L


Press "Power on" key of service remote control.
(Baud rate : 115200 bps) 4) Check the model name Instart menu. Factory name displayed.
Connect RS232 Signal Cable to RS-232 Jack. ex 32LV3400-ZG)
Write Serial number 5) Check the Diagnostics.(DTV country only) Buyer model
Must check the serial number at the Diagnostics of SET UP menu. displayed.(ex 32LV3400-ZG)
(Refer to below).

6.1. Signal Table


CMD LENGTH ADH ADL DATA_1 ... Data_n CS DELAY

CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +...+ Data_n
Delay : 20ms

Copyright LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
7. MAC Address & CI+ key download 7.2 LAN Inspection
7.1 MAC Address 7.2.1. Equipment & Condition
Each other connection to LAN Port of IP Hub and Jig
7.1.1 Equipment & Condition
Play file : Serial.exe
MAC Address edit
Input Start / End MAC address

7.1.2 Download method


(1) Communication Prot connection

7.2.2. LAN inspection solution


LAN Port connection with PCB
Network setting at MENU Mode of TV
Setting automatic IP
Connection : PCBA (USB Port) USB to Serial Adapter
Setting state confirmation
(UC-232A) RS-232C cable PC(RS-232C port)
-> If automatic setting is finished, you confirm IP and MAC
* Caution : LJ21* chassis support only UC-232A driver. (only
Address.
use this one. )

(2) MAC Address & CI+ Key Download


Set CI+ Key path Directory at Start Mac & CI+ Download
Programme
Com 1,2,3,4 and 115200(Baudrate)

7.3. LAN PORT INSPECTION(PING TEST)


GP4_LOW Connect SET -> LAN port == PC -> LAN Port

SET PC

7.3.1. Equipment setting


(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2

Port connection button click(1) 7.3.2. LAN PORT inspection (PING TEST)
Push the (2) MAC Address write. (1) Play the LAN Port Test Program.
At success Download, check the OK (3) (2) Connect each other LAN Port Jack.
Start CI+ Key Download, Push the (4) (3) Play Test (F9) button and confirm OK Message.
Check the OK or NG (4) Remove LAN cable.

Copyright LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
Copyright
X- tal LVDS FPC(51P)
24M (FHD/50Hz)
AIR/Cable
AIF, DIF
TDSQ- G501D(B)
SIF SPI SERIAL FLASH
(LGIT) IC1300 (8M bit)
Seattleite MX25L8005M2I
FE_TS

Only for training and service purposes


DDR3 1Gb DDR3 2Gb
DDR3 Add. DDR3 1Gb
IC1202 IC1201
DDR3 Data IC1201
H5TQ1G63EFR - PBC H5TQ2G63DFR - PBC
LNB LNB OUT
H5TQ1G63EFR - PBC
A8303SESTR -T
(IC2701) I2C EEPROM 256Kbit 2D Model
IC104
R1EX2425BSAS0A
1. [LD31B] DVB-T/C/S2(2D/3D)

LG Electronics. Inc. All rights reserved.


CVBS, Y/Pb/Pr, L/R NAND FLASH
Component1 IC102 (1Gbit)
K9F1G08U0D-SCB0

FE_ VOUT S7LR- M PCM_A[0:7]


F- SCART TC74LCX244FT
SC1_CVBS_IN (LGE2121 - MS)
CI Slot

Buffer

- 16 -
SC1_R/G/B IC101 PCM_A[8:14]
R ear PCM_DATA[0:7]
SPDIF SPDIF
FE_TS_DATA[0:7]
TS_DATA[0:7]
TMDS
BLOCK DIAGRAM

HDMI1

EPHY KEY1
LAN
KEY2 CONTROL
LED_R IR & LED /
(TACT SWITCH)
IR

HDMI2 TMDS

With MHL
AUD_MASTER_CLK,
DP/DM Audio AMP
AUD_LRCH, SPK L/R
Side USB AUD_LRCK, AUD_SCK STA380BWF
H/P L/R
H/P
Only for 3D

- LN54*S, LN54*R LN54*6, LN54*5, LA61*S, LA61*6

LGE Internal Use Only


Copyright
X- tal LVDS FPC(51P)
24M (FHD/50Hz)
AIR/Cable
ATV_Video (Analog)
TDSQ- G601D(B)
ATV_SIF (Analog) SPI SERIAL FLASH
(LGIT) IC1300 (8M bit)
Seattleite MX25L8005M2I
FE_TS

Only for training and service purposes


DDR3 1Gb DDR3 2Gb
DDR3 Add. DDR3 1Gb
IC1202 IC1201
DDR3 Data IC1201
H5TQ1G63EFR - PBC H5TQ2G63DFR - PBC
LNB LNB OUT
H5TQ1G63EFR - PBC
A8303SESTR -T
(IC2701) I2C EEPROM 256Kbit 2D Model
IC104
R1EX2425BSAS0A

LG Electronics. Inc. All rights reserved.


CVBS, Y/Pb/Pr, L/R NAND FLASH
2. [LD31B] DVB-T2/C/S2(2D_3D)

Component1 IC102 (1Gbit)


K9F1G08U0D-SCB0

FE_ VOUT S7LR- M PCM_A[0:7]


F- SCART TC74LCX244FT
SC1_CVBS_IN (LGE2121 - MS)
CI Slot

Buffer
SC1_R/G/B IC101

- 17 -
PCM_A[8:14]
R ear PCM_DATA[0:7]
SPDIF SPDIF
FE_TS_DATA[0:7]
TS_DATA[0:7]
TMDS
HDMI1

EPHY KEY1
LAN
KEY2 CONTROL
LED_R IR & LED /
(TACT SWITCH)
IR

HDMI2 TMDS

With MHL
AUD_MASTER_CLK,
DP/DM Audio AMP
AUD_LRCH, SPK L/R
Side USB AUD_LRCK, AUD_SCK STA380BWF
H/P L/R
H/P
Only for 3D

- LN54*V, LN54*U, LA61*V

LGE Internal Use Only


Copyright
X- tal LVDS FPC(51P/30P)
24M (FHD/HD/50Hz)
AIR/Cable

TDSS-
AIF, DIF SERIAL FLASH
G501D(B) SPI
IC1300 (8M bit)
SIF MX25L8005M2I
(LGIT)

Only for training and service purposes


DDR3 Add. DDR3 2Gb
3. [LD36B] DVB-T/C(2D)

DDR3 Data IC1201


H5TQ2G63DFR - PBC

CVBS, Y/Pb/Pr, L/R I2C EEPROM 256Kbit


Component1 IC104
R1EX2425BSAS0A

LG Electronics. Inc. All rights reserved.


FE_ VOUT NAND FLASH
F- SCART IC102 (1Gbit)
SC1_CVBS_IN
K9F1G08U0D-SCB0
SC1_R/G/B
S7LR- M PCM_A[0:7]
R ear TC74LCX244FT
SPDIF (LGE2121 - MS)
CI Slot

- 18 -
SPDIF Buffer
IC101 PCM_A[8:14]
TMDS PCM_DATA[0:7]
HDMI1 FE_TS_DATA[0:7]
TS_DATA[0:7]
HDMI2 TMDS

With MHL
KEY1
KEY2 CONTROL
LED_R IR & LED /
(TACT SWITCH)
IR

DP/DM AUD_MASTER_CLK,
USB AUD_LRCH,
Audio AMP
Side STA380BWF SPK L/R
AUD_LRCK, AUD_SCK

- LN54*0, LN54*4, LN54*B, LN54*3

LGE Internal Use Only


EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

400

910

900
510
521

123

120
540
LV1

530

122
200

Set + Stand
A10

Stand Base

Stand Body
301

A9

+
A2
500
300

Copyright LG Electronics. Inc. All rights reserved. - 19 - LGE Internal Use Only
Only for training and service purposes
IC102
NAND FLASH MEMORY K9F1G08U0D-SCB0
<CHIP Config(LED_R/BUZZ)>
+3.3V_Normal +3.3V_Normal
Boot from SPI CS1N(EXT_FLASH) 1b0
S7LR-M_NON_MS10
NC_1
1 48
NC_29 Boot from SPI_CS0N(INT_FLASH) 1b1
NAND_FLASH_1G_SS IC101
NC_2 EAN61857001 NC_28
2 47 MSD804KKX
NC_3 NC_27 PCM_A[0-7] <CHIP Config>
3 46 PCM_D[0-7]
22 (I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
NC_4
4 45
NC_26
AR101 B51_no_EJ : 4b0000 Boot from 8051 with SPI flash PCM_D[0] W21 SYM.D
R107 NC_5 I/O7 PCM_A[7] SB51_WOS : 4b0001 Secure B51 without scramble PCM_D[1] PCMDATA[0]/GPIO129
R109 AA18
1K 3.9K 5 44 SB51_WS : 4b0010 Secure B51 with scramble PCMDATA[1]/GPIO130
PCM_D[2] AB22
NC_6 I/O6 PCM_A[6] MIPS_SPE_NO_EJ : 4b0100 Boot from MIPS with SPI flash
AR103 6 43 PCM_D[3] PCMDATA[2]/GPIO131
22 MIPS_SPI_EJ_1 : 4b0101 Boot from MIPS with SPI flash AE20
R/B I/O5 PCM_A[5] MIPS_SPI_EJ_2 : 4b0110 Boot from MIPS with SPI flash PCM_D[4] PCMDATA[3]/GPIO123
7 42 AA15
MIPS_WOS : 4b1001 Secure MIPS without scramble PCM_D[5] PCMDATA[4]/GPIO122
RE I/O4 PCM_A[4] MIPS_WS : 4b1010 Scerur MIPS with SCRAMBLE AE21
/F_RB 8 41 PCM_D[6] PCMDATA[5]/GPIO121
+3.3V_Normal AB21 AE18
/PF_OE CE NC_25 PCM_D[7] PCMDATA[6]/GPIO120 NF_CE1Z/GPIO141
9 40 Y15 AC17
/PF_CE0 PCM_A[0-14] PCMDATA[7]/GPIO119 NF_WPZ/GPIO196 /PF_WP
NC_7 NC_24 CAP_10uF_X5R AD18
10 39 PCM_A[0] NF_CEZ/GPIO140 /PF_CE0
C102-*1 W20 AC18
OPT NC_8 NC_23 C102 10uF PCM_A[1] PCMADR[0]/GPIO128 NF_CLE/GPIO139 /PF_CE1

1K

1K

1K

1K

1K
R108 V20 AC19
+3.3V_Normal 1K C101 11 38 10V CHANGE TO PCM_A[2] PCMADR[1]/GPIO127 NF_REZ/GPIO142 /PF_OE
0.1uF VCC_1 VCC_2 10UF 10V X5R 10uF 10V W22 AD17
85C

OPT

OPT

OPT

OPT
12 37 CAP_10uF_X7R PCM_A[3] PCMADR[2]/GPIO125 NF_WEZ/GPIO143 /PF_WE
OPT AB18 AE17
R105 VSS_1 VSS_2 C103 PCM_A[4] PCMADR[3]/GPIO124 NF_ALE/GPIO144 PF_ALE

R115

R117

R165

R123

R152
13 36 0.1uF AA20 AD19
1K PCMADR[4]/GPIO102 NF_RBZ/GPIO145 /F_RB
PCM_A[5] AA21
NC_9 NC_22
14 35 PCM_A[6] PCMADR[5]/GPIO104
LED_R/BUZZ Y19
NC_10 NC_21 PCM_A[7] PCMADR[6]/GPIO105
15 34 AB17
AUD_SCK PCM_A[8] PCMADR[7]/GPIO106
CLE NC_20 AUD_MASTER_CLK R148 Y16
16 33 PCM_A[9] PCMADR[8]/GPIO111
AR102 AUD_MASTER_CLK_0 AB19
PCMADR[9]/GPIO113 GPIO_PM[0]/GPIO6
H5
POWER_DET
/PF_CE1 ALE I/O3 PCM_A[3] 56 PCM_A[10] AB20 K6
17 32 OPT
PWM1 PCM_A[11] PCMADR[10]/GPIO117 PM_UART_TX/GPIO_PM[1]/GPIO7 PM_TXD
PF_ALE WE I/O2 PCM_A[2] C112 AA16 K5
18 31 100pF PCM_A[12] PCMADR[11]/GPIO115 GPIO_PM[2]/GPIO8 INV_CTL
/PF_WE PWM0 AA19 J6
WP I/O1 PCM_A[1] 50V PCM_A[13] PCMADR[12]/GPIO107 GPIO_PM[3]/GPIO9 RL_ON

1K

1K

1K

1K

1K
/PF_WP 19 30 AC21 K4
PCM_A[14] PCMADR[13]/GPIO110 GPIO_PM[4]/GPIO10 POWER_ON/OFF_1
AR104 NC_11 I/O0 PCM_A[0] AA17 L6

OPT
22 R106 20 29 PCMADR[14]/GPIO109 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_RXD
C2
1K
NC_12 NC_19 22 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12

R116

R118

R121

R124

R153
21 28 Y20 L5
/PCM_REG PCMREG_N/GPIO126 GPIO_PM[7]/GPIO13 /FLASH_WP
NC_13 NC_18 M6
22 27 GPIO_PM[8]/GPIO14 SIDE_HP_MUTE +3.5V_ST
AB15 M5
R102 /PCM_OE PCMOE_N/GPIO116 GPIO_PM[9]/GPIO15 PANEL_CTL
NC_14 NC_17 AA22 C1
3.3K 23 26 /PCM_WE PM_MODEL_OPT_0
PCMWE_N/GPIO195 PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
NC_15 NC_16 AD22 M4
24 25 /PCM_IORD PCMIORD_N/GPIO114 GPIO_PM[11]/GPIO17 AMP_MUTE
AD20 R180
/PCM_IOWR PCMIOWR_N/GPIO112 4.7K
A2 R147 33
PM_SPI_SCK/GPIO1 SPI_SCK
AD21 D3 R146 33
/PCM_CE PCMCE_N/GPIO118 PM_SPI_CZ0/GPIO_PM[12]/GPIO0 /SPI_CS
AC20 B2
/PCM_IRQA PCMIRQA_N/GPIO108 PM_SPI_SDI/GPIO2 SPI_SDI
Y18 B1 R151 33
/PCM_CD PCMCD_N/GPIO133 PM_SPI_SDO/GPIO3 SPI_SDO
Y21 for SERIAL FLASH
/PCM_WAIT PCMWAIT_N/GPIO103
Y22
PCM_RST PCM_RESET/GPIO132
CI_TS_CLK
Y14
TS0CLK/GPIO90 CI_TS_VAL
NAND_FLASH_1G_HYNIX NAND_FLASH_2G_HYNIX NAND_FLASH_2G_TOSHIBA U21 AA10
NAND_FLASH_1G_THOSIBA USB1_OCD PCM2_CE_N/GPIO134 TS0VALID/GPIO88 CI_TS_SYNC
EAN35669103 EAN61508001 EAN60708702 EAN60991001 V21 Y12
USB1_CTL PCM2_IRQA_N/GPIO135 TS0SYNC/GPIO89 CI_TS_DATA[0-7]
IC102-*1 IC102-*2 IC102-*3 IC102-*4 R20
H27U1G8F2CTR-BC TC58NVG0S3ETA0BBBH H27U2G8F2CTR TC58NVG1S3ETA00 PCM2_CD_N/GPIO138 CI_TS_DATA[0]
T20 Y13 from CI SLOT
PCM_5V_CTL PCM2_WAIT_N/GPIO136 TS0DATA_[0]/GPIO80 CI_TS_DATA[1]
U22 Y11
PCM2_RESET/GPIO137 TS0DATA_[1]/GPIO81 CI_TS_DATA[2]
NC_1 NC_29 NC_1 NC_29 NC_1 NC_29 NC_1 NC_29 AA12
1 48 1 48 1 48 1 48 TS0DATA_[2]/GPIO82 CI_TS_DATA[3]
D4 AB12
NC_2 NC_28 NC_2 NC_28 NC_2 NC_28 NC_2 NC_28 /MHL_OCP_DET UART1_TX/GPIO46 TS0DATA_[3]/GPIO83 CI_TS_DATA[4]
2 47 2 47 2 47 2 47 E4 AA14
MHL_OCP_EN UART1_RX/GPIO47 TS0DATA_[4]/GPIO84 CI_TS_DATA[5]
NC_3 NC_27 NC_3 NC_27 NC_3 NC_27 NC_3 NC_27 N25 AB14
3 46 3 46 3 46 3 46 PM_TXD UART2_TX/GPIO68 TS0DATA_[5]/GPIO85 CI_TS_DATA[6]
N24 AA13
NC_4 NC_26 NC_4 NC_26 NC_4 NC_26 NC_4 NC_26 PM_RXD UART2_RX/GPIO67 TS0DATA_[6]/GPIO86 CI_TS_DATA[7]
4 45 4 45 4 45 4 45 B8 AB11
MODEL_OPT_6 UART3_TX/GPIO50 TS0DATA_[7]/GPIO87
NC_5 I/O7 NC_5 I/O8 NC_5 I/O7 NC_5 I/O8 for SYSTEM EEPROM A8 FE_TS_CLK
5 44 5 44 5 44 5 44 MODEL_OPT_7 UART3_RX/GPIO51
(IC104) AC15 FE_TS_VAL_ERR
NC_6 I/O6 NC_6 I/O7 NC_6 I/O6 NC_6 I/O7 TS1CLK/GPIO101
6 43 6 43 6 43 6 43 R136 22 P23 AD15 FE_TS_SYNC
I2C_SCL I2C_SCKM2/DDCR_CK/GPIO75 TS1VALID/GPI99
R137 22 P24 AC16 FE_TS_DATA[0-7]
R/B I/O5 RY/BY I/O6 R/B I/O5 RY/BY I/O6 I2C_SDA
7 42 7 42 7 42 7 42 I2C_SDAM2/DDCR_DA/GPIO74 TS1SYNC/GPIO100
RE
8 41
I/O4 RE
8
I/O5 RE
8 41
I/O4 RE
8 41
I/O5 D2 AD16 FE_TS_DATA[0] Internal demod out
41 RGB_DDC_SDA DDCA_DA/UART0_TX TS1DATA_[0]/GPIO91 FE_TS_DATA[1]
CE NC_25 CE NC_25 CE NC_25 CE NC_25 D1 AE15
9 40 9 40 9 40 9 40 RGB_DDC_SCL DDCA_CK/UART0_RX TS1DATA_[1]/GPIO92 FE_TS_DATA[2]
AE14
NC_7 NC_24 NC_7 NC_24 NC_7 NC_24 NC_7 NC_24 TS1DATA_[2]/GPIO93 FE_TS_DATA[3] FE_TS_DATA[0]
10 39 10 39 10 39 10 39 AC13
TS1DATA_[3]/GPIO94 FE_TS_DATA[4] FE_TS_DATA[0]
NC_8 NC_23 NC_8 NC_23 NC_8 NC_23 NC_8 NC_23 P21 AC14
11 38 11 38 11 38 11 38 PWM0 PWM0/GPIO69 TS1DATA_[4]/GPIO95 FE_TS_DATA[5]
N23 AD12
VCC_1 VCC_2 VCC_1 VCC_2 VCC_1 VCC_2 VCC_1 VCC_2 PWM1 PWM1/GPIO70 TS1DATA_[5]/GPIO96 FE_TS_DATA[6]
12 37 12 37 12 37 12 37 P22 AD13
PWM2 PWM2/GPIO71 TS1DATA_[6]/GPIO97 FE_TS_DATA[7]
VSS_1 VSS_2 VSS_1 VSS_2 VSS_1 VSS_2 VSS_1 VSS_2 R21 AD14
13 36 13 36 13 36 13 36 PWM3/GPIO72 TS1DATA_[7]/GPIO98
IC101-*1 P20
NC_9 NC_22 NC_9 NC_22 NC_9 NC_22 NC_9 NC_22 PWM4/GPIO73
14 35 14 35 14 35 14 35 LGE2121-MS (M1_L13_MS10) F6
LED_R/BUZZ PWM_PM/GPIO197
NC_10 NC_21 NC_10 NC_21 NC_10 NC_21 NC_10 NC_21
15 34 15 34 15 34 15 34
CLE NC_20 CLE NC_20 CLE NC_20 CLE NC_20 S7LR-M_MS10
16 33 16 33 16 33 16 33 H6
C7 AB25 KEY1 SAR0/GPIO34
ALE I/O3 ALE I/O4 ALE I/O3 ALE I/O4 GPIO39 LVA0P G5
17 32 17 32 17 32 17 32 E6 AB23 KEY2 SAR1/GPIO35
GPIO40 LVA0N G4
WE I/O2 WE I/O3 WE I/O2 WE I/O3 F5 AC25 SAR2/GPIO36
18 31 18 31 18 31 18 31 GPIO41 LVA1P J5
B6 AB24 SAR3/GPIO37
WP I/O1 WP I/O2 WP I/O1 WP I/O2 GPIO42 LVA1N R164 1K J4
19 30 19 30 19 30 19 30 E5 AD25 SCART1_MUTE SAR4/GPIO38
GPIO43 LVA2P EU
NC_11 I/O0 NC_11 I/O1 NC_11 I/O0 NC_11 I/O1 D5 AC24
20 29 20 29 20 29 20 29 GPIO44 LVA2N
B7 AE23
NC_12 NC_19 NC_12 NC_19 NC_12 NC_19 NC_12 NC_19 GPIO45 LVA3P R23
21 28 21 28 21 28 21 28 E7 AC23 VSYNC_LIKE/GPIO146
GPIO48 LVA3N
NC_13 NC_18 NC_13 NC_18 NC_13 NC_18 NC_13 NC_18 F7 AC22
22 27 22 27 22 27 22 27 GPIO49 LVA4P R24
AB5 AD23 SPI1_CK/GPIO199
NC_14 NC_17 NC_14 NC_17 NC_14 NC_17 NC_14 NC_17 GPIO52 LVA4N R25
23 26 23 26 23 26 23 26 AB3 SPI1_DI/GPIO200
GPIO53 T21
NC_15 NC_16 NC_15 NC_16 NC_15 NC_16 NC_15 NC_16 A9 V23 SPI2_CK/GPIO201
24 25 24 25 24 25 24 25 GPIO54 LVB0P T22
F4 U24 SPI2_DI/GPIO202
GPIO55 LVB0N
AB1 V25
I2C_SCKM0/GPIO56 LVB1P
N6 V24
I2C_SDAM0/GPIO57 LVB1N
AB2 W25
GPIO76 LVB2P
AC2 W23
GPIO77 LVB2N
AA23
LVB3P
Y24
DIMMING I2C +3.3V_Normal LVB3N
AA25
LVB4P
AA24
LVB4N S7LR-M_NON_MS10
OPT AE24 IC101
R156 10K LVACLKP MSD804KKX
PWM0 AD24
LVACLKN
R140 R141 R144 R145 Y23
1K 1K 2.2K 2.2K LVBCLKP
R157
PWM_DIM
100
PWM2 LVBCLKN
W24
C7
SYM.A AB25
OPT AMP_RESET GPIO39 LVA0P RXA0+
T25 E6 AB23
C111 AMP_SDA GPIO194 FRC_RESET FRC_RESET GPIO40 LVA0N RXA0-
2.2uF U23 F5 AC25
AMP_SCL GPIO191 5V_DET_HDMI_2 GPIO41 LVA1P RXA1+
T24 B6 AB24
GPIO192 5V_DET_HDMI_4 GPIO42 LVA1N RXA1-
I2C_SDA T23 E5 AD25
GPIO193 AV_CVBS_DET GPIO43 LVA2P RXA2+
I2C_SCL D5 AC24
AV2_CVBS_DET GPIO44 LVA2N RXA2-
B7 AE23
SC1/COMP1_DET GPIO45 LVA3P RXA3+
E7 AC23
HP_DET GPIO48 LVA3N RXA3-
F7 AC22
S2_RESET GPIO49 LVA4P RXA4+
AB5 AD23
TUNER_RESET GPIO52 LVA4N RXA4-
AB3
MODEL_OPT_0 GPIO53
A9 V23
NAND_EN GPIO54 LVB0P RXB0+
EEPROM +3.3V_Normal MODEL_OPT_1
F4
AB1
GPIO55 LVB0N
U24
V25
RXB0-
R181

PM MODEL OPTION
10K

LNA_CTRL_1 I2C_SCKM0/GPIO56 LVB1P RXB1+


N6 V24
LNA_CTRL_2 I2C_SDAM0/GPIO57 LVB1N RXB1-
AB2 W25
PM_MODEL_OPT_0 MODEL_OPT_2 GPIO76 LVB2P RXB2+
IC104 +3.5V_ST AC2 W23
BR_RESET_DEMOD GPIO77 LVB2N RXB2-
M24256-BRMN6TP C105 HIGH : HD_NON_EU AA23
LVB3P RXB3+
NVRAM_ST 0.1uF
NVRAM_RENESAS
LOW : HD_EU Y24
LVB3N RXB3-
IC104-*1 R174
HD_LVDS_pattern is different. AV2_CVBS_DET
LVB4P
AA25
RXB4+
R177
E0 VCC R1EX24256BSAS0A 10K 10K Between EU and NON_EU LVB4N
AA24
RXB4-
1 8 S/W_TAIWAN HD_LVDS_NON_EU

E1 WC
PM_MODEL_OPT_1 AE24
RXACK+
2 7 A0 VCC PM_MODEL_OPT_0 LVACLKP
1 8 HIGH : TAIWAN AD24
RXACK-
A0h LOW : EU, AJ
LVACLKN
Y23
E2 SCL PM_MODEL_OPT_1 LVBCLKP RXBCK+
3 6 R111 22 I2C_SCL A1 WP
2 7 W24
NC : Other LVBCLKN RXBCK-
R175
VSS
4 5
SDA
R112 22 A2 SCL 10K
R176
10K for 1 Binary
I2C_SDA 3 6 HD_LVDS_EU T25
S/W_EU/AJ GPIO194 MODEL_OPT_3
C104 C106 U23
8pF 8pF VSS SDA GPIO191 MODEL_OPT_4
4 5 T24
EAN61548301 OPT OPT GPIO192 MODEL_OPT_5
T23
GPIO193

EAN62389501

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/07/05
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN1_EU_OS 1

Copyright 2013 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
MODEL OPTION Memory OPTION
MODEL_OPT_4 MODEL_OPT_6
+3.3V_Normal +2.5V_Normal +3.3V_Normal PIN NAME PIN NO. LOW HIGH +1.10V_VDDC
MODEL OPTION MODEL_OPT_DVB_T2(O)
Memory
PIN NO. U23 PIN NO. B8
Note VDDC 1.05V +1.10V_VDDC
MODEL_OPT_DVB_S(O)

MODEL_OPT_0
MODEL_OPT_MIU1_1G

MODEL_OPT_MIU0_2G

AB3 FHD HD VDDC : 2026mA

MODEL_OPT_PHM(O)
MODEL_OPT_M120

0 0
MODEL_OPT_DUAL

128M
1K

1K

1K

1K

1K

1K

1K

1K
MODEL_OPT_1 F4

0.1uF
MODEL_OPT_HD
PHM_OFF PHM_ON

10uF

10uF

1uF

1uF
MODEL_OPT_2 AB2 NON_DVB_T2 DVB_T2 128M+128M 0 1

C228

C275
R290

R291

R222

R221

R206

R208

R211

R226

MODEL_OPT_3 T25

10V

10V

C277

C280

C283
NON_M120 M120
256M 1 0
MODEL_OPT_0
MODEL_OPT_4 U23 MIU0-128M MIU0-256M
MODEL_OPT_1 256M+128M 1 1 Ginga
R203 100 MODEL_OPT_5 T24 NON_DVB_S DVB_S
RF_SWITCH_CTL MODEL_OPT_2
RF_SW_OPT MODEL_OPT_3 MODEL_OPT_6 B8 MIU1-NO_DDR MIU1-128M
MODEL_OPT_4
MODEL_OPT_5 MODEL_OPT_7 A8 NON_DUAL_STREAM DUAL_STREAM
MODEL_OPT_MIU1_NO_DDR

MODEL_OPT_6 IC101
SYM.E
MODEL_OPT_DVB_T2(X)

MSD804KKX
MODEL_OPT_NON_DUAL

MODEL_OPT_DVB_S(X)

MODEL_OPT_7 * Dual Stream is only Korea 3D spec +1.10V_VDDC


MODEL_OPT_MIU0_1G

MODEL_OPT_NON_M120

MODEL_OPT_PHM(X)

S7LR-M_NON_MS10
1K
1K

1K

1K

1K

1K

1K

1K

Close to MSTAR DTV_ATV_IF


MODEL_OPT_FHD

R288 100 C257 0.1uF


IF_P_MSTAR
Normal Power 3.3V K12
AVDDLV_USB GND_32
G10
NON_DVB_T2 NON_DVB_T2 +3.3V_Normal VDD33 G11
C287 NON_DVB_T2 GND_33
100pF C288 G9 G12
R223
R293

R294

R224

R207

R209

R212

R227

IF_AGC_SEL OPT 33pF VDDC_1 GND_34


H9 G13
LNA2_CTL R289 100 C258 0.1uF L204 VDDC_2 GND_35
IF_N_MSTAR BLM18PG121SN1D C284-*1 K10 G14
RF_SWITCH_CTL NON_DVB_T2 NON_DVB_T2 VDDC_3 GND_36
NON_DVB_T2 K11 G17

0.1uF

0.1uF

0.1uF
CAP_10uF_X5R

CAP_10uF_X5R
VDDC_4 GND_37

0.1uF
C289

0.1uF
IC101 L10 G18

C284 10uF

C204 10uF
33pF 10uF 10V

85C

85C
VDDC_5 GND_38
CAP_10uF_X7R M12 G19
MSD804KKX F_NIM/CHINA F_NIM/CHINA M13
VDDC_6 GND_39
G24
C204-*1 VDDC_7 GND_40

C209

C235

C245
C250 0.1uF R216 47 N12 H11

10V

10V
TU_SIF

C255

C259
VDDC_8 GND_41
S7LR-M_NON_MS10 C251 0.1uF R218 47 CHANGE TO 10uF 10V P14 H12
F_NIM/CHINA C264 VDDC_9 GND_42
J2 AC4 F_NIM/CHINA 1000pF 10UF 10V X5R CAP_10uF_X7R P15 H13
RXACKP NC_8 VDDC_10 GND_43
J3
K3
RXACKN SYM.C NC_9
AD3 ANALOG SIF
Close to MSTAR
50V
OPT
CHANGE TO
10UF 10V X5R
FB_CORE
R10
R14
VDDC_11 GND_44
H14
H15
RXA0P VDDC_12 GND_45
J1 AC3 AVDD_AU33 R15 H16
RXA0N IP +3.3V_Normal VDDC_13 GND_46
K2 AE3 T10 H17
RXA1P IM VDDC_14 GND_47
K1 L227 L208 H18
RXA1N BLM18PG121SN1D BLM18PG121SN1D GND_48
L2 AD4 NON_DVB_T2 H19
RXA2P SIFP GND_49
L3 AC5 P10 J9
RXA2N SIFM C240 C241 NC_2 GND_50
T5 NON_DVB_T2 0.1uF 0.1uF P19 J10
DDCDA_DA/GPIO27 FB_CORE FB_CORE GND_51
T4 C282 NON_DVB_T2 R16 J11
POWER_ON/OFF_2 0.1uF R220
DDCDA_CK/GPIO26 10K AVDDL_MOD GND_52
V5 L11 J12
POWER_ON/OFF_2 HOTPLUGA/GPIO22 NON_DVB_T2 NC_1 GND_53
R219 M14 J13
0 MIUVDDC DVDD_DDR GND_54
AD2 J14
IF_AGC IF_AGC_MAIN GND_55
AE2 J15
RF_AGC C285 GND_56
0.047uF W9 J16
AVDD2P5 AVDD2P5_ADC_1 GND_57
25V W10 J18
TUNER_I2C NON_DVB_T2 AVDD2P5_ADC_2 GND_58
AE6 W11 J19
I2C_SCKM1/GPIO78 TU_SCL AVDD2P5_ADC_3 GND_59
AD6 W12 J25
I2C_SDAM1/GPIO79 TU_SDA AVDD2P5_ADC_4 GND_60
Close to MSTAR K9
GND_61
Y17 K13
C261 27pF AVDD25_LAN GND_62
AD1 K14
XIN GND_63
AC1 V18 H10
R287

X201 AVDD2P5_MOD
XOUT AVDD_MOD_1 GND_64
1M

R5 24MHz C262 27pF U19 K18


PM_MODEL_OPT_1 HOTPLUGD/GPIO25 AVDD_MOD_2 GND_65
HDMI

K19
GND_66
AE9 D7 OPT R297 0 K22
CK+_HDMI4 RXCCKP SPDIF_IN/GPIO150 CI_DET GND_67
AC9 D6 R296 100 W14 L8
CK-_HDMI4 RXCCKN SPDIF_OUT/GPIO151 SPDIF_OUT AVDD25_PGA NC_3 GND_68
R231 2.2 AC10 SPDIF_OPTIC W15 L9
D0+_HDMI4 RXC0P SIDE USB AVSS_PGA NC_4 GND_69
R232 2.2 AD9 J8
D0-_HDMI4
D1+_HDMI4
AC11
RXC0N
E3 Normal 2.5V AVDD_NODIE
U7
GND_70
L12
RXC1P USB0_DM AVDD_NODIE GND_71
AD10 E2 L13
D1-_HDMI4 RXC1N USB0_DP GND_72
AE11 +2.5V_Normal AVDD2P5 L7 L18
D2+_HDMI4 RXC2P AVDD_DVI_USB_1 GND_73
AD11 AC12 M7 L19
D2-_HDMI4 RXC2N USB1_DM SIDE_USB1_DM AVDD_DVI_USB_2 GND_74
AE8 AE12 L211 AVDD2P5:172mA P7 M8
DDC_SDA_4 DDCDC_DA/GPIO31 USB1_DP SIDE_USB1_DP BLM18PG121SN1D AVDD3P3_MPLL GND_75
AD8 R7 K8

10uF

CAP_10uF_X5R
DDC_SCL_4 AMP_SCL AVDD_DMPLL
DDCDC_CK/GPIO30 AVDD_DMPLL GND_76
AC8 C260 M10
HPD4 HOTPLUGC/GPIO24 AMP_SDA CHANGE TO 1uF GND_77
C8 R213 22 DVB_S C273 C274 M19 M11
I2S_IN_BCK/GPIO148 DEMOD_SCL 10UF 10V X5R DVDD_NODIE GND_78

C269
F2 D8 R214 22 DVB_S 0.1uF 0.1uF L14
CK+_HDMI2 RXBCKP I2S_IN_SD/GPIO149 DEMOD_SDA GND_79
F3 D9 V7 M15
CK-_HDMI2 RXBCKN I2S_IN_WS/GPIO147 COMP2_DET AVDD_AU33 AVDD_AU33 GND_80
G3 W7 M16
D0+_HDMI2 RXB0P AVDD_EAR33 GND_81
F1 B10 M18
D0-_HDMI2 RXB0N I2S_OUT_BCK/GPIO154 AUD_SCK AVDD2P5_MOD GND_82
G2 C9 R19 M25
D1+_HDMI2 RXB1P I2S_OUT_MCK/GPIO152 AUD_MASTER_CLK_0 AVDD25_PGA:13mA VDD33 VDDP_1 GND_83
G1 B9 L229 T19 N10
D1-_HDMI2 RXB1N I2S_OUT_SD/GPIO155 AUD_LRCH VDDP_2 GND_84
H2 BLM18PG121SN1D N11
D2+_HDMI2 RXB2P GND_85
H3 W18 N13
D2-_HDMI2 RXB2N I2S_I/F AVDD_LPLL_1 GND_86
R6 C291 W19 N14
DDC_SDA_2 DDCDB_DA/GPIO29 AVDD_LPLL_2 GND_87
U6 C10 0.1uF N15
DDC_SCL_2 DDCDB_CK/GPIO28 I2S_OUT_WS/GPIO153 AUD_LRCK GND_88
P5 16V V19 N16
HPD2 HOTPLUGB/GPIO23 VDD33 VDDP_NAND GND_89
R4 N17
CEC_REMOTE_S7 CEC/GPIO5 GND_90
AB9 C236 2.2uF EU N19
AUL0 SC1/COMP1_L_IN GND_91
AA11 C237 2.2uF EU C269-*1 J17 K7
AUR0 SC1/COMP1_R_IN AVDD_MIU AVDD_DDR0_D_1 GND_92
P2 Y9 K15 P8
HSYNC0 AUL1 AVDD_DDR0_D_2 GND_93
R3 AA9 10uF 10V K16 P9
VSYNC0 AUR1 CAP_10uF_X7R AVDD_DDR0_D_3 GND_94
N2 AA7 L15 M9
RIN0P AUL2 AVDD_DDR0_C GND_95
P3 AB8 P11
RIN0M AUR2 GND_96
N3 Y8 C242 2.2uF K17 P13
GIN0P AUL3 COMP2_L_IN AVDD_DDR1_D_1 GND_97
N1 Y10 C243 2.2uF L17 P16
GIN0M AUR3 COMP2_R_IN AVDD_DDR1_D_2 GND_98
M3 AC7 M17 P17
BIN0P AUL4 AVDD_DDR1_D_3 GND_99
M2 AD7 CHANGE TO X5R L16 P18
BIN0M AUR4 AVDD_DDR1_C GND_100
M1 P12
SOGIN0 GND_101
AUDIO IN R8
SCART1_RGB/COMP1 E9
GND_102
R9
GND_EFUSE GND_103
V2 R11
SC1_ID HSYNC1 GND_104
V3 W6 AUDIO OUT R12
SC1_FB VSYNC1 GPIO_PM[13]/GPIO19 MHL_CD_SENSE GND_105
EU EU EU EU EU EU EU

EU R253 33 C211 0.047uF U3 V6 A23 R13


SC1_R+/COMP1_Pr+ RIN1P AUOUTL2 SCART1_Lout GND_1 GND_106
*H/W opt : EU R254 68 C212 0.047uF U2 V4 B17 R17
RIN1M AVDD5V_MHL AVDD5V_MHL GND_2 GND_107
EU R255 C213 T1 Y7 C23 T8
SC1_G+/COMP1_Y+
EU
EU R256
33
68 C214
0.047uF
0.047uF T2
GIN1P GPIO_PM[14]/GPIO20
W5
/VBUS_EN DDR3 1.5V A5
GND_3 GND_108
T9
GIN1M AUOUTR2 SCART1_Rout GND_4 GND_109
EU R257 33 C215 0.047uF R2 U5 C11 N7
SC1_B+/COMP1_Pb+ BIN1P GPIO_PM[15]/GPIO21 TP209 GND_5 GND_110
EU R258 68 C216 0.047uF R1 C19 T11
BIN1M GND_6 GND_111
C217 1000pF T3 C22 T12
SC1_SOG_IN SOGIN1 GND_7 GND_112
R236 0 AVDD_DDR0:55mA D14 T13
+1.5V_DDR GND_8 GND_113
OPT AVDD_MIU D18 T14
GND_9 GND_114
COMP2 AA2 D19 T15
HSYNC2 L209 GND_10 GND_115
R237 33 C218 0.047uF Y2 E17 T16
COMP2_Pr+ RIN2P L202 BLM18PG121SN1D GND_11 GND_116
R238 68 C219 0.047uF AA3 BLM18SG121TN1D E18 T17
RIN2M GND_12 GND_117
R239 33 C220 0.047uF W2 AD5 E19 U8
COMP2_Y+/AV_CVBS_IN GIN2P AUVRM GND_13 GND_118
R240 Y3 C249 C253 C256 E22 U9

0.1uF
0.1uF
68 C221 0.047uF C263

C207

C254
C248
0.1uF

C278

1uF
GIN2M 4.7uF 1uF 0.1uF 10uF GND_14 GND_119
C266

R241 33 C222 0.047uF V1 AE5 10uF F8 U10


COMP2_Pb+ BIN2P AUVAG GND_15 GND_120
R242 68 C223 0.047uF W3 AC6 10V F17 U11
BIN2M AUVRP GND_16 GND_121
C224 1000pF W1 F18 U12
SOGIN2 H/P OUT GND_17 GND_122
AA6 L203 5.6uH HEAD_PHONE F19 U13
EARPHONE_OUTL HP_LOUT GND_18 GND_123
CVBS In/OUT F_NIM/CHINA F_NIM/CHINA AB6 L205 5.6uH HEAD_PHONE AVDD_DDR1:55mA G8 U14
EARPHONE_OUTR HP_ROUT GND_19 GND_124
R244 33 C225 0.047uF AA8 H8 U15
TU_CVBS CVBS0 GND_20 GND_125
EU

EU R245 33 C226 0.047uF Y4 C268 C272 N22 U16


SC1_CVBS_IN CVBS1 4.7uF 4.7uF GND_21 GND_126
R246 33 C227 0.047uF W4 C6 N21 U17
COMP2_Y+/AV_CVBS_IN CVBS2 RP/GPIO63 EPHY_RP 10V 10V GND_22 GND_127
AA5 C5 HEAD_PHONE HEAD_PHONE N20 R18
CVBS3 TP/GPIO60 EPHY_TP GND_23 GND_128
Y5 M22 V9
NC_5 GND_24 GND_129
AA4 A6 M21 V10
NC_7 RN/GPIO66 EPHY_RN GND_25 GND_130
Y6 C4 M20 V11
NC_6 LED1/GPIO59 GND_26 GND_131
DTV/MNT_VOUT AA1 SOC_RESET F10 V12
CVBSOUT1 GND_27 GND_132
B5 V15 V14
C203 TN/GPIO62 EPHY_TN GND_28 GND_133
1000pF R252 68 C233 0.047uF AB4 C3 POWER_DET_RESET +3.5V_ST SWICH W16 V17
50V VCOM GPIO61 GND_29 GND_134
OPT A3 SW200 V8 T7
GPIO64 URSA_SDA GND_30 GND_135
Close to MSTAR B3 JTP-1127WEM
STby 3.5V T18 E8
2

GPIO65 URSA_SCL GND_31 GND_136


B4
LED0/GPIO58 R266 +3.5V_ST AVDD_NODIE +1.10V_VDDC
URSA_SDA 470 SWICH MIUVDDC
RESET_IC_SOC_RESET R205
URSA_SCL 100 L206
C205-*1 L228
1

BLM18PG121SN1D
C202 C200 1uF BLM18PG121SN1D
N4 4.7uF 4.7uF R217 AVDD_DMPLL 10V
IRIN/GPIO4 IR 10V 10V 0 C286 C252 ESD_1uF
T6 R210 0 C231 1uF RESET_IC_SOC_RESET
ARC0 HDMI_ARC 0.1uF 0.1uF C296 C279
N5 HDMI1_ARC HDMI1_ARC +3.5V_SOC_RESET L207 ESD_0.1uF ESD_0.1uF C252-*1
SOC_RESET 10uF 0.1uF
HWRESET SOC_RESET BLM18PG121SN1D 1uF 10V
10V
R200 C201 ESD_1uF
62K 0.1uF C205 C286-*1
16V 0.1uF 1uF
ESD_0.1uF
10V
ESD_1uF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/07/05
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN2_EU_OS 2

Copyright 2013 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
L13 POWER BLOCK (POWER DETECT 2)

+3.5V_ST --> 3.375V --> 3.46V

FROM LIPS & POWER B/D PANEL_POWER Power_DET


+24V --> 3.78V --> 3.92V (3.79V)
+12V --> 3.58V --> 3.82V (3.68V)
+12V R402-*1
100
+3.5V_SOC_RESET
+12V +3.5V_ST
L412 +3.5V_ST
120 Q409
R488
CIS21J121 AO3407A 100K

D
PD_+12V PD_+3.5V R463 RESET_IC_SOC_RESET
C443 R448 R450 10K
+3.5V_ST R439 10uF PANEL_VCC 0 PWR_DET_ON_SEMI
MMBT3906(NXP) C438 2.7K
33K 16V G 1% IC408
0.1uF 5% NCP803SN293 RESET_IC_SOC_RESET
Q402
+3.3V_Normal 25V R402 POWER_DET
+3.5V_ST OPT VCC RESET 300
3 2
1 3 +3.5V_ST R440 PD_+12V 1
R419 5.6K
R416 2 1K C411 R447 GND C474
10K OPT 1.2K
R411 R415 0.1uF 0.1uF
33K 100 R426 C 16V 1%
R461 R406 R430 POWER_DET_RESET IC408-*1
OPT 4.7K 10K 10K R405 R407
10K PANEL_CTL B Q407 5.6K APX803D29
5.6K
MMBT3904(NXP)
C PD_+24V
R421 001:AL22 +24V R404
10K INV_CTL E 100K RESET VCC
R401 C B 2 3
R489
RL_ON 10K 10K 1
B Q401 PD_+24V
MMBT3904(NXP) E Q405 R482 PD_+24V_PWR_DET_ON_SEMI GND
MMBT3904(NXP) 8.2K IC409
R462 NCP803SN293 PD_+24V PWR_DET_ON_DIODES
10K E 1% R480
VCC RESET 100
3 2 IC409-*1
PD_+24V APX803D29
R403 1
PD_+24V 1.5K GND
C412 1% RESET VCC
P401 0.1uF 2 3
D401 5V OPT
SMAW200-H18S1 R412 3.9K
PWM_DIM_PULL_DOWN
+1.5V_DDR 16V 1
GND
CIC21J501NE *For 55LN54 Power ON Noise PD_+24V_PWR_DET_DIODES
PWR ON 1 2 DRV ON
L408 L404
+3.5V_ST 3.5V 3 4 PDIM#1 PWM_DIM
C406 0.1uF 3.5V 5 6 PDIM#2 R408 100
CIC21J501NE PWM1
16V GND 7 8 GND +3.5V_ST
L407 PWM2_2CH_POWER
24V 24V IC407
+24V 9 10 +1.5V_DDR
C418 0.1uF MLB-201209-0120P-N2
GND 11 12 GND AP7173-SPG-13 HF(DIODES)
50V 12V 13 14 12V L420 [EP]
L402
+12V 12V 15 16 N.C BLM18PG121SN1D
C404 0.1uF GND 17 18 GND
MLB-201209-0120P-N2 IN OUT
16V 1 8

+3.3V_Normal

THERMAL
19 R1 R457
PG FB 4.3K

9
.

2 7
1/16W
VCC SS 1%
3 C472 +3.5V_ST
+3.3V_Normal
R433
1.5A6 R2 22uF
C476
0.1uF
D403
5V
FET_2.5V_AOS
AO3435
+3.3V_Normal

C467 R456 10V 16V OPT Q403 L403


10K EN GND
4 5 4.7K BLM18PG121SN1D
560pF

D
1/16W
50V 1%
C461
10uF C437 D405
C425

G
10V C423
R434 0.1uF 22uF 5V
R438 2.2uF 16V
10K 22K 10V
10V

R445

Vout=0.8*(1+R1/R2)=1.5319 2.2K

FET_2.5V_DIODE
DMP2130L
C
R443 Q403-*1
POWER_ON/OFF_1 10K B Q400

D
MMBT3904(NXP)

G
+2.5V_Normal
IC402 +2.5V_Normal
+3.3V_Normal
TJ1118S-2.5

IN 3 2 OUT

+5V_Normal +5V_Normal
1
GND S7LR core 1.15V volt
Vout=0.8*(1+R1/R2) C440 D402

& L406
3.6uH
R1
CAP_10uF_X5R C403
10uF
10V
85C
0.1uF
16V
5V
OPT +3.3V_Normal C447
0.33uF
R428
+5V_USB C413
0.047uF
C420
22uF
C421
22uF
R452
33K
1%
CHANGE TO
10UF/10V/X5R
10K 16V

25V C424 C422


16V 16V 330pF 0.1uF +3.5V_ST C441 +1.10V_VDDC
OPT R453 50V C403-*1
27K 16V 0.1uF
1% OPT 16V
R2

EP[GND]
R491 10uF 10V
R454

VIN_3

PWRGD
0
CAP_10uF_X7R

BOOT
+12V L413
11K 1%

EN
CIC21J501NE
SW_IN

CHANGE TO +5V_USB L415


BST

16

15

14

13
LX

FB

16V/X5R C417 CAP_10uF_X5R 3.6uH


10uF CHANGE TO VIN_1 1 12 PH_3
10V 10UF/10V/X5R THERMAL
12

11

10

L401 85C VIN_2 PH_2


C430 2 17 11 C444 D404
CIC21J501NE
C453 C456
13

10uF 0.1uF 5V
8

10V GND_1 3 IC403 10 PH_1 22uF 22uF


C405 +5V_Normal +3.3V_Normal 16V OPT
PGND SW_OUT TPS54319TRE 10V 10V
10uF GND_2 SS/TR
16V 4 9
14

IC401 C488
R417

8
VIN AGND R414
C419 TPS65281RGV 10K 4.7K 3300pF C439
4.7uF 10V 50V

AGND

VSENSE

COMP

RT/CLK
OPT
15

R410
6

USB1_OCD R1
THERMAL

R432 R442 100pF


100K 30K
V7V FAULT 1/16W 330K 5%
17

1/16W
1%
C448
16

R436
5

USB1_CTL 15K 3300pF


EN EN_SW
50V
1

[EP]
SS

COMP

ROSC

RLIM

C417-*1 R2 R441
75K

R413
10uF 10V
CAP_10uF_X7R
3A 1/16W
1%
R409 20K
C426 2K
100pF
50V
OPT C410 Vout=0.827*(1+R1/R2)
3300pF
50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/09/19
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Power_PD2 4

Copyright 2013 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
IR/LED and Control

+3.5V_ST

CONTROL_NO_FILTER
R602 R603 R611
10K 10K 0
1% 1%
CONTROL_FILTER
L601
R600 BLM18PG121SN1D
100
KEY1

CONTROL_FILTER
CONTROL_FILTER C608 P600
L602 0.1uF
R601 BLM18PG121SN1D 16V 12507WR-08L
100
KEY2
CONTROL_FILTER
C609 1
CONTROL_NO_FILTER
R612 0.1uF
0 16V
2

+3.5V_ST 3
L600
BLM18PG121SN1D
4

R610
1.8K
C602 C603 LED_R/BUZZ 5
+3.5V_ST 0.1uF 1000pF
16V 50V
OPT
C607
0.1uF 6
R607 16V
3.3K

IR 7

C604
100pF
50V 8

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/07/18
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/CONTROL 6

Copyright 2013 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
USB (SIDE)

+5V_USB

C700
22uF
10V

JK700
3AU04S-305-ZC-(LG)

1
USB DOWN STREAM

SIDE_USB1_DM
3

SIDE_USB1_DP
4

D700
5

RCLAMP0502BA

OPT

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 12/06/20
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB 7

Copyright 2013 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
HDMI (REAR 1 / SIDE 1 MHL)
HDMI_1 SIDE_HDMI (MHL)
5V_HDMI_4 5V_DET_HDMI_4

5V_HDMI_2 5V_DET_HDMI_2 GND


BODY_SHIELD
R807

10K 20
HP_DET R830 100
19 HPD4
SHIELD
R826 5V R819
18 R834 100
C VA806 DDC_SDA_4
20 R817

R818

3.3K
1K GND 1.8K ESD_HDMI
Q801 B 10K 17 R835 100
HPD2 VA805 DDC_SCL_4
MMBT3904(NXP) ESD_HDMI
19 16 DDC_DATA
R803 E R832 100
DDC_SDA_2
18 1.8K VA802 15 DDC_CLK VA807 VA808
R801

3.3K

ESD_HDMI R833 100


DDC_SCL_2 ESD_HDMI ESD_HDMI
17 VA801 14 NC
ESD_HDMI1_VARISTOR
VA804 CE_REMOTE
16 13
ESD_HDMI HDMI_CEC

EAG62611204
VA803 CK-
15 ESD_HDMI 12
R805 0 D828
HDMI_ARC CK_GND RCLAMP0524PA
14 HDMI1_ARC 11 1 10
HDMI_CEC
CK+ 2 9 CK-_HDMI4
13
EAG59023302

10
CK+_HDMI4
D0- 3 8
12 D826 9
RCLAMP0524PA 4 7
1 10 D0_GND D0-_HDMI4
11 CK-_HDMI2 8 5 6
CK+ 2 9 D0+_HDMI4
10 CK+_HDMI2 D0+
3 8 7 ESD_HDMI_SEMTECH
D0-
9 4 7 D1-
D0-_HDMI2 6 D829
D0_GND 5 6
8 D0+_HDMI2 D1_GND RCLAMP0524PA
5 1 10
D0+ D1-_HDMI4
7 ESD_HDMI_SEMTECH 2 9
D1+ D1+_HDMI4
D1- 4 3 8
6 D827 D2-
3 4 7
D1_GND RCLAMP0524PA D2-_HDMI4
5 1 10 D2_GND 5 6
D1-_HDMI2 2 D2+_HDMI4
D1+ 2 9
4 D1+_HDMI2 D2+ ESD_HDMI_SEMTECH
D2- 3 8 1
3 4 7 D2-_HDMI2
D2_GND 5 6 +3.5V_ST
2 D2+_HDMI2 OPT
D2+ D811
1 ESD_HDMI_SEMTECH JK803

R811
D801 R810

10K
VA801-*1 D801-*1

OPT
JK801 ESD_HDMI1_VARISTOR 0
1uF 1uF E
10V 10V R812 Q803
10K
ESD_HDMI1_CAP ESD_HDMI1_CAP OPT
C801

D812
5.6V
0.047uF OPT B

OPT
25V C
C
B
Q802 MHL_CD_SENSE
OPT
E R831
300K
D826-*1 D827-*1 R802
IP4283CZ10-TBA IP4283CZ10-TBA 0
TMDS_CH1- NC_4 TMDS_CH1- NC_4
1 10 1 10

CEC TMDS_CH1+

GND_1
2 9
NC_3

GND_2
TMDS_CH1+

GND_1
2 9
NC_3

GND_2
3 8 3 8

R820
100
TMDS_CH2-

TMDS_CH2+
4

5
7

6
NC_2

NC_1
TMDS_CH2-

TMDS_CH2+
4

5
7

6
NC_2

NC_1
MHL OCP
HDMI_CEC CEC_REMOTE_S7 ESD_HDMI_NXP ESD_HDMI_NXP

AVDD5V_MHL 5V_HDMI_4 IC802


D828-*1 D829-*1
IP4283CZ10-TBA IP4283CZ10-TBA BD82020FVJ
+5V_Normal
TMDS_CH1-
1 10
NC_4 TMDS_CH1-
1 10
NC_4 +3.3V_Normal
D800
TMDS_CH1+
2 9
NC_3 TMDS_CH1+
2 9
NC_3 MBR230LSFT1G OUT_3 GND
8 1
GND_1 GND_2 GND_1 GND_2
3 8 3 8 R809 30V
5V_HDMI_4 +5V_Normal 0 C809
5V_HDMI_2 +5V_Normal +3.5V_ST TMDS_CH2-
4 7
NC_2 TMDS_CH2-
4 7
NC_2 100K OUT_2 IN_1
10uF OPT 7 2
TMDS_CH2+ NC_1 TMDS_CH2+ NC_1 10V R808
5 6 5 6
C802 R821
ESD_HDMI_NXP ESD_HDMI_NXP R814
OUT_1 IN_2 0.1uF 10K
A1

A2

A1

A2

2.7K
A1

A2

6 3
MMBD6100 MMBD6100 MMBD6100
D822 D824 D825 OC EN

E
C

5 4
C

+3.3V_Normal
Q804
C
R815

B
R827 B 10K
R806 20K /VBUS_EN
R822 R823 10K
R824 R825 /MHL_OCP_DET R804
0 R813 Q806 (Active Low)
E
2.7K 2.7K 2.7K 2.7K 10K

DDC_SDA_2 DDC_SDA_4
C
R816
B 10K
DDC_SCL_2 DDC_SCL_4 MHL_OCP_EN
Q805 (Active High)
E

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 2012/07/12
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
HDMI_R1_S1 8
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
SPDIF

SPDIF OPTIC JACK +3.3V_Normal


5.15 Mstar Circuit Application

SPDIF-JACK-FOXCONN
SPDIF-JACK-SOLTEAM
JK1001 JK1001-*1
2F01TC1-CLM97-4F JST1223-001

GND 1 GND

1
Fiber Optic

Fiber Optic
VCC 2 VCC

2
VIN 3 VINPUT

3
SPDIF_OUT
4

4
C1001 C1002

SHIELD

FIX_POLE
0.1uF 100pF
16V 50V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_S7LRM 12/06/12
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
SPDIF 10
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
AVDD_DDR0 AVDD_DDR0 AVDD_DDR0 AVDD_DDR0

+1.5V_DDR AVDD_DDR0

2_DDR

2_DDR

R1227
R1201

R1224
R1204

1K 1%
1K 1%

1K 1%
1K 1%

L1202
CIC21J501NE

A-MVREFDQ B-MVREFCA B-MVREFDQ

2_DDR 0.1uF
A-MVREFCA

2_DDR1000pF
0.1uF

1000pF

2_DDR 0.1uF
1000pF
0.1uF

1000pF

1%
1%

1%
1%

C1250

R1228
2_DDR

C1217

C1218

C1219

C1238

C1241
R1202

R1225

0.1uF

0.1uF

0.1uF
R1205

C1206

C1239

C1220
10uF10V
C1247

C1248

C1249

C1251

1uF

1uF

1uF

1uF

1uF
2_DDR
OPT
C1202

2_DDR
C1201

C1204

1K
C1203
1K

1K
1K

CLose to DDR3 CLose to Saturn7M IC CLose to Saturn7M IC CLose to DDR3

DDR_1600_1G_SS
DDR_1600_1G_SS
IC1202
IC1201 S7LR-M_NON_MS10 K4B1G1646G-BCK0
K4B1G1646G-BCK0 IC101
MSD804KKX EAN61836301
EAN61836301 N3 M8
B-MA0 A0 VREFCA B-MVREFCA
M8 N3 P7
A-MVREFCA VREFCA A0 A-MA0 SYMBOL.B B-MA1 A1
P7 A11 B23 P3
A1 A-MA1 A-MA0 A_DDR3_A[0] B_DDR3_A[0] B-MA0 B-MA2 A2
P3 C14 D25 N2 H1
A2 A-MA2 A-MA1 A_DDR3_A[1] B_DDR3_A[1] B-MA1 B-MA3 A3 VREFDQ B-MVREFDQ
H1 N2 B11 F22 P8
A-MVREFDQ VREFDQ A3 A-MA3 A-MA2 A_DDR3_A[2] B_DDR3_A[2] B-MA2 B-MA4 A4
P8 F12 G22 P2 2_DDR
A4 A-MA4 A-MA3 A_DDR3_A[3] B_DDR3_A[3] B-MA3 B-MA5 A5 R1226
P2 C15 E24 R8 L8
R1203 A5 A-MA5 A-MA4 A_DDR3_A[4] B_DDR3_A[4] B-MA4 B-MA6 A6 ZQ
L8 R8 E12 F21 R2 240
ZQ A6 A-MA6 A-MA5 A_DDR3_A[5] B_DDR3_A[5] B-MA5 B-MA7 A7
240 R2 A14 E23 T8 1% AVDD_DDR0
A7 A-MA7 A-MA6 A_DDR3_A[6] B_DDR3_A[6] B-MA6 B-MA8 A8
AVDD_DDR0 1% T8 D11 D22 R3 B2
A8 A-MA8 A-MA7 A_DDR3_A[7] B_DDR3_A[7] B-MA7 B-MA9 A9 VDD_1
B2 R3 B14 D24 L7 D9 C1227 10uF 10V
VDD_1 A9 A-MA9 A-MA8 A_DDR3_A[8] B_DDR3_A[8] B-MA8 B-MA10 A10/AP VDD_2
10V C1205 10uF D9 L7 D12 D21 R7 G7 2_DDRC1228 0.1uF
VDD_2 A10/AP A-MA10 A-MA9 A_DDR3_A[9] B_DDR3_A[9] B-MA9 B-MA11 A11 VDD_3
C1207 0.1uF G7 R7 C16 C24 N7 K2 2_DDRC1229 0.1uF
VDD_3 A11 A-MA11 A-MA10 A_DDR3_A[10] B_DDR3_A[10] B-MA10 B-MA12 A12/BC VDD_4
C1208 0.1uF K2 N7 C13 C25 T3 K8 2_DDRC1230 0.1uF
VDD_4 A12/BC A-MA12 A-MA11 A_DDR3_A[11] B_DDR3_A[11] B-MA11 B-MA13 A13 VDD_5
C1210 0.1uF K8 T3 A15 F23 N1 2_DDRC1231 0.1uF
VDD_5 A13 A-MA13 A-MA12 A_DDR3_A[12] B_DDR3_A[12] B-MA12 VDD_6
C1211 0.1uF N1 E11 E21 M7 N9 2_DDRC1232 0.1uF
VDD_6 A-MA13 A_DDR3_A[13] B_DDR3_A[13] B-MA13 NC_5 VDD_7
C1212 0.1uF N9 M7 B13 D23 R1 2_DDRC1233 0.1uF
VDD_7 NC_5 A-MA14 A_DDR3_A[14] B_DDR3_A[14] B-MA14 VDD_8
C1213 0.1uF R1 M2 R9 2_DDRC1234 0.1uF
VDD_8 B-MBA0 BA0 VDD_9
R9 M2 B-MCK N8 2_DDRC1235 0.1uF

2_DDR
C1214 0.1uF A-MBA0 A-MCK B-MBA1
VDD_9 BA0 BA1
R1235

N8 F13 G20 M3 2_DDRC1236 0.1uF

56
R1237
C1215 0.1uF A-MBA1 A-MBA0 B-MBA0 B-MBA2
1%

BA1 A_DDR3_BA[0] B_DDR3_BA[0] BA2

1%
M3 B15 F24 2_DDRC1240 A1
56

C1216 0.1uF A-MBA2 A-MBA1 B-MBA1


BA2 A_DDR3_BA[1] B_DDR3_BA[1] VDDQ_1
A1 C1209 E13 F20 J7 A8
VDDQ_1 A-MBA2 A_DDR3_BA[2] B_DDR3_BA[2] B-MBA2 0.01uF CK VDDQ_2
R1236

A8 J7 K7 C1

56
R1238
2_DDR
0.01uF 50V
1%

VDDQ_2 CK CK VDDQ_3

1%
C1 K7 50V C17 G25 K9 C9
56

VDDQ_3 CK A-MCK A_DDR3_MCLK B_DDR3_MCLK B-MCK B-MCKE CKE VDDQ_4


C9 K9 A17 G23 B-MCKB D2
VDDQ_4 CKE A-MCKE A-MCKB A_DDR3_MCLKZ B_DDR3_MCLKZ B-MCKB VDDQ_5
D2 B16 F25 L2 E9
VDDQ_5 A-MCKB A-MCKE A_DDR3_MCLKE B_DDR3_MCLKE B-MCKE CS VDDQ_6
E9 L2 K1 F1
VDDQ_6 CS B-MODT ODT VDDQ_7
F1 K1 J3 H2
VDDQ_7 ODT A-MODT AVDD_DDR0 B-MRASB RAS VDDQ_8
H2 J3 E14 D20 K3 H9
VDDQ_8 RAS A-MRASB AVDD_DDR0 A-MODT A_DDR3_ODT B_DDR3_ODT B-MODT B-MCASB CAS VDDQ_9
H9 K3 B12 B25 L3
VDDQ_9 CAS A-MCASB R1231 A-MRASB A_DDR3_RASZ B_DDR3_RASZ B-MRASB R1232 B-MWEB WE
L3 A12 B24 10K J1
WE A-MWEB 10K A-MCASB A_DDR3_CASZ B_DDR3_CASZ B-MCASB NC_1
J1 C12 A24 T2 J9
NC_1 A-MWEB A_DDR3_WEZ B_DDR3_WEZ B-MWEB 2_DDR B-MRESETB RESET NC_2
J9 T2 L1
NC_2 RESET A-MRESETB NC_3
L1 F11 E20 L9
NC_3 A-MRESETB A_DDR3_RESET B_DDR3_RESET B-MRESETB NC_4
L9 F3 T7
NC_4 B-MDQSL DQSL NC_6 B-MA14
T7 F3 G3
A-MA14 NC_6 DQSL A-MDQSL B-MDQSLB DQSL
G3 B19 K24
DQSL A-MDQSLB A-MDQSL A_DDR3_DQSL B_DDR3_DQSL B-MDQSL
C18 K25 C7 A9
A-MDQSLB A_DDR3_DQSLB B_DDR3_DQSLB B-MDQSLB B-MDQSU DQSU VSS_1
A9 C7 B7 B3
VSS_1 DQSU A-MDQSU B-MDQSUB DQSU VSS_2
B3 B7 B18 J21 E1
VSS_2 DQSU A-MDQSUB A-MDQSU A_DDR3_DQSU B_DDR3_DQSU B-MDQSU VSS_3
E1 A18 J20 E7 G8
VSS_3 A-MDQSUB A_DDR3_DQSUB B_DDR3_DQSUB B-MDQSUB B-MDML DML VSS_4
G8 E7 D3 J2
VSS_4 DML A-MDML B-MDMU DMU VSS_5
J2 D3 E15 H24 J8
VSS_5 DMU A-MDMU A-MDML A_DDR3_DQML B_DDR3_DQML B-MDML VSS_6
J8 A21 L20 E3 M1
VSS_6 A-MDMU A_DDR3_DQMU B_DDR3_DQMU B-MDMU B-MDQL0 DQL0 VSS_7
M1 E3 F7 M9
VSS_7 DQL0 A-MDQL0 B-MDQL1 DQL1 VSS_8
M9 F7 D17 L23 F2 P1
VSS_8 DQL1 A-MDQL1 A-MDQL0 A_DDR3_DQL[0] B_DDR3_DQL[0] B-MDQL0 B-MDQL2 DQL2 VSS_9
P1 F2 G15 J24 F8 P9
VSS_9 DQL2 A-MDQL2 A-MDQL1 A_DDR3_DQL[1] B_DDR3_DQL[1] B-MDQL1 B-MDQL3 DQL3 VSS_10
P9 F8 B21 L24 H3 T1
VSS_10 DQL3 A-MDQL3 A-MDQL2 A_DDR3_DQL[2] B_DDR3_DQL[2] B-MDQL2 B-MDQL4 DQL4 VSS_11
T1 H3 F15 J23 H8 T9
VSS_11 DQL4 A-MDQL4 A-MDQL3 A_DDR3_DQL[3] B_DDR3_DQL[3] B-MDQL3 B-MDQL5 DQL5 VSS_12
T9 H8 B22 M24 G2
VSS_12 DQL5 A-MDQL5 A-MDQL4 A_DDR3_DQL[4] B_DDR3_DQL[4] B-MDQL4 B-MDQL6 DQL6
G2 F14 H23 H7
DQL6 A-MDQL6 A-MDQL5 A_DDR3_DQL[5] B_DDR3_DQL[5] B-MDQL5 B-MDQL7 DQL7
H7 A22 M23 B1
DQL7 A-MDQL7 A-MDQL6 A_DDR3_DQL[6] B_DDR3_DQL[6] B-MDQL6 VSSQ_1
B1 D15 K23 D7 B9
VSSQ_1 A-MDQL7 A_DDR3_DQL[7] B_DDR3_DQL[7] B-MDQL7 B-MDQU0 DQU0 VSSQ_2
B9 D7 C3 D1
VSSQ_2 DQU0 A-MDQU0 B-MDQU1 DQU1 VSSQ_3
D1 C3 G16 G21 C8 D8
VSSQ_3 DQU1 A-MDQU1 A-MDQU0 A_DDR3_DQU[0] B_DDR3_DQU[0] B-MDQU0 B-MDQU2 DQU2 VSSQ_4
D8 C8 B20 L22 C2 E2
VSSQ_4 DQU2 A-MDQU2 A-MDQU1 A_DDR3_DQU[1] B_DDR3_DQU[1] B-MDQU1 B-MDQU3 DQU3 VSSQ_5
E2 C2 F16 H22 A7 E8
VSSQ_5 DQU3 A-MDQU3 A-MDQU2 A_DDR3_DQU[2] B_DDR3_DQU[2] B-MDQU2 B-MDQU4 DQU4 VSSQ_6
E8 A7 C21 K20 A2 F9
VSSQ_6 DQU4 A-MDQU4 A-MDQU3 A_DDR3_DQU[3] B_DDR3_DQU[3] B-MDQU3 B-MDQU5 DQU5 VSSQ_7
F9 A2 E16 H20 B8 G1
VSSQ_7 DQU5 A-MDQU5 A-MDQU4 A_DDR3_DQU[4] B_DDR3_DQU[4] B-MDQU4 B-MDQU6 DQU6 VSSQ_8
G1 B8 A20 L21 A3 G9
VSSQ_8 DQU6 A-MDQU6 A-MDQU5 A_DDR3_DQU[5] B_DDR3_DQU[5] B-MDQU5 B-MDQU7 DQU7 VSSQ_9
G9 A3 D16 H21
VSSQ_9 DQU7 A-MDQU7 A-MDQU6 A_DDR3_DQU[6] B_DDR3_DQU[6] B-MDQU6
C20 K21
A-MDQU7 A_DDR3_DQU[7] B_DDR3_DQU[7] B-MDQU7

DDR_1600_1G_HYNIX DDR_1600_1G_HYNIX DDR_1600_1G_NANYA DDR_1600_1G_NANYA DDR_1600_2G_SS DDR_1600_2G_SS DDR_1600_2G_HYNIX DDR_1600_2G_HYNIX DDR_1600_2G_NANYA DDR_1600_2G_NANYA
IC1201-*1 IC1202-*1 IC1201-*2 IC1202-*2 IC1201-*3 IC1202-*3 IC1201-*4 IC1202-*4 IC1201-*5 IC1202-*5
H5TQ1G63EFR-PBC H5TQ1G63EFR-PBC NT5CB64M16DP-DH NT5CB64M16DP-DH K4B2G1646E-BCK0 K4B2G1646E-BCK0 H5TQ2G63DFR-PBC H5TQ2G63DFR-PBC NT5CB128M16FP-DI NT5CB128M16FP-DI
EAN61829003 EAN61829003 EAN61859501 EAN61859501 EAN61848802 EAN61848802 EAN61829203 EAN61829203 EAN61859702 EAN61859702
N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8 N3 M8
A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA A0 VREFCA
P7 P7 P7 P7 P7 P7 P7 P7 P7 P7
A1 A1 A1 A1 A1 A1 A1 A1 A1 A1
P3 P3 P3 P3 P3 P3 P3 P3 P3 P3
A2 A2 A2 A2 A2 A2 A2 A2 A2 A2
N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1 N2 H1
A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ
P8 P8 P8 P8 P8 P8 P8 P8 P8 P8
A4 A4 A4 A4 A4 A4 A4 A4 A4 A4
P2 P2 P2 P2 P2 P2 P2 P2 P2 P2
A5 A5 A5 A5 A5 A5 A5 A5 A5 A5
R8 L8 R8 L8 R8 L8 R8 L8 R8 L8 R8 L8 R8 L8 R8 L8 R8 L8 R8 L8
A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ A6 ZQ
R2 R2 R2 R2 R2 R2 R2 R2 R2 R2
A7 A7 A7 A7 A7 A7 A7 A7 A7 A7
T8 T8 T8 T8 T8 T8 T8 T8 T8 T8
A8 A8 A8 A8 A8 A8 A8 A8 A8 A8
R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2 R3 B2
A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1
L7 D9 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9 L7 D9
A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2
R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7 R7 G7
A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3
N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2 N7 K2
A12/BC VDD_4 A12/BC VDD_4 A12 VDD_4 A12 VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4
T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8 T3 K8
NC_7 VDD_5 NC_7 VDD_5 NC_6 VDD_5 NC_6 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5
N1 N1 N1 N1 N1 N1 N1 N1 N1 N1
VDD_6 VDD_6 VDD_6 VDD_6 VDD_6 VDD_6 VDD_6 VDD_6 VDD_6 VDD_6
M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9 M7 N9
NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_6 VDD_7 NC_6 VDD_7
R1 R1 R1 R1 R1 R1 R1 R1 R1 R1
VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8 VDD_8
M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9 M2 R9
BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9
N8 N8 N8 N8 N8 N8 N8 N8 N8 N8
BA1 BA1 BA1 BA1 BA1 BA1 BA1 BA1 BA1 BA1
M3 M3 M3 M3 M3 M3 M3 M3 M3 M3
BA2 BA2 BA2 BA2 BA2 BA2 BA2 BA2 BA2 BA2
A1 A1 A1 A1 A1 A1 A1 A1 A1 A1
VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1 VDDQ_1
J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8 J7 A8
CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2
K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1 K7 C1
CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3
K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9 K9 C9
CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4
D2 D2 D2 D2 D2 D2 D2 D2 D2 D2
VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5 VDDQ_5
L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9 L2 E9
CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6
K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1 K1 F1
ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7
J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2 J3 H2
RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8
K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9 K3 H9
CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9
L3 L3 L3 L3 L3 L3 L3 L3 L3 L3
WE WE WE WE WE WE WE WE WE WE
J1 J1 J1 J1 J1 J1 J1 J1 J1 J1
NC_1 NC_1 NC_1 NC_1 NC_1 NC_1 NC_1 NC_1 NC_1 NC_1
T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9
RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2
L1 L1 L1 L1 L1 L1 L1 L1 L1 L1
NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3
L9 L9 L9 L9 L9 L9 L9 L9 L9 L9
NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4
F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7
DQSL NC_6 DQSL NC_6 DQSL NC_7 DQSL NC_7 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_5 DQSL NC_5
G3 G3 G3 G3 G3 G3 G3 G3 G3 G3
DQSL DQSL DQSL DQSL DQSL DQSL DQSL DQSL DQSL DQSL

C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3