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TITLE : HV260WX1-100
Product Specification
Rev. O
REVISION HISTORY
REV. ECN NO. DESCRIPTION OF CHANGES DATE PREPARED
P0 - Initial Release 05.12.13 Y. J. Yoon
P1 1. Timing change. 06.07.25 Y. J. Yoon
1) On page7 ;
Hsync, Vsync, main clock frequency
2) On page12 ;
Clock period, clock frequency, horizontal
signal, Horizontal active display term,
Vertical active display term
2. Electrical characteristics
1) On page7 ; Inrush current
2) On page15 ; Power sequence
3) On page8 ; Inverter Spec.
Add PWM dimming control
3.Color coordinate spec change
0.3 0.03
O - Initial Release 06.08.21 Y. J. Yoon
Contents
No ITEM Page
REVISIONS HISTORY 2
CONTENTS 3
1 GENERAL DESCRIPTION 4
1.1 Introduction
1.2 Features
1.3 Applications
1.4 General Specification
2 ABSOLUTE MAXIMUM RATINGS 6
3 ELECTRICAL SPECIFICATIONS
3.1 TFT LCD Module
3.2 Inverter
4 INTERFACE CONNECTION 9
4.1 Module Input Signal & power
4.2 LVDS Interface
4.3 Inverter Input Signal & Power
5 SIGNAL TIMING SPECIFICATIONS 12
5.1 Timing Parameter
5.2 Signal Timing Waveform
5.3 Input Signals, Basic Display Colors & Cray Scale Of Colors
5.4 Power Sequence
6 OPTICAL SPECIFICATIONS 16
7 MECHANICAL CHARACTERISTICS 18
8 RELIABLITY 19
9 PRODUCT SERIAL NUMBER 20
10 PACKING 21
11 HANDING & CAUTIONS 23
12 APPENDIX 24
1.1 Introduction
HV260WX1-100 is a color active matrix TFT LCD module using amorphous silicon TFT's
(Thin Film Transistors) as an active switching devices. This module has a 26.0 inch diagonally
measured active area with WXGA resolutions (1366 horizontal by 768 vertical pixel array).
Each pixel is divided into RED, GREEN, BLUE dots which are arranged in vertical stripe and
this module can display 16.7M colors. The TFT-LCD panel used for this module is adapted for a
low reflection and higher color type.
LVDS S1 S1366
G1
Gate Driver Circuit
5pair
CN Timing Controller
(30pin)
(LVDS Rx + RSDS)
+5.0V TFT - LCD Panel
(1366 RGB 768 pixels)
G768
Power Circuit
Block
+24V Back light Assembly
CN2 Inverter 2pin x 16CNs ( U Type_8CCFL)
GND (14Pin) Block (High)
1.2 Features
1.3 Application
The followings are maximum values which, if exceed, may cause faulty operation or
damage to the unit. The operational and non-operational maximum voltage and current
values are listed in Table 2.
< Table 2. LCD Module Electrical Specifications > [VSS=GND=0V]
Note : 1) Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39 OC max. and no condensation of water.
100
90 (39, 90)
80
Relative Humidity (%RH)
60
40
20
S to ra g e R a n g e
5
-2 0 0 20 40 60 80
T e m p e ra tu re (
C)
Values
Parameter Symbol Unit Notes
Min Typ Max
Power Supply Input Voltage VDD 4.5 5.0 5.5 Vdc
Power Supply Current IDD - 1.0 1.2 A 1
Power Consumption PLCD 5.0 6.0 Watt
Vertical Signal Frequency fV 47 60 63 Hz
Horizontal Signal Frequency fH 39.4 47.4 53 KHz
Main Clock Frequency PLCD 80.4 85 MHz
Rush current IRUSH - - 3.0 A 2
Notes : 1. The supply voltage is measured and specified at the interface connector of LCM.
The current draw and power consumption specified is for VDD=5.0V, Frame rate=60Hz and
Clock frequency = 80MHz. Test Pattern of power supply current
a) Typ : Black Pattern
b) Max : Sub Dot Pattern
2. The duration of rush current is about 2ms and rising time of Power Input is 1ms(min)
3.2 Inverter
Notes: 1.The specified current and power consumption are under the typical supply Input voltage, 24V.
2. High-duty = On/(On+Off) * 100
On Off
3. The life time of a Lamp, 50,000Hrs, is determined as the time at which luminance of the lamp is 50%
value at the typical lamp current on condition of continuous operating at 25 2C.
Notes : 1. N*(Not Connected) : This pins are only used for BOE OT internal operations.
2. Input Level of LVDS signal is based on the IEA 664 Standard.
3. OPT* (LVDS Option) : This pin is used for selecting LVDS signal data format.
If this Pin : High (3.3V) Normal NS LVDS format
Otherwise : Low (GND) or Open (NC) JEIDA LVDS format
Sequence : On = Vdd LVDS Option Interface signal
Off = Interface signal LVDS Option Vdd
1 FI-E30S (JAE) 30
S14B-PH-SM3-TB B4B-ZR-SM3A-TF
(JST : Japan Solderless Terminal Co.,Ltd.) (JST : Japan Solderless Terminal Co.,Ltd.)
Notes: This product is DE only mode. The input of Hsync & Vsync signal does not have an effect on normal operation.
tCLK
DCLK 0.5 VDD
Valid data
First data Invalid data Pixel data Pixel data Invalid data
Valid data
Second data Invalid data Pixel data Pixel data Invalid data
DE(Data Enable)
tH
HSync
tHV
DE(Data Enable)
tV
VSync
tVV
DE(Data Enable)
5.3 Input Signals, Basic Display Colors & Gray Scale Of Colors
To prevent a latch-up or DC operation of the LCD module, the power on/off sequence
shall be as shown in below
0.9VDD 0.9VDD
Power Supply 0.1VDD 0.1VDD
0V
T1
T5 T6
T2
Valid
Interface Signal
( Input Data ) 0V
T3 T4
Inverter Signal
( B/L On/Off ) 0V
Values
Parameter Units
Min Typ Max
T1 0.5 - 10 ms
T2 0.5 - 50 ms
T3 600 - - ms
T4 100 - - ms
T5 0.5 - 50 ms
T6 3.0 - - s
Notes:
1. When the power supply VDD is 0V, Keep the level of input signals on
the low or keep high impedance.
2. Do not keep the interface signal high impedance when power is on.
3. Back Light must be turn on after power for logic and interface signal are valid.
Note :
1. Viewing angle is the angle at which the contrast ratio is greater than 10. The viewing are
determined for the horizontal or 3, 9 oclock direction and the vertical or 6, 12 oclock
direction with respect to the optical axis which is normal to the LCD surface.
2. Contrast measurements shall be made at viewing angle of = 0 and at the center of the LCD
surface. Luminance shall be measured with all pixels in the view field set first to white, then
to the dark (black) state. (See FIGURE 1 shown in Appendix) Luminance Contrast Ratio
(CR) is defined mathematically.
3. Center Luminance of white is defined as the LCD surface. Luminance shall be measured with
all pixels in the view field set first to white. This measurement shall be taken at the locations
shown in FIGURE 2 for a total of the measurements per display.
4. The White luminance uniformity on LCD surface is then expressed as :
Y = ( Minimum Luminance of 9points / Maximum Luminance of 9points ) * 100
(See FIGURE 2 shown in Appendix).
5. The color chromaticity coordinates specified in Table 4. shall be calculated from the spectral
data measured with all pixels first in red, green, blue and white. Measurements shall be made
at the center of the panel.
6. The electro-optical response time measurements shall be made as FIGURE 3 shown in
Appendix by switching the data input signal ON and OFF. The times needed for the
luminance to change from 10% to 90% is Td, and 90% to 10% is Tr.
FIGURE 6 (located in Appendix) shows mechanical outlines for the model HT170EX1-100.
Other parameters are shown in Table 5.
7.2 Mounting
See FIGURE 5. (shown in Appendix)
The Reliability test items and its conditions are shown in below.
Period : X, Y, Z 30 min
HV260WX1-100
Packing BOX
Cushion PAD
Cushion Middle
Cushion PAD
Pallet
HV260WX1- ### 3
0000000000000 2005.11.22.
00 0 0 00 0 0 00000
Type Grade Line Year Month ITEM-CODE Serial_no
FG CODE
12.0 APPENDIX
(L = 5 0 c m )
Tr Tf
E lectro - O p tical
R esp o nse
100%
90%
10%
0%
Tim e