Department of Electrical and Computer Engineering

Howard University

Washington, DC 20059

EECE 312: Fundamentals of Electronics & SS Devices Lab

Lab6: NMOS Field Effect Transistors: NMOS I Characteristics

Submitted by:

Group V

Olaniyi Nafiu

Maxime Keita

Instructor: Dr. Bofah

Date Assigned: 10/12/16 Date Submitted: 10/28/16
Summary/Abstract:
In this experiment we will look at the characteristics of NMOS transistor. When a voltage is
applied to the gate and the gate voltage is larger than the threshold voltage Vth, the MOSFET
turns on and a current flow from VDD, causing a voltage drop across the 100ohms resistor. The
NMOS behaves as a linear resistance (rDS) for small values of drain-source voltage. rDS
approaches infinity as VGS decreases. This allow the transistor to act as a switch. For small
VGS, it does not conduct as rDS is very high and it starts to conduct as VGS increases due to
decrease in rDS. The NMOS also acts as an amplifier when it is in the saturation region.
Introduction:
The MOSFET is a three-terminal semiconductor device. Three-terminal devices are far more
useful than two-terminal ones because they can be used in a multitude of applications, ranging
from signal amplification to digital logic and memory. The basic principle involved is the use of
the voltage between two terminals to control the current flowing in the third terminal. In this
way, a three-terminal device can be used to realize a controlled source. Also, the control signal
can be used to cause the current in the third terminal to change from zero to a large value, thus
allowing the device to act as a switch. The n-channel MOSFET, also called NMOS transistor is
one type of MOSFET.
Problem statement/Objective:
The purpose of this lab is to study:
i. I-V characteristics of a NMOS transistor
ii. NMOS as a switch
Analysis/Theory:
Regions of operation
i. Triode region
I D =K n
W
L [
(
1
V GSV t ) V DS V 2DS
2 ]
For V DS <V GSV t ,VGSVt > 0
ii. Saturation region
1 W
I D = K n [ ( V GSV t ) ]
2
2 L
For V DS >V GSV t ,VGSVt > 0

At the boundary between triode and saturation regions, neglecting channel length modulations
effect:
V Dsmin =V DS=V GSV t
From eq.1, for small drain source voltage (near the origin of i-v plot) the characteristics exhibit
drain source resistance given by
1 1
ID
r DS=
( ) [
V DS
= k ,n
W
( V V t )
L GS ]
The transistor is off when
V GS <V t

It is on, (there is conduction i > 0) when

Approach:
1. Set up figure 5.27 a, use RD=100-ohms, fix vgs vt, vary VDD in steps, see table below,
record, vgs, vDD, vDS, Vt and type NMOS, calculate iD at each step.
2. Set gate source voltage at values shown in the table, vary drain source voltage in steps
and record drain current. See above
Figure 5.27 a

Applications:
NMOS Type,
RD= 100 Ohms = 0.1k-Ohms
VGS - Gate source VDD- Supply VDS - Drain Source ID - Drain Current
Voltage (V) Voltage (V) Voltage (V) (mA)
V GS volts V DD volts V DS =v o volts V V DS
i D = DD mA
RD
 0.00 0 0
V GS = 1V 0.25 0.24 0.1
0.50 0.49 0.1
1.00 0.989 0.11
1.50 1.488 0.12
2.00 1.988 0.12
5.00 4.985 0.15
8.00 7.982 0.18
V GS = 1V
12.00 11.98 0.2
0.00 0 0
0.25 0.239 0.11
0.50 0.489 0.11
1.00 0.989 0.11
1.50 1.488 0.12
V GS = 2V 2.00 1.987 0.13
5.00 4.985 0.15
8.00 7.982 0.18
12.00 11.98 0.2
0.00 0 0
0.25 0.024 2.26
0.50 0.051 4.5
1.00 0.123 8.77
V GS = 3V 1.50 0.255 12.45
2.00 0.844 11.56
5.00 3.171 18.29
8.00 5.215 27.85
12.00 7.851 41.49
0.00 0 0
0.25 0.0095 2.405
0.50 0.01941 4.8059
1.00 0.0394 9.606
1.50 0.05963 14.4037
V GS = 4V 2.00 0.08012 19.1988
5.00 0.21 47.9
8.00 0.37 77
12.00 0.65 113.5
0.00 0 0
0.25 0.00769 2.4231
0.50 0.01569 4.8431
1.00 0.03164 9.6836
V GS = 5V 1.50 0.04764 14.5236
2.00 0.06379 19.3621
5.00 0.165 48.35
 8.00 0.28 77.2
12.00 0.47 115.3
Analysis
a. For each vGS, on the graph plot iD versus vDS
b. Draw in boundary of separation between the triode saturation regions
c. For each vGS find the drain source resistance near the origin. Hint: draw tangential lines
to each curve and determine rDS from the slope
' W
Determine the constant term k n L thecurves

d. In the saturation region, plot drain current iD versus vGS and determine Vt. Compare it
with data sheet value
e. Plot V0= (vGS), versus Vi (= vG). See fig 5.27
f. From the plot determine the transistor as a switch region, and the transistor as an
amplifier region.
Results:

ID VS VGS
140
VGS = 120
1V VGS = 2V VGS = 3V VGS = 4V VGS = 5V
100
80
ID (mA) 60
40
Boudary20
of Separation
0
0 2 4 6 8 10 12 14

VDS (V)

1
c. The drain source resistance r DS= Slope . The slope of each VGS is estimated from the

graph above.
V GS (V ) r DS (Ohms)

1 2400
2 2173
 3 15.21
4 4.18
5 3.3
d. To get a better estimate of Vt, we decided to determine the values of VDS and ID for a constant
VDD. Using more values allow for better accuracy.
For VDD = 8V

VGS - Gate source VDD- Supply Voltage VDS - Drain Source ID - Drain Current
Voltage (V) (V) Voltage (V) (mA)
V GS volts V DD volts V DS =v o volts V V DS
i D = DD mA
RD
0.00 8.00 8.012 0
0.25 8.00 8.012
0
0.50 8.00 8.012 0
1.00 8.00 8.012 0
1.50 8.00 8.012 0
2.00 8.00 7.520 0.48
2.25 8.00 7.204 7.96
2.50 8.00 6.708 12.92
3.00 8.00 5.448 25.52
 ID Vs VGS
30

25

20

ID (mA) 15

10

0 0
0 0.5 1 1.5 2 2.5 3 3.5

VGS (V)

The estimated value of Vt from the graph above is 2V. This value is within the range given in the
datasheet (0.8 3) V.
W
Using the triode region equation and the estimated value of Vt, the value of kn ' L can be

determined. Given ID = 41.49mA when VDS = 7.851V for VGS = 3V

W
i D =kn ' ( V V t ) V DS
L GS

W
41.49=kn ' (32)7.851
L

W
k n' =5.285 mA /V 2
L
 VDS Vs VG
2.5

1.5
VDD = 2V
VDS (V) VDD = 1V
VDD = 0.25V
1

0.5

0
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5

VG (V)

The switch region is 1V to 2V (i.e. the switch is on for VGS > 2v) while the amplifier region is
from 2V to 4V (active region)
Conclusion:
We were able study the characteristics of a NMOS transistor and NMOS as a switch. One can
conclude that by noting that with VDS kept small, the MOSFET behaves as a linear resistance
rDS whose value is controlled by the gate voltage VGS. And as VGS decreases, rDS in increases.
This is evident in the table shown above with gives the values of rDS for the corresponding
values of VGS. In other words, rDS approaches infinity as VGS decreases. This allow the
transistor to act as a switch. For small VGS, it does not conduct as rDS is very high and it starts
to conduct as VGS increases due to decrease in rDS. From the data derived experimentally, the
value of the threshold voltage, Vt was estimated as 2V. This agrees with the values recorded in
the datasheet for the 2N7000 transistor. According to the datasheet, the threshold voltage should
be between 0.8V and 3V. Since the estimated value of Vt is 2V, the experiment was carried out
W
correctly. The value of kn ' L was determined to be 5.285 mA /V by using the triode
2

region equation and the estimated value of Vt (2V).

References:
Sedra/Smith, Microelectronic Circuit, seventh Ed., 2010 Chapter 5