You are on page 1of 55

ULTRA FAST ACTING ELECTRONIC CIRCUIT

BREAKER
CHAPTER 1

ABSTRACT

The steadily increasing population has more demand and consumption of electric energy in the
market as raised and that of equipments used like electrical and electronics are also costlier. So
to protect the electrical system from overload or short circuit here is one possibility, which is by
ultrafast acting electronic circuit breaker. A circuit breaker is automatic operated switch designed
to shut down the power supply when overloaded. The tripping depends on the current passing
through the CTs which is connected in series with load. It uses the PIC- microcontroller into
which program is dumped for the operation. The unit is extremely fast and over comes the
drawback of thermal type circuit breaker like MCB based on a thermal bimetal lever-trip
mechanism which is very slow. Here an electronic circuit breaker is designed which is based on
the current sensing across a series element typically a CT (current Transformer). The current
sensed which is compared against the preset value proportional to the voltage by comparator
which is inbuilt in PIC Micro controller to generate an output that drives a relay through a
MOSFET to trip the load very fastly.
CHAPTER 2

INTRODUCTION

In this project electrical system can be protected from the over load condition. Industrial
instruments or home appliances failures have many causes and one of the main causes is over
load. The primary of the distribution transformer or any other transformer is designed to operate
at certain specific current, if that current flowing through that instrument is more than the rated
current, then immediately the System may burn because of over load, through this project we are
going to protect the system from over load condition. In this project work for generating high
current or over load current more loads are applied to the circuit; so that the current will be
increased. Whenever the over current is drawn by load the circuit will be tripped. To trip the
circuit we are using one relay which will be controlled through PIC microcontroller. When over
load occurred the relay will trip the total circuit. And it will be monitored on the LCD. LCD
displays are used to display the status of circuit breaker. For protection from over current
condition first we have to measure the total load current. Here we are using CT for measuring the
load current and the output of CT is given to ADC for converting analog output of CT into digital
data. Hence ADC output is given for monitoring purpose. When current increases behind certain
limit then we are going to trip the load by using relay. In this project we are using 230v bulbs as
a load. We are going to increase the load by increasing the number of bulbs ON. When we ON
more bulbs it causes over load condition and microcontroller will detect that and it will trip the
total load by using relay through MOSFET which acts as switching circuit.
CHAPTER 3

BLOCK DIAGRAM
CHAPTER 4

COMPONENT DETAILS

4.1 Power supply unit

A power supply (sometimes known as a power supply unit or PSU) is a device or system
that supplies electrical or other types of energy to an output load or group of loads. The term is
most commonly applied to electrical energy supplies, less often to mechanical ones, and rarely to
others.

Transforme Rectifier Filter Regulato


r r

Fig4.1 Block diagram of power supply


110VDC

(AVERAGE
345V VOLTAGE WITH AC 110VDC
ROPPLE)
(PEAK TO PEAK)

RECTIFIER FILT REGULATO


TRANSFOR
BRIDGE ER R
MER
115VA

Fig 4.2 processing of power supply


The transformer steps up or steps down the input line voltage and isolates the power
supply from the power line. The RECTIFIER section converts the alternating current input signal
to a pulsating direct current. However, as you proceed in this chapter you will learn that
pulsating dc is not desirable. For this reason a FILTER section is used to convert pulsating dc to
a purer, more desirable form of dc voltage.

The final section, the REGULATOR, does just what the name implies. It maintains the
output of the power supply at a constant level in spite of large changes in load current or input
line voltages. Now that you know what each section does, let's trace an ac signal through the
power supply. At this point you need to see how this signal is altered within each section of the
power supply. Later on in the chapter you will see how these changes take place. An input signal
of 115 volts ac is applied to the primary of the transformer.

The transformer is a step-up transformer with a turns ratio of 1:3. You can calculate the
output for this transformer by multiplying the input voltage by the ratio of turns in the primary to
the ratio of turns in the secondary; therefore, 115 volts ac 3 = 345 volts ac (peak-to- peak) at the
output. Because each diode in the rectifier section conducts for 180 degrees of the 360-degree
input, the output of the rectifier will be one-half, or approximately 173 volts of pulsating dc. The
filter section, a network of resistors, capacitors, or inductors, controls the rise and fall time of the
varying signal; consequently, the signal remains at a more constant dc level. You will see the
filter process more clearly in the discussion of the actual filter circuits. The output of the filter is
a signal of 110 volts dc, with ac ripple riding on the dc. The reason for the lower voltage
(average voltage) will be explained later in this chapter. The regulator maintains its output at a
constant 110-volt dc level, which is used by the electronic equipment (more commonly called the
load).

4.1.1 Simple 5V power supply for digital circuits

Brief description of operation: Gives out well regulated +5V output, output current
capability of 100 mA
Circuit protection: Built-in overheating protection shuts down output when regulator IC
gets too hot

Circuit complexity: Very simple and easy to build

Circuit performance: Very stable +5V output voltage, reliable operation

Availability of components: Easy to get, uses only very common basic components

Design testing: Based on datasheet example circuit, I have used this circuit successfully
as part of many electronics projects

Applications: Part of electronics devices, small laboratory power supply

Power supply voltage: Unregulated DC 8-18V power supply

Power supply current: Needed output current + 5 mA

Component costs: Few dollars for the electronics components + the input transformer
cost

4.2 PIC Microcontroller - PIC16F877A

The PIC microcontroller [10] is used to interface the energy measurement unit and GSM
module. The PIC microcontroller used here is PIC16F877A.

Features:

Only 35 instructions are used.


All are single cycle instruction except branch instruction.
Operating at DC 20 MHz clock input.
Timer-0 is an 8-bit timer/counter with 8-bit prescaler.
Universal Synchronous Asynchronous Receiver Transmitter (USART) with 9-bit
address detection.
Brown - out detection circuitry for Brown-out Reset (BOR).
1,000,000-erase/write cycle EEPROM memory.
Data EEPROM retention greater then 40 years.
Power saving SLEEP mode.
Timer-0 Module

Counter mode is selected by setting bit T0CS (option reg). In counter mode, the timer- 0
will increment either on every raising or falling edge of pin RA4/T0CLK. The timer0 source
edge select bit, T0SE, determines the incrementing edge. Clearing bit TOSE selects the raising
edge. The prescaler is mutually exclusively shared between the timer-0 module and Watchdog
timer. The prescaler value is not readable or writeable. When no prescaler is used, the external
clock input is same as the prescaler output. The synchronization of T0CK1 with the internal
phase clock is accomplished by sampling the prescaler output on Q2 and Q4 cycles of the
internal phase clocks. Therefore it is necessary for T0CLK to be high for at least 2Tosc and low
at least 2Tosc.

Universal Synchronous Asynchronous Receiver Transmitter (USART)

The USART is two serial I/O modules. The USART can be configured as a full duplex
asynchronous system that can communicate with peripheral devices or as a half duplex
synchronous system in master or slave mode. Bit SPEN i.e. RCSTA and bit TRISC have to be set
in order to configure pins RC6/TX/CK and RC7/RX/DT as the USART. The USART module
also has a multi-processor communication capability using 9-bit address detection. The BRG
support both the synchronous and asynchronous mode of the USART. It is dedicated 8-bit baud
rate generator. The SPBRG register controls the period of a free running 8-bit timer. In
asynchronous mode, bit BRGH controls the baud rate. In synchronous mode, bit BRGH is
ignored. It is advantageous to use high baud rate for low baud clocks.

USART in Asynchronous Mode

In this mode the USART uses standard Non-return-to zero format. The most common
data format is 8-bit. The USART transmits and receives the LSB first. The transmitter and
receiver functionality are independent, but use the same data format and baud rate. This mode is
selected by clearing bit SYNC (TRISA).

In transmitter the TXREG register is loaded with data. The TSR register is not loaded
until the STOP bit has been transmitted from the previous load. As soon as the STOP bit is
transmitted, the TSR is loaded with new data from TXREG register. Once the TXREG register
transfer the data to the TSR register, the TXREG register is empty and flag bit TXIF is set.

The interrupt can be enabled/ disabled by setting/clearing-enabled bit TXIE. Flag bit
TXIF will be set, regardless of the state of enable bit TXIE and cannot be cleared in software. It
will reset only when new data is loaded into the TXREG register. While flag bit TXIF indicates
the status of the TXREG register, another bit TRMT shows the status of TSR register. The status
bit TRMT is read only bit, which is set when the TSR register is empty. Setting enable bit TXEN
enables the transmission. The actual transmission will not occur until the TXREG has been
loaded with data and the baud rate generator (BRG) has produced a shift clock. First loading the
TXREG register then setting enable bit TXEN can also start the transmission.

In reception the data is received on the RC7/RX pin and drives the data recovery block.
In the receiver side the data is received serially in shift register. The main block in receiver is
receiver shift register (RSR). After sampling the STOP bit, the received data in the RSR is
transformed to RCREG register. If the transfer of data is completed, flag bit RCIF is set. The
actual interruption can be enabled / disabled by setting/clearing enable bit RCIE. RCIF register is
cleared when the RCREG has been read and is empty. RCREG is a double-buffered register. It is
possible for two bytes of data to be received and transferred to RCREG FIFO and then shifted to
the RSR register. On the detection of the STOP bit, if the RCREG register is still full, the overrun
error bit OERR will be set. The word in the RSR will be lost. Overrun bit OERR has to be
cleared in the software. This is done by setting the receive logic. If the OERR is set, transfer
from the RSR register to the RCREG is inhibited, and no further data will be received. It is
essential to clear OERR bit if it is set. Framing error bit is set if a stop bit is detected as a clear.
Bit FERR and the 9th receive bit are buffered as the same way as the receive data.

RS 232 Communication

To allow compatibly among data communication equipment made by various


manufacturers, an interfacing standard called RS232 was set by the Electronics Industries
Association (EIA). It was modified and called RS232. It is most widely used for serial I/O
interfacing standard. This standard is used for communicating between PIC microcontroller and
GSM module. In this standard, a 1 is represented by -3 to -15V, while a 0 bit is +3 to +25V,
making -3 to +3 undefined. For this reason, to connect any RS232 to a microcontroller system
we must use voltage converter such as MAX 232 to convert the TTL logic levels to the RS232
voltage level, and vice versa.

4.4.1.3 I2C Master Mode Reception

Programming the Receive Enable bit, RCEN, enables master mode reception. The baud
rate generator begins counting, and on each rollover, the state of the SCL pin changes (high to
low/ low to high), and data is shifted into the SSPSR. After the falling edge of the eighth clock,
the receive enable flag is automatically cleared, the contents of the SSPSR are loaded into the
SSPBUF, the BF flag is set, the SSPIF is set, and the baud rate generator is suspended from
counting, holding SCL low. The SSP is now in IDLE state, awaiting the next command. When
the CPU reads the buffer, the BF flag is automatically cleared. The user can then send an
Acknowledge bit at the end of reception, by setting the Acknowledge Sequence Enable bit,
ACKEN.

BF Status Flag

In a receive operation, BF is set when an address or data byte is loaded into SSPBUF
from SSPSR. It is cleared when SSPBUF is read.

SSPOV and WCOL Status Flag

In receive operation, SSPOV is set when 8 bits are received into the SSPSR, and the BF
flag is already set from a previous reception. If the user writes the SSPBUF when a receive
operation is already in progress, then WCOL is set and the contents of the buffer are unchanged
(the write doesnt occur).

Acknowledge Sequence Timing

Setting the Acknowledge Sequence Enable bit, ACKEN, enables an Acknowledge


sequence. When this bit is set, the SCL pin is pulled low and the contents of the Acknowledge
data bit is presented on the SDA pin. If the user wishes to generate an Acknowledge, the
ACKDT bit should be cleared. If not, the user should set the ACKDT bit before starting an
Acknowledge sequence.

The baud rate generator then counts for one rollover period (TBRG), and the SCL pin is
de-asserted high. When the SCL pin is sampled high (clock arbitration) means, the baud rate
generator counts for TBRG. The SCL pin is then pulled low. Following this, the ACKEN bit is
automatically cleared, the baud rate generator is turned off, and the SSP module then goes into
IDLE mode.
Stop Condition Timing

A STOP bit is asserted on the SDA pin at the end of receive /transmit by setting the Stop
Sequence Enable bit, PEN. At the end of receive / transmit, the SCL line is held low after the
falling edge of the ninth clock. When the PEN bit is set, the master will assert the SDA line low.
When the SDA line is sampled low, the baud rate generator is reloaded and counts down to 0.

When the baud rate generator times out, the SCL pin will be brought high, and one
TBRG (baud rate generator rollover count) later, the SDA pin will be de-asserted. When the
SDA pin is sampled high while SCL is high, the P bit is set. A TBRG later, the PEN bit is
cleared and the SSPIF bit is set.

LCD Module

The LCD used is HD44780 [9]. This used in parallel mode, which is connected to
port-D for data and port-E for control signal of LCD. The HD44780U dot-matrix liquid crystal
display controller and driver LSI displays alphanumeric. It can be configured to drive a dot-
matrix liquid crystal display under the control of a 4-bit or 8-bit microprocessor. Since all the
functions such as display RAM, character generator, and liquid crystal driver, required for
driving a dot-matrix liquid crystal display are internally provided on one chip, a minimal system
can be interfaced with this controller/driver.

A single HD44780U can display up to one 8-character line or two 8-character lines.
The HD44780U is suitable for any portable battery-driven product requiring low power
dissipation. The register of HD44780U has two 8-bit registers, an instruction register (IR) and a
data register (DR). The IR stores instruction codes, such as display clear and cursor shift, and
address information for display data RAM and character generator RAM. The IR can only be
written from the MPU. The DR temporarily stores data to be written into DDRAM or CGRAM
and temporarily stores data to be read from DDRAM or CGRAM.

Table 4.1 Register Selections

RS R/W Operation

0 0 IR writes as an internal operation


(display clear, etc.)

0 1 Read busy flag (DB7) and address


counter (DB0 to DB6)

1 0 DR writes as an internal operation (DR


to DDRAM or GRAM)

1 1 DR read as an internal operation


(DDRAM or CGRAM to DR)

The LCD module is first set in function set for 8 X 2 lines by passing 38 control word.
Then it is to be set in entry mode set by command sets cursor move direction and display shift
ON/OFF. There are 4 possible functions set command 04, 05, 06, and 07. This command changes
the direction the cursor moves by setting the address counter to increment or decrement. The
display should be cleared by passing 01 control word. In entry set mode, if we set

04 - Display shift OFF and decrement counter address.

05 Display shift ON and decrement counter address.

06 Display shift OFF and increment counter address.

07 Display shift ON and increment counter address.

To check the state of the busy flag and read the address counter

1. Set R/W Pin of the LCD HIGH (read from the LCD)
2. Select the instruction register by setting RS pin LOW

3. Enable the LCD by Setting the enable pin HIGH

4. The most significant bit of the LCD data bus is the state of the busy flag (1=Busy,
0=ready to accept instructions/data). The other bits hold the current value of the
address counter.

ON OFF CONTROL

The proposed system aims at performing automatic switching ON/OFF operation of the
street lights. Timed operations are done on the basis of programmed schedules using clock time.
When the clock time matches with the preprogrammed ON time means the street lights turns
ON. In the similar way when the clock time matches with the preprogrammed OFF time means
the street lights turns OFF.

DS1307 - Description

The DS1307 serial real-time clock (RTC) is a low-power, full binary-coded decimal
(BCD) clock /calendar plus 56 bytes of NV SRAM. Address and data are transferred serially
through an I2C, bidirectional bus. The clock/calendar provides seconds, minutes, hours, day,
date, month, and year information. The end of the month date is automatically adjusted for
months with fewer than 31 days, including corrections for leap year. The clock operates in either
the 24-hour or 12-hour format with AM/PM indicator. The DS1307 has a built-in power-sense
circuit that detects power failures and automatically switches to the backup supply. Timekeeping
operation continues while the part operates from the backup supply. Ds1307 is used for the
timing operations and the NVRAM in the DS1307 is used for storing the energy meter readings.

Features
RTC counts seconds, minutes, hours, date of the month, month, day of the week,
and year with leap-year compensation valid up to 2100.
56-byte battery-backed NV RAM for data storage.
2-wire serial interface.
Automatic power-fail detecting and switching circuitry.
Consumes less than 500nA in battery-backup mode

Detailed Description

The DS1307 [10] is a low-power clock/calendar with 56 bytes of battery-backed SRAM.


The clock/calendar provides seconds, minutes, hours, day, date, month, and year information.
The date at the end of the month is automatically adjusted for months with fewer than 31 days,
including corrections for leap year. The DS1307 operates as a slave device on the I 2C bus.
Implementing a START condition and providing a device identification code followed by a
register address obtain access. Subsequent register scan be accessed sequentially until a STOP
condition is executed. When VCC falls below 1.25 x VBAT, the device terminates an access in
progress and resets the device address counter. When VCC falls below VBAT, the device
switches into a low-current battery-backup mode. Upon power-up, the device switches from
battery to VCC when VCC is greater than VBAT + 0.2V and recognizes inputs when VCC is
greater than 1.25 x VBAT.

RTC and RAM Address Map

The RTC registers are located in address locations 00h to 07h. The RAM registers are
located in address locations 08h to 3Fh. During a multi byte access, when the address pointer
reaches 3Fh, the end of RAM space, it wraps around to location 00h, the beginning of the clock
space.

Clock and Calendar


The time and calendar information is obtained by reading the appropriate register bytes.
The time and calendar are set or initialized by writing the appropriate register bytes. The contents
of the time and calendar registers are in the BCD format. The day-of-week register increments at
midnight. Values that correspond to the day of week are user-defined but must be sequential (i.e.,
if 1 equals Sunday, then 2 equals Monday, and so on.). Bit 7 of Register 0 is the clock halt (CH)
bit. When this bit is set to 1, the oscillator is disabled. When cleared to 0, the oscillator is
enabled. The initial power-on state of all registers is not defined. Therefore, it is important to
enable the oscillator (CH bit = 0) during initial configuration. The DS1307 can be run in either
12-hour or 24-hour mode. Bit 6 of the hours register is defined as the12-hour or 24-hour mode-
select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit
with logic high being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20 to23 hours).

I2C Data Bus

The DS1307 supports the I2C protocol. A device that sends data onto the bus is defined as
a transmitter and a device receiving data as a receiver. The device that controls the message is
called a master. The devices that are controlled by the master are referred to as slaves. The bus
must be controlled by a master device that generates the serial clock (SCL), controls the bus
access, and generates the START and STOP conditions. The DS1307 operates as a slave on the
I2C bus.

1. Data transfer may be initiated only when the bus is not busy.
2. During data transfer, the data line must remain stable whenever the clock line is HIGH.
Changes in the data line while the clock line is high will be interpreted as control
signals.

Depending upon the state of the R/W bit, two types of data transfer are possible:
1. Data Transfer from a Master Transmitter to a Slave Receiver

The first byte transmitted by the master is the slave address. Next follows a number of
data bytes. The slave returns an acknowledge bit after each received byte. Data is transferred
with the most significant bit (MSB) first.

2. Data Transfer from a Slave Transmitter to a Master Receiver

The first byte (the slave address) is transmitted by the master. The slave then returns an
acknowledge bit. This is followed by the slave transmitting a number of data bytes. The master
returns an acknowledge bit after all received bytes other than the last byte. At the end of the last
received byte, a not acknowledge is returned. The master device generates the entire serial
clock pulses and the START and STOP conditions. A transfer is ended with a STOP condition or
with a repeated START condition. Since a repeated START condition is also the beginning of the
next serial transfer, the bus will not be released. Data is transferred with the most significant bit
(MSB) first.

Operating modes

The DS1307 may operate in the following two modes:

1. Slave Receiver Mode (Write Mode):


Serial data and clock are received through SDA and SCL. After each byte is received an
acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning
and end of a serial transfer. Hardware performs address recognition after reception of the slave
address and direction bit.

The slave address byte is the first byte received after the master generates the START
condition. The slave address byte contains the 7-bit DS1307 address, which is 1101000, followed
by the direction bit (R/W), which for a write is 0. After receiving and decoding the slave address
byte, the DS1307 outputs an acknowledgement on SDA. After the DS1307 acknowledges the
slave address + write bit, the master transmits a word address to the DS1307. This sets the
register pointer on the DS1307, with the DS1307 acknowledging the transfer.

The master can then transmit zero or more bytes of data with the DS1307 acknowledging
each byte received. The register pointer automatically increments after each data byte are written.
The master will generate a STOP condition to terminate the data write.

<Slave Add> <R/W><Word Add (n)> <Data (n)> <Data (n+1)> <Data (n+X)>

S 11010 0 A XXXXX A XXXXX A XXXXX A XXXXX A P


00 XXX XXX XXX XXX

S - Start

A - Acknowledge (ACK)

P - Stop

Master to slave

Slave to master

Data Transferred (X+1 Bytes + Acknowledge)

Figure 4.8 Data Write - Slave Receiver Mode


2. Slave Transmitter Mode (Read Mode):
The first byte is received and handled as in the slave receiver mode. However, in this
mode, the direction bit will indicate that the transfer direction is reversed. The DS1307 transmits
serial data on SDA while the serial clock is input on SCL. START and STOP conditions are
recognized as the beginning and end of a serial transfer.

The slave address byte is the first byte received after the master generates the START
condition. The slave address byte contains the 7-bit DS1307 address, which is1101000, followed
by the direction bit (R/W), which is 1 for a read. After receiving and decoding the slave address
the DS1307 outputs an acknowledgement on SDA.

The DS1307 then begins to transmit data starting with the register address pointed to by
the register pointer. If the register pointer is not written to before the initiation of a read mode the
first address that is read is the last one stored in the register pointer. The register pointer
automatically increments after each byte are read. The DS1307 must receive a Not Acknowledge
to end a read.

<Slave Add> <R/W> <Data(n)> <Data(n+1)> <Data(n+2)> <Data(n+X)>

S 11010 1 A XXXXX A XXXXX A XXXXX A XXXXX A P


00 XXX XXX XXX XXX

S - Start

A - Acknowledge (ACK)

P - Stop

A - Not Acknowledge (NACK)


Data transferred (x+1 bytes + acknowledge); last data byte is followed by a not acknowledge (a)
signal)

Master to slave

Slave to master

VCC
Figure 4.9 Data Read - Slave Transmitter Mode
SQW/OUT
C

SCL
The circuit diagram for interfacing the PIC microcontroller with the DS1307 is shown in
Figure 4.9. D
SDA
Figure 4.10 DS1307 Interface with PIC Microcontroller

X1 and X2 (Connections for Standard 32.768 kHz Quartz Crystal)

The internal oscillator circuitry is designed for operation with a crystal having a
specified load capacitance (CL) of 12.5pF. X1 is the input to the oscillator and can optionally be
connected to an external 32.768kHzoscillator. The output of the internal oscillator, X2, is floated
if an external oscillator is connected to X1.

VBAT (Backup Supply Input for Any Standard 3V Lithium Cell or Other Energy Source)

Battery voltage must be held between the minimum and maximum limits for proper
operation. Diodes in series between the battery and the V BAT pin may prevent proper operation. If
a back up supply is not required, VBAT must be grounded. The nominal power-fail trip point
(VPF) voltage at which access to the RTC and user RAM is denied is set by the internal circuitry
as 1.25 x VBAT nominal. A lithium battery with 48mAhr or greater will backup the DS1307 for
more than 10 years in the absence of power at +25C.

SDA (Serial Data Input/ Output)

SDA is the data input/output for the I2C serial interface. The SDA pin is open drain and
requires an external pull up resistor.

SCL (Serial Clock Input)


SCL is the clock input for the I2C interface and is used to synchronize data movement on
the serial interface.

VCC (Primary Power Supply)

When voltage is applied within normal limits, the device is fully accessible and data can
be written and read. When a backup supply is connected to the device and VCC is below VTP,
read and writes are inhibited. However, the timekeeping function continues unaffected by the
lower input voltage.

CURRENT TRANSFORMER:

In electrical engineering, a current transformer (CT) is used for measurement of electric currents.
Current transformers, together withvoltage transformers (VT) (potential transformers (PT)), are
known asinstrument transformers. When current in a circuit is too high to directly apply to
measuring instruments, a current transformer produces a reduced current accurately proportional
to the current in the circuit, which can be conveniently connected to measuring and recording
instruments. A current transformer also isolates the measuring instruments from what may be
very high voltage in the monitored circuit. Current transformers are commonly used in metering
and protective relays in the electrical power industry.
Like any other transformer, a current transformer has a primary winding, a magnetic core, and a
secondary winding. The alternating currentflowing in the primary produces a magnetic field in
the core, which then induces a current in the secondary winding circuit. A primary objective of
current transformer design is to ensure that the primary and secondary circuits are efficiently
coupled, so that the secondary current bears an accurate relationship to the primary current.

The most common design of CT consists of a length of wire wrapped many times around a
silicon steel ring passed over the circuit being measured. The CT's primary circuit therefore
consists of a single 'turn' of conductor, with a secondary of many tens or hundreds of turns. The
primary winding may be a permanent part of the current transformer, with a heavy copper bar to
carry current through the magnetic core. Window-type current transformers are also common,
which can have circuit cables run through the middle of an opening in the core to provide a
single-turn primary winding. When conductors passing through a CT are not centered in the
circular (or oval) opening, slight inaccuracies may occur.

Shapes and sizes can vary depending on the end user or switchgear manufacturer. Typical
examples of low voltage single ratio metering current transformers are either ring type or plastic
moulded case. High-voltage current transformers are mounted on porcelain bushings to insulate
them from ground. Some CT configurations slip around the bushing of a high-voltage
transformer or circuit breaker, which automatically centers the conductor inside the CT window.

The primary circuit is largely unaffected by the insertion of the CT. The rated secondary current
is commonly standardized at 1 or 5 amperes. For example, a 4000:5 CT would provide an output
current of 5 amperes when the primary was passing 4000 amperes. The secondary winding can
be single ratio or multi ratio, with five taps being common for multi ratio CTs. The load, or
burden, of the CT should be of low resistance. If the voltage time integral area is higher than the
core's design rating, the core goes into saturation towards the end of each cycle, distorting the
waveform and affecting accuracy.

USES:

Current transformers are used extensively for measuring current and monitoring the operation of
the power grid. Along with voltage leads, revenue-grade CTs drive the electrical utility's watt-
hour meter on virtually every building with three-phase service and single-phase services greater
than 200 amps.

The CT is typically described by its current ratio from primary to secondary. Often, multiple CTs
are installed as a "stack" for various uses. For example, protection devices and revenue metering
may use separate CTs to provide isolation between metering and protection circuits, and allows
current transformers with different characteristics (accuracy, overload performance) to be used
for the devices

RELAY DRIVER

Features:
SEVEN DARLINGTONS PER PACKAGE
OUTPUT CURRENT 500mA PER DRIVER(600mA PEAK)
OUTPUT VOLTAGE 50V INTEGRATED SUPPRESSION DIODES FOR
INDUCTIVE LOADS OUTPUTS CAN BE PARALLELED FOR
HIGHER CURRENT
TTL/CMOS/PMOS/DTL COMPATIBLE INPUTS INPUTS PINNED OPPOSITE
OUTPUTS TO
SIMPLIFY LAYOUT.

DESCRIPTION:

The ULN2001A, ULN2002A, ULN2003 and ULN2004A are high voltage, high current
darlington arrays each containing seven open collector darlington pairs with common emitters.
Each channel rated at 500mA and can withstand peak currents of 600mA. Suppression diodes are
included for inductive load driving and the inputs are pinned opposite the outputs to simplify
board layout. The four versions interface to all common logic families

These versatile devices are useful for driving a wide range of loads including solenoids,
relays DC motors, LED displays filament lamps, thermal printheads and high power buffers. The
ULN2001A/2002A/2003A and 2004A are supplied in 16 pin plastic DIP packages with a copper
leadframe to reduce thermal resistance. They are available also in small outline package (SO-16)
as ULN2001D/2002D/2003D/2004D
.
LIQUID CRYSTAL DISPLAY

INTRODUCTION

A liquid crystal display (commonly abbreviated LCD) is a thin, flat display device made
up of any number of color or monochrome pixels arrayed in front of a light source or reflector. It
is often utilized in battery-powered electronic devices because it uses very small amounts of
electric power.

Fig 9.1- LCD Module


OVERVIEW

Each pixel of an LCD typically consists of a layer of molecules aligned between two
transparent electrodes, and two polarizing filters, the axes of transmission of which are (in most
of the cases) perpendicular to each other.

With no liquid crystal between the polarizing filters, light passing through the first filter
would be blocked by the second (crossed) polarizer

The surfaces of the electrodes that are in contact with the liquid crystal material are treated
so as to align the liquid crystal molecules in a particular direction. This treatment typically
consists of a thin polymer layer that is unidirectionally rubbed using, for example, a cloth. The
direction of the liquid crystal alignment is then defined by the direction of rubbing.

Before applying an electric field, the orientation of the liquid crystal molecules is
determined by the alignment at the surfaces. In a twisted nematic device (still the most common
liquid crystal device), the surface alignment directions at the two electrodes are perpendicular to
each other, and so the molecules arrange themselves in a helical structure, or twist. Because the
liquid crystal material is birefringent, light passing through one polarizing filter is rotated by the
liquid crystal helix as it passes through the liquid crystal layer, allowing it to pass through the
second polarized filter. Half of the incident light is absorbed by the first polarizing filter, but
otherwise the entire assembly is transparent.

When a voltage is applied across the electrodes, a torque acts to align the liquid crystal
molecules parallel to the electric field, distorting the helical structure (this is resisted by elastic
forces since the molecules are constrained at the surfaces). This reduces the rotation of the
polarization of the incident light, and the device appears gray. If the applied voltage is large
enough, the liquid crystal molecules in the center of the layer are almost completely untwisted
and the polarization of the incident light is not rotated as it passes through the liquid crystal layer.
This light will then be mainly polarized perpendicular to the second filter, and thus be blocked
and the pixel will appear black. By controlling the voltage applied across the liquid crystal layer
in each pixel, light can be allowed to pass through in varying amounts thus constituting different
levels of gray.

The optical effect of a twisted nematic device in the voltage-on state is far less dependent
on variations in the device thickness than that in the voltage-off state. Because of this, these
devices are usually operated between crossed polarizers such that they appear bright with no
voltage (the eye is much more sensitive to variations in the dark state than the bright state).
These devices can also be operated between parallel polarizers, in which case the bright and
dark states are reversed. The voltage-off dark state in this configuration appears blotchy,
however, because of small thickness variations across the device.

Both the liquid crystal material and the alignment layer material contain ionic compounds.
If an electric field of one particular polarity is applied for a long period of time, this ionic
material is attracted to the surfaces and degrades the device performance.

This is avoided either by applying an alternating current or by reversing the polarity of the
electric field as the device is addressed (the response of the liquid crystal layer is identical,
regardless of the polarity of the applied field).

When a large number of pixels is required in a display, it is not feasible to drive each
directly since then each pixel would require independent electrodes. Instead, the display is
multiplexed. In a multiplexed display, electrodes on one side of the display are grouped and
wired together (typically in columns), and each group gets its own voltage source. On the other
side, the electrodes are also grouped (typically in rows), with each group getting a voltage sink.
The groups are designed so each pixel has a unique, unshared combination of source and sink.
The electronics or the software driving the electronics then turns on sinks in sequence, and drives
sources for the pixels of each sink.

SPECIFICATION

Important factors to consider when evaluating an LCD monitor


Resolution: The horizontal and vertical size expressed in pixels (e.g., 1024x768). Unlike CRT
monitors, LCD monitors have a native-supported resolution for best display effect.

Dot pitch: The distance between the centers of two adjacent pixels. The smaller the dot pitch
size, the less granularity is present, resulting in a sharper image. Dot pitch may be the same both
vertically and horizontally, or different (less common).

Viewable size: The size of an LCD panel measured on the diagonal (more specifically known as
active display area).

Response time: The minimum time necessary to change a pixel's color or brightness.

Matrix type: Active or Passive.

Viewing angle: (coll., more specifically known as viewing direction).

Color support: How many types of colors are supported (coll., more specifically known as color
gamut).

Brightness: The amount of light emitted from the display (coll., more specifically known as
luminance).

Contrast ratio: The ratio of the intensity of the brightest bright to the darkest dark.

Aspect ratio: The ratio of the width to the height (for example, 4:3, 16:9 or 16:10).
LCD MODULE INTERFACING WITH MICROCONTROLLER

The LCD Module can easily be used with an 8051 microcontroller such as the
AT89C2051 included with the microcontroller beginner kit.

The LCD Module comes with a 16 pin connector. This can be plugged into the
breadboard as shown below.

Fig 9.2 - LCD Interfacing Circuit Diagram


To connect the LCD Module to a standard 40 pin 8051, use the pin names listed below to find
the correct pin number on the 8051 microcontroller. The example programs below do not need to
be modified to work with a 40 pin 8051.

2051 2051
LCD LCD
Function Pin Number & Function Pin Number &
Connector Connector
Name Name

1 Data Line 6 18, P1.6 16 LCD RS 7, P3.3

2 Data Line 1 13, P1.1 15 Data Line 5 17, P1.5

Power - LCD
3 14 6, P3.2
5VDC Read/Write

Not
4 13 Data Line 0 12, P1.0
Connected

Display
5 12 Data Line 4 16, P1.4
Adjust

6 Data Line 7 19, P1.7 11 LCD Enable 8, P3.4

7 Data Line 2 14, P1.2 10 Data Line 3 15, P1.3

8 Ground 9 Not Connected

Table 9.1- LCD Connector Functions

Connect LCD Pin 3 to Vcc (5 Volts). Connect LCD Pin 8 to Ground. Connect a 510 ohm
resistor between LCD Pin 5 and ground. Connect a 2.2k ohm resistor from LCD Pin 2 and Vcc.
Connect a 2.2k ohm resistor from LCD Pin 13 to Vcc.

MOSFET stands for metal oxide semiconductor field effect transistor. It is capable of voltage
gain and signal power gain. The MOSFET is the core of integrated circuit designed as thousands
of these can be fabricated in a single chip because of its very small size. Every modern electronic
system consists of VLST technology and without MOSFET, large scale integration is
impossible.It is a four terminals device. The drain and source terminals are connected to the
heavily doped regions. The gate terminal is connected top on the oxide layer and the substrate or
body terminal is connected to the intrinsic semiconductor.

MOSFET has four terminals which is already stated above, they are gate, source drain and
substrate or body. MOS capacity present in the device is the main part. The conduction and
valance bands are position relative to the Fermi level at the surface is a function of MOS
capacitor voltage. The metal of the gate terminal and the sc acts the parallel and the oxide layer
acts as insulator of the state MOS capacitor. Between the drain and source terminal inversion
layer is formed and due to the flow of carriers in it, the current flows in MOSFET the inversion
layer is properties are controlled by gate voltage. Thus it is a voltage controlled device. Two
basic types of MOSFET are n channel and p channel MOSFETs. In n channel MOSFET is
current is due to the flow of electrons in inversion layer and in p channel current is due to the
flow of holes. Another type of characteristics of clarification can be made of those are
enhancement type and depletion type MOSFETs. In enhancement mode, these are normally off
and turned on by applying gate voltage. The opposite phenomenon happens in depletion type
MOSFETs.

Working Principle of MOSFET

The working principle of MOSFET depends up on the MOS capacitor. The MOS capacitor is the
main part. The semiconductor surface at below the oxide layer and between the drain and source
terminal can be inverted from p-type to n-type by applying a positive or negative gate voltages
respectively. When we apply positive gate voltage the holes present beneath the oxide layer
experience repulsive force and the holes are pushed downward with the substrate. The depletion
region is populated by the bound negative charges, which are associated with the acceptor atoms.
The positive voltage also attracts electrons from the n+ source and drain regions in to the
channel. The electron reach channel is formed. Now, if a voltage is applied between the source
and the drain, current flows freely between the source and drain gate voltage controls the
electrons concentration the channel. Instead of positive if apply negative voltage a hole channel
will be formed beneath the oxide layer.
Now, the controlling of source to gate voltage is responsible for the conduction of current
between source and the drain. If the gate voltage exceeds a given value, called the three voltage
only then the conduction begins. The current equation of MOSFET in triode region is -

Where, un = Mobility of the electrons C ox =


Capacitance of the oxide layer W = Width of the gate area L = Length of the channel V GS = Gate
to Source voltage VTH = Threshold voltage VDS = Drain to Source voltage.

CHAPTER 5
SOFTWARE DESCRIPTION

EMBEDDED C:

Introduction:

Embedded c language is a basic C language designed for the embedded system for
various microcontroller included in its library files. C is for desktop computers, embedded C
usually is for microcontroller based applications.

C use the resource for desktop computer (memory, OS, etc. ) embedded C use only
limited resource available in chip ( limited RAM, ROM, ports ,etc.)
Embedded C could be a subset of C.
Embedded C does the program for real time systems, which depends on the time.

Advantages if embedded c:

The advantages of embedded C are,

Absence of console
Restriction on code size
The regular compile create OS dependent executable file where as a embedded computer
create a file which are downloads to controller to realize the required task regular
compilers dont give ace to all the resource directly so code efficient.
Code written in embedded C is through not cross compatible but they are series
compatible .it is very easier to maintain and code written in C can be more productive.
3.1.3 Features of C:
One of the best features of C is that it is not tied to any particular hardware or system.
This makes it easy for a user to write programs that will run without any changes on
practically all machines.
C is often called a middle-level computer language as it combines the elements of high-
level languages with the functionalism of assembly language.
To produce the most efficient machine code, the programmer must not only create an
efficient high level design, but also pay attention to detailed implementation.
C is much more flexible than other high-level programming languages
o C is a structured language
o C is a relatively small language
o C has very loose data typing
o C easily supports low level bit-wise data manipulation.
o C is sometimes referred to as a high-level assembly language.
When compared to assembly language programming:
o Code written in C can be more reliable.
o Code written in C can be more scalable.
o Code written in C can be more portable.
o Code written in C can be easier to maintain.
o Code written in C can be more productive.
C retains the basic philosophy that programmers know what they are doing.
C only requires that they state their intention explicitly.
C program should be clear, concise, correct and commented
A compiler is no more efficient than a good assembly language programmer, C is a means
to an end and not an end itself

KEIL

Vision IDE Overview

The Vision IDE from Keil combines project management, make facilities, source code
editing, program debugging, and complete simulation in one powerful environment. The Vision
development platform is easy-to-use and helping you quickly create embedded programs that
work. The Vision editor and debugger are integrated in a single application that provides a
seamless embedded project development environment. The Vision Debugger from Keil
supports simulation using only your PC or laptop, and debugging using your target system and a
debugger interface. Vision includes traditional features like simple and complex breakpoints,
watch windows, and execution control as well as sophisticated features like trace capture,
execution profiler, code coverage, and logic analyzer.

Simulation

Vision provides everything you need to quickly develop high-fidelity simulations that help you
test, debug, and prove the stability and quality of your software design.
Before starting the Vision Debugger, select "Use Simulator" from the Project Options Debug
Tab to simulate programs in the debugger.

Core Simulation

The Vision Simulator allows you to debug programs using only your PC and device simulation
drivers provided by Keil and various third-party developers. A good simulation environment, like
Vision, does much more than simply simulate the instruction set of a microcontroller it
simulates your entire target system including interrupts, startup code, on-chip peripherals,
external signals, and I/O.

Instruction Simulation

The Vision Debugger provides


complete instruction set simulation for all ARM7, ARM9, Cortex-M3, XC16x, C16x, ST10, 251,
and 8051 devices.

When debugging your program, op-codes are interpreted and executed as their corresponding
instructions would be. You may view program disassembly in mixed mode or in assembly code.
All registers and flags are updated as each instruction executes.
Results display in the Register Tab of the Project Workspace.

As you step through your program, affected registers are highlighted.

Instruction timings are accurately simulated so you can easily determine how long a function or
module takes to execute. Timing is cycle-accurate for deterministic parts.

Interrupt Simulation

Interrupts are fully supported and properly simulated in the Vision Debugger. Interrupts are
triggered and executed exactly as they would be in a real target system.
An Interrupt System dialog box is designed specifically for each supported device. Each interrupt
source including all interrupt configuration options are displayed.

You may use this dialog to interactively enable and disable interrupts, change the interrupt
priority, enable or disable an interrupt request, and change the global interrupt flag.

Furthermore, interrupt simulation enables you to set breakpoints within and stop program
execution inside an interrupt service routine.

Peripheral Simulation

The Vision debugger simulates the on-chip peripherals of numerous microcontrollers. When
you select a microcontroller from the device database to configure your project, Vision
automatically configures the debugger's peripheral simulator for you. With its logical and timing
simulation, it is possible to test an application before the target hardware is even completely
designed. The simulator makes it easy to test hardware defects and critical situations which are
difficult to debug with real hardware.

D/A Converter Simulation

A/D Converter

A/D Converter Simulation allows you to easily configure the A/D Converter and
simulate voltages are corresponding device pins.

D/A Converter

D/A Converter Simulation allows you to output analog voltages and monitor them
using debugger scripts.

I/O Port Simulation


I/O Port Simulation allows you convenient dialogs to configure and monitor I/O port
status.

Timer/Counter

Timers and Counters are accurately simulated allowing your to control and
measure events precisely.

Watchdog Timer

Watchdog Timer Simulation helps you determine how often and where to reset the
watchdog in your application.

Capture/Compare

Capture/Compare Simulation allows you to view and change the configuration of


the capcom units fond on many devices.

Serial Communications

Serial Communications Simulation provides a serial window and dialog that help
you configure and communicate using your device's on-chip UART.

CAN Communication Simulation

CAN Communications Simulation provide dialogs for CAN configuration and


message logging. Debugger scripts may be used to generate CAN bus traffic and respond
to simulated message traffic.

IC Simulation
IC Communications Simulation allows you to configure IC and view messages sent and
received. Debugger scripts may be used to generate and respond to IC messages.

SPI Communication Simulation

SPI Communications Simulation allows you to simulate master and slave SPI devices.

FLASH Memory Simulation

FLASH Memory Simulation gives you access to all control registers of on-chip
FLASH/EE memory. All memory contents may be viewed and modified in real-time.

Target Debugging

Vision provides several interfaces to target hardware debuggers (like ULINK and the variety of
target monitors provided by Keil). Additional hardware drivers are provided by target debugger
hardware providers (emulator companies).

Before starting the Vision Debugger, select the target driver from the Project Options Debug
Tab to specify which target interface to use.

Starting the Vision Debugger

When you click the Start Debug Session button on the toolbar, Vision starts the debugger
using the appropriate simulation or target debug driver.
JTAG Interface

The Vision Debugger supports several different JTAG-based debugging options. These options
use a JTAG (Joint Test Action Group) interface which allows Vision to communicate with your
target system.

Support is available for:

The ULINK2 USB-JTAG Adapter which supports ARM, Cortex-M3, XC16x, and PSD
devices.

Third-party debuggers that comply with the ARM RDI (Remote Debugger Interface).

Once you select the appropriate JTAG debugger, Vision provides a dialog where you set the
parameters specific to your target system.
Target Monitor
The Target Monitor is a program (provided by Keil) that you configure, compile, load, and run
on your target hardware. It communicates (usually via the serial port) with the Vision Debugger
and allows you download and debug your programs in real time. The Keil Monitor comes pre-
installed on many evaluation boards.

Several different Target Monitors are available. The monitor you use depends on the device and
hardware configuration of your target system.

The monitor driver is selected on the Debug Tab of the Project Options Dialog. The Settings
button opens a dialog with numerous configuration options.
MON166
MON166 is a full-featured, license-free, royalty-free target monitor designed for
debugging C16x or XC16x-compatible target systems with von Neumann code memory.

MON251
MON251 is a full-featured, license-free, royalty-free target monitor designed for
debugging 251-compatible target systems with von Neumann code memory.

MON51
MON51 is a full-featured, license-free, royalty-free target monitor designed for
debugging 8051-compatible target systems with von Neumann code memory.

MON390
MON390 is a full-featured, license-free, royalty-free target monitor designed for
debugging target systems based on the Dallas Semiconductor DS80C390, DS80C400, or
DS5240.
MONADI
MONADI is a full-featured, license-free, royalty-free target monitor designed for
debugging target systems based on the Analog Devices ADuc812 and compatible devices.

FlashMON51
FlashMon51 is a full-featured, license-free, royalty-free target monitor for debugging
8051-compatible target systems that have either von Neumann code memory or Flash
memory.

ISD51
ISD51 (In-System Debugger) is a new debug monitor technology for 8051 user
programs. ISD51 consists of a configurable debug module that you link to your user
programs to provide support for program testing via the 8051 on-chip UART.

Flash Programming
Flash Device Programming is available within the Vision IDE. All Flash configuration options
are stored with your project.

Click the Download to Flash button on the toolbar to download your target program into the
Flash memory of your target system.

Two methods of Flash support are available:

Flash Programming Using a Target Driver


A number of target debugger drivers are available for Vision. These drivers directly
interface to target debugging hardware and support debugging programs running on
target systems. The following drivers integrate support for Flash programming, as well.

o Analog Devices Monitor Driver

o EPM900 Emulator/Programmer

o RDI Interface (Remote Debugger for ARM Devices)


o Silicon Labs Debug Driver

o ULINK for ARM7, ARM9, Cortex-M3, ST PSD, and Infineon XC800 & XC16x

Flash Programming Using an External Tool


Third-party Flash programming tools, which typically run from the command prompt, are
easy to integrate into the Vision environment.

The Flash programming method is selected on the Flash tab in the Project Options Dialog.

Flash Programming Using a Target Driver

Using a target driver to program the Flash memory of your embedded target system requires that
you select the appropriate Flash memory and its physical address range. This is required since
there are many different algorithms for programming Flash memory. A large number of pre-
configured programming algorithms are included with the Keil tools.
The procedure for creating algorithms to support new devices is well-documented. So, you can
easily add support for new algorithms or devices.

Flash Programming Using an External Tool


CHAPTER 6

CONCLUSION

Now A days the protection and control of equipment plays a very important role. To avoid
electrical failure we use fast responding circuit breakers because of its considerable accuracy in
fault detection and cut off- time, and also its smooth operation compared to conventional type.

Future Scope:

The operating time of electromagnetic relay can be improved by using sophisticated electronic
components.

REFFERENCE

[1]Raj kamal Microcontrollers Architecture, rogramming, Interfacing and System Design.

[2]Mazidi and Mazidi Embedded Systems.

[3]PIC-Microcontroller Manual Microchip.

[4]A M S Almadji & J G J Sloot review of Current limitting IEEE.

[5]T. Genji , Nakamar: high speed circuit Breaker for electric power system.
[6]200WAS RI BIN ABU ,HARUN:Over Current protection using PIC Microcontroller IEEE.