10.

Input Filter Design

11.

12.

CH7-1

CH7-2

1
 Introduction

Converter systems invariably require control.

For a dc-dc converter, output voltage must be
kept constant, regardless of changes in input
source or load resistance
Output voltage v(t)=f(vg(t), R, D)
This can be achieved by controlling duty
cycle to regulate output voltage to follow a
desired reference value

CH7-3

CH7-4

2
 Introduction

Feedback system is designed to accurately

regulate the output voltage, and is insensitive
to disturbance in vg(t) or load current
Feedback system should be stable, and
properties such as transient overshoot,
settling time, and steady-state error should
meet specifications

CH7-5

(voltage control loop)

(current control loop)

PFC
CH7-6

3
11
12
CH7-7

(e.g. switching ripple)

CH7-8

4
 m<< s
disturbances variation in vg
and R are far less than fs
CH7-9

ns

The magnitude and phase of components in m depend not only on the

duty cycle variation, but also on the frequency response of the converter
CH7-10

5
 ac modeling is to predict the low-frequency component

Inductor current &

capacitor voltage
CH7-11

1 t Ts
x(t ) Ts

Ts
t
x( )d (7.3)

Average of x(t) over an interval of length Ts

Employ basic approximation of removing high-frequency switching
ripple by averaging over one Ts
Yet average value allowed to vary, such that low-frequency variations
are modeled CH7-12

6
 When converter operates in
equilibrium, vL (t ) T 0, iC (t ) T 0
s s

according to V-S & I-S balance

To obtain a linear model which is easier analyzed, usually construct a

small-signal model that has been linearized around a quiescent operating
point, where the modulation frequency harmonics are neglected
CH7-13

Small-Signal Equivalent Circuit Modeling of

Diode

i I i(t ) lead to v V v
If v V , i I , then
relationship between v & i is approximately linear,
i(t ) (1 / r )v (t ),ac conductance 1/r is the slope of curve at Q
D D
CH7-14

7
 D
M ( D) , CCM
1 D
Fig. 7.5

Q
Q (D = 0.5, V = -Vg)
D variation d about Q will excite
in V
variation v
The v can be computed by
Slope at Q is the control-to-output gain linearizing the curve, if the d is
G v d v / d sufficiently small CH7-15

Linearization of Converter
Characteristics
Fig. 7.5 is oversimplified. Converters L & C cause
the gain to exhibit a frequency response
To correctly predict the poles & zeros of the
transfer functions, converters averaged differential
equations (Eq. 7.2) must be linearized

(Eq. 7.2)

CH7-16

8
 CH7-17

This model can be solved using conventional

circuit analysis techniques to find small-signal
transfer functions, output impedance, and other
frequency-dependent properties
When the small-signal model of pulse-width
modulator is inserted, a complete linearized system
model is obtained
This model can be analyzed using standard linear
techniques (Laplace transform) to gain insight into
the system behavior & properties
Two ac modeling methods, circuit averaging &
state-space averaging (SSA), are explained
CH7-18

9
 An extension of circuit averaging, known as
averaged switch modeling, is also discussed
(switches are only elements that introduce
switching harmonics)
By replacing switches with averaged switch model,
the obtained converter model is suitable for
analysis & simulation
The averaged switch modeling technique can be
extended to other operating modes such as DCM,
current-mode control and resonant converters
Canonical form, in Section 7.5, describes basic
physical functions that converters must perform
CH7-19

As usual, the analysis begins by determining the

waveforms of inductor voltage & capacitor current
CH7-20

10
 iR
iC
+
vL
-

Rather than with their dc

components

CH7-21

iR
iC
+
vL
-

CH7-22

11
 Why has slope?

no switching harmonics, and models only the low-frequency

components of vL(t) waveform

(7.2)

This equation describes how the low-frequency

components of the inductor current vary with time CH7-23

CH7-24

12
 vL ( t ) Ts
Ts
L

CH7-25

d i(t ) d1 t Ts i(t Ts ) i(t )

i( )d
Ts

dt dt Ts t
Ts

CH7-26

13
 vL ( t ) Ts
slope
L
d v g (t ) d ' v( t ) Ts
Ts

CH7-27

CH7-28

14
Interval length is chosen to
coincide with Ts, such that
switching frequency ripple
is effectively removed CH7-29

d vC (t ) Ts
iC (t ) Ts
C
dt

This averaged equation describes dc & low-frequency

ac variations in capacitor voltage CH7-30

15
 By neglecting inductor current
ripple and replacing i(t) with
its averaged value i(t ) Ts

CH7-31

vL (t ) Ts
(7.14)

iC (t ) (7.25) (7.28)
Ts

(7.27)

CH7-32

16
 Multiplication of time-vary signals generates
harmonics, and is nonlinear process
Most of ac circuit analysis techniques
(Laplace transform & other frequency-
domain methods) are not useful for
nonlinrae systems
Need to linearize the nonlinear Eq. (7.28) by
constructing a small-signal model

CH7-33

vg (t ) Vg

CCM Buck-boost steady-state

analysis
CH7-34

17
(7.30)

(7.31)

CH7-35

CH7-36

18
CH7-37

CH7-38

19
DVg D 'V 0
CH7-39

CH7-40

20
CH7-41

I g DI

CH7-42

21
 Summary
Nonlinear averaged equations of a switching
converter can be linearized about a quiescent
operating point
The independent inputs are expressed as dc value plus
small ac variations v g Vg v
g d D d
Inserting Eqs. (7.30) & (7.31) into converter averaged
nonlinear equations yields dc terms, linear ac terms,
and nonlinear terms (perturbation)
If the ac variations are sufficiently small in magnitude,
then nonlinear terms are much smaller than linear ac
terms, and can be ignored
The remaining linear ac terms comprise the converter
small-signal ac model CH7-43

(7.43)

An equivalent circuit models the converters dc properties

CH7-44

22
 Describe inductor
voltage around a loop

CH7-45

Describe currents flowing

into a node attached to the C

CH7-46

23
CH7-47

CH7-48

24
Discussion of Perturbation & Linearization Step

In perturbation & linearization step, assuming

that the averaged voltage or current consists of a
dc component & a small-signal ac variation
around the quiescent operating point
Linearization step was completed by neglecting
nonlinear terms (2nd order ac terms)
Linearization step amounts to taking Taylor
expansion of a nonlinear relation and retaining
only constant & linear terms

CH7-49

Discussion of Perturbation & Linearization Step

For example, the large-signal averaged equation for

inductor current can be written as

d i(t ) T
L s
d(t ) vg (t ) d '(t ) v(t ) T f1 vg (t ) , v(t ) T , d(t )
dt Ts s Ts s

Expanding this express in a 3-dimemsional Taylor series, about (Vg , V , D)

dI di(t ) f1 vg ,V , D
L
dt dt

f1 Vg ,V , D v g (t ) vg
vg Vg

v(t )

f1 Vg , v, D d(t )

f1 Vg ,V , d high-order nonlinear terms
v d
vV d D

CH7-50

25
Discussion of Perturbation & Linearization Step
The dc term = 0, that is
f1 Vg ,V, D 0, DVg D'V 0 (which is volt-second balance for L)

V
D
D'
Vg T s Ts

f1 vg (t ) , v(t ) T , d(t ) d(t ) vg (t ) d '(t ) v(t ) T
s s

The coefficients with linear terms are:

v g (t)

f1 vg ,V, D v g (t)D, v(t)

f1 Vg , v, D
v(t)D'
vg v
vg Vg vV

d(t)

f1 Vg ,V, d d(t)(Vg V)
d
dD

di(t)
then L Dv g (t) D' v(t) (Vg V)d(t)
dt
which is identical to Eq. (7.36). Hence, linearization step can always be
accomplished using the Taylor expansion CH7-51

boost

CH7-52

26
 CH7-53

Homework #13
Derivation of average small-signal ac models
for the buck and boost converters as shown
on page 205 Fig. 7.17.

CH7-54

27
Other loss elements, such as transformer leakage
inductances and switching losses, are negligible
CH7-55

Q1 on, D1 off

Q1 off, D1 on

CH7-56

28
 0 0

CH7-57

i ( t ) v( t )
iC ( t )
n R

i(t ) Ts
v( t ) Ts
iC ( t )
n R

CH7-58

29
v g (t ) i( t ) Ts
Ron
Ts

v(t ) Ts
/n

CH7-59

CH7-60

30
 CH7-61

(7.60)

induce

d '(t ) D ' d (t )
CH7-62

31
CH7-63

CH7-64

32
CH7-65

CH7-66

33
CH7-67

CH7-68

34
 V D D
n (if Ron 0)
Vg D ' nD Ron D'
n D' R

CH7-69

Low-frequency ac voltage across inductor

Influence of Ron on the small-signal T.F. is modeled by an effective

resistance DRon CH7-70

35
CH7-71

CH7-72

36
 CH7-73

3 (SSA)

7.2

CH7-74

37
 CH7-75

, d(t)

, v(t)

CH7-76

38
 diL
L vL
dx dt
K
dt dvC
C iC
dt CH7-77

State equations

CH7-78

39
1

CH7-79

CH7-80

40
 CH7-81

Time: dTs

A1, B1, C1, E1 & A2, B2, C2, E2 may

differ because circuit elements are
connected differently during two
Time: dTs subintervals
CH7-82

41
 v g (t ) i( t ) R on
Average with duty cycle Ts Ts

dx
K (Ad 1 A2d ')x+(B1d B2d ')u v( t ) / n
dt Ts

Perturbation & Linearization

Let x=X+x , d D d, u U u , y Y y , d' D' d

State equation
dX dx
K( ) [A1(D d) A2 (D' d)](X x ) [B1(D d) B2(D' d)](U u )
dt dt
(AD
1 A2D')X ( A1 A2 )Xd ( AD
1 A2D')x ( A1 A2 )xd

(BD B D')U (B B )Ud (BD B D')u (B B )ud

1 2 1 2 1 2
1 2

dc term 1st order ac terms 2nd order ac terms

CH7-83

0
dX dx
K( ) (AD 1 AD2 ')X (A1 A2 )Xd (AD1 AD
2 ')x

dt dt
(A1 A2)xd (BD
1 BD

2 ')U (B1 B2 )Ud (BD
1 BD

2 ')u(B1 B2 )ud

AX BU Ax Bu [(A1 A2 )X(B1 B2 )U]d Linearization

DC : 0 AX BU

dx
ac : K Ax Bu [(A1 A2)X(B1 B2)U]d
dt
where A AD 1 AD 2 ', B BD 1 BD
2 '

CH7-84

42
Output Equation
y (C1d C2d ')x+(E1d E2d ')u Average with duty cycle
Perturbation
Y y [C1(D d) C2 (D' d)](X x ) [E1(D d) E2 (D' d)](U u )
(C D C D')X (C C )Xd (C D C D')x (C C )xd
1 2 1 2 1 2 1 2


(E1D E2D')U (E1 E2 )Ud (E1D E2D')u (E1 E2 )ud
CX EU Cx Eu [(C C )X (E E )U]d Linearization
1 2 1 2

DC : Y CX EU

ac : y Cx Eu [(C1 C2 )X (E1 E2 )U]d
where C C1D C2D', E E1D E2D'
CH7-85

CH7-86

43
Matrix Operation

CH7-87

CH7-88

44
CH7-89

CH7-90

45
CH7-91

CH7-92

46
 CH7-93

Approximate the derivative of x(t ) T s

using net change over one

switching period

Nonlinear eq.
CH7-94

47
 CH7-95

d(t)=D, u(t)=U

CH7-96

48
 Norm of vector x

CH7-97

dX
0
dt

CH7-98

49
 Linearized ac model

0 AX BU

Y CX EU
CH7-99

CH7-100

50
vL(t)=

iC(t)=

CH7-101

+ iC(t)
vL
-

CH7-102

51
 Ron 0
A1 , B 1 0
1 0 0
0
1

R
0 1
A2 , B 0 1
1 1 2 0 0

R
C1 1 0 , E1 0 0
C2 0 0 , E2 0 0
CH7-103

D
D '2 R

1
D' R

X=-A-1BU D 1
D'

Y=(-CA-1B+E)U
D2 D
D '2 R D ' R

CH7-104

52
 Eq. (7.126)

CH7-105

Eq. (7.126)
DRon D I
0 D D Vg
1
0 D V 0 0 VD
R
DRon D I
D D Vg
1 D D
D V 0 0 VD I 1 R Vg
R R
V DRon D2 DD D2 VD
DRon D I
D D Vg R
1
D V 0 0 VD 1
D D
R I Vg
D R R
2

V DRon 1 DD D2 VD
1 1
DRon D D
DRon DRon D D D V
I g D2 R
1 1 1
D D V D 0 0 VD 1 D 1 D
R R R D2 R
I 1 D 2 R Vg
1
I D D D Vg DR
D2 D
1 R V 1
1 2 ( DD ) 1 V

on

0 VD D2 R D

2
V DR
( D) D D DRon 0
on D
R D 1
I 1 D2 R DR Vg

V 1 D Ron D 1 D
V
D2 R D

CH7-106

53
 Eq. (7.126) Ig

I V
[ I g ] D 0 0 0 g
V VD
I
[ I g ] D 0
V
D 1
1 D2 R DR Vg
[ I g ] D 0
1 2 on D
D R
1 D
V
D R D
D 1
1 D2 R DR Vg
[I g ] D 0
D R
1 2 on D 1 D
V
D R D
1 D2 D Vg
[I g ]
D R
1 2 on D R
2
DR VD
D R
CH7-107

DC

DVg DRon I D 'V D 'VD 0

V
D' I 0
R
I g DI

CH7-108

54
 IR V Vg VD Vg V IRon VD
( A1 A2 ) X ( B1 B2 )U on 0
I I

Diode forward voltage drop is modeled as constant

value VD, no ac variations in this source CH7-109

Ron 0 0 1
I Ron 1 I IRon V
( A1 A2 ) X 1 1
0 R 1 R V 1 0
V I



1 0 0 1Vg 1 1 Vg Vg VD
(B1 B2 )U 0 0 V 0 0 V 0
0 0 D D

IR V V V V V IRon VD
( A1 A2 ) X (B1 B2 )U on g D g
I 0 I

I V
(C1 C2 ) X (E1 E2 )U 1 0 0 0 0 0 0 0 g [I ]
V VD

CH7-110

55
 CH7-111

ideal buck-boost small-signal ac model CH7-112

56
 Example: SSA for CCM Forward
Converter with Parasitic esr

N1/ N2 =1, find Gvd vo ( s) / d ( s)

CH7-113

Example: SSA for CCM Forward

Converter with Parasitic esr
Step 1 State Equation
Switch on (x1=iL, x2=vC)

V d Lx1 rL x1 R ( x1 Cx 2 ) 0

x 2 rc Cx 2 R ( x1 Cx 2 ) 0
RrC RrL rC rL R

x1 L( R rC ) x1
1
L( R rC )
x L Vd
2 R

1 x2 0
C ( R rC )
C ( R rC )
CH7-114

57
 Example: SSA for CCM Forward
Converter with Parasitic esr

RrC RrL rC rL R
L ( R rC )

L ( R rC ) 1
A1 , B1 L
R 1
0
C ( R rC ) C ( R rC )

CH7-115

Example: SSA for CCM Forward

Converter with Parasitic esr
Switch off

0 Lx1 rL x1 R ( x1 Cx 2 ) 0

x 2 rc Cx 2 R ( x1 Cx 2 ) 0
RrC RrL rC rL R

x1 L( R rC ) L( R rC ) x1 0
x VS
2 R

1 x2 0
C ( R rC ) C ( R rC )
A2 A1 , B2 0
CH7-116

58
 Example: SSA for CCM Forward
Converter with Parasitic esr

output voltage in both states

RrC R Rr R x1
v0 R( x1 Cx2 ) x1 x2 C
R rC R rC R rC R rC x
2

v0 C T X
RrC R
C1T C2T
R rC R rC

CH7-117

Example: SSA for CCM Forward

Converter with Parasitic esr
In practical circuit: R >> (rC+rL)
rC rL 1
L
L , CT CT r 1
A A1 A2
1 1 2 C
1
C CR
B remains unaffected
1
B B1 D B 2 (1 D ) L D


0
A A1 D A2 (1 D ) A1 (1 D D ) A1

C T C1T D C 2T (1 D ) C1T
CH7-118

59
 Example: SSA for CCM Forward
Converter with Parasitic esr

Steady-State dc voltage T.F.

V0
Vd
C T A 1 B rC 1 12
LC
1 ( rC rL ) / R

1 1
CR 1
L L R rC
1 DD
R ( rC rL )
D
r r 0
C L
C L 22
21

CH7-119

Example: SSA for CCM Forward

Converter with Parasitic esr
Small Signal T.F.
v ( s)
TP ( s) 0 C T SI A ( A1 A2 ) X ( B1 B2 )Vd (C1T C2T ) X
1

d ( s)
1

rC rL 1
s 0 L 1

L
rC 1 1

L Vd

12

0 s 1
0 21
C CR 22

1 srcC
Vd

(81)
LC s2 s [ 1 (rC rL ) L ] 1
CR LC

1 2 105 s
Substituting elements ' value : Tp ( s ) 8 10 2 8

s 8500s 108
CH7-120

60
 Example: SSA for CCM Forward
Converter with Parasitic esr
Denominator of Eq. (81) has the form
s 2 20 s 02
1 1/ CR ( rC rL ) / L
0 ,
LC 20
v0 ( s) 02 s z
TP ( s) Vd
d ( S ) z s 2 20 s 02
1
rcC ( s )
rcC rc s z



LC s 2
2 0 s 0
2
L s 2
2 0 s 2
0

CH7-121

Example: SSA for CCM Forward

Converter with Parasitic esr

A zero due to ESR of filter C :

1 02 rC
z and
rcC z L
o : resonant frequency
: damping ratio
CH7-122

61
 Example: SSA for CCM Forward
Converter with Parasitic esr
Bode plot for T.F. using numerical value

<0: gain fixed and mim. Phase shift

0<<z : gain decay with -40 dB/dec., phase 180
>z : gain decay with -20 dB/dec., phase 90 CH7-123

7.4 Circuit Averaging & Averaged Switch

Modeling

Rather than averaging converter state equations, the

circuit averaging technique directly averages the
waveforms of the converter switch network
All manipulations are performed on circuit diagram,
instead of on its equations, hence circuit averaging
technique (CAT) gives a more physical interpretation
to the model
Since circuit averaging involves averaging & small-
signal linearization, it is equivalent to state-space
averaging
CH7-124

62
7.4 Circuit Averaging & Averaged Switch
Modeling
Allow small-signal ac model to be written almost by
inspection
CAT can be applied directly to a number of different-type
converters & switch elements
Key step in CA is to replace converter switches with V & I
source, to obtain a time-invariant circuit topology
Once the time-invariant circuit network is obtained,
converter waveforms can be averaged over one Ts to
remove switching harmonics
Any nonlinear elements in the averaged circuit model can
then be perturbed & linearized, leading to small-signal ac
model CH7-125

corollary

(waveforms)
CH7-126

63
 Can be viewed as a switch
Containing
network connected to a
switching elements
time-invariant network
CH7-127

Averaged switch modeling is to find an averaged

circuit model for switch network
The resulting averaged circuit model can then be
inserted into converter circuit to obtain a complete
converter averaged circuit model
An important advantage: the same model can be used
in many different converter configurations
The averaged circuit model simplifies converter
analysis and yields good intuitive understanding of
converter steady-state & dynamic properties

CH7-128

64
 The switch network port is not necessary to be connected electrically
within the switch network itself
No requirement that any of terminal voltage or current waveform be
non-pulsating CH7-129

CH7-130

65
 i1(t) i2(t)
+ +
v1(t) v2(t)
- -

v1 (t ), i2 (t ) f i1 (t ), v2 (t ), d(t )
CH7-131

CH7-132

66
 i1(t) i2(t)
+ +
v1(t) v2(t)
- -

With v1 defined in this manner, the vL waveform is unchanged

With i2 defined in this manner, the iC waveform is unchanged
CH7-133

To remove switching
harmonics

CH7-134

67
CH7-135

CH7-136

68
 Large signal averaged switch model CH7-137

I1 i1
Independent inputs
V2 v 2
d '(t ) v2 (t ) Ts
(D ' d )(V2 v 2 )
Dependent outputs
d '(t ) i1(t ) Ts
(D ' d )( I1 i1 )

Perturbation model CH7-138

69
 v1 (t ) Ts
d '(t ) v2 (t ) Ts
(D ' d )(V2 v 2 )

V1 v1 (D ' d )(V2 v 2 ) D '(V2 v 2 ) V2d v 2d

V d 2

(V1 v1 )
D'(V2 v2 )

DC & Linearize 1st ac V1 v1 D '(V2 v 2 ) V2d

terms CH7-139

i2 (t ) Ts
d '(t ) i1(t ) Ts
( D ' d )( I1 i1 )

I2 i2 (D' d)(I1 i1) D'(I1 i1) I1d i1d

( I 2 i2 )

D '( I1 i1 ) I1d

DC & Linearize 1st ac

terms I 2 i2 D '( I1 i1 ) I1d
CH7-140

70
( I 2 i2 ) ( I 2 i2 )

(V1 v1) (V2 v2)
D'(V2 v2 ) D '( I1 i1 )
CH7-141

Averaged switch network

dc & small-signal ac
averaged circuit model
of boost

Averaged switch network

CH7-142

71
 DC & AC Model

dc model Let ac quantities = 0

ac model Let dc quantities = 0

I +

Vg V R
-

DC Model ac Model
CH7-143

Averaged Switch Network Model for

Boost

CH7-144

72
 CH7-145

two SPSTs

Averaged switch model

A SPDT
CH7-146

73
 CH7-147

Buck switch network

i2 (t ) Ts

dependent quantities = f( independent quantities, d)

CH7-148

74
 Independent signals: v1(t), i2(t)
Dependent signals: v2(t), i1(t)
i1(t), v2(t) = f(v1(t), i2(t), d(t))
CH7-149

Buck-Type CCM Switch Cell

Perturbation & Linearization

i1 (t ) Ts
d( t ) i 2 ( t ) Ts

I1 i1 (D d (t ))( I 2 i2 ) D( I 2 i2 ) I 2 d i2 d
v2 ( t ) Ts
d(t ) v1 (t ) Ts

V2 v 2 (D d (t ))(V1 v1 ) D(V1 v1 ) V1d v1d

I1 i1 I 2 i2

D ( I 2 i2 ) V1d
V1 v1
D(V1 v1 ) V2 v2
I 2d (t )

CH7-150

75
 CH7-151

SEPIC-Type CCM Switch Cell

Time-invariant network
switch network

CH7-152

76
 SEPIC-Type CCM Switch Cell

Select i1, v2 as independent inputs, d(t) is independent

control input, then the v1, i2 are dependent outputs
CH7-153

SEPIC-Type CCM Switch Cell

CH7-154

77
 SEPIC-Type CCM Switch Cell

v1 (t ) Ts
d '(t ) vC1 (t ) Ts
vC 2 (t ) Ts i1 (t ) Ts
d(t ) iL1 (t ) Ts
iL 2 (t ) Ts
i2 ( t ) Ts
d '(t ) i L1 (t ) Ts
iL 2 ( t ) Ts v2 ( t ) Ts
d(t ) vC1 (t ) Ts
vC 2 (t ) Ts
dependent outputs independent inputs
CH7-155

SEPIC-Type CCM Switch Cell

Express dependent outputs as functions solely of independent
inputs and control input d

v1 (t ) Ts
, i2 (t ) Ts
f i (t )
1 Ts
, v2 ( t ) Ts
, d( t )
v1 (t ) Ts
d '(t ) vC1 (t ) Ts
vC 2 (t ) Ts i1 (t ) Ts
d(t ) iL1 (t ) Ts
iL 2 ( t ) Ts
i2 ( t ) Ts
d '(t ) i L1 (t ) Ts
iL 2 ( t ) Ts v2 (t ) d(t ) vC1 (t ) vC 2 (t )
Ts Ts Ts

i1 (t ) Ts d '(t )
iL1 (t ) Ts
iL 2 ( t ) Ts
i2 (t ) Ts
i1 (t ) Ts (7.137)
d(t ) d(t )
v2 ( t ) Ts d '(t )
vC1 (t ) Ts
vC 2 (t ) Ts
v1 (t ) Ts
v2 ( t ) Ts
(7.136)
d(t ) d(t )
CH7-156

78
 SEPIC-Type CCM Switch Cell
Perturbation & Linearization
Let d(t ) D d (t ), d '(t ) 1 d(t ) D ' d (t ), v1 (t ) Ts
V1 v1 (t ),

i1 (t ) Ts
I1 i1 (t ), v2 (t ) Ts
V2 v 2 (t ), i2 (t ) Ts
I 2 i2 (t )
substitute into (7.136), obtain d '(t )
v1(t ) T v 2 (t ) Ts
(7.136)
d (t ) s

(D d )(V1 v1 )=(D ' d )(V2 v 2 )

D(V1 v1 ) D'(V2 v 2 )-d (V1 V2 ) ( dv
dv
1
)
2

D' V V2 D ' V
(V1 v1 ) (V2 v 2 )-d 1 (V2 v 2 )-d 1
D D D DD '
V V2 D D
SEPIC , V1 Vg , V2 V , CCM , V2 V1
Vg V1 D ' D'
DC component
D
V1 V1
V1 V2 D ' V1

D D DD '
CH7-157

SEPIC-Type CCM Switch Cell

D' V
(V1 v1 ) (V2 v 2 )-d 1
D DD '

CH7-158

79
 SEPIC-Type CCM Switch Cell
Perturbation & Linearization

Let d(t ) D d (t ), d '(t ) 1 d(t ) D ' d (t ), v1 (t ) Ts

V1 v1 (t ),

i1 (t ) Ts
I1 i1 (t ), v2 (t ) Ts
V2 v 2 (t ), i2 ( t ) Ts
I 2 i2 (t )
substitute into (7.137), obtain d '(t )
i2 (t ) Ts
i1 (t ) Ts
(7.137)
d (t )
(D d )(I i )=(D ' d )( I i )
2 2 1 1

D(I 2 i2 ) D'(I1 i1 )-d ( I1 I 2 ) ( di

di
1
)
2

D' I I D' I
(I 2 i2 ) (I1 i1 )-d 1 2 (I1 i1 )-d 2
D D D DD '
V D I1 D
SEPIC , V1 Vg , V2 V , CCM , 2 I1 I 2
V1 D ' I 2 D'
D
I2 I2
I1 I 2 D ' I
2
D D DD ' CH7-159

SEPIC-Type CCM Switch Cell

D' I
(I 2 i2 ) (I1 i1 )-d 2
D DD '

CH7-160

80
 SEPIC-Type CCM Switch Cell

Averaged switch network CH7-161

SEPIC-Type CCM Switch Cell

Fig. 7.39
i1(t) i2(t)
+ +
v1(t) v2(t)
- -

Switch network Averaged switch network

(a) Switch network (c) large-signal averaged switch model

+ i1(t) i2(t) +

v1(t) v1(t) i2(t) v2(t)

- -

Switch network Averaged switch network

(b) Switches are replaced by (d) dc and ac small-signal averaged
dependent sources switch network model
CH7-162

81
 SEPIC-Type CCM Switch Cell

Direction of diode in switch network is reverse

dc and small-signal ac averaged model of CCM SEPIC
CH7-163

SEPIC-Type CCM Switch Cell

Averaged switch model reveals that switch network

performs the functions of:
(i) transformation of dc & small-signal ac v and i levels
according to D:D conversion ratio
(ii) introduction of ac v and i variations into the converter
circuit, driven by control input d(t)
This model can be solved to determine steady-state
voltages & currents and small-signal transfer functions

CH7-164

82
 General Two-Switch Network

CH7-165

General Two-Switch Network

Vg v g (t ) V v (t )

VC v C I L iL

I1 i1 D ': D I 2 i2

V1
d (t ) I2
V1 v1 DD ' d (t ) V2 v2
DD '

CH7-166

83
 Boost Converter identified to Fig. 7.39(a)
Switch Network

v2 (t ) i ( t )
2

i1 (t )

v1 (t ) v(t )

I L iL I1 i1

V1 I2
d (t )
DD '
d (t ) DD ' V2 v2
Vg v g (t ) V1 v1 V v


D ': D I 2 i2

CH7-167

Buck switch network

Refer to P. 205

Boost switch network

General two-switch network CH7-168

84
 Small signal ac model P.205

boost

Buck-boost

CH7-169

Small signal ac model

SEPIC

CH7-170

85
 General two-switch network

CH7-171

iC dependent quantities

v1(t), i2(t) independent quantities

vCE, iC

i2 (t ) Ts

CH7-172

86
 i1 (t ) iC (t )
vCE, iC

1 1 1
i1(t ) Ts
tir i2 (t ) Ts
tif i2 (t ) T tvf i2 (t ) Ts
tvr i2 (t ) Ts
t1 i2 (t ) T
Ts 2 2 s s

CH7-173

CH7-174

87
 Ts tir tif tvf tvr t1 t2

1 1
v2 (t ) T v1(t ) T (tir v1(t ) Ts
tvf v1(t ) Ts
0 t1
s s
Ts 2
1
tvr v1(t ) T tif v1(t ) T t2 v1(t ) T )
2 s s s

1 1
tir tif 2 tvf 2 tvr t2
v1(t ) T 1
s
Ts
CH7-175

CH7-176

88
 turn on & turn off switching losses
1 1 1
Psw (t ir t vf ) v1 Ts i2 Ts (t vr t if ) v1 Ts i2 Ts
Ts 2 2
1 1 1 1
t ir t vf t vr t if
v1 T i2 T 2 2 2 2 1 (d d ) v i2
v i 1 Ts Ts
s s
Ts 2
Psw
1 1 1 1
1 t vf t vr t if t ir
( dv di ) 2 2 2 2
2 Ts
Remove on-state (t1) loss
CH7-177

DC component

V1=Vg, V2=V
CH7-178

89
CH7-179

CH7-180

90
CH7-181

CH7-182

91
 CH7-183

Let d (s) 0

Let v g (s) 0
CH7-184

92
CH7-185

CH7-186

93
CH7-187

CH7-188

94
CH7-189

CH7-190

95
 -

D'
Vg V
D
V
I
D' R

I V V
j( s) 2 (I )
D' D' R D' R CH7-191

CH7-192

96
Homework #14
Derivation of canonical model
parameters in Table 7.1 for ideal buck
and boost converters in CCM operation

CH7-193

CH7-194

97
 CH7-195

ton
d (t )
VM is constant Ts

1 ton
d (t ) vc (t ) kvc (t ) toff
VM

CH7-196

98
 V v c Vc v c
D d c
VM VM VM
V v d 1
D c , d c TF for PWM modulator
VM VM vc VM CH7-197

CH7-198

99
CH7-199

CH7-200

100
CH7-201

CH7-202

101