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08EC32 US

N
ODD SEMESTER B.E DEGREE EXAMINATION. DECEMBER 2010 / JANUARY 2011
Electronics & Communication Engineering
Analog Electronic Circuits (08EC32)
Time: 3Hrs Max. Marks:100
Instructions i. Answer one full question from each unit.
:
UNIT-I
1 a. Explain the load line analysis of diode. 05 Marks
.
b. For the circuit shown in fig.(1b). Determine the transfer characteristics & sketch 08 Marks
the O/P wave form.
c. Explain the working of full-wave Bridge rectifier with wave forms of equations. 07 Marks
2 a. Explain the fixed-bias circuit with equations.
06 Marks
.
b. Explain the working of Transistor as a switch 08 Marks
c. For the circuit shown in fig.(2c), determine
i) Collector current IC
ii) Base current IB 06 Marks
iii) VB & VC
iv) VBC
UNIT II
3 a. Obtain the re model of PNP transistor in CB configuration.
05 Marks
.
b. Perform ac analysis of voltage divider bias in CE configuration & derive 10 Marks
equations for Zi, Zo AV and AI
c. For the circuit shown in fig.(3c) Determine 05 Marks
i) re ii) Zi iii) Zo iv) Av
4 a. Derive an expression for Zi, Zo AV and AI for Emitter follower configuration.
10 Marks
.
b. Perform ac analysis of collector feedback configuration. 10 Marks
UNIT-III
5 a. Explain Low frequency response of a BJT amplifier. 10 Marks
b. Write a note on Miller Effect capacitance. 10 Marks

6. a. For the cascaded arrangement shown in fig.(6a), find


i) Gain of each stage ii) Overall gain 08 Marks
ii) Gain AVB iv) Current gain of each stage.
b. Derive Zif & Zof for voltage series feedback. 06 Marks
c. Explain the DC bias of Darlington circuit. 06 Marks
UNIT IV
7. a. Classify power amplifiers based on the location of the Q point, operating cycle 06 Marks
and efficiency.
b. A single transistor amplifier with a transformer coupled load produces harmonic
amplitudes in the output as B o=1.5mA, B1=120mA, B2=10mA, B3=4mA,
B4=2mA, B5=1mA determine
i) The percentage total harmonic distortion 05 Marks
ii) If a second identical transistor is used along with a transformer to
provide push pull operation, use the above harmonic amplitudes
required and determine the new total harmonic distortion.
c. With a neat circuit diagram, explain the working of a transistor colpitts oscillator 06 Marks
and also write the expression for its frequency of Oscillation.
d. Design the component values of a weins bridge oscillator for a frequency of 03 Marks
oscillation of 3 kHz.
8. a. With the help of a neat circuit diagram explain the working of a class-B push 10 Marks
pull amplifier. Obtain the expression for maximum conversion efficiency of this
amplifier.
b. A Quartz crystal has =0.12H, C=0.04PF, Cm=1 PF and R=9.2k find
i) Series resonant frequency 04 Marks
ii) Parallel resonant frequency
c. Draw a neat circuit diagram and calculate the operating frequency of a BJT RC
phase shift oscillator for R=6k, C=1500PF & Rc=18k. Determine the 06 Marks
minimum current gain (hfe) of the transistor required for sustained oscillations.
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UNIT V
9 a. Define the trans conductance gm of an FET and also derive an expression for 05 Marks
gm.
b. Derive the expressions for Zi, Zo and Av for a common drain JFET amplifier. 09 Marks
c. Determine Zi, Zo and Av for the circuit shown in fig.(9c) if Y fs=3000ms and 06 Marks
Yos=50ms.
10 a. Derive expressions for Zi, Zo and Av for an e-MOSFET in voltage divider bias 06 Marks
configuration.
b. The D C analysis of the source follower network shown in fig.(10b) results in
VGSQ= -2.86v AND idq=4.56mA. Determine i) gm (ii) rd (iii) Zi (iv) Zo (v) Av. Given 08 Marks
the JFET parameters IDSS= 16mA, VP=-4V and YOS=25ms.
c. Discuss the differences between FET and BJT 03 Marks
d. If a JFET has gm=6mV at VGS= -1V find IDSS if pinch-off voltage VP= -2.5V 03 Marks
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