Compal La 4951p r0.4 Schematics

A B C D E
1 1
Compal Confidential
2
Schematics Document 2
AUBURNDALE/CLARKSFIELD with
Intel IBEX PEAK-M core logic
3
Versace 3
2009-07-24
REV:0.4
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4951P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, July 28, 2009 Sheet 1 of 48
A B C D E
A B C D E
Compal Confidential
File Name : Versace Versace Accelerometer
LIS302DLTR
Page 31
Thermal Sensor Fan Control DDR3 1066/1333MHz 1.5V DDR3-SO-DIMM X 2
ADM1032 Page 4 Page 4
Mobile BANK 0, 1, 2, 3 Page 9
XDP Conn.
1 CPU Qual Core Channel A Page 4 1
Display Port X 2 PEG

(Docking) Page 29 MXM 3.0 Type A Connector Clarkesfield
Page 21 CK505
Socket-rPGA989 DDR3 1066/1333MHz 1.5V DDR3-SO-DIMM X 2 Clock Generator
BANK 0, 1, 2, 3 Page 10
37.5mm*37.5mm ICS9LPRS397
** Channel B
Page 4,5,6,7,8 Page 12
CRT to Docking CRT+USB X DP conn LCD conn
Page 29 2 CONN Page 19 Page 20 Page 20
USB x2(Docking)Page 33
DMI X4
Express Card 54 USB X 2 (For I/O) * USB x1(Sub/B for Exp Card)
Page 19
& Card Reader WLAN Card USB3.0 X 2 Page 34
Sub-board UPD720200F1
Page 24 Page 27
FingerPrinter VFM451 daughter board
Page 30
USB2.0 USB2.0 USBx1 Page 28
*
2
USB conn x 1 (For I/O) 2
PCI-E BUS Azalia
BT Conn USB x 1Page 26
PCI BUS
Intel Ibex Peak M USB x1(Camera)
SATA0 Page 20
10/100/1000 LAN
Intel Hanksville-LM 1071pins USB X1(WWAN Card)
82577LMPage 22 25mm*27mm Page 24
RICOH 835 SATA1
SATA2
MDC V1.5 RJ11Page
CONN
Page 32 Page 25 23
Page 13,14,15,16,17,18
92HD75
RJ45 CONN * Audio CKT
ONFI Interface
Sub-board Page 30
Page 23
1394 port Card Reader
Conn Braidwood SATA ODD Connector
Page 28 Page 13
3
Mini-Card 2.5" SATA HDD Connector LED 3
LPC BUS NAND Flash Page 13

Page 29
ESATA Connector
Page 13
Power OK CKT.
TPM1.2 SMSC KBC Super I/O *: We will inatll them on same sub Page 33
Docking CONN. SLB9635TT 1098 LPC47N217 board via a board to board
(2) PS/2 Interfaces Page 28 page 31 Page 33
connector.
(2) USB 2.channels
(2) SATA Channels (SATA3&4) **: Daughtor board for stack-up Power On/Off CKT.
(2) Display Port Channels Touch Pad CONN. Page 25
Page 25
USB CONN and VGA CONN.
(1) Serial Port
(1) Parallel Port C OM1 LPT
(1) Line In TrackPoint CONN. ( Docking ) ( Docking )
Int.KBD Page 28 Page 28 DC/DC Interface CKT.
(1) Line Out Page 25
Page 34
(1) RJ45 (10/100/1000) Page 25
4 (1) VGA SPI ROM 4
(1) 2 LAN indicator LED's 4MB X 2 Page 27

(1) Power Button
(1) I2C interface Security Classification Compal Secret Data Compal Electronics, Inc.
Block Diagram
Page. 27 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
A
( O MEANS ON X MEANS OFF ) Symbol Note :

Voltage Rails
+RTCVCC +B +5VALW +1.5V +5VS : means Digital Ground
+3VL +3VALW +0.75V +3VS
+1.5VS
power
plane +NVVDD : means Analog Ground
+VCCP
+CPU_CORE
+1.05VS
+1.8VS
State
Install below 43 level BOM structure for ver. 0.1

DEBUG@ : means just build when PCIE port 80 CARD function enable. Remove before MP
S0
O O O O O M92@ : Install for M92 Graphic controller
S1 8072@ : Install for 8072 NIC controller
O O O O O
S3
1098@ : Install for 1098 KBC controller
O O O O X
CK32@ : Install for 32 pin CLOCK GEN
S5 S4/AC
O O O X X
Install below 45 level BOM structure for ver. 0.1
S5 S4/ Battery only
O O X X X 45@ : means just put it in the BOM of 45 level.
S5 S4/AC & Battery
don't exist
O X X X X
1 1
Reserve below BOM structure for ver. 0.1

@ : means just reserve , no build
CONN@ : means ME part.
M93@ : Install for M93 Graphic controller
8075@ : Install for 8075 NIC controller
SMBUS Control Table 1091@ : Install for 1091 KBC controller
THERMAL CK72@ : Install for 72 pin CLOCK GEN

SOURCE BATT XDP SODIMM CLK CHIP MINI CARD DOCK NIC SENSOR G-SENSOR
SMB_EC_CK1
SMB_EC_DA1
SMSC1098 V X X X X X X X X
SMBCLK
SMBDATA
Calpella X V V V V V X X X
SML0CLK
SML0DATA
Calpella X X X X X X V X X
SML1CLK
SML1DATA
Calpella X X X X X X X V V

Notes List
A
5 4 3 2 1
Layout rule10mil width trace

Change
Thermal Sensor EMC2113 with CPU PWM FAN R10 to
length < 0.5", spacing 20mil
JCPU1B
Removed RP1 & RP3 connect to U3. 10/27
Layout note: 6.8K to R1 1 2 20_0402_1% AT23 COMP3
+3VS A16
1. Place C1 & C408 close to U1 pin. setup Q1 BCLK CLK_CPU_BCLK_P 16
MISC
R2 1 2 20_0402_1% AT24 B16
2. Place U1 close to JCFAN1. E-diode1. COMP2 BCLK# CLK_CPU_BCLK#_P 16
Change R5 to 22ohm
CLOCKS
U1 Add C408. 11/30 12/04 R3 1 2 49.9_0402_1% G16 AR30 CLK_CPU_XDP
from 68ohm. 11/30 COMP1 BCLK_ITP
2
EMC2113-2-AX_QFN16_4X4 AT30 CLK_CPU_XDP#

R5 R4 1 BCLK_ITP#
2 49.9_0402_1% AT26 COMP0
22_0402_5% H_THERMDC 1 16 REMOTE2+ E16
DN DP2/DN3 PEG_CLK CLK_EXP 14
PEG_CLK# D16 CLK_EXP# 14
1 2 H_THERMDA 2 15 REMOTE2- 1 2 PAD T1 TP_SKTOCC# AH24
1
C1 2200P_0402_50V7K DP DN2/DP3 2200P_0402_50V7K C408 SKTOCC#

A18
D +3VS_THER 3 14 R9 1 2 2.05K_0402_1%
DPLL_REF_SSCLK
A17 Intel doc 395136: D
VDD TRIP_SET DPLL_REF_SSCLK#
0.1U_0402_16V4Z
R35 1 2 10K_0402_5% +VCCP 1 2 H_CATERR# AK14 Remove R6 & R7 connect to GND directly. 11/06
CATERR#
THERMAL
C2
1 FAN_PWM 4 13 R10 1 2 6.8K_0402_5% +3VS R8 49.9_0402_1%

31 FAN_PWM PWM_IN SHDN_SEL
+3VS R13 1 2 10K_0402_5% 5 12 F6
ADDR_SEL GND SM_DRAMRST# SM_DRAMRST# 11
1 2 H_PECI_ISO AT15
2 16 H_PECI PECI
6 11 FAN_PWM_OUT R133 1 2 +3VS R11 0_0402_5% AL1 SM_RCOMP0 R12 1 2 100_0402_1%
16,21 THERM_SCI# ALERT# PWM SM_RCOMP[0]
10K_0402_5% AM1 SM_RCOMP1 R14 1 2 24.9_0402_1%
R18 1 TACH SM_RCOMP[1] SM_RCOMP2 R15
+3VS 2 7 SYS_SHDN# TACH 10 SM_RCOMP[2] AN1 1 2 130_0402_1%
@ 10K_0402_5% H_PROCHOT# 1 2 H_PROCHOT#_D AN26
GND
43 H_PROCHOT# PROCHOT#
8 9 SMB_CLK_S3 9,10,12,14,26 R16 0_0402_5% AN15 PM_EXTTS#0 R17 1 2 10K_0402_5% +VCCP
SMDATA SMCLK PM_EXT_TS#[0]
DDR3
MISC
AP15 PM_EXTTS#1 R19 1 2 0_0402_5%
PM_EXT_TS#[1] PM_EXTTS#1_R 9,10
H_THERMTRIP# 1 2 R20 1 2 10K_0402_5% +VCCP
17
R21 0_0402_5% H_THERMTRIP# 1 2 H_THERMTRIP#_R AK15
16 H_THERMTRIP# THERMTRIP#
Install R133. 7/14 R22 0_0402_5%
9,10,12,14,26 SMB_DATA_S3
AT28 XDP_PRDY#
PRDY#
Add PD R211 for FAN_PWM. 11/30 PREQ# AP27 XDP_PREQ# Place close to JCPU1.
FAN_PWM R211 1 2 10K_0402_5% AN28 XDP_TCK R23 1 2 @ 51_0402_5%
H_CPURST# TCK
1 2 H_CPURST#_R AP26 RESET_OBS# TMS AP28 XDP_TMS
PWR MANAGEMENT
R24 0_0402_5% AT27 XDP_TRST#
TRST#
JTAG & BPM

Q24 1 2 H_PM_SYNC_R AL15 AT29 XDP_TDI
15 H_PM_SYNC PM_SYNC TDI
2N7002_SOT23-3 R25 0_0402_5% AR27 XDP_TDO
TDO XDP_TDI_M
AR29
H_THERMTRIP# 1 H_CPUPW RGD 2 VCCPW RGOOD_1 AN14
TDI_M XDP_TDO_M Follow DIOR's design. 2/20
D
3 H_THERMTRIP#_U1 21 1 VCCPWRGOOD_1 TDO_M AP29

R26 0_0402_5%
AN25 XDP_DBRESET#
DBR# XDP_DBRESET# 13,15
H_CPUPW RGD 1 2 VCCPW RGOOD_0 AN27
G
16 H_CPUPW RGD
2
R27 0_0402_5% VCCPWRGOOD_0

PW R_GD 11,13,31,34
AJ22 XDP_BPM#0_R R126 1 2 0_0402_5% XDP_BPM#0
C BPM#[0] C
Change Q24.2 connect from +3VS to PWR_GD. 12/11 15 PM_DRAM_PWRGD 1 2 VDDPW RGOOD_R AK13 SM_DRAMPWROK BPM#[1] AK22 XDP_BPM#1_R R127 1 2 0_0402_5% XDP_BPM#1
R28 0_0402_5% AK24 XDP_BPM#2_R R141 1 2 0_0402_5% XDP_BPM#2
BPM#[2] XDP_BPM#3_R R142 0_0402_5% XDP_BPM#3
BPM#[3] AJ24 1 2
AM15 AJ25 XDP_BPM#4
REMOTE thermal sensor 34 VTTPWRGOOD VTTPWRGOOD BPM#[4]
BPM#[5] AH22
AK23
XDP_BPM#5
XDP_BPM#6
H_PWRGD_XDP 1 BPM#[6]
2 H_PW RGD_XDP_R AM26 TAPPWRGOOD BPM#[7] AH23 XDP_BPM#7
Layout note: R30 0_0402_5%
1. Place Q1 close to bottom DDR DIMM. 1 2 PLT_RST#_R AL14
Intel S3 16 BUF_PLT_RST# RSTIN#
1
C R31 1.5K_0402_1%
H_THERMDA 2 Q1
1
B MMBT3904W_SOT323-3
E R32 IC,AUB_CFD_rPGA,R1P0 +VCCP
Change from +1.5V. 7/8 Place close to JCPU1.
3
Layout Note: 750_0402_1%

2
C3 R33 2 1 1.5K_0402_1% VDDPW RGOOD_R

100P_0402_50V8J place near the hottest spot area for
11 VCCP_1.5VSPW RGD
Intel S3 H_PROCHOT#_D R29 1 2 68_0402_5%
2
R34 2 1 750_0402_1%
NB & top SODIMM.
1
H_THERMDC Change R33, R34 value. 7/10 VDDPW RGOOD_R R751 2 1 @ 1.1K_0402_1% +1.5VS_CPU_VDDQ
FAN Connector XDP Connector +VCCP

JXDP1
1 GND0 GND1 2
XDP_PREQ# 3 4
+3VS +5VS +5VS OBSFN_A0 OBSFN_C0 CFG8 5
XDP_PRDY# 5 6 H_CPURST#_R R36 1 2 @ 68_0402_5%
OBSFN_A1 OBSFN_C1 CFG9 5
7 GND2 GND3 8
B XDP_BPM#0 9 10 B
5 XDP_BPM#0 OBSDATA_A0 OBSDATA_C0 CFG0 5
XDP_BPM#1 11 12
10K_0402_5%
10K_0402_5%

2
13 GND4 GND5 14 Swap. 02/25 Remove R37, R38, R39. 2/17

No install R41. 7/14 XDP_BPM#2 15 16
XDP_BPM#3 17 18
5 XDP_BPM#3 CFG3 5
R40
R41
OBSDATA_A3 OBSDATA_C3
19 GND6 GND7 20
21 22 +VCCP +3VS XDP_TDO R42 1 2 51_0402_5%
5 CFG17 CFG10 5
1
JCFAN1 OBSFN_B0 OBSFN_D0

Remove D29 to 23 24
@
5 CFG16 OBSFN_B1 OBSFN_D1 CFG11 5

4 25 26
prevent FAN fully FAN_PWM_OUT 3
4 XDP_BPM#4 27
GND8 GND9
28
3 OBSDATA_B0 OBSDATA_D0 CFG4 5
2
turn issue. 7/2 TACH 2 2 GND 6 XDP_BPM#5 29 OBSDATA_B1 OBSDATA_D1 30 CFG5 5
1 5 31 32 R43
1 GND XDP_BPM#6 GND10 GND11 1K_0402_5%
33 OBSDATA_B2 OBSDATA_D2 34 CFG6 5
CONN@ ACES_50273-0040N-001 +VCCP XDP_BPM#7 35 36
OBSDATA_B3 OBSDATA_D3 CFG7 5
37 38
1
H_CPUPW RGD R45 GND12 GND13
1 2 1K_0402_5% H_CPUPW RGD_R 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40 CLK_CPU_XDP 2/20.
41 42 CLK_CPU_XDP#
13,15 PM_PWRBTN#_R HOOK1 ITPCLK#/HOOK5
43 VCC_OBS_AB VCC_OBS_CD 44 Delete R44, R46, R52, R53, R50 and
H_PWRGD_XDP R47 1 2 0_0402_5% 45 46 XDP_RST#_R R48 1 2 1K_0402_5% H_CPURST#
1 47
HOOK2 RESET#/HOOK6
48 XDP_DBRESET#_R R49 1 2 0_0402_5% XDP_DBRESET#
short XDP_TDI_M to XDP_TDO_M (pins
HOOK3 DBR#/HOOK7 AR29 and AP29 of JCPU1) like DIOR
49 GND14 GND15 50
C4 Disconnect from 51 52 XDP_TDO
PAD T90 SDA TD0
@ 0.1U_0402_16V4Z 53 54 XDP_TRST# R51 1 2 51_0402_5%
2 SMB_DATA/CLK_S3. 0206 PAD T91
55
SCL TRST#
56 XDP_TDI
XDP_TCK TCK1 TDI XDP_TMS
57 TCK0 TMS 58
59 GND16 GND17 60
SAMTE_BSH-030-01-L-D-A CONN@
XDP_RST#_R 1 2 PLT_RST#
A PLT_RST# 13,16,21,22,24,27,28,30 A
R54 @ 0_0402_5%

Clarksfield(1/5)-Thermal/XDP
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
D D
JCPU1E
RSVD32 AJ13
RSVD33 AJ12
AP25 RSVD1
Change net name. 7/9 AL25 RSVD2 RSVD34 AH25
AL24 RSVD3 RSVD35 AK26
AL22 RSVD4
V_CPU_DDR_REF0
AJ33 RSVD5 RSVD36 AL26
Layout ruletrace length < 0.5" V_CPU_DDR_REF1
AG9 RSVD6 RSVD_NCTF_37 AR2
M27 RSVD7
JCPU1A L28 AJ26
EXP_ICOMPI R55 RSVD8 RSVD38
PEG_ICOMPI B26 1 2 49.9_0402_1% J17 SA_DIMM_VREF RSVD39 AJ27
PEG_ICOMPO A26 H17 SB_DIMM_VREF
15 DMI_CRX_PTX_N0 A24 DMI_RX#[0] PEG_RCOMPO B27 G25 RSVD11
15 DMI_CRX_PTX_N1 C23 A25 EXP_RBIAS R56 1 2 750_0402_1% G17
DMI_RX#[1] PEG_RBIAS RSVD12
15 DMI_CRX_PTX_N2 B22 DMI_RX#[2] E31 RSVD13 RSVD_NCTF_40 AP1
15 DMI_CRX_PTX_N3 A21 K35 PCIE_CRX_GTX_C_N0 C662 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N0 21 E30 AT2
DMI_RX#[3] PEG_RX#[0] PCIE_CRX_GTX_C_N1 C663 0.1U_0402_16V4Z RSVD14 RSVD_NCTF_41
PEG_RX#[1] J34 1 2 PCIE_CRX_GTX_N1 21
15 DMI_CRX_PTX_P0 B24 J33 PCIE_CRX_GTX_C_N2 C664 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N2 21 AT3
DMI_RX[0] PEG_RX#[2] PCIE_CRX_GTX_C_N3 C665 0.1U_0402_16V4Z RSVD_NCTF_42
15 DMI_CRX_PTX_P1 D23 DMI_RX[1] PEG_RX#[3] G35 1 2 PCIE_CRX_GTX_N3 21 RSVD_NCTF_43 AR1
DMI
15 DMI_CRX_PTX_P2 B23 G32 PCIE_CRX_GTX_C_N4 C666 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N4 21 4 CFG7 CFG7

DMI_RX[2] PEG_RX#[4] PCIE_CRX_GTX_C_N5 C667 0.1U_0402_16V4Z CFG4
15 DMI_CRX_PTX_P3 A22 DMI_RX[3] PEG_RX#[5] F34 1 2 PCIE_CRX_GTX_N5 21 4 CFG4
F31 PCIE_CRX_GTX_C_N6 C668 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N6 21 4 CFG3 CFG3
C PEG_RX#[6] PCIE_CRX_GTX_C_N7 C669 0.1U_0402_16V4Z C
15 DMI_CTX_PRX_N0 D24 DMI_TX#[0] PEG_RX#[7] D35 1 2 PCIE_CRX_GTX_N7 21 4 CFG0 RSVD45 AL28
G24 E33 PCIE_CRX_GTX_C_N8 C670 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N8 21 R57 2 1 @ 3.01K_0402_1% CFG0 AM30 AL29
15 DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8] CFG[0] RSVD46
F23 C33 PCIE_CRX_GTX_C_N9 C671 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N9 21 4 CFG1 CFG1 AM28 AP30
H23 D32 PCIE_CRX_GTX_C_N10 C672 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N10 21 4 CFG2 CFG2 AP31 AP32
B32 PCIE_CRX_GTX_C_N11 C673 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N11 21 R58 2 1 @ 3.01K_0402_1% CFG3 AL32 AL27
PEG_RX#[11] PCIE_CRX_GTX_C_N12 C674 0.1U_0402_16V4Z R59 CFG4 CFG[3] RSVD49
15 DMI_CTX_PRX_P0 D25 DMI_TX[0] PEG_RX#[12] C31 1 2 PCIE_CRX_GTX_N12 21 2 1 @ 3.01K_0402_1% AL30 CFG[4] RSVD50 AT31
F24 B28 PCIE_CRX_GTX_C_N13 C675 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N13 21 4 CFG5 CFG5 AM31 AT32
15 DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] CFG[5] RSVD51
E23 B30 PCIE_CRX_GTX_C_N14 C676 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N14 21 4 CFG6 CFG6 AN29 AP33
G23 A31 PCIE_CRX_GTX_C_N15 C677 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N15 21 R60 2 1 3.01K_0402_1% CFG7 AM32 AR33
4 CFG8 CFG8 AK32 AT33
PCIE_CRX_GTX_C_P0 C678 0.1U_0402_16V4Z CFG9 CFG[8] RSVD_NCTF_54
J35 1 2 AK31 AT34
RESERVED
PEG_RX[0] PCIE_CRX_GTX_P0 21 4 CFG9 CFG[9] RSVD_NCTF_55
H34 PCIE_CRX_GTX_C_P1 C679 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_P1 21 4 CFG10 CFG10 AK28 AP35
PEG_RX[1] PCIE_CRX_GTX_C_P2 C680 0.1U_0402_16V4Z CFG11 CFG[10] RSVD_NCTF_56
PEG_RX[2] H33 1 2 PCIE_CRX_GTX_P2 21 4 CFG11 AJ28 CFG[11] RSVD_NCTF_57 AR35
E22 F35 PCIE_CRX_GTX_C_P3 C681 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_P3 21 4 XDP_BPM#0 R120 1 2 @ 0_0402_5% CFG12 AN30 AR32
FDI_TX#[0] PEG_RX[3] PCIE_CRX_GTX_C_P4 C682 0.1U_0402_16V4Z R122 @ 0_0402_5% CFG13 CFG[12] RSVD58
D21 FDI_TX#[1] PEG_RX[4] G33 1 2 PCIE_CRX_GTX_P4 21 4 XDP_BPM#1 1 2 AN32 CFG[13]
D19 E34 PCIE_CRX_GTX_C_P5 C683 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_P5 21 4 XDP_BPM#2 R123 1 2 @ 0_0402_5% CFG14 AJ32
FDI_TX#[2] PEG_RX[5] PCIE_CRX_GTX_C_P6 C684 0.1U_0402_16V4Z R125 @ 0_0402_5% CFG15 CFG[14]
D18 FDI_TX#[3] PEG_RX[6] F32 1 2 PCIE_CRX_GTX_P6 21 4 XDP_BPM#3 1 2 AJ29 CFG[15] RSVD_TP_59 E15
G21 D34 PCIE_CRX_GTX_C_P7 C685 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_P7 21 4 CFG16 CFG16 AJ30 F15
FDI_TX#[4] PEG_RX[7] CFG[16] RSVD_TP_60
PCI EXPRESS -- GRAPHICS
E19 F33 PCIE_CRX_GTX_C_P8 C686 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_P8 21 4 CFG17 CFG17 AK30 A2

FDI_TX#[5] PEG_RX[8] PCIE_CRX_GTX_C_P9 C687 0.1U_0402_16V4Z CFG18 CFG[17] KEY
F21 FDI_TX#[6] PEG_RX[9] B33 1 2 PCIE_CRX_GTX_P9 21 T16 PAD H16 RSVD_TP_86 RSVD62 D15
Intel(R) FDI
G18 D31 PCIE_CRX_GTX_C_P10 C688 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_P10 21 Add per XDP DG. 11/13 C15
FDI_TX#[7] PEG_RX[10] PCIE_CRX_GTX_C_P11 C689 0.1U_0402_16V4Z RSVD63 R63
PEG_RX[11] A32 1 2 PCIE_CRX_GTX_P11 21 RSVD64 AJ15 1 2 @ 0_0402_5%
C30 PCIE_CRX_GTX_C_P12 C690 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_P12 21 Change R120, R122, R123, AH15 R64 1 2 @ 0_0402_5%
PEG_RX[12] PCIE_CRX_GTX_C_P13 C691 0.1U_0402_16V4Z RSVD65
D22 A28 1 2 PCIE_CRX_GTX_P13 21
C21
FDI_TX[0] PEG_RX[13]
B29 PCIE_CRX_GTX_C_P14 C692 1 2 0.1U_0402_16V4Z R125 to NI. 11/30 B19
FDI_TX[1] PEG_RX[14] PCIE_CRX_GTX_P14 21 RSVD15
D20 A30 PCIE_CRX_GTX_C_P15 C693 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_P15 21 A19
FDI_TX[2] PEG_RX[15] RSVD16
C18 FDI_TX[3]
G22 L33 PCIE_CTX_GRX_C_N0 C5 1 2 0.1U_0402_16V4Z R68 1 2 @ 0_0402_5% A20
FDI_TX[4] PEG_TX#[0] PCIE_CTX_GRX_N0 21 RSVD17
E20 M35 PCIE_CTX_GRX_C_N1 C6 1 2 0.1U_0402_16V4Z R69 1 2 @ 0_0402_5% B20
FDI_TX[5] PEG_TX#[1] PCIE_CTX_GRX_N1 21 RSVD18
F20 M33 PCIE_CTX_GRX_C_N2 C7 1 2 0.1U_0402_16V4Z AA5
FDI_TX[6] PEG_TX#[2] PCIE_CTX_GRX_N2 21 RSVD_TP_66 M_CLK_A_DDR2 9
G19 M30 PCIE_CTX_GRX_C_N3 C8 1 2 0.1U_0402_16V4Z U9 AA4
FDI_TX[7] PEG_TX#[3] PCIE_CTX_GRX_N3 21 RSVD19 RSVD_TP_67 M_CLK_A_DDR#2 9
L31 PCIE_CTX_GRX_C_N4 C9 1 2 0.1U_0402_16V4Z T9 R8
B PEG_TX#[4] PCIE_CTX_GRX_N4 21 RSVD20 RSVD_TP_68 DDR_CKE2_DIMMA 9 B
R61 2 1 1K_0402_5% F17 K32 PCIE_CTX_GRX_C_N5 C10 1 2 0.1U_0402_16V4Z AD3
FDI_FSYNC[0] PEG_TX#[5] PCIE_CTX_GRX_N5 21 RSVD_TP_69 DDR_CS2_DIMMA# 9
E17 M29 PCIE_CTX_GRX_C_N6 C11 1 2 0.1U_0402_16V4Z AC9 AD2
FDI_FSYNC[1] PEG_TX#[6] PCIE_CTX_GRX_N6 21 RSVD21 RSVD_TP_70 M_A_ODT2 9
J31 PCIE_CTX_GRX_C_N7 C12 1 2 0.1U_0402_16V4Z AB9 AA2
PEG_TX#[7] PCIE_CTX_GRX_N7 21 RSVD22 RSVD_TP_71 M_CLK_A_DDR3 9
R65 2 1 1K_0402_5% C17 K29 PCIE_CTX_GRX_C_N8 C13 1 2 0.1U_0402_16V4Z AA1
FDI_INT PEG_TX#[8] PCIE_CTX_GRX_N8 21 RSVD_TP_72 M_CLK_A_DDR#3 9
H30 PCIE_CTX_GRX_C_N9 C14 1 2 0.1U_0402_16V4Z R9
PEG_TX#[9] PCIE_CTX_GRX_N9 21 RSVD_TP_73 DDR_CKE3_DIMMA 9
F18 H29 PCIE_CTX_GRX_C_N10 C15 1 2 0.1U_0402_16V4Z AG7
FDI_LSYNC[0] PEG_TX#[10] PCIE_CTX_GRX_N10 21 RSVD_TP_74 DDR_CS3_DIMMA# 9
D17 F29 PCIE_CTX_GRX_C_N11 C16 1 2 0.1U_0402_16V4Z C1 AE3
FDI_LSYNC[1] PEG_TX#[11] PCIE_CTX_GRX_N11 21 RSVD_NCTF_23 RSVD_TP_75 M_A_ODT3 9
E28 PCIE_CTX_GRX_C_N12 C17 1 2 0.1U_0402_16V4Z A3
PEG_TX#[12] PCIE_CTX_GRX_N12 21 RSVD_NCTF_24
D29 PCIE_CTX_GRX_C_N13 C18 1 2 0.1U_0402_16V4Z
PEG_TX#[13] PCIE_CTX_GRX_N13 21
Intel doc 395136: D27 PCIE_CTX_GRX_C_N14 C19 1 2 0.1U_0402_16V4Z V4
PEG_TX#[14] PCIE_CTX_GRX_N14 21 RSVD_TP_76 M_CLK_B_DDR2 10
C26 PCIE_CTX_GRX_C_N15 C20 1 2 0.1U_0402_16V4Z V5
PEG_TX#[15] PCIE_CTX_GRX_N15 21 RSVD_TP_77 M_CLK_B_DDR#2 10
Tie FDI_F(L)SYNC[0:1] RSVD_TP_78 N2 DDR_CKE2_DIMMB 10
L34 PCIE_CTX_GRX_C_P0 C21 1 2 0.1U_0402_16V4Z J29 AD5
via 1 1K to GND. (11/05) PEG_TX[0]
M34 PCIE_CTX_GRX_C_P1 C22 1 2 0.1U_0402_16V4Z
PCIE_CTX_GRX_P0 21
J28
RSVD26 RSVD_TP_79
AD7
DDR_CS2_DIMMB# 10
PEG_TX[1] PCIE_CTX_GRX_P1 21 RSVD27 RSVD_TP_80 M_B_ODT2 10
M32 PCIE_CTX_GRX_C_P2 C23 1 2 0.1U_0402_16V4Z W3
PEG_TX[2] PCIE_CTX_GRX_P2 21 RSVD_TP_81 M_CLK_B_DDR3 10
L30 PCIE_CTX_GRX_C_P3 C24 1 2 0.1U_0402_16V4Z A34 W2
PEG_TX[3] PCIE_CTX_GRX_P3 21 RSVD_NCTF_28 RSVD_TP_82 M_CLK_B_DDR#3 10
M31 PCIE_CTX_GRX_C_P4 C25 1 2 0.1U_0402_16V4Z A33 N3
PEG_TX[4] PCIE_CTX_GRX_P4 21 RSVD_NCTF_29 RSVD_TP_83 DDR_CKE3_DIMMB 10
K31 PCIE_CTX_GRX_C_P5 C26 1 2 0.1U_0402_16V4Z AE5
PEG_TX[5] PCIE_CTX_GRX_P5 21 RSVD_TP_84 DDR_CS3_DIMMB# 10
M28 PCIE_CTX_GRX_C_P6 C27 1 2 0.1U_0402_16V4Z C35 AD9
PEG_TX[6] PCIE_CTX_GRX_P6 21 RSVD_NCTF_30 RSVD_TP_85 M_B_ODT3 10
H31 PCIE_CTX_GRX_C_P7 C28 1 2 0.1U_0402_16V4Z B35
PEG_TX[7] PCIE_CTX_GRX_P7 21 RSVD_NCTF_31
K28 PCIE_CTX_GRX_C_P8 C29 1 2 0.1U_0402_16V4Z
PEG_TX[8] PCIE_CTX_GRX_P8 21
G30 PCIE_CTX_GRX_C_P9 C30 1 2 0.1U_0402_16V4Z AP34 R70 1 2 @ 0_0402_5%
PEG_TX[9] PCIE_CTX_GRX_P9 21 VSS
G29 PCIE_CTX_GRX_C_P10 C31 1 2 0.1U_0402_16V4Z
F28 PCIE_CTX_GRX_C_P11 C32 1 2 0.1U_0402_16V4Z
E27 PCIE_CTX_GRX_C_P12 C33 1 2 0.1U_0402_16V4Z
D28 PCIE_CTX_GRX_C_P13 C34 1 2 0.1U_0402_16V4Z
C27 PCIE_CTX_GRX_C_P14 C35 1 2 0.1U_0402_16V4Z IC,AUB_CFD_rPGA,R1P0
C25 PCIE_CTX_GRX_C_P15 C36 1 2 0.1U_0402_16V4Z
IC,AUB_CFD_rPGA,R1P0
A A

Clarksfield(2/5)-DMI/PEG/FDI
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
DDR_B_D[0..63]
DDR_A_D[0..63] 10 DDR_B_D[0..63]
9 DDR_A_D[0..63]
JCPU1D
JCPU1C
SB_CK[0] W8 M_CLK_B_DDR0 10
D AA6 W9 D
SA_CK[0] M_CLK_A_DDR0 9 SB_CK#[0] M_CLK_B_DDR#0 10
AA7 DDR_B_D0 B5 M3
SA_CK#[0] M_CLK_A_DDR#0 9 SB_DQ[0] SB_CKE[0] DDR_CKE0_DIMMB 10
P7 DDR_B_D1 A5
SA_CKE[0] DDR_CKE0_DIMMA 9 SB_DQ[1]
DDR_A_D0 A10 DDR_B_D2 C3
DDR_A_D1 SA_DQ[0] DDR_B_D3 SB_DQ[2]
C10 SA_DQ[1] B3 SB_DQ[3] SB_CK[1] V7 M_CLK_B_DDR1 10
DDR_A_D2 C7 DDR_B_D4 E4 V6
SA_DQ[2] SB_DQ[4] SB_CK#[1] M_CLK_B_DDR#1 10
DDR_A_D3 A7 Y6 DDR_B_D5 A6 M2
SA_DQ[3] SA_CK[1] M_CLK_A_DDR1 9 SB_DQ[5] SB_CKE[1] DDR_CKE1_DIMMB 10
DDR_A_D4 B10 Y5 DDR_B_D6 A4
SA_DQ[4] SA_CK#[1] M_CLK_A_DDR#1 9 SB_DQ[6]
DDR_A_D5 D10 P6 DDR_B_D7 C4
SA_DQ[5] SA_CKE[1] DDR_CKE1_DIMMA 9 SB_DQ[7]
DDR_A_D6 E10 DDR_B_D8 D1
A8 SA_DQ[7] D2 SB_DQ[9]
DDR_A_D8 D8 DDR_B_D10 F2 AB8
SA_DQ[8] SB_DQ[10] SB_CS#[0] DDR_CS0_DIMMB# 10
DDR_A_D9 F10 AE2 DDR_B_D11 F1 AD6
SA_DQ[9] SA_CS#[0] DDR_CS0_DIMMA# 9 SB_DQ[11] SB_CS#[1] DDR_CS1_DIMMB# 10
DDR_A_D10 E6 AE8 DDR_B_D12 C2
SA_DQ[10] SA_CS#[1] DDR_CS1_DIMMA# 9 SB_DQ[12]
DDR_A_D11 F7 DDR_B_D13 F5
E9 SA_DQ[12] F3 SB_DQ[14]
DDR_A_D13 B7 DDR_B_D15 G4 AC7
SA_DQ[13] SB_DQ[15] SB_ODT[0] M_B_ODT0 10
DDR_A_D14 E7 AD8 DDR_B_D16 H6 AD1
SA_DQ[14] SA_ODT[0] M_A_ODT0 9 SB_DQ[16] SB_ODT[1] M_B_ODT1 10
DDR_A_D15 C6 AF9 DDR_B_D17 G2
SA_DQ[15] SA_ODT[1] M_A_ODT1 9 SB_DQ[17]
DDR_A_D16 H10 DDR_B_D18 J6
G8 SA_DQ[17] J3 SB_DQ[19]
DDR_A_D18 K7 DDR_B_D20 G1
DDR_A_D19 SA_DQ[18] DDR_B_D21 SB_DQ[20] DDR_B_DM0
J8 SA_DQ[19] G5 SB_DQ[21] SB_DM[0] D4
DDR_A_D20 G7 DDR_B_D22 J2 E1 DDR_B_DM1
DDR_A_D21 SA_DQ[20] DDR_B_D23 SB_DQ[22] SB_DM[1] DDR_B_DM2
G10 SA_DQ[21] J1 SB_DQ[23] SB_DM[2] H3
DDR_A_D22 J7 B9 DDR_A_DM0 DDR_B_D24 J5 K1 DDR_B_DM3 DDR_B_DM[0..7]
SA_DQ[22] SA_DM[0] SB_DQ[24] SB_DM[3] DDR_B_DM[0..7] 10
DDR_A_D23 J10 D7 DDR_A_DM1 DDR_B_D25 K2 AH1 DDR_B_DM4
DDR_A_D24 SA_DQ[23] SA_DM[1] DDR_A_DM2 DDR_B_D26 SB_DQ[25] SB_DM[4] DDR_B_DM5
L7 SA_DQ[24] SA_DM[2] H7 L3 SB_DQ[26] SB_DM[5] AL2
DDR_A_D25 M6 M7 DDR_A_DM3 DDR_A_DM[0..7] DDR_B_D27 M1 AR4 DDR_B_DM6
SA_DQ[25] SA_DM[3] DDR_A_DM[0..7] 9 SB_DQ[27] SB_DM[6]
DDR_A_D26 M8 AG6 DDR_A_DM4 DDR_B_D28 K5 AT8 DDR_B_DM7
DDR_A_D27 SA_DQ[26] SA_DM[4] DDR_A_DM5 DDR_B_D29 SB_DQ[28] SB_DM[7]
L9 SA_DQ[27] SA_DM[5] AM7 K4 SB_DQ[29]
DDR_A_D28 L6 AN10 DDR_A_DM6 DDR_B_D30 M4
C DDR_A_D29 SA_DQ[28] SA_DM[6] DDR_A_DM7 DDR_B_D31 SB_DQ[30] C
K8 SA_DQ[29] SA_DM[7] AN13 N5 SB_DQ[31]
DDR_A_D30 N8 DDR_B_D32 AF3
P9 SA_DQ[31] AG1 SB_DQ[33]
DDR_A_D32 AH5 DDR_B_D34 AJ3 D5 DDR_B_DQS#0
DDR_A_D33 SA_DQ[32] DDR_B_D35 SB_DQ[34] SB_DQS#[0] DDR_B_DQS#1
AF5 SA_DQ[33] AK1 SB_DQ[35] SB_DQS#[1] F4
DDR_A_D34 AK6 C9 DDR_A_DQS#0 DDR_B_D36 AG4 J4 DDR_B_DQS#2
DDR SYSTEM MEMORY A
DDR_A_D35 SA_DQ[34] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D37 SB_DQ[36] SB_DQS#[2] DDR_B_DQS#3 DDR_B_DQS#[0..7]

AK7 SA_DQ[35] SA_DQS#[1] F8 AG3 SB_DQ[37] SB_DQS#[3] L4 DDR_B_DQS#[0..7] 10
DDR_A_D36 AF6 J9 DDR_A_DQS#2 DDR_B_D38 AJ4 AH2 DDR_B_DQS#4
SA_DQ[36] SA_DQS#[2] SB_DQ[38] SB_DQS#[4]
DDR SYSTEM MEMORY - B

DDR_A_D37 AG5 N9 DDR_A_DQS#3 DDR_B_D39 AH4 AL4 DDR_B_DQS#5
DDR_A_D38 SA_DQ[37] SA_DQS#[3] DDR_A_DQS#4 DDR_A_DQS#[0..7] DDR_B_D40 SB_DQ[39] SB_DQS#[5] DDR_B_DQS#6
AJ7 SA_DQ[38] SA_DQS#[4] AH7 DDR_A_DQS#[0..7] 9 AK3 SB_DQ[40] SB_DQS#[6] AR5
DDR_A_D39 AJ6 AK9 DDR_A_DQS#5 DDR_B_D41 AK4 AR8 DDR_B_DQS#7
DDR_A_D40 SA_DQ[39] SA_DQS#[5] DDR_A_DQS#6 DDR_B_D42 SB_DQ[41] SB_DQS#[7]
AJ10 SA_DQ[40] SA_DQS#[6] AP11 AM6 SB_DQ[42]
DDR_A_D41 AJ9 AT13 DDR_A_DQS#7 DDR_B_D43 AN2
DDR_A_D42 SA_DQ[41] SA_DQS#[7] DDR_B_D44 SB_DQ[43]
AL10 SA_DQ[42] AK5 SB_DQ[44]
DDR_A_D43 AK12 DDR_B_D45 AK2
AK8 SA_DQ[44] AM4 SB_DQ[46]
DDR_A_D45 AL7 DDR_B_D47 AM3
DDR_A_D46 SA_DQ[45] DDR_A_DQS0 DDR_B_D48 SB_DQ[47] DDR_B_DQS0
AK11 SA_DQ[46] SA_DQS[0] C8 AP3 SB_DQ[48] SB_DQS[0] C5
DDR_A_D47 AL8 F9 DDR_A_DQS1 DDR_B_D49 AN5 E3 DDR_B_DQS1
DDR_A_D48 SA_DQ[47] SA_DQS[1] DDR_A_DQS2 DDR_B_D50 SB_DQ[49] SB_DQS[1] DDR_B_DQS2
AN8 SA_DQ[48] SA_DQS[2] H9 AT4 SB_DQ[50] SB_DQS[2] H4
DDR_A_D49 AM10 M9 DDR_A_DQS3 DDR_A_DQS[0..7] DDR_B_D51 AN6 M5 DDR_B_DQS3 DDR_B_DQS[0..7]
SA_DQ[49] SA_DQS[3] DDR_A_DQS[0..7] 9 SB_DQ[51] SB_DQS[3] DDR_B_DQS[0..7] 10
DDR_A_D50 AR11 AH8 DDR_A_DQS4 DDR_B_D52 AN4 AG2 DDR_B_DQS4
AL11 SA_DQ[51] SA_DQS[5] AK10 AN3 SB_DQ[53] SB_DQS[5] AL5
DDR_A_D52 AM9 AN11 DDR_A_DQS6 DDR_B_D54 AT5 AP5 DDR_B_DQS6
AN9 SA_DQ[53] SA_DQS[7] AR13 AT6 SB_DQ[55] SB_DQS[7] AR7
DDR_A_D54 AT11 DDR_B_D56 AN7
AP12 SA_DQ[55] AP6 SB_DQ[57]
DDR_A_D56 AM12 DDR_B_D58 AP8
AN12 SA_DQ[57] AT9 SB_DQ[59]
DDR_A_D58 AM13 Y3 DDR_A_MA0 DDR_B_D60 AT7
DDR_A_D59 SA_DQ[58] SA_MA[0] DDR_A_MA1 DDR_B_D61 SB_DQ[60]
AT14 SA_DQ[59] SA_MA[1] W1 AP9 SB_DQ[61]
DDR_A_D60 AT12 AA8 DDR_A_MA2 DDR_B_D62 AR10
B DDR_A_D61 SA_DQ[60] SA_MA[2] DDR_A_MA3 DDR_B_D63 SB_DQ[62] DDR_B_MA0 B
AL13 SA_DQ[61] SA_MA[3] AA3 AT10 SB_DQ[63] SB_MA[0] U5
DDR_A_D62 AR14 V1 DDR_A_MA4 DDR_A_MA[0..15] V2 DDR_B_MA1
SA_DQ[62] SA_MA[4] DDR_A_MA[0..15] 9 SB_MA[1] DDR_B_MA[0..15]
DDR_A_D63 AP14 AA9 DDR_A_MA5 T5 DDR_B_MA2
SA_DQ[63] SA_MA[5] SB_MA[2] DDR_B_MA[0..15] 10
V8 DDR_A_MA6 V3 DDR_B_MA3
SA_MA[6] DDR_A_MA7 SB_MA[3] DDR_B_MA4
SA_MA[7] T1 SB_MA[4] R1
Y9 DDR_A_MA8 AB1 T8 DDR_B_MA5
SA_MA[8] 10 DDR_B_BS0 SB_BS[0] SB_MA[5]
AC3 U6 DDR_A_MA9 W5 R2 DDR_B_MA6
9 DDR_A_BS0 SA_BS[0] SA_MA[9] 10 DDR_B_BS1 SB_BS[1] SB_MA[6]
AB2 AD4 DDR_A_MA10 R7 R6 DDR_B_MA7
9 DDR_A_BS1 SA_BS[1] SA_MA[10] 10 DDR_B_BS2 SB_BS[2] SB_MA[7]
U7 T2 DDR_A_MA11 R4 DDR_B_MA8
9 DDR_A_BS2 SA_BS[2] SA_MA[11] SB_MA[8]
U3 DDR_A_MA12 R5 DDR_B_MA9
SA_MA[12] DDR_A_MA13 SB_MA[9] DDR_B_MA10
SA_MA[13] AG8 10 DDR_B_CAS# AC5 SB_CAS# SB_MA[10] AB5
T3 DDR_A_MA14 Y7 P3 DDR_B_MA11
SA_MA[14] 10 DDR_B_RAS# SB_RAS# SB_MA[11]
AE1 V9 DDR_A_MA15 AC6 R3 DDR_B_MA12
9 DDR_A_CAS# SA_CAS# SA_MA[15] 10 DDR_B_W E# SB_WE# SB_MA[12]
AB3 AF7 DDR_B_MA13
9 DDR_A_RAS# SA_RAS# SB_MA[13]
AE9 P5 DDR_B_MA14
9 DDR_A_W E# SA_WE# SB_MA[14]
N1 DDR_B_MA15
SB_MA[15]
A A

Clarksfield(2/6)-DDR3 A/B CH
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
JCPU1F
JCPU1G
AT21 VAXG1
AT19 VAXG2 VAXG_SENSE AR22
+VCCP
SENSE
LINES
AT18 AT22
48A 18A Chnage 10uF to 22uF for DB1. +VCCP AT16
VAXG3 VSSAXG_SENSE
VAXG4
12/03 AR21 VAXG5
D AG35 AH14 AR19 D
VCC1 VTT0_1 VAXG6
AG34 VCC2 VTT0_2 AH12 AR18 VAXG7 15A
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C37
C38
C39
C40
C41
AG33 AH11 @ @ AR16 AM22
VCC3 VTT0_3 VAXG8 GFX_VID[0]
10U_0805_6.3V6M
10U_0805_6.3V6M
C42
C43
C44
C45
C46
C47
C48
C49
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
47P_0402_50V8J
AG32 AH10 1 1 1 1 1 1 1 1 1 AP21 AP22
GRAPHICS VIDs
AG31 VCC5 VTT0_5 J14 AP19 VAXG10 GFX_VID[2] AN22
AG30 VCC6 VTT0_6 J13 AP18 VAXG11 GFX_VID[3] AP23
1
AG29 VCC7 VTT0_7 H14 AP16 VAXG12 GFX_VID[4] AM23
2 2 2 2 2 2 2 2 2
AG28 VCC8 VTT0_8 H12 AN21 VAXG13 GFX_VID[5] AP24
GRAPHICS
AG27 G14 AN19 AN24
2
@
AG26 VCC10 VTT0_10 G13 AN18 VAXG15
AF35 VCC11 VTT0_11 G12 AN16 VAXG16
AF34 G11 AM21 AR25 R71 1 2 4.7K_0402_5%
AF33
AF32
VCC12
VCC13
VTT0_12
VTT0_13 F14
F13
AM19
AM18
VAXG17
VAXG18
GFX_VR_EN
GFX_DPRSLPVR AT25
AM24
R72
R73
1
2
2 @ 10K_0402_5%
1 1K_0402_5%
Intel S3
VCC14 VTT0_14 VAXG19 GFX_IMON
AF31 VCC15 VTT0_15 F12 AM16 VAXG20
AF30 F11 AL21 +1.5VS_CPU_VDDQ
VCC16 VTT0_16 VAXG21
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
AF29 VCC17 VTT0_17 E14 AL19 VAXG22
C50
C51
C52
C53
AF28 VCC18 VTT0_18 E12 1 1 1 1 AL18 VAXG23
AF27 VCC19 VTT0_19 D14 AL16 VAXG24
AF26 D13 AK21 AJ1
Remove C54. 7/14

VCC20 1.1V RAIL POWER VTT0_20 VAXG25 VDDQ1
AD35 VCC21 VTT0_21 D12 AK19 VAXG26 VDDQ2 AF1
2 2 2 2
22U_0805_6.3V6M
22U_0805_6.3V6M
- 1.5V RAILS
AD34 VCC22 VTT0_22 D11 AK18 VAXG27 VDDQ3 AE7
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
AD33 VCC23 VTT0_23 C14 AK16 VAXG28 VDDQ4 AE4
C55
C56
C57
C58
C59
C60
C61
AD32 VCC24 VTT0_24 C13 AJ21 VAXG29 VDDQ5 AC1 1 1 1 1 1 1 1
AD31 VCC25 VTT0_25 C12 AJ19 VAXG30 VDDQ6 AB7
AD30 VCC26 VTT0_26 C11 AJ18 VAXG31 VDDQ7 AB4
AD29 VCC27 VTT0_27 B14 AJ16 VAXG32 VDDQ8 Y1
2 2 2 2 2 2 2
AD28 VCC28 VTT0_28 B12 AH21 VAXG33 VDDQ9 W7
POWER
AD27 VCC29 VTT0_29 A14 AH19 VAXG34 3A VDDQ10 W4
AD26 VCC30 VTT0_30 A13 AH18 VAXG35 VDDQ11 U1
AC35 A12 +VCCP AH16 T7
VCC31 VTT0_31 VAXG36 VDDQ12
AC34 VCC32 VTT0_32 A11 VDDQ13 T4
C AC33 P1 C
VCC33 +VCCP VDDQ14
AC32 VCC34 VDDQ15 N7
AC31 VCC35 VDDQ16 N4 Chnage 10uF to 22uF DB1. 12/16
DDR3
AC30 VCC36 VTT0_33 AF10 VDDQ17 L1
22U_0805_6.3V6M
22U_0805_6.3V6M
AC29 VCC37 VTT0_34 AE10 J24 VTT1_45 VDDQ18 H1
FDI
C62
C63
AC28 VCC38 VTT0_35 AC10 1 1 Chnage 10uF J23 VTT1_46 +VCCP
CPU CORE SUPPLY
22U_0805_6.3V6M
22U_0805_6.3V6M
AC27 VCC39 VTT0_36 AB10 H25 VTT1_47
AC26 Y10 to 22uF for
VCC40 VTT0_37
C64
C65
AA35 VCC41 VTT0_38 W10 DB1. 12/03 1 1
2 2
AA34 VCC42 VTT0_39 U10 Chnage 10uF VTT0_59 P10
AA33 T10 +VCCP N10
VCC43 VTT0_40 to 22uF for VTT0_60
10U_0805_6.3V6M
10U_0805_6.3V6M
AA32 VCC44 VTT0_41 J12 VTT0_61 L10
2 2
AA31 VCC45 VTT0_42 J11 DB1. 12/03 VTT0_62 K10
C66
C67
AA30 J16 +VTT_43 R74 1 2 0_0603_5% 1 1
VCC46 VTT0_43 +VTT_44 R75 +VCCP
AA29 VCC47 VTT0_44 J15 1 2 0_0603_5%
AA28 +VCCP
VCC48
AA27 VCC49 2 2
1.1V
AA26 VCC50 VTT1_63 J22
Y35 VCC51 K26 VTT1_48 VTT1_64 J20
22U_0805_6.3V6M
22U_0805_6.3V6M
Y34 VCC52 J27 VTT1_49 VTT1_65 J18
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PEG & DMI
C68
C69
Y33 VCC53 J26 VTT1_50 VTT1_66 H21 1 1
Y32 VCC54 J25 VTT1_51 VTT1_67 H20
C70
C71
C72
C73
Y31 VCC55 1 1 1 1 H27 VTT1_52 VTT1_68 H19
Y30 VCC56 G28 VTT1_53 +1.8VS 2 2
Y29 VCC57 G27 VTT1_54
Y28 VCC58 G26 VTT1_55
2 2 2 2
Y27 VCC59 F26 VTT1_56
Y26 VCC60 E26 VTT1_57 VCCPLL1 L26
1.8V
V35 VCC61 PSI# AN33 PSI# 43 E25 VTT1_58 VCCPLL2 L27
V34 0.6A M26
POWER
VCC62 VCCPLL3
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2.2U_0603_6.3V4Z
4.7U_0603_6.3V6K
22U_0805_6.3V6M
V33 VCC63 H_VID[0..6] 43
C74
C75
C76
C77
C78
V32 AK35 H_VID0 1 1 1 1 1
B VCC64 VID[0] H_VID1 B
V31 VCC65 VID[1] AK33
V30 AK34 H_VID2
VCC66 VID[2] H_VID3
V29 VCC67 VID[3] AL35 Chnage 10uF
CPU VIDS
H_VID4 2 2 2 2 2
V28 VCC68 VID[4] AL33
V27 AM33 H_VID5 to 22uF for
VCC69 VID[5] H_VID6 IC,AUB_CFD_rPGA,R1P0
V26 VCC70 VID[6] AM35 DB1. 12/03
U35 AM34 PM_DPRSLPVR_R R76 1 2 0_0402_5%
VCC71 PROC_DPRSLPVR PROC_DPRSLPVR 43
U34 VCC72
U33 VCC73
U32 VCC74
U31 VCC75 VTT_SELECT G15 H_VTTVID1 40 Close to CPU
U30 VCC76
U29 +CPU_CORE
VCC77
U28 VCC78
H_VTTVID1 = Low, 1.1V
U27 VCC_SENSE R77 1 2 100_0402_1%
VCC79
U26 VCC80
H_VTTVID1 = High, 1.05V
R35 VSS_SENSE R78 1 2 100_0402_1%
VCC81
R34 VCC82
R33 VCC83 Update 10/27
R32 VCC84 ISENSE AN35 IMVP_IMON 43
R31 VCC85
R30 VCC86
R29 VCC87 VCC_SENSE R79 2 0_0402_5% VCCSENSE
SENSE LINES
R28 VCC88 VCC_SENSE AJ34 1 VCCSENSE 43

R27 AJ35 VSS_SENSE R80 1 2 0_0402_5% VSSSENSE
VCC89 VSS_SENSE VSSSENSE 43
R26 VCC90
P35 VCC91
Del C81, C82. 5/15
P34 VCC92 VTT_SENSE B15 VTT_SENSE 40
P33 VCC93 VSS_SENSE_VTT A15 VSS_SENSE_VTT 40
P32 +CPU_CORE
VCC94
P31 VCC95
P30 VCC96
A P29 A
VCC97
P28 VCC98
1 C79
1 C80
47P_0402_50V8J
47P_0402_50V8J
P27 VCC99
P26 VCC100

2
2
@
Clarksfield(4/5)-PWR
IC,AUB_CFD_rPGA,R1P0 Size Document Number R ev
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
JCPU1H JCPU1I
AT20 VSS1 VSS81 AE34

AT17 VSS2 VSS82 AE33
AR31 VSS3 VSS83 AE32 K27 VSS161
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
C83
C84
C85
C86
C87
C88
C89
C90
C91
C92
C93
C94
C95
C96
C97
C98
C99
C100
C101
C102
C103
C104
AR23 VSS7 VSS87 AE28 J32 VSS165 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
AR20 VSS8 VSS88 AE27 J30 VSS166
D AR17 AE26 J21 D
VSS9 VSS89 VSS167
AR15 VSS10 VSS90 AE6 J19 VSS168 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
AR12 VSS11 VSS91 AD10 H35 VSS169
AR9 VSS12 VSS92 AC8 H32 VSS170
AP20 VSS15 VSS95 AB35 H24 VSS173
AP4 AB30 H11 +CPU_CORE
VSS20 VSS100 VSS178
AP2 VSS21 VSS101 AB29 H8 VSS179 Add for debug. 5/13
AN34 VSS22 VSS102 AB28 H5 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181
AN23 VSS24 VSS104 AB26 G34 VSS182
AN20 VSS25 VSS105 AB6 G31 VSS183
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
AN17 VSS26 VSS106 AA10 G20 VSS184
AM29 VSS27 VSS107 Y8 G9 VSS185
C105
C106
C107
C108
C109
C110
C111
C112
C113
C114
C712
C713
C714
AM27 VSS28 VSS108 Y4 G6 VSS186 1 1 1 1 1 1 1 1 1 1 1 1 1
AM25 VSS29 VSS109 Y2 G3 VSS187
AM20 VSS30 VSS110 W35 F30 VSS188
AM17 VSS31 VSS111 W34 F27 VSS189 2 2 2 2 2 2 2 2 2 2 2 2 2
AM2 VSS36 VSS116 W29 E35 VSS194
AL34 W28 E32
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E29
E24
VSS195
VSS196
VSS197
VSS
AL20 VSS40 VSS120 W6 E21 VSS198
C AL17 V10 E18 C
VSS41 VSS121 VSS199
AL12 VSS42 VSS122 U8 E13 VSS200
AL3 VSS45 VSS125 T35 E5 VSS203
AK29 T34 E2 AT35 VSS_NCTF1_R Install for
VSS46 VSS126 VSS204 VSS_NCTF1 VSS_NCTF2_R T17 +CPU_CORE
AK27 T33 D33 AT1
AK25
VSS47 VSS127
T32 D30
VSS205 VSS_NCTF2
AR34 VSS_NCTF3_R T18 DB1. 12/03
VSS48 VSS128 VSS206 VSS_NCTF3 VSS_NCTF4_R T19
AK20 VSS49 VSS129 T31 D26 VSS207 VSS_NCTF4 B34
VSS_NCTF5_R T20
AK17 T30 D9 B2
NCTF
VSS50 VSS130 VSS208 VSS_NCTF5 VSS_NCTF6_R T21
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1
VSS_NCTF7_R T22
AJ23 VSS52 VSS132 T28 D3 VSS210 VSS_NCTF7 A35
T23
C115
330U_X_2VM_R6M
C116
330U_X_2VM_R6M
C117
330U_X_2VM_R6M
C118
330U_X_2VM_R6M
C119
330U_X_2VM_R6M
C120
330U_X_2VM_R6M
AJ20 VSS53 VSS133 T27 C34 VSS211 1 1 1 1 1 1
AJ17 VSS54 VSS134 T26 C32 VSS212
AJ14 T6 C29 + + + + + +
VSS55 VSS135 VSS213
AJ11 VSS56 VSS136 R10 C28 VSS214
AJ8 VSS57 VSS137 P8 C24 VSS215 2 2 2 2 2 2
AJ5 VSS58 VSS138 P4 C22 VSS216
AJ2 VSS59 VSS139 P2 C20 VSS217
AH35 VSS60 VSS140 N35 C19 VSS218
AH34 VSS61 VSS141 N34 C16 VSS219
AH33 VSS62 VSS142 N33 B31 VSS220
AH27 N27 B11
AH26
VSS68
VSS69
VSS148
VSS149 N26 B8
VSS226
VSS227
Chnage 330uF ESR from 7m to 6m for DB1. 12/16
AH17 VSS71 VSS151 M10 B4 VSS229
AH13 VSS72 VSS152 L35 A29 VSS230
B AH9 L32 A27 B
VSS73 VSS153 VSS231
AG10 VSS76 VSS156 L5
AF8 VSS77 VSS157 L2
AF4 VSS78 VSS158 K34
AF2 VSS79 VSS159 K33
AE35 VSS80 VSS160 K30
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0
A A

Clarksfield(5/5)-GND/Bypass
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
V_DDR_CPU_REF0 V_DDR_CPU_REF_DA
1. Remove R682, R683. 4/30 DDR3
JDIMM1
SO-DIMM A
+1.5V +1.5V V_DDR_CPU_REF_DA
3A @1.5V 2. Change R81 & R83 to 1K to another divider. CONN@ FOX_AS0A626-J8SG-7H
R82 1 2 0_0402_5% 1 VREF_DQ
V_DDR_CPU_REF0 VSS1 2 DDR_A_D4
3. Install R82, R84. 3 VSS2 DQ4 4
DDR3 SO-DIMM A DDR_A_D0 5 DQ0 DQ5 6
DDR_A_D5
C121
0.1U_0402_16V4Z
C122
2.2U_0402_6.3V6M
JDIMM2 DDR_A_D1 7 DQ1
CONN@ FOX_AS0A626-U4SG-7H +1.5V VSS3 8 DDR_A_DQS#0
R84
Layout Note: Place near JDIMM1 1 1 9 VSS4 DQS#0 10
1 2 0_0402_5% 1 VREF_DQ VSS1 2
DDR_A_DM0 11 DM0 DQS0 12
DDR_A_DQS0
3 DDR_A_D4
DDR_A_D0 VSS2 DQ4 4 DDR_A_D5 DDR_A_D2
13 VSS5 VSS6 14 DDR_A_D6
5 DQ0 DQ5 6 15 DQ2 DQ6 16
2 2
C123
0.1U_0402_16V4Z
C124
2.2U_0402_6.3V6M
C126
10U_0603_6.3V6M
C127
10U_0603_6.3V6M
C130
10U_0603_6.3V6M
C131
10U_0603_6.3V6M
C132
10U_0603_6.3V6M
C133
10U_0603_6.3V6M
C134
0.1U_0201_6.3V6K
C135
0.1U_0201_6.3V6K
C136
0.1U_0201_6.3V6K
C137
0.1U_0201_6.3V6K
C125
330U_X_2VM_R6M
DDR_A_D1 7 DDR_A_D3 DDR_A_D7
DQ1 VSS3 8 DDR_A_DQS#0
1 17 DQ3 DQ7 18
1 1 9 VSS4 DQS#0 10 1 1 1 1 1 1 1 1 1 1 19 VSS7 VSS8 20
DDR_A_DM0 11 DDR_A_DQS0 + DDR_A_D8 DDR_A_D12
DM0 DQS0 12 DDR_A_D9
21 DQ8 DQ12 22 DDR_A_D13
13 VSS5 VSS6 14 23 DQ9 DQ13 24
D DDR_A_D2 15 DDR_A_D6 @ @ @ D
2 2 DDR_A_D3 DQ2 DQ6 16 DDR_A_D7 2 2 2 2 2 2 2 2 2 2 2 DDR_A_DQS#1
25 VSS9 VSS10 26 DDR_A_DM1
17 DQ3 DQ7 18 27 DQS#1 DM1 28
19 DDR_A_DQS1 DRAMRST#
DDR_A_D8 VSS7 VSS8 20 DDR_A_D12
29 DQS1 RESET# 30 DRAMRST# 10,11
21 DQ8 DQ12 22 31 VSS11 VSS12 32
DDR_A_D9 23 DDR_A_D13 DDR_A_D10 DDR_A_D14
DQ9 DQ13 24 DDR_A_D11
33 DQ10 DQ14 34 DDR_A_D15
25 VSS9 VSS10 26 35 DQ11 DQ15 36
DDR_A_DQS#1 27 DDR_A_DM1 Remove C128, C129, C138, & C145. 5/11
DDR_A_DQS1 DQS#1 DM1 28 DRAMRST# DDR_A_D16
37 VSS13 VSS14 38 DDR_A_D20
29 DQS1 RESET# 30 39 DQ16 DQ20 40
31 Change ESR to 6m for DB1. 12/16 DDR_A_D17 DDR_A_D21
DDR_A_D10 VSS11 VSS12 32 DDR_A_D14 +1.5V
41 DQ17 DQ21 42
DDR_A_D11
33 DQ10 DQ14 34 DDR_A_D15
Layout Note: Place near JDIMM2 DDR_A_DQS#2
43 VSS15 VSS16 44 DDR_A_DM2
35 DQ11 DQ15 36 45 DQS#2 DM2 46
37 DDR_A_DQS2
DDR_A_D16 VSS13 VSS14 38 DDR_A_D20
47 DQS2 VSS17 48 DDR_A_D22
39 DQ16 DQ20 40 49 VSS18 DQ22 50
C139
10U_0603_6.3V6M
C140
10U_0603_6.3V6M
C141
10U_0603_6.3V6M
C142
10U_0603_6.3V6M
C143
10U_0603_6.3V6M
C144
10U_0603_6.3V6M
C146
0.1U_0201_6.3V6K
C147
0.1U_0201_6.3V6K
C148
0.1U_0201_6.3V6K
C149
0.1U_0201_6.3V6K
DQ17 DQ21 42 DDR_A_D19
51 DQ18 DQ23 52
43 VSS15 VSS16 44 1 1 1 1 1 1 1 1 1 1 53 DQ19 VSS19 54
DDR_A_DQS#2 45 DDR_A_DM2 DDR_A_D28
DDR_A_DQS2 DQS#2 DM2 46 DDR_A_D24
55 VSS20 DQ28 56 DDR_A_D29
47 DQS2 VSS17 48 57 DQ24 DQ29 58
49 DDR_A_D22 @ @ @ DDR_A_D25
DDR_A_D18 VSS18 DQ22 50 DDR_A_D23 2 2 2 2 2 2 2 2 2 2
59 DQ25 VSS21 60 DDR_A_DQS#3
51 DQ18 DQ23 52 61 VSS22 DQS#3 62
DDR_A_D19 53 DDR_A_DM3 DDR_A_DQS3
DQ19 VSS19 54 DDR_A_D28
63 DM3 DQS3 64
55 VSS20 DQ28 56 65 VSS23 VSS24 66
DDR_A_D25 DQ24 DQ29 58 DDR_A_D27
67 DQ26 DQ30 68 DDR_A_D31
59 DQ25 VSS21 60 69 DQ27 DQ31 70
61 DDR_A_DQS#3
DDR_A_DM3 VSS22 DQS#3 62 DDR_A_DQS3 +1.5V
71 VSS25 VSS26 72
63 DM3 DQS3 64
65 3A @1.5V +1.5V
VSS23 VSS24 66
DDR_A_D26 67 DQ26 DQ30 68
DDR_A_D30 1027: Change JDIMM1.1 and JDIMM2.1 to connect to V_DDR_CPU_REF_A via
DDR_A_D27 69 DDR_A_D31
DQ27 DQ31 70 R682 & R683 and move V_DDR_CPU_REF0 option and resistors R82 and R84 6 DDR_CKE0_DIMMA 73 CKE0 CKE1 74 DDR_CKE1_DIMMA 6
71 VSS25 VSS26 72 75 VDD1 VDD2 76
to JDIMM1.1 and JDIMM2.1. (Will check with Intel whether we should 77 78 DDR_A_MA15
DDR_A_BS2 NC1 A15 DDR_A_MA14
use separate divider for VREF_DQ and VREF_CA for M1 solution?) 79 BA2 A14 80
81 VDD3 VDD4 82
C 73 74 DDR_A_MA12 83 84 DDR_A_MA11 C
5 DDR_CKE2_DIMMA CKE0 CKE1 DDR_CKE3_DIMMA 5 A12/BC# A11
75 76 DDR_A_MA9 85 86 DDR_A_MA7
VDD1 VDD2 DDR_A_MA15 A9 A7
77 NC1 A15 78 87 VDD5 VDD6 88
6 DDR_A_BS2 DDR_A_BS2 79 80 DDR_A_MA14 DDR_A_MA8 89 90 DDR_A_MA6
BA2 A14 DDR_A_MA5 A8 A6 DDR_A_MA4
81 VDD3 VDD4 82 91 A5 A4 92
DDR_A_MA12 83 84 DDR_A_MA11 93 94
DDR_A_MA9 A12/BC# A11 DDR_A_MA7 DDR_A_MA3 VDD7 VDD8 DDR_A_MA2
85 A9 A7 86 6 DDR_A_D[0..63] 95 A3 A2 96
87 88 DDR_A_MA1 97 98 DDR_A_MA0
DDR_A_MA8 VDD5 VDD6 DDR_A_MA6 A1 A0
89 A8 A6 90 6 DDR_A_DM[0..7] 99 VDD9 VDD10 100
DDR_A_MA5 91 92 DDR_A_MA4 6 M_CLK_A_DDR0 101 102 M_CLK_A_DDR1 6
A5 A4 CK0 CK1
93 VDD7 VDD8 94 6 DDR_A_DQS[0..7] 6 M_CLK_A_DDR#0 103 CK0# CK1# 104 M_CLK_A_DDR#1 6
DDR_A_MA3 95 96 DDR_A_MA2 105 106
DDR_A_MA1 A3 A2 DDR_A_MA0 DDR_A_MA10 VDD11 VDD12 DDR_A_BS1
97 A1 A0 98 6 DDR_A_DQS#[0..7] 107 A10/AP BA1 108
99 100 DDR_A_BS0 109 110 DDR_A_RAS#
VDD9 VDD10 BA0 RAS#
5 M_CLK_A_DDR2 101 CK0 CK1 102 M_CLK_A_DDR3 5 6 DDR_A_MA[0..15] 111 VDD13 VDD14 112
5 M_CLK_A_DDR#2 103 104 DDR_A_W E# 113 114
CK0# CK1# M_CLK_A_DDR#3 5 WE# S0# DDR_CS0_DIMMA# 6
105 106 DDR_A_CAS# 115 116
VDD11 VDD12 CAS# ODT0 M_A_ODT0 6
DDR_A_MA10 107 108 DDR_A_BS1 117 118
A10/AP BA1 DDR_A_BS1 6 VDD15 VDD16 V_DDR_CPU_REF_A
6 DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS# DDR_A_MA13 119 120
BA0 RAS# DDR_A_RAS# 6 A13 ODT1 M_A_ODT1 6
111 VDD13 VDD14 112 6 DDR_CS1_DIMMA# 121 S1# NC2 122
6 DDR_A_W E# DDR_A_W E# 113 114 123 124
WE# S0# DDR_CS2_DIMMA# 5 VDD17 VDD18
6 DDR_A_CAS# DDR_A_CAS# 115 116 125 126
CAS# ODT0 M_A_ODT2 5 NCTEST VREF_CA
117 VDD15 VDD16 118 127 VSS27 VSS28 128
DDR_A_MA13 V_DDR_CPU_REF_A DDR_A_D32 DDR_A_D36 As short as possible
119 A13 ODT1 120 M_A_ODT3 5 129 DQ32 DQ36 130
5 DDR_CS3_DIMMA# 121 122 DDR_A_D33 131 132 DDR_A_D37
S1# NC2 DQ33 DQ37
123 VDD17 VDD18 124 133 VSS29 VSS30 134
C150
0.1U_0402_16V4Z
C151
2.2U_0402_6.3V6M
125 126 DDR_A_DQS#4 135 136 DDR_A_DM4
NCTEST VREF_CA DDR_A_DQS4 DQS#4 DM4
127 VSS27 VSS28 128 137 DQS4 VSS31 138 1 1
DDR_A_D32 129 130 DDR_A_D36 As short as possible 139 140 DDR_A_D38
DDR_A_D33 DQ32 DQ36 DDR_A_D37 DDR_A_D34 VSS32 DQ38 DDR_A_D39
131 DQ33 DQ37 132 141 DQ34 DQ39 142
133 134 Layout Note: Place near Layout Note: Place near DDR_A_D35 143 144
V_DDR_CPU_REF_A VSS29 VSS30 DQ35 VSS33 2 2
C152
0.1U_0402_16V4Z
C153
2.2U_0402_6.3V6M
DDR_A_DQS#4 135 136 DDR_A_DM4 145 146 DDR_A_D44

B DDR_A_DQS4 DQS#4 DM4 JDIMM3.203 & JDIMM3.204 JDIMM4.203 & JDIMM4.204 DDR_A_D40 VSS34 DQ44 DDR_A_D45 B
137 DQS4 VSS31 138 1 1 147 DQ40 DQ45 148
+1.5V DDR_A_D38 DDR_A_D41
139 VSS32 DQ38 140 149 DQ41 VSS35 150
DDR_A_D34 141 142 DDR_A_D39 +0.75VS +0.75VS 151 152 DDR_A_DQS#5
DDR_A_D35 DQ34 DQ39 DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5
143 DQ35 VSS33 144 153 DM5 DQS5 154
1
2 2
1K_0402_1%
145 146 DDR_A_D44 155 156

DDR_A_D40 VSS34 DQ44 DDR_A_D45 DDR_A_D42 VSS37 VSS38 DDR_A_D46
147 DQ40 DQ45 148 157 DQ42 DQ46 158
R85
DDR_A_D41 149 150 DDR_A_D43 159 160 DDR_A_D47

DQ41 VSS35 DQ43 DQ47
C154
1U_0603_10V4Z
C155
1U_0603_10V4Z
C156
C157
1U_0603_10V4Z
C158
1U_0603_10V4Z
C159
1U_0603_10V4Z
C160
C161
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
151 152 DDR_A_DQS#5 161 162 Add. 4/30
DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5 DDR_A_D48 VSS39 VSS40 DDR_A_D52
153 154 1 1 1 1 1 1 1 1 163 164
2
DM5 DQS5 DDR_A_D49 DQ48 DQ52 DDR_A_D53

155 VSS37 VSS38 156 165 DQ49 DQ53 166
DDR_A_D42 DDR_A_D46 V_DDR_CPU_REF_DA
157 DQ42 DQ46 158 167 VSS41 VSS42 168
DDR_A_D43 159 160 DDR_A_D47 @ @ @ @ DDR_A_DQS#6 169 170 DDR_A_DM6
DQ43 DQ47 DQS#6 DM6
1
2 2 2 2 2 2 2 2 +1.5V
1K_0402_1%
161 162 DDR_A_DQS6 171 172

DDR_A_D48 VSS39 VSS40 DDR_A_D52 DQS6 VSS43 DDR_A_D54
163 164 173 174
R86
DDR_A_D49 DQ48 DQ52 DDR_A_D53 DDR_A_D50 VSS44 DQ54 DDR_A_D55

165 DQ49 DQ53 166 175 DQ50 DQ55 176
1
1K_0402_1%
167 168 DDR_A_D51 177 178
DDR_A_DQS#6 VSS41 VSS42 DDR_A_DM6 DQ51 VSS45 DDR_A_D60
169 170 179 180
2
DQS#6 DM6 VSS46 DQ60
R81
DDR_A_DQS6 171 172 DDR_A_D56 181 182 DDR_A_D61
DQS6 VSS43 DDR_A_D54 DDR_A_D57 DQ56 DQ61
173 VSS44 DQ54 174 183 DQ57 VSS47 184
DDR_A_D50 175 176 DDR_A_D55 185 186 DDR_A_DQS#7
2
DDR_A_D51 DQ50 DQ55 DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7
177 DQ51 VSS45 178 187 DM7 DQS7 188
179 180 DDR_A_D60 189 190
DDR_A_D56 VSS46 DQ60 DDR_A_D61 DDR_A_D58 VSS49 VSS50 DDR_A_D62
181 182 191 192
DQ56 DQ61 SPD address 0xA0 DQ58 DQ62
1
1K_0402_1%
DDR_A_D57 183 184 DDR_A_D59 193 194 DDR_A_D63
DQ57 VSS47 DDR_A_DQS#7 +0.75VS DQ59 DQ63
185 186 195 196
R83
DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7 R87 VSS51 VSS52
187 DM7 DQS7 188 1 2 10K_0402_5% 197 SA0 EVENT# 198 PM_EXTTS#1_R
189 190 199 200 SMB_DATA_S3
VSS49 VSS50 +3VS VDDSPD SDA
C162
10U_0603_6.3V6M
DDR_A_D58 191 192 DDR_A_D62 201 202 SMB_CLK_S3
2
SPD address 0xA2 DDR_A_D59 DQ58 DQ62 DDR_A_D63 SA1 SCL
193 DQ59 DQ63 194 1 Layout Note: Place between Change. 2/17 +0.75VS 203 VTT1 VTT2 204 +0.75VS
C163
2.2U_0402_6.3V6M
C164
0.1U_0402_16V4Z
195 VSS51 VSS52 196
R88 1 2 10K_0402_5% 197 198 PM_EXTTS#1_R
PM_EXTTS#1_R 4,10
JDIMM3 & JDIMM3. 1 1 205 0.65A@0 .75V 206
SA0 EVENT# G1 G2
1 10K_0402_5%
199 200 SMB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 4,10,12,14,26 2
R89
A 201 202 SMB_CLK_S3 A
Change. 2/17 +0.75VS 203
SA1
VTT1
SCL
VTT2 204 +0.75VS
SMB_CLK_S3 4,10,12,14,26
2 2
TOP SIDE STD
C165
2.2U_0402_6.3V6M
C166
0.1U_0402_16V4Z
1 1 205 0.65A@0 .75V 206 (HIGHT)
2
G1 G2
1 10K_0402_5%
ME/iAMT debug
R90
VREFDQ
2 2
TOP SIDE STD
(LOW) JiAMT1 2/10 M1 V_DDR_CPU_REF_A R81, R83, R682, R683 Security Classification Compal Secret Data Compal Electronics, Inc.
2
SMB_DATA_S3 3 5 2008/09/15 2009/09/15 Title

SMB_CLK_S3 3 G2 Issued Date Deciphered Date
2 4
1
2
1
G1 M3 V_DDR_CPU_REF0 R82, R84
DDRIII-SODIMM CHANNEL A
CONN@ ACES_85204-03001 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
V_DDR_CPU_REF1 1. Remove R91, R684. 4/30 DDR3

JDIMM3
SO-DIMM B
+1.5V +1.5V V_DDR_CPU_REF_DB
3A @1.5V 2. Change R92 & R94 to 1K to another divider. CONN@ FOX_AS0A626-U4RG-7H
V_DDR_CPU_REF_DB R93
V_DDR_CPU_REF1 1 2 0_0402_5% 1 VREF_DQ VSS1 2
3. Install R93, R95. 3 VSS2 DDR_B_D4
DQ4 4
DDR3 SO-DIMM B DDR_B_D0 5 DQ0 DQ5 6
DDR_B_D5
C167
0.1U_0402_16V4Z
C168
2.2U_0402_6.3V6M
JDIMM4 DDR_B_D1 7 DQ1
CONN@ FOX_AS0A626-U4SG-7H +1.5V VSS3 8 DDR_B_DQS#0
R95
Layout Note: Place near JDIMM3 1 1 9 VSS4 DQS#0 10
1 2 0_0402_5% 1 VREF_DQ VSS1 2
DDR_B_DM0 11 DM0 DQS0 12
DDR_B_DQS0
3 VSS2 DDR_B_D4
DDR_B_D0 DQ4 4 DDR_B_D5 DDR_B_D2
13 VSS5 VSS6 14 DDR_B_D6
5 DQ0 DQ5 6 15 DQ2 DQ6 16
2 2
C169
0.1U_0402_16V4Z
C170
2.2U_0402_6.3V6M
C174
10U_0603_6.3V6M
C175
10U_0603_6.3V6M
C176
10U_0603_6.3V6M
C177
10U_0603_6.3V6M
C178
10U_0603_6.3V6M
C179
10U_0603_6.3V6M
C180
0.1U_0201_6.3V6K
C181
0.1U_0201_6.3V6K
C182
0.1U_0201_6.3V6K
C183
0.1U_0201_6.3V6K
C171
330U_X_2VM_R6M
DDR_B_D1 7 DQ1 DDR_B_D3 DDR_B_D7
VSS3 8 DDR_B_DQS#0
1 17 DQ3 DQ7 18
1 1 9 VSS4 DQS#0 10 1 1 1 1 1 1 1 1 1 1 19 VSS7 VSS8 20
DDR_B_DM0 11 DM0 DDR_B_DQS0 + DDR_B_D8 DDR_B_D12
DQS0 12 DDR_B_D9
21 DQ8 DQ12 22 DDR_B_D13
13 VSS5 VSS6 14 23 DQ9 DQ13 24
D DDR_B_D2 15 DQ2 DDR_B_D6 @ @ @ D
2 2 DDR_B_D3 DQ6 16 DDR_B_D7 2 2 2 2 2 2 2 2 2 2 2 DDR_B_DQS#1
25 VSS9 VSS10 26 DDR_B_DM1
17 DQ3 DQ7 18 27 DQS#1 DM1 28
19 VSS7 DDR_B_DQS1 DRAMRST#
DDR_B_D8 VSS8 20 DDR_B_D12
29 DQS1 RESET# 30 DRAMRST# 9,11
21 DQ8 DQ12 22 31 VSS11 VSS12 32
DDR_B_D9 23 DQ9 DDR_B_D13 DDR_B_D10 DDR_B_D14
DQ13 24 DDR_B_D11
33 DQ10 DQ14 34 DDR_B_D15
25 VSS9 VSS10 26 35 DQ11 DQ15 36
DDR_B_DQS#1 27 DQS#1 DDR_B_DM1 Remove C172, C173, C184, & C185. 5/11
DDR_B_DQS1 DM1 28 DRAMRST# DDR_B_D16
37 VSS13 VSS14 38 DDR_B_D20
29 DQS1 RESET# 30 39 DQ16 DQ20 40
31 VSS11 Change ESR to 6m for DB1. 12/16 DDR_B_D17 DDR_B_D21
DDR_B_D10 VSS12 32 DDR_B_D14 +1.5V
41 DQ17 DQ21 42
DDR_B_D11
33 DQ10 DQ14 34 DDR_B_D15
Layout Note: Place near JDIMM4 DDR_B_DQS#2
43 VSS15 VSS16 44 DDR_B_DM2
35 DQ11 DQ15 36 45 DQS#2 DM2 46
37 VSS13 DDR_B_DQS2
DDR_B_D16 VSS14 38 DDR_B_D20
47 DQS2 VSS17 48 DDR_B_D22
39 DQ16 DQ20 40 49 VSS18 DQ22 50
C186
10U_0603_6.3V6M
C187
10U_0603_6.3V6M
C188
10U_0603_6.3V6M
C189
10U_0603_6.3V6M
C190
10U_0603_6.3V6M
C191
10U_0603_6.3V6M
C192
0.1U_0201_6.3V6K
C193
0.1U_0201_6.3V6K
C194
0.1U_0201_6.3V6K
C195
0.1U_0201_6.3V6K
DQ21 42 DDR_B_D19
51 DQ18 DQ23 52
43 VSS15 VSS16 44 1 1 1 1 1 1 1 1 1 1 53 DQ19 VSS19 54
DDR_B_DQS#2 45 DQS#2 DDR_B_DM2 DDR_B_D28
DDR_B_DQS2 DM2 46 DDR_B_D24
55 VSS20 DQ28 56 DDR_B_D29
47 DQS2 VSS17 48 57 DQ24 DQ29 58
49 VSS18 DDR_B_D22 @ @ @ DDR_B_D25
DDR_B_D18 DQ22 50 DDR_B_D23 2 2 2 2 2 2 2 2 2 2
59 DQ25 VSS21 60 DDR_B_DQS#3
51 DQ18 DQ23 52 61 VSS22 DQS#3 62
DDR_B_D19 53 DQ19 DDR_B_DM3 DDR_B_DQS3
VSS19 54 DDR_B_D28
63 DM3 DQS3 64
55 VSS20 DQ28 56 65 VSS23 VSS24 66
DDR_B_D25 DQ29 58 DDR_B_D27
67 DQ26 DQ30 68 DDR_B_D31
59 DQ25 VSS21 60 69 DQ27 DQ31 70
61 VSS22 DDR_B_DQS#3
DDR_B_DM3 DQS#3 62 DDR_B_DQS3 +1.5V
71 VSS25 VSS26 72 +1.5V
63 DM3 DQS3 64
65 VSS23 3A @1.5V
DDR_B_D26 VSS24 66 DDR_B_D30 1027: Change JDIMM3.1 and JDIMM4.1 to connect to V_DDR_CPU_REF_B via
67 DQ26 DQ30 68
DDR_B_D27 69 DQ27 DQ31 70
DDR_B_D31 R91 & R684 and move V_DDR_CPU_REF1 option and resistors R93 and R95 5 DDR_CKE2_DIMMB DDR_CKE2_DIMMB 73 CKE0 CKE1 74 DDR_CKE3_DIMMB
DDR_CKE3_DIMMB 5
71 VSS25 VSS26 72 to JDIMM3.1 and JDIMM4.1. (Will check with Intel whether we should 75 VDD1 VDD2 76
77 78 DDR_B_MA15
use separate divider for VREF_DQ and VREF_CA for M1 solution?) DDR_B_BS2 NC1 A15 DDR_B_MA14
79 BA2 A14 80
81 VDD3 VDD4 82
C DDR_CKE0_DIMMB 73 74 DDR_CKE1_DIMMB DDR_B_MA12 83 84 DDR_B_MA11 C
6 DDR_CKE0_DIMMB CKE0 CKE1 DDR_CKE1_DIMMB 6 A12/BC# A11
75 76 DDR_B_MA9 85 86 DDR_B_MA7
VDD1 VDD2 DDR_B_MA15 A9 A7
77 NC1 A15 78 6 DDR_B_DQS#[0..7] 87 VDD5 VDD6 88
6 DDR_B_BS2 DDR_B_BS2 79 80 DDR_B_MA14 DDR_B_MA8 89 90 DDR_B_MA6
BA2 A14 DDR_B_MA5 A8 A6 DDR_B_MA4
81 VDD3 VDD4 82 6 DDR_B_D[0..63] 91 A5 A4 92
DDR_B_MA12 83 84 DDR_B_MA11 93 94
DDR_B_MA9 A12/BC# A11 DDR_B_MA7 DDR_B_MA3 VDD7 VDD8 DDR_B_MA2
85 A9 A7 86 6 DDR_B_DM[0..7] 95 A3 A2 96
87 88 DDR_B_MA1 97 98 DDR_B_MA0
DDR_B_MA8 VDD5 VDD6 DDR_B_MA6 A1 A0
89 A8 A6 90 6 DDR_B_DQS[0..7] 99 VDD9 VDD10 100
DDR_B_MA5 91 92 DDR_B_MA4 5 M_CLK_B_DDR2 M_CLK_B_DDR2 101 102 M_CLK_B_DDR3
A5 A4 CK0 CK1 M_CLK_B_DDR3 5
93 94 5 M_CLK_B_DDR#2 M_CLK_B_DDR#2 103 104 M_CLK_B_DDR#3
VDD7 VDD8 6 DDR_B_MA[0..15] CK0# CK1# M_CLK_B_DDR#3 5
DDR_B_MA3 95 96 DDR_B_MA2 105 106
DDR_B_MA1 A3 A2 DDR_B_MA0 DDR_B_MA10 VDD11 VDD12 DDR_B_BS1
97 A1 A0 98 107 A10/AP BA1 108
99 100 DDR_B_BS0 109 110 DDR_B_RAS#
M_CLK_B_DDR0 VDD9 VDD10 M_CLK_B_DDR1 BA0 RAS#
6 M_CLK_B_DDR0 101 CK0 CK1 102 M_CLK_B_DDR1 6 111 VDD13 VDD14 112
M_CLK_B_DDR#0 103 104 M_CLK_B_DDR#1 DDR_B_W E# 113 114 DDR_CS2_DIMMB#
6 M_CLK_B_DDR#0 CK0# CK1# M_CLK_B_DDR#1 6 WE# S0# DDR_CS2_DIMMB# 5
105 106 DDR_B_CAS# 115 116 M_B_ODT2
VDD11 VDD12 CAS# ODT0 M_B_ODT2 5
DDR_B_MA10 107 108 DDR_B_BS1 117 118
A10/AP BA1 DDR_B_BS1 6 VDD15 VDD16 V_DDR_CPU_REF_B
6 DDR_B_BS0 DDR_B_BS0 109 110 DDR_B_RAS# DDR_B_MA13 119 120 M_B_ODT3
BA0 RAS# DDR_B_RAS# 6 A13 ODT1 M_B_ODT3 5
111 112 5 DDR_CS3_DIMMB# DDR_CS3_DIMMB# 121 122
DDR_B_W E# VDD13 VDD14 DDR_CS0_DIMMB# S1# NC2
6 DDR_B_W E# 113 WE# S0# 114 DDR_CS0_DIMMB# 6 123 VDD17 VDD18 124
6 DDR_B_CAS# DDR_B_CAS# 115 116 M_B_ODT0 125 126
CAS# ODT0 M_B_ODT0 6 NCTEST VREF_CA
117 VDD15 VDD16 118 127 VSS27 VSS28 128
DDR_B_MA13 M_B_ODT1 V_DDR_CPU_REF_B DDR_B_D32 DDR_B_D36 As short as possible
119 A13 ODT1 120 M_B_ODT1 6 129 DQ32 DQ36 130
6 DDR_CS1_DIMMB# DDR_CS1_DIMMB# 121 122 DDR_B_D33 131 132 DDR_B_D37
S1# NC2 DQ33 DQ37
C196
0.1U_0402_16V4Z
C197
2.2U_0402_6.3V6M
123 VDD17 VDD18 124 133 VSS29 VSS30 134
125 126 DDR_B_DQS#4 135 136 DDR_B_DM4 1 1
NCTEST VREF_CA DDR_B_DQS4 DQS#4 DM4
127 VSS27 VSS28 128 137 DQS4 VSS31 138
DDR_B_D32 129 130 DDR_B_D36 As short as possible 139 140 DDR_B_D38
DDR_B_D33 DQ32 DQ36 DDR_B_D37 DDR_B_D34 VSS32 DQ38 DDR_B_D39
131 DQ33 DQ37 132 141 DQ34 DQ39 142
DDR_B_D35 2 2
133 VSS29 VSS30 134 143 DQ35 VSS33 144
C198
0.1U_0402_16V4Z
C199
2.2U_0402_6.3V6M
DDR_B_DQS#4 135 136 DDR_B_DM4 Layout Note: Place near Layout Note: Place near 145 146 DDR_B_D44
B V_DDR_CPU_REF_B DDR_B_DQS4 DQS#4 DM4 DDR_B_D40 VSS34 DQ44 DDR_B_D45 B
137 DQS4 VSS31 138 1 1 147 DQ40 DQ45 148
139 140 DDR_B_D38 JDIMM2.203 & JDIMM2.204 JDIMM1.203 & JDIMM1.204 DDR_B_D41 149 150
+1.5V DDR_B_D34 VSS32 DQ38 DDR_B_D39 DQ41 VSS35 DDR_B_DQS#5
141 142 151 152
Install R96 & R97. 12/17
DDR_B_D35 DQ34 DQ39 +0.75VS +0.75VS DDR_B_DM5 VSS36 DQS#5 DDR_B_DQS5

143 DQ35 VSS33 144 153 DM5 DQS5 154
DDR_B_D44 2 2
145 VSS34 DQ44 146 155 VSS37 VSS38 156
1
1K_0402_1%
DDR_B_D40 147 148 DDR_B_D45 DDR_B_D42 157 158 DDR_B_D46

DDR_B_D41 DQ40 DQ45 DDR_B_D43 DQ42 DQ46 DDR_B_D47
149 DQ41 VSS35 150 159 DQ43 DQ47 160 Add. 4/30
R96
151 152 DDR_B_DQS#5 161 162

VSS36 DQS#5 VSS39 VSS40
C200
1U_0603_10V4Z
C201
1U_0603_10V4Z
C202
C203
1U_0603_10V4Z
C204
1U_0603_10V4Z
C205
1U_0603_10V4Z
C206
C207
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
DDR_B_DM5 153 154 DDR_B_DQS5 DDR_B_D48 163 164 DDR_B_D52
DM5 DQS5 DDR_B_D49 DQ48 DQ52 DDR_B_D53 V_DDR_CPU_REF_DB
155 156 1 1 1 1 1 1 1 1 165 166
2
DDR_B_D42 VSS37 VSS38 DDR_B_D46 DQ49 DQ53

157 DQ42 DQ46 158 167 VSS41 VSS42 168
DDR_B_D43 DDR_B_D47 DDR_B_DQS#6 DDR_B_DM6 +1.5V
159 DQ43 DQ47 160 169 DQS#6 DM6 170
161 162 @ @ @ @ DDR_B_DQS6 171 172
VSS39 VSS40 DQS6 VSS43
1
2 2 2 2 2 2 2 2
1K_0402_1%
DDR_B_D48 163 164 DDR_B_D52 173 174 DDR_B_D54

DQ48 DQ52 VSS44 DQ54
1K_0402_1%
R97
DQ49 DQ53 DDR_B_D51 DQ50 DQ55

167 VSS41 VSS42 168 177 DQ51 VSS45 178
R92
DDR_B_DQS#6 169 170 DDR_B_DM6 179 180 DDR_B_D60
DDR_B_DQS6 DQS#6 DM6 DDR_B_D56 VSS46 DQ60 DDR_B_D61
171 172 181 182
2
DQS6 VSS43 DDR_B_D54 DDR_B_D57 DQ56 DQ61

173 174 183 184
2
DDR_B_D50 VSS44 DQ54 DDR_B_D55 DQ57 VSS47 DDR_B_DQS#7
175 DQ50 DQ55 176 185 VSS48 DQS#7 186
DDR_B_D51 177 178 DDR_B_DM7 187 188 DDR_B_DQS7
DQ51 VSS45 DDR_B_D60 DM7 DQS7
179 VSS46 DQ60 180 189 VSS49 VSS50 190
1K_0402_1%
DDR_B_D57 DQ56 DQ61 DDR_B_D59 DQ58 DQ62 DDR_B_D63
183 184 SPD address 0xA6 193 194
R94
DQ57 VSS47 DDR_B_DQS#7 +0.75VS DQ59 DQ63
185 VSS48 DQS#7 186 195 VSS51 VSS52 196
DDR_B_DM7 187 188 DDR_B_DQS7 R98 1 2 10K_0402_5% 197 198 PM_EXTTS#1_R
DM7 DQS7 SA0 EVENT# SMB_DATA_S3
189 190 +3VS 199 200
2
VSS49 VSS50 VDDSPD SDA
C208
10U_0603_6.3V6M
SPD address 0xA4 DDR_B_D58 191 192 DDR_B_D62 201 202 SMB_CLK_S3
DDR_B_D59 DQ58 DQ62 DDR_B_D63 SA1 SCL
193 DQ59 DQ63 194 1 Layout Note: Place between Change. 2/17 +0.75VS 203 VTT1 VTT2 204 +0.75VS
C209
2.2U_0402_6.3V6M
C210
0.1U_0402_16V4Z
195 VSS51 VSS52 196
R99 1 2 10K_0402_5% 197 198 PM_EXTTS#1_R
PM_EXTTS#1_R 4,9
JDIMM3 & JDIMM3. 1 1 205 0.65A@0 .75V 206
SA0 EVENT# G1 G2
1 10K_0402_5%
199 200 SMB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 4,9,12,14,26 2
R100
A 201 202 SMB_CLK_S3 A
Change. 2/17 +0.75VS 203
SA1
VTT1
SCL
VTT2 204 +0.75VS
SMB_CLK_S3 4,9,12,14,26
2 2
BOT SIDE REV
C211
2.2U_0402_6.3V6M
C212
0.1U_0402_16V4Z
1 1 205 0.65A@0 .75V 206 (RIGHT)
2
G1 G2
1 10K_0402_5%
R101
VREFDQ
2 2
BOT SIDE STD +3VM
Change R99.1 to GND (SPD address
(LEFT) M1 V_DDR_CPU_REF_B R91, R92, R94, R684 Security Classification Compal Secret Data Compal Electronics, Inc.
2
should be 0xA4)Change R98.1 to 2008/09/15 2009/09/15 Title

Issued Date Deciphered Date
+3VM (SPD address should be
0xA6)
M3 V_DDR_CPU_REF1 R93, R95
DDRIII-SODIMM CHANNEL B
+3VM AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
Intel S3
D
+1.5V to +1.5VS_CPU_VDDQ Transfer D
Reserve R756 & R757. 7/19

+1.5VS_CPU_VDDQ
Q72 R756 1 2 @ 100K_0402_5% +1.5V +1.5VS_CPU_VDDQ
AP2302GN_SOT23 +1.5V +1.5VS_CPU_VDDQ
Q76 C715 1 2@ 0.1U_0201_6.3V6K
S
V_DDR_CPU_REF0 1 3 V_CPU_DDR_REF0
1
AO4430 1N SOIC-8 Change R746
8 1 C716 1 2@ 0.1U_0201_6.3V6K R746
7 2
to 220ohm. 220_0402_5%
G
2
Q73 6 3 C717 1 2 0.1U_0201_6.3V6K 7/14
AP2302GN_SOT23 5
2
0.1U_0402_10V6K
C718 1 2 0.1U_0201_6.3V6K
0.1U_0402_10V6K
D
S
V_DDR_CPU_REF1 1 3 V_CPU_DDR_REF1 1 1
1
D
C648
C649
C720 1 2 0.1U_0402_16V4Z 35 SLP_S3 SLP_S3 2 Q75
R757 1 2 @ 100K_0402_5% G SSM3K7002F_SC59-3
G
2
2 2 C721 1 2 0.1U_0402_16V4Z S
3
PCH_DDR_RST Reserve R756 & R757. 7/19 Add on 7/14. close to CPU side.
Remove Q77. 7/19 35 RUNON C722 1 2 @ 0.01U_0402_50V7K
Remove R747. 7/20

Add C722. 7/20
+1.5V
+3VALW
Modify. 7/9
1
C C
R743
1K_0402_5%
2
R748
2
Q74 @ 0_0402_5%
2N7002_SOT23-3 U3
5
MC74VHC1G08DFT2G_SC70-5
1
S
3 1
VCC
4 SM_DRAMRST# DRAMRST# 9,10
SLP_S3 R749 1 2 0_0402_5% 1 IN1
OUT 4 VCCP_1.5VSPW RGD 4
G
GND
21,34,40 VCCP_EN
2
+3VALW IN2
1
PCH_DDR_RST
PCH_DDR_RST 16
R754 R750 1 2 @ 0_0402_5% PW R_GD 4,13,31,34
3
100K_0402_5%
1
C719
470P_0402_50V8J
@
R745 1
2
@ 100K_0402_5%
2
B B
A A

Intel S3 power saving
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
+3VS/+1.5VS_CK505 +1.05VS_CK505 +3VS_CK505 +1.05VS_CK505

EMI Capacitor Add on 7/9.
14.31818MHZ_20P_1BX14318BE1A
U2
2 1 REF_0/CPU_SEL 1 VDD_DOT SCL 32 SMB_CLK_S3 4,9,10,14,26

CLK_XTAL_OUT
C213 @ 10P_0402_50V8C 2 31
VSS_DOT SDA SMB_DATA_S3 4,9,10,14,26
R102 1 2 0_0402_5% L_CLK_BUF_DOT96 3 30 REF_0/CPU_SEL R103 2 1 33_0402_5% CLK_XTAL_IN
14 CLK_BUF_DOT96 DOT_96 REF_0/CPU_SEL CLK_14M_PCH 14
R104 1 2 0_0402_5% L_CLK_BUF_DOT96# 4 29
14 CLK_BUF_DOT96# DOT_96# VDD_REF
+3VS_CK505 5 28 CLK_XTAL_IN
VDD_27 XTAL_IN CLK_XTAL_OUT
6 27MHZ XTAL_OUT 27
7 27MHZ_SS VSS_REF 26
8 25 CK_PW RGD
VSS_27 CKPWRGD/PD# Y1
9 VSS_SATA VDD_CPU 24 2 1
R106 1 2 0_0402_5% L_CLK_BUF_CKSSCD 10 23 R_CLK_BUF_BCLK R107 1 2 0_0402_5%
D 14 CLK_BUF_CKSSCD SRC_1/SATA CPU_0 CLK_BUF_BCLK 14 D
R108 1 2 0_0402_5% L_CLK_BUF_CKSSCD# 11 22 R_CLK_BUF_BCLK# R109 1 2 0_0402_5%
14 CLK_BUF_CKSSCD# SRC_1#/SATA# CPU_0# CLK_BUF_BCLK# 14
12 VSS_SRC VSS_CPU 21 2 2
R110 1 2 0_0402_5% L_CLK_DMI 13 20 Add on 7/9.
14 CLK_DMI SRC_2 CPU_1
R111 1 2 0_0402_5% L_CLK_DMI# 14 19 CK_PW RGD R112 1 2 10K_0402_5% +3VS_CK505 C214 C215
14 CLK_DMI# SRC_2# CPU_1#
15 18 33P_0402_50V8J 33P_0402_50V8J
R119 1 CPU_STOP# VDD_SRC_IO VDD_CPU_IO 1 1
Change on 2/24. +3VS_CK505 2 10K_0402_5% 16 CPU_STOP# VDD_SRC 17 +3VS/+1.5VS_CK505 Q2
TGND
2N7002_SOT23-3
1
D
+1.05VS_CK505
2 CLK_EN# 43
PIN 30 CPU_0 CPU_1 SLG8SP585VTR_QFN32_5X5 G
33
S
3
R113 1 2 @ 10K_0402_5% REF_0/CPU_SEL
0 (Default) 133MHz 133MHz
R114 1 2 10K_0402_5%
1 100MHz 100MHz
Closed to U2
+1.05VS +1.05VS_CK505
R115 1 2 0_0603_5%
C710
C221
10U_0805_10V4Z
C222
10U_0805_10V4Z
C223
0.1U_0402_16V4Z
C224
0.1U_0402_16V4Z
C225
0.1U_0402_16V4Z
C226
0.1U_0402_16V4Z
47P_0402_50V8J
1 1 1 1 1 1
1
Install C710. 7/21
2
C 2 2 2 2 2 2 C
@
+3VS/+1.5VS_CK505 +1.5VS +3VS
R752 1 2 @ 0_0603_5%
+3VS +3VS_CK505
R753 1 2 0_0603_5%
R121 1 2 0_0603_5%
C711
C230
10U_0805_10V4Z
C231
0.1U_0402_16V4Z
C232
0.1U_0402_16V4Z
C233
0.1U_0402_16V4Z
C234
0.1U_0402_16V4Z
C235
0.1U_0402_16V4Z
C236
0.1U_0402_16V4Z
47P_0402_50V8J
1 1 1 1 1 1 1
12
2 2 2 2 2 2 2
@
B B
A A

CLOCK GENERATOR
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
SATA HDD CONN.

+3VS R162 1 2 @ 1K_0402_5% HDA_SPKR JHDD1
GND 1
LOW=Default HIGH=No Reboot 2 SATA_PTX_C_DRX_P0 C239 1 2 0.01U_0402_50V7K SATA_PTX_DRX_P0
RX+ SATA_PTX_C_DRX_N0 C240 1 SATA_PTX_DRX_N0
Move C264~C267 to docking side. 2/24 RX- 3 2 0.01U_0402_50V7K
C253
1U_0603_10V4Z
U4A GND 4
SHORT PADS
1 5 SATA_PRX_C_DTX_N0 C243 1 2 0.01U_0402_50V7K SATA_PRX_DTX_N0
TX-
1
6 SATA_PRX_C_DTX_P0 C244 1 2 0.01U_0402_50V7K SATA_PRX_DTX_P0
+RTCVCC PCH_RTCX1 TX+
B13 RTCX1 FWH0 / LAD0 D33 LPC_LAD0 24,28,31,33 GND 7
CLRP1
PCH_RTCX2 D13 B33 LPC_LAD1 24,28,31,33
2
R163 2 RTCX2 FWH1 / LAD1 +5VS
FWH2 / LAD2 C32 LPC_LAD2 24,28,31,33
20K_0402_5% A32 8
FWH3 / LAD3 LPC_LAD3 24,28,31,33 3.3V
1 2 PCH_RTCRST# C14 26 9
RTCRST# boss 3.3V
D FWH4 / LFRAME# C34 LPC_LFRAME# 24,28,31,33 Change net name. 5/11 25 boss 3.3V 10
D
1 2 PCH_SRTCRST# D17 11
SRTCRST# NAND_DET# 24 GND
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A34 24 12
RTC
LPC
R164 LDRQ0# LPC_LDRQ#0 33 GND GND
C258
C247
C248
C249
C250
1U_0603_10V4Z
20K_0402_5% +RTCVCC R165 1 2 1M_0402_5% SM_INTRUDER# A16 F34 R140 1 2 10K_0402_5% +3VS 23 13
INTRUDER# LDRQ1# / GPIO23 GND GND
1 Remove Change net name. 2/24 5V 14 1 1 1 1
R166 1 2 330K_0402_5% PCH_INTVRMEN A14 AB9 15
CLRP2. INTVRMEN SERIRQ SIRQ 28,31,32,33 5V
16
High = Internal VR Enabled(Default) +3VS 5V +5VS
4/25 R167 1 2 10K_0402_5% +3VS GND 17
2 2 2 2 2
Rsv 18
HDA_BIT_CLK_MDC R168 1 2 33_0402_5% HDA_BIT_CLK A30 19
HDA_BIT_CLK_CODEC R169 1 33_0402_5% HDA_BCLK SATA_PRX_DTX_N0 GND
2 SATA0RXN AK7 12V 20
2
R170 1 2 33_0402_5% HDA_S YNC D29 AK6 SATA_PRX_DTX_P0 21
25 HDA_SYNC_MDC HDA_SYNC SATA0RXP 12V
R171 1 2 33_0402_5% AK11 SATA_PTX_DRX_N0 R184 R185 22
30 HDA_SYNC_CODEC SATA0TXN 12V
HDA_SPKR P1 AK9 SATA_PTX_DRX_P0 10K_0402_5% 10K_0402_5%
30 HDA_SPKR SPKR SATA0TXP CONN@ ALLTO_C16674-12204-L_NR
R172 1 2 33_0402_5% HDA_RST# C30
25 HDA_RST#_MDC
1
R173 1 HDA_RST# SATA_PRX_DTX_N1
30 HDA_RST#_CODEC 2 33_0402_5% SATA1RXN AH6
AH5 SATA_PRX_DTX_P1 HDD_HALTLED
HDA_SDIN0 SATA1RXP SATA_PTX_DRX_N1 SATA_DET#0
30 HDA_SDIN0 G30 HDA_SDIN0 SATA1TXN AH9
AH8 SATA_PTX_DRX_P1
25 HDA_SDIN1 HDA_SDIN1 F30 HDA_SDIN1
SATA1TXP SATA ODD CONN.
AF11 JODD1
SATA2RXN SATA_PRX_DTX_N2 29
E32 AF9
IHDA
HDA_SDIN2 SATA2RXP SATA_PRX_DTX_P2 29
AQUAWHITE_BATLED AF7 1
30 AQUAWHITE_BATLED SATA2TXN SATA_PTX_C_DRX_N2 29 GND
F32 AF6 2 SATA_PTX_C_DRX_P1 C254 1 2 0.01U_0402_50V7K SATA_PTX_DRX_P1
HDA_SDIN3 SATA2TXP SATA_PTX_C_DRX_P2 29 A+
3 SATA_PTX_C_DRX_N1 C255 1 2 0.01U_0402_50V7K SATA_PTX_DRX_N1
SATA_PRX_DTX_N3 A-
SATA3RXN AH3 T100 PAD GND 4
HDA_SDOUT_MDC R174 1 2 33_0402_5% HDA_SDOUT B29 AH1 SATA_PRX_DTX_P3 Change SATA assignments to 2/10 5 SATA_PRX_C_DTX_N1 C256 1 2 0.01U_0402_50V7K SATA_PRX_DTX_N1
HDA_SDO SATA3RXP T101 PAD B-
HDA_SDOUT_CODEC R175 1 2 33_0402_5% AF3 SATA_PTX_DRX_N3 6 SATA_PRX_C_DTX_P1 C257 1 2 0.01U_0402_50V7K SATA_PRX_DTX_P1
SATA3TXN
AF1 SATA_PTX_DRX_P3
T102 PAD support PM (Port Multiplier): B+
7
SATA3TXP T103 PAD GND +5VS
AQUAWHITE_BATLED R176 1 2 1K_0402_5% GPIO33 H32 Move SATA port#4 to SATA port#5 R569
SATA
HDA_DOCK_EN# / GPIO33 SATA_PRX_DTX_N4 @ 0_0402_5%
SATA4RXN AD9 Move SATA port#2 to SATA port#4
Del signal connect to LID_SW#. 7/7 +3VALW R177 1 2 10K_0402_5% J30 AD8 SATA_PRX_DTX_P4 8 1 2
C HDA_DOCK_RST# / GPIO13 SATA4RXP Move SATA port#3 to SATA port#2 DP ODD_DET# 16 C
AD6 SATA_PTX_DRX_N4 9
SATA4TXN SATA_PTX_DRX_P4 V5
SATA4TXP AD5 V5 10 +5VS 1
0.1U_0402_16V4Z
1U_0603_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
11 C259
MD
C260
C261
C262
C263
C268 1 2 @ 47P_0402_50V8J HDA_BIT_CLK_MDC PCH_JTAG_TCK M3 AD3 14 12 @ 0.1U_0402_16V4Z
HDA_BIT_CLK_MDC 25 JTAG_TCK SATA5RXN SATA_PRX_DTX_N5 29 GND GND
SATA5RXP AD1 SATA_PRX_DTX_P5 29 15 GND GND 13 1 1 1 1
C269 1 HDA_BIT_CLK_CODEC PCH_JTAG_TMS 2
2 @ 47P_0402_50V8J HDA_BIT_CLK_CODEC 30 K3 JTAG_TMS SATA5TXN AB3 SATA_PTX_C_DRX_N5 29
SATA5TXP AB1 SATA_PTX_C_DRX_P5 29
C270 1 2 @ 47P_0402_50V8J HDA_SDOUT_MDC HDA_SDOUT_MDC 25 PCH_JTAG_TDI K1 OCTEK_SLS-13DJ1G_NR
JTAG_TDI 2 2 2 2
CONN@ Change C259 NI and
JTAG
C271 1 2 @ 47P_0402_50V8J HDA_SDOUT_CODEC HDA_SDOUT_CODEC 30 PCH_JTAG_TDO J2 JTAG_TDO SATAICOMPO AF16 Layout ruletrace length < 0.5" RV R569. 11/24
PCH_JTAG_RST# J4 AF15 SATACOMP R180 1 2 37.4_0402_1% +1.05VS
PCH_RTCX1 TRST# SATAICOMPI
Change R182 & R186 to 0 ohm. 11/24
1 2 PCH_RTCX2
R161 10M_0402_5% BA2
31 KBC_SPI_CLK_R SPI_CLK
R182 1 2 0_0402_5% AV3 R183 1 2 10K_0402_5% +1.05VS
31 KBC_SPI_CS0#_R SPI_CS0# +3VS
32.768KHZ_12.5PF_Q13MC14610002
R186 1 2 0_0402_5% AY3 T3 PCH_JTAG_TDO R740 1 2 @ 51_0402_5%

31 KBC_SPI_CS1#_R SPI_CS1# SATALED# SATA_LED# 29,30
Change JTAG DDEBUG CONN to 60pin. 12/02
18P_0402_50V8J
18P_0402_50V8J
PCH_JTAG_TMS R741 1 2 @ 51_0402_5%

1
4
C251
C252
AY1 Y9 SATA_DET#0
31 KBC_SPI_SI_R SPI_MOSI SATA0GP / GPIO21
1 1 PCH_JTAG_TDI R742 1 2 @ 51_0402_5%
PCH XDP Conn.
OSC
OSC
SPI
31 KBC_SPI_SO AV1 V1 GPIO19 R152 1 2 0_0402_5% HDD_HALTLED
SPI_MISO SATA1GP / GPIO19 HDD_HALTLED 30
PCH_JTAG_RST# R744 1 2 @ 51_0402_5%
JTAG1 Swap. 4/24
2 2 IBEXPEAK-M_FCBGA1071
NC
NC
1 GND0 GND1 2
Y3 3 4 XDP_FN16 R709 1 2 @ 33_0402_5%
OBSFN_A0 OBSFN_C0 PCH_XDP_GPIO28 16
5 6 XDP_FN17 R710 1 2 @ 33_0402_5% PCH_XDP_GPIO0 16,27
2
OBSFN_A1 OBSFN_C1
Change R188 ~ R195 to NO INSTALL. 7/14 7 GND2 GND3 8
R702 1 2 @ 33_0402_5% XDP_FN0 9 10 XDP_FN8 R711 1 2 @ 33_0402_5%
B +3VALW +3VALW +3VALW +3VALW 16 USB_OC#0 OBSDATA_A0 OBSDATA_C0 PCH_XDP_GPIO20 14 B
R703 1 2 @ 33_0402_5% XDP_FN1 11 12 XDP_FN9 R712 1 2 @ 33_0402_5%
16 USB_OC#1 OBSDATA_A1 OBSDATA_C1 PCH_XDP_GPIO18 14
13 GND4 GND5 14
R704 1 2 @ 33_0402_5% XDP_FN2 15 16 XDP_FN10 R713 1 2 @ 33_0402_5% SATA_DET#0
16 USB_OC#2 OBSDATA_A2 OBSDATA_C2
1
2 16 USB_OC#3
R705 1 2 @ 33_0402_5% XDP_FN3 17 OBSDATA_A3 OBSDATA_C3 18 XDP_FN11 R714 1 2 @ 33_0402_5% GPIO19
PCH JTAG Enable PCH JTAG Disable R188 R189 R190 R191 19 20
PCH Pin RefDes ES1 ES2 ES1 ES2 @ 200_0402_5% @ 200_0402_5% @ 200_0402_5% @ 20K_0402_5% GND6 GND7
21 OBSFN_B0 OBSFN_D0 22
PCH_JTAG_TDO R189 No Install 200ohm No Install No Install 23 24
R193 No Install 100ohm No Install No Install OBSFN_B1 OBSFN_D1
25 26
2
PCH_JTAG_TMS R188 200ohm 200ohm No Install No Install PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI PCH_JTAG_RST# R134 1 XDP_FN4 GND8 GND9 XDP_FN12
16 USB_OC#4 2 @ 33_0402_5% 27 OBSDATA_B0 OBSDATA_D0 28 R715 1 2 @ 33_0402_5% PCH_XDP_GPIO36 16
R192 100ohm 100ohm No Install No Install R706 1 2 @ 33_0402_5% XDP_FN5 29 30 XDP_FN13 R716 1 2 @ 33_0402_5%
PCH_JTAG_TDI* R190 200ohm 200ohm 20Kohm No Install 16 USB_OC#5 OBSDATA_B1 OBSDATA_D1 PCH_XDP_GPIO37 16
31 GND10 GND11 32
1
R194 100ohm 100ohm 10Kohm No Install R707 1 2 @ 33_0402_5% XDP_FN6 33 34 XDP_FN14 R717 1 2 @ 33_0402_5%
PCH_JTAG_TCK R187 51ohm 51ohm 51ohm 51ohm 16 USB_OC#6 OBSDATA_B2 OBSDATA_D2 PCH_XDP_GPIO16 16
R192 R193 R194 R195 R708 1 2 @ 33_0402_5% XDP_FN7 35 36 XDP_FN15 R718 1 2 @ 33_0402_5%
PCH_JTAG_RST# R191 20Kohm 20Kohm No Install No Install 16,30 USB_OC#7 OBSDATA_B3 OBSDATA_D3 PCH_XDP_GPIO49 16
@ 100_0402_1% @ 100_0402_1% @ 100_0402_1% @ 10K_0402_5% 37 38
R195 10Kohm 10Kohm No Install No Install GND12 GND13
4,11,31,34 PW R_GD 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40
R179 1 2 0_0402_5% XDP_PWRBTN#_R 41 42
4,15 PM_PWRBTN#_R
2
HOOK1 ITPCLK#/HOOK5
+3VS 43 VCC_OBS_AB VCC_OBS_CD 44 +3VS
45 46 R178 1 2 1K_0402_5%
HOOK2 RESET#/HOOK6 PLT_RST# 4,16,21,22,24,27,28,30
47 HOOK3 DBR#/HOOK7 48 XDP_DBRESET# 4,15
49 GND14 GND15 50
51 52 PCH_JTAG_TDO#_R R719 1 2 0_0402_1% PCH_JTAG_TDO
PAD T92 SDA TD0
53 54 PCH_JTAG_RST#_R R720 1 2 @ 0_0402_1% PCH_JTAG_RST#
PAD T93 SCL TRST#
55 56 PCH_JTAG_TDI_R R721 1 2 0_0402_1% PCH_JTAG_TDI
R187 1 PCH_JTAG_TCK PCH_JTAG_TCK_R TCK1 TDI PCH_JTAG_TMS_R PCH_JTAG_TMS
2 51_0402_5% 1 2 57 TCK0 TMS 58 R722 1 2 0_0402_1%
D51 D52 R181 0_0402_1% 59 60
SATA_PTX_C_DRX_P4 SATA_PRX_C_DTX_N4 GND16 GND17
3 3 NI R720. 0206
1 1 CONN@ SAMTE_BSH-030-01-L-D-A
2 SATA_PTX_C_DRX_N4 2 SATA_PRX_C_DTX_P4
Reverse signals of
@ PJDLC05_SOT23-3 @ PJDLC05_SOT23-3 +3VL to +VREG3_51125. 7/22 pin1&2. 1/19
4
3
E-SATA CONN.
2 NC2
1 NC1
A JETA1 +RTCVCC +VREG3_51125 BATT1.1 JBATT1 A

1 CONN@ACES_50273-0020N-001
SATA_PTX_DRX_P4 C241 1 GND
2 0.01U_0402_50V7K SATA_PTX_C_DRX_P4 2 A+
SATA_PTX_DRX_N4 C242 1 2 0.01U_0402_50V7K SATA_PTX_C_DRX_N4 3 8 D1
2
1
A- GND
4 GND GND 9 2
SATA_PRX_DTX_N4 C245 1 2 0.01U_0402_50V7K SATA_PRX_C_DTX_N4 5 10 1
SATA_PRX_DTX_P4 C246 1 SATA_PRX_C_DTX_P4 B- GND
2 0.01U_0402_50V7K 6 B+ GND 11 3 1 2
7 HF R196 1K_0402_5%
GND
CONN@ SUYIN_127365MR007S406ZR
1
C272 BAV70W_SOT323-3
1U_0603_10V4Z
2
IBEX-M(1/6)-HDA/JTAG/SATA
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
Add D12. 7/7

U4B
D12 +3VALW
D BG30 B9 LID_SW #_ISO 2 1 D
PERN1 SMBALERT# / GPIO11 LID_SW # 20,25,31 Add PU R148. 12/11
BJ30 PERP1
BF29 H14 SMBCLK CH751H-40PT_SOD323-2
PETN1 SMBCLK GPIO74 R148 1
BH29 PETP1 2 10K_0402_5%
C8 SMBDATA
PCIE_PRX_DTX_N2 SMBDATA
30 PCIE_PRX_DTX_N2 AW30 PERN2
30 PCIE_PRX_DTX_P2 PCIE_PRX_DTX_P2 BA30 SMBCLK R197 1 2 2.2K_0402_5%
C273 1 PCIE_PTX_DRX_N2 PERP2 SML0ALERT#
EXP 30 PCIE_PTX_C_DRX_N2 2 0.1U_0402_16V4Z BC30 PETN2 SML0ALERT# / GPIO60 J14 T25 PAD
C274 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_P2 BD30
30 PCIE_PTX_C_DRX_P2 PETP2
C6 SML0CLK SMBDATA R198 1 2 2.2K_0402_5%
SML0CLK SML0CLK 22
AU30
SMBus
PERN3 SML0DATA
AT30 PERP3 SML0DATA G8 SML0DATA 22
AU32 SML0CLK R199 1 2 2.2K_0402_5% Change R199, R200 from
PETN3
AV32 PETP3
M14 GPIO74 4.7K to 2.2K. 4/23
PCIE_PRX_DTX_N4 SML1ALERT# / GPIO74 SML0DATA R200 1
24 PCIE_PRX_DTX_N4 BA32 PERN4 2 2.2K_0402_5%
24 PCIE_PRX_DTX_P4 PCIE_PRX_DTX_P4 BB32 E10 SML1CLK
C275 1 PCIE_PTX_DRX_N4 PERP4 SML1CLK / GPIO58 +3VALW
WLAN 24 PCIE_PTX_C_DRX_N4 2 0.1U_0402_16V4Z BD32 PETN4
C276 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_P4 BE32 G12 SML1DATA SML1CLK R201 1 2 4.7K_0402_5%
24 PCIE_PTX_C_DRX_P4 PETP4 SML1DATA / GPIO75
PCI-E*
BF33 PERN5
2
BH33 T13 SML1DATA R202 1 2 4.7K_0402_5%
Controller
PERP5 CL_CLK1 CL_CLK1 24
BG32 R377
PETN5 @ 10K_0402_5%
BJ32 PETP5 CL_DATA1 T11 CL_DATA1 24 Change R204 from
LID_SW #_ISO R204 1 2 100K_0402_5%
Link
PCIE_PRX_DTX_N6 BA34 T9
10K to 100K. 7/7
22 PCIE_PRX_DTX_N6 CL_RST#1 24
1
PCIE_PRX_DTX_P6 PERN6 CL_RST1#
22 PCIE_PRX_DTX_P6 AW34 PERP6
NIC C279 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_N6 BC34 Q64 SML0ALERT# R205 1 2 10K_0402_5%
22 PCIE_PTX_C_DRX_N6 PETN6
C280 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_P6 BD34 @ 2N7002_SOT23-3
22 PCIE_PTX_C_DRX_P6 PETP6
H1 PEG_CLKREQ_R# R206 1 2 10K_0402_5%
PEG_A_CLKRQ# / GPIO47
S
AT34 PERN7 1 3 PEG_CLKREQ# 21
AU34 PERP7
C C
New add for USB3.0. 11/20 AU36 PETN7 CLKOUT_PEG_A_N AD43 CLK_PEG_VGA_PCH# 21
AV36 AD45
G
CLK_PEG_VGA_PCH 21
2
PETP7 CLKOUT_PEG_A_P
27 PCIE_PRX_DTX_N8 PCIE_PRX_DTX_N8 BG34 AN4 Q3A
PERN8 CLKOUT_DMI_N CLK_EXP# 4
2
PEG
27 PCIE_PRX_DTX_P8 PCIE_PRX_DTX_P8 BJ34 AN2 2N7002DW-T/R7_SOT363-6
PERP8 CLKOUT_DMI_P CLK_EXP 4
USB3.0 C653 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_N8 BG36 R915 SMBCLK 6 1 SMB_CLK_S3
27 PCIE_PTX_C_DRX_N8 PETN8 SMB_CLK_S3 4,9,10,12,26
C654 1 2 0.1U_0402_16V4Z PCIE_PTX_DRX_P8 BJ36 @ 10K_0402_5%
27 PCIE_PTX_C_DRX_P8 PETP8 +3VS
AT1 CLK_DP# T26 PAD 2 1 SML1CLK_MXM
CLKOUT_DP_N / CLKOUT_BCLK1_N CLK_DP R207 @ 0_0402_5%
AT3 T27 PAD
2
CLKOUT_DP_P / CLKOUT_BCLK1_P
AK48 CLKOUT_PCIE0N
AK47 CLKOUT_PCIE0P
From CLK BUFFER

AW24 Q3B
CLKIN_DMI_N CLK_DMI# 12
+3VALW R208 1 2 10K_0402_5% P9 BA24 +3VS 2N7002DW-T/R7_SOT363-6
PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_DMI 12
SMBDATA 3 4 SMB_DATA_S3 SMB_DATA_S3 4,9,10,12,26
Add R459 and connect to +3VS
AM43 AP3 2 1 SML1DAT_MXM
CLK_PCIE_LAN_REQ#_R. AM45
CLKOUT_PCIE1N CLKIN_BCLK_N
AP1
CLK_BUF_BCLK# 12
R209 @ 0_0402_5%
13 PCH_XDP_GPIO18 CLK_BUF_BCLK 12
5
CLKOUT_PCIE1P CLKIN_BCLK_P
+3VS R210 1 2 10K_0402_5% R459 1 2 0_0402_1% U4 PCIECLKRQ1# / GPIO18
22 CLK_PCIE_LAN_REQ#_R CLKIN_DOT_96N F18 CLK_BUF_DOT96# 12
CLKIN_DOT_96P E18 CLK_BUF_DOT96 12
30 CLK_PCIE_EXP_PCH# AM47 CLKOUT_PCIE2N
EXP 30 CLK_PCIE_EXP_PCH AM48 CLKOUT_PCIE2P
CLKIN_SATA_N / CKSSCD_N AH13 CLK_BUF_CKSSCD# 12
CLKREQ_EXP# N4 AH12 +3VS
13 PCH_XDP_GPIO20 PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_CKSSCD 12
Remove R724.7/21 Install. 2/6
AH42 P41 CLK_14M_PCH SMBCLK R215 1 2 @ 0_0402_5% SML1CLK PCH_XDP_GPIO20 1 2
CLKOUT_PCIE3N REFCLK14IN CLK_14M_PCH 12
AH41 R687 10K_0402_5%
CLKOUT_PCIE3P SMBDATA R218 1 2 @ 0_0402_5% SML1DATA
+3VALW R217 1 2 10K_0402_5% A8 J42 SMB_CLK_S3 1 2
PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK CLK_PCI_FB 16
R213 10K_0402_5%
B SMB_DATA_S3 B
U4B.AF38 : Layout 1 2
AM51 AH51 XTAL25_IN R214 10K_0402_5%
24 CLK_PCIE_MCARD_PCH# CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT ruletrace length < 0.5"
WLAN 24 CLK_PCIE_MCARD_PCH AM53 CLKOUT_PCIE4P XTAL25_OUT AH53
24 CLKREQ_WLAN# M9 AF38 R222 1 2 90.9_0402_1% +1.05VS Q7A Q23A

PCIECLKRQ4# / GPIO26 XCLK_RCOMP 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
SML1CLK 1 6 SML1CLK_R 6 1 SML1CLK_MXM SML1CLK_MXM 21
AJ50 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 T45 T82 PAD
Change power rail from +3VS. 11/11 AJ52 R916
CLKOUT_PCIE5P 0_0402_5%
2
R223 1 2 10K_0402_5% H6 P43 2 1
Clock Flex
+3VALW PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 T83 PAD CAP_CLK 25,31

New for USB30. 11/20 Swap. 2/27 +3VS
Q7B Q23B
AK53 T42 CLK_14M_SIO_P R625 2 1 22_0402_5% 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
27 CLK_PCIE_USB30_PCH# CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 CLK_14M_SIO_PCH 33
AK51 SML1DATA 4 3 SML1DAT_R 3 4 SML1DAT_MXM SML1DAT_MXM 21
27 CLK_PCIE_USB30_PCH CLKOUT_PEG_B_P
P13 N50 CLK_48M_USB3_P R228 2 1 22_0402_5% +3VALW R917
27 PEG_B_CLKREQ# PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 CLK_48M_USB3_PCH 27
0_0402_5%
5
2 1 CAP_DAT 25,31
+3VALW R701 1 2 @ 10K_0402_5% IBEXPEAK-M_FCBGA1071
NIC @ R701. 12/02 R52
+3VS
1 2 0_0402_5%
Move CLK_PCIE_LAN_PCH/# differential clock XTAL25_IN CLK_14M_SIO_P C216 2 1 @ 10P_0402_50V8C
2
from CLKOUT_PEG_B_P/N to R729 CLK_14M_PCH C217 2 1 @ 10P_0402_50V8C

CLKOUT_PCIE6P/N...and move CLK_PCIE_LAN_REQ 10K_0402_5% XTAL25_OUT 1 2 @
R229 1M_0402_5% CLK_48M_USB3_P C218 2 1 22P_0402_50V8J
to PCIECLKREQ6# (GPIO45) and add R300 Y4
1
pull-up to +3VS. 10/30 Install 5/27.

1 2
@
A 25MHZ_20P_1BG25000CK1A A
@
C281
C282
18P_0402_50V8J
@
18P_0402_50V8J
1 1
2 2
IBEX-M(2/6)-PCI-E/SMBUS/CLK
No install. 4/25 Size Document Number R ev
Add PD R52. 5/4 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
U4C U4D
FDI_RXN0 BA18 T48 L_BKLTEN SDVO_TVCLKINN BJ46

5 DMI_CTX_PRX_N0 BC24 DMI0RXN FDI_RXN1 BH17 T47 L_VDD_EN SDVO_TVCLKINP BG46
5 DMI_CTX_PRX_N1 BJ22 DMI1RXN FDI_RXN2 BD16
5 DMI_CTX_PRX_N2 AW20 DMI2RXN FDI_RXN3 BJ16 Y48 L_BKLTCTL SDVO_STALLN BJ48
5 DMI_CTX_PRX_N3 BJ20 DMI3RXN FDI_RXN4 BA16 SDVO_STALLP BG48
FDI_RXN5 BE14 AB48 L_DDC_CLK
5 DMI_CTX_PRX_P0 BD24 DMI0RXP FDI_RXN6 BA14 Y45 L_DDC_DATA SDVO_INTN BF45
5 DMI_CTX_PRX_P1 BG22 DMI1RXP FDI_RXN7 BC12 SDVO_INTP BH45
5 DMI_CTX_PRX_P2 BA20 DMI2RXP AB46 L_CTRL_CLK
5 DMI_CTX_PRX_P3 BG20 DMI3RXP FDI_RXP0 BB18 V48 L_CTRL_DATA
FDI_RXP1 BF17
D
5 DMI_CRX_PTX_N0 BE22 DMI0TXN FDI_RXP2 BC16 AP39 LVD_IBG SDVO_CTRLCLK T51 D
5 DMI_CRX_PTX_N1 BF21 DMI1TXN FDI_RXP3 BG16 AP41 LVD_VBG SDVO_CTRLDATA T53
5 DMI_CRX_PTX_N2 BD20 DMI2TXN FDI_RXP4 AW16
5 DMI_CRX_PTX_N3 BE18 DMI3TXN FDI_RXP5 BD14 AT43 LVD_VREFH
FDI_RXP6 BB14 AT42 LVD_VREFL DDPB_AUXN BG44
5 DMI_CRX_PTX_P0 BD22 DMI0TXP FDI_RXP7 BD12 DDPB_AUXP BJ44
5 DMI_CRX_PTX_P1 BH21 DMI1TXP DDPB_HPD AU38
LVDS
5 DMI_CRX_PTX_P2 BC20 DMI2TXP AV53 LVDSA_CLK#
BD18 BJ14 R230 1 2 1K_0402_5% AV51 BD42
5 DMI_CRX_PTX_P3 DMI3TXP FDI_INT LVDSA_CLK DDPB_0N
BC42
DMI
FDI
R231 1 DDPB_0P
FDI_FSYNC0 BF13 2 1K_0402_5% BB47 LVDSA_DATA#0 DDPB_1N BJ42
+1.05VS
Digital Display Interface

BH25 DMI_ZCOMP BA52 LVDSA_DATA#1 DDPB_1P BG42
BH13 R232 1 2 1K_0402_5% AY48 BB40
R233 1 FDI_FSYNC1 LVDSA_DATA#2 DDPB_2N
2 49.9_0402_1% DMI_IRCOMP BF25 DMI_IRCOMP AV47 LVDSA_DATA#3 DDPB_2P BA40
BJ12 R234 1 2 1K_0402_5% AW38
FDI_LSYNC0 DDPB_3N
BB48 LVDSA_DATA0 DDPB_3P BA38
Layout ruletrace BG14 R235 1 2 1K_0402_5% BA50
FDI_LSYNC1 LVDSA_DATA1
AY49
length < 0.5" AV48
LVDSA_DATA2
Y49
LVDSA_DATA3 DDPC_CTRLCLK
DDPC_CTRLDATA AB49
AP48 LVDSB_CLK#
AP47 LVDSB_CLK DDPC_AUXN BE44
DDPC_AUXP BD44
4,13 XDP_DBRESET# R236 1 2 0_0402_5% SYS_RST# T6 J12 PCIE_WAKE# AY53 AV40
SYS_RESET# WAKE# PCIE_WAKE# 24,27,30 LVDSB_DATA#0 DDPC_HPD
AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
43 VGATE VGATE M6 Y1 PM_CLKRUN# AT53 BD40
SYS_PWROK CLKRUN# / GPIO32 PM_CLKRUN# 28,31,32,33 LVDSB_DATA#3 DDPC_0P
DDPC_1N BF41
Connect directly after remove R237. 5/15 AY51 BH41
System Power Management

R339 1 LVDSB_DATA0 DDPC_1P
31 PDG_IN 2 1K_0402_5% B17 PWROK AT48 LVDSB_DATA1 DDPC_2N BD38
Connect to TPM. 11/30 AU50 LVDSB_DATA2 DDPC_2P BC38
Change R339 to 1K and AT51 LVDSB_DATA3 DDPC_3N BB36
R238 1 2 0_0402_5% K5 P8 SUS_STAT# BA36
link to PDG_IN. 5/14 MEPWROK SUS_STAT# / GPIO61 SUS_STAT# 28,32,33 DDPC_3P
C C
34 M_PWROK R239 1 2 0_0402_5% A10 F3 SUS_CLK PADT29 AA52 U50

LAN_RST# SUSCLK / GPIO62 CRT_BLUE DDPD_CTRLCLK
AB53 CRT_GREEN DDPD_CTRLDATA U52
AD53 CRT_RED
4 PM_DRAM_PWRGD D9 DRAMPWROK SLP_S5# / GPIO63 E4 SLP_S5# 29
DDPD_AUXN BC46
39 RPGOOD R240 1 2 0_0402_5% V51 BD46
R241 1 CRT_DDC_CLK DDPD_AUXP
31 PM_RSMRST# 2 10K_0402_5% C16 RSMRST# SLP_S4# H7 SLP_S4# 35,42 V53 CRT_DDC_DATA DDPD_HPD AT38
31 SUS_PW R_ACK R352 1 2 0_0402_5%
DDPD_0N BJ40
+3VALW R242 1 2 10K_0402_5% M1 P12 Y53 BG40
SUS_PWR_DN_ACK / GPIO30 SLP_S3# SLP_S3# 30,31,34,35,38,40,41 CRT_HSYNC DDPD_0P
Y51 CRT_VSYNC DDPD_1N BJ38
4,13 PM_PWRBTN#_R DDPD_1P BG38
CRT
25 ON/OFFBTN# R243 1 2 0_0402_5% P5 K8 BF37
PWRBTN# SLP_M# PM_SLP_M# 31,34,35 DDPD_2N
AD48 DAC_IREF DDPD_2P BH37
AB51 CRT_IRTN DDPD_3N BE36
31 AC_PRESENT AC_PRESENT P7 N2 BD36
ACPRESENT / GPIO31 TP23 DDPD_3P
1K_0402_0.5%
1
R245
Remove to KBC. 12/05 LOW_BAT#_R A6 BJ10
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC 4
IBEXPEAK-M_FCBGA1071
IBEX_R# F14 F6 PM_SLP_LAN#

PM_SLP_LAN# 35,42
2
RI# SLP_LAN# / GPIO29
+3VALW
+3VS
PM_CLKRUN# 1 2 VGATE R249 1 2 10K_0402_5% LOW_BAT#_R R248 1 2 10K_0402_5%

R246 10K_0402_5%
B IBEX_R# R250 1 2 10K_0402_5% B
Correct connect to VGATE. 5/19
PCIE_WAKE# R251 1 2 1K_0402_5%
PM_SLP_LAN# R252 1 2 10K_0402_5%
AC_PRESENT R253 1 2 @ 10K_0402_5% NI R253. 5/14

SYS_RST# R254 1 2 @ 10K_0402_5%
A A

IBEX-M(3/6)-DMI/GPIO/LVDS
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
U4E U4F
32 PCI_AD[0..31] 13,27 PCH_XDP_GPIO0 Update on 10/30.
PCI_AD0 H40 AY9
AD0 NV_CE#0 NV_CE0# 24
PCI_AD1 N34 BD1 +3VS R255 1 2 10K_0402_5% PCH_XDP_GPIO0 Y3 AH45
AD1 NV_CE#1 NV_CE1# 24 BMBUSY# / GPIO0 CLKOUT_PCIE6N CLK_PCIE_LAN_PCH# 22
PCI_AD2 C44 AP15 AH46 NIC
AD2 NV_CE#2 NV_CE2# 24 CLKOUT_PCIE6P CLK_PCIE_LAN_PCH 22
PCI_AD3 A38 BD8 44 OCP# C38
AD3 NV_CE#3 NV_CE3# 24 TACH1 / GPIO1
PCI_AD4 C36
PCI_AD5 AD4 RUNSCI_EC#
J34 AD5 NV_DQS0 AV9 NV_DQS0 24 Danbury Technology Enable 31 RUNSCI_EC# D37 TACH2 / GPIO6
PCI_AD6 A40 BG8 AF48
AD6 NV_DQS1 NV_DQS1 24 NV_ALE High=Endabled CLKOUT_PCIE7N
MISC
PCI_AD7 D45 4,21 THERM_SCI# J32 AF47
PCI_AD8 AD7 Low=Disable (@) TACH3 / GPIO7 CLKOUT_PCIE7P
E36 AD8 NV_DQ0 / NV_IO0 AP7 NV_DQ0 24
PCI_AD9 H48 AP6 NV_ALE R257 1 2 @ 1K_0402_5% +V_NVRAM_VCCQ PCH_DDR_RST F10
AD9 NV_DQ1 / NV_IO1 NV_DQ1 24 GPIO8
PCI_AD10 E40 AT6 R256 2 1 10K_0402_5% +3VS
AD10 NV_DQ2 / NV_IO2 NV_DQ2 24
PCI_AD11 C40 AT9 Reserve R53. 4/25 LAN_DIS# K9 U2
AD11 NV_DQ3 / NV_IO3 NV_DQ3 24 22,23 LAN_DIS# LAN_PHY_PWR_CTRL / GPIO12 A20GATE GATEA20 31
PCI_AD12 M48 BB1
PCI_AD13 M45 AV6 GPIO15 T7
D AD13 NV_DQ5 / NV_IO5 NV_DQ5 24 DMI Termination Voltage GPIO15 D
PCI_AD14 F53 BB3
AD14 NV_DQ6 / NV_IO6 NV_DQ6 24 NV_CLE Set to Vss when LOW
PCI_AD15 M40 BA4 PCH_XDP_GPIO16 AA2 AM3
AD15 NV_DQ7 / NV_IO7 NV_DQ7 24 Set to Vcc when HIGH 13 PCH_XDP_GPIO16 SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK#_P 4
NVRAM
PCI_AD16 M43 BE4
PCI_AD17 J36 BB6 NV_CLE R263 1 2 @ 1K_0402_5% +3VS ALS_EN# F38 AM1
AD17 NV_DQ9 / NV_IO9 NV_DQ9 24 20 ALS_EN# TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK_P 4
PCI_AD18 K48 BD6
PCI_AD19 F40 BB7 Change to WWAN_DET#. 4/25 24 W WAN_DET# W WAN_DET# Y7 BG10 PCH_PECI_R R259 1 2 0_0402_5%
AD19 NV_DQ11 / NV_IO11 NV_DQ11 24 SCLOCK / GPIO22 PECI H_PECI 4
GPIO
PCI_AD20 C42 BC8
PCI_AD21 K46 BJ8 GPIO24 H10 T1 KB_RST#
AD21 NV_DQ13 / NV_IO13 NV_DQ13 24 GPIO24 RCIN# KB_RST# 31
PCI_AD22 M51 BJ6
PCI_AD23 J52 BG6 W W AN_TRANSMIT_OFF# AB12 BE10
AD23 NV_DQ15 / NV_IO15 NV_DQ15 24 24 W W AN_TRANSMIT_OFF# GPIO27 PROCPWRGD H_CPUPW RGD 4
CPU
PCI_AD24 K51
PCI_AD25 AD24 NV_ALE PCH_XDP_GPIO28 H_THERMTRIP#_L 1
L34 AD25 NV_ALE BD3 NV_ALE 24 13 PCH_XDP_GPIO28 V13 GPIO28 THRMTRIP# BD10 2 54.9_0402_1% H_THERMTRIP# 4
PCI_AD26 F42 AY6 NV_CLE R260
AD26 NV_CLE NV_CLE 24
PCI_AD27 J40 STP_PCI# M11 +VCCP 1 2
PCI_AD28 G46
AD27 U4.AU2 Layout ruletrace length < 0.5" STP_PCI# / GPIO34 R261 56_0402_5%
PCI_AD29 AD28 R262 1 SATA_CLKREQ#
F44 AD29 NV_RCOMP AU2 2 32.4_0402_1% V6 SATACLKREQ# / GPIO35
PCI_AD30 M47 R1007 1 2 0_0402_5%
AD30 13 PCH_XDP_GPIO36
PCI
PCI_AD31 H36 AV7 AB7 BA22 T32 PAD
AD31 NV_RB# NV_RB# 24 31,33 NPCI_RST# SATA2GP / GPIO36 TP1
J50 AY8 PCH_XDP_GPIO37 AB13 AW22 T33 PAD
32 PCI_CBE0# C/BE0# NV_WR#0_RE# NV_RE#_WR#0 24 13 PCH_XDP_GPIO37 SATA3GP / GPIO37 TP2
32 PCI_CBE1# G42 C/BE1# NV_WR#1_RE# AY5 NV_RE#_WR#1 24
H47 Do ckID0 V3 BB22 T34 PAD
32 PCI_CBE2# C/BE2# 29 DockID0 SLOAD / GPIO38 TP3
32 PCI_CBE3# G34 C/BE3# NV_WE#_CK0 AV11 NV_W E#_CK0 24
BF5 Do ckID1 P3 AY45 T35 PAD
NV_WE#_CK1 NV_W E#_CK1 24 29 DockID1 SDATAOUT0 / GPIO39 TP4
PCI_PIRQA# G38
PCI_PIRQB# PIRQA#
H51 PIRQB# 22 CLK_PCIE_LAN_REQ# H3 PCIECLKRQ6# / GPIO45 TP5 AY46 T36 PAD
PCI_PIRQC# B37 H18
PCI_PIRQD# PIRQC# USBP0N Change JUSBL1from port0 to port1. 0204 R264 1
A44 PIRQD# USBP0P J18 +3VALW 2 10K_0402_5% F1 PCIECLKRQ7# / GPIO46 TP6 AV43 T37 PAD
USBP1N A18 USB20_N1 26
PCI_REQ0# F51 REQ0# USBP1P C18 USB20_P1 26
CONN GPIO48 AB6 SDATAOUT1 / GPIO48 TP7 AV45 T38 PAD
PCI_REQ1# A46 N20
REQ1# / GPIO50 USBP2N USB20_N2 19
32 PCI_REQ2#
PCI_REQ2# B45 REQ2# / GPIO52 USBP2P P20 USB20_P2 19
CONN 13 PCH_XDP_GPIO49
PCH_XDP_GPIO49 AA4 SATA5GP / GPIO49 TP8 AF13 T39 PAD
C PCI_REQ3# M53 J20 C
REQ3# / GPIO54 USBP3N USB20_N3 19
USBP3P L20 CONN
USB20_P3 19 24 W LAN_TRANSMIT_OFF#
W LAN_TRANSMIT_OFF# F8 GPIO57 TP9 M18 T40 PAD
T42 PAD PCI_GNT0# F48 F20
GNT0# USBP4N USB20_N4 30
T104 PAD MODEM_DISABLE# K45
GNT1# / GPIO51 USBP4P G20 EXPRESS
USB20_P4 30 TP10 N18 T41 PAD
PCI_GNT2# F36 A20
32 PCI_GNT2# GNT2# / GPIO53 USBP5N Remove USB from DP. 0224 Dream color
PCI_GNT3# H53 C20 A4 AJ24 T43 PAD
GNT3# / GPIO55 USBP5P VSS_NCTF_1 TP11
M22 A49
NCTF
USBP6N VSS_NCTF_2
RSVD
PCI_PIRQE# B41 N22 WLAN A5 AK41 T44 PAD
32 PCI_PIRQE# PIRQE# / GPIO2 USBP6P VSS_NCTF_3 TP12
13 ODD_DET# ODD_DET# K53 B21 A50
PCI_PIRQG# PIRQF# / GPIO3 USBP7N VSS_NCTF_4
32 PCI_PIRQG# A36 PIRQG# / GPIO4 USBP7P D21 A52 VSS_NCTF_5 TP13 AK42 T45 PAD
ACCEL_INT# A48 H22 A53
26 ACCEL_INT# PIRQH# / GPIO5 USBP8N USB20_N8 26 18 PCH_NCTF6 VSS_NCTF_6
USBP8P J22 USB20_P8 26 Bluetooth 18 PCH_NCTF7 B2 VSS_NCTF_7 TP14 M32 T46 PAD
USB
24,32 PCI_RST# K6 PCIRST# USBP9N E22 USB20_N9 24 B4 VSS_NCTF_8

USBP9P F22 USB20_P9 24 WWAN B52 VSS_NCTF_9 TP15 N32 T47 PAD
PCI_SERR# E44 A22 B53
28,31,32 PCI_SERR# SERR# USBP10N USB20_N10 28 VSS_NCTF_10
PCI_PERR# E50 C22 Fingerprint BE1 M30 T48 PAD
32 PCI_PERR# PERR# USBP10P USB20_P10 28 VSS_NCTF_11 TP16
USBP11N G24 USB20_N11 29 BE53 VSS_NCTF_12
USBP11P H24 USB20_P11 29 DOCK BF1 VSS_NCTF_13 TP17 N30 T49 PAD
PCI_IR DY# A42 L24 BF53
32 PCI_IRDY# IRDY# USBP12N USB20_N12 20 VSS_NCTF_14
PCI_PAR H44 M24 USB Camera BH1 H12 T50 PAD
32 PCI_PAR PAR USBP12P USB20_P12 20 VSS_NCTF_15 TP18
PCI_DEVSEL# F46 A24 BH2
32 PCI_DEVSEL# DEVSEL# USBP13N USB20_N13 29 VSS_NCTF_16
PCI_FRAME# C46 C24 DOCK BH52 AA23 T51 PAD
32 PCI_FRAME# FRAME# USBP13P USB20_P13 29 VSS_NCTF_17 TP19
BH53
PCI_LOCK# D49 USBRBIAS Layout ruletrace length < 0.5" BJ1
VSS_NCTF_18
AB45
PLOCK# 18 PCH_NCTF19 VSS_NCTF_19 NC_1 T52 PAD
B25 USBRBIAS R265 1 2 22.6_0402_1% BJ2
PCI_STOP# USBRBIAS# VSS_NCTF_20
32 PCI_STOP# D41 STOP# BJ4 VSS_NCTF_21 NC_2 AB38 T53 PAD
PCI_TRDY# C48 D25 USB_OC#4 R147 1 2 0_0402_5% USB_OC#4_R BJ49
32 PCI_TRDY# TRDY# USBRBIAS VSS_NCTF_22
USB_OC#1 R725 1 2 0_0402_5% BJ5 AB42 T54 PAD
BT_OFF 26 VSS_NCTF_23 NC_3
32 PCI_PME# M7 PME# BJ50 VSS_NCTF_24
N16 USB_OC#0 BJ52 AB41 T55 PAD
OC0# / GPIO59 USB_OC#0 13 VSS_NCTF_25 NC_4
D5 J16 USB_OC#1 Change net name from GPIO43. 2/6 BJ53
4,13,21,22,24,27,28,30 PLT_RST# PLTRST# OC1# / GPIO40 USB_OC#1 13 18 PCH_NCTF26 VSS_NCTF_26
F16 USB_OC#2 D1 T39 T56 PAD
B OC2# / GPIO41 USB_OC#2 13 VSS_NCTF_27 NC_5 B
CLK_PCI_KBC_R N52 L16 USB_OC#3 USB_OC#5 R151 1 2 0_0402_5% ISO_PREP# ISO_PREP# 29 D2
CLKOUT_PCI0 OC3# / GPIO42 USB_OC#3 13 VSS_NCTF_28
CLK_PCI_FB_R P53 E14 USB_OC#4 PCH_XDP_GPIO37 R726 1 2 0_0402_5% D53
CLKOUT_PCI1 OC4# / GPIO43 USB_OC#4 13 W EBCAM_ON 20 VSS_NCTF_29
CLK_PCI_TPM_R P46 G16 USB_OC#5 USB_OC#5 13 USB_OC#3 R727 1 2 0_0402_5% E1 P6 T57 PAD
CLKOUT_PCI2 OC5# / GPIO9 FPR_OFF 28 VSS_NCTF_30 INIT3_3V#
CLK_PCI_1394_R P51 F12 USB_OC#6 E53
CLKOUT_PCI3 OC6# / GPIO10 USB_OC#6 13 VSS_NCTF_31
CLK_PCI_DB_P P48 T15 USB_OC#7 Change net name. 4/25 C10 T58 PAD
CLKOUT_PCI4 OC7# / GPIO14 USB_OC#7 13,30 TP24
IBEXPEAK-M_FCBGA1071 A16 swap overide Strap/Top-Block Boot BIOS Strap +3VALW
Swap Override jumper PCI_GNT0# MODEM_DISABLE# Boot BIOS Location
Low=A16 swap 0 0 LPC USB_OC#2 R66 1 2 10K_0402_5% Add. 4/25
PCI_GNT3# override/Top-Block 0 1 Reserved(NAND) +3VS
Install 5/27. Swap Override enabled 1 0 PCI USB_OC#4_R R143 1 2 10K_0402_5%
R266 1 2 22_0402_5% CLK_PCI_1394_R High=Default 1 1 SPI*
32 CLK_PCI_1394
R267 1 2 22_0402_5% USB_OC#0 R269 1 2 10K_0402_5% NPCI_RST# R270 1 2 10K_0402_5%
33 CLK_PCI_SIO_PCH
R271 1 2 22_0402_5% CLK_PCI_KBC_R C227 2 1 15P_0402_50V8J PCI_GNT3# R278 1 2 @ 1K_0402_5% MODEM_DISABLE# R268 1 2 @ 1K_0402_5%
31 CLK_PCI_KBC_PCH
R273 1 2 22_0402_5% PCI_GNT0# R272 1 2 @ 1K_0402_5% USB_OC#7 R274 1 2 10K_0402_5% SATA_CLKREQ# R275 1 2 10K_0402_5%
24 CLK_PCI_DEBUG_PCH
R276 1 2 22_0402_5% CLK_PCI_DB_P C228 2 1 15P_0402_50V8J NI. 4/25
28 CLK_PCI_DB_PCH
R277 1 2 22_0402_5% CLK_PCI_FB_R C229 2 1 15P_0402_50V8J 22,23,31 LED_LINK_LAN#_R GPIO8 R279 1 2@ 10K_0402_5% PCH_XDP_GPIO49 R280 1 2 10K_0402_5%
14 CLK_PCI_FB
R281 1 2 22_0402_5% CLK_PCI_TPM_R C220 2 1 15P_0402_50V8J
28 CLK_PCI_TPM_PCH +3VS USB_OC#6 R728 1 2 0_0402_5% LED_LINK_LAN#_R R283 1 2 10K_0402_5% KB_RST# R284 1 2 10K_0402_5%
+3VS
Change & Add on 02/23. 11 PCH_DDR_RST
PCH_DDR_RST R53 1 2 @ 0_0402_5%
Intel S3 ALS_EN# R286 1 2 10K_0402_5%
R282 1 2 0_0402_5% RUNSCI_EC# R288 1 2 10K_0402_5%

RP5 W WAN_DET# 1 2 R258 R300 1 2 @ 10K_0402_5%
PCI_REQ1# 1 8 10K_0402_5% W W AN_TRANSMIT_OFF# R289 1 2 @ 10K_0402_5% PCH_XDP_GPIO37 R290 1 2 10K_0402_5%
PCI_FRAME# 2 7 +3VS
PCI_TRDY# 3 6 RP6 W LAN_TRANSMIT_OFF# R291 1 2 10K_0402_5% PCH_XDP_GPIO16 R292 1 2 10K_0402_5%
ACCEL_INT# 4 5 PCI_PIRQA# 1 8
PCI_IR DY# 2 7 GPIO24 R293 1 2 10K_0402_5% Do ckID0 R294 1 2 10K_0402_5%
5
8.2K_0804_8P4R_5% PCI_REQ2# 3 6
RP7 PCI_PIRQD# 4 5 1 PLT_RST# GPIO15 R295 1 2 1K_0402_5% Do ckID1 R296 1 2 10K_0402_5%
P
A PCI_REQ0# IN1 A
1 8 4 BUF_PLT_RST# 4 O
PCI_PIRQB# 2 7 8.2K_0804_8P4R_5% 2 ISO_PREP# R298 1 2 10K_0402_5% GPIO48 R299 1 2 10K_0402_5%
IN2
G
ODD_DET# 3 6 RP8
PCI_REQ3# 4 5 PCI_LOCK# 1 8 Delete R297, duplicate on U6 Remove R300. 10/30 STP_PCI# R301 1 2 10K_0402_5%
3
PCI_PERR# 2 7 @ SN74AHC1G08DCKR_SC70-5
8.2K_0804_8P4R_5% PCI_DEVSEL# 3 6
R32. 2/10 PCH_XDP_GPIO28 R302 1 2 10K_0402_5%
RP9 PCI_SERR# 4 5
PCI_PIRQG# 1 8
PCI_PIRQC# 2
PCI_PIRQE# 3
7 8.2K_0804_8P4R_5% Security Classification Compal Secret Data Compal Electronics, Inc.
6 Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title
PCI_STOP# 4 5 PCI_REQ3# 1 2
R303 8.2K_0402_5%
IBEX-M(4/6)-PCI/USB/RSVD
8.2K_0804_8P4R_5% Size Document Number R ev
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
+1.05VS +3VS
+1.05VS
Chnage to TP. 2/6 U4J POWER U4G POWER
AB24 VCCCORE[1] VCCADAC[1] AE50
PAD T94 AP51 VCCACLK[1] VCCIO[5] V24 AB26 VCCCORE[2]
C286
1U_0603_10V4Z
C287
10U_0805_6.3V6M
0.1U_0402_16V4Z
10U_0805_6.3V6M
0.052A 0.069A
0.01U_0402_16V7K
VCCIO[6] V26 AB28 VCCCORE[3] VCCADAC[2] AE52
C289
C290
C291
AP53 VCCACLK[2] VCCIO[7] Y24 1 1 1 AD26 VCCCORE[4] 1.524A
CRT
Y26 C285 AD28 AF53 1 1 1
+1.05VM VCCIO[8] 1U_0402_6.3V4Z VCCCORE[5] VSSA_DAC[1]
AF26 VCCCORE[6]
VCC CORE
AF23 VCCLAN[1] VCCSUS3_3[1] V28 AF28 VCCCORE[7] VSSA_DAC[2] AF51
2 2 2
D
0.344A VCCSUS3_3[2] U28 AF30 VCCCORE[8] 2 2 2 D
AF24 VCCLAN[2] VCCSUS3_3[3] U26 AF31 VCCCORE[9]
VCCSUS3_3[4] U24 AH26 VCCCORE[10]
C288
1U_0402_6.3V4Z
VCCSUS3_3[5] P28 AH28 VCCCORE[11]
1 PAD T59 Y20 DCPSUSBYP VCCSUS3_3[6] P26 AH30 VCCCORE[12]
N28 AH31 0.030A AH38 R304 1 2 0_0603_5%
VCCSUS3_3[7] VCCCORE[13] VCCALVDS
VCCSUS3_3[8] N26 AJ30 VCCCORE[14]
1 AD38 VCCME[1] VCCSUS3_3[9] M28 AJ31 VCCCORE[15] VSSA_LVDS AH39
2 C292 +3VALW
VCCSUS3_3[10] M26
0.1U_0402_16V4Z AD39 L28 +1.05VS
USB
VCCME[2] VCCSUS3_3[11] R305 1
VCCSUS3_3[12] L26 VCCTX_LVDS[1] AP43 2 0_0603_5%
+1.05VM 2
AD41 VCCME[3] VCCSUS3_3[13] J28
+5VALW +3VALW 0.059A VCCTX_LVDS[2] AP45
C293
0.1U_0402_16V4Z
C294
0.1U_0402_16V4Z
J26 AT46
LVDS
VCCSUS3_3[14] VCCTX_LVDS[3]
AF43 VCCME[4] VCCSUS3_3[15] H28 1 1 Chnage to TP. 2/6 AK24 VCCIO[24] VCCTX_LVDS[4] AT45
VCCSUS3_3[16] H26
2
AF41 VCCME[5] 0.163AVCCSUS3_3[17] G28
R306 D2 +3VS
VCCSUS3_3[18] G26
2 2 PAD T95 BJ24 VCCAPLLEXP 0.042A
C295
1U_0402_6.3V4Z
AF42 F28 100_0402_1% AB34

VCCME[6] VCCSUS3_3[19] CH751H-40PT_SOD323-2 VCC3_3[2]
1 1.998A VCCSUS3_3[20] F26
V39 E28 AN20 AB35
1
VCCME[7] VCCSUS3_3[21] VCCIO[25] VCC3_3[3]
Clock and Miscellaneous

E26 AN22
HVCMOS
VCCSUS3_3[22] ICH_V5REF_SUS VCCIO[26]
V41 VCCME[8] VCCSUS3_3[23] C28 AN23 VCCIO[27] VCC3_3[4] AD35 1 2
2 C297 0.1U_0402_16V4Z
VCCSUS3_3[24] C26 20 mils AN24 VCCIO[28]
V42 VCCME[9] VCCSUS3_3[25] B27 1 AN26 VCCIO[29]
A28 Chnage C298 to C298 AN28
VCCSUS3_3[26] 1U_0402_6.3V4Z VCCIO[30]
Y39 A26 BJ26
VCCME[10] VCCSUS3_3[27] 1uF. 5/15 BJ28
VCCIO[31]
2 +1.05VS VCCIO[32]
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V4Z
Y41 VCCME[11] VCCSUS3_3[28] U23 AT26 VCCIO[33]

C299
C300
C301
AT28 VCCIO[34]
1 1 1 Y42 VCCME[12] VCCIO[56] V23 +1.05VS AU26 VCCIO[35]
AU28 +1.8VS
VCCIO[36]
10U_0603_6.3V6M
>1mA F24 ICH_V5REF_SUS AV26
V5REF_SUS +5VS +3VS VCCIO[37]
C307
C303
1U_0402_6.3V4Z
C304
1U_0402_6.3V4Z
C305
1U_0402_6.3V4Z
C306
1U_0402_6.3V4Z
AV28 VCCIO[38] VCCVRM[2] AT24
C 2 2 2 +VCCRTCEXT C
1 2 V9 DCPRTC 1 1 1 1 1 AW26 VCCIO[39]
C302 0.1U_0402_16V4Z AW28 VCCIO[40]
2
+VCCP
DMI
BA26 VCCIO[41] VCCDMI[1] AT16
0.035A >1mA K49 ICH_V5REF_RUN R307 D3 BA28 0.061A
V5REF 100_0402_1% 2 2 2 2 2 VCCIO[42]
AU24 BB26 AU16 1 2
PCI/GPIO/LPC
+1.8VS VCCVRM[3] VCCIO[43] VCCDMI[2]
CH751H-40PT_SOD323-2 BB28 C308 1U_0603_10V4Z
Chnage 10uF +3VS VCCIO[44]
0.072A J38 BC26
1
to 22uF for VCC3_3[8] VCCIO[45]
PCI E*
BB51 VCCADPLLA[1] BC28 VCCIO[46]
+V1.05S_VCCA_A_DPL ICH_V5REF_RUN +V_NVRAM_VCCQ
DB1. 12/03 BB53 VCCADPLLA[2] VCC3_3[9] L38
+3VS Add on 11/24.
BD26 VCCIO[47]
1 20 mils BD28 VCCIO[48]
0.073A M36 C309 1 BE26 AM16
+1.05VS +V1.05S_VCCA_B_DPL VCC3_3[10] 0.1U_0402_16V4Z C310 VCCIO[49] VCCPNAND[1]
BD51 VCCADPLLB[1] 0.357A BE28 VCCIO[50] VCCPNAND[2] AK16
C311
0.1U_0402_16V4Z
BD53 N36 1U_0402_6.3V4Z 1 BG26 AK20
VCCADPLLB[2] VCC3_3[11] 2 C219 VCCIO[51] VCCPNAND[3]
BG28 VCCIO[52] VCCPNAND[4] AK19 1
2
AH23 VCCIO[21] VCC3_3[12] P36 BH27 VCCIO[53] 0.156A VCCPNAND[5] AK15
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
AJ35 0.1U_0402_16V4Z AK13

VCCIO[22] +3VS 2 VCCPNAND[6]
C312
C313
C314
AH35 VCCIO[23] VCC3_3[13] U35 AN30 VCCIO[54] VCCPNAND[7] AM12

2
NAND / SPI
1 1 1 AN31 VCCIO[55] VCCPNAND[8] AM13
AF34 VCCIO[2] 3.208A C315 1 VCCPNAND[9] AM15
VCC3_3[14] AD13 2 0.1U_0402_16V4Z
AH34 VCCIO[3] +3VS AN35 VCC3_3[1]
2 2 2
Chnage to TP. 2/6
AF32 VCCIO[4] R308 1 2 0_0402_5% +3VM
+VCCSST VCCSATAPLL[1] AK3 +1.8VS AT22 VCCVRM[1] 0.035A
1
C316
2
0.1U_0402_16V4Z
V12 DCPSST 0.032A VCCSATAPLL[2] AK1 T96 PAD
Chnage to TP. 2/6 PAD T97 BJ18 VCCFDIPLL 6mA VCCME3_3[1] AM8
VCCME3_3[2] AM9
C321
0.1U_0402_16V4Z
FDI
+1.05VS AM23 VCCIO[1] 0.085A VCCME3_3[3] AP11
1 2 +V1.1A_INT_VCCSUS Y22 DCPSUS VCCME3_3[4] AP9 1
C317 0.1U_0402_16V4Z AH22
VCCIO[9]
B +3VALW IBEXPEAK-M_FCBGA1071 2 B
P18 VCCSUS3_3[29] VCCVRM[4] AT20 +1.8VS +1.05VS
1 2 0.2A@3. 3V U19
SATA
VCCSUS3_3[30]
PCI/GPIO/LPC
C322 0.1U_0402_16V4Z AH19

VCCIO[10]
U20 VCCSUS3_3[31]
VCCIO[11] AD20
U22 VCCSUS3_3[32]
C324
1U_0402_6.3V4Z
VCCIO[12] AF22
+3VS
1
VCCIO[13] AD19
1 2 0.4A@3. 3V V15 AF20 +1.05VS
C323 0.1U_0402_16V4Z VCC3_3[5] VCCIO[14]
VCCIO[15] AF19
2 L4
V16 VCC3_3[6] VCCIO[16] AH20
10UH_LB2012T100MR_20%_0805
Y16 AB19 1 2 +V1.05S_VCCA_A_DPL
VCC3_3[7] VCCIO[17]
VCCIO[18] AB20 1
+VCCP AB22
VCCIO[19] 1
AD22 +1.05VM C326 HF + C325
0.1A@1. 1V VCCIO[20] 1U_0402_6.3V4Z 220U_D2_4VM_R15
AT18 V_CPU_IO[1]
AA34 +PCH_VCC1_1_20 R309 1 2 0_0402_5% Remove R310. 4/25
CPU
VCCME[13] 2 2
C327
4.7U_0603_6.3V6K
C328
0.1U_0402_16V4Z
C329
0.1U_0402_16V4Z
>1mA Y34 +PCH_VCC1_1_21 R311 1 2 0_0402_5%

VCCME[14] +PCH_VCC1_1_22 R312 0_0402_5%
1 1 1 AU18 V_CPU_IO[2] VCCME[15] Y35 1 2
AA35 +PCH_VCC1_1_23 R313 1 2 0_0402_5%
VCCME[16] L5
10UH_LB2012T100MR_20%_0805
2 2 2
RTC
A12 2mA 6mA L30 R314 1 2 0_0402_5% +3VALW 1 2 +V1.05S_VCCA_B_DPL

VCCRTC VCCSUSHDA
HDA
C331
1U_0402_6.3V4Z
1
IBEXPEAK-M_FCBGA1071 1 1
C332 HF + C330
2 mA@3.3V 1U_0402_6.3V4Z 220U_D2_4VM_R15
+RTCVCC
A 2 2 2 A
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C333
C334
1 1
2 2

IBEX-M(5/6)-PWR
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
U4I U4H
AY7 VSS[159] VSS[259] H49 AB16 VSS[0]
B11 VSS[160] VSS[260] H5
B15 VSS[161] VSS[261] J24 AA19 VSS[1] VSS[80] AK30
B19 VSS[162] VSS[262] K11 AA20 VSS[2] VSS[81] AK31
B31 VSS[164] VSS[264] K47 AM19 VSS[4] VSS[83] AK34
B39 VSS[166] VSS[266] L14 AA26 VSS[6] VSS[85] AK38
D B7 L22 AA31 AK49 D
VSS[169] VSS[269] VSS[9] VSS[88]
BG12 VSS[170] VSS[270] L32 AA32 VSS[10] VSS[89] AK5
BB12 VSS[171] VSS[271] L36 AB11 VSS[11] VSS[90] AK8
BB16 VSS[172] VSS[272] L40 AB15 VSS[12] VSS[91] AL2
BB20 VSS[173] VSS[273] L52 AB23 VSS[13] VSS[92] AL52
BB24 VSS[174] VSS[274] M12 AB30 VSS[14] VSS[93] AM11
BB30 VSS[175] VSS[275] M16 AB31 VSS[15] VSS[94] BB44
BB34 M20 AB32 AD24 +3VS
VSS[176] VSS[276] VSS[16] VSS[95]
BB38 VSS[177] VSS[277] N38 AB39 VSS[17] VSS[96] AM20
1
BC10 M46 AB8 AM28 R315
VSS[181] VSS[281] VSS[21] VSS[100] CRACK_BGA 31
BC14 VSS[182] VSS[282] M49 AC2 VSS[22] VSS[101] BA42
6
BC18 M5 AC52 AM30 100K_0402_5%
VSS[183] VSS[283] VSS[23] VSS[102] Q4A
BC2 M8 AD11 AM31
2
VSS[184] VSS[284] VSS[24] VSS[103]
BC22 VSS[185] VSS[285] N24 AD12 VSS[25] VSS[104] AM32 2N7002DW-T/R7_SOT363-6
BC32 VSS[186] VSS[286] P11 AD16 VSS[26] VSS[105] AM34 16 PCH_NCTF6 2
BC36 VSS[187] VSS[287] AD15 AD23 VSS[27] VSS[106] AM35
BC40 P22 AD30 AM38
1
VSS[188] VSS[288] VSS[28] VSS[107]
BC44 VSS[189] VSS[289] P30 AD31 VSS[29] VSS[108] AM39
BC52 P32 AD32 AM42 +3VS
VSS[190] VSS[290] VSS[30] VSS[109]
BH9 VSS[191] VSS[291] P34 AD34 VSS[31] VSS[110] AU20
BD48 VSS[192] VSS[292] P42 AU22 VSS[32] VSS[111] AM46
BD49 VSS[193] VSS[293] P45 AD42 VSS[33] VSS[112] AV22
1
BD5 P47 AD46 AM49 CRACK_BGA
VSS[194] VSS[294] VSS[34] VSS[113] R316
BE12 VSS[195] VSS[295] R2 AD49 VSS[35] VSS[114] AM7
BE16 VSS[196] VSS[296] R52 AD7 VSS[36] VSS[115] AA50
3
BE20 T12 AE2 BB10 100K_0402_5%
VSS[197] VSS[297] VSS[37] VSS[116] Q4B
BE24 T41 AE4 AN32
2
VSS[198] VSS[298] VSS[38] VSS[117]
BE30 VSS[199] VSS[299] T46 AF12 VSS[39] VSS[118] AN50 2N7002DW-T/R7_SOT363-6
BE34 VSS[200] VSS[300] T49 Y13 VSS[40] VSS[119] AN52 16 PCH_NCTF7 5
C BE38 T5 AH49 AP12 C
VSS[201] VSS[301] VSS[41] VSS[120]
BE42 T8 AU4 AP42
4
VSS[202] VSS[302] VSS[42] VSS[121]
BE46 VSS[203] VSS[303] U30 AF35 VSS[43] VSS[122] AP46
BE48 U31 AP13 AP49 +3VS
VSS[204] VSS[304] VSS[44] VSS[123]
BE50 VSS[205] VSS[305] U32 AN34 VSS[45] VSS[124] AP5
BE6 VSS[206] VSS[306] U34 AF45 VSS[46] VSS[125] AP8
BE8 VSS[207] VSS[307] P38 AF46 VSS[47] VSS[126] AR2
1
BF3 V11 AF49 AR52 CRACK_BGA
VSS[208] VSS[308] VSS[48] VSS[127] R317
BF49 VSS[209] VSS[309] P16 AF5 VSS[49] VSS[128] AT11
BF51 VSS[210] VSS[310] V19 AF8 VSS[50] VSS[129] BA12
6
BG18 V20 AG2 AH48 100K_0402_5%
VSS[211] VSS[311] VSS[51] VSS[130] Q5A
BG24 V22 AG52 AT32
2
VSS[212] VSS[312] VSS[52] VSS[131]
BG4 VSS[213] VSS[313] V30 AH11 VSS[53] VSS[132] AT36 2N7002DW-T/R7_SOT363-6
BG50 VSS[214] VSS[314] V31 AH15 VSS[54] VSS[133] AT41 16 PCH_NCTF19 2
BH11 VSS[215] VSS[315] V32 AH16 VSS[55] VSS[134] AT47
BH15 V34 AH24 AT7
1
VSS[216] VSS[316] VSS[56] VSS[135] +3VS
BH19 VSS[217] VSS[317] V35 AH32 VSS[57] VSS[136] AV12
BH23 VSS[218] VSS[318] V38 AV18 VSS[58] VSS[137] AV16
1
BH39 V46 AH7 AV30 CRACK_BGA
VSS[221] VSS[321] VSS[61] VSS[140] R318
BH43 VSS[222] VSS[322] V47 AJ19 VSS[62] VSS[141] AV34
BH47 VSS[223] VSS[323] V49 AJ2 VSS[63] VSS[142] AV38
3
BH7 V5 AJ20 AV42 100K_0402_5%
VSS[224] VSS[324] VSS[64] VSS[143] Q5B
C12 V7 AJ22 AV46
2
VSS[225] VSS[325] VSS[65] VSS[144]
C50 VSS[226] VSS[326] V8 AJ23 VSS[66] VSS[145] AV49 2N7002DW-T/R7_SOT363-6
D51 VSS[227] VSS[327] W2 AJ26 VSS[67] VSS[146] AV5 16 PCH_NCTF26 5
E12 VSS[228] VSS[328] W52 AJ28 VSS[68] VSS[147] AV8
E16 Y11 AJ32 AW14
4
VSS[229] VSS[329] VSS[69] VSS[148]
E20 VSS[230] VSS[330] Y12 AJ34 VSS[70] VSS[149] AW18
E24 VSS[231] VSS[331] Y15 AT5 VSS[71] VSS[150] AW2
E30 VSS[232] VSS[332] Y19 AJ4 VSS[72] VSS[151] BF9
B E34 Y23 AK12 AW32 B
VSS[233] VSS[333] VSS[73] VSS[152]
E38 Y28 AM41 AW36
E42
E46
VSS[234]
VSS[235]
VSS[236]
VSS[334]
VSS[335]
VSS[336]
Y30
Y31
AN19
AK26
VSS[74]
VSS[75]
VSS[76]
VSS[153]
VSS[154]
VSS[155]
AW40
AW52
BGA Ball Cracking Prevention and Detection
E48 VSS[237] VSS[337] Y32 AK22 VSS[77] VSS[156] AY11
F49 VSS[240] VSS[340] Y46
F5 P49 IBEXPEAK-M_FCBGA1071
VSS[241] VSS[341]
G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
G18 VSS[244] VSS[344] Y8
G2 VSS[245] VSS[345] P24
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
A A

IBEX-M(6/6)-GND
Custom LA-4951P 0.4
5 4 3 2 1
A B C D E
JVGA1
Place cloce to JMXM1 1 2 VGA_R
L 3
1
3
2
4 4
VGA_G
5 5 6 6
7 7 8 8
L6 L7 +5VS +RCRT_VCC +CRTVDD VGA_B
9 9 10 10
0805CS-390XJLC_0805 0805CS-111XJLC_0805 F1 D4 11 12
DAC_RE 1.1A_6VDC_FUSE CH491D_SC59 11 12 D _HSYNC
21 DAC_RED 1 2 1 2 RED_R 29 13 13 14 14
L8 L9 1 2 2 1 15 16 D_VS YNC
0805CS-390XJLC_0805 0805CS-111XJLC_0805 15 16
W=40mils +CRTVDD 17 17 18 18 +CRTVDD
21 DAC_GRN 1 2 DAC_GR 1 2 19 20 D_DDCDATA
GREEN_R 29 19 20
L10 L11 1 21 22 D_DDCCLK
0805CS-390XJLC_0805 0805CS-111XJLC_0805 C335 21 22
23 23 24 24 SLP_S4 26,27,35
1 1 2 DAC_BL 1 2 1
21 DAC_BLU BLUE_R 29 0.1U_0402_10V6K ACES_50611-0120N-001
2
18P_0402_50V8J
18P_0402_50V8J
18P_0402_50V8J
CONN@ Connect to SLP_S4
C336
C337
C338
Remove R319~R321, they 1 1 1 from dummy. 1/22
will put on MXM board. +5VALW
11/11 JUSBU1
2 2 2
1 1
2 2
3 3
16 USB20_N2 4 4
16 USB20_P2 5 5
6 6
16 USB20_N3 7 7
16 USB20_P3 8 8
9 9 G11 11
10 10 G12 12
Remove R319~R321, they will put
CONN@ ACES_87212-10G0
on MXM board. 11/11
Add C614~C616 for Nvidia request.

11/15
R323 1 2 0_0805_5% VGA_RED_R R324 1 2 0_0805_5% VGA_R

29 VGA_RED
VGA_B
R325 1 2 0_0805_5% VGA_GRN_R R326 1 2 0_0805_5% VGA_G
29 VGA_GRN
2 VGA_G 2
R327 1 2 0_0805_5% VGA_BLU_R R328 1 2 0_0805_5% VGA_B
29 VGA_BLU
C339
@ 10P_0402_50V8C
C340
@ 10P_0402_50V8C
C341
@ 10P_0402_50V8C
C616
@ 10P_0402_50V8C
C615
@ 10P_0402_50V8C
C614
@ 10P_0402_50V8C
VGA_R
C723
@ 10P_0402_50V8C
C724
@ 10P_0402_50V8C
C725
@ 10P_0402_50V8C
1 1 1 1 1 1 1 1 1
2
2
150_0402_1%
150_0402_1%
150_0402_1%
R329
R330
R331
D _HSYNC
2 2 2 2 2 2 2 2 2
D_VS YNC
1
Close to JVGA1
DAN217T146_SC59-3
DAN217T146_SC59-3
DAN217T146_SC59-3
DAN217T146_SC59-3
DAN217T146_SC59-3
1
1
Reserve for EMI. 7/21 D5 D6 D7 D8 D9
@ @ @ @ @ +CRTVDD
3
3 3
+5VS +5VS L Place cloce to JMXM1
C342 C343 +CRTVDD +3VS

0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 2 1 2
Change R337 & R336 Remove R334 & R335,

to 0ohm. 3/9 should istall to MXM
1
4.7K_0402_5%
R332
4.7K_0402_5%
R333
5
Change R332 & R333 board. 11/15

P
OE#
2 4 H SYNC R336 1 2 0_0402_5% D _HSYNC to 4.7K. 11/15

21 CRT_HSYNC A Y D_HSYNC 29
U7
2
G
2
74AHCT1G125GW_SOT353-5
G
P
OE#
3
2 4 VS YNC R337 1 2 0_0402_5% D_VS YNC D_DDCDATA 1 3

21 CRT_VSYNC A Y D_VSYNC 29 29 D_DDCDATA CRT_DDC_DATA 21
S
G
U8 1 1 Q11
2
74AHCT1G125GW_SOT353-5 C344 C345 2N7002_SOT23-3
G
D_HSYNC & D_VSYNC
L
3
5P_0402_50V8C 5P_0402_50V8C
should be routed to D_DDCCLK 1 3
2 2 29 D_DDCCLK CRT_DDC_CLK 21
docking connector then
S
Q12
to VGA connector 2N7002_SOT23-3
4 4

CRT & USB Connector
A B C D E
5 4 3 2 1
L20
LCD POWER CIRCUIT LCD/PANEL BD. CONN. DPD_HPD_R

10UH_LB2012T100MR_20%_0805
1 2 DPD_HPD 21
1
Modify pin assignment. 2/23 C390
220P_0402_50V7K
+LCDVDD +LCDVDD
2
Add L20 & C390. 3/6
JLCD1
C695 1 2 0.1U_0402_16V4Z DPD_C_TXP0 1 2
21 DPD_TXP0 1 2 INV_PWM 21
1
Q13 C696 1 2 0.1U_0402_16V4Z DPD_C_TXN0 3 4 DPD_HPD_R
21 DPD_TXN0 3 4
R338 1 3 SI2305DS-T1-E3_SOT23-3 +3VS 21 LVDS_A0P 5 5 6 6 LVDS_B0P 21 1
100_0402_1% 21 LVDS_A0N 7 8 LVDS_B0N 21 C356
C697 1 7 8
21 DPD_TXP1 2 0.1U_0402_16V4Z DPD_C_TXP1 9 9 10 10 DPD_C_AUX C703 1 2 0.1U_0402_16V4Z DPD_AUX 21
680P_0402_50V7K
C698 1 2 0.1U_0402_16V4Z DPD_C_TXN1 11 12 DPD_C_AUX# C704 1 2 0.1U_0402_16V4Z
21 DPD_TXN1 DPD_AUX# 21
2
D 11 12 2 D
21 LVDS_A1P 13 14 LVDS_B1P 21
2
13 14
21 LVDS_A1N 15 15 16 16 LVDS_B1N 21
3
Q8B R340 1 2 1M_0402_5% C699 1 2 0.1U_0402_16V4Z DPD_C_TXP2 17 18 +3VS

21 DPD_TXP2 17 18
2N7002DW-T/R7_SOT363-6 C700 1 2 0.1U_0402_16V4Z DPD_C_TXN2 19 20 ALS_EN# 16
21 DPD_TXN2 19 20
21 LVDS_A2P 21 21 22 22 LVDS_B2P 21
5 R341 1 2 47K_0402_5% C346 1 2 0.1U_0402_16V4Z 21 LVDS_A2N 23 24 LVDS_B2N 21
C701 1 23 24
21 DPD_TXP3 2 0.1U_0402_16V4Z DPD_C_TXP3 25 25 26 26 EDID_CLK 21 Change R46 to 100ohm. 7/19
1 1 1 C702 1 2 0.1U_0402_16V4Z DPD_C_TXN3 27 28
21 DPD_TXN3 EDID_DATA 21
4
C347 C348 C349 27 28

21 LVDS_ACLKP 29 29 30 30 LVDS_BCLKP 21
0.1U_0402_16V4Z 4.7U_0805_10V4Z @ 4.7U_0805_10V4Z 21 LVDS_ACLKN 31 32 LVDS_BCLKN 21 R46 R347 1 2@ 100K_0402_5%
31 32
1
33 34 100_0402_1%
2 2 2 0_0402_5% 2 1 R342 USB20_P12_R 35
33 34
36 DISP_OFF# Modify. 0204 1 2 ENABLT
OUT
16 USB20_P12 35 36 ENABLT 21
16 USB20_N12
0_0402_5% 2 1 R345 USB20_N12_R 37 37 38 38
C359
C439
Q15 39 40
HF 39 40 LID_SW#
21 ENAVDD 2 IN +LCDVDD 41 41 42 42 1 2 1 LID_SW # 14,25,31
1
DTC124EKAT146_SC59-3 +5VALW Q16 +5V_WEBCAM 43 44 D11 CH751H-40PT_SOD323-2
GND
43 44 +LCDVDD
AP2301GN 1P_SOT23 45 46
45 46
1
+5V_WEBCAM 47 48 C357 1 2 680P_0402_50V7K
2
47 48 2
680P_0402_50V7K
S
D
R344 3 1 +5V_KL 49 50 INVPW R_B+
3
49 50
0.1U_0402_16V4Z
100K_0402_1% 51 52 2 1 R349 B+
GNDGND
C350
1U_0603_10V4Z
100K_0402_5%
C351
@ 47P_0402_50V8J
0.01U_0402_16V7K
0.1U_0402_16V4Z
4.7U_0805_10V4Z
@ 0_0805_5% Add C439 on DISP_OFF# near the
1
@ @
R346
C352
C353
C354
@ 680P_0402_50V7K
NI. 3/6 CONN@ ACES_50238-05071-001
G
1 connecor and change C359 to
2
47P_0402_50V8J
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1 1 1 1 1 1
1
0.1U. 2/10
Remove Q61 & R501. 3/2 2
2
2 2 2 2 2 2 @
C360
C361
C362
C283
1 2
R348 47K_0402_5%
+5V_KL +5VS +5VS Change power source from

C C
1 +5VALW to +5VS. 10/27
Change Design. 4/25 C358
+5VALW
10K_0402_5%
0.1U_0402_16V4Z Q14
1
AP2301GN 1P_SOT23
2
R146
+DPA_VCC
D10
LID_SW#
S
1 3
6
USB20_N12_R 3 2 USB20_P12_R
16 W EBCAM_ON IO2 IO1
2
Q8A DPD_C_AUX# R617 1 2 100K_0402_5%
G
4 1
G
+5VS
2
R287 1 PWR GND
2 10K_0402_5% 2 2N7002DW-T/R7_SOT363-6
1 3 @ CM1293A-02SR_SOT143-4 DPD_C_AUX R618 1 2 100K_0402_5%
S
1
Q34
2N7002_SOT23-3
Display port Connector +3VS
Add by Nvidia. 12/08

2
+5VS +5VS
SDM10U45-7_SOD523-2
2
0_1206_5%
R360
1
@ D13
1
B B
+DPA_3V R368
Add by Nvidia. 11/15 10K_0402_5%
+DPA_VCC L16
Del R365 & change F2. 3/2
+DPA_VCC
2
NANOSMDC050F 0.5A 13.2V POLY-FUSE
10UH_LB2012T100MR_20%_0805
2
DPA_HPD_R 1 2 DPA_HPD 21
R367
21 DDC1_EN
DPA_C_AUX- R334 1 2 100K_0402_5% 1 10K_0402_5%
2
10U_0805_10V4Z
0.01U_0402_16V7K
C378
1 1 DPA_C_AUX+ R335 1 2 100K_0402_5% 220P_0402_50V7K
1
6
2
F2
C278
Q68A
C277
1
2 2 2N7002DW-7-F_SOT363-6 2
3
Q68B
2N7002DW-7-F_SOT363-6
JDP1 5 DCAD
20
19
DP_PWR Remove R367 pulldown on DPA_HPD.
4
RTN
2
1M_0402_5%
DPA_HPD_R 18 HP_DET
There is a 100K pulldown on the
DPA_C_AUX- 17
21 DPA_C_AUX- AUX_CH- module. 11/15
R351
16 GND
DPA_C_AUX+ 15
21 DPA_C_AUX+ AUX_CH+
14
1
DCAD GND
13 CA_DET GND 24
C363 1 2 0.1U_0402_16V4Z R_DPA_TXN3 12 23
21 DPA_TXN3 LANE3- GND
11 LANE3_shield GND 22
C364 1 2 0.1U_0402_16V4Z R_DPA_TXP3 10 21
21 DPA_TXP3 LANE3+ GND
1
1
5.1M_0402_5%
A C365 1 2 0.1U_0402_16V4Z R_DPA_TXN2 9 A

21 DPA_TXN2 LANE2-
8 LANE2_shield
R363
D48 C366 1 2 0.1U_0402_16V4Z R_DPA_TXP2 7

21 DPA_TXP2 LANE2+
@BAV99-7-F_SOT23-3 C367 1 2 0.1U_0402_16V4Z R_DPA_TXN1 6
21 DPA_TXN1 LANE1-
5
2
C368 1 LANE1_shield
21 DPA_TXP1 2 0.1U_0402_16V4Z R_DPA_TXP1 4
3
C369 1 R_DPA_TXN0 LANE1+

21 DPA_TXN0 2 0.1U_0402_16V4Z 3 LANE0-
2
+3VS
21 DPA_TXP0
C370 1 2 0.1U_0402_16V4Z R_DPA_TXP0 1
LANE0_shield
LANE0+
Add on 12/08. Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title
CONN@ MOLEX_105020-0001
LCD & DP CONN
5 4 3 2 1
5 4 3 2 1
Install Q69. 2/24 +3VS
B+ +3VS +5VS
Layout Note: DPB_HPD and DPC_HPD must Q70
2
not routed close to high speed
4.7U_0805_10V4Z
MMBT3906_SOT23-3
C372
0.1U_0603_50V4Z
C373
22U_1210_25V6-M
C374
22U_1210_25V6-M
C375
C376
22U_1210_25V6-M
Remove Q19 & R376. 2/24 R135 PWR_LEVEL
C
3 1
signals.
E
1 1 1 1 1 100K_0402_5%
Remove C377. 7/10
B
1
2
2 2 2 2 2
2
R388
2
47K_0402_5%
R118
8.2K_0402_5%
1
D D
1
1
D
Layout Note:
31,35,38,44 ADP_PRES 2 Q69
Place as close as to MXM connector G 2N7002_SOT23-3
S
3
JMXM1B
B+ B+ 158 159
GND GND
5 PCIE_CTX_GRX_N3 160 PEX_TX3# PEX_RX3# 161 PCIE_CRX_GTX_N3 5
JMXM1A
5 PCIE_CTX_GRX_P3 162 PEX_TX3 PEX_RX3 163 PCIE_CRX_GTX_P3 5
1 PWR_SRC PWR_SRC 2 164 GND GND 165
5 PWR_SRC PWR_SRC 6 5 PCIE_CRX_GTX_N2 168 PEX_RX2# PEX_TX2# 169 PCIE_CTX_GRX_N2 5
7 PWR_SRC PWR_SRC 8 5 PCIE_CRX_GTX_P2 170 PEX_RX2 PEX_TX2 171 PCIE_CTX_GRX_P2 5
21 GND GND 22 184 GND GND 185
23 24 186 187 PEG_CLKREQ#
GND GND 14 CLK_PEG_VGA_PCH# PEX_REFCLK# PEX_CLK_REQ# PEG_CLKREQ# 14
25 GND GND 26 188 PEX_REFCLK PEX_RST# 189 PLT_RST# 4,13,16,22,24,27,28,30
14 CLK_PEG_VGA_PCH
27 GND GND 28 190 GND VGA_DDC_DAT 191 CRT_DDC_DATA 19
29 GND GND 30 192 RSVD VGA_DDC_CLK 193 CRT_DDC_CLK 19
31 GND GND 32 194 RSVD VGA_VSYNC 195 CRT_VSYNC 19
33 GND GND 34 196 RSVD VGA_HSYNC 197 CRT_HSYNC 19
+5VS 35 36 198 199
GND GND RSVD GND
37 GND GND 38 200 RSVD VGA_RED 201 DAC_RED 19
39 GND GND 40 20 LVDS_BCLKN 202 LVDS_UCLK# VGA_GREEN 203 DAC_GRN 19
41 42 PRSNT_R# 204 205
5V PRSNT_R# 20 LVDS_BCLKP LVDS_UCLK VGA_BLUE DAC_BLU 19
43 44 WAKE# PAD T109 206 207
5V WAKE# MXM_VGA_POK_R GND GND
45 5V PWR_GOOD 46 R62 1 2 0_0402_5% MXM_VGA_POK MXM_VGA_POK 34 208 LVDS_UTX3# LVDS_LCLK# 209 LVDS_ACLKN 20
47 48 R378 1 2 0_0402_5% Reverse. 01/19
VCCP_EN 11,34,40 210 211 LVDS_ACLKP 20
5V PWR_EN LVDS_UTX3 LVDS_LCLK
49 5V RSVD 50 212 GND GND 213
51 GND RSVD 52 20 LVDS_B2N 214 LVDS_UTX2# LVDS_LTX3# 215
C Add R357. 12/05 53 54 Remove R287. 02/04 20 LVDS_B2P 216 217 Reverse. 01/19 C
GND RSVD LVDS_UTX2 LVDS_LTX3
55 GND RSVD 56 218 GND GND 219
57 58 PWR_LEVEL 20 LVDS_B1N 220 221 LVDS_A2N 20
R357 1 GND PWR_LEVEL TH_OVERT# LVDS_UTX1# LVDS_LTX2#
2 10K_0603_5% 59 PEX_STD_SW# TH_OVERT# 60 R212 1 2 0_0402_5% H_THERMTRIP#_U1 4 20 LVDS_B1P 222 LVDS_UTX1 LVDS_LTX2 223 LVDS_A2P 20
61 62 R219 1 2 @ 0_0402_5% THERM_SCI# 4,16 224 225
ENAVDD_G VGA_DISABLE# TH_ALERT# TH_PWM GND GND
63 PNL_PWR_EN TH_PWM 64 PAD T110 20 LVDS_B0N 226 LVDS_UTX0# LVDS_LTX1# 227 LVDS_A1N 20
ENABLT 65 66 20 LVDS_B0P 228 229 LVDS_A1P 20
20 ENABLT PNL_BL_EN GPIO0 LVDS_UTX0 LVDS_LTX1
INV_PWM_G 67 68 230 231
HDMI_CEC R379 2 PNL_BL_PWM GPIO1 GND GND
1 0_0402_5% 69 HDMI_CEC GPIO2 70 29 DPC_TXN0 232 DP_C_L0# LVDS_LTX0# 233 LVDS_A0N 20
71 72 SML1DAT_MXM 234 235 LVDS_A0P 20
DVI_HPD SMB_DAT SML1DAT_MXM 14 29 DPC_TXP0 DP_C_L0 LVDS_LTX0#
73 74 SML1CLK_MXM 236 237
20 EDID_DATA LVDS_DDC_DAT SMB_CLK SML1CLK_MXM 14 GND GND
20 EDID_CLK 75 LVDS_DDC_CLK GND 76 29 DPC_TXN1 238 DP_C_L1# DP_D_L0# 239 DPD_TXN0 20
77 GND OEM 78 29 DPC_TXP1 240 DP_C_L1 DP_D_L0 241 DPD_TXP0 20
79 OEM OEM 80 242 GND GND 243
81 OEM OEM 82 Docking 29 DPC_TXN2 244 DP_C_L2# DP_D_L1# 245 DPD_TXN1 20
83 OEM OEM 84 29 DPC_TXP2 246 DP_C_L2 DP_D_L1 247 DPD_TXP1 20
85 OEM GND 86 248 GND GND 249 Dream Color Panel
87 GND PEX_TX15# 88 PCIE_CTX_GRX_N15 5 29 DPC_TXN3 250 DP_C_L3# DP_D_L2# 251 DPD_TXN2 20
5 PCIE_CRX_GTX_N15 89 PEX_RX15# PEX_TX15 90 PCIE_CTX_GRX_P15 5 29 DPC_TXP3 252 DP_C_L3 DP_D_L2 253 DPD_TXP2 20
5 PCIE_CRX_GTX_P15 91 PEX_RX15 GND 92 254 GND GND 255
93 GND PEX_TX14# 94 PCIE_CTX_GRX_N14 5 29 DPC_AUX# 256 DP_C_AUX# DP_D_L3# 257 DPD_TXN3 20
5 PCIE_CRX_GTX_N14 95 PEX_RX14# PEX_TX14 96 PCIE_CTX_GRX_P14 5 29 DPC_AUX 258 DP_C_AUX DP_D_L3 259 DPD_TXP3 20
5 PCIE_CRX_GTX_P14 97 PEX_RX14 GND 98 260 RSVD GND 261
99 GND PEX_TX13# 100 PCIE_CTX_GRX_N13 5 262 RSVD DP_D_AUX# 263 DPD_AUX# 20
5 PCIE_CRX_GTX_N13 101 PEX_RX13# PEX_TX13 102 PCIE_CTX_GRX_P13 5 264 RSVD DP_D_AUX 265 DPD_AUX 20
5 PCIE_CRX_GTX_P13 103 104 266 267 DPC_HPD_G
PEX_RX13 GND RSVD DP_C_HPD DPD_HPD_G R322 1
105 GND PEX_TX12# 106 PCIE_CTX_GRX_N12 5 268 RSVD DP_D_HPD 269 2 10K_0603_5% DPD_HPD 20
5 PCIE_CRX_GTX_N12 107 PEX_RX12# PEX_TX12 108 PCIE_CTX_GRX_P12 5 270 RSVD RSVD 271 Change R322 to 2.2K. 3/6
5 PCIE_CRX_GTX_P12 109 PEX_RX12 GND 110 272 RSVD Nvidia: NC RSVD 273
111 GND PEX_TX11# 112 PCIE_CTX_GRX_N11 5 274 RSVD pin277. 11/15 RSVD 275
5 PCIE_CRX_GTX_N11 113 114 PCIE_CTX_GRX_P11 5 276 277 DPD_HPD_G
PEX_RX11# PEX_TX11 RSVD RSVD
5 PCIE_CRX_GTX_P11 115 PEX_RX11 GND 116 278 RSVD DP_B_L0# 279 DPB_TXN0 29
117 GND PEX_TX10# 118 PCIE_CTX_GRX_N10 5 280 RSVD DP_B_L0 281 DPB_TXP0 29
5 PCIE_CRX_GTX_N10 119 PEX_RX10# PEX_TX10 120 PCIE_CTX_GRX_P10 5 282 RSVD GND 283
1
5 PCIE_CRX_GTX_P10 121 PEX_RX10 GND 122 284 GND DP_B_L1# 285 DPB_TXN1 29
123 124 PCIE_CTX_GRX_N9 5 20 DPA_TXN0 286 287 D41
GND PEX_TX9# DP_A_L0# DP_B_L1 DPB_TXP1 29
5 PCIE_CRX_GTX_N9 125 PEX_RX9# PEX_TX9 126 PCIE_CTX_GRX_P9 5 20 DPA_TXP0 288 DP_A_L0 GND 289 BAV99-7-F_SOT23-3
5 PCIE_CRX_GTX_P9 127 PEX_RX9 GND 128 290 GND DP_B_L2# 291 DPB_TXN2 29 Docking
129 GND PEX_TX8# 130 PCIE_CTX_GRX_N8 5 20 DPA_TXN1 292 DP_A_L1# DP_B_L2 293 DPB_TXP2 29
5 PCIE_CRX_GTX_N8 131 132 PCIE_CTX_GRX_P8 5 20 DPA_TXP1 294 295
2
B PEX_RX8# PEX_TX8 DP_A_L1 GND B
5 PCIE_CRX_GTX_P8 133 PEX_RX8 GND 134 296 GND DP_B_L3# 297 DPB_TXN3 29
135 GND PEX_TX7# 136 PCIE_CTX_GRX_N7 5 20 DPA_TXN2 298 DP_A_L2# DP_B_L3 299 DPB_TXP3 29
5 PCIE_CRX_GTX_N7 137 PEX_RX7# PEX_TX7 138 PCIE_CTX_GRX_P7 5 M/N DP 20 DPA_TXP2 300 DP_A_L2 GND 301
5 PCIE_CRX_GTX_P7 139 140 302 303 +3VS
PEX_RX7 GND GND DP_B_AUX# DPB_AUX# 29
141 GND PEX_TX6# 142 PCIE_CTX_GRX_N6 5 20 DPA_TXN3 304 DP_A_L3# DP_B_AUX 305 DPB_AUX 29
5 PCIE_CRX_GTX_N6 143 144 PCIE_CTX_GRX_P6 5 20 DPA_TXP3 306 307 DPB_HPD_G
PEX_RX6# PEX_TX6 DP_A_L3 DP_B_HPD DPA_HPD_G
5 PCIE_CRX_GTX_P6 145 PEX_RX6 GND 146 308 GND DP_A_HPD 309
147 148 PCIE_CTX_GRX_N5 5 DPA_ AUX- 310 311 +3VS Add D41. 3/6
GND PEX_TX5# DPA_ AUX+ DP_A_AUX# 3V3
5 PCIE_CRX_GTX_N5 149 PEX_RX5# PEX_TX5 150 PCIE_CTX_GRX_P5 5 312 DP_A_AUX 3V3 313
5 PCIE_CRX_GTX_P5 151 152 PRSNT_L# 314
PEX_RX5 GND PRSNT_L#
153 GND PEX_TX4# 154 PCIE_CTX_GRX_N4 5 316 GND GND 315
5 PCIE_CRX_GTX_N4 155 PEX_RX4# PEX_TX4 156 PCIE_CTX_GRX_P4 5 318 GND GND 317 Change to dummy. 12/22
5 PCIE_CRX_GTX_P4 157 PEX_RX4
Place close to JMXM1. 11/30 FOX_AS0B826-S43B-4H CONN@
CONN@ FOX_AS0B826-S43B-4H DPA_HPD_G +3VS
Change value from 10K to 2.2K. 3/6

20 INV_PWM R384 2 1 0_0402_5% INV_PWM_G 3 +3VS
20 ENAVDD R386 2 1 0_0402_5% ENAVDD_G R380 1 2 10K_0603_5% 1
20 DPA_HPD
2 SML1DAT_MXM R129 1 2 2.2K_0402_5%
R390 2 1 @ 10K_0402_5% INV_PWM_G D14 SML1CLK_MXM R130 1 2 2.2K_0402_5%
R392 2 1 @ 10K_0402_5% ENAVDD_G BAV99-7-F_SOT23-3
Place close to JDOCK1. 11/30
Add to support DP/DVI dual mode. 11/24 NI R390 & R392. 3/6 Modify net. 12/02
Add PU. 12/08 MXM_VGA_POK R518 1 2 10K_0402_5%
Modify. 12/08 Add FET near PCH for isolation. 11/11
3 +3VS EDID_DATA R381 1 2 4.7K_0402_5%
DDC1_EN L17 1 2 0_0603_5% DPB_HPD_G 1 EDID_CLK R382 1 2 4.7K_0402_5% +3VS
29 DPB_HPD
2 WAKE# R383 1 2 10K_0402_5%
Q20A Q20B 1 D15
2
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 C379 Nvidia: No need 10K, @BAV99-7-F_SOT23-3 Remove R387. 02/04 PEG_CLKREQ# R385 2 1 @ 10K_0402_5%
@ 220P_0402_50V7K
DPA_ AUX- 1 6 3 4
so change to 0 ohm.
DPA_C_AUX- 20 2 11/15 Reserve D15 & D38. 12/08 TH_OVERT# R391 1 2 10K_0402_5%
C655 1 2 0.1U_0402_16V4Z HDMI_CEC R394 1 2 @ 10K_0402_5%

A Remove R395 and PRSNT_L# R396 1 2 100K_0402_5% A
C656 1 2 0.1U_0402_16V4Z PRSNT_R# R397 1 2 100K_0402_5%
R364. 11/30 3 +3VS
Q67A Q67B L15 1 2 0_0603_5% DPC_HPD_G 1 Change R387, R391, R393, and R394 to 10K. 11/11
29 DPC_HPD
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 2
DPA_ AUX+ 1 6 3 4 DPA_C_AUX+ 20 1 D38 Remove R393 because duplicate to other page. 12/02
C371 @BAV99-7-F_SOT23-3
@ 220P_0402_50V7K NI R387, because have PR120 PU to +3VL. 12/05
2
2
Change R394 to NI and install R381 & R382. 12/08
DDC1_EN
20 DDC1_EN
1
C265
Add R265 close to
Q20, Q67 gate pin. Issued Date 2005/03/10 Deciphered Date 2006/03/10 Title
0.1U_0402_16V4Z
2
4/25 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MXM-III CONN
5 4 3 2 1
5 4 3 2 1
Update on 10/27.
+3VM +3VM_LAN
+1.0VM_LAN +1.05V_LAN_M
D D
R398 1 2 0_0603_5%
C380
C381
0.1U_0402_16V4Z
10U_0805_10V4Z
1 1 R403 1 2 0_0603_5%
10U_0805_6.3V6M
0.1U_0402_16V4Z
C386
C387
2 2
1 1
Remove note. 0205
2 2
Remove C388, C389, C390, & C393 on +1.0VM_LAN; Remove C394, C396
Remove C382, C383, C384, C385, C694, R401, & C397 on +3.3VM_LAN_OUT_R; Remove C399 & C400 on +1.0VM_LAN4;
R366, Q21 and R402 as not needed. 2/17 Remove C401 on +1.0VM_LAN3; and Remove C402 on +1.0VM_LAN2 as
done in Intel's RedFort CRB
C C
Remove Q17, R124, and R405 (Intel Remove R354, R355, Q22A, Q22B; and
confirmed isolation not required for connect SML0CLK and SML0DATA directly to
Hanksville) LAN_SM_CLK and LAN_SM_DAT. 2/23
2/23
+3VALW
1
R406
10K_0402_5% NI R407. 5/11
14 CLK_PCIE_LAN_REQ#_R U9
2
R407 1 2 @ 0_0402_5% 48 13
16 CLK_PCIE_LAN_REQ# CLK_REQ_N MDI_PLUS0 LAN_MDI0P 23
4,13,16,21,24,27,28,30 PLT_RST# R408 1 2 0_0402_5% PLT_RST#_LAN 36 14
PE_RST_N MDI_MINUS0 LAN_MDI0N 23
16 CLK_PCIE_LAN_PCH 44 PE_CLKP MDI_PLUS1 17 LAN_MDI1P 23

45 18
PCIE
16 CLK_PCIE_LAN_PCH# PE_CLKN MDI_MINUS1 LAN_MDI1N 23
MDI
C391 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_P6_C 38 20
14 PCIE_PRX_DTX_P6 PETp MDI_PLUS2 LAN_MDI2P 23
C392 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_N6_C 39 21
14 PCIE_PRX_DTX_N6 PETn MDI_MINUS2 LAN_MDI2N 23
14 PCIE_PTX_C_DRX_P6 41 PERp MDI_PLUS3 23 LAN_MDI3P 23

14 PCIE_PTX_C_DRX_N6 42 PERn MDI_MINUS3 24 LAN_MDI3N 23
28 6 TRM_CT C395 1 2 @ 1U_0402_6.3V4Z

SMBUS
14 SML0CLK SMB_CLK VCT

14 SML0DATA 31 SMB_DATA
B 1 R411 1 2 3.01K_0402_1% B
RSVD_VCC3P3_1 R319 1
RSVD_VCC3P3_2 2 2 3.01K_0402_1%
VDD3P3_IN 5 +3VM_LAN
16,23 LAN_DIS# LAN_DIS# R412 1 2 0_0402_5% LAN_DIS#_R 3 LAN_DISABLE_N +3.3VM_LAN_OUT C398 1
VDD3P3_OUT 4 2 1U_0603_10V4Z
R285 1 2 @ 0_0402_5% 15 +3.3VM_LAN_OUT_R 1 2

16,23,31 LED_LINK_LAN#_R VDD3P3_15
26 19 R413 0_0603_5%
23 LED_LINK_LAN# LED0 VDD3P3_19
23,29 LAN_ACT# 27 29
LED
LED1 VDD3P3_29
25 LED2
Swap signals to U9.26&27. 02/23 47 +1.0VM_LAN4 R414 1 2 0_0603_5%
VDD1P0_47
VDD1P0_46 46
PAD T60 32 JTAG_TDI VDD1P0_37 37
PAD T61 34
JTAG
R415 1 JTAG_TDO
+3VM_LAN 2 @ 10K_0402_5% LAN_JTAG_TMS 33 JTAG_TMS VDD1P0_43 43 +1.0VM_LAN3 R416 1 2 0_0603_5% +1.0VM_LAN
R417 1 2 @ 10K_0402_5% LAN_JTAG_TCK 35 JTAG_TCK +1.0VM_LAN2 R418 1
VDD1P0_11 11 2 0_0603_5%
XTAL1 9 40
XTAL2 XTAL_OUT VDD1P0_40
10 XTAL_IN VDD1P0_22 22
VDD1P0_16 16
8 R419 1 2 0_0603_5%
R421 1 VDD1P0_8
2 1K_0402_5% 30 TEST_EN
R423 1 2 3.01K_0402_1% 12 7 LAN_CTRL_10 T107 PAD
RBIAS CTRL_1P0
VSS_EPAD 49
+3VM_LAN
WG82577LM_QFN48P
LAN_DIS# R558 1 2 10K_0402_5%
Add on 12/4.
A A
Change R558 PU to +3VM_LAN. 5/11 C647 1 2 10P_0402_25V8K XTAL1
Y5
25MHZ_20P_1BG25000CK1A
1 2 XTAL2
2 2 Issued Date 2008/09/15 Deciphered Date 2009/12/31 Title
C403 C404
27P_0402_50V8J 27P_0402_50V8J
Intel 82578 Hanksville-LM
1 1 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
5 4 3 2 1
5 4 3 2 1
Modify. 0223 +3VM_LAN
D D
1
10K_0402_5%
R424
Change combo connector to RJ45 only. 2/16
JLAN1
2
+3VM_LAN_LED 13 Yellow LED+
LAN_ACT# 1 2 R426 LAN_ACT_R# 14
22,29 LAN_ACT# Yellow LED-
300_0603_5% 16
MDO3- SHLD2 U11
8 PR4-
C411 1 2 @ 680P_0402_50V7K 9 12 13 MDO0+
DETECT PIN1 TD4- MX4- MDO0+ 29
MDO3+ 7 PR4+
22 LAN_MDI0P
MDO1- 6 PR2- 22 LAN_MDI0N
MDO2- 5 11 14 MDO0- R425
+3VM_LAN PR3- TD4+ 1:1 MX4+ MDO0- 29
75_0402_1%
MDO2+ 4 1 2 TRM_CT_R 10 15 MCT0 C410 1 2 0.01U_0402_50V7K 1 2
PR3+ C409 0.1U_0402_16V7K TCT4 MCT4
MDO1+ 3 9 16 MDO1+
PR2+ TD3- MX3- MDO1+ 29
1
10K_0402_5%
R557
MDO0- 2 PR1- 22 LAN_MDI1P

DETCET PIN2 10 22 LAN_MDI1N
MDO0+ 1 PR1+ MDO1- R427
15 8 17 MDO1- 29
2
SHLD1 TD3+ 1:1 MX3+ 75_0402_1%

+3VM_LAN_LED 11 Green LED+
1 2 TRM_CT_R 7 18 MCT1 C413 1 2 0.01U_0402_50V7K 1 2
LED_LINK_LAN# TCT3 MCT3
22 LED_LINK_LAN# 1 2 R430 LED_LINK_LAN_R# 12 Green LED-
C412 0.1U_0402_16V7K
300_0603_5% 6 19 MDO2+
TD2- MX2- MDO2+ 29
CONN@ FOX_JM3611A-P1123-7HC
C416 1 2 @ 680P_0402_50V7K
C 22 LAN_MDI2P C
22 LAN_MDI2N
Note. Close to JLAN1 5 20 MDO2- R429
TD21+ 1:1 MX2+ MDO2- 29
75_0402_1%
1 2 TRM_CT_R 4 21 MCT2 C415 1 2 0.01U_0402_50V7K 1 2
LED_LINK_LAN_R# C414 0.1U_0402_16V7K TCT2 MCT2
3 22 MDO3+
TD1- MX1- MDO3+ 29
LAN_ACT_R#
22 LAN_MDI3P
3
2 22 LAN_MDI3N
D39 2 23 MDO3- R431
TD1+ 1:1 MX1+ MDO3- 29
@ PJSOT05C_SOT23-3 75_0402_1%
1 2 TRM_CT_R 1 24 MCT3 C418 1 2 0.01U_0402_50V7K 1 2 C419 1 2 1000P_1808_3KV7K
C417 0.1U_0402_16V7K TCT1 HF MCT1
1
NS892402 1G
Add C264. 4/23

1U_0603_10V4Z
1
C264
Change. 5/16 2
Modify & remove Q63A & R132. 02/23 Change on 12/17.
B +3VM_LAN +3VM_LAN_LED B
20 mil
Q63B
2N7002DW-T/R7_SOT363-6
D
16,22,31 LED_LINK_LAN#_R R203 1 2 0_0402_5% 3 4 LED_LINK_LAN# 3 1
1
29 LED_LINK_LAN_DOCK# Q60
FDN338P_SOT23
G
5
2
R138
LAN_DIS# 16,22 100K_0402_5%
1
D
29 DOCK_ID 2 Q28
G 2N7002_SOT23-3
S
3
+3VALW R510 2 1 10K_0402_5%
Move R510 close to Q28, and PU to

+3VALW. 5/19
A A

Magnetic & RJ45
5 4 3 2 1
A B C D E
Change to 0805. 2/24 +3V_WWAN

2A +3VS
WWAN
Close to JWWAN1 pin2 and pin52.

Disconnection. 2/10 1
JW W AN1
2 R433 1 2 @ 0_0805_5%
WLAN +3V_WLAN +1.5VS DEG_FRAME#
DEBUG_AD3
R432
R434
1
1
2
2
0_0402_5%
0_0402_5%
LPC_LFRAME# 13,28,31,33
3
1
3
2
4 4
(USB Only) DEBUG_AD2 R435 1 2 0_0402_5%
LPC_LAD3 13,28,31,33
LPC_LAD2 13,28,31,33
C709
C708
5 6 DEBUG_AD1 R436 1 2 0_0402_5% LPC_LAD1 13,28,31,33
+3V_WWAN 5 6
47P_0402_50V8J
C420
0.01U_0402_16V7K
C421
0.1U_0402_16V4Z
C422
4.7U_0805_10V4Z
47P_0402_50V8J
C423
0.01U_0402_16V7K
C424
0.1U_0402_16V4Z
C425
4.7U_0805_10V4Z
7 8 UIM_PWR DEBUG_AD0 R437 1 2 0_0402_5% LPC_LAD0 13,28,31,33
7 8 UIM_DATA PCI_RST#_R R438 0_0402_5%
9 9 10 10 Remove PLT_RST# on 1 1 1 1 1 1 1 2 PCI_RST# 16,32
1
11 12 UIM_CLK
13
11 12
14 UIM_RST JWWAN1.22. 2/24 CLK_PCI_DEBUG R440 1 2 0_0402_5%
13 14 CLK_PCI_DEBUG_PCH 16
15 16 UIM_VPP
2
15 16 2 2 2 2 2 2
@
T62 PAD 17 18 CH751H-40PT_SOD323-2 Removed R439 connect to U3. 10/27
@ @ 17 18
C707
C706
T63 PAD 19 19 20 20 2 1 W W AN_TRANSMIT_OFF# 16
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1 1 21 22 D16
21 22
23 23 24 24
25 25 26 26 W WAN_DET# 16
1 27 28 1
2 2 27 28 R131 1
29 29 30 30 2 10K_0402_5% +3VS
31 32 R132 1 2 @ 0_0402_5% Add. 7/7 +3V_WLAN
31 32 JW LAN1
33 33 34 34
35 36 1 2 +1.5VS
35 36 USB20_N9 16 15,27,30 PCIE_WAKE# 1 2
37 37 38 38 USB20_P9 16 3 3 4 4
39 39 40 40 Remove R441 of pin5. 2/10 5 5 6 6
+3V_WWAN 41 42 W W _LED# 7 8 DEG_FRAME#
41 42 W W _LED# 30 14 CLKREQ_WLAN# 7 8
43 44 +3VALW R442 1 2 10K_0402_5% 9 10 DEBUG_AD3
43 44 9 10 DEBUG_AD2
45 45 46 46 14 CLK_PCIE_MCARD_PCH# 11 11 12 12
47 48 +3V_WWAN +3V_WWAN 13 14 DEBUG_AD1
47 48 14 CLK_PCIE_MCARD_PCH 13 14
49 50 15 16 DEBUG_AD0
49 50 PCI_RST#_R 15 16 D17 CH751H-40PT_SOD323-2
T64 PAD 51 51 52 52 Swap. 12/22 17 17 18 18
U12 CLK_PCI_DEBUG 19 20 2 1
19 20 W LAN_TRANSMIT_OFF# 16
@ 39P_0402_50V8J
@ 39P_0402_50V8J
@ 39P_0402_50V8J
C426
0.01U_0402_16V7K
C427
0.1U_0402_16V4Z
C428
4.7U_0805_10V4Z
1 6 53 54 21 22 PLT_RST#
CH1 CH4 GND1 GND2 21 22 PLT_RST# 4,13,16,21,22,27,28,30
C429
C430
C431
+3V_WWAN 1 1 1 R443 1 2 0_0402_5% PCIE_C_RXN4 23 24
14 PCIE_PRX_DTX_N4 23 24
2 5 1 1 1 R444 1 2 0_0402_5% PCIE_C_RXP4 25 26
Vn Vp 14 PCIE_PRX_DTX_P4 25 26
27 27 28 28
3 4 CONN@ FOXCONN AS0B226-S40N-7F 52P 29 30 T98 PAD
CH2 CH3 2 2 2 29 30
14 PCIE_PTX_C_DRX_N4 31 31 32 32 T99 PAD
@ S DIO(BR) NUP4301MR6T1 TSOP-6 +3V_WWAN 2 2 2
14 PCIE_PTX_C_DRX_P4 33 33 34 34
35 35 36 36
D18 +3V_WLAN 37 38
@ DAN217T146_SC59-3 37 38
39 39 40 40
JSIM1 3 41 42
UIM_PWR 41 42 W L_LED#
4 GND VCC 1 1 43 43 44 44 W L_LED# 30
UIM_VPP 5 2 UIM_RST 2 R445 2 1 0_0402_5% 45 46
UIM_DATA VPP RST UIM_CLK +3VALW +3VALW 14 CL_CLK1 R446 2 0_0402_5% 45 46
6 I/O CLK 3 14 CL_DATA1 1 47 47 48 48
7 1 R447 2 1 0_0402_5% 49 50 Remove USB20_P6 and USB20_N6
DET 14 CL_RST#1 49 50
@
T65 PAD 51 52
51 52 connections to JWLAN1.36 and 38.
C432
18P_0402_50V8J
1
C433
4.7U_0805_10V4Z
C434
0.1U_0402_16V4Z
53 GND1 GND2 54 2/10
2 2 R448 R449 2
GND 8 1 1
9 NI. 7/7 @ 10K_0402_5% NI. 7/7 @ 10K_0402_5% CONN@ MOLEX_67910-5700
GND
1
Q26 Q27
R450 SI2305DS-T1-E3_SOT23-3 SI2305DS-T1-E3_SOT23-3
2
3
3
@ 47K_0402_5% 2 2
R451 R452
31 MC1_DISABLE 1 2 2 31 MC2_DISABLE 1 2 2
+3V_WWAN +3V_WLAN
220K_0402_1% 1 220K_0402_1% 1
2
CONN@ SANTA_135306-3 C605 HF C606 HF

Install. 4/25 Reserved 10/27.
UIM_PWR 0.1U_0402_16V4Z @0.1U_0402_16V4Z
1
2 2
+3VALW +3VALW
+3VS +3.3V_NVRAM +V_NVRAM_VCCQ

NAND FLASH Change from GND to +3VALW. 12/09
R453 2 1 0_0603_5% R454 2 1 @ 0_0603_5% +3VS

R455 2 1 0_0603_5% +1.8VS
22U_0805_6.3V6M
C443
C448
150U_B2_6.3VM_R35M
1
Remove C444~C447, +
1 Remove C499~C452,
and change C443 to and change C448 to
150uF. 4/27 22uF. 4/27
40
41
42
38
39
78
1
2
3
2 2
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCCQ_1
VCCQ_2
VCCQ_3
3 3
6 9 TP_NV_DOS_0# PAD T66
16 NV_DQ0 DQ0 DOS_0#
16 NV_DQ1 7 DQ1 DOS_0 10 NV_DQS0 16
45 31 TP_NV_DOS_1# PAD T67
16 NV_DQ2 DQ2 DOS_1#
16 NV_DQ3 46 DQ3 DOS_1 32 NV_DQS1 16
16 NV_DQ4 12 DQ4
13 15 TP_NV_RFU_1 PAD T68
16 NV_DQ5 DQ5 RFU_1
16 NV_DQ6 DQ6 RFU_2
16 NV_DQ7 DQ7 RFU_3
16 NV_DQ8 DQ8 RFU_4
16 NV_DQ9 29 DQ9
16 NV_DQ10 67 DQ10 CE_0# 24
16 NV_DQ11 68 DQ11 CE_2# 25 NV_CE0# 16
16 NV_DQ12 34 DQ12 CE_1# 22
16 NV_DQ13 35 DQ13 CE_3# 61 NV_CE1# 16
16 NV_DQ14 73 DQ14 CE_4# 4
16 NV_DQ15 74 DQ15 CE_6# 43 NV_CE2# 16
37
CE_5#
CE_7# 76
TP_NV_CK_0#
NV_CE3# 16 Remove UWB. (10/24)
18 CLE_0 CK_0# 48 PAD T72
16 NV_CLE 57 CLE_1 CK_0/WE_0# 49 NV_W E#_CK0 16
19 70 TP_NV_CK_1# PAD T73
ALE_0 CK_1#
16 NV_ALE 58 ALE_1 CK_1/WE_1# 71 NV_W E#_CK1 16
R/B# 54 NV_RB# 16
60 55 TP_NV_WP0# PAD T74
16 NV_RE#_W R#1 W/R_1#/RE_1# WP#
16 NV_RE#_W R#0 21 W/R_0#/RE_0#
77 TP_NV_VREF PAD T75
VREF
5 VSS_1 VSS_13 44
4 8 47 4
VSS_2 VSS_14
11 VSS_3 VSS_15 50
14 VSS_4 VSS_16 53
13 NAND_DET# 17 VSS_5 VSS_17 56
20 VSS_6 VSS_18 59
Change net name. 5/11 23 VSS_7 VSS_19 62
26 VSS_8 VSS_20 65
27 66
30
VSS_9
VSS_10
VSS_21
VSS_22 69
33 VSS_11 VSS_23 72 Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title
36 75
VSS_12 VSS_24
WWAN/NAND mini
JNAND1 CONN@ Size Document Number R ev
FOX_AS0B726-N2SN-7F DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4951P 0.4
A B C D E
+3VL +3VL CAP SWITCH BOARD. +3VL
C607 INT_KBD CONN.

C608
@ 0.1U_0402_16V4Z
@1000P_0402_50V7K
KSO[0..13]
31 KSO[0..13]
100K_0402_5%
1 1
2
KSI[0..7]
+3VL +3VS +3VL +3VL +3VS 31 KSI[0..7]
R216
Add R216. 7/7
2 2
1
LID_SW# JKB1
1
5.1K_0402_5%
5.1K_0402_5%
KSO11 1 2 KSO11
JSW 1 KSO0 1 2 KSO0
R462 3 4
R463
KSO2 3 4 KSO2
1 1 2 2 Modify circuit to correct the 5 5 6 6
3 4 KSO5 7 8 KSO5 CP1 CP2
CAP_RST_EC 5
3 4
6
connection. 4/22 KSI_D_14 9
7 8
10 KSI_D_14 KSO11 1 8 KSI_D_14 1 8
31 CAP_RST_EC
2
2 W L/BT_LED# 5 6 KSI_D_8 9 10 KSI_D_8 KSO0 KSI_D_8

30 WL/BT_LED# 7 7 8 8 11 11 12 12 2 7 2 7
9 10 KSI_D_12 13 14 KSI_D_12 KSO2 3 6 KSI_D_12 3 6
CAP_CLK 9 10 D53 KSI_D_10 13 14 KSI_D_10 KSO5 KSI_D_10
14,31 CAP_CLK 11 11 12 12 15 15 16 16 4 5 4 5
14,31 CAP_DAT CAP_DAT 13 14 @ PJUSB208_SOT23-6 KSI_D_0 17 18 KSI_D_0
CAP_SENS_INT 13 14 W L/BT_LED# CAP_RST_EC KSI_D_4 17 18 KSI_D_4 @100P_1206_8P4C_50V8K @100P_1206_8P4C_50V8K
31 CAP_SENS_INT 15 15 16 16 1 I/O1 I/O4 6 19 19 20 20
17 18 KSI_D_2 21 22 KSI_D_2
STB_LED# 17 18 KSI_D_1 21 22 KSI_D_1 CP3 CP4
29,30 STB_LED# 19 19 20 20 2 REF1 REF2 5 +5VS 23 23 24 24
1
10K_0402_5%
ON/OFF# 21 22 KSI_D_3 25 26 KSI_D_3 KSI_D_0 1 8 KSI_D_3 1 8

29 ON/OFF# 21 22 25 26
LID_SW# 23 24 CAP_CLK 3 4 CAP_DAT KSO3 27 28 KSO3 KSI_D_4 2 7 KSO3 2 7
14,20,31 LID_SW# 23 24 I/O2 I/O3 27 28
R464
KSO8 29 30 KSO8 KSI_D_2 3 6 KSO8 3 6

CONN@ ACES_50611-0120N-001 CAP_SENS_INT STB_LED# KSO4 29 30 KSO4 KSI_D_1 KSO4
1 I/O1 I/O4 6 31 31 32 32 4 5 4 5
KSO7 33 34 KSO7
2
KSO6 33 34 KSO6 @100P_1206_8P4C_50V8K @ 100P_1206_8P4C_50V8K

2 REF1 REF2 5 +5VS 35 35 36 36
KSO10 37 38 KSO10
ON/OFF# LID_SW# KSO1 37 38 KSO1 CP5 CP6
3 I/O2 I/O3 4 39 39 40 40
D54 @ PJUSB208_SOT23-6 KSI_D_5 41 42 KSI_D_5 KSO7 1 8 KSI_D_5 1 8
KSI_D_6 41 42 KSI_D_6 KSO6 KSI_D_6
43 43 44 44 2 7 2 7
KSI7 45 46 KSI7 KSO10 3 6 KSI7 3 6
KSI_D_13 45 46 KSI_D_13 KSO1 KSI_D_13
47 47 48 48 4 5 4 5
KSI_D_11 49 50 KSI_D_11
KSI_D_9 49 50 KSI_D_9 @ 100P_1206_8P4C_50V8K @ 100P_1206_8P4C_50V8K
51 51 52 52
KSO9 53 54 KSO9
MDC 1.5 Conn. KSO12

KSO13
55
57
59
53
55
57
59
54
56
58
60
56
58
60
KSO12
KSO13
KSO13 1
C453
2
@ 100P_0402_50V8J
KSI_D_11
KSI_D_9
1
2
CP7
8
7
KSO9 3 6
61 62 KSO12 4 5
G1 G2
63 G3 G4 64
@ 100P_1206_8P4C_50V8K
HRS_FH12HP-30S-1SV 55
CONN@
+3VS
JMDC1
1 1 2 2
13 HDA_SDOUT_MDC 3 3 4 4
5 6 D20 D21
5 6 KSI_D_0 KSI_D_3
13 HDA_SYNC_MDC 7 7 8 8 2 2
R465 1 2 33_0402_5% HDA_SDIN1_MDC 9 10 KSI0 1 KSI3 1
13 HDA_SDIN1 9 10
13 HDA_RST#_MDC 11 12 R466 1 2 0_0402_5% HDA_BIT_CLK_MDC 13 3 KSI_D_8 3 KSI_D_11
11 12
13 16 C454 1 2 @ 10P_0402_25V8K CHP202UPT_SOT323-3 CHP202UPT_SOT323-3
GND GND D22 D23
14 GND GND 17
Remove modem disable GPIO and U13. Connect 15 GND GND 18 2 KSI_D_1 2 KSI_D_4
KSI1 1 KSI4 1
HDA_RST#_MDC to JMDC1.11. 2/10 CONN@ ACES_88020-12101 3 KSI_D_9 3 KSI_D_12
CHP202UPT_SOT323-3 CHP202UPT_SOT323-3
D24 D25
2 KSI_D_2 2 KSI_D_5
KSI2 1 KSI5 1
3 KSI_D_10 3 KSI_D_13
+3VS CHP202UPT_SOT323-3 CHP202UPT_SOT323-3

D26
2 KSI_D_6
@
KSI6 1
C455
1000P_0402_50V7K
C456
0.1U_0402_16V4Z
C457
4.7U_0805_10V4Z
3 KSI_D_14
1 1 1
CHP202UPT_SOT323-3
2 2 2
Track Point CONN. Touch Pad CONN.

+5VS
1
C460
+5VS 0.1U_0402_16V4Z
2
JTO1 +5VS
1 1 2 2
0.1U_0402_16V4Z
3 4 JTP1
3 4 SP_DATA 31
C461
1 5 6 LEFT 7 8
31 SP_CLK 5 6 7 8
7 8 RIGHT TP_DATA 5 6
7 8 31 TP_DATA 5 6
TP_CLK 3 4
31 TP_CLK 3 4
9 G1 G2 10 1 1 2 2
2
11 12
+3VL +3VL +3VL Power button G3 G4
CONN@ ACES_87153-08011
ACES_50611-0040N-001
CONN@
3
1
100K_0402_5%
R467 D27
1
100K_0402_5% @ PACDN042Y3R_SOT23-3
R468
1
U14
ON/OFFBTN_KBC# 31
5
SN74LVC1G14DCKR_SC70-5
2
D
V
ON/OFF# 2 4 R469 1 2 100K_0402_5% 2 Q29

A Y 2N7002_SOT23-3
NC
G
G
1 1 S 1 2 +3VALW
3
R470 @ 100K_0402_5%
1
3
C462 C463 D28

1U_0603_10V4Z 1U_0603_10V4Z 1 2
2 2
@ CH751H-40PT_SOD323-2
ON/OFFBTN# 15 Security Classification Compal Secret Data Compal Electronics, Inc.
1 2
R758 0_0402_5%
PWRBTN_OUT# 31
MDC/KBD/ON_OFF/LID
Add on 7/21 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4951P 0.4
5 4 3 2 1
BT Connector
JBT1
D 1 +3VAUX_BT D
2 USB20_P8_R R471 1 0_0402_5%
3 2 USB20_P8 16
USB20_N8_R R472 1 2 0_0402_5%
4 USB20_N8 16
5 BT_LED 30
CONN@ ACES_87212-05G0_5P
+3VALW Add on 11/11. +3VAUX_BT
+5VALW +5VALW +USB_VCCA Q30
D
3 1
C468
C469
0.1U_0402_16V4Z
(2A,100mils ,Via NO.=4) R473 AP2301GN 1P_SOT23
G
2
1
10K_0402_5% 1
C237
R474 1 1
U15 10K_0402_5%
1
1 8 W=100mils JUSBL1
GND OUT 2
2 7 1
2
IN OUT 1 2 2
3 IN OUT 6 16 USB20_N1 2 2
150U_B2_6.3VM_R35M
0.1U_0402_16V4Z
1000P_0402_50V7K
0.1U_0402_16V4Z
10U_0805_10V4Z
19,27,35 SLP_S4 4 EN# OC# 5 16 USB20_P1 3 3
1 1 4 R475
C464 G548A2P8U_MSOP8 Change connection 5
4
1 2
Add on 11/15.
1 1 GND 16 BT_OFF
C466
C467
+ 6
4.7U_0805_10V4Z from port0. 0204 7
GND 220K_0402_1% +3VAUX_BT
2 Low Active GND
C465
8 GND
2 2 2
1
CONN@ SUYIN_020167GR004S568ZR
R500
C @ 470_0402_5% C
D31
2
USB20_N1 3 2 USB20_P1
IO2 IO1
1
D
+USB_VCCA 4 PWR GND 1
2 Q42
@ CM1293A-02SR_SOT143-4 G @ 2N7002_SOT23-3
S
3
ACCELEROMETER
+3VS_ACL
B B
0.1U_0402_16V4Z
10U_0805_6.3V6M
+3VS +3VS_ACL +3VS_ACL_IO
C474
C475
1 1
D30 R478
CH751H-40PT_SOD323-2 0_0603_5%
2 1 1 2
2 2
U17
LIS302DL
+3VS_ACL_IO 1 VDD_IO
+3VS_ACL 6 VDD GND 2
GND 4
16 ACCEL_INT# 8 INT 1 GND 5
9 INT 2 GND 10
12 SDO
4,9,10,12,14 SMB_DATA_S3 13 SDA / SDI / SDO
4,9,10,12,14 SMB_CLK_S3 14 SCL / SPC
RSVD 3 +3VS_ACL
+3VS_ACL R479 2 1 10K_0402_5% 7 11
CS RSVD
HP302DLTR8_LGA14_3X5
L Must be placed in the center of the system.
A A

USB & BT Connector & Acclerometer
5 4 3 2 1
5 4 3 2 1
D55 Close to U41.D7 Close to U41.P13

+3VS +1.05VSR +1.05VS Del D57~D60, but change D55. 5/14 U3TXDP2 1 10 U3TXDP2
+3VA +3VA
Change power rail to 3.3V. U3TXDN2 2 9 U3TXDN2
0_0603_5%
C617
C618
C619
C620
C621
C622
C623
C624
C625
C626
C627
C628
C629
C630
C631
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 U3RXDP2 4 7 U3RXDP2
+3VA +3VS +3VA
C632
C633
C634
C635
C636
C650
2 1 2 2 1 2
R428
L13 U3RXDN2 5 6 U3RXDN2
+3VS +1.05VSR 10UH_LB2012T100MR_20%_0805
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
0.1U_0402_16V4Z
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2 3
1
1 2 1 1 2 1
0.1U_0402_16V4Z
0.01U_0402_16V7K
5P_0402_50V8C
0.1U_0402_16V4Z
0.01U_0402_16V7K
5P_0402_50V8C
10U_0805_10V4Z
2 8
C652
@ RCLAMP0524P.TCT~D
D 1 D56 D
D10
H11
E11
E12
K11
K12
P13
F13
F14
L10
L13
L14
G3
G4
N4
N5
N6
C4
C5
C6
C7
D5
C8
C9
D8
D9
H3
H4
U2DN2
D7
P3
E3
E4
F3
L9
L5
L8
3
1
U41 U2DP2 2
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
U3AVDO33
U2AVDD10
UPD720200F1-XXX-A_FBGA176
@PJDLC05_SOT23-3
14 CLK_PCIE_USB30_PCH B2 PECLKP
14 CLK_PCIE_USB30_PCH# B1 JUSB3B
PECLKN U3TX_C_DP2 U3TXDP2
Layout note: U3TXDP2 B6 2 1 9 SSTX+
C638 2 1 0.1U_0402_16V4Z PCIE_PRX_DTX_C_P8 D2 C637 0.1U_0402_16V4Z +USB3_VCCA 1
14 PCIE_PRX_DTX_P8 PETXP VBUS
C639 2 1 0.1U_0402_16V4Z PCIE_PRX_DTX_C_N8 D1 1. +3VS --> 100mA A6 U3TX_C_DN2 2 1 U3TXDN2 8
14 PCIE_PRX_DTX_N8 PETXN U3TXDN2 SSTX-
N8 U2DN2 C640 0.1U_0402_16V4Z 2
U2DM2 D-
14 PCIE_PTX_C_DRX_P8 F2 PERXP 2. +1.05VS --> 700mA 7 GND
14 PCIE_PTX_C_DRX_N8 F1 P8 U2DP2 3 10 R221 1 2 0_0603_5%
PERXN U2DP2 U3RXDP2 D+ GND
U3RXDP2 B8 6 SSRX+ GND 11
4 GND GND 12
A8 U3RXDN2 5 13 2 1
U3RXDN2 SSRX- GND C438 @ 0.1U_0402_16V4Z
H2 CONN@ TYCO_1932260-1
4,13,16,21,22,24,28,30 PLT_RST# PERSTB
R321 1 2 @ 0_0402_5% K1 G14 OCI2B R689 1 2 10K_0402_5% +3VS
15,24,30 PCIE_WAKE# PEWAKEB OCI2B
CLKREQ#_USB30 K2 H13 OCI1B R690 1 2 10K_0402_5%
PECREQB OCI1B
R688 1 2 100K_0402_1% J2 Correct
PSEL AUXDET PPON2
J1 PSEL PPON2 H14 Del R226, R227, R458, R459. 5/11 JUSB3A/B. 05/11
R310 1 2 0_0402_5% H1 J14 PPON1
13,16 PCH_XDP_GPIO0 SMIB PPON1
Add on 7/7. +USB3_VCCB
+3VS R691 2 1 10K_0402_5% P5 JUSB3A
PONRSTB U3TX_C_DP1 C641 2 U3TXDP1
U3TXDP1 B10 1 0.1U_0402_16V4Z 9 SSTX+
D40 1 2 1SS355_SOD323-2 1 VBUS
1U_0805_25V6K
SPISCK M2 A10 U3TX_C_DN1 C642 2 1 0.1U_0402_16V4Z U3TXDN1 8

C SPICSB SPISCK U3TXDN1 U2DN1 SSTX- C
N2 SPISCB U2DM1 N10 2 D-
1
C643
SPISI N1 7
SPISO SPISI U2DP1 GND R220 1
M1 SPISO U2DP1 P10 3 D+ GND 10 2 0_0603_5%
B12 U3RXDP1 6 11
2
U3RXDP1 SSRX+ GND

4 GND GND 12
K13 A12 U3RXDN1 5 13 2 1 Reserve D58 for
GND U3RXDN1 SSRX- GND C437 @ 0.1U_0402_16V4Z
K14
J13
GND CONN@ TYCO_1932260-1 USB3.0. 7/15
GND
P4 GND Add D57 for USB2.0. 5/16 D58
P12 R692 1 2 1.6K_0603_1% U3TXDP1 1 10 U3TXDP1
RREF D57
U2AVSS N12
C14 U2DN1 3 U3TXDN1 2 9 U3TXDN1
GND
Change to use 48MHz from DB2. 3/3 U2PVSS N11 1
Layout note: U2DP1 2 U3RXDP1 4 7 U3RXDP1
U3AVSS D6
USB3XI N14 XT1
keep the R369 & R371 as close to the traces of USB3XI @PJDLC05_SOT23-3 U3RXDN1 5 6 U3RXDN1
R693 2 1 100_0402_5% USB3XO M14 & USB3XO to keep the stub length at the minimum.
@ XT2
3
8
X2 P6 +5VALW +5VALW
1 2
CSEL CSEL=0 : 24MHz XTAL; CSEL=1: 48MHz Clock @ RCLAMP0524P.TCT~D
+USB3_VCCA
R371
R536
R537
@ 24MHZ_20PF_1BX24000BK1A~D P14
GND
2
2
A1 GND GND P11 (2A,100mils ,Via NO.=4)
2
R369 A2 P9
0_0402_5% GND GND R477
2 2 A3 GND GND P7
C644 C645 A4 P2 10K_0402_5%
GND GND U16
A5 P1
1
1
@ 12P_0402_50V8J @ 12P_0402_50V8J GND GND
A7 N13 1 8 W=100mils
0_0402_5% 1
0_0402_5% 1
0_0402_5% 1
1 1 GND GND GND OUT

A9 GND GND N9 2 IN OUT 7
B A11 N7 3 6 B
GND GND IN OUT
150U_B2_6.3VM_R35M
10U_0805_10V4Z
0.1U_0402_16V4Z
1000P_0402_50V7K
A13 N3 SLP_S4 4 5
GND GND 19,26,35 SLP_S4 EN# OC#
A14 GND GND M13 1 1 1 1 1
Install. 3/3
C407
C472
C473
B3 M12 C470 G548A2P8U_MSOP8
GND GND +
B4 GND GND M11
@ B5 M10 4.7U_0805_10V4Z
GND GND 2 Low Active 2 2 2
C471
14 CLK_48M_USB3_PCH B7 GND GND M9
+3VS 2
B9 GND GND M8
B11 GND GND M7
B13 GND GND M6
Add on 11/24. B14 M5
+3VS GND GND
C1 GND GND M4
C2 GND GND M3
C3 GND GND L12
1
C10 L11 +5VALW +5VALW

R699 GND GND
C11 GND GND L7
GND L6
10K_0402_5% +USB3_VCCB
2
(2A,100mils ,Via NO.=4)
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
CLKREQ#_USB30 R723
D
14 PEG_B_CLKREQ# 1 3
10K_0402_5%
C12
C13
D3
D4
D11
D12
D13
D14
E1
E2
E13
E14
F4
F6
F7
F8
F9
F11
F12
G1
G2
G6
G7
G8
G9
G11
G12
G13
H6
H7
H8
H9
H12
J3
J4
J6
J7
J8
J9
J11
J12
K3
K4
L1
L2
L3
L4
Q25 U42
1
@ 2N7002_SOT23-3 1 8 W=100mils
G
2
GND OUT
2 IN OUT 7
3 IN OUT 6
150U_B2_6.3VM_R35M
10U_0805_10V4Z
0.1U_0402_16V4Z
1000P_0402_50V7K
SLP_S4 4 5
EN# OC#
1 1 1 1 1
C658
C659
C660
+3VS +3VS C657 G548A2P8U_MSOP8
+
4.7U_0805_10V4Z
Low Active
1
2 2 2 2
C406
A R696 R697 2 A
+3VS
47K_0402_5% 10K_0402_5%
2
2
2
U40
R700 SPICSB 1 8
10K_0402_5% SPISO CS# VCC
2 SO HOLD# 7
3 6 SPISCK
4
WP# SCK
5 SPISI Security Classification Compal Secret Data Compal Electronics, Inc.
1
GND SI
2 Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title
PSEL R918 1 2 @ 10K_0402_5% AT25F512AN-10SU-2.7_SO8~D C651
USB3.0 Connectors
0.1U_0402_16V4Z Size Document Number R ev
1 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
5 4 3 2 1
5 4 3 2 1
+3VS +3VALW
Finger printer TPM1.2 on board

+3VALW +USB20_N1_PWR
C477
0.1U_0402_16V4Z
C478
0.1U_0402_16V4Z
C479
0.1U_0402_16V4Z
C480
0.1U_0402_16V4Z
C476 1 2 22P_0402_50V8J TPM_XTALI 1 1 1 1
Add on 11/11.
Q31
AP2301GN 1P_SOT23
Y6
1
JFP1 2 2 2 2
S
R480
D
3 1 2 2 1 1 2 NC IN 1
USB20_N10 4 3 10M_0402_5%
16 USB20_N10 4 3
C482
C483
D USB20_P10 6 5 3 4 D
16 USB20_P10 6 5 NC OUT
0.1U_0402_16V4Z
G
1 1 8 7
2
8 7 32.768KHZ 1TJS125DJ4A420P
1
2
C238
CONN@ ACES_50611-0040N-001
24
19
10
5
R483 C481 1 2 22P_0402_50V8J TPM_XTALO U18
2 2
0.1U_0402_16V4Z
10U_0805_10V4Z
10K_0402_5%
VSB
VDD
VDD
VDD
2 LPC_LAD0 26 LAD0
LPC_LAD1 23
5mA 25mA
1
LPC_LAD2 LAD1
+3VS
Change R481 to no 20 LAD2 +3VS
R488 LPC_LAD3 17 6 TPM_GPIO PAD T76
220K_0402_1%
D32 install. 11/30 LPC_LFRAME# 22
LAD3 GPIO
2 TPM_GPIO2 PAD T77
USB20_N10 USB20_P10 PLT_RST# LFRAME# GPIO2
16 FPR_OFF 1 2 3 IO2 IO1 2 16 LRESET#
Base I/O Address
1
+3VS R481 1 2 @ 10K_0402_5% SUS_STAT# 28 0 = 02Eh
Add on 11/15. SIRQ LPCPD# R482
+5VALW 4 PWR GND 1 27 SERIRQ
1 =* 04Eh
C484 CLK_PCI_TPM_PCH 21 4.7K_0402_5%
LCLK
1
+USB20_N1_PWR CM1293A-02SR_SOT143-4 @ 10P_0402_50V8K
R484 1 2 R485 1 2 @ 10_0402_5% S L B 9 6 3 5 T T 1. 2
2
@ 4.7K_0402_5% 15 8 R486 1 2 0_0402_5%
1 15,31,32,33 PM_CLKRUN# CLKRUN# TEST1
TESTB1/BADD 9
2
R509 7 PP
1
@ 470_0402_5%
Have internal PD, 3 R487
2
TPM_XTALO NC @4.7K_0402_5%
14 12
del R489. 11/30 XTALO NC
1
NC
1
D TPM_XTALI 13
2
Q65 XTALI/32K IN
2
G @ 2N7002_SOT23-3
GND
GND
GND
GND
S
3
Change net name. 11/30 SLB 9635 TT 1.2_TSSOP28
25
18
11
4
C SUS_STAT# C
15,32,33 SUS_STAT#
Removed R490 connect to U3. 10/27
CLK_PCI_TPM_PCH
16 CLK_PCI_TPM_PCH
BIOS ROM(8MB) +3VL SPI_CLK R145 1 2 0_0402_5%

+3VL
LPC Debug Port
C705
47P_0402_50V8J
1 SPI ROM Socket Install on DB2. Change from B+.
20mils EMI request close to
C485 U19 &U1 1209
U19/34. 12/11
1
0.1U_0402_16V4Z 8 4
2 VCC VSS R492 Vin_Debug
SPI_WP# 3 SPI ROM 100K_0402_5% Connect pin3 &
2
W
@
20mils R493 1 2 3.3K_0402_5% SPI_HOLD#_1 7
23. 11/11
+3VL
2
HOLD 45@ SST25VF032B-66_SO8
31 SPI_CS0# SPI_CS0# 1
R6 1 S
+3VL 2 @ 100K_0402_5% 8051_RECOVER# JDBG1
31 SPI_CLK SPI_CLK 6 R494 1
C 33_0402_5% GND
Add R6. 4/23 16 CLK_PCI_DB_PCH 2 LPC_PCI_CLK
31 SPI_SI SPI_SI 5 2 SPI_SO_R 1 2 3
D Q SPI_SO 31 GND
B
Add & Change. 11/11 13,24,31,33 LPC_LFRAME# 4 LPC_FRAME# B
WIESO_G6179-100000_8P 13,31,32,33 SIRQ SIRQ 5 +3VS
4,13,16,21,22,24,27,30 PLT_RST# 6 LPC_RESET#
16,31,32 PCI_SERR# 7 +3VS
Reserve for 8M rom not ready 12/02. 13,24,31,33 LPC_LAD0 8 LPC_AD0
13,24,31,33 LPC_LAD1 9 LPC_AD1
13,24,31,33 LPC_LAD2 10 LPC_AD2
13,24,31,33 LPC_LAD3 11 LPC_AD3
SPI ROM Socket 12 VCC_3VA
31 8051TX 13 PWR_LED#
U34 14
31 8051RX CAPS_LED#
SPI_HOLD#_1 1 16 SPI_CLK &U2 15
1 16 31 8051_RECOVER# NUM_LED#
+3VL 2 15 SPI_SI 39 DEBUG_KBCRST 16
2 15 SPI_CLK_JP VCC1_PWRGD
3 3 14 14 17 SPI_CLK
4 13 SPI ROM SPI_CS0#_JP 18
4 13 SPI_SI_JP SPI_CS#
5 5 12 12 19 SPI_SI
6 11 SPI_SO_JP 20
SPI_CS0# 6 11 45@ SST25VF032B-66_SO8 SPI_HOLD#_0 SPI_SO
7 7 10 10 21 SPI_HOLD#
SPI_SO_R 8 9 SPI_WP# 31 SPI_CS1# 22
8 9 RSV
23 RSV
WIESO_G6179-07000002-00 Modify. 12/05 24 RSV
Colay 16 pins SPI ROM 25 GND
26 GND
CONN@ ACES_50238-02471-001
Removed R500, R501 connect to U3. 10/27
A A
SPI_HOLD#_1 R497 1 2 0_0402_5% SPI_HOLD#_0
SPI_CLK R498 1 2 0_0402_5% SPI_CLK_JP
SPI_SI R499 1 2 0_0402_5% SPI_SI_JP +3VL R495 1 2 3.3K_0402_5% SPI_WP# R496 1 2@ 0_0402_5%
20mils
SPI_CS0# R502 1 2 0_0402_5% SPI_CS0#_JP Security Classification Compal Secret Data Compal Electronics, Inc.
SPI_SO_R R503 1 2 0_0402_5% SPI_SO_JP
TCG/BIOS ROM/PS2/SW LPC DEBUG
5 4 3 2 1
DOCKING CONNECTOR (190 pins) Place close to R506 ~ R508. 11/11 R_DOCK_RED C486 1 2 @ 0.1U_0402_16V4Z
R_DOCK_GRN C487 1 2 @ 0.1U_0402_16V4Z
VIN VA (2) PS/2 Interfaces
DOCK_RED
DOCK_GRN
R520 2
R521 2
1 @ 150_0402_1%
1 @ 150_0402_1%
DOCK_RED
DOCK_GRN
C516 1
C517 1
2 @ 0.1U_0402_10V6K
2 @ 0.1U_0402_10V6K R_DOCK_BLU C488 1 2 @ 0.1U_0402_16V4Z
(2) USB 2.channels DOCK_BLU R522 2 1 @ 150_0402_1% DOCK_BLU C518 1 2 @ 0.1U_0402_10V6K
(2) SATA Channels
(2) Display Port Channels
L1 (1) Serial Port
(1) Parallel Port JDOCK1B
1 2
HCB2012KF-121T50_0805 JDOCK1A (1) Line In
L18 (1) Line Out DCAD D CAD2
12A (1) RJ45 (10/100/1000) T84 PAD 143 143 46 46 PAD T85
1 2 190 P1 G1 189 (1) VGA T87 PAD 142 142 47 47 PAD T88
HCB2012KF-121T50_0805 141 48
(1) 2 LAN indicator LED's 21 DPB_HPD 141 48 DPC_HPD 21
15 SLP_S5# R504 2 1 1K_0402_5% 140 49
(1) Power Button 140 49 ON/OFF# 25
C489
0.1U_0603_50V4Z
C490
0.1U_0603_50V4Z
(1) I2C interface ADP_SIGNAL 139 139 50 50
0.1U_0402_16V4Z
1 1 188 1 DPB_AUX R736 1 2 0_0402_5% DPB_DDC2CLK 138 51 DPC_DDC6CLK R738 1 2 0_0402_5% DPC_AUX
188 1 138 51
C491
187 2 DPB_AUX# R737 1 2 0_0402_5% DPB_DDC2DATA 137 52 DPC_DDC6DATA R739 1 2 0_0402_5% DPC_AUX#
23 MDO3+ 187 2 MDO1+ 23 137 52
1
23 MDO3- 186 186 3 3 MDO1- 23 136 136 53 53 1
185 4 Add on 12/10. 135 54 Add on 12/10. R505
2 2 185 4 135 54 1K_0402_5%
23 MDO2+ 184 184 5 5 MDO0+ 23 134 134 55 55
23 MDO2- 183 183 6 6 MDO0- 23 133 133 56 56
2
182 7 132 57
2
182 7 132 57
33 LPTSTB# 131 131 58 58 D_DDCDATA 19
+5VS 130 59
33 LPTAFD# 130 59 D_DDCCLK 19
EMI request. 11/24 DETECT 181 8 LED_LINK_LAN_DOCK# 23 33 LPTERR# 129 60 D_VSYNC 19
181 8 129 60
180 180 9 9 LAN_ACT# 22,23 Change. 0223 33 LPTACK# 128 128 61 61 D_HSYNC 19
+5VS 179 179 10 10 33 LPTBUSY 127 127 62 62
VA 178 178 11 11 +5VS 33 LPTPE 126 126 63 63 R_DOCK_RED R506 1 2 0_0402_5% DOCK_RED
C492
10U_0805_10V4Z
C493
0.1U_0402_16V4Z
C494
0.1U_0402_16V4Z
C495
0.1U_0402_16V4Z
177 177 12 12 33 LPTSLCT 125 125 64 64
Add. 0224 176 13 1 1 1 1 124 65 R_DOCK_GRN R507 1 2 0_0402_5% DOCK_GRN
176 13 33 LPD7 124 65
175 14 Add. 0224 33 LPD6 123 66 R_DOCK_BLU R508 1 2 0_0402_5% DOCK_BLU
175 14 123 66
174 174 15 15 33 LPD5 122 122 67 67
173 173 16 16 33 LPD4 121 121 68 68 DCD#1 33
2
2 2 2 2
172 172 17 17 33 LPD3 120 120 69 69 RI#1 33
171 171 18 18 33 LPD2 119 119 70 70 DTR#1 33 Change to GND. 12/04
D42 170 19 118 71
170 19 USB20_N11 16 33 LPD1 118 71 CTS#1 33
@ PJSOT24C_SOT23 169 20 117 72
169 20 USB20_P11 16 33 LPD0 117 72 RTS#1 33
168 168 21 21 33 LPTSLCTIN# 116 116 73 73 DSR#1 33
167 22 33 LPTINIT# 115 74 TXD1 33
1
167 22 STB_LED#_R 115 74

166 166 23 23 114 114 75 75 RXD1 33
165 165 24 24 13,30 SATA_LED# 113 113 76 76 PAD T111 Disconnect SER_SHD. 4/25
164 25 DOCK_ID 112 77 DockID0 16
164 25 23 DOCK_ID 112 77
163 163 26 26 16 ISO_PREP# 111 111 78 78 DockID1 16
162 162 27 27 110 110 79 79
161 161 28 28 13 SATA_PTX_C_DRX_P5 109 109 80 80
160 29 Correct to swap them. 4/23 13 SATA_PTX_C_DRX_N5 108 81 KBD_DATA 31
160 29 108 81
159 159 30 30 107 107 82 82 KBD_CLK 31
21 DPB_TXP0 158 158 31 31 DPC_TXP0 21 13 SATA_PRX_DTX_P5 106 106 83 83 PS2_DATA 31
21 DPB_TXN0 157 157 32 32 DPC_TXN0 21 13 SATA_PRX_DTX_N5 105 105 84 84 PS2_CLK 31
156 156 33 33 104 104 85 85 LINE_IN_SENSE 30
21 DPB_TXP1 155 155 34 34 DPC_TXP1 21 16 USB20_N13 103 103 86 86 LINE_OUT_SENSE 30
21 DPB_TXN1 154 154 35 35 DPC_TXN1 21 16 USB20_P13 102 102 87 87
153 153 36 36 101 101 88 88 DOCK_LINE_IN_L 30
21 DPB_TXP2 152 152 37 37 DPC_TXP2 21 13 SATA_PTX_C_DRX_P2 100 100 89 89 DOCK_LINE_IN_R 30
21 DPB_TXN2 151 151 38 38 DPC_TXN2 21 13 SATA_PTX_C_DRX_N2 99 99 90 90
150 150 39 39 98 98 91 91 DLINE_OUT_L 30
21 DPB_TXP3 149 149 40 40 DPC_TXP3 21 13 SATA_PRX_DTX_P2 97 97 92 92 DLINE_OUT_R 30
21 DPB_TXN3 148 148 41 41 DPC_TXN3 21 13 SATA_PRX_DTX_N2 96 96 93 93
147 42 95 94 DETECT
147 42 95 94
21 DPB_AUX 146 146 43 43 DPC_AUX 21
21 DPB_AUX# 145 145 44 44 DPC_AUX# 21 Remove R514~R517. 2/26
144 45 +5VALW
144 45
Change net name from DOCK_HPS#. 11/11
192 G2 G1 191
2
CONN@ FOX_QL0094L-D26601-8H SATA port4 chage to port5. 194 193
R67 G4 G3
196 G6 G5 195
10K_0402_5% SATA port3 chage to port2. 2/10 198 197
G8 G7
200 G10 G9 199
1
Add. 4/25 CONN@ FOX_QL0094L-D26601-8H
Remove C512, C513, C514, C515, R117 & R118, they will STB_LED#_R
place at dock side. 11/30
1
D
25,30 STB_LED# 2 Q71
G 2N7002_SOT23-3
Remove C496 ~ C511, because put S
3
them to docking side. 2/17
RGB Q-Switch
U20 U21 U22
1 6 DOCK_ID 1 6 DOCK_ID 1 6 DOCK_ID

19 VGA_RED NO IN 19 VGA_GRN NO IN 19 VGA_BLU NO IN
IN NC<-->COM NO<-->COM
+3VS +3VS +3VS
2 5 C519 2 1 0.1U_0402_16V4Z 2 5 C520 2 1 0.1U_0402_16V4Z 2 5 C521 2 1 0.1U_0402_16V4Z
GND VCC GND VCC GND VCC
L ON OFF
DOCK_RED 3 4 RED_R 19 DOCK_GRN 3 4 GREEN_R 19 DOCK_BLU 3 4 BLUE_R 19
NC COM NC COM NC COM
H OFF ON
TS5A3157_SC70-6 TS5A3157_SC70-6 TS5A3157_SC70-6

DOCK CONN
Custom LA-4951P 0.4
5 4 3 2 1
Audio/Express/LEDs/Card Read Connector

JEXP1
29 DOCK_LINE_IN_L 1 1 2 2 DLINE_OUT_L 29
29 DOCK_LINE_IN_R 3 3 4 4 DLINE_OUT_R 29
29 LINE_IN_SENSE 5 5 6 6 LINE_OUT_SENSE 29 Change net name from DOCK_HPS#. 11/11 Power Button Connector
7 7 8 8
13 HDA_SDIN0 9 9 10 10 A_SD# 31 Change net name from A_SD. 5/04
13 HDA_SDOUT_CODEC 11 11 12 12 MUTE_LED_CNTL 31 Change net name from EAPD. 5/04
13 HDA_RST#_CODEC 13 13 14 14 HDA_SPKR 13
D
13 HDA_SYNC_CODEC 15 15 16 16 AMBER_BATLED# 31 Removed Power button JPB1 & C522, combin with D
17 18 AQUAWHITE_BATLED# 31
13 HDA_BIT_CLK_CODEC
19
17 18
20
JSWITCH1. 11/10
+3VL 19 20 SATA_LED# 13,29
+3VALW 21 21 22 22 HDD_HALTLED 13
+3VALW 23 24 STB_LED# STB_LED# 25,29
23 24 WL/BT_LED#
+5VS 25 25 26 26 WL/BT_LED# 25
+3VS 27 27 28 28
+3VS 29 29 30 30 PCIE_PTX_C_DRX_N2 14
+1.5VS 31 31 32 32 PCIE_PTX_C_DRX_P2 14
Add 1 pin for +1.5VS. 4/29 33 33 34 34 PCIE_PRX_DTX_N2 14
35 35 36 36 PCIE_PRX_DTX_P2 14
15,24,27 PCIE_WAKE# 37 37 38 38
4,13,16,21,22,24,27,28 PLT_RST# PLT_RST# 39 40
39 40 USB20_N4 16
CPPE# 41 42 Change R734 & R735 to NI. 02/06
41 42 USB20_P4 16
14 CLK_PCIE_EXP_PCH# 43 43 44 44
14 CLK_PCIE_EXP_PCH 45 45 46 46 SDCD#_MMCCD#_XDCD0# 32
15,31,34,35,38,40,41 SLP_S3# 47 47 48 48 MS_XDC1D# 32 +3VS
32 SD_MMC_MS_XDC_D0 49 49 50 50 XDCE# 32
32 SD_MMC_MS_XDC_D1 51 51 52 52 SDWP#_XDR/B# 32
32 SD_MMC_MS_XDC_D2 53 53 54 54 SDPWR0_MMC_MS_XDPWR 32
32 SD_MMC_MS_XDC_D3 55 55 56 56 SDPWR1_XDWP# 32
32 MMC_XDC_D4 57 57 58 58 SD_MMCCMD_MSBS_XDWE# 32
32 MMC_XDC_D5 59 59 60 60 SD_MMC_MSCLK_XDRE# 32
2
330K_0402_5%
32 MMC_XDC_D6 61 61 62 62
2
63 64 R735
32 MMC_XDC_D7 63 64
R734
32 XDCLE 65 65 66 66 @ 10K_0402_5%
32 XDALE 67 67 68 68
69 70 +5VALW Add on 7/21.
1
69 70
71 72
1
G1 G2
@ AQUAWHITE_BATLED 13
ACES_50026-07071-001
CONN@ +3VL +3VALW +5VS +3VS +1.5VS
1
D Q66
C AQUAWHITE_BATLED# C
2
C523
C524
C525
C526
C527
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
G 2N7002_SOT23-3
1 1 1 1 1 S
3
R759 1 2 0_0402_5% CPPE#
13,16 USB_OC#7
2 2 2 2 2
Change CLKREQ_EXP# to CPPE# and connect to GPIO14. 7/21
Add for debuging. 3/3
+3VS
1
D50 +3VS
1
LTST-S110TBKT-5A
R523
47K_0402_5%
2
2
1
R354 WL/BT_LED#
1K_0402_5% Q32
6
@ DTA114YKAT146_SOT23-3 47K Q9A
2N7002DW-T/R7_SOT363-6
2
B R456 1 B
24 WL_LED# 2 0_0402_5% 2 10K
26 BT_LED
BT_LED 2
PLT_RST#
WL/BT_LED# HF
3
1
Add on 5/11. Q9B
WL_LED 5 2N7002DW-T/R7_SOT363-6
Q33
4
1
@ DTA114YKAT146_SOT23-3
HF
R458 1 2 0_0402_5% 2 BT_LED R524 1 2 100K_0402_5%

24 WW_LED# 10K
WL/BT_LED#
47K WL_LED R525 1 2 100K_0402_5%
3
+3VS
A A

CR&LEDS&PW&Audio&Exp Conn
5 4 3 2 1
Change design on 2/17.
System Board ID Detect
ID R526 R528 R529 R530
+3VS Q10A +3VS
+3VL 2N7002DW-T/R7_SOT363-6 DB1 X
KSI3 R526 1 2 @ 0_0402_5% 6 1
2
KSI2 R528 1 2 0_0402_5% U44 DB2 X X
5
74LVC1G02GW_SOT353-5
R527 1 AQUAWHITE_BATLED# DBx X X
P
2
B
0.1U_0402_16V4Z
C528
0.1U_0402_16V4Z
C529
0.1U_0402_16V4Z
C530
0.1U_0402_16V4Z
C531
4.7U_0805_10V4Z
C532
1 1 1 1 1 0_0402_5% 4
KSI1 R529 1 O
2 0_0402_5% 2 ADP_EN SI1 X
1
A
G
KSI0 R530 1 2 @ 0_0402_5% 3 4
1
+3VL SI2 X X
3
2 2 2 2 2
0.1U_0402_16V4Z
Q10B
C533
1 2N7002DW-T/R7_SOT363-6 R150 SIx X X
5
RP21 @ 47K_0402_5%
1 8 KSI0 PV X
2
2 7 KSI1 KSI1 & 3 swap. 11/20
KSI2 2 N/A
3 6
106
119
KSI3
39
58
84
14
49
4 5
U23 N/A
10K_0804_8P4R_5% 128 15 C534 1 2 4.7U_0805_10V4Z
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC2
28 SPI_SI FLDATAOUT CAP
13 KBC_SPI_SI_R 127 HSTDATAOUT/GPIO45
PVx X
RP22
28 SPI_CS0# 97 FLCS0# GPIO28 93 PM_SLP_M# 15,34,35
1 8 KSI7 13 KBC_SPI_CS0#_R 96 98 N/A
HSTCS0#/GPIO44 GPIO29 SUS_PW R_ACK 15
2 7 KSI6 28 SPI_SO 95 99
FLDATAIN GPIO30 AC_PRESENT 15
3 6 KSI5 94 100 Change net name from EAPD. 5/04 N/A
13 KBC_SPI_SO HSTDATAIN/GPIO43 GPIO31 MUTE_LED_CNTL 30
4 5 KSI4 126
GPIO32 PCI_SERR# 16,28,32 +3VL
MV
10K_0804_8P4R_5% KSO0 21 124 KBC_PW R_ON
KSO0 OUT0/(SCI) KBC_PW R_ON 39
KSO1 20 125 AQUAWHITE_BATLED# X: mean install
KSO1 OUT1/IRQ8# AQUAWHITE_BATLED# 30
KSO2 19
KSO3 KSO2 FET_A BATCON R531 1
18 KSO3 CFETA/OUT7/nSMI 123 FET_A 37 2 @ 10K_0402_5%
KSO4 17 122 KBRST# D33 1 2
General Purpose I/O Interface

+5VS KSO4 OUT8/KBRST KB_RST# 16
Keyboard/Mouse Interface
KSO[0..13] KSO5 16 121 CH751H-40PT_SOD323-2 KBRST# R532 1 2 @ 10K_0402_5%
SMSC_1098-NU_TQFP-128P
25 KSO[0..13] KSO5 OUT9/PWM2 FAN_PWM 4
KSO6 13 120
RP24 KSO6 OUT10/PWM0 BAT_PWM_OUT 38
KSO7 12 118 CRACK_BGA R533 1 2 100K_0402_5%
KSO7 PWM_CHRGCTL CHGCTRL 38
1 8 TP_CLK KSO8 10
TP_DATA KSO9 KSO8 VCC1_PW RGD R535 1
2 7 9 KSO9 GPIO01 107 THM_TRAVEL# 36 2 10K_0402_5%
3 6 KBD_CLK KSO10 8 79
KSO10 GPIO02 ON/OFFBTN_KBC# 25
4 5 KBD_DATA KSO11 7 80 T89 PAD 8051TX R919 1 2 100K_0402_5%
KSO12 KSO11 GPIO03
6 KSO12/GPIO00/KBRST GPIO04/KSO14 81 SLP_S3# 15,30,34,35,38,40,41
10K_0804_8P4R_5% KSO13 5 83
KSO13/GPIO18 GPIO05/KSO15 8051_RECOVER# 28 +3VL
85 PM_RSMRST# RP23
RP25 GPIO07/PWM3 PM_RSMRST# 15
KSI0 29 86 CRACK_BGA 4.7K_0804_8P4R_5%
KSI0 GPIO08/RXD CRACK_BGA 18
1 8 SP_CLK KSI1 28 87 T108 PAD Leave TP. 2/23 AB1A_CLK 1 8
SP_DATA KSI2 KSI1 GPIO09/TXD AB1A_DATA
2 7 27 KSI2 2 7
3 6 PS2_CLK KSI3 26 88 AB2A_DATA R539 1 2 0_0402_5% AB1B_CLK 3 6
KSI[0..7] KSI3 GPIO11/AB2A_DATA CAP_DAT 14,25
4 5 PS2_DATA 25 KSI[0..7] KSI4 25 89 AB2A_CLK R540 1 2 0_0402_5% AB1B_DATA 4 5
KSI4 GPIO12/AB2A_CLK CAP_CLK 14,25
KSI5 24 90 R542 1 2 0_0402_5%
KSI5 GPIO13/AB2B_DATA CELLS 38
10K_0804_8P4R_5% KSI6 23 91 R543 1 2 0_0402_5%
KSI6 GPIO14/AB2B_CLK A_SD# 30
KSI7 22 92 ADP_DET#
KSI7 GPIO15/FAN_TACH1 ADP_DET# 44
GPIO16/FAN_TACH2 101 THM_MAIN# 36
GPIO17/A20M 102 GATEA20 16
TP_CLK 35 PWRBTN_OUT# Change from 10K. 5/11
25 TP_CLK IMCLK PWRBTN_OUT# 25
TP_DATA 36 103 KBD_CLK
25 TP_DATA IMDAT GPIO20/PS2CLK KBD_CLK 29
SP_CLK 61 105 KBD_DATA Add R755 and connect
25 SP_CLK KCLK GPIO21/PS2DAT KBD_DATA 29
SP_DATA 62 4 PWRBTN_OUT# R755 1 2 @ 0_0402_5% PDG_IN R538 1 2 @10K_0402_5%
25 SP_DATA
PS2_CLK 66
KDAT GPIO24/KSO16
74
LED_LINK_LAN#_R 16,22,23 GPIO24 to D228.2. 7/19
29 PS2_CLK EMCLK ADP_PRES[CKT#2]/GPIO27/WK_SE05 ADP_PRES 21,35,38,44
PS2_DATA 67 PM_RSMRST# R541 1 2 100K_0402_5%
29 PS2_DATA EMDAT
KBC_PW R_ON R544 1 2 10K_0402_5%
Removed R548, R549 connect 111 AB1A_DATA
AB1A_DATA AB1A_DATA 36
to U3. 10/27 AB1A_CLK 112 AB1A_CLK AB1A_CLK 36 LATCH R545 1 2 10K_0402_5%
Access Bus Interface PDG_IN
PDG_IN 15
15,28,32,33 PM_CLKRUN# 55 109 AB1B_DATA FET_A R546 1 2 10K_0402_5%
CLKRUN# AB1B_DATA AB1B_DATA 36
57 110 AB1B_CLK
13,28,32,33 SIRQ SER_IRQ AB1B_CLK AB1B_CLK 36
FET_B R547 1 2 10K_0402_5%
16 CLK_PCI_KBC_PCH
RUNSCI_EC#
54
76
PCI_CLK Power Mgmt/SIRQ 73 R552 1 2 0_0402_5%
16 RUNSCI_EC# EC_SCI# GPIO25 CAP_SENS_INT 25
ADP_EN R128 1 2 47K_0402_5%
GPIO26/KSO17 108 ADP_ID_CHK 44
51 59
Miscellaneous
13,24,28,33 LPC_LAD3 LAD[3] NC_CLOCKI
50 75 32K_CLK R555 1 2 0_0402_5% ADP_EN
13,24,28,33 LPC_LAD2 LAD[2] 32KHZ_OUT/GPIO22/WK_SE01 ADP_EN 44
48 60 PDG_IN R556 1 2 220_0402_5%
13,24,28,33 LPC_LAD1 LAD[1] RESET_OUT#/GPIO06 PM_PWROK 43
13,24,28,33 LPC_LAD0 46 LAD[0] LPC PWRGD 78 PW R_GD 4,11,13,34
77 VCC1_PW RGD
52
Bus VCC1_RST#
38
VCC1_PW RGD 39,44
13,24,28,33 LPC_LFRAME# LFRAME# ADC_TO_PWM_OUT/GPIO19 OCP 44
16,33 NPCI_RST# 53 LRESET#
69 TEST R560 1 2 1K_0402_5%
TEST PIN
C R Y1 70 116 FET_B
XTAL1 CFETB/GPIO10 FET_B 37
C R Y2 71 113
XTAL2 BAT_LED# AMBER_BATLED# 30
115 8051TX 28
EMI: 12/11 PWR_LED#/8051TX
32.768KHZ 1TJS125DJ4A420P
+VCC0 68 VCC0 FDD_LED#/8051RX 114 8051RX 28

C535
C536
Add R144. R566 1 2 100K_0402_5% +3VL

37 BAT_ALARM 1 Alarm [CKT#2]/GPIO36
1
1 1 13 KBC_SPI_CLK_R 2 HSTCLK/GPIO41 AC[CKT#2]/GPIO23 41 AC_ADP_PRES 38

Y7
R144 1 2 0_0402_5% 3 42 R136 1 2 300_0402_5%

IN
OUT
28 SPI_CLK FLCLK ADC2/GPIO40 ADP_A_ID 44

30 65 LATCH
24 MC2_DISABLE GPIO39 Q/GPIO33 LATCH 37
13 KBC_SPI_CS1#_R 31 HSTCS1#/GPIO42 GPIO34 64 LID_SW# 14,20,25
2 2 R572 1
28 SPI_CS1# 32 FLCS1# GPIO35 63 2 0_0402_5% CAP_RST_EC 25
33P_0402_50V8J
33P_0402_50V8J
NC
NC
24 MC1_DISABLE 33 GPIO38 AVCC 40 +3VL

34 GPIO37
AGND
AVSS
R139 1 2 300_0402_5% 43 2
38 PMC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2
R149 1 ADC1/GPIO46
44 OCP_A_IN 2 300_0402_5% 44 ADC_TO_PWM_IN
C388
C393
C389
KBC1098-NU_TQFP128_14X14 2200P_0402_50V7K
72
11
37
47
56
104
82
117
45
1
2 2 Add. 5/04
Add R136, C388. 5/04
1 1
2200P_0402_50V7K
2200P_0402_50V7K
A_GND
+RTCVCC
Remove R587 PD. 4/25
A_GND
2
1
R137
0_0402_5%
R584
0_0402_5%
1
2
Add. 5/04
+VCC0
A_GND
C537
1U_0603_10V4Z
C538
0.1U_0402_16V4Z
1 1
2 2
KBC1098
5 4 3 2 1
+3VS SD,MMC,MS,XD muti-function pin define
10U_0805_10V4Z
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
C540
C541
C542
C543
C544
1 1 1 1 1 MDIO SD Card MMC Card MS Card XD Card
U24 Layout Note: Layout Note: Place close to R5C835
16 PCI_AD[0..31]
PCI_AD31 121 6
PIN Name PIN Name PIN Name PIN Name PIN Name
AD31 VCC_PCI3V Place these cap close to U24. and Shield GND.
PCI_AD30 122 23 MDIO00 SDCD# MMCCD# XDCD0#
PCI_AD29 AD30 2.5mA VCC_PCI3V 2 2 2 2 2
123 AD29 VCC_PCI3V 38
PCI_AD28 124 118 +3VS MDIO01 MSCD# XDCD1#
PCI_AD27
PCI_AD26
125
126
AD28
AD27 R5C835 VCC_PCI3V
92 C545 MDIO02 XDCE#
PCI_AD25 127
AD26 49mA VCC_RIN
1 2 R5C832XI
AD25
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.01U_0402_16V7K
10U_0805_10V4Z
PCI_AD24 1 11 1 1 1 1 MDIO03 SDWP# XDR/B#
CLK_PCI_1394 PCI_AD23 AD24 VCC_ROUT 16P_0603_50V8
4 AD23 VCC_ROUT 33 Layout Note:
1
0.01U_0402_16V7K
0.01U_0402_16V7K
0.47U_0603_16V4Z
0.47U_0603_16V4Z
PCI_AD22 5 59 1 1 1 1 MDIO04 SDPWR0 MMCPWR0 MSPWR XDPWR
AD22 VCC_ROUT Place these cap close to U24.
@
PCI_AD21 7 91 X1
AD21 VCC_ROUT
1
+3VS 2 2 2 2
R590
10_0402_5%
PCI_AD20 9 111 24.576MHz_16P_3XG-24576-43E1 MDIO05 SDPWR1 MMCPWR1 XDWP#
AD20 VCC_ROUT
C546
C547
C548
C549
PCI_AD19 10 C554
2
PCI_AD18 AD19 2 2 2 2 R5C832XO
D Remove R591 12 AD18 0.2mA VCC_3V 79 1 2 MDIO06 SDLED# MMCLED# MSLED# XDLED# D
C550
C551
C552
C553
PCI_AD17 13
and C558 keep AD17
0.01U_0402_16V7K
10U_0805_10V4Z
PCI_AD16 14 54 1 1 16P_0603_50V8 MDIO07 MSEXTCK
R731 and C661,
2
PCI_AD15 27
AD16 10mA VCC_MD3V
PCI_AD14 AD15
because @ 28 AD14 AVCC_PHY3V 97 +3VS_PHY +SC_PWR
MDIO08 SDCCMD MMCCMD MSBS XDWE#
PCI_AD13 29 104
duplicated. AD13 25.6mA AVCC_PHY3V 2 2
C557
4.7P_0402_50V8C
1 PCI_AD12 30 108 MDIO09 SDCCLK MMCCLK MSCCLK XDRE#

12/05 AD12 AVCC_PHY3V
C555
C556
PCI_AD11 31
PCI_AD10 AD11 +SC_PWR +3VS_PHY
32 AD10 2mA VCC_SC 90 MDIO10 SDCDAT0 MMCDAT0 MSCDAT0 XDCDAT0
C559
0.01U_0402_16V7K
C560
10U_0805_10V4Z
PCI_AD9 34 L19
2 PCI_AD8 AD9 MBK2012601YZF_2P
36 AD8 1 1 MDIO11 SDCDAT1 MMCDAT1 MSCDAT1 XDCDAT1
PCI_AD7 39 110 IEEE1394_TPBIAS0 1 2
PCI_AD6 AD7 TPBIAS0 +3VS
40 AD6 MDIO12 SDCDAT2 MMCDAT2 MSCDAT2 XDCDAT2
1000P_0402_25V8J
10U_0805_6.3V6M
0.01U_0402_16V7K
0.01U_0402_16V7K
PCI_AD5 41 107 IEEE1394_TPAP0
AD5 TPAP0 2 2
C601
C561
C562
C563
PCI_AD4 42 106 IEEE1394_TPAN0 Change+3V_PHY to MDIO13 SDCDAT3 MMCDAT3 MSCDAT3 XDCDAT3
PCI_AD3 AD4 TPAN0
43 AD3 +3VS_PHY. 10/27 1 1 1 1
PCI_AD2 44 103 IEEE1394_TPBP0 MDIO14 MMCDAT4 XDCDAT4
PCI_AD1 AD2 TPBP0 IEEE1394_TPBN0
45 AD1 TPBN0 102
PCI_AD0 46 MDIO15 MMCDAT5 XDCDAT5
AD0 SDCD#_MMCCD#_XDCD0# 2 2 2 2
MDIO00 70 SDCD#_MMCCD#_XDCD0# 30
2 69 MS_XDC1D# MDIO16 MMCDAT6 XDCDAT6
16 PCI_CBE3# C/BE3# MDIO01 MS_XDC1D# 30
15 63 XDCE#
16 PCI_CBE2# C/BE2# MDIO02 XDCE# 30
16 PCI_CBE1# 26 68 SDWP#_XDR/B#
SDWP#_XDR/B# 30 Layout Note: MDIO17 MMCDAT7 XDCDAT7
16 PCI_CBE0# 37
C/BE1# MDIO03
67 SDPWR0_MMC_MS_XDPWR
SDPWR0_MMC_MS_XDPWR 30 add GND shield Layout Note:
C/BE0# MDIO04 SDPWR1_XDWP#
MDIO05 66 SDPWR1_XDWP# 30 Place these cap close to U24. MDIO18 XDCLE
65 4IN1_LED#
MDIO06 PAD T79
64 TP_MSEXTCK MDIO19 XDALE
PCI_PAR MDIO07 SD_MMCCMD_MSBS_XDWE#
16 PCI_PAR 25 PAR MDIO08 62 SD_MMCCMD_MSBS_XDWE# 30
PCI_FRAME# 16 60 SD_MMC_MSCLK_XDRE#_R R733 2 1 33_0402_5% Layout Note:
16 PCI_FRAME# FRAME# MDIO09 SD_MMC_MSCLK_XDRE# 30
PCI_TRDY# 18 58 SD_MMC_MS_XDC_D0
16 PCI_TRDY# TRDY# MDIO10 SD_MMC_MS_XDC_D0 30 Add GND shield for
PCI_ IRDY# 17 57 SD_MMC_MS_XDC_D1
16 PCI_IRDY#
PCI_STOP# 21
IRDY# MDIO11
56 SD_MMC_MS_XDC_D2
SD_MMC_MS_XDC_D1 30
SD_MMC_MSCLK_XDRE#. Function set pin define
16 PCI_STOP# STOP# MDIO12 SD_MMC_MS_XDC_D2 30
PCI_DEVSEL# 19 55 SD_MMC_MS_XDC_D3 UDIO3 UDIO4 UDIO5 Function
16 PCI_DEVSEL# DEVSEL# MDIO13 SD_MMC_MS_XDC_D3 30
PCI_AD22 1 2 CBS_IDSEL 3 53 MMC_XDC_D4
IDSEL MDIO14 MMC_XDC_D4 30
R592 100_0402_5% PCI_PERR# 22 52 MMC_XDC_D5 Pull-down Pull-down Pull-up Disable MS,xD Card,serial ROM
16 PCI_PERR# PERR# MDIO15 MMC_XDC_D5 30
PCI_SERR# 24 51 MMC_XDC_D6
16,28,31 PCI_SERR# SERR# MDIO16 MMC_XDC_D6 30
50 MMC_XDC_D7 Pull-up Pull-up Pull-down Enable serial EEPROM
Change on 11/14. MDIO17 MMC_XDC_D7 30
C 49 XDCLE C
MDIO18 XDCLE 30
120 48 XDALE Pull-up Pull-up Pull-up Ensable MS,xD Card,disable serial ROM
16 PCI_REQ2# REQ# MDIO19 XDALE 30
Layout Note: Add GND shield. 16 PCI_GNT2# 119 GNT#
83 SCVCC5EN#
SCVCC5EN# SCVCC3EN# +3VS
SCVCC3EN# 84 Layout Note: Shield GND and place C564 and R600 close to U24.
16 CLK_PCI_1394 CLK_PCI_1394 117 PCICLK UDIO5 R593 1
16,24 PCI_RST# 116 PCIRST# 2 10K_0402_5%
CBS_GRST# 82 95 R5C832XI UDIO3 R594 1 2 10K_0402_5%
R595 1 GBRST# XI
2 @ 10K_0402_5% 114 CLKRUN# XO 96 R5C832XO UDIO4 R596 1 2 10K_0402_5%
R597 1 2 0_0402_5% 78
15,28,31,33 PM_CLKRUN# PME#
16 PCI_PME# R732 1 2 @ 0_0402_5% 100
REXT
VREF 99
0.01U_0402_16V7K
+3VS R598 2 1 R224 1 2 15K_0402_5% SC_RST 89 SCRST
1
10K_0603_1%
R600
10K_0402_5% R225 1 2 15K_0402_5% SC_CLK 88 76 SIRQ 1
SCCLK UDIO0/SRIRQ# SIRQ 13,28,31,33
R599 1 2 15K_0402_5% SC_DATA 87 75 TP_UDIO1
C564
+SC_PWR SCIO UDIO1 PAD T80
SC_CD# 86 74 TP_UDIO2
SCCD# UDIO2 PAD T81
+SC_PWR R601 1 2 10K_0402_5% SCSENSE 85 73 UDIO3
SCSENSE UDIO3 UDIO4 2
72
2
UDIO4 UDIO5
Add on 12/02. UDIO5 71
16 PCI_PIRQE# 112 INTA# GND 8 Layout Note:

16 PCI_PIRQG# 113 INTB# GND 20
15,28,33 SUS_STAT# R730 1 2 @ 0_0402_5% 35 Please them close to U14.
R602 1 GND
+3VS 2 10K_0402_5% 77 HWSPND# GND 47
R603 1 2 100K_0402_5% 81 61
TEST GND
GND 80
+SC_PWR 98 93
AGND GND
101 AGND GND 94
105 AGND GND 115
1 2 SC_DATA C565 1 2 12P_0402_50V8J 109 128
AGND GND
270P_0402_50V7K
D43 1SS355_SOD323-2
1
C568
5.1K_0402_1%
R604
1 2 SC_RST C566 1 2 12P_0402_50V8J 1
D44 1SS355_SOD323-2 R5C835-TQFP128P_TQFP128_14X14
1 2 SC_CLK C567 1 2 12P_0402_50V8J
D45 1SS355_SOD323-2
2
SMART Card connector
2
Add on 12/02.
B B
JSC1
Change value. 2/6 2 2 1 1 +SC_PWR
1
56.2_0402_1%
R606
56.2_0402_1%
R605
4 4 3 3
6 5 SC_RST
+3VS 6 5
0.01U_0402_16V7K
8 8 7 7 Layout Note:
C569
10 9 SC_CLK Reserve them for test

12
10 9
11 SC_DATA
Add GND shield for 1394.
1 if any EMI issue
2
12 11
1
14 14 13 13
R731 16 15 GND J13941
16 15 SC_CD# IEEE1394_TPBN0 R607 0_0402_5%
18 18 17 17 1 2 1 XTPB0-
100K_0402_1% 2 IEEE1394_TPBP0 R608 0_0402_5%
20 20 19 19 GND 1 2 2 XTPB0+
IEEE1394_TPAN0 R609 1 2 0_0402_5% 3
2
CONN@ E-T_6900-Q10N-00R IEEE1394_TPAP0 R610 0_0402_5% XTPA0-

GND 1 2 4 XTPA0+
CBS_GRST# 5 GND1
6 GND2
+3VS 7
1 GND3
1
+SC_PWR
56.2_0402_1%
56.2_0402_1%
C661 8 GND4
R611
R612
1U_0603_10V4Z X5R R364 1 2 100K_0402_5% SCVCC3EN# CONN@ SUYIN_020204FR004S506ZL
2
Add. 2/25 Layout Note: Shield GND for
2
2
Add. 3/7
IEEE1394_TPA and TPB

Q35
G
G
AP2301GN_SOT23-3 IEEE1394_TPBIAS0
D
S
1 3 3 1
D
+3VS
0.01U_0402_16V7K
0.33U_0603_16V4Z
HF HF 1 1
Q17
C570
C571
0.1U_0603_50V4Z
0.1U_0603_50V4Z
1 AP2301GN_SOT23-3
2 2
1
+5VS 2
C385
Add. 3/02
C384
@
10K_0402_5%
Change. 4/24
1
3 HF 1 Q36
+5VS
S
R158
A AP2301GN_SOT23-3 A
0.1U_0603_50V4Z
G
1
C572
2
+3VS
R159
@ 0.1U_0603_50V4Z
2 1
2
0_0402_5%
10K_0402_5%
1
2
D
R366
C383
SCVCC3EN# 2 Q19
G 2N7002_SOT23-3 2 Security Classification Compal Secret Data Compal Electronics, Inc.
S Issued Date 2008/03/13 Deciphered Date 2009/05/11 Title
1
SCVCC5EN# +5VS
RICOH & Card Reader
Custom LA-4951P 0.4
5 4 3 2 1
5 4 3 2 1
D D
+3VS
U25
9 SIO_GPIO23 R613 2 1 10K_0402_5% +5VS_PRN +5VS
13,24,28,31 LPC_LAD0 LAD0
13,24,28,31 LPC_LAD1 11 LAD1
12 54 RXD1 SIO_GPIO41 R616 2 1 10K_0402_5%
13,24,28,31 LPC_LAD2 LAD2 RXD1 RXD1 29
TXD1
SERIAL I/F
13,24,28,31 LPC_LAD3 13 LAD3 TXD1 55 TXD1 29
2
56 DSR#1 SIO_GPIO42 R548 2 1 10K_0402_5%
DSR1# DSR#1 29
14 1 RTS#1 D35
13,24,28,31 LPC_LFRAME# LFRAME# RTS1# RTS#1 29
15 2 CTS#1 SYSOPT R549 2 1 10K_0402_5%
13 LPC_LDRQ#0 LDRQ# CTS1# CTS#1 29
3 DTR#1
LPC I/F
DTR1# DTR#1 29
16 4 RI#1 CH751H-40PT_SOD323-2
16,31 NPCI_RST# RI#1 29
1
PCI_RESET# RI1# D CD#1
15,28,32 SUS_STAT# 17 LPCPD# DCD1# 5 DCD#1 29 Base I/O Address
0 = 02Eh
18 * 1 = 04Eh +3VS
15,28,31,32 PM_CLKRUN# CLK_PCI_SIO_PCH 19 CLKRUN# LPTERR# R621 1
16 CLK_PCI_SIO_PCH PCI_CLK 2 4.7K_0402_5%
20 35 LPTINIT#
C 13,28,31,32 SIRQ SIO_PME# SER_IRQ INIT# LPTSLCTIN# LPTINIT# 29 C
+3VS 1 2 6 IO_PME# SLCTIN# 36 LPTSLCTIN# 29 Change to 4.7K. 3/3
R614 10K_0402_5% 37 LPD0 RI#1 RP26 1 8 4.7K_0804_8P4R_5%
PD0 LPD0 29
CLK_14M_SIO_PCH 8 39 LPD1 CTS#1 2 7
14 CLK_14M_SIO_PCH CLK14 PD1 LPD1 29
CLOCK 40 LPD2 DSR#1 3 6 LPTPE RP27 1 8 4.7K_0804_8P4R_5%
PD2 LPD2 29
41 LPD3 D CD#1 4 5 LPTBUSY 2 7
PD3 LPD3 29
SIO_GPIO41 LPD4 LPTACK#
PARALLEL I/F
21 GPIO41 PD4 42 LPD4 29 3 6
SIO_GPIO42 22 43 LPD5 LPTSLCTIN# 4 5
GPIO42 PD5 LPD5 29
SIO_GPIO43 24 44 LPD6 RP10
GPIO43 PD6 LPD6 29
SIO_GPIO44 25 45 LPD7 SIO_GPIO46 1 8 10K_0804_8P4R_5%
GPIO
GPIO44 PD7 LPD7 29
SIO_GPIO45 26 47 LPTSLCT SIO_GPIO45 2 7
GPIO45 SLCT LPTSLCT 29
SIO_GPIO46 27 48 LPTPE SIO_GPIO44 3 6 LPD1 RP28 1 8 4.7K_0804_8P4R_5%
GPIO46 PE LPTPE 29
SIO_GPIO47 28 49 LPTBUSY SIO_GPIO43 4 5 LPD0 2 7
GPIO47 BUSY LPTBUSY 29
SIO_GPIO10 29 50 LPTACK# LPTSTB# 3 6
GPIO10 ACK# LPTACK# 29
SYSOPT 30 51 LPTERR# LPTSLCT 4 5
SIO_GPIO12 GPIO11/SYSOPT ERROR# LPTAFD# LPTERR# 29
31 GPIO12/IO_SMI# ALF# 52 LPTAFD# 29
SIO_IRQ 32 53 LPTSTB# RP11
GPIO13/IRQIN1 STROBE# LPTSTB# 29
33 SIO_IRQ 1 8 10K_0804_8P4R_5%
SIO_GPIO23 GPIO14/IRQIN2 SIO_GPIO12 LPD5 RP29 1
34 GPIO23 2 7 8 4.7K_0804_8P4R_5%
SIO_GPIO10 3 6 LPD4 2 7
7 +3VS 4 5 LPD3 3 6
VTR LPD2
VCC 10 4 5
57 EPAD
POWER VCC 23
VCC 38
46 +3VS RXD1 R615 1 2 1K_0402_5%
VCC LPTAFD# RP30 1 8 4.7K_0804_8P4R_5%
LPC47N217N-ABZJ_QFN56_8X8 LPTINIT# 2 7
SIO_GPIO47 R7 2 1 10K_0402_5% LPD7 3 6
0.1U_0402_10V6K C573
0.1U_0402_10V6K C574
0.1U_0402_10V6K C575
4.7U_0805_10V4Z C576
1 1 1 1 LPD6 4 5
CLK_PCI_SIO_PCH CLK_14M_SIO_PCH Disconnect SER_SHD to dock,
but add PD here. 4/25
1
2 2 2 2
B R622 R623 B
Change SER_SHD to SIO_GPIO47. 5/04
@ 10_0402_5% @ 10_0402_5%
2
1 1
C578 C579
@18P_0402_50V8J @10P_0402_25V8K
2 2
A A

Super I/O LPC47N217
Custom LA-4951P 0.4
5 4 3 2 1
+3VS
Removed R625 and 1.05VM_LAN_POK. 12/08 R624 1 2 1M_0402_5% Add for debuging. 3/3
1
R626
+5VALW 10K_0402_5%
1.5V_POK R627 1 2 3.3K_0402_5%
42 1.5V_POK
2
8
1
R628 1 2 76.8K_0402_1% R629 1 2 10K_0402_5% 3 U26A D49
P
+5VS +
O 1 1 2 VCCP_EN 11,21,40 LTST-S110TBKT-5A
2VREF_51125 1 2 2VREF_393 2 -
J1 SHORT PADS
G
+0.75VS R631 1 2 11.5K_0402_1% R630 34.8K_0402_1% LM393DR_SO8
2
D36 1 2 +3VL --> +3VALW. 12/08
M_PWROK R633 1 2 3.3K_0402_5% 1 2 R632 49.9K_0402_1%
1
+3VALW
CH751H-40PT_SOD323-2 +3VALW R353
1
D37 C580 1K_0402_5%
15,30,31,35,38,40,41 SLP_S3# R634 1 2 3.3K_0402_5% 1 2 1000P_0402_50V7K U43
5
MC74AHC1G08DFT2G SC70 5P
2
5
CH751H-40PT_SOD323-2 2
1
P
IN1 PW R_GD_R
1 4 1
P
C581 O IN1
40 VCCP_POK 2 IN2 O 4 PW R_GD 4,11,13,31
G
3300P_0402_25V7K 2
21 MXM_VGA_POK IN2
G
U27
3
2 MC74AHC1G08DFT2G SC70 5P R635
3
R636 1 2 1M_0402_5% 4.99K_0402_1%
2
+5VALW
VTTPWRGOOD 4
8
R638 1 2 16.2K_0603_1% R639 1 2 10K_0402_5% 5 U26B
P
+1.05VS +
1
O 7
2VREF_393 6 R640
-
G
+3VS R641 1 2 49.9K_0402_1% LM393DR_SO8 2.49K_0402_1%
4
WLAN STANDOFF WWAN STANDOFF MDC STANDOFF MXM
2
H23 H24 H20 H21 H6 H7 H1 H2
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
2
1
R643 C582
1
56.2K_0402_1% 3300P_0402_25V7K
1
2
Modify. 2/26
New add. 2/26 R157 1 2 1M_0402_5%
+5VALW Around M/B
8
R637 1 2 3.3K_0402_5% R156 1 2 10K_0402_5% 5 U28B H8 H9 H10 H11 H12 H13 H14 H15 H22 H5
P
41 1.8VS_POK +
7 HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
2VREF_393 O
6 -
G
+1.5VS R642 1 2 11.5K_0402_1% LM393DR_SO8
1
2
1
R155 C318 H3 H4 H16 H17 H18 H19 H26 H28
61.9K_0402_1%~D 3300P_0402_25V7K HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
2 FM1 FM2 FM3 FM4

1 1 1 1
1
+3VALW ZZZ1
R644 2 1 1M_0402_5%
2
R645
+5VALW 3.3K_0402_5% PCB-MB
1
8
R646 1 2 3.3K_0402_5% R647 2 1 10K_0402_5% 3 U28A

P
42 1.05VM_LAN_POK +
1 M_PWROK
O M_PWROK 15
+3VM R648 1 2 46.4K_0402_1% 2VREF_51125 1 2 2VREF_393_1 2 -
G
R519 41.2K_0402_1% LM393DR_SO8

+1.05VM R649 1 2 14.7K_0402_1%
4
D46 1 2
15,31,35 PM_SLP_M# R650 1 2 3.3K_0402_5% 1 2 R511 71.5K_0402_1% R512
1 1K_0402_5%
1N4148WS-7-F_SOD323-2 C512
Change PM_SLP_LAN# to PM_SLP_M#. 2/24 1000P_0402_50V7K
2
D47
2 1 R513 1 2 1M_0402_5%
CH751H-40PT_SOD323-2 C513 1 2 0.068U_0603_16V7K
Change C513 from 0.047uF to 0.068uF. 7/22

1
R651 C583
86.6K_0402_1% 3300P_0402_50V7K
2

2
POK CKT
A B C D E
+3VALW to +3VS Transfer +1.05VM_LAN to +1.05VM Transfer +1.05VM to +1.05VS Transfer +1.5V to +1.5VS Transfer
Change from +1.05VMP_LAN
+1.05VM_LAN. 12/09
+1.05V_LAN_M +1.05VS Install for DB1. 12/04 +1.5V +1.5VS
B+ +3VALW +3VS to +1.05V_LAN_M. 11/11
SI7326DN-T1-E3_PAK1212-8 U35 Change to 330uF. 12/03 Q38
U31 +1.05V_LAN_M +1.05VM Install for DB1. 12/04 AO4430 1N SOIC-8 AO4430 1N SOIC-8 Install for DB1. 12/04
HF 1 8 HF 1 Reserve C405. 11/24 8 1
Change from
2 U30 Change to 330uF. 12/03 7 2 7 2
0.1U_0402_16V4Z
10U_0805_10V4Z
1 5 3 SI7326DN-T1-E3_PAK1212-8 6 3 6 3
C590
C591
R660 1 1 HF 1 Reserve C320. 11/24 5 5
C612
0.1U_0402_16V4Z
C613
10U_0805_10V4Z
C405
C595
0.1U_0402_16V4Z
C596
10U_0805_10V4Z
C646
330U_X_2VM_R6M
330U_X_2VM_R6M
330K_0402_5% C589 2 1 HF 1
C610
10U_0805_10V4Z
C611
0.1U_0402_16V4Z
C593
10U_0805_10V4Z
C594
0.1U_0402_16V4Z
1 5 3 1
1 1 1 1 1 1 1 1
2
4
2 10U_0805_10V4Z + +
2 2
C892
10U_0805_10V4Z
C893
0.1U_0402_16V4Z
C894
0.1U_0402_16V4Z
C895
10U_0805_10V4Z
C320
330U_X_2VM_R6M
1
RUNON 1 1 1 1
4
+ 2 2 2 2 2 2 2 2 2 2
1
1
RUNON RUNON
J2
SHORT PADS R663 R664 2 2 2 2 2
1 2
820K_0402_5% 470_0402_5%
D
2
2
SLP_S3 2 1
Add on 10/27.
G Q41 C597
S 2N7002_SOT23-3 0.01U_0402_16V7K R914 1 2 330K_0402_5% Q59 3 2N7002_SOT23-3
S
B+ 1
3
2 Q6 Add on 5/14.
1
D 2N7002_SOT23-3
G
2
ADP_PRES 2 Q43
21,31,38,44 ADP_PRES
D
G 2N7002_SOT23-3 3 1 2 1 PM_SLP_M
Chnage AC_PRESENT S R370 820K_0402_5%
3
to ADP_PRES. 5/14
G
2
ADP_PRES +5VALW to +5VS Transfer
+3VL +3VL +5VALW +5VS

SI7326DN-T1-E3_PAK1212-8
U32
HF 1
1
0.1U_0402_16V4Z
2 2 2
R667 R668 5 3
C599
100K_0402_5% 100K_0402_5% 1 1 1
C600
C598 10U_0805_10V4Z
2
4
10U_0805_10V4Z
SLP_S4 SLP_S3 2 2 2
11 SLP_S3
Modify on 10/28.
1
D D
2 2
15,42 SLP_S4#
Q44
G
S
15,30,31,34,38,40,41 SLP_S3#
Q45
G
S
+3VALW to +3VM Transfer +3VALW Q46 +3VM
RUNON
RUNON 11
3
2N7002_SOT23-3 2N7002_SOT23-3 AP2301GN 1P_SOT23
D
3 1
C603
0.1U_0402_16V4Z
1
C602
0.1U_0402_16V4Z
G
1 1
2
+3VL C604
1
R669 10U_0805_10V4Z
47K_0402_5%
1
2 2
2
2
R659
100K_0402_5% 1 2 LAN_EN#
R670 4.7K_0402_5%
2
PM_SLP_M
1
Q39 be remove. 7/22 D
15,42 PM_SLP_LAN# 2 Q47

1
D G 2N7002_SOT23-3
3 PM_SLP_M# 2 S 3
15,31,34 PM_SLP_M#
3
G
Q40 S
3
2N7002_SOT23-3
+1.05VS +3VS +1.5VS +5VS

Discharge circuit-2 for V-M
Discharge circuit-1 +1.05VM +3VM
1
1
R672 R673 R674 R675
470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% R677
R676 470_0402_5%
470_0402_5%
2
1 2
1 2
1
D D D D D D
SLP_S3 2 SLP_S3 2 SLP_S3 2 SLP_S3 2 PM_SLP_M 2 LAN_EN# 2
G Q48 G Q49 G Q50 G Q51 G Q52 G Q53
S 2N7002_SOT23-3 S 2N7002_SOT23-3 S 2N7002_SOT23-3 S 2N7002_SOT23-3 2N7002_SOT23-3 S 2N7002_SOT23-3 S
3
3
+1.5V +0.75VS +1.8VS
Change LAN_EN# to PM_SLP_M. 7/22
1
4 4
R679 Change to R680 R681
470_0402_5% 22_0402_5% 470_0402_5%
22ohm. 7/14
2
2
1
D D D
19,26,27 SLP_S4
SLP_S4 2
Q55
SLP_S3 2
Q56
SLP_S3 2
Q57
G G G
S 2N7002_SOT23-3 S 2N7002_SOT23-3 S 2N7002_SOT23-3
DC/DC Circuits
3
A B C D E
A B C D
ADP_SIGNAL
VIN
PJP1 PL1
1 1 SMB3025500YA_2P 1
1 ADPIN
2 2 1 2
3 3
3
4 4
100P_0402_50V8J
1000P_0402_50V7K
5 5
1
PC3
1
PC1
PC4
@ACES_88334-057N 100P_0402_50V8J PR1
@15K_0402_5%
PD1 PC2
2
@PJSOT24C_SOT23 1000P_0402_50V7K
2
VMB_A BATT_A
PJP2 PL2
1 SMB3025500YA_2P
1
2 2 1 2
3 3
4 4
1
5 5 2 1
6 PR2 1M_0402_1%
6 PC5 PC6
7
2
7 1000P_0402_50V7K 0.01U_0402_50V4Z
8 8
@SUYIN_200046MR008G102ZR 100P_0402_50V8J
100P_0402_50V8J
100_0402_5%
1
1
100_0402_5%
1K_0402_5%
2 2
1
1
PR6
PR3
PC7
PR5
PC8
PC9
100P_0402_50V8J
2
2
+3VL VL PR88
2
2
69.8K_0402_1%
1 2
1
PR4
100K_0402_5%
PR89 AB1A_DATA 31
PQ29 100K_0402_1%
2
E
MMBT3906_SOT23-3
31 THM_MAIN#
2
B
2 AB1A_CLK 31
1
D C
PD15 PD16 PD17
1
2 BAV99WT1G_SC70-3 BAV99WT1G_SC70-3 BAV99WT1G_SC70-3

G
1
S
3
PQ30
SSM3K7002FU_SC70-3 PR91 PR90 VL
220K_0402_5% 150K_0402_1% +3VL
2
PH1 under CPU botten side :

2
CPU thermal protection at 90 +-3 degree C

PR92
294K_0402_1%
(Need to be checked)
44 OCP_ADJ 1 2
3 3
VMB_B BATT_B 2VREF_51125

PCN1 PL3 VL
SMB3025500YA_2P
1 1 2 PR8
BATT+
470K_0402_1%
1
2 PR7 1 2 PR10
SMD
1
2
3 1K_0402_5% PH1
SMC 100K_0402_5%
4 1 2 Close to CPU 100K_0603_1%_TSM1A104F4361RZ EN0 39
B/I PC11 PC10
5
2
TS 1000P_0402_50V7K 0.01U_0402_50V4Z PR12
8
6 150K_0603_1%
1
GND
1
D
1 2 5
P
+
100P_0402_50V8J
@SUYIN_20163S-06G1-K 7 2 PQ1
O
1
100P_0402_50V8J
100_0402_5%
6 G SSM3K7002FU_SC70-3
-
2
G
100_0402_5%
PU15B S
3
1
PR16
PR14
PC28
PR15
PC12 LM393DR_SO8
4
37.4K_0402_1%
PC27
PR11 PC29 0.1U_0603_25V7K

2
1K_0402_5% 100P_0402_50V8J 1 2
2
2
2VREF_51125 PR13
1
+3VL
PJSOT24C_SOT23
PJSOT24C_SOT23
PD3 PD4 75K_0402_1%

1
1
2
PR17 PC13
PR9 150K_0402_1% 1000P_0402_50V7K
2
210K_0402_1%
2
AB1B_DATA 31
1
31 THM_TRAVEL# AB1B_CLK 31
4 4
PD19
1
BAV99WT1G_SC70-3
0.1
PD18
BAV99WT1G_SC70-3
PD20
BAV99WT1G_SC70-3 +3VL
2
DC-IN/ BATTERY CONN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4891
A B C D
A B C D
B++ PR37 51125_PWR

0_0402_5%
1 2 2 1 1 2
1
PR18 Vin PD12
1M_0402_5% PD22
2VREF_51125 2 1 1SS355_SOD323-2 PD8
VL +3VL
BATT GLZ27D_LL34-2
2
1SS355_SOD323-2
1
1
BATT_A
1
PR93 PD2
1
10K_0402_5% PR20 RB715F_SOT323-3 PR23

PC30 100K_0402_5% BATT_B 2 100_0805_5%
2
2
8
PR19 0.1U_0603_50V4Z 1 1 2
2
1
93.1K_0603_1% 5 3
1
P
+
7
2
O
6 -
G
PU10B
1
1
LM393DR_SO8
PR21 4 Vin_Debug PC15
20K_0402_1% 0.1U_0603_50V4Z
BAT_ALARM 31
2
2
PQ27
S
BATT_IN
D
31 LATCH 3 1
BSS84LT1G_SOT23-3
G
2
BATT
2 2
6
PR28
470K_0402_5% PQ7A
2
2N7002KDW-2N_SOT363-6
BATT_IN2
1
PR29
2 470K_0402_5%
1
PQ8
1
1
PMBT2222A_SOT23-3
3
PR30
10K_0402_5% PQ7B
3
2N7002KDW-2N_SOT363-6
1
44 CFET_A 1 2
6 2
CFET_A PR31
PD5 PD6 5 4.7K_0402_5%
PR32 1SS355_SOD323-2 SX34-40_SMA
10K_0402_5% 1 2
2
BATT_A_P
1 2 2
PQ10A
2N7002KDW-2N_SOT363-6
1
3
1
PQ10B 5 5
2N7002KDW-2N_SOT363-6 3 6 6 3 PR33
BATT_IN 5 2 7 7 2 470K_0402_5%
1 8 8 1
BATT BATT_A
2
PQ12 PQ13
AO4407A AO4407A
3
FET_A 31 3
PQ15 PQ14
AO4407A AO4407A BATT_B
1
1 8 8 1
PMBT2222A_SOT23-3
2 7 7 2 PR35
470K_0402_5%
3 6 6 3 470K_0402_5%
PR36 5 5
2
470K_0402_5%
2
BATT_B_P
4
4
PR39
2
1
PQ17
2
1
1 2
PR41
3
1
PD7 4.7K_0402_5%
FET_B 31 PR42 SX34-40_SMA
10K_0402_5% 1 2
2
PD9
6 2
6
1SS355_SOD323-2
PQ20A
PQ19A 2N7002KDW-2N_SOT363-6
2N7002KDW-2N_SOT363-6 2
1 2 2
PR44
1
10K_0402_5%
1
CFET_B
CFET_B
3
3
PQ20B
PQ19B 2N7002KDW-2N_SOT363-6
4 2N7002KDW-2N_SOT363-6 BATT_IN5 4
BATT_IN 5
4
4

Battery selector
A B C D
A B C D
B+
VIN P2 P4 P4
PQ101 PQ102 PQ103

SI4459_SO8 AO4407A PR102 PL101 AO4407A
1 8 8 1 0.01_2512_1% HCB2012KF-121T50_0805 1 8
2 7 7 2 1 4 1 2 CHG_B+ 2 7
3 6 6 3 3 6
5 5 2 3 5
4.7U_0805_25V6M
4.7U_0805_25V6M
4.7U_0805_25V6M
4
4
ACN
1
ACP
ACDET
+3VL
PC102
PC103
PC104
1 1 2 1 2 PR104 PC105 1
0.1U_0603_50V7K
PR103 1 2 1U_0603_6.3V6M
2
1
2
PC101 47K_0402_5% 56K_0402_1% 1 2
0.1U_0603_25V7K
1
1 2 PR105 PR106
PC108
PR101 15K_0402_5% 0_0402_5%
1
200K_0402_5% PC107 +3VL PC106
1 2
1
PR111 0.01U_0402_16V7K @0.1U_0603_25V7K
D CHGEN# P2
150K_0402_5%
2
G CHG_B+
2
1
S PQ104
3
44 ADP_EN# VL SSM3K7002FU_SC70-3 PR110
ACP
LPREF
ACSET
ACDET
LPMD
ACN
CHGEN
29 10_0805_5%
PR109 TP
PR138 1 2
1 2 0_0402_5%
5
6
7
8
100K_0402_5% 1 2 8 28 1 2
BATT P2 15,30,31,34,35,40,41 SLP_S3# IADSLP PVCC PC110
PC109
D
D
D
D
PR139 1U_0805_25V6K 0.1U_0402_10V7K
1 2 9 27 BST_CHG 1 2 1 2
PR135 1M_0402_5% AGND BTST PR121 PQ106
8
G
BQ24740VREF
S
S
S
100K_0402_1% PU101 0_0402_5% AO4466_SO8
1 2 3 1 2 10 BQ24740RHDR_QFN28_5X5 26 DH_CHG 1 2 BATT
P
4
3
2
1
+ PC111 VREF HIDRV PR145 PL102 PR112
O 1
1 2 2 1U_0603_6.3V6M +3VL 0_0402_5% 10U_LF919AS-100M-P3_4.5A_20% 0.01_1206_1%
-
G
PR136 PU10A 11 25 LX_CHG 1 2 1 2

VDAC PH
4.7U_0805_25V6M
23.7K_0402_1%
100K_0402_1% LM393DR_SO8
4
1
5
6
7
8
4.7U_0805_25V6M
PD102
4.7U_0805_25V6M
PR113 VADJ 12 24 REGN 2 1
VADJ REGN
PR140
2 PR141 2
453K_0402_1%
4.7U_0805_25V6M
4.7U_0805_25V6M
RLS4148_LL34-2 @4.7_1206_5%
PR137 13 23 DL_CHG
2
2
EXTPWR LODRV
1
24K_0603_1% 31 BAT_PWM_OUT 1 2 4
1 1
PC112
PC113
1 2 PR114
422K_0402_1% 1 14 22 PQ107
2
ISYNSET PGND
1
PC114
PR115 AO4468_SO8 PC126
DPMDET
1
PC128
PC116 1M_0402_1% PC118 @680P_0603_50V8J
IADAPT
1 2
SRSET
CELLS
3
2
1
2
1
1U_0603_6.3V6M 1U_0603_10V6K PC117
SRN
SRP
2
BAT
PC115
PR116 CELLS 31 0.1U_0402_10V7K
2
43.2K_0402_1%
2
2
15
16
17
18
19
20
21
PR117
100K_0402_5%
BATT
IADAPT
PR118
1
P2
1 2
+3VL 44 IADAPT
1
255K_0402_1%
PC119
AC Detector
1
100P_0402_50V8J
2
PR119
200K_0402_1% PR120
High 11.85
SRSET 44
22K_0402_5% Low 10.55
8
2
1
5 2 1 CHGCTRL 31
P
+ PR122
O 7
1
1
6 ADP_PRES 21,31,35,44 210K_0402_1% PC120 PC121
2
-
G
1
PU103B PR124 0.1U_0603_50V7K @0.1U_0603_25V7K
PR123
41.2K_0402_1% LM393DR_SO8 147K_0402_1%
4
3 PC122 3
2
1U_0603_6.3V6M
2
2VREF_51125 Charge Detector

+3VL
High 17.588 NOTE:PU104-2 , PC127-2, PR144-2 GND near PU101-9 AGND
100K_0402_5%
Low 17.292 +3VL
1
1 2
PR125 PR142
PR126
604K_0402_1% 11K_0402_5% PU104 +5VALW
IADAPT 1 2 1 +IN
3
P2 VL +3VL E
PQ108
1 2
1
VIN B
2 5
MMBT3906_SOT23-3 V+
2 V-
1
C
PC127
PR133
2
1
PR127 PR147 1U_0603_10V6K 4

@76.8K_0402_1%
220K_0402_5%
1 2 ACDET 3
OUT PMC 31
PR128 22K_0402_5% -IN
76.8K_0402_1% @ PC124 PR129
2
1
0.1U_0402_10V7K PD103 CHGEN# 47K_0402_5%
2
1
8
PR130 PR132 LMV321AS5X_SOT23-5

2
1K_0402_5% 1SS355_SOD323-2 D
3 300K_0402_5%
P
+ AC_ADP_PRES CHGCTRL 1 PQ109

O 1 2 2 1 2
1
2 G BSS138_SOT23-3
2
-
G
PU103A S 1 2
PR131
3
LM393DR_SO8
4
1
10K_0603_0.1% 31 AC_ADP_PRES PR143
PC123 PR144 39.2K_0402_1%
2
0.047U_0402_16V7K PR134 49.9K_0402_1%

2
2VREF_51125 Note: X7R type

4 470K_0402_5% 4
2
2
Charger
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4891 0.1
A B C D
A B C D E
2VREF_51125
1
PC302
1U_0603_16V7
2
1 1
PR301 PR302
13.7K_0402_1% 30.9K_0402_1%
+3VALWP 1 2 1 2 +5VALWP
PR303 PR304
B+ B++
20K_0402_1% 20K_0402_1%
B++
PL301 1 2 1 2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
@0.1U_0603_50V7K
@0.1U_0603_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
@2200P_0402_50V7K
@2200P_0402_50V7K
4.7U_0805_25V6-K
1 PR305 PR306
100K_0402_1% 113K_0402_1%
1
1
+ PC316 1 2 1 2
@100U_25V_M
PC317
PC301
PC303
PC318
PC304
PC305
PC306
2
2
2
8
7
6
5
5
6
7
8
1
PC307
ENTRIP2
VREF
TONSEL
ENTRIP1
VFB2
VFB1
2.2U_0805_10V6K 25
PQ301 P PAD
2
AO4466_SO8
4UG1_3V 7 VO2 VO1 24 4
PQ302
2 8 23 PR308 PC309 AO4466_SO8 2
VREG3 PGOOD 0_0402_5% 0.1U_0402_10V7K
PR307
PR309 1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2 PR310
1
2
3
3
2
1
0_0402_5% VBST2 VBST1 0_0402_5%
PC308 0_0402_5%
PL302 1 2 0.1U_0402_10V7K UG_3V 10 DRVH2 DRVH1 21 UG_5V 1 2 PL303
4.7UH_SIQB74B-4R7PF_4A_20% 4.7UH_PCMC063T-4R7MN_5.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP LL2 LL1
8
7
6
5
5
6
7
8
LG_3V 12 19 LG_5V
DRVL2 DRVL1
1
SKIPSEL
1
PR312
VREG5
VCLK
1 PR311 +3VL 4.7_1206_5%
GND
1
EN0
VIN
@4.7_1206_5%
+ 4 PQ303 4 +
2
PU301
2
13
14
15
16
17
18
1
PC310 PQ304 TPS51125RGER_QFN24_4X4 PC311
S TR AO4712L 1N SO8
1
150U_D_6.3VM 2 AO4468_SO8 +5VLP 2 150U_D_6.3VM
1
PR314
1
2
3
3
2
1
PC312 @100K_0402_5% PC313
2
@680P_0603_50V8J 680P_0603_50V8J
2
2
RPGOOD 15
51125_PWR
1
10U_0805_10V6K
PR315 2VREF_51125
PC315
@620K_0402_5%
2
ENTRIP1
ENTRIP2
PC314 PC322 +3VEXTLP

2
2
0.1U_0603_25V7K 10U_0805_10V6K
3 3
+5VLP
1
PU303
1
1
D D PJP301 PR322 PC320
1 VIN
PQ305 2 2 PQ306
1
220K_0402_5%
SSM3K7002FU_SC70-3 G G SSM3K7002FU_SC70-3 1 2 +5VALW (4.5A,180mils ,Via NO.= 9) PC319 5 64.9K_0402_1% 2.2U_0603_6.3V6K
+5VALWP
2
10U_0805_10V6K VOUT
S S 2 <BOM Structure>
3
2
GND
PR325
PAD-OPEN 4x4m
2
FB 4
PJP303
3
2
EN
1
PR316 1 2 +3VALW (3A,120mils ,Via NO.= 6)
100K_0402_5% +3VALWP DEBUG_KBCRST
1
1 2 P2 APL5317 PR323
VL PAD-OPEN 4x4m
20K_0402_1%
PR317 +5VLP PR326
2
1
330K_0402_5% 470K_0402_5%
1
2 1 PU302
KBC_PWR_ON 31
2
PR320 1 PR324
PJP302 255K_0402_1% +IN 16.5K_0402_1%
2
+3VLP 2 1 +VREG3_51125 5
2
PR318 V+
2 PR327
2
PAD-OPEN 2x2m V-
100K_0402_5%
1
1
PC321 4 1 2 2 1
PJP304 11.5K_0402_1% OUT PD305
3
1
-IN
PR321
2 1 1U_0603_16V6K 1SS355_SOD323-2
+5VLP VL
2
680K_0402_1%
PAD-OPEN 2x2m LMV321AS5X_SOT23-5
2
1
4 2 4
G PJP305
S 2 1 +3VEXTLP 2 1 +3VL
DEBUG_KBCRST 28
3
PQ307 PD304
SSM3K7002FU_SC70-3 1SS355_SOD323-2 PAD-OPEN 2x2m
2 1
PD301 VCC1_PWRGD 31,44
1SS355_SOD323-2 Security Classification Compal Secret Data Compal Electronics, Inc.
EN0 36 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3.3VALWP/5VALWP
A B C D E
A B C D
1 1
B+ PL401
HCB2012KF-121T50_0805
1 2 VCCP_B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
2200P_0402_50V7K
+3VS +VCCP
1
1
PC416
PC401 1 2
PC402
PC403
PC404
PR427 PR401 PR417
2
2
10K_0402_5% @10K_0402_5% 1 2 1 2 0_0603_5%
PR402
BST_VCCP
2.2_0603_5% PC405
DH_VCCP
2
LX_VCCP
0.22U_0603_16V7K
+5VALW
34 VCCP_POK
DH_VCCP1
1
5
6
7
8
PR403
0_0402_5% PR404 PQ401
17
16
15
14
13
PU401 2.2_0603_5% AO4474_SO8
1 2
PHASE
BOOT
UG
GND
PGOOD
+6269_VCC
2
4
1 VIN PVCC 12 1 2 PC406
+6269_VCC 2.2U_0603_6.3V6K
3
2
1
2 11 DL_VCCP PL402
VCC LG 0.47UH_FDV0630-R47M-P3_18A_20%
1
PC407 PR405 1 2
2
2.2U_0603_6.3V6K
+1.05V_VCCP 2
0_0402_5%
1 2 3 10
2
FCCM PGND
330U_X_2VM_R6M
330U_X_2VM_R6M
1 1 1
1
PR418
330U_X_2VM_R6M
4.7_1206_5% PR408
PC408
PC410
+ + +
4.7_1206_5%
PC409
1 2 4 9 SE_VCCP 1 2
15,30,31,34,35,38,41 SLP_S3# EN ISEN PR407
PR406
2
COMP
7.87K_0402_1% 2 2 2
FSET
@0_0402_5%
2
VO
FB
4
2
1
2
1 2 ISL6269ACRZ-T_QFN16
11,21,34 VCCP_EN
5
8
PC417
PR428
1
PC411 1000P_0603_50V7K PC412
0_0402_5%
2
3
2
1
1
@0.1U_0402_25V4K +1.05V_VCCP 1000P_0603_50V7K
FB_VCCP
PQ402
90.9K_0402_1%
0.01U_0402_16V7K
AON6718L
1
1
PR409
49.9K_0402_1%
PR410
PC413
2
1
6800P_0603_50V7K
2
PC414
22P_0402_50V8J PJP401
2
+1.05V_VCCP 1 2 +VCCP (18A,720mils ,Via NO.= 36)

PC415
PAD-OPEN 4x4m
2
3
PJP402 3
1 2 1 2 1 2+1.05V_VCCP 1 2
7 H_VTTVID1 PR416 PR411 PR413
35.7K_0402_1% 1.58K_0402_1% 10_0402_5% PAD-OPEN 4x4m
1
H_VTTVID1= Low, 1.1V PR412 1 2

1.96K_0402_1% PR414 VTT_SENSE 7
H_VTTVID1= High, 1.05V 0_0402_5%
2
PC418
@0.1U_0402_10V7K
1
1 2
PR415 VSS_SENSE_VTT 7
0_0402_5%
4 4

1.05V_VCCP
A B C D
A B C D
1 1
+1.5V
PU601
1 VIN VCNTL 6 +5VALW
10U_0805_6.3V6M
@10U_0805_10V4Z
2 GND NC 5
1
3 VREF NC 7
1
PC601
PC602
+5VALW PR601
4 8 PC603
2
1K_0402_1% VOUT NC 1U_0603_10V6K
2
9
2
TP
1
PR604 PR602 G2992F1U_SO8
10K_0402_5%
6
10K_0402_5%
1 2
35,38,40 SLP_S3#
0.1U_0402_10V7K
PQ601A
+0.75VSP
1
2N7002KDW-2N_SOT363-6
PD601
2 PR603
3
1 2 1K_0402_1%
1
PQ601B
1
2N7002KDW-2N_SOT363-6 PC607
2
1SS355_SOD323-2
PC604
5 10U_0805_6.3V6M
2
1
4
PC606 PC605
2
0.1U_0402_16V7K 10U_0805_6.3V6M
2
PJP601 2
+0.75VSP 1 2 +0.75VS (2A,80mils ,Via NO.= 4)

PAD-OPEN 3x3m
+5VALW
1
PC618 +3VS
1U_0603_6.3V6M
2
6
PU602
1
5
VCNTL
VIN PC615
34 1.8VS_POK 7 POK
4 10U_0805_10V6K
2
VOUT
3
VOUT
+1.8VSP
1 2 8 EN FB 2
1
PR609
GND
1
0_0402_5% 9 PC616
TP 22U_0805_6.3V6M
2
1
PC617
2
1
@0.01U_0402_16V7K
PR611
15K_0402_1% PC614
2
3 150P_0402_50V8J 3
2
APL5930KAI-TRG SOP 8P
PR610 1
12K_0402_1%
2
PJP602
+1.8VSP 1 2 +1.8VS (1.5A,60mils ,Via NO.= 3)

PAD-OPEN 3x3m
4 4

0.75VSP/PCIE/1.8VSP
A B C D
A B C D
PR516 PL501
2 1 1.05VS_B+
HCB1608KF-121T30_0603
0_0402_5% PC519 1 2 B+
15,35 PM_SLP_LAN#
@0.1U_0402_25V6
@1000P_0402_50V7K
@1000P_0402_50V7K
4.7U_0805_25V6M
4.7U_0805_25V6M
2
1
PC504
PC505
PC506
PC507
1 1
PR511 PC511
2
5
0_0402_5% 0.1U_0402_10V7K PQ502
BST_1.05V 1 2 1 2
SIS412DN
15
14
1
PU501 4
PR716 PR509
EN_PSV
TP
VBST
255K_0402_1% 0_0402_5% +1.05VMP_LAN
1 2 2 13 UG_1.05V 1 2 UG1_1.05V PL503
TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
3
2
1
+1.05VMP_LAN 1 2 3 12 LX_1.05V 1 2
PR519 0_0402_5% VOUT LL
+5VALW 1 PR517 15.4K_0402_1%
+5VALW 2 4 V5FILT TRIP 11 1 2
5
6
7
8
1
PR518 +1.05VMP_LAN PR503
1 2 5 10 +5VALW
316_0402_1% VFB V5DRV PR513
4.22K_0402_1% 1
1
1
4.7_1206_5%
330U_V_2.5VM_R6M
6 9 LG_1.05V 1
<BOM Structure> PGOOD DRVL
1
PGND
PC520 PC521 +
GND
PC518
1U_0603_10V6K 1 2 4.7U_0805_10V6K 4 +
2
2
PC526 PC514 PC515
PQ504
2
1
@10P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 4.7U_0805_6.3V6K 2 @330U_4V_M
8
1
PC517 2
PR504 S TR AO4712L 1N SO8 680P_0603_50V8J
3
2
1
2
10K_0402_1%
2
2 2
1.05VM_LAN_POK 34
PJP501
+1.05V_LAN_M
+1.05VMP_LAN 1 2 (8A,320mils ,Via NO.= 16)
PAD-OPEN 4x4m
PR521 PL504
2 1 1.5V_B+
15,35 SLP_S4# HCB1608KF-121T30_0603
0_0402_5% PC524 1 2 B+
1
@0.1U_0402_25V6
@1000P_0402_50V7K
@1000P_0402_50V7K
4.7U_0805_25V6M
4.7U_0805_25V6M
4.7U_0805_25V6M
2
1
PC527
PC501
PC502
PC508
PC509
5
6
7
8
PR510 PC510
2
0_0402_5% 0.1U_0402_10V7K
BST_1.5V 1 2 1 2
15
14
4
1
3 PU502 3
PR715 PR508
EN_PSV
TP
VBST
255K_0402_1% 0_0402_5% PQ501 +1.5VP

1 2 2 13 UG_1.5V 1 2 UG1_1.5V AO4466_SO8 PL502
3
2
1
TON DRVH 1UH_PCMC063T-1R0MN_11A_20%
<BOM Structure>
+1.5VP 1 2 3 12 LX_1.5V 1 2
PR520 0_0402_5% VOUT LL
+5VALW 1 PR515 8.25K_0402_1%
+5VALW 2 4 V5FILT TRIP 11 1 2
5
6
7
8
1
PR522 PR501
+1.5VP 1 2 5 10 +5VALW PQ503
316_0402_1% VFB V5DRV PR512
10.2K_0603_0.1% 1
1
6 9 LG_1.5V @4.7_1206_5%
PGOOD DRVL
1
PGND
PC522 PC523 +
GND
2
1U_0603_10V6K 1 2 4.7U_0805_10V6K 4 PC513
2
PC525 4.7U_0805_6.3V6K PC512
2
1
@10P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 2 330U_V_2.5VM_R6M
7
8
1
PC516
PR502 @680P_0603_50V8J
3
2
1
2
10K_0603_0.1% S TR STS14N3LLH5 1N SO8
2
1.5V_POK 34
PJP502
+1.5VP 1 2 +1.5V (8A,320mils ,Via NO.= 16)

4 4
PAD-OPEN 4x4m

1.5VP/1.05VSP
A B C D
8 7 6 5 4 3 2 1
+VCCP
H _VID0 2 1 PR266 @1K_0402_5% H _VID0 2 1 PR280 1K_0402_5%
H _VID1 2 1 PR267 @1K_0402_5% H _VID1 2 1 PR281 1K_0402_5%

CPU_B+ PL201
H _VID2 2 1 PR268 1K_0402_5% H _VID2 2 1 PR282 @1K_0402_5% SMB3025500YA_2P
H 2 1 B+ H
H _VID3 2 1 PR269 1K_0402_5% H _VID3 2 1 PR275 @1K_0402_5%
100U_25V_M
@100U_25V_M
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
H _VID4 2 1 PR270 @1K_0402_5% H _VID4 2 1 PR276 1K_0402_5%
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1 1
PC205
PC206
7 H_VID0 H _VID0 H _VID5 2 1 PR271 1K_0402_5% H _VID5 2 1 PR277 @1K_0402_5%
1
PC201
PC203
PC204
+ +
1
PC202
PC207
PC208
7 H_VID1 H _VID1 H _VID6 2 1 PR272 @1K_0402_5% H _VID6 2 1 PR278 1K_0402_5%
2
H _VID2 PROC_DPRSLPVR 2 PROC_DPRSLPVR 2 2 2
7 H_VID2 1 PR273 1K_0402_5% 1 PR279 @1K_0402_5%
2
5
6
7
8
7 H_VID3 H _VID3 PR221 @1K_0402_5% PSI#1 2 1 PR283 1K_0402_5% PQ201
PSI#1 2 1 AO4474_SO8
7 H_VID4 H _VID4
7 H_VID5 H _VID5 PR208 PC209 UGATE1_CPU24

2.2_0603_5% 0.22U_0603_10V7K
7 H_VID6 H _VID6 BOOST_CPU2 2 1 1 2 PR249
0_0603_5%
G
31 PM_PWROK 1 2 PR209 0_0402_5% UGATE_CPU2 2 1 PL202 G
3
2
1
0.36UH_PCMC104T-R36MN1R17_30A_20%
7 PROC_DPRSLPVR PROC_DPRSLPVR 1 2 PR210 0_0402_5% PHASE_CPU2 1 4 +CPU_CORE
F L1 2 3 V 2N
5
12 CLK_EN#
3.65K_0603_1%
10K_0402_1%
1
1
+3VALW
2.2_1206_5%
PQ202
1
PR211
PR215 TPCA8036
PR213
PR214
47K_0402_5% PR216
1 2 CLK_EN# 1_0402_5%
LGATE_CPU2 4
2
VSUM-
680P_0603_50V7K
1
PR219
3
2
1
PC210
0_0402_5%
1 2
2
15 VGATE ISEN2
VSUM+
F F
0_0402_5%
PSI#1 2 PR222 PSI#1 CPU_B+
7 PSI#
1 2
2200P_0402_50V7K
0.1U_0402_25V6
PR223 147K_0402_1%
5
6
7
8
+5VALW
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC211
1U_0603_10V6K PQ203
40
39
38
37
36
35
34
33
32
31
+VCCP 1 2
1
PC212
PR224 PU201 1 2 AO4474_SO8
1U_0603_10V6K
PC213
PC214
PC215
PC216
PC217
68_0402_5%
CLK_EN#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON
1 2 PR226
2
1
4 H_PROCHOT#
PC218
PR225 30 2.2_0603_5% PC219 UGATE1_CPU34
0_0402_5% BOOT2 PU202 0.22U_0603_10V7K
UGATE2 29
1 28 5 1 BOOST_CPU3
1 2 1 2 PR264
2
PC220 @56P_0402_50V8 PGOOD PHASE2 VCC BOOT 0_0603_5%
2 PSI# VSSP2 27
1 2 3 26 6 8 UGATE_CPU3 1 2
3
2
1
RBIAS LGATE2 FCCM UGATE
E 4 VR_TT# VCCP 25 +5VALW E
PR227 @4.02K_0402_1% 5 24 2 7 PHASE_CPU3 PL203
NTC PWM3 PWM PHASE 0.36UH_PCMC104T-R36MN1R17_30A_20%
1 2 1 2 6 VW LGATE1 23
PH202 7 22 3 4 LGATE_CPU3 1 4 +CPU_CORE
@470K_0402_5%_TSM0B474J4702RE COMP VSSP1 GND LGATE
8 FB PHASE1 21
1 2 9 PR228 ISL6208CRZ-T_QFN8 F L2 2 3 V 3N
ISEN3
1
UGATE1
2.2_1206_5%
10K_0402_1%
10 @0_0402_5%
BOOT1
ISUM+
ISEN2
1
ISEN1
ISUM-
@249K_0402_1%
8.06K_0402_1%
3.65K_0603_1%
1000P_0402_50V7K
PR229
VSEN
IMON
PC221 1 2 PQ204
VDD
RTN
VIN
PR231
PR232
@22P_0402_50V8J 41 TPCA8036 PR233
AGND
1
PC222
1_0402_5%
1
PR234
PR235
ISL62883HRZ-T_QFN40_5X5
11
12
13
14
15
16
17
18
19
20
2
4
2
2
390P_0402_50V7K PC223
2
1 2 1 2 1U_0603_10V6K VSUM-
2
680P_0603_50V7K
PR236
562_0402_1% PC224
3
2
1
1
PR239 0_0402_5%
PC226
1 2 1 2 1 2
PC225 ISEN3
2
D 33P_0402_50V8J PR238 PR242 0_0402_5% IMVP_IMON 7 VSUM+ D
2.37K_0402_1% 1 2 CPU_B+ PR240 @0_0402_5%
1 2 1 2 1 2 +VCCP
PC227 PR241
150P_0402_50V8J 324K_0402_1% PR244 1_0402_5%
CPU_B+
0.22U_0603_25V7K
1 2 +5VALW
ISEN3
1
1
PC228
1U_0603_10V6K
PC229
0.22U_0603_25V7K
PC230
ISEN2
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
PR246
2
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
ISEN1 6.81K_0402_1%
5
6
7
8
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2
PQ205
1
PC231
VSSSENSE AO4474_SO8
BOOST_CPU1
PC232
PC233
PC234
PC238
PC239
PR274
1
1
PC235
PC236
PC237
0_0603_5%
2
UGATE_CPU1 2 1 UGATE1_CPU1 4
2
C PR248 PC240 C
2.2_0603_5% 0.22U_0603_10V7K
3
2
1
VSUM+ 2 1 1 2
PL204
82.5_0402_1%
0.36UH_PCMC104T-R36MN1R17_30A_20%
PHASE_CPU1 1 4 +CPU_CORE
1
2.61K_0402_1%
0.068U_0603_16V7K
1
2.2_1206_5%
0.33U_0603_10V7K
PR252
F L3 2 3 V 1N
1
PR250
3.65K_0603_1%
10K_0402_1%
0.022U_0402_25V7K
PR253
1
1
0.01U_0402_25V7K
PC241
PR255
7 VCCSENSE 1 2 PQ206
PR256
TPCA8036 PR257
2
PR251 0_0402_5% 1_0402_5%

2
PC242 2
PC243 2
2
1
2
1
PC244 LGATE_CPU1 4
2
PC245
330P_0402_50V7K
2
680P_0603_50V7K
VSUM-
2
1
PC246
3
2
1
B B
330P_0402_50V7K
2
1
1
11K_0402_1%
PR260
1
PC248
PR262
PC247 768_0402_1% PH201

1000P_0402_50V7K 1 2 ISEN1
PR263 0_0402_5% 10KB_0603_5%_ERTJ1VR103J VSUM+
2
7 VSSSENSE 1 2
2
Iccmax= 48A
I_TDC=TDB
VSUM- OCP=TDBA, Intel spec=TDBA
0.1U_0402_16V7K
1
PC250
2
A A
CPU_CORE
8 7 6 5 4 3 2 1
5 4 3 2 1
BQ24740VREF
1
PR50
165K_0402_1%
PC21
2
0.22U_0603_10V7K
1 2
PU12 +5VS
0.01U_0402_16V7K
38 IADAPT 1 2 1 +IN
D PR51 D
10K_0402_1% 5
V+
37 CFET_A 1 2 2 V-
PC31
PR95
150K_0402_5% 4
OUT
3
2
-IN
2
G
PQ33
1
BSS138_SOT23-3
LMV321AS5X_SOT23-5 +3VS
1 3 3 1
1
PR52
D
D
S
1
D PQ32 2K_0402_5%
2
2 BSS138_SOT23-3 PR49
5,38 ADP_PRES
2
G OCP_ADJ 36 105K_0402_1%
S PQ34 PR55
3
2
SSM3K7002FU_SC70-3 10K_0402_5%
1
PD11
1SS355_SOD323-2 1 2 OCP# 16
PD21 PR57
1
ADP_SIGNAL 1SS355_SOD323-2 0_0402_5%
1
D
D
1 2 3 1 2 1
3.9K_0402_5%
PR58 PQ24 1 2 2
31 OCP
1
100_0402_5% NDS0610_NL_SOT23-3 1 PR63 G
PR59
3900P_0402_50V7K
@0_0402_5%
G
S
3
PQ25
SSM3K7002FU_SC70-3
2
PC23
2
C C
SRSET 38
1
C
2
1 2 2 PQ26
PR60 B MMBT3904W_SOT323-3
100K_0402_5% E PR56 PR62 +3VS
3
VIN 27.4K_0402_1% 200K_0402_1%
1 2
2
1 2OCP_A_IN OCP_A_IN 31
1
PR100
1
PR70 100_0402_5% PR61 PU1 PR64
PD24 +5VS 10K_0402_5%
68K_0402_5% 1 2 1 IN+
100K_0402_1% 5
1
GLZ4.7B_LL34-2 VCC+
2
2
GND
1
4
2
PC32 OUT
3 IN-
1
2
PR80 PR45 0.01U_0402_16V7K LMV331IDCKRG4_SC70-5
D
33K_0402_5% 1 2 1 3
+3VS
ADP_EN# 38
1
13K_0402_1% PQ36
2
1 2
G
PR43
2
8.06K_0402_1% SSM3K7002FU_SC70-3 PR66
2
100K_0402_1%
4.7K_0402_5%
2
1
PR65
PR81
100K_0402_1%
6
+3VL
1
1
PQ28A
3
B B
8.66K_0402_1%
E
2N7002KDW-2N_SOT363-6
2
PR1001
B
2 31 ADP_ID_CHK 2 VCC1_PWRGD 31,39
C
PQ35
2
MMBT3906_SOT23-3 1
2 1 ADP_A_ID
PD23
1
1SS355_SOD323-2
PR1002
3
45.3K_0402_1%
2
PQ28B 5 ADP_EN 31
2N7002KDW-2N_SOT363-6
4
2VREF_51125
1 2
PR1005
1M_0402_5% +3VL
1
VL
PR1003
130K_0402_1% PR1006
22K_0402_5%
8
2
3
P
+
A O 1 ADP_DET# 31 A
1
2 -
G
PR1004 PU15A
10K_0402_1%
4
LM393DR_SO8
2
1 2ADP_A_ID ADP_A_ID 31
PR1007
10K_0402_5%
ADP_OCP
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Power section Page 1 of 1
Item Reason for change PG# Modify List Date Phase
D D
3
4
C C
B B
A A

Changed-List History
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) for HW Circuit

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
D 1 21 MXM PEG Bus 01/19 Compal Can't detect GPU of MXM board Need reverse TX & RX bus of PEG. 0 .2 D
2 21 MXM LVDS Bus 01/19 Compal No display of LVDS panel Need reverse LVDS low&high bit BUS. 0 .2
3 13 RTC 01/19 Compal RTC no function Reverse signals of RTC connector. 0 .2
4 29 JVGAFFC1 01/20 Compal JVGAFFC1 pin23&24 was dummy, USB cacn't work Connect JVGAFFC1 pin23&24 to SLP_S4. 0 .2
5 20 DISP_OFF# 02/02 Compal Use wrong power rail for this signal. Currently panel spec is +3VS. 0 .2
6 20 Left USB port 02/02 Compal It's wrong port for debug Change connection from port0 to port1 for debug. 0 .2
7 21 PWR_LEVEL 02/04 Compal Need isolation circit per HP request. Add Q69, Q70, R397, R388, R118. 0 .2
8 4 CPU FAN CONN 02/06 Compal No GND pin of FAN connector. Change Connector to 4 pin with GND pin. 0 .2
9 4,13,24 SM BUS 02/06 HP HP request to remove SM bus to XDP, JTAG & WLAN. Leave TP and remove signals. 0 .2
10 2 2 Intel LAN 02/06 HP Intel change design to remove some caps. Remove these caps as Intel CRB design. 0 .2
11 1 1 DDR M2 support 02/08 Compal Data & CLK signals are reverse of U36. Reverse CLK & DATA. 0 .2
C
12 3 0 LED CTL circuit 02/06 HP HP request to update LED control circuit. No install R734 & R735. 0 .2 C
13 1 5 Duplicate 02/06 HP Remove R247 because of R541existing. Remove R247. 0 .2

14 1 3 PCH_JTAG_RST# 02/06 HP Change R720 to NO INSTALL. No install R720. 0 .2
15 1 3 GPIO 02/06 HP Change GPIO43_R to USB_OC#4 & reserve 33 ohm serial. Add R134 but no install. 0 .2
16 1 3 LED control 02/06 HP Remove GND & change connection of R176. Change R176 to 1K with install it. 0 .2
17 1 4 CLKREQ_EXP# 02/06 HP Change R687 PU for CLKREQ_EXP# to INSTALL. Install R687. 0 .2
18 1 7 PCH Power Rail 02/06 HP Some power rail of PCH are no use. Remove these power and add TP. 0 .2
19 3 2 Card Reader 02/06 HP It will need find tune value of R731 & C661. Change R731 to 100K & C661 to 1uF X5R as Cartier first. 0 .2
20 9 Debug port 02/10 HP HP request to add debug port for iAMT. Add JiAMT1. 0 .2
21 1 6 WWAN CONN 02/10 HP WOW# to WWAN connector is no longer supported. Remove R117 and signal. 0 .2
B
22 1 3 SATA port 02/10 HP Change SATA assignments to support PM. Port 4 --> 5, Port2 --> 4, Port3 -->2. 0 .2
B
23 3 1 KBC1091 02/10 HP Remove ADP_DET# on U23 GPIO9. Add R320 PD on GPIO9. 0 .2

24 2 4 WLAN 02/10 HP Remove R441 and connection to JWLAN1.5 Remove R441. 0 .2
25 2 4 USB port6 02/10 HP Remove USB signals to JWLAN1.36 and 38. Remove them. 0 .2
26 2 0 WLAN 02/10 HP Add 680P on DISP_OFF# close JLCD1 and change C359. Change C359 to 0.1uF and add C439. 0 .2
27 2 2 Intel 82578 02/10 HP Can remove Q17, R405 & R124 if no leakage. Reserve Q17, R405 and R124 in DB2. 0 .2
28 4, 16 Intel Change 02/10 HP 414044 DG update 1.11 Change R31/R32 to 1.5K/750ohm and R297 to 100K. 0 .2
29 3 1 System ID control 02/17 HP Common Design with other project. Del D49, R149 and Q154 and Add U44. 0 .2
30 2 0 Webcam 02/17 HP WEBCAM_OFF is active high, so need change design. Add R287 to turn on Gate. 0 .2
31 1 5 PWR_GD 02/17 HP HP request to change design. Add R399 and install R237. 0 .2
32 1 5 NAND Flash 02/17 HP HP request to change design. Add NAND_DETECT# form U4.Y7 to JNAND1.17. 0 .2
A 33 4 XDP PU 02/17 HP HP request to change design. Del R37, R38, R39. 0 .2 A
34 2 2 LAN Power 02/17 HP Remove power switch from 3V to 1V and related parts. Remove C382, C383, C384, C385, C694, R401, R366, Q21 and R402. 0 .2
35 2 9 Docking 02/17 HP HP agree to remove caps for DP from MB to DOCKING.Remove C496 ~ C511 from MB. 0 .2
36 3 3 Super I/O 02/17 Compal Common design change to SMSC.Security Classification
Issued Date 2006/02/28
Compal Secret Data
2007/02/28
Compal Electronics, Inc.
Deciphered Date Title
HW Changed-List History-(0.1 to 0.2)
5 4 3 2 1
5 4 3 2 1

Request
D 1 2 5 ESD DIODE 04/23 Compal Wrong connection of D53 & D54, system can't boot. Swap +5VS & GND of D53 & D54 pin 2 & 5. 0 .3 D
2 2 9 SATA Port 5 04/23 Compal It have wrong connection of JDOCK1 pin108 & pin109. Swap SATA_PTX_C_DRX_P5/N5 of connector side. 0 .3
3 2 8 SPI_CS0# 04/23 HP HP request to add pull up resistor close to SPI ROM. Reserve R6 close to U19. 0 .3
4 1 4 SM BUS 04/23 HP Intel request to change PU to 2.2K. Change R199, R200 from 4.7K to 2.2K 0 .3
5 2 3 LAN Transfermer 04/23 HP Intel request to add 1uF cap between TRM caps to GND. Add C264 to GND. 0 .3
6 1 3 JTAG Port 04/24 HP HP review need swap JTAG1 pin4 & pin6. Swap XDP_FN16 & XDP_FN17 at JTAG1 side. 0 .3
7 1 7 PCH +1.05VS 04/25 HP HP review will no need connect resistor between them. Remove R310. 0 .3
8 1 4 PCH 25MHz Crystall 04/25 HP No need 25MHz for PCH as common design. No install R229, C281, C282, Y4 but add R52. 0 .3
9 3 1 KBC1098 VCC0 04/25 HP The VCC0 will never connect to GND. Remove R587 from schematic. 0 .3
10 1 6 LAN_DIS# 04/25 HP GPIO12 of PCH have internal PU. No install R279 and reserve R53 PD. 0 .3
11 2 1 DPA AUX 04/25 HP Need 0.1uF cap for Q20, Q67 gate pin. Add C265. 0 .3
C
12 3 0 WWAN_DET# 04/25 HP Design Change PCH GPIO22 to WWAN_DET#. Change GPIO of PCH to WWAN_DET#. 0 .3 C
13 1 6 Webcam control 04/25 HP Chnage the control pin from GPIO47 to GPIO22 of PCH.Modify WEBCAM_OFF to WEBCAM_ON, add R66 PU for GPIO47. 0 .3
14 2 0 Webcam control 04/25 HP Chnage the control pin from GPIO47 to GPIO22 of PCH. Del R350. 0 .3
15 1 3 DOCK LED 04/25 HP Need inverter for docking power LED signal. Add Q71 & R67. 0 .3
16 3 3 SER_SHD 04/25 HP HP request to remove SER_SHD from SIO to docking. Disconnect SER_SHD at docking side, add R7 PU to +3VS. 0 .3
17 9, 10 DDR3 M1 & M3 04/30 HP Need implement M1, M3 but reserve M2 for SI1. Remove R91, R682~R684 and add divider for V_DDR_CPU_REF0/1. 0 .3
18 1 7 PCH Power Rail HP Some power rail of PCH are no use. Remove these power and add TP. 0 .3
19 3 2 Card Reader HP It will need find tune value of R731 & C661. Change R731 to 100K & C661 to 1uF X5R as Cartier first. 0 .3
20 9 Debug port HP HP request to add debug port for iAMT. Add JiAMT1. 0 .3
21 1 6 WWAN CONN HP WOW# to WWAN connector is no longer supported. Remove R117 and signal. 0 .3
22 1 3 SATA port HP Change SATA assignments to support PM. Port 4 --> 5, Port2 --> 4, Port3 -->2. 0 .3
B B
23 3 1 KBC1091 HP Remove ADP_DET# on U23 GPIO9. Add R320 PD on GPIO9. 0 .3

24 2 4 WLAN HP Remove R441 and connection to JWLAN1.5 Remove R441. 0 .3
25 2 4 USB port6 HP Remove USB signals to JWLAN1.36 and 38. Remove them. 0 .3
26 2 0 WLAN HP Add 680P on DISP_OFF# close JLCD1 and change C359. Change C359 to 0.1uF and add C439. 0 .3
27 2 2 Intel 82578 HP Can remove Q17, R405 & R124 if no leakage. Reserve Q17, R405 and R124 in DB2. 0 .3
28 4, 16 Intel Change HP 414044 DG update 1.11 Change R31/R32 to 1.5K/750ohm and R297 to 100K. 0 .3
29 3 1 System ID control HP Common Design with other project. Del D49, R149 and Q154 and Add U44. 0 .3
30 2 0 Webcam HP WEBCAM_OFF is active high, so need change design. Add R287 to turn on Gate. 0 .3
31 1 5 PWR_GD HP HP request to change design. Add R399 and install R237. 0 .3
32 1 5 NAND Flash HP HP request to change design. Add NAND_DETECT# form U4.Y7 to JNAND1.17. 0 .3
A 33 4 XDP PU HP HP request to change design. Del R37, R38, R39. 0 .3 A
34 2 2 LAN Power HP Remove power switch from 3V to 1V and related parts. Remove C382, C383, C384, C385, C694, R401, R366, Q21 and R402.
35 2 9 Docking HP HP agree to remove caps for DP from MB to DOCKING.Remove C496 ~ C511 from MB.
36 3 3 Super I/O Compal Common design change to SMSC.Security Classification
Compal Secret Data
2007/02/28
Compal Electronics, Inc. Title
Deciphered Date
5 4 3 2 1
5 4 3 2 1

Request
D 1 4 FAN CTRL Circuit 07/2 HP FAN always 100% turn after power on Del D29 & NI R133 to prevent this issue. 0 .4 D
2 2 9 SATA Port 5 04/23 Compal It have wrong connection of JDOCK1 pin108 & pin109. Swap SATA_PTX_C_DRX_P5/N5 of connector side. 0 .3
3 2 8 SPI_CS0# 04/23 HP HP request to add pull up resistor close to SPI ROM. Reserve R6 close to U19. 0 .3
4 1 4 SM BUS 04/23 HP Intel request to change PU to 2.2K. Change R199, R200 from 4.7K to 2.2K 0 .3
5 2 3 LAN Transfermer 04/23 HP Intel request to add 1uF cap between TRM caps to GND. Add C264 to GND. 0 .3
6 1 3 JTAG Port 04/24 HP HP review need swap JTAG1 pin4 & pin6. Swap XDP_FN16 & XDP_FN17 at JTAG1 side. 0 .3
7 1 7 PCH +1.05VS 04/25 HP HP review will no need connect resistor between them. Remove R310. 0 .3
8 1 4 PCH 25MHz Crystall 04/25 HP No need 25MHz for PCH as common design. No install R229, C281, C282, Y4 but add R52. 0 .3
9 3 1 KBC1098 VCC0 04/25 HP The VCC0 will never connect to GND. Remove R587 from schematic. 0 .3
10 1 6 LAN_DIS# 04/25 HP GPIO12 of PCH have internal PU. No install R279 and reserve R53 PD. 0 .3
11 2 1 DPA AUX 04/25 HP Need 0.1uF cap for Q20, Q67 gate pin. Add C265. 0 .3
C
12 3 0 WWAN_DET# 04/25 HP Design Change PCH GPIO22 to WWAN_DET#. Change GPIO of PCH to WWAN_DET#. 0 .3 C
13 1 6 Webcam control 04/25 HP Chnage the control pin from GPIO47 to GPIO22 of PCH.Modify WEBCAM_OFF to WEBCAM_ON, add R66 PU for GPIO47. 0 .3
14 2 0 Webcam control 04/25 HP Chnage the control pin from GPIO47 to GPIO22 of PCH. Del R350. 0 .3
15 1 3 DOCK LED 04/25 HP Need inverter for docking power LED signal. Add Q71 & R67. 0 .3
16 3 3 SER_SHD 04/25 HP HP request to remove SER_SHD from SIO to docking. Disconnect SER_SHD at docking side, add R7 PU to +3VS. 0 .3
17 9, 10 DDR3 M1 & M3 04/30 HP Need implement M1, M3 but reserve M2 for SI1. Remove R91, R682~R684 and add divider for V_DDR_CPU_REF0/1. 0 .3
18 1 7 PCH Power Rail HP Some power rail of PCH are no use. Remove these power and add TP. 0 .3
19 3 2 Card Reader HP It will need find tune value of R731 & C661. Change R731 to 100K & C661 to 1uF X5R as Cartier first. 0 .3
20 9 Debug port HP HP request to add debug port for iAMT. Add JiAMT1. 0 .3
21 1 6 WWAN CONN HP WOW# to WWAN connector is no longer supported. Remove R117 and signal. 0 .3
22 1 3 SATA port HP Change SATA assignments to support PM. Port 4 --> 5, Port2 --> 4, Port3 -->2. 0 .3
B B
23 3 1 KBC1091 HP Remove ADP_DET# on U23 GPIO9. Add R320 PD on GPIO9. 0 .3

24 2 4 WLAN HP Remove R441 and connection to JWLAN1.5 Remove R441. 0 .3
25 2 4 USB port6 HP Remove USB signals to JWLAN1.36 and 38. Remove them. 0 .3
26 2 0 WLAN HP Add 680P on DISP_OFF# close JLCD1 and change C359. Change C359 to 0.1uF and add C439. 0 .3
27 2 2 Intel 82578 HP Can remove Q17, R405 & R124 if no leakage. Reserve Q17, R405 and R124 in DB2. 0 .3
28 4, 16 Intel Change HP 414044 DG update 1.11 Change R31/R32 to 1.5K/750ohm and R297 to 100K. 0 .3
29 3 1 System ID control HP Common Design with other project. Del D49, R149 and Q154 and Add U44. 0 .3
30 2 0 Webcam HP WEBCAM_OFF is active high, so need change design. Add R287 to turn on Gate. 0 .3
31 1 5 PWR_GD HP HP request to change design. Add R399 and install R237. 0 .3
32 1 5 NAND Flash HP HP request to change design. Add NAND_DETECT# form U4.Y7 to JNAND1.17. 0 .3
A 33 4 XDP PU HP HP request to change design. Del R37, R38, R39. 0 .3 A
34 2 2 LAN Power HP Remove power switch from 3V to 1V and related parts. Remove C382, C383, C384, C385, C694, R401, R366, Q21 and R402.
35 2 9 Docking HP HP agree to remove caps for DP from MB to DOCKING.Remove C496 ~ C511 from MB.
36 3 3 Super I/O Compal Common design change to SMSC.Security Classification
Compal Secret Data
2007/02/28
Compal Electronics, Inc. Title
Deciphered Date
5 4 3 2 1
www.s-manuals.com

Compal La 4951p r0.4 Schematics

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Compal La 4951p r0.4 Schematics

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A B C D E

Security Classification Compal Secret Data Compal Electronics, Inc.

Display Port X 2 PEG

LPC BUS NAND Flash Page 13

(1) 2 LAN indicator LED's 4MB X 2 Page 27

( O MEANS ON X MEANS OFF ) Symbol Note :

Install below 43 level BOM structure for ver. 0.1

Reserve below BOM structure for ver. 0.1

THERMAL CK72@ : Install for 72 pin CLOCK GEN

Security Classification Compal Secret Data Compal Electronics, Inc.

Layout rule10mil width trace

EMC2113-2-AX_QFN16_4X4 AT30 CLK_CPU_XDP#

C1 2200P_0402_50V7K DP DN2/DP3 2200P_0402_50V7K C408 SKTOCC#

1 FAN_PWM 4 13 R10 1 2 6.8K_0402_5% +3VS R8 49.9_0402_1%

JTAG & BPM

3 H_THERMTRIP#_U1 21 1 VCCPWRGOOD_1 TDO_M AP29

R27 0_0402_5% VCCPWRGOOD_0

Layout Note: 750_0402_1%

C3 R33 2 1 1.5K_0402_1% VDDPW RGOOD_R

FAN Connector XDP Connector +VCCP

5 XDP_BPM#1 OBSDATA_A1 OBSDATA_C1 CFG1 5

13 GND4 GND5 14 Swap. 02/25 Remove R37, R38, R39. 2/17

JCFAN1 OBSFN_B0 OBSFN_D0

5 CFG16 OBSFN_B1 OBSFN_D1 CFG11 5

Security Classification Compal Secret Data Compal Electronics, Inc.

15 DMI_CRX_PTX_P2 B23 G32 PCIE_CRX_GTX_C_N4 C666 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_N4 21 4 CFG7 CFG7

E19 F33 PCIE_CRX_GTX_C_P8 C686 1 2 0.1U_0402_16V4Z PCIE_CRX_GTX_P8 21 4 CFG17 CFG17 AK30 A2

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_D35 SA_DQ[34] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D37 SB_DQ[36] SB_DQS#[2] DDR_B_DQS#3 DDR_B_DQS#[0..7]

DDR SYSTEM MEMORY - B

Security Classification Compal Secret Data Compal Electronics, Inc.

Remove C54. 7/14

PEG & DMI

R28 VCC88 VCC_SENSE AJ34 1 VCCSENSE 43

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title

AT20 VSS1 VSS81 AE34

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_DQS#4 135 136 DDR_A_DM4 145 146 DDR_A_D44

145 146 DDR_A_D44 155 156

DDR_A_D41 149 150 DDR_A_D43 159 160 DDR_A_D47

DM5 DQS5 DDR_A_D49 DQ48 DQ52 DDR_A_D53

161 162 DDR_A_DQS6 171 172

DDR_A_D49 DQ48 DQ52 DDR_A_D53 DDR_A_D50 VSS44 DQ54 DDR_A_D55

DQS#6 DM6 VSS46 DQ60

DDR_A_D58 191 192 DDR_A_D62 201 202 SMB_CLK_S3

1 1 205 0.65A@0 .75V 206 (HIGHT)

SMB_DATA_S3 3 5 2008/09/15 2009/09/15 Title

V_DDR_CPU_REF1 1. Remove R91, R684. 4/30 DDR3

DDR_B_D35 DQ34 DQ39 +0.75VS +0.75VS DDR_B_DM5 VSS36 DQS#5 DDR_B_DQS5

DDR_B_D40 147 148 DDR_B_D45 DDR_B_D42 157 158 DDR_B_D46

151 152 DDR_B_DQS#5 161 162

DDR_B_D42 VSS37 VSS38 DDR_B_D46 DQ49 DQ53

DDR_B_D48 163 164 DDR_B_D52 173 174 DDR_B_D54

DQ49 DQ53 DDR_B_D51 DQ50 DQ55

DQS6 VSS43 DDR_B_D54 DDR_B_D57 DQ56 DQ61

1 1 205 0.65A@0 .75V 206 (RIGHT)

should be 0xA4)Change R98.1 to 2008/09/15 2009/09/15 Title

Reserve R756 & R757. 7/19

Q76 C715 1 2@ 0.1U_0201_6.3V6K

Remove R747. 7/20

Security Classification Compal Secret Data Compal Electronics, Inc.

+3VS/+1.5VS_CK505 +1.05VS_CK505 +3VS_CK505 +1.05VS_CK505

2 1 REF_0/CPU_SEL 1 VDD_DOT SCL 32 SMB_CLK_S3 4,9,10,14,26