New Space Vector Modulation Technique for

Single-Phase Multilevel Converters

J.I.Leon, R.Portillo, L.G.Franquelo, S.Vazquez, J.M.Carrasco and E.Dominguez
Electronic Engineering Department
University of Seville
Seville, SPAIN
jileon@gte.esi.us.es

Abstract- Single-Phase multilevel converters are suitable for (0, E, 2E) can be achieved adding and subtracting the phase
medium power applications as photovoltaic systems and switched voltages of phase A and B.
reluctance machines. An overview of possible modulation methods
including carrier-based Pulse Width Modulation and Space
Vector Modulation techniques for multilevel single-phase VAB = VA0 VB 0 (1)
converters is presented. A new space vector modulation for this
type of converters is proposed. This space vector modulation
method is very simple presenting low computational cost.
In this paper, single-phase multilevel converters are studied
Different solutions for the space vector modulation are presented in order to design modulation methods improving some
achieving similar output results but imposing restrictions on the features as the number of commutations or the DC-Link
power converter topology. Optimization algorithms balancing the voltage unbalance.
DC-Link voltage or minimizing the commutation losses are
presented. Experimental results using a 150 kVA five-level diode-
clamped converter are shown to validate the proposed modulation II. MODULATION TECHNIQUES
and optimization methods.
Different modulation methods can be used for single-phase
I. INTRODUCTION multilevel converters adapting the three-phase modulation
techniques. Carrier based Pulse Width Modulation (PWM) and
Nowadays, some applications as photovoltaic systems and Space Vector Modulation (SVM) methods for three-phase
switched reluctance machines are increasing their importance multilevel converters have been presented [6]. In the next
in the power arena. In this way, a new generation of single- points, carrier based PWM and SVM techniques for single-
phase power converters improving the efficiency and the phase multilevel converters will be presented.
reliability is needed. The power demand and the grid codes
imposed by the governments lead to think on multilevel
converters as a possible solution fulfilling all these Sa1 Sb1
requirements. Increasing the number of levels of the E C1
converters, the power and the quality of the output signals are Sa2 Sb2
improved. 0 A B
2E +
-
Since multilevel converters appeared, different topologies
have been proposed [1-4]. Diode-clamped converters (DCC), Sa3 Sb3
Flying-Capacitor converters (FCC) and Cascade converters are E C2
the most common multilevel converter topologies presenting Sa4 Sb4
advantages or disadvantages in terms of minimum number of
power devices, modularity and stability. Usually, these Fig. 1. Single-phase five-level DCC.
converters have been presented as three-phase converters but TABLE I
they can be adapted to work as single-phase converters. In [5], POSSIBLE SWITCHING CONFIGURATIONS FOR SINGLE -PHASE FIVE -LEVEL DCC
the most common multilevel single-phase converters are Sa1 Sa2 Sa3 Sa4 Sb1 Sb2 Sb3 Sb4
Output
Voltage VAB
summarized considering that they are working driving a
off off on on off off on on 0
switched reluctance machine. In [6], single-phase converters
off off on on off on on off -E
are applied to small distributed power generation.
off off on on on on off off -2E
All the possible switching configurations (named in this
off on on off off off on on E
paper as state vectors) of single-phase multilevel converters are
off on on off off on on off 0
presented in [5]. For instance, a five-level single-phase DCC is
off on on off on on off off -E
shown in figure 1. Each leg of the power converter can be
on on off off off off on on 2E
switched as it is shown in Table I obtaining three possible
on on off off off on on off E
output phase voltages (0, E). As VAB is the output voltage of
on on off off on on off off 0
the single-phase converter and using (1), five possible voltages

1-4244-0755-9/07/$20.00 '2007 IEEE 617

A. Carrier based PWM method
Carrier based PWM technique is based on the obtaining of a
pulse train where the pulses width has the modulation
information. The simplest possible implementation of this
modulation technique can be done using triangular carriers
with frequency fc trying to modulate a reference signal (Vref)
with lower frequency fs. In general, carrier based PWM
techniques can be divided in unipolar and bipolar [7].
In figure 2, an example of level-shifted unipolar PWM
modulation is shown. In the unipolar case, the control strategy
generates only one reference voltage (Vref) to be modulated
and, for N-level converters, N-1 triangular carriers (Ci) are Fig. 2. Unipolar five-Level Level-shifted PWM technique.
used existing different modulation methods depending on the
level (level-shifted method) or phase disposition (phase-shifted
method)of the carriers [6][7]. The modulation strategy output
is the modulated signal (MS) that has to be obtained from the
converter. One external control has to decide the final
switching of the power semiconductors to obtain those voltage
levels because depending on the multilevel converter topology,
different switching configurations obtain the same output
voltage level. For instance, if a single-phase five-level DCC
(see figure 1) is used, from Table I it can be seen that level 0
can be obtained from three different switching configurations.
On the other hand, bipolar PWM techniques were presented
in [7] where Vref and Vref are taken into account to generate
Fig. 3. Bipolar five-Level PWM technique. Each pulse train is applied to each
the pulse train for phase A (MSA) and B (MSB) respectively. phase of the converter respectively.
The external control also has to decide the switching of power
semiconductors to obtain the desired output phase voltage In the five-level single-phase converter control region, nine
levels. A bipolar PWM method for a five-level single-phase possible state vectors appear and these are the unique possible
converter is shown in figure 3. voltages to be achieved when the converter is working. Other
B. Space Vector Modulation method output voltages have to be obtained as linear combinations
The second most common modulation technique is the Space using one SVM method. As the output voltage of a single-
Vector Modulation (SVM) where the reference vector, phase converter is VAB voltage, it can be calculated for every
generated by an external control strategy, is represented in a combination of the state vectors using (1). In figure 5, VAB
vectorial diagram and is composed as a linear combination of voltage of the five-level single-phase converter is shown. For
the possible state vectors of the power converter. Nearest Three instance, VAB equal to 1.7E, 0.55E and -0.85E are represented.
Vectors (NTV) technique is normally used in three-phase It can be seen that different combinations of state vectors
systems determining the three nearest vectors to the reference achieve the same output voltage VAB. In fact, there are different
one [8][9]. These vectors are used in the switching sequence to valid solutions to obtain the same output voltage VAB that form
compose the reference vector and the duty cycles are diagonal lines with 45 slope. This important property is shown
calculated using geometric expressions. in figures 5 and 6 representing one important redundancy in the
The control region of a power converter can be represented power converter that can be used to improve some power
determining the phase voltage Vphase-0 for every possible converter features as the DC-Link voltage balance, the
switching configuration in each phase. For instance, in the commutation losses, load current ripple, ..., etc.
five-level single-phase converter, each phase can obtain three
different output levels. The control region of a single-phase III. THE PROPOSED N2V-SVM METHOD
five-level converter is shown in figure 4 where 2E is the DC-
Link voltage. The possible state vectors of the power converter The control region considering the output voltage VAB can be
are labeled using a couple of numbers SASB denoting the state determined and, for instance, the single-phase five-level
of phase A and B respectively. This phase state is equal to zero converter control region is represented in figure 7. A similar
if the lowest possible output phase voltage is achieved. control region was presented in [10] for the two-level case.
This way of representation will be very useful to develop the
SVM method proposed in this paper.

618
 The redundancy property is clearly shown in figure 7 where
VA0 different redundant state vectors achieve the same output
voltage VAB and therefore are located exactly in the same
E position in the control region. The nine possible state vectors
20 21 22 for the single-phase five-level converter can be divided in two
large vectors (02 and 20), four medium vectors (01, 10, 21 and
12) and three zero vectors (00, 11 and 22).
E VB0
-E 10 0 From figure 7, it is clear that in the multilevel single-phase
11 12
case, the space vector modulation method can be named as
Nearest Two Vectors (N2V) because only the two nearest state
vectors to the reference one are needed in the switching
00 01 02 sequence to generate the reference vector.
-E The flow diagram of the proposed N2V-SVM technique is
Fig. 4. Control region of a single-phase five-level converter. represented in figure 8. This method determines the switching
sequence (formed by two space vectors) using geometrical
properties where, among the possible redundant vectors, the
state vectors with minimum voltage levels are used. For
instance, if the modulation algorithm determines that state
vectors 10 or 21 are present in the switching sequence, by
default state vector 10 would be used.

a=Vref /2E

a>0

NO YES

statea1=0 stateb1=0
statea2=0 stateb2=0

Fig. 5. Output voltage VAB for every linear combination of phase voltages in a
single-phase five-level converter.
a<-0.5 a>0.5

VA0 NO YES

YES NO
21
20 X X X 22 statea1=2
stateb1=1 stateb1=0 statea1=1
E

stateb2=2 statea2=1
.7

stateb2=1 statea2=0
=1

a=a+0.5 a=a-0.5
B

t1=1+2a t1=1-2a
A
V

t1=1-2a
5E

t1=1+2a
.5

VB0
=0

11 Fig. 8. Proposed N2V-SVM algorithm for a single-phase five-level converter.

AB

10 X X X
V

12
Once the N2V-SVM algorithm has been executed, one
E
85
0.

optimization strategy can be used in order to improve other

=-
AB
V

00 X X X 02 features of the power converter using the redundancy property.

01 These optimization algorithms define strategies to determine
Fig. 6. Control region of a single-phase five-level converter. Different the best linear combination of state vectors to obtain the
combinations of state vectors achieve the same output voltage.
desired VAB voltage and, taking advantage of the redundancy
22 property, improve some characteristic of the power converter.
12 11 21 A. N2V-SVM balancing the DC-Link Voltage in DCC
02 01 00 10 20
One possible optimization strategy can be based on reducing
-2E -E 0 E 2E VAB the DC-Link voltage unbalance of the single-phase DCC. In
Fig. 7. Control region for VAB for a single-phase five-level converter. this way, the state vectors of the power converter affect to the
voltage balance as it is shown in Table II where IAB is the load

619
current from A to B (see figure 1). It is assumed that an TABLE III
OPTIMIZATION STRATEGY TO CHOOSE THE REDUNDANT STATE VECTORS IN
external device, i.e. a power rectifier is controlling the total ORDER TO MINIMIZE THE DC-L INK UNBALANCE FOR A SINGLE-PHASE FIVE-
DC-Link voltage making it approximately constant. LEVEL DCC
From Table II, it is clear that large and zero state vectors do Desired Redundant V<0 V>0
not create any unbalance in the DC-Link voltage and a possible VAB State
IAB<0 IAB>0 IAB<0 IAB>0
solution for the modulation method to avoid unbalances is to Voltage Vectors
-E 01-12 01 12 12 01
use, among all the possible solutions to carry out the
+E 10-21 21 10 10 21
modulation, state vectors 20, 11 and 02. In fact, using these
state vectors the five-level single-phase DCC is switched as a
three-level single-phase converter because the possible output
voltage VAB values in this case are 0 and 2E. Therefore, this
solution will not be considered.
TABLE II
VOLTAGE UNBALANCE FOR EVERY STATE VECTOR OF THE FIVE -LEVEL SINGLE-
PHASE DCC
State C1 voltage C2 voltage
Vectors IAB<0 IAB>0 IAB<0 IAB>0
00
11
22
01
12
10
21
02
20 Fig. 9. 150 kVA single-phase five-level DCC prototype.

As it was presented in [11], the DC-Link voltage balance can

be properly achieved using the redundancy properties of the
single-phase five-level power DCC. Redundant medium
vectors have opposite effect on the DC-Link voltage unbalance
and carefully choosing the best redundant vector, the DC-Link
voltage balance will be achieved. Only measuring VC1 voltage
and IAB, Table II can indicate the redundant vector to be used in
the switching sequence to put the capacitor voltages in
equilibrium for a single-phase five-level DCC. The unbalance
of the five-level single-phase DCC is defined as follows:

V = VC1 VC2 (2)

The balancing control algorithm is summarized in Table III
where depending on the sign of the load current (IAB) and the
sign of the unbalance (V), the redundant medium state vectors
are chosen.
The proposed N2V-SVM method with the voltage balancing
optimization algorithm has been experimentally tested using a
single-phase 150 kVA five-level DCC shown in figure 9,
controlled by a TMS320VC33 Texas Instruments DSP
considering a 50Hz sinusoidal reference voltage (Vref),
modulation index m=1, DC-Link voltage (2E) equal to 900 V,
C1=C2=3300 F and the switching frequency equal to 5.6 kHz.
In figure 10, the output voltage VAB connecting a resistive load
with R=62 is shown with a modulation index m=1. It can be
seen that the N2V-SVM works perfectly generating the
modulated signal.
Fig. 10. Output voltage VAB using proposed N2V-SVM technique.
In order to test the balancing algorithm using the redundancy
property, the experiment shown in figure 11 is presented. An
unbalance of 150V is initially imposed in the DC-Link when
the total DC-Link voltage is 850 volts. When the balancing
algorithm is applied, the unbalance is rapidly minimized
achieving the equilibrium in 200 ms approximately. It has to be
noticed that the N2V-SVM method and the balancing control
algorithm are extremely simple and using the TMS320VC33
DSP the computational cost is very low. All the calculations
needed to carry out the N2V-SVM technique cost less than
2.1s while the balancing method execution time is 2.75s.
Therefore, the total execution time is less than 4.85 s
representing only a 2.7% of the switching time using a
switching frequency fs equal to 5.6 kHz.

620
 This N2V-SVM technique minimizing the number of
commutations in phase A has been experimentally tested using
the same parameters of experiment of figure 10. In figure 14,
VA0 and VB0 voltages and VAB voltage minimizing the number
of commutations connecting a resistive load R=62 is
represented validating the modulation strategy and showing the
low switching frequency in phase A. It has to be noticed that in
this case, the DC-Link voltage balance can not be achieved and
other device, i.e., a rectifier has to be controlling the voltage
equilibrium.

Sb1
Fig. 11. DC-Link balance using proposed SVM-N2V technique and the
optimization algorithm method using the redundancy property. E C1 S a1
B. N2V-SVM minimizing the number of commutations Sb2
Other possible optimization strategy can be based on 0 A B
reducing the number of commutations of the single-phase 2E +
-
power converter. This case is considered for high power Sb3
applications where high power semiconductors have to be used E C2 Sa2
and commutation losses have great importance.
The proposed N2V-SVM method can reduce the Sb4
commutations of one phase as much as possible using the
Fig. 13. Hybrid single-phase five-Level DCC.
optimization strategy presented in figure 12. The redundancy
property of the single-phase five-level converter is not used
and phase A always applies phase states 0 or 2 depending on
the sign of the reference voltage Vref. If Vref is positive, phase
A state is always 2 and 0 otherwise. Using this optimization
strategy, modulated output signal VAB also presents five output
voltage levels because phase A achieves output voltage levels
E and phase B obtains output levels E and 0.
Phase A commutations are minimized obtaining only two
commutations per reference signal period. In fact, the single-
phase five-level DCC represented in figure 1 can be simplified
because in phase A voltage level 0 is not used and it works as a
two-level phase. In this way this hybrid five-level single-phase
DCC is represented in figure 13. As disadvantage, transistors
Sa1 and Sa2 have to support double voltage comparing with Fig. 14. VA0 and VB0 voltages and output VAB voltage using N2V-SVM
case of figure 1 and lower switching frequencies have to be technique minimizing commutations in phase A.
used in phase A. In this way, high voltage IGCTs or GTOs can
be used for phase A while IGBTs can be used for phase B. IV. GENERALIZED N2V-SVM TECHNIQUE
Using IGCTs or GTOs, the switching frequency has to be low
The proposed N2V-SVM method can be extended to be used
but the proposed modulation optimization directly imposes this
with single-phase multilevel converters. The control region for
restriction and no problems are inherited from the use of high
N-level case can be determined calculating the phase voltages
power devices. Conduction losses using IGCTs or GTOs are
VA0 and VB0. The specific case of the calculation of the phase
lower than IGBTs losses and therefore, total losses in the
voltages for a single-phase nine-level converter is shown in
system are minimized. A similar hybrid single-phase multilevel
figure 15. Finally, the control region for the (2N-1)-level case
converter was presented in [12] using a FCC topology.
can be calculated using (1) and it is represented in figure 16
where N is the number of levels of each phase.
22 The N2V-SVM generalized algorithm is very similar to the
12 11 21
five-level case presented in figure 8 but now much more state
02 01 00 10 20
vectors appear.
-2E -E 0 E 2E VAB
Fig. 12. Modulation strategy reducing the commutations in phase A.

621
 V. CONCLUSIONS
VA0
In this paper, a new N2V-SVM method for single-phase
E multilevel converters has been proposed achieving output
40 41 42 43 44 signals with high quality and minimum computational cost. In
addition, an optimized control algorithm to balance the DC-
30 31 32 33 34 Link voltage in a single-phase five-level DCC has been
VB0 presented. Other possible N2V-SVM method suitable for high
-E 20 21 22 23 24 E
power applications has been also explained reducing the
number of commutations in the single-phase multilevel
10 11 12 13 14
converter and therefore minimizing the commutation losses of
the system. Finally, a generalization of the proposed
00 01 02 03 04
modulation technique for multilevel single-phase converters
-E has been presented. It is important to notice that the
Fig. 15. Control region of a single-phase nine-level converter. computational cost of the proposed N2V-SVM technique is
independent of the number of levels of the converter. Only
(N-1)(N-1)
(N-2)(N-1)
...
(N-1)(N-2)
simple comparisons are needed to carry out the modulation
(N-3)(N-1) ... 22 ... (N-1)(N-3) process. Experimental results are shown to validate the
... 12 11 21 ... proposed methods using a 150 kVA five-level diode-clamped
0(N-1) 02 01 00 10 20 (N-1)0
converter.
-2E ... -2E -E 0 E 2E ... 2E VAB
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