The 8051 Microcontroller and

Embedded Systems
CHAPTER 5
8051 ADDRESSING MODES
OBJECTIVES
List the five addressing modes of the 8051 microcontroller
Contrast and compare the addressing modes
Code 8051 Assemblv language instructions using each addressing mode
Access RAM using various addressing modes
List the SFR (special function registers) addresses
Discuss how to access the SFR
Manipulate the stack using direct addressing mode
Code 8051 instructions to manipulate a look-up table
Access RAM, I/O, and ports using bit addresses
Discuss how to access the extra 128 bytes of RAM space in the 8052
Addressing Modes
The various addressing modes of a microprocessor are
determined when it is designed, and therefore cannot
be changed by the programmer.
The 8051 provides a total of five distinct addressing
modes.
(1) immediate
(2) register
(3) direct
(4) register indirect
(5) indexed
Immediate addressing mode
The operand comes immediately after the op-
code.
The immediate data must be preceded by the
pound sign, "#".
Example
MOV DPTR, #2550H

Is the same as:

MOV DPH,#25H
MOV DPL,#50H
Example
COUNT EQU 30

MOV R4, #COUNT

MOV DPTR, #MYDATA

ORG 200H
MYDATA: DB AMERICA
Register addressing mode
Register addressing mode involves the use of
registers to hold the data to be manipulated.

The size of register must be same

SECTION 5.2: ACCESSING MEMORY
USING VARIOUS ADDRESSING MODES
Memory allocation
There are 128 bytes of RAM in the 8051
The RAM has been assigned addresses 00 to 7FH.
1. RAM locations 00 - 1 FH are assigned to the register
banks and stack.
2. RAM locations 20 - 2FH are set aside as bit-addressable
space to save single-bit data.
3. RAM locations 30 - 7FH are available as a place to save
byte-sized data.
Direct addressing mode
It is most often used to access RAM locations 30 - 7FH
Although the entire 128 bytes can be accessed using indirect
addressing mode
This is due to the fact that register bank locations can be
accessed by the register names of R0 - R7
There is no such name for other RAM locations so must
use direct addressing.
Direct addressing mode
In the direct addressing mode, the data is in a RAM
memory location whose address is known, and this
address is given as a part of the instruction.
Difference with the immediate addressing by the absence
of # sign
Special Function Registers (SFR)
In the 8051, registers A, B, PSW, and DPTR are part of
the group of registers commonly referred to as SFR.
The SFR can be accessed by their names or by their
addresses.
For example, register A has address E0H and register
B has been designated the address F0H.
SFR
 SFR registers and
their addresses

Table 51
8051 Special Function Register
(SFR) Addresses
Note on SFR
SFR address: 80H FFH
Since RAM memory inside 8051 are assigned at
00H 7FH
Not all of the address space 80H FFH is used
by the SFR. The unused locations are reserved
and not to be used by the programmer
Stack and direct addressing mode
Another major use of direct addressing mode is the
stack.
In the 8051 family, only direct addressing mode is
allowed for pushing onto the stack.
An instruction such as "PUSH A" is invalid. Pushing
the accumulator onto the stack must be coded as
"PUSH 0E0H.
Direct addressing mode must be used for the POP
instruction as well.
"POP 04" will pop the top of the stack into R4 of
bank 0.
Register indirect addressing mode
A register is used as a pointer to the data.
If the data is inside the CPU, only registers R0
and R1 are used for this purpose.
R2 - R7 cannot be used to hold the address
When R0 and R1 are used as pointers they
must be preceded by the @ sign.
Register indirect addressing mode
Advantage of register indirect addressing
mode
One of the advantages of register indirect
addressing mode is that it makes accessing data
dynamic rather than static as in the case of
direct addressing mode.
Looping is not possible in direct addressing
mode.
This is the main difference between the direct
and register indirect addressing modes.
Advantage of register indirect addressing
mode
Limitation of register indirect addressing
mode in the 8051
R0 and R1 are the only registers that can be used for
pointers in register indirect addressing mode.
Since R0 and Rl are 8 bits wide, their use is limited to
accessing any information in the internal RAM
(scratch pad memory of 30H - 7FH, or SFR).
To access data stored in external RAM or in the code
space of on-chip ROM, we need a 16-bit pointer, the
DPTR.
Indexed addressing mode and on-chip ROM
access
Indexed addressing mode is widely used in accessing data
elements of look-up table entries located in the program ROM
space of the 8051.
The instruction used for this purpose is :
MOVC A, @ A+DPTR
The 16-bit register DPTR and register A are used to form the
address of the data element stored in on-chip ROM.
Because the data elements are stored in the program (code)
space ROM of the 8051, the instruction MOVC is used instead
of MOV. The "C" means code.
In this instruction the contents of A are added to the 16-bit
register DPTR to form the 16-bit address of the needed data.
Example
Assuming ROM space starting at 250H contains the word
INDONESIA, end with null (0) to indicate ends of
data. Write a program to transfer the letters into RAM
locations starting from 40H.
Look up table and MOVC
Allows access to elements of a frequently used table with
minimum operation
Example: use look up table to store squared number
started in ROM 300H (example 5-8)
Indexed addressing mode and MOVX
instruction
The 8051 has another 64K bytes of memory space
set aside exclusively for data storage.
This data memory space is referred to as external
memory and it is accessed by the MOVX instruction.
The 8051 has a total of 128K bytes of memory space
since 64K bytes of code added to 64K bytes of data
space gives us 128K bytes.
One major difference between the code space and
data space is that, unlike code space, the data space
cannot be shared between code and data.
Further in chapter 14
Accessing memory 30H 7FH as scratch
pad
Switching Register Bank using PSW and keeping track
what register has been used is tedious and prone to
errors.
In many application:
Register bank 0 is used (00 07H)
08 1FH is used as stack (not as register bank 1)
Use scratch pad if we need more register space use direct
addressing
Example 5-10

See memory location (RAM)

32H is changed during
program (decremented start
form C8H)
SECTION 5.3: BIT ADDRESSES FOR I/O
AND RAM
Many microprocessors such as the 386 or Pentium allow
programs to access registers and I/0 ports in byte size only.
If you need to check a single bit of an I/0 port, you must read
the entire byte first and then manipulate the whole byte with
some logic instructions to get hold of the desired single bit.
This is not the case with the 8051.
One of the most important features of the 8051 is the ability
to access the registers, RAM, and I/0 ports in bits instead of
bytes.
This is a very unique and powerful feature for a
microprocessor made in the early 1980s.
 Bit-addressable RAM

Figure 51
16 Bytes of Internal RAM. Note:
They are both bit- and byte-accessible.
SECTION 5.3: BIT ADDRESSES FOR I/O
AND RAM
Bit-addressable RAM

Table 52 Single-Bit Instructions

SECTION 5.3: BIT
ADDRESSES FOR I/O
AND RAM

I/O port bit addresses

Figure 52 SFR RAM Address (Byte and Bit)

SECTION 5.3: BIT ADDRESSES FOR I/O
AND RAM
Bit memory map

Table 53 Bit Addresses for All Ports

Using BIT directive
The BIT directive is a widely used directive to assign the
bit-addressable I/0 and RAM locations.
The BIT directive allows a program to assign the I/0 or
RAM bit at the beginning of the program, making it easier
to modify them.
Using EQU directive
We can also use the EQU directive to assign addresses.
Extra 128 Byte on chip RAM in 8052
The extra RAM gets address 80H FFH overlap with
SFR address
This parallel address space in 8052 force to use 2
different addressing modes:
To access SFR use direct addressing modes (when we want
to access the address, not the name of register)
To access upper 128 bytes use indirect addressing modes
with R0 and R1 as pointers
Exercise
1. Write a simple program to check RAM address 40h-4Fh for
even number. For every encountered even number,
increment R7! (Use indirect adressing!)
2. Write a simple program to read 16 consecutive data from
P3 (connected to push button/simple keypad) to RAM
Address 30h-3Fh!
3. Modify example 5-8 into a BCD to 7segment decoder!
Instead of LED, connect a single digit 7 segment! Use the
following as the look-up table content!
table:
db 00111111b, 00000110b, 01011011b, 01001111b
db 01100110b, 01101101b, 01111101b, 00000111b
db 01111111b, 01101111b, 01110111b, 01111100b
db 00111001b, 01011110b, 01111001b, 01110001b