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Compal Confidential
Model Name : Cheetah_CT
File Name : ZEJV4
BOM P/N:
1 1

2 2

Compal Confidential
ZEJV4 LA-A411P Schematics Document
Intel Clover Trail

2013-04-15
3
REV: 1.0 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Monday, April 15, 2013 Sheet 1 of 35
A B C D E
A B C D E

System Block Diagram

1
MIPI_DSIX4 MIPI 2LVDS Bridge LVDS LCD 1
Renesas UPD60802A
Page 12, 13
Page 23
I2C_SCL-SENSOR_3P3
Accelerometer
Compass
ST LSM303DLHC
I2C_SDA-SENSOR_3P3 Sensor HUB
STM32F103CBU6TR
Clover View I2C 0 LS Touch Screen
I2C 5
Gyro
Page 20
14mmx14mm
ST L3G4200D
HDMI uHDMI
Page 5 ~ 10 conn
I2C 3 TypeD
ALS Capella Page 19 I2S 1
CM3218 WIFI/BT UART0
Combo USI
AH663 SDIO1 MIPI-CSI1 x1 2.0M front Camera
2GB LPDDR2 I2C 4
Page 15
CO-POP
2 I2C 1 2.0M Rear Camera 2

MIPI-CSI4 x1 Page 15

USB2.0 port USB ULPI PHY ULPI 0


Page 18
TI/TUSB1211Page 18
I2C 5 AUDIO CODEC
I2S 3 Realtek
ALC5642 Digital Mic X 1
I2S 0 Page 22

DC-DC
AC Brick
SPI_0 EC Charger
I2C 2 ENE IO3737 I2C TI/BQ24192
System VR
3V 5V SVID
Page 23
3 PMIC_PWRGD 3

PMIC PSS
Battery
1S4P 25Whr
TI PMIC_INT IPJ-P6001
PSNB5072A1ZNB Fuel gauge
EXITSTBY TI/BQ27541

Power rails
Page 28~ 32 Acer/Intel
Debug port
Page 26

SPI_0
LS
EMMC SDIO0

SPI NOR uSD


eMMC Winbond Page 17
Sandsisk W25Q32
4 4

HomeKey Board SDIN5C4-64GB


Page 16
4Mbit
Page 11
Home botton
speaker conn
combo jack Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 2 of 35
A B C D E
5 4 3 2 1

Power rail
Net name Voltage Comment
DC_IN 5V or 12V adapter input
+V_BATTERY Max 4.2V Battery input
+VBATA 3.4V~4.2V It's tablet's "B+"
System +V5A 5V Should be 5VALW
+V3.3A 3.3V Should be 3VALW
D +V5S 5V Should be 5VS D

+V3.3S 3.3V Should be 3VS


+V_VCC 0.3~1.2V 0.95V is default value
PMIC +V_VNN 0.6~1.2V 0.95V is default value
BUCK +V_VNNAON
Converter
0.6~1.2V 0.95V is default value
+V_1P22_VCCAON 1.250V 1.25V is default value
+V_1P80_AON 1.836V 1.836V is default value
+V_1P08_VCCAON 1.08V
+V_1P08_VCCAS 1.08V
+V_1P08_VCC 1.08V
+V_1P00_VCCAS 1.025V
PMIC
LDO +V_1P00_VCCA 1.025V
PMIC +V_2P85_1P80_VCCSDIO 2.85V 2.85V is default value
+V_2P80_VPROG1 1.2V 1.2V is default value
+V_2P80_VPROG2 1.2V 1.2V is default value
+V_2P85_EMMC1 2.85V
+V_2P85_EMMC2 2.85V No routing
+V_1P80_AON 1.8V
+V_1P80_VCCAON 1.8V
C C
PMIC +V_1P80_VCC 1.8V
PWM output +V_3P30_VCC 3.3V

IO MAP
Interface Device
MIPI DSI LVDS Bridger
MIPI CSI X1 2M Camera
X1 2M Camera
MIPI HSI NC
LPC NC
EMMC 0 EMMC
1 NC
HDMI HDMI Conn.
B SDIO 0 Micro SD B

1 WIFI/BT
2 NC
SVID PMIC
SPI 0 FLASH ROM/PMIC/XDP
1 XDP
2 Test Point
3 NC
ULPI 0 Internal USB
1 POGO conn
UART 0 WIFI/BT
1 NC
2 XDP
I2S 0 Codec
1 BT PCM
2 NC
3 Codec
I2C 0 LVDS / Panel / Touch screen
1 2M rear camera
A A
2 Charger / Battery / PSS
3 HDMI
4 2M front camera
5 Codec / Sensor Hub

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 3 of 35
5 4 3 2 1
5 4 3 2 1

I2C Routing Clock Distribution


MB
OSC_CLK_OUT_0 (19.2MHz)
I2C_0_SCL I2C_0_SCL_LS Codec
AT28 I2C_0_SDA Level I2C_0_SDA_LS
AN27 +V_1P80_VCCAON shifter +V3.3S OSC_CLK_OUT_1 (6~27MHZ)
D LEVEL : 1.8V LEVEL : 3.3V JTAG2_TDI D

2M Camera
OSC_CLK_OUT_2 (6~27MHZ)
JTAG2_TCK
2M Camera X1
Panel Touch OSC_CLK_OUT_3 (19.2MHz)
SOC JTAG2_TMS, Osc 19.2 MHz
Address:TBD Address:TBD LVDS bridge
USB_ULPI_0_REFCLK (19.2MHz)
USB PHY

I2C_1_SCL
USB_ULPI_1_REFCLK (19.2MHz)
I2C_1_SDA USB PHY
AU27
AT26

Y1
Crystal
2M Rear CAM 38.4MHz

I2C_2_SCL Address:0x50
AM26 I2C_2_SDA
C
AV26 +V_1P80_VCCAON C
LEVEL : 1.8V
SLP_CLKOUT2 (32.768KHz)
WIFI/BT

Y1201
EC PSS PMIC Crystal
32.768KHz

Intel Clover Lake I2C_3_SCL_HDMI SCL_HDMI_CONN


F8 I2C_3_SDA_HDMI Level SDA_HDMI_CONN
H4 +V_1P22_VCCAON shifter +5VS
LEVEL : 1.25V LEVEL : 5V

Sensor
HDMI Hub
I2C_4_SCL Sensor/BD
AE5 I2C_4_SDA Crystal
AF4 +V_1P80_VCCAON 12MHz
LEVEL : 1.8V

B B

2M front CAM
Address: Address:
I2C_5_SCL I2C_5_SCL_LS_3P3 I2C_SCL_SENSOR_3P3
AF6 I2C_5_SDA Level I2C_5_SDA_LS_3P3 Sensor I2C_SDA_SENSOR_3P3
AD2 +V_1P80_VCCAON shifter +V3.3A Hub +3VS
LEVEL : 1.8V LEVEL : 3.3V LEVEL : 3.3V
Address: 0x40

G-Sensor
CODEC Gyro + ALS
E-Compass
Address: Address: Address: Address:
R=0x39,W=0x38 R=0xD3,W=0xD2 E-Compass 0x48,0x0C
R=0x3D,W=0x3C
G-Sensor
R=0x33,W=0x32

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
I2C ROUING/Clock Distribution
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 4 of 35
5 4 3 2 1
5 4 3 2 1

ZZZ

MB PCB P/N R3
MDSI_COMP 1 2
PCB 10E LA-A411P REV0 M/B HDI +V_1P80_VCCAON 150_0201_1%
DAA00076000
@ R2
DISP_BRDG_RESET_N R607 1 2 10K_0201_5% HDMI_EXTR 1 2
QC4K@ 2.49K_0201_1%
U1

D
ES CPU P/N D

S IC A32 DG8065001202400 QC4K A0 1.5G U1A @


SA00005HU30 W5 M10 MDSI_A_CLK_DP
15 MCSI_4_CLK_DP MCSI_X4_CLKP MDSI_A_CLKP MDSI_A_CLK_DP 12
W3 M8 MDSI_A_CLK_DN
2.0M Rear Camera 15
15
MCSI_4_CLK_DN
MCSI_4_DATA0_DP
AA5 MCSI_X4_CLKN MDSI_A_CLKN N9 MDSI_A_DATA0_DP
MDSI_A_CLK_DN
MDSI_A_DATA0_DP
12
12
QD4T@ AA3 MCSI_X4_DP0 MDSI_A_DP0 N7 MDSI_A_DATA0_DN
15 MCSI_4_DATA0_DN MCSI_X4_DN0 MDSI_A_DN0 MDSI_A_DATA0_DN 12
U1 MCSI_4_DATA1_DP Y4 N5 MDSI_A_DATA1_DP
TP1310 MCSI_4_DATA1_DN Y2 MCSI_X4_DP1 MDSI_A_DP1 N3 MDSI_A_DATA1_DN
MDSI_A_DATA1_DP
MDSI_A_DATA1_DN
12
12
MDSI Bridge to LVDS
TP1311 MCSI_4_DATA2_DP AA7 MCSI_X4_DN1 MDSI_A_DN1 L5 MDSI_A_DATA2_DP
QS CPU P/N TP1314 MCSI_4_DATA2_DN AA9 MCSI_X4_DP2
MCSI_X4_DN2
MDSI_A_DP2
MDSI_A_DN2
L7 MDSI_A_DATA2_DN
MDSI_A_DATA2_DP
MDSI_A_DATA2_DN
12
12
TP1315 MCSI_4_DATA3_DP V6 K4 MDSI_A_DATA3_DP MDSI_A_DATA3_DP 12
TP1316 MCSI_4_DATA3_DN V4 MCSI_X4_DP3 MDSI_A_DP3 K2 MDSI_A_DATA3_DN
MCSI_X4_DN3 MDSI_A_DN3 MDSI_A_DATA3_DN 12
S IC DG8065001313500 QD4T C0 1.8G FCMB4 TP1317 L9 MDSI_COMP
SA000061C60 V10 MDSI_COMP M4 TP_MDSI_C_CLK_DP
15 MCSI_1_CLK_DP MCSI_X1_CLKP MDSI_C_CLKP TP1
V8 M2 TP_MDSI_C_CLK_DN
2.0M Front Camera 15
15
MCSI_1_CLK_DN
MCSI_1_DATA_DP
W9 MCSI_X1_CLKN MDSI_C_CLKN TP2
W7 MCSI_X1_DP AB4
15 MCSI_1_DATA_DN MCSI_X1_DN GP_MDSI_A_TE DISP_BRDG_TE 12
MCSI_COMP Y8 AD4 INTD_DSI_TE_2_R R9 1 @ 2 0_0201_1%
MCSI_COMP GP_MDSI_C_TE DISP_BRDG_RESET_N 12

1
D2 HDMI_CLK_DP HDMI_CLK_DP 14 1
R10 HDMI_CLKP E3 HDMI_CLK_DN XEMC@
HDMI_CLKN HDMI_CLK_DN 14
150_0201_1% B8 HDMI_DATA0_DP HDMI_DATA0_DP 14 C53
HDMI_DP0 D8 HDMI_DATA0_DN 1000P_0201_16V7K
HDMI_DN0 HDMI_DATA0_DN 14 2
C7 HDMI_DATA1_DP HDMI_DATA1_DP 14

2
HDMI_DP1 A7 HDMI_DATA1_DN 0320 EMI request
HDMI_DN1 HDMI_DATA1_DN 14
B6 HDMI_DATA2_DP
HDMI_DP2 C5 HDMI_DATA2_DN
HDMI_DATA2_DP
HDMI_DATA2_DN
14
14
HDMI support 1.3A
HDMI_DN2 H6 HDMI_EXTR
HDMI_EXTR G3 HDMI_SENSE R11 2 @ 1 1M_0201_1%
RSVD[0] J7 HDMI_HPD
+V_1P80_VCCAON
GP_CORE_037 E5 HDMI_HPD 14
HDMI_5V_DET TP3
HDMI_5V_DET

U1B @
C
D32 AV6 FLASH_TORCH TP1303 C
22 I2S_0_CLK D28 GP_I2S_0_CLK GP_CAMERA_SB0 AT10 DISP_STBY#
Audio Codec 22 I2S_0_FS B32 GP_I2S_0_FS GP_CAMERA_SB1 AU7 FLASH_TRIG
DISP_STBY#
TP1309
12
22 I2S_0_RXD C33 GP_I2S_0_RXD GP_CAMERA_SB2 AV4
22 I2S_0_TXD CAM_0_PWRDWN CAM_0_PWRDWN 15
GP_I2S_0_TXD GP_CAMERA_SB3 AD8 COMBO_GPS_RESET_N
R549 1 @ 2 0_0201_1% I2S_1_CLK_R E29 GP_CAMERA_SB4 AC5 I2S_RESET# TP1304
19 I2S_1_CLK F30 GP_I2S_1_CLK GP_CAMERA_SB5 AB8 TP1302
BT PCM 19 I2S_1_FS B28 GP_I2S_1_FS GP_CAMERA_SB6 AB2 LM3554_RESET# TP1308
19 I2S_1_RXD E31 GP_I2S_1_RXD GP_CAMERA_SB7 AB6
19 I2S_1_TXD GP_I2S_1_TXD GP_CAMERA_SB8 CAM_1_PWRDWN 15
AC3 Rear camera
GP_CAMERA_SB9 CAM_0_RST_N 15
N33 AE7 Front camera
I2S_2_CLK GP_CORE_082 CAM_1_RST_N 15
N31
N37 I2S_2_FS
P36 I2S_2_RXD AK32
I2S_2_TXD GP_XDP_C0_BPM0# AK34 CLV_KBD_DKIN0 25
D30 GP_XDP_C0_BPM1# AJ35 CLV_KBD_DKIN1 25
22 I2S_3_CLK GP_I2S_3_CLK GP_XDP_C0_BPM2# CLV_KBD_DKIN2 25
B30 AJ33
Audio Codec 22 I2S_3_FS H38 GP_I2S_3_FS GP_XDP_C0_BPM3# AJ37 CLV_KBD_DKIN3 25
22 I2S_3_RXD K36 GP_I2S_3_RXD GP_XDP_C1_BPM0# AG33 CLV_KBD_MKIN0 25
22 I2S_3_TXD GP_I2S_3_TXD GP_XDP_C1_BPM1# CLV_KBD_MKIN1 25
AH32
E21 GP_XDP_C1_BPM2# AH38 CLV_KBD_MKIN2 25
F16 MHSI_ACDATA GP_XDP_C1_BPM3# AH36 CLV_KBD_MKIN3 25
G21 MHSI_ACFLAG GP_XDP_PREQ# AG35 CLV_KBD_MKIN4 25 +V_1P80_VCCAON
E15 MHSI_ACREADY GP_XDP_PRDY# AF32 CLV_KBD_MKIN5 25
D18 MHSI_ACWAKE GP_XDP_BLK_DP AE37 CLV_KBD_MKIN6 25 1 2
I2C_1_SCL R20 2.2K_0201_1%
D20 MHSI_CADATA GP_XDP_BLK_DN AF38 CLV_KBD_MKIN7 25 1 2
KBC_RST# I2C_1_SDA R23 2.2K_0201_1%
E19 MHSI_CAFLAG GP_AON_042 AF36 I2C_2_SCL R25 1 2 2.2K_0201_1%
MHSI_CAREADY GP_AON_043 DISP_PWR_DOWN 12
R933 1 2 10K_0201_5% MHSI_CAWAKE C21 AB32 KBC_TST I2C_2_SDA R26 1 2 2.2K_0201_1%
+V_1P80_VCCAON B20 MHSI_CAWAKE GP_AON_044 AA33 SMART_SW# I2C_5_SCL R27 1 2 2.2K_0201_1%
MHSI_RCOMP GP_AON_045 AE33 I2C_5_SDA R28 1 2 2.2K_0201_1%
T36 GP_XDP_PWRMODE0 AD36 CLV_KBD_MKOUT4 25 1 2
11,26 SPI_0_CLK I2C_0_SCL R30 2.2K_0201_1%
U35 GP_SPI_0_CLK GP_XDP_PWRMODE1 AA37 CLV_KBD_MKOUT5 25 1 2
I2C_0_SDA R31 2.2K_0201_1%
SPI0 :1.2V 11,26
11,26
SPI_0_SDI
SPI_0_SDO
T34 GP_SPI_0_SDI
GP_SPI_0_SDO
GP_XDP_PWRMODE2
GP_AON_049
AE35 CLV_KBD_MKOUT6
ACPI_PWR_BUTTON
25
24
I2C_4_SCL R32 1 2 2.2K_0201_1%
T32 I2C_4_SDA R33 1 2 2.2K_0201_1%
11,26 SPI_0_SS0 GP_SPI_0_SS0
AV28 AT28
25 SPI_1_CLK GP_SPI_1_CLK GP_I2C_0_SCL I2C_0_SCL 24
AM28 AN27 touch panel
25 SPI_1_SDI AR27 GP_SPI_1_SDI GP_I2C_0_SDA AU27 I2C_0_SDA 24
I2C_1_SCL
B
DEBUG 25
25
SPI_1_SDO
SPI_1_SS0
AN29 GP_SPI_1_SDO GP_I2C_1_SCL AT26 I2C_1_SDA
I2C_1_SCL 15
2M rear camera
B

AT30 GP_SPI_1_SS0 GP_I2C_1_SDA AM26 I2C_1_SDA 15


I2C_2_SCL
SPI1 :1.2V or 1.8V(default) 11
11
SPI_1_SS1
SPI_1_SS2
AP28 GP_SPI_1_SS1
GP_SPI_1_SS2
GP_I2C_2_SCL
GP_I2C_2_SDA
AV26 I2C_2_SDA
I2C_2_SCL
I2C_2_SDA
23,24,29
23,24,29 Charger,battery,PSS
11 SPI_1_SS3
AV30 F8 I2C_3_SCL_HDMI I2C_3_SCL_HDMI 14
AR29 GP_SPI_1_SS3 GP_I2C_3_SCL_HDMI H4 I2C_3_SDA_HDMI
11 SPI_1_SS4 GP_SPI_1_SS4 GP_I2C_3_SDA_HDMI I2C_3_SDA_HDMI 14 HDMI EDID
AE5 I2C_4_SCL
GP_I2C_4_SCL I2C_4_SCL 15
TP9 SPI_2_CLK K34 AF4 I2C_4_SDA 2M front camera
M34 GP_SPI_2_CLK GP_I2C_4_SDA AF6 I2C_4_SDA 15
TP10 SPI_2_SDI I2C_5_SCL I2C_5_SCL 20,22
SPI_2_SDO M38 GP_SPI_2_SDI GP_I2C_5_SCL AD2 I2C_5_SDA
TP11
GP_SPI_2_SDO GP_I2C_5_SDA I2C_5_SDA 20,22 sensor hub , audio codec
TP12 SPI_2_SS0 M32
GP_SPI_2_SS0

2
TP13 TP_SPI_2_SS1 M36
R02 modify 1/7 GP_SPI_2_SS1 R35 R34
L35 PMIC_PWRGOOD T38 PMIC_PWRGD 25,26
100K_0201_5%
K38 GP_SPI_3_CLK PMIC_RESET# PMIC_RESET# 26 Y1
L33 GP_SPI_3_SDI

1
J35 GP_SPI_3_SDO C9 XTAL_19P2M_IN
TP15 JACK_DET#_SOC K32 GP_SPI_3_SS0 OSCIN E11 XTAL_19P2M_OUT 1 3
GP_AON_051 OSCOUT G15 OSC_CLK_OUT_R_0 R35 1 EMC@ 2 0_0201_5% OSC_CLK_OUT_0 IN OUT
OSC_CLK0 OSC_CLK_OUT_0 22
AN35 D16 OSC_CLK_OUT_R_1 R36 1 EMC@ 2 0_0201_5% OSC_CLK_OUT_1 1 4 2 1
GP_LPC_AD0 OSC_CLK1 OSC_CLK_OUT_1 25 GND GND
AL35 G17 OSC_CLK_OUT_R_2 R38 1 EMC@ 2 0_0201_5% OSC_CLK_OUT_2
GP_LPC_AD1 OSC_CLK2 OSC_CLK_OUT_2 25
AT38 H14 OSC_CLK_OUT_R_3 R37 1 EMC@ 2 0_0201_5% OSC_CLK_OUT_3 C1 C2
GP_LPC_AD2 OSC_CLK3 OSC_CLK_OUT_3 25
AN37 C13 TP_OSC_CLK_CTRL_0 TP14 Y_8Z38420001_4P 18P_0201_50V8J
AN33 GP_LPC_AD3 OSC_CLK_CTRL0 E9 18P_0201_50V8J 2 2
REMOVE TPM AK36 GP_LPC_CLKOUT OSC_CLK_CTRL1 JTAG2_TDO 25
1 1 1 1 38.4MHz
AP36 GP_LPC_CLKRUN EMC@ EMC@ EMC@ XEMC@
AL33 GP_LPC_FRAME# H36 C3 C4 C5 C6
GP_LPC_RESET# GP_COMS_INT0 PMIC_SPI_DEBUG 25,26

100P_0201_50V8J

100P_0201_50V8J

100P_0201_50V8J

1000P_0201_16V7K
TP16 KBC_INT AM32 G31 WAKEUP_OUT_N_AP TP27
GP_AON_089 GP_COMS_INT1 H32 2 2 2 2
GP_COMS_INT2 G33 WLAN_BT_WAKE# 19
GP_COMS_INT3 OSC_CLK_OUT_0 audio codec
OSC_CLK_OUT_1 CSB_SNSCLK1(rear camera) XDP JTAG2_TDI
OSC_CLK_OUT_2 CSB_SNSCLK2(front camera) XDP JTAG2_TCK
OSC_CLK_OUT_3 DISP_CLKIN(LVDS 60802) XDP JTAG2_TMS

ELP@ HYN@
ULPDDR ULPDDR
A A

S IC D2 512M32/533 EDBA164B1PF-1D-F ABO! S IC D2 512M32 H9TKNNNBPDMRAR-NGM ABO!


SA00005BA40 SA00005JM30

SAM@
ULPDDR
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CLOVERVIEW (1 OF 6)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
S IC D2 512M32/1066 K3PE0E000A-XGC2 ABO! Custom 0.2
SA00005GC60
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Tuesday, April 16, 2013 Sheet 5 of 35
5 4 3 2 1
5 4 3 2 1

D Must Disable internal pull-high for uSD interface !! D

U1C @
AL5 AT18
17 STIO_0_CD_N GP_SD_0_CD# EMMC_0_CLK EMMC_0_CLK 16
17 STIO_0_CLK R629 1 EMC@ 2 0_0201_5% STIO_0_CLK_R AK8 AP24 EMMC_0_CMD 16
AK6 GP_SD_0_CLK EMMC_0_CMD AR21
17 STIO_0_CMD AJ5 GP_SD_0_CMD EMMC_0_D0 AM20 EMMC_0_DATA0 16

2
MicroSD 17 STIO_0_DATA0 AJ7 GP_SD_0_D0 EMMC_0_D1 AP20 EMMC_0_DATA1 16
17 STIO_0_DATA1 AG5 GP_SD_0_D1 EMMC_0_D2 AT20 EMMC_0_DATA2 16
EMC@
C39
17 STIO_0_DATA2 AJ9 GP_SD_0_D2 EMMC_0_D3 AU19 EMMC_0_DATA3 16 EMMC
17 STIO_0_DATA3 AH8 GP_SD_0_D3 EMMC_0_D4 AL19 EMMC_0_DATA4 16
10P_0201_50V8J GP_SD_0_D4 EMMC_0_D5 EMMC_0_DATA5 16
1 AH4 AM18
AG9 GP_SD_0_D5 EMMC_0_D6 AR17 EMMC_0_DATA6 16
AG3 GP_SD_0_D6 EMMC_0_D7 EMMC_0_DATA7 16
25 SPI_INT_N 2 1 AK4 GP_SD_0_D7 AN19 EMMC_1_CLK_CPU
@ STIO_0_WP TP71
R43 10K_0201_5% GP_SD_0_WP# EMMC_1_CLK AM24
RF request 2/8 AM2 EMMC_1_CMD AR23
19 STIO_1_CLK GP_SDIO_1_CLK EMMC_1_D0
AP2 AU23
19 STIO_1_CMD AN7 GP_SDIO_1_CMD EMMC_1_D1 AN23
19 STIO_1_DATA0 AM4 GP_SDIO_1_D0 EMMC_1_D2 AT22
WIFI/BT 19 STIO_1_DATA1 AN5 GP_SDIO_1_D1 EMMC_1_D3 AL21
19 STIO_1_DATA2 AM8 GP_SDIO_1_D2 EMMC_1_D4 AM22
19 STIO_1_DATA3 GP_SDIO_1_D3 EMMC_1_D5 AN21
AM6 EMMC_1_D6 AL23
AP4 SDIO_2_CLK EMMC_1_D7
AR5 SDIO_2_CMD
LID_SW# AR3 SDIO_2_D0
follow FFRD Hybd 0.91 24 LID_SW# AU3 SDIO_2_D1
SDIO_2_D2
AT2
19 COMBO_BT_RESET# SDIO_2_D3 AR19 FLSH_RCOMP R44 1 2 22_0201_5%
C37 EMMC_RCOMP
24 TOUCH_INT# F34 GP_AON_062 AR7
ULPI1_CS MPTI_HS_CLK MPTI_HS_CLK 25
F38 GP_AON_063 MPTI_CLK AU5 MPTI_HS_DATA0
20 SENSOR_HUB_WAKE GP_AON_060 MPTI_D0 MPTI_HS_DATA0 25
F36 AT8 MPTI_HS_DATA1
ULPI1 en (POGO USB PHY) TP65 UART_1_RX_3G D36 GP_AON_061 MPTI_D1 AT6 MPTI_HS_DATA2
MPTI_HS_DATA1 25
GP_UART_1_RX MPTI_D2 MPTI_HS_DATA2 25
TP66 UART_1_TX_3G E35 AP8 MPTI_HS_DATA3 MPTI_HS_DATA3 25
TP67 UART_1_RTS_GPS E37 GP_UART_1_TX MPTI_D3
UART_2_RX E33 GP_UART_1_RTS
C 25 UART_2_RX GP_UART_2_RX C
TP68 UART_1_CTS_GPS C35
GP_UART_1_CTS
W35 AV36 USB_ULPI_1_CLK
18 USB_ULPI_0_CLK Y36 ULPI_0_CLK ULPI_1_CLK AT32 USB_ULPI_1_DATA0
18 USB_ULPI_0_DATA0 AD34 ULPI_0_D0 ULPI_1_D0 AR31 USB_ULPI_1_DATA1
18 USB_ULPI_0_DATA1 Y32 ULPI_0_D1 ULPI_1_D1 AU33 USB_ULPI_1_DATA2
18 USB_ULPI_0_DATA2 AC33 ULPI_0_D2 ULPI_1_D2 AU31 USB_ULPI_1_DATA3
ULPI USB 0 (external USB) 18 USB_ULPI_0_DATA3 W33 ULPI_0_D3 ULPI_1_D3 AU35 USB_ULPI_1_DATA4
18 USB_ULPI_0_DATA4 AC35 ULPI_0_D4 ULPI_1_D4 AN31 USB_ULPI_1_DATA5
18 USB_ULPI_0_DATA5 AA35 ULPI_0_D5 ULPI_1_D5 AR35 USB_ULPI_1_DATA6 Del ULPI1 02/04
18 USB_ULPI_0_DATA6 AB36 ULPI_0_D6 ULPI_1_D6 AT34 USB_ULPI_1_DATA7
18 USB_ULPI_0_DATA7 V32 ULPI_0_D7 ULPI_1_D7 AU37 USB_ULPI_1_DIR
18 USB_ULPI_0_DIR Y38 ULPI_0_CDIR ULPI_1_STP AP32 USB_ULPI_1_NXT
18 USB_ULPI_0_NXT U33 ULPI_0_NXT ULPI_1_NXT AT36
18 USB_ULPI_0_REFCLK USB_ULPI_1_REFCLK
V36 ULPI_0_REFCLK ULPI_1_REFCLK AR33 USB_ULPI_1_STP
18 USB_ULPI_0_STP ULPI_0_STP ULPI_1_CDIR

Those two pins were labeled in error on the SoC and


in the EDS
The correct pinout is:
ULPI_1_DIR = AU37
ULPI_1_STP = AR33

B B

FOR PMIC
RTCXTALIN RTCXTALIN 26
RTCXTALOUT RTCXTALOUT 26

Y1201
1 2

32.768KHZ_12.5PF_Q13FC135000040
1

C85 C86
22P_0402_50V8J 22P_0402_50V8J
2

Place close to PU1201

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title
CLOVERVIEW (2 OF 6)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 6 of 35
5 4 3 2 1
5 4 3 2 1

+V_1P80_VCCAON +V_1P80_VCCAON +V_1P22_VCCAON

1
LA9421 > 10K

1
D
FFRD > 2.2K R58 R57 R59 D

2
R46 R47 R51 100_0201_1% 100_0201_1% 100_0201_1%
2.2K_0201_1% 10K_0201_5% 10K_0201_5% R48 R49 R50 @ @ @
@ @ 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1%

2
@ @

2
HFPLLN

1
KSEL_STRAP0 FW_STRAP0
HFPLLC
KSEL_STRAP1 FW_STRAP1
HFPLLS
KSEL_STRAP2 FW_STRAP2

1
1

2
R63 R64 R65
R52 R53 R67 R54 R55 R56 100_0201_1% 100_0201_1% 100_0201_1%
10K_0201_5% 10K_0201_5% 10K_0201_5% 2.2K_0201_1% 2.2K_0201_1% 2.2K_0201_1% @ @ @
@ @ @ @ @ @

2
2

1
FW_STRAP0 is also used to detect XDP_PRESENT#,
need to connect to XDP connector pin 60

U1D @ +V_1P80_VCCAON
B14 D12 KSEL_STRAP2
25 JTAG_TCK D14 JTAG_TCK GP_CORE_068 G19
C 25 JTAG_TDI JTAG_TDI GP_CORE_067 FW_STRAP0 25 C
J17 B12 KSEL_STRAP0
25 JTAG_TDO JTAG_TDO GP_CORE_069

2
E13 C17 FW_STRAP2
25 JTAG_TMS E17 JTAG_TMS GP_CORE_072 U37 HFPLLN R93
25 JTAG_TRST_N JTAG_TRST# RSVD[6] B10 HFPLLC 10K_0201_5%
RSVD[5] AC7 HFPLLS
RSVD[7] @
TP21 B16 D10 KSEL_STRAP1

1
IERR# GP_CORE_071 H16 FW_STRAP1
GP_CORE_070 H20 R60 1 @ 2 0_0201_1% PROCHOT_N
PROCHOT# PROCHOT_N 26
TP22 THRMDA0_R V26
TP23 THRMDC0_R U25 RSVD[12] AW37 TP24
TP25 THRMDA1_R V20 RSVD[14] RSVD[1] AM34 CHG_INT#
U21 RSVD[13] GP_AON_093 AP38 CHG_INT# 29
TP20 THRMDC1_R EC_INT#
RSVD[15] GP_AON_094 EC_INT# 23
B18 H12
26 THERMTRIP# THERMTRIP# RSVD[2]
R68 1 @ 2 10K_0201_5% E27 G13
+V_1P80_VCCAON F28 RSVD[8] RSVD[10] F10 TP30
RSVD[9] RSVD[11] Need power confirm battery spec.
D4 J37 TP33
F4 RSVD[3] GP_AON_072 J33
RSVD[4] GP_UART_2_TX UART_2_TX 25
AP16
GP_AON_076 AR15
GP_AON_077 AV16 ULPI0_OC#_R R72 1 @ 2 0_0201_1%
GP_AON_078 ULPI0_OC# 18
AT14 USB_SPH_OC# R75 1 @ 2 10K_0201_5%
R74 1 2 49.9_0201_1% M0_RPUEXT AT24
M_RCOMP0
GP_AON_079 +V_1P80_VCCAON Check is it needed ?
AM16 GPS_WAKEUP_R TP45
R76 1 2 1K_0201_5% M0_SPDEXT AR25 GP_CORE_012 AN17 STIO_0_PWR_R R81 1 @ 2 0_0201_1%
+V_1P22_VCCAON M_RCOMP1 GP_SD_0_PWR AR13 BT_SHUTDOWN#
STIO_0_PWR 17
GP_SDIO_1_PWR BT_SHUTDOWN# 19
R77 1 2 1K_0201_5% M0_SPUEXT AN25 AT16
M_RCOMP2 GP_CORE_015 AP12
GP_CORE_016 AN15 SUS_STAT# R85 1 @ 2 0_0201_5%
R79 1 2 240_0201_1% ZQ-A AV20 GP_CORE_017 AV14 NFC_FW_RESET TP42
R80 1 2 240_0201_1% ZQ-B AM38 ZQ_A GP_CORE_018 AR11 TP44
ZQ_B GP_SDIO_2_PWR AU15 MODEM_PWR_ON TP39
GP_CORE_020 AV12
B GP_EMMC_0_RST# EMMC_GPO_RST0 16 B
TP35 CLV_RESETOUT_N G35 AN13 EMMC_GPO_RST1 TP36
RESETOUT# GP_EMMC_1_RST# AM14
GP_UART_0_RX AV8 UART_0_RX 19
GP_UART_0_TX UART_0_TX 19
AN11
GP_UART_0_CTS AR9 UART_0_CTS 19
GP_UART_0_RTS UART_0_RTS 19
AM12 UART_1_RX_GPS TP46
GP_CORE_030 AM10 UART_1_TX_GPS TP47
GP_CORE_031 AU11 CAM_FLHD_N TP43
GP_CORE_032 AN9 TOUCH_RST#
GP_CORE_033 TOUCH_RST# 24
K6
GP_CORE_073 COMBO_BT_WAKEUP 19
J5
GP_CORE_074 COMBO_WLAN_EN 19
J9
GP_CORE_075 ULPI0_CS 18
AL3 GPIO_RCOMP18
GPIO_RCOMP18 AL7 GPIO_RCOMP30
GPIO_RCOMP30

1
R82 R83
34.8_0603_1% 51_0201_1%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title
CLOVERVIEW (3 OF 6)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 7 of 35

5 4 3 2 1
5 4 3 2 1

+V_1P08_VCC +V_1P08_VCCAON
+V_1P80_VCCAON
+V_2P85_1P80_VCCSDIO

1 1 1 1 1 1 1 1 1 1
@ @ @ <BOM Structure>
C7 C10 C11 C152 C153 C18 C19 C20 C154 C155
2 2 2 2 2 2 2 2 2 2 2 C22 2 C23 2 C24 1 1 1 1 1 1 1 1@ 1@ 1 1

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
C28 C29 C412 C413 C428 C429 C587 C30 C31 C166 C167

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
1 1 1 2 2 2 2 2 2 2 2 2 2 2

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
D D

U1E @
AK28 AW13
+V_1P08_VCC AL27 VCC108[0] VCC180AON[4] AW15
+V_1P80_VCCAON +V_1P00_VCCA
W23 VCC108[1] VCC180AON[5] AJ1
W21 VCC108[2] VCC180AON[6] E1
+V_1P08_VCCAS J15 VCC108[3] VCC180AON[7] F2
+V_1P08_VCCAON VCC108AON_OSC VCC180AON[8] A21
AA21 VCC180AON[9] AA39
+V_1P08_VCC VCC108[4] VCC180AON[10] 2 C14 1 1 1 1
AA23 AC39
AA25 VCC108[5] VCC180AON[11] N39 C17 C170 C172 C588
VCC108[6] VCC180AON[12]

2.2U_0402_6.3V6M
1 1 AB12 W39
VCC108[7] VCC180AON[13] 1 2 2 2 2

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
AB22
C32 C33 AB24 VCC108[8] A19
AC11 VCC108[9] VCCA100_CPUPLL[0] A27
+V_1P00_VCCA
2 2 VCC108[10] VCCA100_CPUPLL[1]
0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

AC21 G27
AC23 VCC108[11] VCCA100_HFHPLL K18
AC25 VCC108[12] VCCA100_DSIPLL H26
AD12 VCC108[13] VCCA100AS_USBPLL J27
+V_1P00_VCCAS
AE11 VCC108[14] VCCA100AS_LFHPLL L19
N11 VCC108[15] VCCA100_DPHYPLL
N17 VCC108[16] V14
K28 VCC108[17] VCCA100[0] T26
+V_1P00_VCCA
L29 VCC108[18] VCCA100[1]
VCC108[19] F6
AA29 VCCA100AS +V_1P00_VCCAS
C +V_1P08_VCCAON VCC108AON_SRAM AK2
C

AB30 VCCSDIO +V_2P85_1P80_VCCSDIO


+V_1P08_VCCAS F32 VCC108AS[0] AN39 +V_1P00_VCCAS
VCC108AS[1] VDD1[0] AV18
+V_1P80_AON
AW33 VDD1[1] AE1
+V_1P80_VCCAON VCC122_180AON_I2C VDD1[2] A29
G39 VDD1[3] C1
AL39 VCC122_180AON_I2S[0] VDD1[4] C3
VCC122_180AON_I2S[1] VDD1[5] 1 1 1 1 1
<BOM Structure> @ @
C12 C13 C168 C21 C169
AL25 AW25
+V_1P22_VCCAON VCC122AON_MCLK[0] VDD2[0] +V_1P22_VCCAON 2 2 2 2 2

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
AK30 AW17
VCC122AON_MCLK[1] VDD2[1] AW5
AW11 VDD2[2] AW7
AF2 VCC122AON[0] VDD2[3] AG1
L1 VCC122AON[1] VDD2[4] AH2
intel request reserve 0205 VCC122AON[2] VDD2[5]
N1 A3
G9 VCC122AON[3] VDD2[6] B4
H18 VCC122AON[4] VDD2[7] A35
+V_2P85_EMMC1 +V_3P30_VCC J39 VCC122AON[5] VDD2[8] B36
L39 VCC122AON[6] VDD2[9] V38
AM30 VCC122AON[7] VDD2[10] AK38
VCC122AON[8] VDD2[11] TOP Side_close U1
AV34
VDD2[12] AW35
VDD2[13]
1 1 1
@ @
3

Q11 S C43 C44 C158 AV22


2
+V_1P80_VCCAON AV24 VCC180AON[0]
2 2 2 VCC180AON[1]
0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

G AW23
D VCC180AON[2]
1
S TR DMG2301U-7 1P SOT23-3

A9
VCC180AON[3] +V_1P80_AON
2

A11
+V_3P30_VCC VCC330
150_0603_1%

R681
B B
2 C49 2 C50 1 1 1 1 1
1

AC29 C54 C55 C414 C162 C163


+V_VNNAON VNNAON[0]

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
AF28
VNNAON[1] 1 1 2 2 2 2 2

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
AF30
AJ11 VNNAON[2]
AL17 VNNAON[3]
J11 VNNAON[4]
K10 VNNAON[5]
K30 VNNAON[6]
+V_VNNAON N29 VNNAON[7]
R29 VNNAON[8]
U29 VNNAON[9]
W11 VNNAON[10]
W29 VNNAON[11]
VNNAON[12]
2 C45 2 C46 1 1 1 1
C161 C381 C430 C431
2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1 1 2 2 2 2
0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CLOVERVIEW (4 OF 6)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 8 of 35
5 4 3 2 1
5 4 3 2 1

+V_VCC +V_1P22_VCCAON

1A
+V_VCC 3.8A
U1F @
A23 A13
A25 VCC[0] VCC122AON_MEM[0] A17
AA19 VCC[1] VCC122AON_MEM[1] A31
1 1 1 1 1 1 VCC[2] VCC122AON_MEM[2]
<BOM Structure> @ @ AA27 A37
C100 C57 C58 C59 C56 C98 AC19 VCC[3] VCC122AON_MEM[3] A39
D VCC[4] VCC122AON_MEM[4] D
AC27 AC1
2 2 2 2 2 2 VCC[5] VCC122AON_MEM[5]
0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
B22 AE39
B24 VCC[6] VCC122AON_MEM[6] AJ39
B26 VCC[7] VCC122AON_MEM[7] AN1
C23 VCC[8] VCC122AON_MEM[8] AR1
C25 VCC[9] VCC122AON_MEM[9] AU1
D22 VCC[10] VCC122AON_MEM[10] AV10 +V_1P22_VCCAON
D24 VCC[11] VCC122AON_MEM[11] AW1
D26 VCC[12] VCC122AON_MEM[12] AW27
E23 VCC[13] VCC122AON_MEM[13] AW3
E25 VCC[14] VCC122AON_MEM[14] AW31
F22 VCC[15] VCC122AON_MEM[15] AW9
F24 VCC[16] VCC122AON_MEM[16] B34
G23 VCC[17] VCC122AON_MEM[17] C39
TOP Side_close U1 VCC[18] VCC122AON_MEM[18] 2 C60 2 C61 2 C62 2 C63 2 C64 1 1 1 1 1 1 1 1 1 1
H22 D38
H24 VCC[19] VCC122AON_MEM[19] E39 C65 C66 C67 C68 C69 C70 C71 C72 C95 C94
VCC[20] VCC122AON_MEM[20]

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
J21 G1
VCC[21] VCC122AON_MEM[21] 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
J23 J1
+V_VCC K22 VCC[22] VCC122AON_MEM[22] R39
K24 VCC[23] VCC122AON_MEM[23] U39
L21 VCC[24] VCC122AON_MEM[24] W1
L23 VCC[25] VCC122AON_MEM[25] AL29
L25 VCC[26] VCC122AON_MEM[26] AW29
L27 VCC[27] VCC122AON_MEM[27] AK10
1 1 1 1 1 1 VCC[28] VCC122AON_MEM[28]
@ @ M20 AL1
C73 C74 C75 C76 C97 C96 M22 VCC[29] VCC122AON_MEM[29] AA1
M24 VCC[30] VCC122AON_MEM[30] Y10
2 2 2 2 2 2 VCC[31] VCC122AON_MEM[31]
0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

M26 A15
N19 VCC[32] VCC122AON_MEM[32] J13
N21 VCC[33] VCC122AON_MEM[33] A33
N23 VCC[34] VCC122AON_MEM[34] H28
N25 VCC[35] VCC122AON_MEM[35] AG39
VCC[36] VCC122AON_MEM[36] 1 1 1 1 1 1 1 1 1 1
N27 AH30
P20 VCC[37] VCC122AON_MEM[37] C592 C593 C594 C595 C596 C597 C598 C599 C600 C601
P22 VCC[38]
VCC[39] 2 2 2 2 2 2 2 2 2 2

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
P26
R19 VCC[40]
C VCC[41] C
R21
R23 VCC[42]
R27 VCC[43]
TOP Side_close U1 VCC[44]
T22
T24 VCC[45]
U19 VCC[46]
U23 VCC[47]
U27 VCC[48]
V22 VCC[49]
V24 VCC[50]
W19 VCC[51]
W27 VCC[52]
VCC[53]

TP96 SVID_CLKSYNC R33 2 C34 2 C35 2 C36 2 C37 2 C38 1 1 1


26 SVID_CLKSYNC P38 SVID_CLKSYNCH
TP97 SVID_DIN
26 SVID_DIN SVID_DIN AA13 C589 C590 C591
VNN_VSSSENSE

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
N35 Y14
26 SVID_CLKOUT SVID_CLKOUT VNNSENSE VNNPUSENSE 28 1 1 1 1 1 2 2 2

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
TP99 SVID_CLKOUT P32
26 SVID_DOUT SVID_DOUT
TP98 SVID_DOUT R25
VCC_VSSSENSE VSSPUSENSE 28
P24
VCCSENSE VCCPUSENSE 28

B B

Power Rail FFRD Hyprid 0.91 FFRD SLATE 1.1 Tango1116 Coach Coach 1121
VNN 0.47uF x 7 (@2) 0.47uF x 7 (@2) 0.47uF x 16 (@10) 0.47uF x 15 (@1) 0.47uF x 8 / 2.2uF x 4
VNNAON 0.47uF x 5 0.47uF x 6 0.47uF x 9 (@7) 0.47uF x 9 (@1) 0.47uF x 4 / 2.2uF x 2
VCC 0.47uF x 11 (@3) 0.47uF x 10 (@2) 0.47uF x 12 (@4) 0.47uF x 12 (@4) 0.47uF x 12 (@4)
VCC108 0.47uF x 7 0.47uF x 7 0.47uF x 7 0.47uF x 7 0.47uF x 4 / 2.2uF x 1
VCC108AS 0.47uF x 2(@1) 0.47uF x 2(@1) 0.47uF x 2 0.47uF x 2 0.47uF x 2
VCC108AON 0.47uF x 2 0.47uF x 2 0.47uF x 5 (@3) 0.47uF x 5 (@3) 0.47uF x 5 (@3)
VCC122_180AON_I2C/I2S 0.47uF x 12 0.47uF x 13 0.47uF x 13 0.47uF x 13 0.47uF x 7 / 2.2uF x 3
VCC180AON_SRAM
A A

VCC122AON 0.47uF x 25 0.47uF x 25 0.47uF x 24 0.47uF x 24


VDD2 0.47uF x 9 0.47uF x 10 0.47uF x 23 / 2.2uF x 10
VCC122AON_MEM 0.47uF x 14 0.47uF x 14 0.47uF x 24(@9) 0.47uF x 24
VCCA100 0.47uF x 7 0.47uF x 7 0.47uF x 7 0.47uF x 7 0.47uF x 7
VCCA100AS 0.47uF x 3 0.47uF x 3 0.47uF x 5 (@2) 0.47uF x 5 (@2) 0.47uF x 5 (@2)
VCCSDIO 0.47uF x 2 0.47uF x 2 0.47uF x 2 (@2) 0.47uF x 2 (@2) 0.47uF x 2 (@2) Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title
VDD1 0.47uF x 10 0.47uF x 10 0.47uF x 10 0.47uF x 10 0.47uF x 5 / 2.2uF x2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CLOVERVIEW (5 OF 6)
VCC330 0.47uF x 1 0.47uF x 1 0.47uF x 3 (@2) 0.47uF x 3 (@2) 0.47uF x 3 (@2) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 9 of 35
5 4 3 2 1
5 4 3 2 1

@
D U1G D
A1 AU9
A5 VSS[0] VSS[86] AV2
AA11 VSS[1] VSS[87] AV32
AA31 VSS[2] VSS[88] AV38
AB10 VSS[3] VSS[89] AW39
AB14 VSS[4] VSS[90] B2
AB18 VSS[5] VSS[91] B38
AB20 VSS[6] VSS[92] C11
AB26 VSS[7] VSS[93] C15
AB28 VSS[8] VSS[94] C19
AB34 VSS[9] VSS[95] C27
+V_VNN +V_VNN AB38 VSS[10] VSS[96] C29
@ AC13 VSS[11] VSS[97] C31
3.5A U1H VSS[12] VSS[98]
AC31 D34
AC37 VSS[13] VSS[99] D6
AA15 AW21 AC9 VSS[14] VSS[100] E7
AA17 VNN[0] VNN[42] L11 AD10 VSS[15] VSS[101] F12
AB16 VNN[1] VNN[43] L13 AD14 VSS[16] VSS[102] F14
AC15 VNN[2] VNN[44] L15 AD20 VSS[17] VSS[103] F18
AC17 VNN[3] VNN[45] L17 AD22 VSS[18] VSS[104] F20
AD16 VNN[4] VNN[46] N13 AD24 VSS[19] VSS[105] F26
AD18 VNN[5] VNN[47] N15 AD26 VSS[20] VSS[106] G11
AE15 VNN[6] VNN[48] P12 AD28 VSS[21] VSS[107] G25
AE17 VNN[7] VNN[49] P14 AD30 VSS[22] VSS[108] G29
AE19 VNN[8] VNN[50] P16 AD32 VSS[23] VSS[109] G37
AE21 VNN[9] VNN[51] P4 AD38 VSS[24] VSS[110] G5
AE23 VNN[10] VNN[52] P8 AD6 VSS[25] VSS[111] G7
AE25 VNN[11] VNN[53] R1 AE13 VSS[26] VSS[112] H10
AE27 VNN[12] VNN[54] R11 AE29 VSS[27] VSS[113] H2
AF14 VNN[13] VNN[55] R13 AE3 VSS[28] VSS[114] H30
AF16 VNN[14] VNN[56] R15 AE31 VSS[29] VSS[115] H34
AF18 VNN[15] VNN[57] R17 AE9 VSS[30] VSS[116] H8
AF20 VNN[16] VNN[58] R3 AF10 VSS[31] VSS[117] J19
AF22 VNN[17] VNN[59] R5 AF12 VSS[32] VSS[118] J25
AF24 VNN[18] VNN[60] R7 AF34 VSS[33] VSS[119] J29
AF26 VNN[19] VNN[61] R9 AF8 VSS[34] VSS[120] J3
AG13 VNN[20] VNN[62] T10 AG11 VSS[35] VSS[121] J31
C VNN[21] VNN[63] VSS[36] VSS[122] C
AG15 T12 AG17 K12
AG19 VNN[22] VNN[64] T14 AG21 VSS[37] VSS[123] K14
AG23 VNN[23] VNN[65] T16 AG25 VSS[38] VSS[124] K16
AG27 VNN[24] VNN[66] T2 AG29 VSS[39] VSS[125] K20
AH14 VNN[25] VNN[67] T4 AG31 VSS[40] VSS[126] K26
AH16 VNN[26] VNN[68] T6 AG37 VSS[41] VSS[127] K8
AH18 VNN[27] VNN[69] T8 AG7 VSS[42] VSS[128] L3
AH20 VNN[28] VNN[70] U1 AH10 VSS[43] VSS[129] L31
AH22 VNN[29] VNN[71] U11 AH12 VSS[44] VSS[130] L37
AH24 VNN[30] VNN[72] U13 AH28 VSS[45] VSS[131] M14
AH26 VNN[31] VNN[73] U15 AH34 VSS[46] VSS[132] M16
AJ13 VNN[32] VNN[74] U17 AH6 VSS[47] VSS[133] M18
AJ15 VNN[33] VNN[75] U3 AJ29 VSS[48] VSS[134] M28
AJ17 VNN[34] VNN[76] U5 AJ3 VSS[49] VSS[135] M30
AJ19 VNN[35] VNN[77] U7 AJ31 VSS[50] VSS[136] M6
AJ21 VNN[36] VNN[78] U9 AK12 VSS[51] VSS[137] P10
AJ23 VNN[37] VNN[79] V16 AK14 VSS[52] VSS[138] P18
AJ25 VNN[38] VNN[80] W15 AK16 VSS[53] VSS[139] P2
AJ27 VNN[39] VNN[81] W17 AK18 VSS[54] VSS[140] P28
AW19 VNN[40] VNN[82] Y16 AK20 VSS[55] VSS[141] P30
VNN[41] VNN[83] AK22 VSS[56] VSS[142] P34
AK24 VSS[57] VSS[143] P6
AK26 VSS[58] VSS[144] R31
AL11 VSS[59] VSS[145] R37
AL13 VSS[60] VSS[146] T18
AL15 VSS[61] VSS[147] T20
AL31 VSS[62] VSS[148] T28
AL37 VSS[63] VSS[149] T30
AL9 VSS[64] VSS[150] U31
AM36 VSS[65] VSS[151] V12
+V_VNN AN3 VSS[66] VSS[152] V18
AP10 VSS[67] VSS[153] V2
AP14 VSS[68] VSS[154] V28
AP18 VSS[69] VSS[155] V30
AP22 VSS[70] VSS[156] V34
AP26 VSS[71] VSS[157] W13
2 C77 2 C78 2 C79 2 C80 1 1 1 1 1 1 1 1 VSS[72] VSS[158]
B
AP30 W25 B
C84 C93 C91 C92 C382 C416 C432 C433 AP34 VSS[73] VSS[159] W31
VSS[74] VSS[160]
2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

AP6 W37
1 1 1 1 2 2 2 2 2 2 2 2 VSS[75] VSS[161]
0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K

2200P_0201_50V7K

0.47U_0201_6.3V6K

0.47U_0201_6.3V6K
AR37 Y12
AR39 VSS[76] VSS[162] Y18
AT12 VSS[77] VSS[163] Y20
AT4 VSS[78] VSS[164] Y22
AU13 VSS[79] VSS[165] Y24
AU17 VSS[80] VSS[166] Y26
AU21 VSS[81] VSS[167] Y28
AU25 VSS[82] VSS[168] Y30
AU29 VSS[83] VSS[169] Y34
AU39 VSS[84] VSS[170] Y6
VSS[85] VSS[171]

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CLOVERVIEW (6 OF 6)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 10 of 35
5 4 3 2 1
5 4 3 2 1

+V_1P22_VCCAON +V3.3A
D D

SN74AVC4T774 1

2
1
C558 R842 R861
U21 C559 10K_0402_5% 10K_0402_5%
CONTROL INPUTS OUTPUT CIRCUITS 2
0.1U_0201_10V6K
@ @
OPERATION 13
SN74AVC4T774RSVR 14 2
0.1U_0201_10V6K

1
VCCB VCCA
OE# DIR A PORT B PORT QFN
R841 1 @ 2 0_0201_1% SPI_0_CLK_R 12 1 SPI_0_CLK_DEBUG SPI_0_CLK_DEBUG 25
26,5 SPI_0_CLK 11 B1 A1 2
SPI_0_SDO SPI_0_SDO_DEBUG
L L Enabled Hi-Z B data to A data 26,5 SPI_0_SDO
SPI_0_SS0 10 B2 A2 3 SPI_0_SS0_DEBUG
SPI_0_SDO_DEBUG 25
26,5 SPI_0_SS0 B3 A3 SPI_0_SS0_DEBUG 25
SPI_0_SDI 9 4 SPI_0_SDI_DEBUG
L H Hi-Z Enabled A data to B data 26,5 SPI_0_SDI B4 A4 SPI_0_SDI_DEBUG 25
15 7 SPI0_DBG_EN#
H X Hi-Z Hi-Z Isolation DIR1 QE

2
16
DIR2

2
5
DIR3

2
6 8 R847 R858 EMC@
DIR4 GND 10K_0402_5% 10K_0402_5% D52
EMC@ TVNST52302AB0_SOT523-3
D51 SN74AVC4T774_UQFN16_2P6X1P8

1
TVNST52302AB0_SOT523-3
R848 1 2 0_0201_5% SPI_0_SS0_DEBUG

1
EMC request 04/15
EMC request 04/15
R923 1 @ 2 0_0201_5%

C C

+V_1P80_VCCAON +V3.3A

1
1
R947
R950 10K_0201_5%
10K_0201_5%

2
if without XDP

2
just SPI_1_SS2 used

G
to SOC (1.8V)
Q19 to SPI ROM (1.8V)
SPI_1_SS2 3 1 SPI_1_SS2_DEBUG
5 SPI_1_SS2

D
S TR BSS138W 1N SOT-323-3

SPI_1_SS2 R930 1 XDPA@ 2 0_0201_5% SPI_1_SS2_DEBUG_XDP SPI_1_SS2_DEBUG_XDP 25


SPI_1_SS1 R928 1 XDPA@ 2 0_0201_5% SPI_1_SS1_DEBUG
5 SPI_1_SS1 SPI_1_SS1_DEBUG 25
SPI_1_SS3 R929 1 XDPA@ 2 0_0201_5% SPI_1_SS3_DEBUG
5 SPI_1_SS3 SPI_1_SS3_DEBUG 25
SPI_1_SS4 R931 1 XDPA@ 2 0_0201_5% SPI_1_SS4_DEBUG
5 SPI_1_SS4 SPI_1_SS4_DEBUG 25

B B

U23
SPI_0_SDO_DEBUG 5 2 SPI_0_SDI_DEBUG
D Q
SPI_0_CLK_DEBUG 6
C
SPI_1_SS2_DEBUG 1
S
R856 1 2 3.32K_0402_1% SPI_NOR_3P3_HOLD# 7
HOLD
R857 1 2 3.32K_0402_1% SPI_NOR_3P3_WP# 3
+V3.3A W
8 4
VCC VSS
1
C562 S IC FL 4M W25X40CLSNIG SOIC 8P SPI
0.1U_0201_10V6K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SPI NOR FLASH
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02 0.2
Date: Tuesday, April 16, 2013 Sheet 11 of 35
5 4 3 2 1
5 4 3 2 1

19.2 MHz OSC


DISP_BRDG_RESET_N R627 1 2 0_0201_5% DISP_BRDG_STDBY_N
+V_1P80_VCCAON
R628 1 @ 2 0_0201_5%
5 DISP_STBY#
1
0320 EMI request XEMC@
1 C52
U5A

1000P_0201_16V7K
@ C513
0.01U_0201_10V7K 2 DISP_BRDG_RESET_N D8
5 DISP_BRDG_RESET_N RESET_N

1
@ B3 MDSI_A_CLK_DP
2 H10 DRXCP C3 MDSI_A_CLK_DP 5
R952 DISP_PWR_DOWN MDSI_A_CLK_DN
X1 5 DISP_PWR_DOWN PD DRXCN B4 MDSI_A_CLK_DN 5
10K_0201_5% @ MDSI_A_DATA0_DP
J7 DRXD0P C4 MDSI_A_DATA0_DP 5
OSC @ R12 DISP_BRDG_STDBY_N MDSI_A_DATA0_DN
4 3 1 2 STANBY_N DRXD0N C2 MDSI_A_DATA0_DN 5
D CLKIN <BOM Structure> MDSI_A_DATA1_DP D
MDSI_A_DATA1_DP 5

2
VDD OUT DISP_CLKIN 1 2 CLKIN C1 DRXD1P B2 MDSI_A_DATA1_DN
1 2 0_0201_5%
25 DISP_CLKIN CLKIN DRXD1N C5 MDSI_A_DATA2_DP
MDSI_A_DATA1_DN 5 From SOC(U1)
ENABLE GND A8 DRXD2P B5 MDSI_A_DATA2_DP 5
R95 0_0201_5% DISP_BRDG_CLKSEL MDSI_A_DATA2_DN
CLKSEL DRXD2N A3 MDSI_A_DATA2_DN 5
MDSI_A_DATA3_DP
C7 DRXD3P A2 MDSI_A_DATA3_DP 5
19.2MHZ_15PF_8W19200005 DISP_BRDG_VCSEL_1 MDSI_A_DATA3_DN
C8 VCSEL[1] DRXD3N MDSI_A_DATA3_DN 5
DISP_BRDG_VCSEL_0
VCSEL[0] H2 LVDS_CH_1_CLK_P
+V_1P80_VCCAON
DISP_BRDG_LANSEL_0 B7
BRIDGE LTX0CP H3 LVDS_CH_1_CLK_N
LVDS_CH_1_CLK_P 13
LANESEL[0] LTX0CN LVDS_CH_1_CLK_N 13
DISP_BRDG_LANSEL_1 A7
LANESEL(1) UPD60802 LTX0D0P
F2
F3
LVDS_CH_1_DATA0_P
LVDS_CH_1_DATA0_N
LVDS_CH_1_DATA0_P 13
1 R634 2 L9 LTX0D0N G2 LVDS_CH_1_DATA0_N 13
DISP_BRDG_TE_R LVDS_CH_1_DATA1_P
5 DISP_BRDG_TE
0_0201_5% TE LTX0D1P G3 LVDS_CH_1_DATA1_N
LVDS_CH_1_DATA1_P 13 to LVDS conn.(JLVDS1)
CLock selection J9
INT
LTX0D1N
LTX0D2N
J2 LVDS_CH_1_DATA2_N
LVDS_CH_1_DATA1_N
LVDS_CH_1_DATA2_N
13
13

1
J3 LVDS_CH_1_DATA2_P
K9 LTX0D2P H1 LVDS_CH_1_DATA2_P 13
R646 R645 DISP_BRDG_PWM LVDS_CH_1_DATA3_P
13,26 DISP_BRDG_PWM PWM LTX0D3P J1 LVDS_CH_1_DATA3_P 13
1K_0201_5% 1K_0201_5% LVDS_CH_1_DATA3_N
L8 LTX0D3N LVDS_CH_1_DATA3_N 13
K8 GPIO[0]
* CLKSEL=0, CLKIN=19.2MHz

2
J8 GPIO[1] K4
H9 GPIO[2] LTX1CP L4
CLKSEL=1, CLKIN=26MHz GPIO[3] LTX1CN L2
DISP_BRDG_CLKSEL LTX1D0P K2
I2C_0_SDA_BRDG K7 LTX1D0N K3
SDA LTX1D1P L3
LTX1D1N
1

I2C_0_SCL_BRDG L7 K5
R635 SCL LTX1D2P L5
R640 1 2 10K_0201_5% DISP_BRDG_TEST_I_0 C10 LTX1D2N M3
100K_0201_5%
no used I2C ,just pull up R641 1 2 10K_0201_5% DISP_BRDG_TEST_I_1 D9 TEST_I[0]
TEST_I[1]
LTX1D3P
LTX1D3N
M4
R642 1 2 10K_0201_5% DISP_BRDG_TEST_I_2 D10
2

R643 1 2 10K_0201_5% DISP_BRDG_TEST_I_3 A9 TEST_I[2]


R644 1 2 10K_0201_5% DISP_BRDG_TEST_I_4 B8 TEST_I[3] G9
TEST_I[4] InternalConnect
H7
TEST_O[0]

1
F8 C6
G8 TEST_O[1] Open E7 R951
M7 TEST_O[2] Open M9 10K_0201_5%
TEST_O[3] Open
C
Virtual Channel Setting C

2
UPD60802AF1-A11-BND_PBGA144
DISP_BRDG_VCSEL_1

DISP_BRDG_VCSEL_0
1

R636 R637
100K_0201_5% 100K_0201_5%
2

+V_1P80_VCCAON +V_1P80_VCCAON
U5B
A11 A4 C447 1 2 0.1U_0201_6.3V6K
C448 2 1 2.2U_0402_6.3V6M B1 VDDIO VDD_MIPI D5 C449 1 2 0.1U_0201_6.3V6K
Virtual Channel Setting (VCSEL[1:0]) C450 2 1 2.2U_0402_6.3V6M B6 VDDIO
VDDIO
VDD_MIPI
VDD_MIPI
E6
B11 +V_1P80_VCCAON
C9 VDDIO H5
VCSEL[1:0] pin DSI-RX Setting E3 VDDIO VDD_LVDS H6
G6 VDDIO VDD_LVDS G5 C451 1 2 0.1U_0201_6.3V6K
H8 VDDIO VDD_LVDS M2 C452 1 2 0.1U_0201_6.3V6K
* 00 Virtual channel for Tremolo-2 sets to 0 M8 VDDIO VDD_LVDS
+V_1P80_VCCAON M11 VDDIO J11
VDDIO VR_EDVDD_1 K11 C453 1 2 4.7U_0402_6.3V6M
01 Virtual channel for Tremolo-2 sets to 1 D4 VR_EDVDD_1 L11
E4 AVDD_1 VR_EDVDD_1
1 AVDD_1
+V_1P80_VCCAON

C455
10 Virtual channel for Tremolo-2 sets to 2 J12 E11
K12 AVDD_2 VR_EDVDD_2 F11 C457 1 2 4.7U_0402_6.3V6M
L12 AVDD_2 VR_EDVDD_2 G11
1 1 AVDD_2 VR_EDVDD_2
2 +V_1P80_VCCAON

C456

C458
11 Virtual channel for Tremolo-2 sets to 3 F12
G12 AVDD_3 A5 C461 1 2 1U_0201_6.3V6M
AVDD_3 MIPI_EX12V

0.1U_0201_6.3V6K
B 1 1 H11 B
2 2 VSS

C459

C460
A1
VSS

0.1U_0201_6.3V6K

0.1U_0201_6.3V6K
C462 1 2 4.7U_0402_6.3V6M E1 A6
Data Lane Setting 2 2
E2 VR_RVDD
VR_RVDD BRIDGE
VSS
VSS
A10
A12
VSS
VR_PLLVDD UPD60802

0.1U_0201_6.3V6K
C463 1 2 2.2U_0402_6.3V6M F5 B9
VSS B10
+V_1P80_VCCAON VSS

0.1U_0201_6.3V6K
L1 1 2SUPPRE_ BLM15AX601SN1D F4 B12
VR_PLLVDD_LVDS VSS C11
K1 VSS C12
VDD_PLL_LVDS VSS D1
1 1 VSS

C464

C465
L1 D6
VSS_PLL_LVDS VSS D7
D2 VSS D11
VSSI_1 VSS
1

2 2

0.1U_0201_6.3V6K
D3 D12
R632 R633 F1 VSSI_1 VSS E8
VSSI_1 VSS

1
0.01U_0201_10V7K
100K_0201_5% 100K_0201_5% L2 J10 E9
K10 VSSI_2 VSS E12
VSSI_2 VSS

SUPPRE_ BLM15AX601SN1D
L10 F6
2

E10 VSSI_2 VSS F7


F10 VSSI_3 VSS F9
DISP_BRDG_LANSEL_1 G10 VSSI_3 VSS G1

2
DISP_BRDG_LANSEL_0 VSSI_3 VSS G4
E5 VSS G7
VSS_PLL VSS H4
M12 VSS H12
M10 VSS AVDD_3 J4 +V_1P80_VCCAON
M6 VSS VSS J5
Data Lane Setting (LANSEL[1:0]) M5 VSS
VSS
VSS
VSS
J6
M1 K6
VSS VSS L6
LANSEL[1:0] pin DSI-RX Setting VSS

00 1-Datalane: DRXCP/N,DRXD0P/N Valid UPD60802AF1-A11-BND_PBGA144

DRXD1P, DRXD1N PIN should be left OPEN


DRXD2P, DRXD2N PIN should be left OPEN
A A
DRXD3P, DRXD3N PIN should be left OPEN

01 2-Datalane: DRXCP/N,DRXD0P/N DRXD1P/N Valid


DRXD2P, DRXD2N PIN should be left OPEN
DRXD3P, DRXD3N PIN should be left OPEN
10 Reserved Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title
4-Datalane:DRXCP/N,DRXD0P/N,DRXD1P/N LVDS Bridge
* 11 DRXD2P/N,DRXD3P/N Valid THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02 0.2
Date: Thursday, April 11, 2013 Sheet 12 of 35
5 4 3 2 1
5 4 3 2 1

D D

+V3.3A +VDD_3P3 CONN@


U6 ACES_88194-3041
30 32
A2 A1 29 30 GND 31
B2 VIN_A2 VOUT_A1 B1 +VDD_3P3 28 29 GND
VIN_B2 VOUT_B1 10K_0201_5% 1 2 R673 STBY# 27 28
1 2 2 1 27
C466 C469 10K_0201_5% 1 2 R674 RESET 26
C467 C468 25 26
4.7U_0402_6.3V6M 4.7U_0402_6.3V6M LVDS_CH_1_DATA0_N 24 25
0.1U_0201_10V6K 0.1U_0201_10V6K 12 LVDS_CH_1_DATA0_N 24
2 1 1 2 LVDS_CH_1_DATA0_P 23
12 LVDS_CH_1_DATA0_P 22 23

0.1U_0201_10V6K
1 22
LVDS_CH_1_DATA1_N 21
12 LVDS_CH_1_DATA1_N 20 21

C470
LVDS_CH_1_DATA1_P
C2 12 LVDS_CH_1_DATA1_P 19 20
PMIC_PANEL_EN
26 PMIC_PANEL_EN ON 2 18 19
LVDS_CH_1_CLK_N
C1 12 LVDS_CH_1_CLK_N 17 18
LVDS_CH_1_CLK_P
GND 12 LVDS_CH_1_CLK_P 17

1
16
R655 LVDS_CH_1_DATA2_N 15 16
12 LVDS_CH_1_DATA2_N 14 15
100K_0201_5% TPS22924CYZPR_DSBGA6 LVDS_CH_1_DATA2_P
12 LVDS_CH_1_DATA2_P 13 14
LVDS_CH_1_DATA3_N 12 13
12 LVDS_CH_1_DATA3_N
2

LVDS_CH_1_DATA3_P 11 12
12 LVDS_CH_1_DATA3_P 10 11
UPDN 9 10
SHLR 8 9
7 8
6 7
5 6
+Panel_PWR 4 5
3 4
31 +Panel_FB 3
2
1 2
1
JLVDS1
change to (0,0) strap seting 0315
C C

+VDD_3P3
to backlight power
boost circuit

2
+V_1P80_VCCAON +V3.3A

10K_0201_5%

10K_0201_5%
R675 R678
@ @

1
1

SHLR
R662 R660 UPDN
10K_0201_5% 10K_0201_5%

2
10K_0201_5%

20K_0201_5%
@ R676 R684
<BOM Structure>
2

2
2
G

Q3
3 1 LCD_PWM
12,26 DISP_BRDG_PWM LCD_PWM 31

1
S

S TR BSS138W 1N SOT-323-3
to backlight boost circuit

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS CONNECTOR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 13 of 35
5 4 3 2 1
5 4 3 2 1

HDMI Hot plug circuit EDID I2C level shift

+V_5P00_HDMI_CONN
D
+V_1P22_VCCAON +V_1P22_VCCAON D

1
2

1
R918 R917 2K_0402_1%
2K_0402_1%

1
10K_0402_5% 10K_0402_5% R915
R677 R916
+V_5P00_HDMI_CONN

2
@ 1K_0201_5% +V_1P22_VCCAON

2
1
C R1095
Q85 2 1 2HDMI_HPD_CONN U31

2
MMBT3904_NL_SOT23-3 B 15K_0201_1% 1 8 R914 1 2 200K_0201_5%
E GND EN

3
HDMI_HPD 2 7 @ C582 1 2 0.1U_0201_10V6K
5 HDMI_HPD VREF1 VREF2

2
R913 I2C_3_SCL_HDMI 3 6 SCL_HDMI_CONN
5 I2C_3_SCL_HDMI SCL1 SCL2

2
10K_0201_5%
R912 I2C_3_SDA_HDMI 4 5 SDA_HDMI_CONN
5 I2C_3_SDA_HDMI SDA1 SDA2
10K_0201_5%

1
to SOC (1.22V) to HDMI CONN (5V)

1
PCA9306DCUR_VSSOP8

Check SMBUS pull high vaule

C C

HDMI 5V protection and connector HDMI ESD protection

EMC@ D39
HDMI_CLK_DP 9 1 HDMI_CLK_DP

+V5S HDMI_CLK_DN 8 2 HDMI_CLK_DN

HDMI_DATA0_DN 7 4 HDMI_DATA0_DN

U34 HDMI_DATA0_DP 6 5 HDMI_DATA0_DP

3 +V_5P00_HDMI_CONN
VOUT
1
1 3
VIN C475
2 1U_0402_6.3V6K TVWDF1004AD0_DFN9
GND 2

APL3517AI-TRG_SOT23-3
JHDMI1 CONN@
19
SDA_HDMI_CONN 18 +5V
SCL_HDMI_CONN 17 SDA
16 SCL
15 DDC/CEC_GND EMC@ D40
HDMI_CLK_DN 14 CEC HDMI_DATA2_DN 9 1 HDMI_DATA2_DN
5 HDMI_CLK_DN 13 CK-
HDMI_CLK_DP 12 CK_Shield HDMI_DATA2_DP 8 2 HDMI_DATA2_DP
5 HDMI_CLK_DP 11 CK+ 23
HDMI_DATA0_DN
5 HDMI_DATA0_DN 10 D0- GND3 22 7 4
HDMI_DATA1_DP HDMI_DATA1_DP
HDMI_DATA0_DP 9 D0_Shield GND2 21
B 5 HDMI_DATA0_DP D0+ GND1 B
HDMI_DATA1_DN 8 20 HDMI_DATA1_DN 6 5 HDMI_DATA1_DN
5 HDMI_DATA1_DN 7 D1- GND0
HDMI_DATA1_DP 6 D1_Shield
5 HDMI_DATA1_DP 5 D1+
HDMI_DATA2_DN
5 HDMI_DATA2_DN 4 D2- 3
HDMI_DATA2_DP 3 D2_Shield
5 HDMI_DATA2_DP 2 D2+ TVWDF1004AD0_DFN9
HDMI_HPD_CONN 1 Utility
HP_DET
BELLW_80082-4021

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 14 of 35
5 4 3 2 1
5 4 3 2 1

2M front Camera

+V_2P80_VPROG2
L10
2 1 +AVDD_2.8V_2M
D BLM18PG121SN1D_0603 JFCAM1 D
1 1 CONN@
1 2 +AVDD_2.8V_2M
C478 C479 3 1 2 4 +VDDIO_1.8V
5 3 4 6 CSB_SNSCLK2
10P_0201_50V8J 0.1U_0201_10V6K 5 6 CSB_SNSCLK2 25
2 2 7 8 CAM_1_RST_N
9 7 8 10 CAM_1_RST_N 5
I2C_4_SDA I2C_4_SCL
5 I2C_4_SDA 11 9 10 12 I2C_4_SCL 5
CAM_1_PWRDWN
5 CAM_1_PWRDWN 13 11 12 14
MCSI_1_CLK_DP 15 13 14 16 MCSI_1_CLK_DN
5 MCSI_1_CLK_DP 15 16 MCSI_1_CLK_DN 5 1
+V_1P80_VCCAON 1 17 18 MCSI_1_DATA_DP 1
L9 17 18 MCSI_1_DATA_DP 5
5 MCSI_1_DATA_DN MCSI_1_DATA_DN 19 20 C519
2 1 +VDDIO_1.8V C485 21 19 20 C518
21 10P_0201_50V8J
BLM18PG121SN1D_0603 22 2
1 1 10P_0201_50V8J GND 10P_0201_50V8J
2 23 2
C476 C477 GND
10P_0201_50V8J 0.1U_0201_10V6K
2 2
HRS_FH35C-21S-0P3SHW(50)
RF request 0221 RF request 0222
RF request 0221

2M rear Camera
+V_2P80_VPROG1
L26
<BOM Structure>
2 1 +AVDD_2.8V_8M
C BLM18PG121SN1D_0603 C
1 1
<BOM Structure>
C616 C614
10P_0201_50V8J 0.1U_0201_10V6K
2 2 JRCAM2
CONN@
1 2
MCSI_4_DATA0_DN 3 1 2 4 MCSI_4_DATA0_DP
5 MCSI_4_DATA0_DN 3 4 MCSI_4_DATA0_DP 5
5 6 MCSI_4_CLK_DN
5 6 MCSI_4_CLK_DN 5
MCSI_4_CLK_DP 7 8
+V_1P80_VCCAON 5 MCSI_4_CLK_DP 7 8
9 10
CAM_0_PWRDWN 11 9 10 12 I2C_1_SCL
5 CAM_0_PWRDWN 13 11 12 14 I2C_1_SCL 5
L27 I2C_1_SDA CAM_0_RST_N
5 I2C_1_SDA 15 13 14 16 CAM_0_RST_N 5
<BOM Structure> CSB_SNSCLK1
2 1 17 15 16 18 CSB_SNSCLK1 25
+VCM_PWR +VCM_PWR
BLM18PG121SN1D_0603 19 17 18 20 +AVDD_2.8V_8M
21 19 20
1 1 1 21 1 1
<BOM Structure> 22
C613 C615 C520 GND 23 C521 C522
GND
10P_0201_50V8J 0.1U_0201_10V6K 10P_0201_50V8J 10P_0201_50V8J 10P_0201_50V8J
2 2 2 2 2
HRS_FH35C-21S-0P3SHW(50)

RF request 0221 RF request 0222


RF request 0223

Rear Camera LED


B
Front Camera LED B

+V_1P80_VCCAON
+V_1P80_VCCAON +V3.3S +V3.3S
+V3.3S
LED3

2
+V3.3S R682
LED2
2

2
R679 <BOM Structure> <BOM Structure> R683 <BOM Structure> <BOM Structure>
10K_0201_5%
2

R680 <BOM Structure> R1096 FRONTCAM_LED# 1 R1100 2 1 2


10K_0201_5% REARCAM_LED# 1 2 1 2 100K_0201_5% 300_0402_1%
100K_0201_5%

2
G
300_0402_1% <BOM Structure>

1
2

3
G

Q17 S
S LED LTW-C193TS5 0603 WHITE
1

1
3

Q10 S CAM_1_PWRDWN 3 1 CAM_1_PWRDWN_3P3 2 <BOM Structure>


S LED LTW-C193TS5 0603 WHITE
1

CAM_0_PWRDWN 3 1 CAM_0_PWRDWN_3P3 2 G

D
G <BOM Structure> D S TR DMG2301U-7 1P SOT23-3
S

1
D S TR DMG2301U-7 1P SOT23-3 S TR BSS138W 1N SOT-323-3
1

S TR BSS138W 1N SOT-323-3 Q18


Q9

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Camera
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02 0.2
Date: Friday, April 12, 2013 Sheet 15 of 35
5 4 3 2 1
5 4 3 2 1

eMMC R943 1 2 0_0402_5% +V_2P85_U12_EMMC +V_1P80_VCCAON


+V3.3A
+V_2P85_EMMC1 R832 1 2 0_0402_5% 2.7~3.6V
@

22U_0603_6.3V6M

0.1U_0201_10V6K
2
1 2
C554

C552

C553
0.1U_0201_10V6K
1
2 1

D D

AA3
AA5
T10

W4
M6
N5

U9

K6

Y4
U20 @
A4

VCC
VCC
VCC
VCC

VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
A6 NC
A9 NC
A11 NC W5 EMMC_0_CMD
B2 NC CMD EMMC_0_CMD 6
B13 NC
D1 NC
NC
EMI request 11/29
D14
H1 NC U5 EMMC_GPO_RST0
H2 NC RST_n EMMC_GPO_RST0 7
H6 NC W6 EMMC_0_CLK_R R837 1 @ 2 0_0201_1%
H7 NC CLK EMMC_0_CLK 6
H8 NC
NC

1
H9 XEMC@
H10 NC C566
H11 NC 68P_0201_25V8

2
H12 NC H3 EMMC_0_DATA0
H13 NC DAT0 H4 EMMC_0_DATA0 6
EMMC_0_DATA1
H14 NC DAT1 H5 EMMC_0_DATA1 6
EMMC_0_DATA2
J1 NC DAT2 J2 EMMC_0_DATA2 6
EMMC_0_DATA3
J7 NC DAT3 J3 EMMC_0_DATA3 6
EMMC_0_DATA4
J8 NC DAT4 J4 EMMC_0_DATA4 6
EMMC_0_DATA5
J9 NC DAT5 J5 EMMC_0_DATA5 6
EMMC_0_DATA6
J10 NC DAT6 J6 EMMC_0_DATA6 6
EMMC_0_DATA7
J11 NC DAT7 EMMC_0_DATA7 6
J12 NC
J13 NC K2
J14 NC VDDi
NC 2
K1
K3 NC U1 C555
K5 NC NC U2
NC NC 0.1U_0201_10V6K
K7 U3 1
K8 NC NC U6
C NC NC C
K9 U7
K10 NC NC U10
K11 NC NC U12
K12 NC NC U13
K13 NC NC U14
K14 NC NC V1
L1 NC NC V2
L2 NC NC V3
L3 NC NC V12
L4 NC NC V13
L12 NC NC V14
L13 NC NC W1
L14 NC NC W2
M1 NC NC W3
M2 NC NC W7
M3 NC NC W8
M5 NC NC W9
M8 NC NC W10
M9 NC NC W11
M10 NC NC W12
M12 NC NC W13
M13 NC NC W14
M14 NC NC Y1
N1 NC NC Y3
N2 NC NC Y6
N3 NC NC Y7
N10 NC NC Y8
N12 NC NC Y9
N13 NC NC Y10
N14 NC NC Y11
P1 NC NC Y12
P2 NC NC Y13
P3 NC NC Y14
P10 NC NC AA1
P12 NC NC AA2
P13 NC NC AA7
1 NC NC
B
P14 AA8 1 B
C556 R1 NC NC AA9
R2 NC NC AA10 C557
1U_0201_6.3V6M NC NC
2 R3 AA11
@ NC NC 1U_0201_6.3V6M
R5 AA12 2
NC NC @
R12 AA13
R13 NC NC AA14
R14 NC NC AE1
T1 NC NC AE14
T2 NC NC AG2
T3 NC NC AG13
T5 NC NC AH4
T12 NC NC AH6
T13 NC NC AH9
T14 NC NC AH11
NC NC
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS
VSS
VSS
VSS
KLMCG8GE4A-A001_FBGA169
AA6
AA4
Y5
Y2
K4

U8
R10
P5
M7
64G 32G 16G

e41MSAM64G@ e41MSAM32G@ e41MHYN16G@


U20 U20 U20

V4.41

S IC FL 64G KLMCG8GE4A-A001 FBGA169 ABO! S IC FL 32G KE4CN5B6A FBGA 169P ABO ! S IC FL 16G H26M52002EQR FBGA 169P ABO !
SA00005GT10 SA00006DY10 SA00006DW10

eMHYN64G@ eMHYN32G@
U20 U20
A A

S IC FL 64G H26M78003BFR FBGA 169P ABO ! S IC FL 32G H26M64003DQR FBGA 169P ABO !
V4.5 SA000068D20 SA000068C20
eMSAM64G@ eSAM32G@
U20 U20
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eMMC
S IC FL 64G KLMCG8GEAC-B001 FBGA153 ABO! S IC FL 32G KLMBG4GEAC-B001 FBGA153 ABO! Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
SA00006UI10 SA00006UU10 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Cheetah_CT LA-A411P_R02
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, April 11, 2013 Sheet 16 of 35
5 4 3 2 1
5 4 3 2 1

Micro SD

D D

Micro SD power supply circuit

+V_2P85_1P80_SD
+V_2P85_1P80_VCCSDIO
U27
1
VOUT
5
VIN 2
GND

1
R892 4 1 1 1
100K_0201_5% EN# 3 C570 C571 C572
OCB

4.7U_0402_6.3V6M

0.1U_0201_10V6K

0.1U_0201_10V6K
2
uSD_PWR_EN APL3511DBI-TRG_SOT23-5 2 2 2

1
1.8V D
STIO_0_PWR 2 Q5
7 STIO_0_PWR
G S TR BSS138W 1N SOT-323-3
C 1 S VGS th 0.5~1.5V C

3
R895
@ 10K_0201_5%
2

+V_2P85_1P80_SD +V_2P85_1P80_SD

+V_1P80_VCCAON

10U_0603_6.3V6M
C88
1 1

1
C89
1U_0402_6.3V6K
R22 R29 2 2
10K_0402_5% 40.2K_0402_1%
Normal open type 0205
+V_2P85_1P80_SD

2
JSD1 CONN@
10
1 2 STIO_0_CLK 9 DET TERM (GND)
6 STIO_0_CD_N SWITCH TERM CD
B R935 10K_0201_5% 8 B
1 2 6 STIO_0_DATA1 7 DAT1
STIO_0_DATA0
R936 10K_0201_5% EMI request 11/29 6 STIO_0_DATA0 6 DAT0
VSS G1
11
1 2 STIO_0_DATA1 5 12
6 STIO_0_CLK 4 CLK G2 13
R937 10K_0201_5%
VDD G3
1

1 2 STIO_0_DATA2 EMC@ 3 14
6 STIO_0_CMD 2 CMD G4 15
R938 10K_0201_5% C568
1 2 10P_0201_50V8J 6 STIO_0_DATA3 1 CD/DAT3 G5
STIO_0_DATA3
6 STIO_0_DATA2
2

R939 10K_0201_5% DAT2

SP07000US00
D3 D4 D5 D6

2
XEMC@ XEMC@ XEMC@ XEMC@

TVNST52302AB0_SOT523-3

TVNST52302AB0_SOT523-3

TVNST52302AB0_SOT523-3

TVNST52302AB0_SOT523-3
SCA00001W00

SCA00001W00

SCA00001W00

SCA00001W00
1

1
1

for ESD Request for Intel Request

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
uSD
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02 0.2
Date: Thursday, April 11, 2013 Sheet 17 of 35
5 4 3 2 1
5 4 3 2 1

Internal USB
ULPI-0_USB2.0 PHY

+V_1P80_VCCAON
ULPI0_CS_R R764 1 @ 2 10K_0201_5%
U17
D
F2 USB_ULPI_0_CHG_DET# R765 1 @ 2 0_0201_5% PMIC_USB_DCP# 26 D
CHRG_DET F1 CHRG_POL R766 1 @ 2 0_0201_1%
CHRG_POL E1 CHRG_EN# R767 1 @ 2 0_0201_1%
C3 CHRG_EN_N
CS_N
E2 ULPI0_OC#
F6 FAULT D4 ULPI0_OC# 7
TP1312 TP_ULPI0_SOF PHY0_PSW PHY0_PSW 29
R768 1 @ 2 0_0201_1% USB_ULPI_0_REFCLK_R F5 SOF PSW
6 USB_ULPI_0_REFCLK C4 REFCLK
USB_PHY0_RST#_1P8
R769 1 @ 2 0_0201_1% ULPI0_CS_R B3 RESET_N F4 +V_1P80_VCCAON
7 ULPI0_CS cS VBUS D3 R783 1 2 0_0201_5%
+V_5P00_USB
ID C1 USB20_DN
DM

1
6 USB_ULPI_0_DIR R770 1 @ 2 0_0201_1% USB_ULPI_0_DIR_R E5 D1 USB20_DP
R771 1 @ 2 0_0201_1% USB_ULPI_0_NXT_R D5 DIR DP R784
6 USB_ULPI_0_NXT NXT
R772 1 @ 2 0_0201_1% USB_ULPI_0_STP_R D6 E4 2.2K_0201_1%
6 USB_ULPI_0_STP 1 2 A4 STP GND D2
6 USB_ULPI_0_CLK R773 22_0201_5% USB_ULPI_0_CLK_R
CLOCK GND C5

2
GND
C2 USB_PHY0_RST#_1P8
NC
R774 1 2 22_0201_5% USB_ULPI_0_DATA0_R B1 E6 VDD18_USB_ULPI_0 C527 1 2 2.2U_0402_6.3V6M
6 USB_ULPI_0_DATA0 1 2 A1 DATA0 REG1V5 E3 1 2
R775 22_0201_5% USB_ULPI_0_DATA1_R VDD33_USB_ULPI_0 C528 2.2U_0402_6.3V6M
6 USB_ULPI_0_DATA1 1 2 A2 DATA1 REG3V3 B4
R776 22_0201_5% USB_ULPI_0_DATA2_R R777 1 @ 2 0_0201_1%
6 USB_ULPI_0_DATA2 1 2 A3 DATA2 (E)CFG
R778 22_0201_5% USB_ULPI_0_DATA3_R
6 USB_ULPI_0_DATA3 1 2 A5 DATA3
R779 22_0201_5% USB_ULPI_0_DATA4_R
6 USB_ULPI_0_DATA4 1 2 A6 DATA4 B2
R780 22_0201_5% USB_ULPI_0_DATA5_R
6 USB_ULPI_0_DATA5 1 2 B6 DATA5 VDDIO B5
R781 22_0201_5% USB_ULPI_0_DATA6_R
6 USB_ULPI_0_DATA6
R782 1 2 22_0201_5% USB_ULPI_0_DATA7_R C6 DATA6 VDDIO F3 +V_1P80_VCCAON
6 USB_ULPI_0_DATA7 DATA7 VBAT +V3.3A 1
1
C529
TUSB1211A1ZRQR_TFBGA36 C530 0.1U_0201_10V6K
0.1U_0201_10V6K 2
2

C C

USB power switch


+V5A
+V_5P00_USB +V_1P80_VCCAON
20121116 change
2

1
RDS on = 70m
R785 U32 R795
100K_0402_5% 1 8 100K_0201_5%
2 GND VOUT 7
3 VIN VOUT 6
1

2
PHY0_PSW# 4 VIN VOUT 5 ULPI0_OC#
EN Input Threshold 1.4~1.8V @ Vin=5V EN FLG
1

D G547I2P81U_MSOP8
PHY0_PSW 2 Q6
G S TR BSS138W 1N SOT-323-3
USB power switch (LOW active)
S
3

VGS th 0.5~1.5V

B
USB connector B

Micro-B type conn


+V_5P00_USB
JUSB1 CONN@
1
VBUS 6
R5 1 EMC@2 0_0402_5% USB20_DN_L 2 GND
D- 7
GND
10U_0603_6.3V6M
C150

L3 XEMC@ 1 1 2 C81 USB20_DP_L 3


D+
100U_1206_6.3V6M

1 2 8
C112

USB20_DN USB20_DN_L
1U_0402_6.3V6K

1 2 4 GND
ID 9
USB20_DP 4 3 USB20_DP_L 2 2 1 5 GND
4 3 GND
WCM2012F2S-900T04_0805 ACON_MUC84-558702
3

R6 1 2 0_0402_5%
EMC@
EMC@
D50
TVNST52302AB0_SOT523-3
1

A
The ID pin on a Micro-A plug shall be connected to the GND pin. The ID pin on a "Micro-B" plug is not A
connected or is connected to ground by a resistance of greater than Rb_PLUG_ID (100k? MIN). An On-
The-Go device is required to be able to detect whether a Micro-A or Micro-B plug is inserted by determining
if the ID pin resistance to ground is less than Ra_PLUG_ID (10? MAX) or if the resistance to ground is
greater than Rb_PLUG_ID . Any ID resistance less than Ra_PLUG_ID shall be treated as ID = FALSE and
any resistance greater than Rb_PLUG_ID shall be treated as ID = TRUE.

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ULPI_0
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 18 of 35
5 4 3 2 1
5 4 3 2 1

VBAT_IN Power supply for Internal Regulators 2.3~4.8V


AW-NH660 WL_SHUTDOWN#_RST# BT_SHUTDOWN# BT_RST#
SR_PA_OUT Power supply out from internal LDO 3.3V
VDD_WL_PA_A_MODE Power supply for internal Power amplifier 2.3~5.5V WL on/BT on H H H
VDDIO_RF I/O power supply for RF front-end 3.3V
WL on/BT off H H L
VDD_BT_PA Power supply for BT PA 3.3V
VDD_WL_PA Power supply for WLAN PA driver 2.3~5.5V WL off/BT on L H H
CBUCK_OUT Power supply for Internal CLDO/LDO1 1.35~2V
WL off/BT off L L L
D
VOUT_2P5_IN Power supply for FM 2.5V D

VOUT_2P5_OUT Power supply from internal LDO 2.5V


VIN_LDO Power supply to internal Regulator 1.5V
VDD_LN_IN Power supply for Noise Sensitive Block (AFE,PLL) 1.14~1.26V
VDD_LN_OUT Power supply for Noise Sensitive Block (AFE,PLL) 1.14~1.26V
VDD1P2_CLDO_OUT Power supply from Internal CLDO 1.14~1.26V
VDD_CORE Power supply for Core Voltage 1.14~1.26V
VDDIO I/O power supply for BT/FM/GPIO 1.2~2.9V

+VBATA +VBATA_WL +VBATA +VDD_WL_PA +V_1P80_VCCAON +WLAN_1V8


SR_PA_OUT VDD1P2_CLDO_OUT
1 2 1 2 1 2 VOUT_2P5 VDD_LN_OUT
R14 0_0402_5% C8 EMC@ R13 0_0402_5% C15 EMC@ R92 0_0402_5% C114 EMC@ 1
10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J
4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1
C40 C41 C42 C105
C9 C16 C113 4.7U_0402_6.3V6M C111 C103 C107 C110
2 0.1U_0201_10V6K 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
2 2 2 2 2 2 2 2 2 2 2 2 2
close to module (A3) close to module (H2) close to module (B3,B4) close to module (C2) close to module (D1)

C C

VIN_LDO

SR_PA_OUT S COIL 2.2UH +-20% HPC252012NF-2R2M 1.3A


CBUCK_OUT 1 2 VIN_LDO

1
+VBATA_WL L4
VDD_LN_OUT C104
10U_0402_6.3V6M

2
+VDD_WL_PA VIN_LDO
VDD1P2_CLDO_OUT +WLAN_1V8
close to module (B1)
11/26 add for RF

CBUCK_OUT
STIO_1_CLK
1205 RF request +WLAN_1V8
1
XEMC@
C25
18P_0201_50V8J

G9
H1

H9

H2

C2

C1

D1
E2

A2

B9

B1
A3
J3
2 U153

1
VBAT_IN

VDD_LN_IN
VDDIO

VDDIO_RF

VDD_LN_OUT

VIN_LDO

CBUCK_OUT
SR_PA_OUT
VDD1P2_CLDO_OUT
VDD_CORE

VDD_WL_PA_A_MODE

VDD_WL_PA

VDD_BT_PA
R87 R90 R91
10K_0201_5% 10K_0201_5% 10K_0201_5%
@ @ @
0_0201_1% 1 @ 2 R69 STIO_1_CLK_R G1 A5
6 STIO_1_CLK

2
0_0201_1% 1 @ 2 R71 STIO_1_CMD_R G3 SDIO_CLK_SPI_CLK ANT_FM_RX A6
6 STIO_1_CMD SDIO_CMD_SPI_DI ANT_FM_TX
0_0201_1% 1 @ 2 R70 STIO_1_DATA0_R F2 COMBO_BT_WAKEUP
6 STIO_1_DATA0 SDIO_DATA0_SPI_DO
FOR DEBUG ONLY 0_0201_1% 1 @ 2 R73 STIO_1_DATA1_R F1 COMBO_UART_WAKE
6 STIO_1_DATA1 SDIO_DATA1_SPI_IRQ
0_0201_1% 1 @ 2 R66 STIO_1_DATA2_R G2 COMBO_BT_RESET#
6 STIO_1_DATA2 SDIO_DATA2_SPI_NC
0_0201_1% 1 @ 2 R78 STIO_1_DATA3_R F3 H3 HSIC_DATA T1@
6 STIO_1_DATA3 SDIO_DATA3_SPI_CS HSIC_DATA J2
PAD @ T3 WL_GPIO_1 HSIC_STROBE T2@
PAD @ T4 WL_GPIO_2 HSIC_STROBE
PAD @ T5 WL_GPIO_5
PAD @ T6 WL_UART_TX
PAD @ T7 WL_UART_RX D7 A8
D5 BT_I2S_DI FM_AUDIO_L A7
B BT_I2S_DO FM_AUDIO_R B
C7
B6 BT_I2S_WS RF request 1203
BT_I2S_SCK I2S_1_CLK_R on SOC side

BT_PCM_SYNC
G4 I2S_1_FS_R 0_0201_1% 1 @ 2 R86
I2S_1_FS 5
EMI request 11/29
+WLAN_1V8 WLAN strapping option F5
E6 BT_PCM_CLK F4 I2S_1_CLK 5
WL_GPIO_1 I2S_1_TXD_R 0_0201_1% 1 @ 2 R88
WL_GPIO_6 = 0 for SDIO mode WL_GPIO_1 BT_PCM_IN I2S_1_TXD 5

1
debug WL_GPIO_2 E4 G5 I2S_1_RXD_R 0_0201_1% 1 @ 2 R89 XEMC@
WL_GPIO_2 BT_PCM_OUT I2S_1_RXD 5
2

WL_GPIO_5 D6 C567
R692 R16 1 @ 2 WL_GPIO6 C6 WL_GPIO_5 C8 BT_WAKE_R 2 @ 10_0201_1% R45 68P_0201_25V8
COMBO_BT_WAKEUP 7

2
0_0402_1% WL_GPIO_6 BT_DEVICE_WAKE B7 COMBO_UART_WAKE_R 2 @ 10_0201_1% R17
200K_0201_5% BT_HOST_WAKE COMBO_UART_WAKE 25
@ C4 BT_RST#_R 2 @ 10_0201_1% R19
BT_RST# C3 2 10_0201_1% COMBO_BT_RESET# 6
BT_SHUTDOWN#_R @ R84 BT_SHUTDOWN#
BT_SHUTDOWN# 7
1

0_0201_1% 1 @ 2 R15 WL_SHUTDOWN#_RST# D2 BT_SHUTDOWN#


7 COMBO_WLAN_EN WL_SHUTDOWN#_RST#
0_0201_1% 1 @ 2 R18 WLAN_BT_WAKE#_R F6 E7 UART_0_CTS_R 2 @ 10_0201_1% R41 2 @ 1 +WLAN_1V8
5 WLAN_BT_WAKE# WL_HOST_WAKE BT_UART_RTS# F7 2 10_0201_1% UART_0_CTS 7
UART_0_RTS_R @ R21 R693 200K_0201_5%
E3 BT_UART_CTS# UART_0_RTS 7
WL_UART_TX
debug WL_UART_RX G7 WL_UART_TX F8 UART_0_RX_R 2 @ 10_0201_1% R40
COMBO_WLAN_EN check with SW WL_UART_RX BT_UART_TXD
BT_UART_RXD
E8 UART_0_TX_R 2 @ 10_0201_1% R24
UART_0_RX
UART_0_TX 7
7

R42 JP3 R99 B3


VOUT_2P5_OUT VOUT_2P5
0_0402_5% 0_0402_5% H4 B4
2 1 2 1 2 1 RF_WiFi_BT_Main1 J7 ANT_MAIN_EN VOUT_2P5_IN
OUT IN H6 ANT_2G4
ANT_AUX_EN
1

R39 1 2 WL_RTC_CLK D3 H8
0_0402_5%

0_0402_5%
1P_0402_50V8

1 @
4 3 26 SLP_CLK2 RTC_CLK NC D9
0_0402_5%

C51 @ 0_0402_1%
GND GND NC
2 R62

2 R100

2 R103

@ @
2 MURAT_MM8030-2600B
From PMIC (32.768kHz)
<BOM Structure>
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

ANT1 BT_WAKE : Host to Device indicating that Host requires attention.


BT_HOST_WAKE : Device to Host indicating that BT device requires attention.
2 BT_SHUTDOWN# : (OR-Gate with WL_SHUTDOWN#_RST#)
A1
A4
A9
B2
B5
B8
C5
C9
D4
D8
E1
E5
E9
F9
G6
G8
H5
H7
J1
J4
J5
J6
J8
J9

1 GND1 AW-NH660_81
A Feed 3 To decide whether or not to power down Int. regulator A
GND2
BT_RST# : Low Asserting Reset for Bluetooth /FM Core.
CAN4311712112453K_3P
BT_SHUTDOWN# connect to SoC GP_Core ,
confirm with SW later

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN/BT
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 19 of 35
5 4 3 2 1
5 4 3 2 1

Sensor Hub GPIO level shift


+V3.3A +V_1P80_VCCAON +V_1P80_VCCAON +V3.3A

1
1

1
R926

1
@ @ R925 10K_0201_5%
D @ @ R696 R697 10K_0201_5% D
R694 R695 U13
10K_0201_5% 10K_0201_5%

2
10K_0201_5% 10K_0201_5%

2
B2 C1

2
VCCB VCCA

2
G
SENSOR_HUB_RST#_LS A2 D2 SENSOR_HUB_RST# 25 Q14
B1 A1 3 1 SENSOR_HUB_WAKE_LS
6 SENSOR_HUB_WAKE
SENSOR_HUB_INT_LS A1 D1

D
B2 A2 SENSOR_HUB_INT 25
B1 C2 S TR BSS138W 1N SOT-323-3

TO sensor hub (3.3V)


GND OE
TO SOC (1.8V) TO SOC (1.8V) TO sensor hub (3.3V)
TXS0102YZPR_DSBGA8
TXS0102 has internal pull high

Sensor Hub I2C level shift Sensor Hub I2C pull up


+V3.3A
+V_1P80_VCCAON
U12 +V3.3A
1 8 R691 1 2 200K_0201_5%
GND EN
2 7 C486 1 2 0.1U_0201_10V6K
VREF1 VREF2 @ R1051 1 2 2.2K_0402_5% SENSOR_SCL
I2C_5_SCL 3 6 I2C_5_SCL_LS_3P3 2.2K_0402_5% 2 1 R1056
22,5 I2C_5_SCL SCL1 SCL2
C C
I2C_5_SDA 4 5 I2C_5_SDA_LS_3P3 2.2K_0402_5% 2 1 R1055 R1052 1 2 2.2K_0402_5% SENSOR_SDA
22,5 I2C_5_SDA SDA1 SDA2

TO SOC (1.8V) TO sensor hub (3.3V)


PCA9306DCUR_VSSOP8
pull up at SOC side TO sensors (3.3V)

Sensor Hub RST circuit Sensor Hub circuit


+V3.3A
+V3.3A
confirm timing
1

R1057
100K_0402_5% 1 1 1 1 1
C707 C708
C705 C706 C710 0.1U_0402_16V4Z 1U_0402_6.3V6K
2

SENSOR_RST#_R R1058 1 2 0_0402_5% SENSOR_HUB_RST#_LS 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z


2 2 2 2 2
1
@
C709

24

36

48
9

1
0.1U_0402_16V4Z U39
2

VDD_1

VDD_2

VDD_3

VBAT
VDDA
SENSOR_HUB_WAKE_LS 10 18 ACCEL_INT1
PA0-WKUP PB0 19 ACCEL_INT1 21
ACCEL_INT2
11 PB1 20 ACCEL_INT2 21
B PA1 GYRO_INT1 B
12 PA1 PB2 39 GYRO_INT1 21
PA2 GYRO_INT2
13 PA2 PB3 40 GYRO_INT2 21
PA3
for firmware update PA4 14 PA3 STM32F103CBU6TR_VFQFPN48 PB4 41
PA5 15 PA4 PB5 42 SENSOR_SCL
Sensor IC orentation turning TP18
TP19
SWDIO_SENSORHUB
SWCLK_SENSORHUB
PA6 16

17
PA5
PA6
PB6
PB7
PB8
43
45
46
SENSOR_SDA
SENSOR_SCL
SENSOR_SDA
21
21

29 PA7 PB9 21 I2C_5_SCL_LS_3P3


30 PA8 PB10 22 I2C_5_SDA_LS_3P3
PA10 31 PA9 PB11 25 SENSOR_HUB_INT_LS
TP6 PA10 PB12
For USB interface PA11 32 26 PB13 For slate mode
TP7 PA11 PB13 TP17
PA12 33 27 MAG_DRDY
TP8 PA12 PB14 MAG_DRDY 21
+V3.3A SWDIO_SENSORHUB 34 28 ALS_INT
25 SWDIO_SENSORHUB 37 PA13 PB15 ALS_INT 21
For F/W update used SWCLK_SENSORHUB
25 SWCLK_SENSORHUB 38 PA14
PA15
SENSHUB_XTALIN 5
SENSHUB_XTALOUT 6 PD0-OSC_IN
PD1-OSC_OUT 2
PA1 303I SENSOR_RST#_R 7 PC13-TAMPER-RTC 3
NRST PC14-OSC32_IN
1

4
PA2 303M R1059 R1060 R1061 R1062 R1063 R1064 PC15-OSC32_OUT
44 SENSHUB_BOOTS
PA3 303N 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
@
10K_0402_5%
@ BOOT0

PA4 4200I
2

VSS_1

VSS_2

VSS_3
VSSA
Y1204

PAD

2
PA1 PA2 PA3 PA4 PA5 PA6 12MHZ 12PF 5YEA12000122IFA2Q3
PA5 4200M 3 1 R1071
4 2 20K_0402_5%
PA6 4200N

23

35

47

49
1

R1065 R1066 R1067 R1068 R1069 R1070 1 1

1
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
@ @ @ @ C711 C712
18P_0201_50V8J 18P_0201_50V8J
2

2 2
S IC STM32F103CBU6TRC42 VFQFPN HUB V1JV4
A A

LSM303 X,Y,Z 3GD20 X,Y,Z


(I,M,N) about layout is (1,1,1) (I,M,N) about layout is (1,0,0)

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Camera/SensorHub/TouchBoard
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 20 of 35
5 4 3 2 1
5 4 3 2 1

GYROSCOPE
Accelerometer & E-COMPASS

D C714 D
0.1U_0402_16V4Z
2 1
+V3.3A

C713 +V3.3A
0.1U_0402_16V4Z
1 2
U40
+V3.3A C715
1 9 10U_0402_6.3V6M
VDD_IO RES_1
SENSOR_SCL 2 10 1 2
20 SENSOR_SCL SCL/SPC RES_2
SENSOR_SDA 3 11
20 SENSOR_SDA SDA/SDI/SDO RES_3 U41 C716
4 12 0.1U_0402_16V4Z
SDO/SA0 RES_4 1 14 1 2
5 13 Vdd_IO Vdd
+V3.3A CS GND C717 2 1 4.7U_0402_6.3V6M 6 3 SENSOR_SDA
GYRO_INT2 6 14 PLLFILT C1 SDA
20 GYRO_INT2 DRDY PLLFILT 12 2 SENSOR_SCL
GYRO_INT1 7 15 C7181 2 0.22U_0402_16V7K 13 SETP SCL
20 GYRO_INT1 INT RES_5 SETC 5 ACCEL_INT1
8 16 8 INT1 ACCEL_INT1 20
RES_0 VDD +V3.3A MAG_DRDY 9 Reserved 4 ACCEL_INT2
1 1 20 MAG_DRDY Reserved INT2 ACCEL_INT2 20
L3G4200DTR_LGA16_4X4 10
C719 C720 11 Reserved
Reserved
0.1U_0402_16V4Z 10U_0402_6.3V6M
2 2 7
GND

LSM303DLHCTR_LGA14_3X5

C721
0.01U_0402_25V7K
C
1 2 PLLFILT C

1 2 PLLFILT_C 1 2
3G4200D need pop, 3GD20 can unpop
R1074 C722
10K_0402_5% 0.47U_0402_6.3V6K

LIGHT SENSOR

B B

+V3.3A

R1075
10K_0402_5%
1 2 ALS_INT
+V3.3A

U42
20 ALS_INT ALS_INT 3 6
INT VDD
SENSOR_SCL 5 4 R1076 1 2 604K_0402_1%
SCLK SET
1
SENSOR_SDA 2 1
SDAT GND C723
CM3218A3OP-AD_OPLGA6_1P8X2P35 0.1U_0402_16V4Z
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Sensor
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02 0.2
Date: Thursday, April 11, 2013 Sheet 21 of 35
5 4 3 2 1
5 4 3 2 1

Codec input power CAP Codec

R699 2 @ 10_0201_1% +AVDD


+V_1P80_VCCAON
1 1
C487 C488
10U_0402_6.3V6M 0.1U_0201_6.3V6K
2 2 +V_1P80_VCCAON

D D
+V5A
R956 2 @ 10_0201_1% +DACREF

1 1
C489 C490
10U_0402_6.3V6M 0.1U_0201_6.3V6K
2 2

+MICVDD
+AVDD

+DCVDD
+DACREF

+MICBIAS

4.7U_0402_6.3V6M

10
15

46

42
43
23
3

2
1 1 U14
C493

SPKVDDL
AVDD
MICVDD
SPKVDDR

DCVDD
DBCDD
CPVDD
DACREF
C491 C492 2 1
10U_0402_6.3V6M 0.1U_0201_6.3V6K
2 2
+MICBIAS 4 19 C495 1 2 2.2U_0402_6.3V6M
DMIC_DATA R702 1 2 0_0201_5% DMIC_DATA_R 5 MICBIAS1 CPP2 18
IN1P/DMIC1_DAT CPN2 20 C496 1 2 2.2U_0402_6.3V6M
"MIC_DATA" pull up to "+MICBIAS" at "JWIN1" side 6 CPP1 21
MIC_DATA C494 1 2 1U_0201_6.3V6M 7 IN1N/DMIC2_DAT/JD1 CPN1
23 MIC_DATA 8 IN2P 24
23 JACK_DET# JACK_DET# CPVPP C497 1 2 2.2U_0402_6.3V6M
C500 2 1 4.7U_0402_6.3V6M 12 IN2N/JD2 CPVPP 27 CPVEE C501 1 2 2.2U_0402_6.3V6M
1 1 VREF2 CPVEE
C502 2 1 4.7U_0402_6.3V6M 11
C498 C499 VREF1 28 HP_L
HPO_L HP_L 23 +V_1P80_VCCAON
2.2U_0402_6.3V6M 0.1U_0201_6.3V6K 26 HP_R
2 2 HPO_R HP_R 23
25
R704 2 @ 10_0201_1% MCLK 37 HPOFB
5 OSC_CLK_OUT_0 2 10_0201_1% 36 MCLK 1
R705 @ BCLK1 SPEAKER1+ SPEAKER1+ 23
5 I2S_3_CLK BCLK1 SPO_LP

1
R706 2 @ 10_0201_1% LRCK1 35 48 SPEAKER1- SPEAKER1- 23 @
5 I2S_3_FS 2 10_0201_1% 33 LRCK1 SPO_LN 45
R708 @ DACDAT1 SPEAKER2+ R714
+V5A 5 I2S_3_TXD
R709 2 @ 10_0201_1% ADCDAT1 34 DACDAT1 SPO_RP 47 SPEAKER2-
SPEAKER2+ 23
C 5 I2S_3_RXD ADCDAT1 SPO_RN SPEAKER2- 23 10K_0201_5% C
1 1
R710 2 @ 10_0201_1% BCLK2 30 13
5 I2S_0_CLK

2
C503 C504 R711 2 @ 10_0201_1% LRCK2 29 BCLK2 MONOP 14
5 I2S_0_FS 2 10_0201_1% 31 LRCK2 MONON
10U_0402_6.3V6M 0.1U_0201_6.3V6K R712 @ DACDAT2
2 2 5 I2S_0_TXD 2 10_0201_1% 32 DACDAT2 17
5 I2S_0_RXD R713 @ ADCDAT2
ADCDAT2 LOUTR 16
LOUTL 41 DMIC_CLK_R R720 2 @ 10_0201_1% DMIC_CLK
GPIO2/DMIC_SCL 40 I2S_INT#_R R715 2 @ 10_0201_1%
GPIO1/IRQ 44 I2S_INT# 25
LDO1_IN

CPGND
LDO1_IN

DGND
AGND
38 I2C_5_SCL_AUD R717 2 @ 10_0201_1%
SCL 39 I2C_5_SCL 20,5
I2C_5_SDA_AUD R718 2 @ 10_0201_1%
Codec output power CAP SDA I2C_5_SDA 20,5

9
49

22
S IC ALC5642-VF-CGT QFN 48P AUDIO CODEC

+DCVDD
+MICVDD
1 1
1 1
C505 C506
2.2U_0402_6.3V6M 0.1U_0201_6.3V6K C507 C508
2 2
2.2U_0402_6.3V6M 0.1U_0201_6.3V6K
2 2

B B

LDO1 enable control


GND & GNDA bridge
Digital MIC Conn. +V_1P80_VCCAON

1
LDO1 enable control
for digital core power DCVDD R948
+V_1P80_VCCAON 100K_0201_5%
Low: Disable
MIC1 @ High: Enable

2
6 5 DMIC_DATA R719 1 2 0_0201_5%
VDD DATA LDO1_IN
2 4 DMIC_CLK R723 1 2 0_0402_5%
CS CLK
1
3

1 3 R716 R725 1 2 0_0402_5%


ENHANCE GND D57 100K_0201_5%
S MIC ST MP45DT02TR TVNST52302AB0 SOT523 @ 03/20 change to 0402
XEMC@
2
1

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AUDIO CODEC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 22 of 35
5 4 3 2 1
5 4 3 2 1

EC INT# level shift to SOC EC I2C level shift to SOC EC_ DEBUG CONN

+V_1P80_VCCAON +EC_VCC
+EC_VCC
JP2
+V_1P80_VCCAON KSO6 1
EC_EDI_DI 2 1
U18 EC_EDI_DO 3 2
1 8 R698 1 2 200K_0201_5% EC_EDI_CS 4 3
TO SOC 1.8V GND EN 4

1
EC_EDI_CLK 5
R665 R663 2 7 C511 1 2 0.1U_0201_10V6K EC_TXD 6 5
D VREF1 VREF2 6 D
10K_0201_5% 10K_0201_5% @ EC_RXD 7
@ I2C_2_SCL 3 6 I2C_2_SCL_LS_3P3 R1072 1 2 2.2K_0201_1% 8 7
24,29,5 I2C_2_SCL SCL1 SCL2 8
TO SOC 1.8V

2
2
G
I2C_2_SDA 4 5 I2C_2_SDA_LS_3P3 R1073 1 2 2.2K_0201_1%
24,29,5 I2C_2_SDA SDA1 SDA2 9
Q4
EC_INT# 3 1 EC_INT#_LS 10 GND1
7 EC_INT# TO EC 3.3V GND2

D
pull up at SOC side PCA9306DCUR_VSSOP8
S TR BSS138W 1N SOT-323-3 TO EC 3.3V ACES_50521-0084N-P01

CONN@

EC _ ENE IO3737
+EC_VCC +EC_VCC_R
R654
+V3.3S 1 2
0_0603_5% 2

2
C512 R1087
0.1U_0201_10V6K 10K_0201_5% U154

2
1 17 23
R1077 36 VCC1 PBIN/GPIO1C 22

1
9 VCC2 PBOUT/GPIO19
10K_0201_5% AVCC
C
33 EC_EDI_CS C
2 1 RESET# 26 KSI4/EDI_CS/GPIO33 34 EC_EDI_CLK

1
0.1U_0201_10V6K C514 RESET# KSI5/EDI_CLK/GPIO34 1 EC_EDI_DI
8~16 mA KSI6/EDI_DI/GPIO00 2 EC_EDI_DO
for update firmware
R02 modify 1/3 5V tolerance KSI7/EDI_DO/GPIO01 24 EC_RXD
BLUE_LED# 13 RX/GPIO1D 25 EC_TXD
24 BLUE_LED# SPI_CLK/GPIO10 TX/GPIO1E
RED_LED# 14
to LED 24 RED_LED#
15 SPI_DO/GPIO11
GREEN_LED# 16 SPI_DI/GPIO12 27
SPI_CS#/GPIO13 KSO0/GPIO1F 28
I2C_2_SCL_LS_3P3 32 KSO3/GPIO22 3 KSO6
LS TO SOC I2C2 I2C_2_SDA_LS_3P3 31 SCL0/GPIO2E
SDA0/GPIO2D
KSO6/GPIO04
KSO16/CIRRX/GPIO18
21
20
I2C_2_SCL_EC 37 CEC/GPIO17
29 I2C_2_SCL_EC 35 SCL1/PS2_CLK3/GPIO36 10
I2C_2_SDA_EC
TO BAT , CHG 29 I2C_2_SDA_EC SDA1/PS2_DAT3/GPIO35 DA0/GPO0E
DA1/GPO0F
11
30
29 SCL2/PS2_CLK2/GPIO2C 5 R727 2 @ 10_0201_1% CHARGER_PWRGD_EC
SDA2/PS2_DAT2/GPIO2B AD0/GPI08 CHARGER_PWRGD_EC 29
6 R728 2 @ 10_0201_1% CHARGE_COMPLETE_EC
AD1/GPI09 CHARGE_COMPLETE_EC 29
39 7
40 PS2_CLK1/GPIO37 AD2/GPI0A 8 R730 2 @ 10_0201_1% CHG_INT#_EC
for Charger control
PS2_DAT1/GPIO38 AD3/GPI0B CHG_INT#_EC 29
18 38
EC_INT#_LS 4 PWM0/GPIO14 GND 12
CHARGE_DISABLE_EC R729 2 @ 10_0201_1% 19 PWM1/GPIO07 AGND 41
26,29 CHARGE_DISABLE_EC PWM2/GPIO15 THERMAL PAD
2
IO3737UA0_QFN40_5X5
C515
0.1U_0201_10V6K
1
@

B B

Shielding Clip
HOME Key/SPK/Jack SUB Board Conn.

CLIP1 CLIP2 CLIP3 CLIP4 CLIP5 CLIP6 CLIP8 CLIP9 CLIP10 CLIP11 CLIP12 CLIP14
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA

1
+MICBIAS +CHGRTC
+V_1P80_VCCAON
1

1
2.2K_0402_5%

R101

R724 R7
10K_0201_5% 100K_0402_5%
JWIN1 CONN@
16 18
SCREW / FD
2

15 16 G18 17
HP_L 14 15 G17 FD1 FD2
22 HP_L 13 14 1 1
HP_R H_2P0 H_2P0 H_2P5N H_2P0 H_2P0 H_2P0
22 HP_R 12 13 H2 H3 H4 H5 H1 H6
MIC_DATA 11 12 HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
22 MIC_DATA 11
10 FD3 FD4
JACK_DET# 9 10 1 1
22 JACK_DET# 8 9 1

1
7 8
HOME_BUTTON# 6 7
24,25 HOME_BUTTON# 5 6
SPEAKER2- 4 5
A 22 SPEAKER2- 4 A
SPEAKER2+ 3
1U_0402_6.3V6K

1 22 SPEAKER2+ 3
2
C517

SPEAKER1-
22 SPEAKER1- 1 2
SPEAKER1+
22 SPEAKER1+ 1
2 ACES_88512-01601-071

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HOME CONN /SCREW/EC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 23 of 35
5 4 3 2 1
5 4 3 2 1

Power SW +VBATA
TO Touch Board +V_1P80_VCCAON +V3.3A

to pmic (VBATA)
+V_1P80_VCCAON
PWRBTN_N 26

1
1

1
R887 R787 @ @
R888 @ @ U15 R685 R707
100K_0402_5% 10K_0201_5%
10K_0201_5% R703 R688 10K_0201_5% 10K_0201_5%
10K_0201_5% 10K_0201_5% C1 B2

2 2

2
SW1 VCCA VCCB

2
G
TAFG1-12WQR_3P TOUCH_RST# D2 A2 TOUCH_RST#_LS
1 7 TOUCH_RST# A1 B1
Q7
5 ACPI_PWR_BUTTON ACPI_PWR_BUTTON 3 1 PWRBTN_N 1 R891 2 PWRBTN_N_CN 2 TOUCH_INT# D1 A1 TOUCH_INT#_LS
3 6 TOUCH_INT# A2 B2
1K_0201_5%

D
D D
to SOC (1.8V) C2 B1
2 to SOC OE GND to touch module

3
S TR BSS138W 1N SOT-323-3

4
C516 D7
0.1U_0201_10V6K TVNST52302AB0 SOT523 TXS0102YZPR_DSBGA8
1 EMC@
TXS0102 has internal pull high
Level shift for RST , INT

1
+V_1P80_VCCAON +V3.3A

chg 1.5K R0402 03/15

Volume button up / down

1
U7 R670
1 8 R672 1 2 200K_0201_5% 1.5K_0402_5% R671
GND EN @ 1.5K_0402_5%
SW2 2 7 C471 1 2 0.1U_0201_10V6K
to SOC

2
TAFG1-12WQR_3P VREF1 VREF2

2
1 3 6 I2C_0_SCL_LS
2 2 1 5 I2C_0_SCL SCL1 SCL2
VOL_UP#_R GPI_VOLUMEUP# GPI_VOLUMEUP# 25
3 1 R94 1K_0402_1% 4 5 I2C_0_SDA_LS
5 I2C_0_SDA SDA1 SDA2
C27
D8 to touch module
4

10P_0402_50V8J pull up to +V_1P80_VCCAON on SOC siede


2 2 PCA9306DCUR_VSSOP8
1 Level shift for I2C
3

SW4 TVNST52302AB0 SOT523


TAFG1-12WQR_3P EMC@ CONN@
1 PANAS_AYF531035
C C
2 VOL_DOWN#_R 2 1 GPI_VOLUMEDOWN# 12
GPI_VOLUMEDOWN# 25 GND 11
3 1 R96 1K_0402_1%
C26 10P_0402_50V8J 10 GND
9 10
+V5A
4

8 9
2 I2C_0_SCL_LS 7 8
I2C_0_SDA_LS 6 7
contorler IC VBUS is 3V rail TOUCH_RST#_LS 5 6
5

3
4
TOUCH_INT#_LS 3 4
2 3
XEMC@ 1 2
D53 1
JTCH1
for into recovery mode

1
To touch control connector

+V5A
+V5A
Lid Switch
(Hall Effect Switch) +V3.3A
2

R786 R788
100K_0402_5% 100K_0402_5% 2
U16 C47
5

0.1U_0402_16V4Z
1

HOME_BUTTON#_N 2 +V_1P80_VCCAON
P

B 4 EN_FSTK 1
Y EN_FSTK 26
GPI_VOLUMEUP#_N 1
A
G

1
1

D R900
U2
3

HOME_BUTTON# 2 Q13 MC74VHC1G08DFT2G_SC70-5 10K_0201_5%


23,25 HOME_BUTTON# 2
G S TR BSS138W 1N SOT-323-3 VDD 1
B S B
3

2
GND
LID_SW# 2 1 3
6 LID_SW# OUTPUT
1

D R102 1K_0402_1%
GPI_VOLUMEUP# 2 Q15
G S IC YB8203ST23 SOT-23 3P HALL SENSOR
S TR BSS138W 1N SOT-323-3 1
S C48
3

10P_0402_50V8J
2

POWER LED

LED4
Reserve PSS
R1097
PWR_LED# 1 2 BLUE_LED#_R 2 B 1
23 BLUE_LED#
330_0402_1%
+EC_VCC +V_1P80_VCCAON
R1099
RED_LED# 1 2 RED_LED#_R 3 1
23 RED_LED# O
330_0402_1% @
C510
LTST-S115KFTBKT-CA_AMBER-BLUE 0.1U_0201_6.3V6K
2
L30 @
4 7
DCI RF2P TP1318
6
I2C_2_SDA 5 RF2N TP1319
RST switch +EC_VCC +CHGRTC 23,29,5
23,29,5
I2C_2_SDA
I2C_2_SCL
I2C_2_SCL 3 SDA
SCL
RF1P
1
TP1320
8 2
EXTRESET_N 25,26,29 GND RF1N
1

A SW3 @ TP1321 A
TAFG1-12WQR_3P R726 R722 IPJ-P6001-Q2AT_XQFN8_1.6X1.6
1 BI 29
1M_0402_5% 1M_0402_5%
2 EXTRESET_N
3
2

D
4

2 2N7002K_SOT23-3
G Q16
S
3

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BTN/LED/Touch Board
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 24 of 35
5 4 3 2 1
5 4 3 2 1

+V3.3A
ACER DEBUG
SECONDARY JTAG 1
XDPA@
+V_2P85_1P80_VCCSDIO C563
+V_1P80_VCCAON +V5A U24 0.1U_0201_10V6K
+V3.3A JTAG2_TDI 2 16 2
JTAG2_TCK 5 IA0 VCC
IB0

1
1 1 1 XDPA@ JTAG2_TMS 11
XDPA@ XDPA@ XDPA@ R875 14 IC0 4
ID0 YA 7 OSC_CLK_OUT_1 5
C569 C573 C574 10K_0201_5%
3 YB 9 OSC_CLK_OUT_2 5
0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 15 CSB_SNSCLK1 IA1 YC OSC_CLK_OUT_3 5
2 2 2 6 12
15 CSB_SNSCLK2

2
JDB2 10 IB1 YD
D 12 DISP_CLKIN IC1 D
1 2 13
3 1 2 4 SPI_INT_N ID1
5 3 4 6 SEC_JTAG_EN_N 1 8
7 5 6 8 SPI_0_SDI_DEBUG 15 SEL GND NO_XDPA@
7 8 SPI_0_SDI_DEBUG 11 EN#

1
XDP_PWRMODE_0 CLV_KBD_MKOUT4 9 10 SPI_0_SDO_DEBUG SPI_0_SDO_DEBUG 11 CSB_SNSCLK1 R872 1 2 0_0201_5% OSC_CLK_OUT_1
5 CLV_KBD_MKOUT4 11 9 10 12
XDP_PWRMODE_1_R SPI_0_SS0_DEBUG R859 XDPA@
XDP_PWRMODE_2_R 13 11 12 14 SPI_0_CLK_DEBUG
SPI_0_SS0_DEBUG 11 3.3V 4.7K_0201_5% XDPA@ PI5C3257QEX_QSOP16 NO_XDPA@
13 14 SPI_0_CLK_DEBUG 11
26 TESTMODE_MUX TESTMODE_MUX 15 16 CSB_SNSCLK2 R860 1 2 0_0201_5% OSC_CLK_OUT_2
PMIC_PWRGD_R 17 15 16 18 SPI_1_CLK
SPI_1_CLK 5

2
XDP_PREQ_N_BUFF 19 17 18 20 SPI_1_SS0 NO_XDPA@
XDP_PRDY_N 21 19 20 22 SPI_1_SDI
SPI_1_SS0 5 LEVEL SHIFT ON DBG BD(1.2/1.8V) DISP_CLKIN R949 1 2 0_0201_5% OSC_CLK_OUT_3
23 21 22 24 SPI_1_SDI 5
24,26,29 EXTRESET_N EXTRESET_N SPI_1_SDO
25 23 24 26 SPI_1_SDO 5 +V3.3A
JTAG_TDO SPI_1_SS1_DEBUG
7 JTAG_TDO 27 25 26 28 SPI_1_SS1_DEBUG 11
7 JTAG_TRST_N JTAG_TRST_N SPI_1_SS2_DEBUG_XDP
29 27 28 30 SPI_1_SS2_DEBUG_XDP 11
JTAG_TDI SPI_1_SS3_DEBUG
7 JTAG_TDI
JTAG_TMS 31 29 30 32 SPI_1_SS4_DEBUG
SPI_1_SS3_DEBUG 11 LEVEL SHIFT ON DBG BD(1.2/1.8V)
7 JTAG_TMS 31 32 SPI_1_SS4_DEBUG 11
JTAG2_TDI 33 34 SPI_INT_N 1 XDPA@
33 34 SPI_INT_N 6
JTAG2_TMS 35 36 FW_STRAP0_R R927 1 XDPA@ 2 1K_0201_5%
35 36 FW_STRAP0 7
JTAG2_TDO 37 38 UART_2_RX UART_2_RX 6 C564
5 JTAG2_TDO 39 37 38 40
SEC_JTAG_EN_N UART_2_TX UART2 0.1U_0201_10V6K
41 39 40 42 UART_2_TX 7 2
MPTI_HS_DATA3 SWDIO_SENSORHUB SWDIO_SENSORHUB 20 BPM SIGNALS
6 MPTI_HS_DATA3 43 41 42 44
MPTI_HS_DATA2 SWCLK_SENSORHUB sensor hub DB U25
6 MPTI_HS_DATA2 45 43 44 46 SWCLK_SENSORHUB 20 2 16
MPTI_HS_DATA1 PMIC_SPI_DEBUG PMIC_SPI_DEBUG 26,5 XDP_BPM_0_N
6 MPTI_HS_DATA1 47 45 46 48 5 IA0 VCC
MPTI_HS_DATA0 PMIC_SPI_DBG_SS# XDP_BPM_1_N
6 MPTI_HS_DATA0 49 47 48 50 PMIC_SPI_DBG_SS# 26 11 IB0
PMIC_SPI_DBG_MOSI PMIC DB XDP_BPM_2_N
51 49 50 52 PMIC_SPI_DBG_MOSI 26 14 IC0 4
MPTI_HS_CLK PMIC_SPI_DBG_MISO PMIC_SPI_DBG_MISO 26 XDP_PRDY_N
6 MPTI_HS_CLK 53 51 52 54 ID0 YA 7 CLV_KBD_DKIN0 5
PMIC_SPI_DBG_CLK
55 53 54 56 PMIC_SPI_DBG_CLK 26 3 YB 9 CLV_KBD_DKIN1 5
JTAG2_TCK 23,24 HOME_BUTTON#
57 55 56 58 6 IA1 YC 12 CLV_KBD_DKIN2 5
XDP_BLK_DP
59 57 58 60 24 GPI_VOLUMEDOWN# 10 IB1 YD CLV_KBD_MKIN5 5
7 JTAG_TCK JTAG_TCK XDP_BLK_DN
59 60 22 I2S_INT# 13 IC1
20 SENSOR_HUB_RST# ID1
HRS_DF40C-60DS-0P4V
CONN@ XDP_MUX_EN 1 8
15 SEL GND
EN#
XDPA@
C PI5C3257QEX_QSOP16 C

NO_XDPA@
HOME_BUTTON# R862 1 2 0_0201_5% CLV_KBD_DKIN0

NO_XDPA@
XDP DEBUG GPI_VOLUMEDOWN# R863 1 2 0_0201_5% CLV_KBD_DKIN1

NO_XDPA@
I2S_INT# R864 1 2 0_0201_5% CLV_KBD_DKIN2

+V_1P80_VCCAON NO_XDPA@
+V_1P80_VCCAON SENSOR_HUB_RST# R865 1 2 0_0201_5% CLV_KBD_MKIN5
XDP@ 1
+V3.3A
1 XDP@
C576
0.1U_0201_10V6K C575
2
0.1U_0201_10V6K 1 XDPA@
JXDP1 CONN@ 2
1 2 C565
XDP_PREQ_N_BUFF 3 GND0 GND1 4 U26
OBSFN_A0 OBSFN_C0 0.1U_0201_10V6K
XDP_PRDY_N R882 1 XDP@ 2 0_0201_5% 5 6 XDP_BLK_DP 2 16 2
7 OBSFN_A1 OBSFN_C1 8 5 IA0 VCC
XDP_BPM_3_N CLV_KBD_DKIN3 R883 1 XDP@ 2 0_0201_5% XDP_BPM_3_N_R 9 GND2 GND3 10 XDP_PWRMODE_2 11 IB0
5 CLV_KBD_DKIN3 OBSDATA_A0 OBSDATA_C0 IC0
XDP_BPM_2_N R884 1 XDP@ 2 0_0201_5% XDP_BPM_2_N_R 11 12 XDP_PREQ_N_BUFF 14 4
13 OBSDATA_A1 OBSDATA_C1 14 ID0 YA 7 CLV_KBD_MKIN6 5
XDP_BPM_1_N R885 1 XDP@ 2 0_0201_5% XDP_BPM_1_N_R 15 GND4 GND5 16 3 YB 9
OBSDATA_A2 OBSDATA_C2 19 COMBO_UART_WAKE IA1 YC CLV_KBD_MKOUT6 5
XDP_BPM_0_N R886 1 XDP@ 2 0_0201_5% XDP_BPM_0_N_R 17 18 6 12
19 OBSDATA_A3 OBSDATA_C3 20 10 IB1 YD CLV_KBD_MKIN4 5
GND6 GND7 24 GPI_VOLUMEUP# IC1
21 22 13
OBSFN_B0 OBSFN_D0 20 SENSOR_HUB_INT ID1
23 24
25 OBSFN_B1 OBSFN_D1 26 XDP_MUX_EN 1 8
CLV_KBD_MKIN3 R889 1 XDP@ 2 0_0201_5% XDP_C1_BPM_3_N 27 GND8 GND9 28 15 SEL GND
5 CLV_KBD_MKIN3 OBSDATA_B0 OBSDATA_D0 EN#
CLV_KBD_MKIN2 R890 1 XDP@ 2 0_0201_5% XDP_C1_BPM_2_N 29 30
5 CLV_KBD_MKIN2 31 OBSDATA_B1 OBSDATA_D1 32 XDPA@
XDP_C1_BPM_1_N R904 1 XDP@ 2 0_0201_5% XDP_C1_BPM_1_N_R 33 GND10 GND11 34
OBSDATA_B2 OBSDATA_D2 PI5C3257QEX_QSOP16
B XDP_C1_BPM_0_N R919 1 XDP@ 2 0_0201_5% XDP_C1_BPM_0_N_R 35 36 B
37 OBSDATA_B3 OBSDATA_D3 38 NO_XDPA@
XDP_PWRMODE_0 CLV_KBD_MKOUT4 R893 1 XDP@ 2 1K_0201_5%XDP_PWRMODE_0_R 39 GND12 GND13 40 XDP_BLK_DP_R R897 1 XDP@ 2 0_0201_5% XDP_BLK_DP COMBO_UART_WAKE R871 1 2 0_0201_5% CLV_KBD_MKIN6
XDP_PWRMODE_1 R894 1 XDPA@ 2 1K_0201_5%XDP_PWRMODE_1_R 41 PWRGOOD/HOOK0 ITPCLK/HOOK4 42 XDP_BLK_DN_R R898 1 XDP@ 2 0_0201_5% XDP_BLK_DN
43 HOOK1 ITPCLK#/HOOK5 44 NO_XDPA@
XDP_PWRMODE_2 R924 1 XDPA@ 2 1K_0201_5%XDP_PWRMODE_2_R 45 VCC_OBS_AB VCC_OBS_CD 46 TESTMODE_MUX GPI_VOLUMEUP# R867 1 2 0_0201_5% CLV_KBD_MKOUT6
PMIC_PWRGD R896 1 XDPA@ 2 1K_0201_5% PMIC_PWRGD_R 47 HOOK2 RESET#/HOOK6 48 XDP_RESET_N R899 1 XDP@ 2 0_0201_5% EXTRESET_N
26,5 PMIC_PWRGD 49 HOOK3 DBR#/HOOK7 50 NO_XDPA@
51 GND14 GND15 52 JTAG_TDO SENSOR_HUB_INT R869 1 2 0_0201_5% CLV_KBD_MKIN4
53 SDA TD0 54 JTAG_TRST_N
55 SCL TRST# 56 JTAG_TDI
JTAG_TCK 57 TCK1 TDI 58 JTAG_TMS
59 TCK0 TMS 60 FW_STRAP0_R
GND16 GND17
SAMTE_BSH-030-01-L-D-A

XDP_C1_BPM_1_N R873 1 XDP@ 2 0_0201_5% CLV_KBD_MKIN1


CLV_KBD_MKIN1 5
XDP_BLK_DN R874 1 XDPA@ 2 0_0201_5% CLV_KBD_MKIN7
CLV_KBD_MKIN7 5
XDP_PWRMODE_1 R877 1 XDPA@ 2 0_0201_5% CLV_KBD_MKOUT5
CLV_KBD_MKOUT5 5
XDP_C1_BPM_0_N R876 1 XDPA@ 2 0_0201_5% CLV_KBD_MKIN0
DBG_CARD_PRSNT_N control circuits into debug board CLV_KBD_MKIN0 5
+V_1P80_VCCAON

+V3.3A
JTAG_TMS R901 1 XDPA@ 2 150_0402_5%
+V_1P80_VCCAON JTAG_TDI R902 1 XDPA@ 2 56_0402_5%
A JTAG_TDO R903 1 XDPA@ 2 150_0402_5% A
1

XDPA@ JTAG2_TMS R932 1 XDPA@ 2 150_0402_5%


R868 JTAG2_TDI R934 1 XDPA@ 2 56_0402_5%
10K_0201_5% JTAG2_TDO R940 1 XDPA@ 2 150_0402_5%
2
G

Q12 XDPA@
2

FW_STRAP0 3 1 R870 1 2 0_0201_5% XDP_MUX_EN JTAG_TCK R911 1 XDPA@ 2 56_0402_5%


S TR BSS138W 1N SOT-323-3 JTAG_TRST_N R910 1 XDPA@ 2 56_0402_5%
S

JTAG2_TCK R942 1 XDPA@ 2 56_0402_5%


XDPA@
1

CLRP1
@ SHORT PADS Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Debug
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R02
Date: Thursday, April 11, 2013 Sheet 25 of 35
5 4 3 2 1
5 4 3 2 1

PMUX INPUT

1
PR1249
150K_0402_1%

2
+VBATA

1
PR1250 PU20

5
51K_0402_1%
PR1247 2 @ PR1231 0_0201_5%

P
B 4 1 2 BATT_ACOK
100K_0402_1%
REGN

2
1 Y
A

G
BATT_ACOK

2
2

1
D D
H=>0.65*+VBATA

3
PR1260 1 2 MC74VHC1G08DFT2G_SC70-5
2
100K_0402_1% PQ1201 PR1248 L=>0.17*+VBATA

1
PR1254 @ PR1257 51K_0402_1% 10K_0402_1%

2
100K_0402_1%
1

2
PC1203

LTC015EUBFS8TL_UMT3F
2.2U_0402_10V6M
1

1
1 2 2

PR1252 100K_0402_1%
29 CHARGER_PWRGD

1
@ PR1253

3
Change pull high to +VBATA (2/6) 30K_0402_1%

+VBATA

+V_1P80_VCCAON

C C
1

1
PR1201 PR1202 PR1205 PR1204 PC1201
10K_0201_1% 10K_0201_1% 10K_0201_1% 10K_0201_1% 1U_0201_6.3V6M

2
@ PU1201C
@ C14 N4 PMIC_BACKLIGHT_EN 31
2

PWMVDD BACKLIGHTEN N6
EXT3P3SVREN V3.3S_EN 30
12,13 DISP_BRDG_PWM @ PR1214 1 2 0_0201_5% PWM0 C15 N5 V5S_EN 30
TP1202 DISP_SEC_BKLT_PWM F12 PWM0 EXT5SVREN P8 TP1203
TP1204 PWM2 J11 PWM1 EXTVDD1FBEN M6 TP1205
B5 PWM2 EXTVDD1VREN L6 +VBATA
DFLT_LOWBATTLS0 PANELEN PMIC_PANEL_EN 13
C6
D6 DFLT_LOWBATTLS1 P12 @ PR1238 1 20_0201_5%
intel request 0108 DFLT_LOWBATT VDD_GPIO0HV

1
TP1208 PC12021 2
1U_0201_6.3V6M R10 PMIC_OTG TP1206
@ PR1258 0_0201_5% 1 2 GPIO0HV0 T9 VOTG_CNTRL TP1209 PC1212
+V_5P00_USB EN_FSTK 24 GPIO0HV1
1

1 2 @ PR1259 0_0201_5% C4 P9 PWR_MUX_SEL TP1207 1U_0201_6.3V6M

2
PR1207 PR1206 PR1203 PR1208 @ PR1216 1 2 0_0201_5% CHRLED E11 VBUS GPIO0HV2 P10 @ PR1237 1 20_0201_5%
10K_0201_1% 10K_0201_1% 10K_0201_1% 10K_0201_1%
PC1204 29 CHR_LED#
F13 CHRLED GPIO0HV3 U8 @ PR1236 1 20_0201_5%
V5A_EN 30 +VBATA
2 1 BATT_ACOK C5 BATTID VDD_GPIO1HV R7
@ @ ACOK GPIO1HV0 PMIC_SPI_DBG_CLK 25

1
TP1210 G12 R8 PMIC_SPI_DBG_SS# 25
2

@ PR1217 TP1212 G13 BCUDISCRIT GPIO1HV1 T8 PC1213


0.47U_0402_10V4Z BATTID Short to GND 1/3 BCUDISA GPIO1HV2 PMIC_SPI_DBG_MOSI 25
0_0201_5% TP1214 H12 R9 1U_0201_6.3V6M
29 PMIC_CHARGE_COMPLETE PMIC_SPI_DBG_MISO 25

2
1 2 C3 BCUDISB GPIO1HV3
@ PR1218 1 20_0201_5% D5 CHGCOMP N7 TP1216 +VBATA
23,29 CHARGE_DISABLE_EC CHRDIS VEEPROG
BATTID PR1219 1 2 200K_0402_1% E12
MBI MBI: 1.5V N13
Change Net name to CHARGE_DISABLE_EC 1/3 VSYS1
TP1215 29 BATT_PSEL @ PR1220 1 2 0_0201_5% E6 L4
ILIM VSYS2 D2
E14 VSYS3 H6 PR1221 2 1 0_0603_5%
SDPBOOT A5 MODEM_RSTB VBATTBKUP
27 V_1P50_VREFBUFF SDPBOOT +CHGRTC

1
A3 M13 PR1241 0_0201_5%
+V_2P80_CORE 18 PMIC_USB_DCP# USBDCPZ SPIVDD M14 PM_SPI_0_SDI
1 2 +V_1P22_VCCAON PC1205 PC1206 PC1207
SPIMISO SPI_0_SDI 11,5

1
PR1245 TP1217 K13 PM_SPI_0_SDO
1 PR1242 20_0201_5%

1U_0201_6.3V6M

0.1U_0201_6.3V6K

0.1U_0201_6.3V6K
SPI_0_SDO 11,5

2
@ 10K_0201_1% @ PR1222 1 20_0201_5% G5 SPIMOSI L11 PM_SPI_0_CLK
1 PR1243 20_0201_5% PR1232 @
5 PMIC_RESET# RESETB SPICLK SPI_0_CLK 11,5

1
2 1 @ PR1223 1 2 0_0201_5% D4 L14 PM_SPI_0_SS0
1 2 0_0603_5%
24,25,29 EXTRESET_N J12 EXTRESETB SPISSB N12 SPI_0_SS0 11,5
7 PROCHOT_N PR12440_0201_5% PC1208 PC1214
PROCHOTB SPIDEBUG
1

TP1218 SDWNB F14 1U_0201_6.3V6M 1U_0201_6.3V6M

2
PR1224 PR1225 PR1226 PR1228 PR1229 PC1209 C17 SDWNB L12
G4 GPIO1LV7 SPIGND
24.9K_0402_1% 24.9K_0402_1% 24.9K_0402_1% 24.9K_0402_1% 24.9K_0402_1% 1U_0201_6.3V6M 24 PWRBTN_N
2

PR1246 @ PR1227 1 20_0201_5% H15 PWRBTNB


1 2 7 THERMTRIP# THERMTRIPB
@ PR1230 1 20_0201_5% G6
+V_1P80_VCCAON 25,5 PMIC_PWRGD
2

100K_0201_1% PWRGD
H11
BPTHERM @ PR1234 1 20_0201_5% B10 ADCVDD
SYSTHERM0 C12 BPTHERM
SYSTHERM1 D12 SYSTHERM0 D14
SYSTHERM2 F11 SYSTHERM1 GND_ANA1 B11 +V_1P80_VCCAON
SYSTHERM3 D11 SYSTHERM2 GND_ANA3 E4
SYSTHERM3 GND_ANA5
1

E10 T11
29 IBATTSENSEN IBATTSENSEN GND_ANA11
PR2513 PR2514 PR2515 PR2516 PR2517 C11 R11
29 IBAYTTSENSEP E8 IBATTSENSEP GND_ANA12
47K_0402_1%
GPADC8

1
47K_0402_1%_NCP15WB473F03RC

47K_0402_1%_NCP15WB473F03RC

47K_0402_1%_NCP15WB473F03RC

47K_0402_1%_NCP15WB473F03RC

G14
RTCXTALIN A12 GND_DIG1 J6 PR1233 @
6 RTCXTALIN
2

RTCXTALOUT B12 RTCXTALIN GND_DIG2 C8


6 RTCXTALOUT RTCXTALOUT GND_DIG3 10K_0201_1%
D13 M5
C13 SLPCLK1 GND_DIG11 P7
19 SLP_CLK2

2
SLPCLK2 GND_DIG12 U11
GND_DIG13
B Close LCD Panel Close SOC Close PMIC Close Charger IC B8 T10 PMIC_SPI_DEBUG 25,5 B
9 SVID_CLKOUT SVIDCLKIN GND_GPIO0HV

1
9 SVID_CLKSYNC
B9 T7
D9 SVIDCLKSYNCH GND_GPIO1HV1 U7 PR1235
9 SVID_DOUT E9 SVIDDIN GND_GPIO1HV2
9 SVID_DIN SVIDDOUT 10K_0201_1%
H14
TESTMODE_MUX# E13 GND_PWM G11

2
TP1220 F9 TESTMODE GND_ADC
TP1221 M4 TESTVAN1
L5 TESTVAN2
K5 TESTDIG0 AGND_AVP_PMIC
TESTDIG1

+V_1P22_VCCAON
1

+V3.3A PR1256
10K_0201_1%
@
2
1

PR1255 TESTMODE_MUX#
10K_0201_1%
@
1

D
2

2 PQ1205 @
25 TESTMODE_MUX
G NTS4001NT1G_SC70-3
S
3

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PMIC (1 of 3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
A1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R010.2
Date: Friday, April 12, 2013 Sheet 26 of 32
5 4 3 2 1
5 4 3 2 1

+V_1P08_VCC

+V_1P80_AON

1
D PC1318 D

+V_1P00_VCCA

10U_0402_6.3V6M
2
1
A6:0.1A,6mil,1via +V_1P00_VCCAS
PC1302
A4:0.1A,6mil,1via 1U_0201_6.3V6M

2
D10:0.4A,16mil,1via +V_2P85_1P80_VCCSDIO
+V3.3A A9:0.4A,16mil,1via

1
PU1201B PC1303
4.7U_0402_6.3V6M
+V_2P85_EMMC1 A7

2
A6 A9 D10 A4 VCC108
TP1301

1
PC1304 PC1307 PC1308 PC1309 B7 D8 PC1305
VCC108VIN VCC108FB 4.7U_0402_6.3V6M PC1306 +V_2P80_CORE
1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M
1

1
+V_1P22_VCCAON PC1320 A6 2.2U_0402_6.3V6M

2
PC1323 4.7U_0402_6.3V6M A4 VPROG1VIN A8

1
4.7U_0402_6.3V6M VPROG2VIN VCCA100 C16
2

+V_1P80_AON PC1321 PC1331 @ D10 VCCA100AS

1
1U_0201_6.3V6M A9 VEMMC1VIN
22U_0603_6.3V6M

2
1

1
PC1324 VEMMC2VIN E1 PC1322
1U_0201_6.3V6M A11 VCCSDIO F5 2.2U_0402_6.3V6M

2
1
V_2P85_EMMC2 A10 VEMMC1 VCCSDIOFB

2
VEMMC2 K2
C2 VCORE +V_2P80_VPROG1
+V_1P08_VCCAS

2
D3 Q122VIN C10
Q180VIN VREFBUF V_1P50_VREFBUFF 26
PC1325
2.2U_0402_6.3V6M B14 D7
C1 VCC108AS VPROG1
+V_1P08_VCCAON
1

VCC108AON E7 +V_2P80_VPROG2
PC1327 C9 VPROG1FB
4.7U_0402_6.3V6M D1 VCCA100VIN B4
2

1
VCCSDIOVIN VPROG2

1
A15 B6 +V_3P30_VCC PC1326
+V_1P80_AON LDOVIN1P22 VPROG2FB 2.2U_0402_6.3V6M
2

PC1329 K6 U10

2
LDOGND1P22 VCC330

1
2.2U_0402_6.3V6M C7 PC1328
B3 LDOAGND1P22 H4 2.2U_0402_6.3V6M
LDOGND3P0 VREF075
1

A14 F6

2
1
H5 LDOAGND3P0 VREF126 PC1315 PC1310
+V3.3A GND_REFSYS K3 2.2U_0402_6.3V6M

1U_0201_6.3V6M
2

VDDLP

1
C U9 K1 PC1314 C

2
PC1311 VCC330VIN VMSIC

1
4.7U_0402_6.3V6M PC1312 PC1313
+V3.3A

2.2U_0402_6.3V6M

2
1

SNB5072AZNBR_NFBGA289 2.2U_0402_6.3V6M

10U_0402_6.3V6M
2

2
+V_1P22_VCCAON
2

PC1316
PJ504

1
1U_0201_6.3V6M
1

PC1317 PC1301 1 2
1 2
1U_0201_6.3V6M 1U_0201_6.3V6M

2
2

JUMP_43X39
@
AGND_AVP_PMIC

PU1201D
F8 M7
F10 VSS1 PBKG1 M8
G7 VSS2 PBKG2 M9
G8 VSS3 PBKG3 M10
G9 VSS4 PBKG4 M11
G10 VSS5 PBKG5 M12
H3 VSS6 PBKG6 N8
H8 VSS7 PBKG7 P11
H9 VSS8 PBKG8
H10 VSS9
J1 VSS10
J2 VSS11
B J3 VSS12 B
J4 VSS13
J5 VSS14
J7 VSS15
J8 VSS16
J9 VSS17
J10 VSS18
J13 VSS19
J14 VSS20 A1
K4 VSS21 NC1 A2
K7 VSS22 NC2 B1
K8 VSS23 NC3 B2
K9 VSS24 NC4 A16
K10 VSS25 NC5 A17
K11 VSS26 NC6 B16
K12 VSS27 NC7 B17
K14 VSS28 NC8 T1
K15 VSS29 NC9 T2
K16 VSS30 NC10 U1
K17 VSS31 NC11 U2
L1 VSS32 NC12 T16
L2 VSS33 NC13 T17
L3 VSS34 NC14 U16
L7 VSS35 NC15 U17
L8 VSS36 NC16 F4
L9 VSS37 NC17
L10 VSS38
L13 VSS39
L15 VSS40
L16 VSS41
L17 VSS42
VSS43

SNB5072AZNBR_NFBGA289

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title
PMIC (2 of 3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A2 Cheetah_CT LA-A411P_R01
0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 12, 2013 Sheet 27 of 32
5 4 3 2 1
5 4 3 2 1

D D

+VBATA

1.2A,48mail,2via 3.8A,160mil,8via +V_VNN


PU1201A PL1401 0.47UH_MVLS-252012-R47M_2.2A_20%
M17 M16 1 2
N17 VNNVIN_1_1 VNNLX_1_1 N16 PL1402 0.47UH_MVLS-252012-R47M_2.2A_20% PC1408 PC1403 PC1404 PC1405 PC1406 PC1407
PC1435 PC1401 PC1434 PC1402 P17 VNNVIN_1_2 VNNLX_1_2 P16 1 2 DON,0.95V
VNNVIN_2_1 VNNLX_2_1

1
R17 R16 PL1403 0.47UH_MVLS-252012-R47M_2.2A_20%

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
U15 VNNVIN_2_2 VNNLX_2_2 T15 1 2
4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M
1

1
U14 VNNVIN_3_1 VNNLX_3_1 T14 PL1404 0.47UH_MVLS-252012-R47M_2.2A_20%

2
U13 VNNVIN_3_2 VNNLX_3_2 T13 1 2
U12 VNNVIN_4_1 VNNLX_4_1 T12
2

2
VNNVIN_4_2 VNNLX_4_2
M15 N11
N15 VNNGND_1_1 VNNSENSE VNNPUSENSE 9 +V_1P22_VCCAON
VNNGND_1_2 PL1405 1UH_PHI25201B-1R0MS_1.8A_20% 1A 40mil,2via
N14 D16 1 2
P15 VNNGND_1_3 VCC122AONLX1_1 E16 PC1409 PC1410 PC1418
R15 VNNGND_2_1 VCC122AONLX1_2 F16 AON,1.25V

1
P14 VNNGND_2_2 VCC122AONLX2_1 G16

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
P13 VNNGND_3_1 VCC122AONLX2_2
R14 VNNGND_3_2 B15 @ PR1401 1 20_0201_5% +V_VCC
C C

2
+VBATA R13 VNNGND_3_3 VCC122AONFB PL1406 0.47UH_MVLS-252012-R47M_2.2A_20% 3.5A ,140mil ,7via
R12 VNNGND_4_1 M2 1 2
VNNGND_4_2 VCCLX_1_1 N2
1.1A,44mail,2via VCCLX_1_2
PL1407 0.47UH_MVLS-252012-R47M_2.2A_20% PC1411 PC1412 PC1413 PC1414 PC1415 PC1416
D17 P2 1 2 DON,0.95V
VCC122AONVIN1_1 VCCLX_2_1

1
PC1417 PC2510 PC2511 E17 R2 PL1408 0.47UH_MVLS-252012-R47M_2.2A_20%

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
F17 VCC122AONVIN1_2 VCCLX_2_2 T4 1 2
G17 VCC122AONVIN2_1 VCCLX_3_1 T3 PL1409 0.47UH_MVLS-252012-R47M_2.2A_20%
4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

2
1

VCC122AONVIN2_2 VCCLX_3_2 T6 1 2
D15 VCCLX_4_1 T5
E15 VCC122AONGND1 VCCLX_4_2
2

F15 VCC122AONGND2 N9
G15 VCC122AONGND3 VCCSENSE VCCPUSENSE 9
VCC122AONGND4 N10
M1 VSSSENSE VSSPUSENSE 9
N1 VCCVIN_1_1
P1 VCCVIN_1_2 E5
+VBATA R1 VCCVIN_2_1 GVCC180AON
0.1A ,10mil ,1via
U3 VCCVIN_2_2 B13 +V_1P80_VCC
VCCVIN_3_1 VCC180 PAD T1401
U4 F7 @ PR1402 1 20_0201_5%
U5 VCCVIN_3_2 VCC180AONFB +V_1P80_VCCAON +V_1P80_AON
1.2A,48mail,2via VCCVIN_4_1 PL1410 1UH_PHI25201B-1R0MS_1.8A_20% PC1426 PC1427
U6 F2 1 2 0.6A ,24mil ,1via
VCCVIN_4_2 V180AONLX1 G2
PC1421 PC1422 PC1423 PC1424 part count0411 AON,1.836V

1U_0201_6.3V6M

10U_0402_6.3V6M
1

1
M3 V180AONLX2 H2
VCCGND_1_1 V180AONLX3
PC1425 0.108A ,10mil ,1via
N3 H7 @ PR1403 1 2
4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

VCCGND_1_2 V180AONFB
1

1
P3 0_0201_5% +V_VNNAON
0.2A ,10mil ,1via

22U_0603_6.3V6M
PL1411 1UH_PHI25201B-1R0MS_1.8A_20%

2
R3 VCCGND_2_1 J16 1 2
P4 VCCGND_2_2 VNNAONLX H13 1 2 PQ1401
2

2
P5 VCCGND_3_1 VNNAONFB @ PR1404 0_0201_5% PC1431 AON,0.95V +V_1P80_AON FDMA510PZ_MICROFET6-8 +V_1P80_VCCAON

3
R4 VCCGND_3_2 H16
VCCGND_3_3 VNNAONGND1

1
P6 J15 PC1430 1

22U_0603_6.3V6M
1
R5 VCCGND_4_1 VNNAONGND2 J17 4.7U_0402_6.3V6M 2
R6 VCCGND_4_2 VNNAONVIN1 H17 4 5

2
VCCGND_4_3 VNNAONVIN2 8 6
+VBATA

2
F1 7
V180AONVIN1 G1
V180AONVIN2 H1
V180AONVIN3

1
PC1432

1
E2 4.7U_0402_6.3V6M
+V_1P80_AON V180AONGND1 E3 2 PC1428 PC1429
V180AONGND2 F3 1U_0201_6.3V6M
0.1A ,10mil ,1via 10U_0402_6.3V6M

2
B A13 V180AONGND3 G3 B
VCC180VIN V180AONGND4
1

PC1433 SNB5072AZNBR_NFBGA289
1U_0201_6.3V6M

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title
PMIC (3 of 3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A2 Cheetah_CT LA-A411P_R01
0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 12, 2013 Sheet 28 of 32
5 4 3 2 1
5 4 3 2 1

Change input to +VBATA (2/6)

Part count 0411 Add LDO for EC power 1/3


+VBATA

2
PR1525 @ PU301 ACES_50458-00801-001 Change net name 1/3
1
0_0201_5% 5 +EC_VCC 1
VIN VOUT 1 2

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M
2 2 3 PR1544 2 1 100_0201_1%
I2C_2_SDA_EC 23

1
PR1534@ GND 3 4 PR1542 2 1 100_0201_1%
4 5 I2C_2_SCL_EC 23 BATT++
1 2 3 4 PR1530 1 2 100_0201_1%

PC1528

PC1529
24,25,26 EXTRESET_N TS 29

2.2U_0402_6.3V6M
0_0201_5% EN NC 5 6 PR1532 1 2 100_0201_1% PL1501
BI 24

2
6 7

1
HCB2012KF-121T50_0805
7 8 1 2 +V_BATTERY

PC1527
8 9

2
GND 10

1
GND PR1535 @
@ PJP2801 0_0201_5%

1000P_0402_25V8J
D del Pc1527 for reset function 0220 D

0.01U_0402_25V7K
1
Swap Pin order 1/3

1
PC1508

PC1510
ADD in PVT MEMO 0328

2
PMUX INPUT
DC_IN PQ1501 PQ1502
AON7403L_DFN8-5 AON7403L_DFN8-5
1 1
5 2 2 5
3 3

0.1U_0402_25V6
2

1
4

4
1

1
PR106 PR109

PC126
1
10K_0402_5% 100K_0402_1% PC1505 @
PC102

1500P_0402_50V7K
2

2
1U_0603_25V6K PL1503
1

2
JP1 HCB2012KF-121T50_0805
1 1 2
1 2 DC_IN
2
3

1000P_0402_25V8J

100P_0402_50V8J
3 4
PQ1612 Follow intel FFRD (3/25) 4

1
5 ACIN_detect#
2
ACIN_detect# LTA044EUBFS8TL_UMT3F PR108 5 6

PC1524

PC1526
GND1 7
100K_0402_1%

2
2 GND2

PQ1503 Change to 5 pin DCIN connector 1/3


1

LTC015EUBFS8TL_UMT3F

2
1

PR107
3

100K_0402_1%
2

C C

change PH source in PVT (0311)


+EC_VCC
+VBATA
26 CHR_LED#

Add net name to link EC 1/3 PL1502 PJ1501 4A,160mil,8via


2A,80mil,4via change to 0805 25V 0220 2.2UH_TMPC0515HP-2R2MN-Z01_4A_20% JUMP_43X79
change PH resistor in PVT (0325) 1 2 2 1

1
23 CHARGER_PWRGD_EC PC1511 2 1
+VBATA
1

1
PC1530 1U_0603_25V6K
1

PR1528 PR1511 PR1512 PR1517 10U_0805_25V6K PU1501

1
23 CHARGE_COMPLETE_EC
@ 0_0201_5% PC1512 PC1517 PC1525
10K_0201_1%

2.2K_0201_1%

2.2K_0201_1%

2
1 1 19
2

VBUS_1 SW1
PR1513 intel request 0108

10U_0402_6.3V6M

10U_0402_6.3V6M

22U_0603_6.3V6M
2

2
30.1K_0402_1% 24 20
2

VBUS_2 SW2
PC1513 2 1 10U_0603_25V6M 23 21 BTST 1 2 PC1514
2

PMID BTST 0.047U_0402_16V7K


Part count 0411
2 1 0_0201_5% 4 15
26 PMIC_CHARGE_COMPLETEPR1531 @
STAT SYS_1
PR1533@1
@ 2 3 16
26 CHARGER_PWRGD /PG SYS_2
Mount PR1533 for PMIC sequence 1/3 0_0201_5%
PR1514 2 @ 1 0_0201_5% I2C_2_SCL_EC Add net name to link EC 1/3 5 17
23,24,5 I2C_2_SCL SCL PGND_1
PR1515 2 @ 1 0_0201_5% I2C_2_SDA_EC 6 18 0.02_1206_1%
23,24,5 I2C_2_SDA SDA PGND_2 PR1543
4A,160mil,8via
PR1516 2 @ 1 0_0201_5% 7 13 1 4
B
7 CHG_INT# INT BAT_1
change Ilim value (3/25) +V_BATTERY B
@ PR1519 1 2 10K_0201_1% PR1518 2 @ 1 0_0201_5% 8 14 2 3
+VBATA

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

10U_0402_6.3V6M
OTG BAT_2

THERMAL PAD

1
9 10 PR1520 1 2 357_0402_1% PC1515

PC1519

PC1520

PC1521

PC1522

PC1523
23 CHG_INT#_EC 23,26 CHARGE_DISABLE_EC /CE ILIM 4.7U_0402_6.3V6M
1

Add net name to link EC 1/3 Change net name to link EC 1/3 BATT_PSEL 2 12

2
1

D PSEL TS2
2 PQ1505 @ PR1521 22 11 REGN
18 PHY0_PSW REGN TS1
G NTS4001NT1G_SC70-3 10K_0201_1% REGN IBATTSENSEN 26

1
S
3

PC1518

25
2

1
@ PR1522 PR1523 BQ24192IRGER_QFN24_4X4 1U_0603_25V6K PR1524 IBAYTTSENSEP 26

2
10K_0201_1% 10K_0402_1% PD1501 5.23K_0402_1%

RB551V-30_SOD323-2
1

2
+VBATA BTST TS TS 29
2

1
PR1527
PC1516 30.1K_0402_1%
@ PR1526
2

10K_0201_1% 1U_0402_16V6K
Need modify the OTP setting (2/6)
1

2
26 BATT_PSEL
2

PR1529
10K_0201_1%
1

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title
BATTERY CHARGER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D Cheetah_CT LA-A411P_R01 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 12, 2013 Sheet 29 of 32
5 4 3 2 1
5 4 3 2 1

TUNE THE OUTPUT VOLTAGE TO 5.1V


PR1602 PR1601
107K_0402_1% 976K_0402_1%
1 2 1 2

13

14

15

16

17
PU1604
D
PQ1608 +V5S D

+V5A

FB
GND

VOUT

VOUT

PADGND
FDMA510PZ_MICROFET6-8
PJ1603
Spec: Ven >0.8*VBAT 12 1 5V_VOUT 2 1 +V5A 7
LBO VOUT 8 6
VBAT=5V-->Ven>4V Just change PN to 61030 PAD-OPEN 2x2m 4 5
2
PR1622 1 2 10K_0201_1% 11 2 1
26,30 V5A_EN EN NC
1

1
1

1
3
+ PC1632 PC1635 PC1634
10 3 150U_B2_6.3VM_R35M 22U_0603_6.3V6M PR1624 PC1630 PC1636 10U_0402_6.3V6M

2
SYNC SW
100K_0201_1% 0.022U_0402_25V7K 1500P_0402_50V7K

2
1

2
2
PR1620 PC1633 PR1625

2
499K_0201_1% 0.1U_0201_6.3V6K 0_0201_5% 9 4

2
LBI SW
@ @

PGND

PGND

PGND
VBAT
2

1
PR1618
TPS61032RSAR_QFN16_4X4 1K_0201_1%

1
PL1606

1 2
2.2UH_PCMB041B-2R2MS_2.75A_20% D
2 PQ1609
26 V5S_EN
G NTS4001NT1G_SC70-3

2
+VBATA S

3
1
PL1608 1 2 HCB2012KF-121T50_0805 PC1601

2
0.1U_0201_6.3V6K
Current limit:3.6A~4.5A

1
PC1631
10U_0402_6.3V6M

2
C C

PQ1606
FDMA510PZ_MICROFET6-8 +V3.3S
+V3.3A 7
8 6
4 5
2
1
26,30 V5A_EN

1
2

1
3
PC1616
PR1630 PR1621 PR1619 PC1612 PC1613 10U_0402_6.3V6M

2
0_0402_5% 0_0201_5% 100K_0201_1% 0.022U_0402_25V7K 1500P_0402_50V7K

2
@ @
1

2
3V3_EN 3V3_SYNC
improve the dynamic transient
1

1
PR1616 PR1623 0225
100K_0201_1% 0_0201_5% PR1627
@ PC1617 1K_0201_1%
33P_0402_50V8J
2

2
1
D

1
PC1614 1 2 0.1U_0201_6.3V6K 2 PQ1607
+V3.3A

2
PU1603 PR1626 G NTS4001NT1G_SC70-3
26 V3.3S_EN
560K_0402_1% S

3
14 1 B++

1
PG VINA

1
3V3_SYNC 13 2

2
+VBATA 3V3_EN 12 PS/SYNC GND 3 VDD_3V3_SYS_FB PJ1604 PC1602
11 EN FB 4 3V3_VOUT 2 1

2
PL1607 2 1 B++ 10 VIN VOUT 5 0.1U_0201_6.3V6K
HCB2012KF-121T50_0805 9 VIN VOUT 6 PAD-OPEN 2x2m
L1 L2
1

1
PGND

8 7
B L1 L2 PC1615 PC1611 PR1617 B
22U_0603_6.3V6M 22U_0603_6.3V6M 100K_0402_1%
2

2
1

TPS63020DSJR_QFN14_4X3
15

PC1609 PC1610

2
10U_0402_6.3V6M 10U_0402_6.3V6M OVP:5.5V~7V
2

PL1609 1 2
1.5UH_TMPC0412HP-1R5M-Z02_3A_20%

Current limit:3.5A~4.5A +V5A/+V3.3A discharge +V5A


+VBATA

1
PR1632 PR1629 just change PN to 100_1206 (3/19)
100_1206_5% 100_1206_5%

3 2
1
PR1628 PQ1610B
100K_0201_1%
V5A_EN# 5
+V3.3A

2
6
PQ1610A L2N7002DW1T1G_SC88-6

4
Id 500mA

2
V5A_EN 2 PR1631
330_0402_1%

1
L2N7002DW1T1G_SC88-6

1
D
2 PQ1611
G NTS4001NT1G_SC70-3
S Id 270mA

3
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCDC (3/5V)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
A2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R010.2
Date: Tuesday, April 16, 2013 Sheet 30 of 32
5 4 3 2 1
5 4 3 2 1

Just change PN to Vth <2V 0219


this material is too high need to be changed 0411
D D
PQ1402
P5103EMG_SOT23-3 4.7UH_MMD-06AH-4R7M-V1_3A_20%
PL1412 PD1402 +Panel_PWR

D
3 1 1 2 SW 2 1
+VBATA
SX34_SMA2

100P_0402_50V8J

2.2U_1206_50V7K
1
PD1401

100K_0402_5%

2.2U_1206_50V7K

2.2U_1206_50V7K

2.2U_1206_50V7K
2
1

1
PC1443

PR1409

10_1206_1%
LL4148_LL34-2

0.1U_0603_50V7K
PR1411

PC1444

PC1442

PC1436

@ PC1440

PC1420
S CER CAP 220P 50V J NPO 0603
0.1U_0402_10V7K
1
PC1445

2
2
2

1 2
PC1447
1

2
1
@ PJ503
PR1406 JUMP_43X39

2
13 LCD_PWM 1 2 DCTRL

2
1
10K_0402_1%
+V5A

100P_0402_50V8J
1
Change jump (11/29)

1M_0402_1%
PR1407

PC1437

EN
+PANEL_FB 13

2
2

17

16

15

14

13
C PU1401 C

IFB6

IFB5
TPAD

EN
FAULT
2
PR1413

51_1206_5%
1 12 +PANEL_FB
PGND IFB4

1
SW 2 11 DCTRL
SW DCTRL

26 PMIC_BACKLIGHT_EN PR1412 TPS61181ARTER_QFN16_3X3


1 2 EN 3 10
VBAT GND
1

10K_0402_1%
100P_0402_50V8J
1
1M_0402_1%

PR1408 +Panel_PW4R 9 +PANEL_FB


@ PC1441

VO IFB3
2
2

1U_0402_16V6K

100P_0402_50V8J

ISET

IFB1

IFB2
1

CIN
@ PC1446
1
PC1438

8
2

+PANEL_FB

0.1U_0402_10V7K
62K_0402_1%
1

1
B B

PR1410

PC1439
+PANEL_FB

2
@ PJ1401 2
1 2

PAD-OPEN1x1m

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Backlight LED Power
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R010.2
Date: Friday, April 12, 2013 Sheet 31 of 32
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1


for PWR
Item Reason for change PG# Modify List Date Phase

Add EC to control charger 27,30 Change Net name PMIC_CHARGER_DISABLE to CHARGER_DISABLE_EC 1/3 EVT
1
D D
Add EC to control charger Add net name I2C_2_SCL_EC,I2C_2_SDA_EC,CHARGER_PWRGD_EC, 1/3 EVT
2 30
CHARGE_COMPLETE_EC,CHG_INT#_EC
Swap battery connector pin order to follow 30
Acer define Swap PJP2801 pin order 1/3 EVT
3

4 Add +EC_VCC power rail 30 Add PU301,PC1527,PC1528,PC1529 1/3 EVT

5 Change DCIN connector from 4pin to 5pin 30 Change JP1 to ACES_88266-05001 1/3 EVT

6
PMIC sequence issue 30 Mount PR1533 1/3
7 EVT
POWER rail V5A need to set higher change 31 change PU1604 PN to TPS61030 1/8
8 PU1604 PN to TPS61030 EVT

C 31 C
POWER rail V5A need to set higher change mount PR1601 PR1602 1/8 EVT
9 PU1604 PN to TPS61030
change vender to common material PC102,PC1511,PC1518 PC15130 PC1526 1/8
10 EVT

11 Follow intel schematic 30 PC1525 PC1516 PC1530 1/8 EVT


TI PMIC AC only bug
12

intel request 30 PC1331 3/5 PVT


13
30
PR1629
14 follow intel schematic 3/5 PVT
PI pin pull low to GND 29 PR1535 3/6 PVT
15
change Ilim value 28 PR1520 3/25 PVT
B
16 B

change PH resistor in PVT 29 PR1511 PR1512 3/25 PVT


17
need one more resistor to sfford the current 30 PR1629 PR1632 3/25 PVT
18
change the short pad resistor to not short pad 26 PR1223 4/11 PVT
19

20

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR PIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R010.2
Date: Friday, April 12, 2013 Sheet 32 of 32
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1


for HW
Item Reason for change PG# Modify List Date Phase
1 Change pwoer LED power to +EC_VCC 24 03/15 PVT
D change panel SHLR/UPDN strap (0,0) 13 unpop R678 03/15 PVT D
2

change touch I2C pull high resister 24 chg R670,R671 to 1.5K R 0402 03/15 PVT
3

4 touch board connector pin1 error 24 swap JTCH1 03/15 PVT


5 fine tune the crystal clock 5 ,20 change C1,C2 ,C711,C712 to 18P 03/15 PVT
6 add screw hole 23 add H6 03/18 PVT
7 change RF component for RF request 19 change R61 to C51 , R104 to C52 , R105 to L31 03/18 PVT
Reserve Rst btn pull up to +EC_VCC 24 Add R726 03/18 PVT
8
Reserve ANT2 circuit 19 remove JANT1 , R97, JANT2 , ANT2 , L31, C52 , R106 , R98 03/20 PVT
9
change JWIN1 PIN8 to DGND 23 03/20 PVT
10
C 22 C
11 change R723,R725 to R0402 03/20 PVT
net "EC_INT#_LS'' wrong pwoer rail 23 chenge R663 pull up to +EC_VCC 03/20 PVT
12
EMC request 5 C3,C4,C5,C6 change to 1000P and POP C3,C4,C5 03/20 PVT
13
EMC request 18 change D50 to EMC@ 03/20 PVT
14
EMC request 5 ,12 add C52,C53 for net "DISP_BRDG_RESET_N" 03/20 PVT
15
16 +V_3P30_VCC discharger 8 change R681 to 0603 and pop Q11,R681 03/21 PVT
17 23 chg H4 to 2P5N 03/21 PVT
24 Chg hole sensor U2 to AH180WG-7_SC59-3 03/21 PVT
18
modify sensor strap setting 20 POP R1061,R1069,R1070 ; unpop R1067,R1063,R1064 03/25 PVT
19
POP RTC curcuit 24 POP R722,Q16 03/25 PVT
B
20 B

add Homekey debounce 23 add C517 04/03 Pre MP


21
change LVDS bridge to A11 version 12 change U5 PN to SA00005ER30 04/10 Pre MP
22
change JP3 to HW part and change P/N 19 change JP3 PN to SN700000100 04/11 Pre MP
23
24 EMC request 11 Add D51 D52 for ESD request 04/15 Pre MP

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013./02/04 Deciphered Date 2014/04/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW PIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cheetah_CT LA-A411P_R020.2
Date: Monday, April 15, 2013 Sheet 33 of 35
5 4 3 2 1
www.s-manuals.com

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