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com b) Bridge circuits

Central Applications Office (CAO) c) Multiple Buses
TGT/PGT Comp. Sci. for KVS/NVS/AWS/DSSSB d) Buffer registers
1. Micro program is 7. To extend the connectivity of the processor
A. The name of source program in micro bus we use ______ .
computers a) PCI bus b) SCSI bus
B. The set of instructions indicating the c) Controllers d) Multiple bus
primitive operations in a system
C. Primitive form of macros used in assembly 8. The key feature of the PCI BUS is
language programming a) Low cost connectivity.
D. Program of very small size b) Plug and Play capability.
c) Expansion of Bandwidth.
2. The CPU of a Computer takes instruction d) Both a and c.
from the memory and executes them. This
process is called 9. PCI stands for
A. Load cycle B. Time sequence a) Peripheral Component Interconnect.
C. Fetch-execute cycle D. None of these b) Peripheral Computer Internet.
c) Processor Computer Interconnect.
3. When a program is being executed in an d) Processor Cable Interconnect
8085 microprocessor, its Program Counter
contains 10. The DMA transfer is initiated by _____
A. Number of instructions in the current a) Processor
program that have already been executed b) The process being executed
B. The total number of instructions in the c) I/O devices
program being executed d) OS
C. Memory address of the instruction that is
being currently executed 11. The technique where the controller is
D. Memory address of the instruction that is given complete access to main memory is
to be executed next a) Cycle stealing b) Memory stealing
c) Memory Con d) Burst mode
4. The control unit of computer
A. Performs ALU operations on the data 12. In DMA transfers, the required signals and
B. Controls the operation of the output addresses are given by the
devices a) Processor b) Device drivers
C. Both (a) and (b) c) DMA controllers d) The program itself
D. Directs the other unit of computers
13. The DMA transfers are performed by a
5. The ALU of a computer normally contains a control circuit called as
number of high speed storage elements called a) Device interface b) DMA controller
A. Semi conductor memory B. Registers c) Data controller d) Overlooker
C. Hard disk D. IC

6. _____ are used to overcome the difference 14. In IEEE 32-bit representations, the
in data transfer speeds of various devices . mantissa of the fraction is said to occupy
a) Speed enhancing circuitory ______ bits.
a) 24 b) 23
c) 20 d) 16
15. The 32 bit representation of the decimal 22. The sum of -6 and -13 using 2s
number is called as ____. complement addition is,
a) Double-precision b) Single-precision a) 11100011 b) 11110011
c) Extended format d) None of the above c) 11001100 d) 11101101

16. In IEEE 32-bit representations, the 23. _____ refers to the operational units and
Exponent part is said to occupy ______ bits. their interconnection that realize the
a) 8 b) 23 architectural specification
c) 7 d) 11 a) Computer Architecture
b) Computer Organization
17. In the absolute addressing mode c) Computer Design
A. Operand is inside the instruction d) Computer structure
B. Address of the operand is outside the
instruction 24. With the ________, Intel introduce the
C. Register containing the address of the use of superscalar techniques, which allow
operand is speciied inside theinstruction multiple instructions to execute in parallel
D. Location of the operand is implicit. a) 80486 b) 8085
c) Pentium d) core 2 duo
18. ________ are the different type/s of
generating control signals. 25. Von Neumann architecture is based on
a) Micro-programmed b) Hardwired a) Data and instructions are stored in a single
c) Micro-instruction d) Both a and b read-write memory.
b) the content of this memory are addressable
19. word whose individual bits represent a by location, without regard to the type of data
control signal is ______. contained there.
a) Command word b) Control word c) Execution occurs in a sequential fashion
c) Co-ordination word d) Generation word from one instruction to the next.
d) All the above
20. Highly encoded schemes that use
compact codes to specify a small number of 26. Registers are located at
functions in each micro instruction is ______. a) Processor b) cache
a) Horizontal organisation c) Main memory d) Secondary memory
b) Vertical organisation
c) Diagonal organisation
d) None of the above

21. Microprocessor 8085 is the enhanced

version of ......... with essentially the same
construction set
A. 6800 B. 68000
C. 8080 D. 8088
 5._____ chips are high speed processors that
KVS 2013 are known for their small die size and low
power requirements. They are widely used in
1. The following diagram shows a PDAs and other hand held devices, including
games and phones as well as large variety of
consumer products. It is probably the most
widely used embedded processor architecture
and indeed the most widely used processor
architecture of any kind in the world
a) HAND b) LEG
c) ARM d) SUN

a) Bas interconnection scheme 6. the major functions or requirements for an

b) Memory interconnection scheme I/O module fall into which of the following
c) I/O categories ?
d) Throughput a) Control and timing.
b) Processor communication
2. _______ refers to those attributes of a c) Data buffering
system visible to a programmer or, put d) All of these
another way, those attributes that have a
direct impact on the logical execution of a 7.This was the first general purpose micro
program processor. It was designed to be the CPU of a
a) computer organization general purpose micro- computer. It was
b) computer architecture faster, had a richer instruction set and a larger
c) Microprocessor addressing capability. Which microprocessor
d) Bus are we discussing ?
a) 4004 b) 8008
3.the following diagram depicts a _________ c) 8080 d) All of these
cell.
8. the _______ is a popular high-bandwidth,
processor independent bus that can function
as a mezzanine or peripheral bus.
a) Peripheral component interconnect (PCI)
b) Peripheral component disconnect (PCD)
a) storage b) mobile c) Input output connect
c) memory d) register d) Array connect
9. Sequential, direct, random and associative
4. _____ is the first intel x86 microprocessor are access methods and key characteristics of
with a dual core, referring to the computer _______ system
implementation of two processors on a single a) Stack b) counter
chip. c) memory d) core
a) core b) core 2 duo
c) dual core c) Centrino