FIELD PROGRAMMABLE GATE ARRAY

Group VII

Department of Electronics

Faculty of Applied Sciences

Wayamba University of Sri Lanka

March 2017
FIELD PROGRAMMABLE GATE ARRAY

REPORT SUBMITTED

BY

W.D.T.M PREMATHILAKE 132047

I.T ABEYASEKARA - 132077

S.N ATHALAGE - 132089

R.P.S.V RAJAPAKSHE 132151

A.D.C.S JAYARATHNA - 132192

I.P.A.S MADHUSANKA 132193

Department of Electronics

Faculty of Applied Sciences

Wayamba University of Sri Lanka

March 2017
 i

DECLARATION

We do hereby declare that this report was solely written by us and it describes the findings of
our own independent literature survey. We certify that due reference has been made in the
text for all the information listed here.

Signature of the students :

.
W.D.T.M PREMATHILAKE 132047
.
I.T ABEYASEKARA 132077
.
S.N ATHALAGE 132089
.
R.P.S.V RAJAPAKSHE 132151
.
A.D.C.S JAYARATHNA 132192
.
I.P.A.S MADHUSANKA 132193
Date :
FIELD PROGRAMMABLE GATE ARRAY

Group vii

Department of Electronics

Faculty of Applied Sciences

Wayamba University of Sri Lanka

Kuliyapitiya

Sri Lanka.
 ACKNOWLEDGEMENTS

This report was realized under the guidance of Dr. J.M.J.W Jayasinghe. We do express our
sincere thanks to her for the guidance given throughout the course.
 CONTENTS

CHAPTER CHAPTER NAME Page No.

CHAPTER 01 FIELD PROGRAMMABLE GATE ARRAY 1

1.1 Introduction 1
1.2 History of FPGA 1
1.3 Modern Developments 3
CHAPTER 02 FPGA ARCHITECTURE 5
2.1 Introduction 5
2.2 FPGA Implementation Techniques 5
2.3 Conclusion 7
CHAPTER 03 FPGA PROGRAMMING TECHNOLOGY 8
3.1 SRAM Programming Technology 8
3.2 Flash Programming Technology 9
3.3 Anti-Fuse Programming Technology 10
3.4 Comparison of Programming Technologies 11
CHAPTER 04 APPLICATIONS OF FPGA 12
4.1 Introduction 12
4.2 Applications 12
CHAPTER 05 ADVANTAGES AND DISADVANTAGES OF FPGA 16
5.1 Advantages of FPGA 16
5.2 Comparison of FPGA with Microcontroller/processor 18
5.3 Disadvantages of FPGA 19
 LIST OF FIGURES

Figure No Title of the Figure Page No.

2.1 XILINX XCVLX330 FPGA 5

2.2 SRAM Memory Cell 6
2.3 A floating-gate transistor used in flash memory 7
3.1 SRAM Cell used to control (a) Pass Gate (b) Multiplexer 8
4.1 Motor Control System 13
4.2 TV Broadcast 13
4.3 Wireless Infrastructure 14
4.4 The FPGA in an Automobile Vision System 14
 LIST OF TABLES

Table No Title of the Table Page No.

3. 1 Comparison of Programming Technologies 11

 CHAPTER 01

FIELD PROGRAMMABLE GATE ARRAY

1.1 Introduction

FPGA stands for Field Programmable Gate Array. It is essentially a huge array of gates
which can be programmed and reconfigured any time anywhere. Huge array of gates is an
oversimplified description of FPGA. FPGA is indeed much more complex than simple array
of gates.

Some FPGAs have built in blocks such as Memory controllers, high speed communication
interfaces etc. But the point is, there are a lot gates inside the FPGA which can be arbitrarily
connected together to make a circuit of the users choice. More or less like connecting
individual logic gate ICs. FPGAs are manufactured by companies like Xilinx, Altera,
Microsemi etc. FPGAs are fundamentally similar to CPLDs but CPLDs are very small in size
and capability compared to FPGAs.

FPGAs are reprogrammable silicon chips. Using prebuilt logic blocks and programmable
routing resources, one can configure these chips to implement custom hardware functionality
without ever having to pick up a breadboard or soldering iron.

FPGAs are completely reconfigurable and instantly take on a brand new form when you
recompile a different configuration of circuitry. In the past, FPGA technology could be used
only by engineers with a deep understanding of digital hardware design. The rise of high-level
design tools, however, is changing the rules of FPGA programming, with new technologies
that convert graphical block diagrams or even C code into digital hardware circuitry.

1.2 History of FPGA

The FPGA industry sprouted from programmable read-only memory (PROM) and
programmable logic devices (PLDs). PROMs and PLDs both had the option of being
programmed in batches in a factory or in the field (field programmable), however
programmable logic was hard-wired between logic gates.

1
1.2.1 The 1980s

In the late 1980s the Naval Surface Warfare Department funded an experiment proposed by
Steve Casselman to develop a computer that would implement 600,000 reprogrammable
gates. Casselman was successful and a patent related to the system was issued in 1992.

Some of the industrys foundational concepts and technologies for programmable logic
arrays, gates, and logic blocks are founded in patents awarded to David W. Page and LuVerne
R. Peterson in 1985.

Xilinx Co-Founders, Ross Freeman and Bernard Vonderschmitt, invented the first
commercially viable field programmable gate array in 1985 the XC2064. The XC2064 had
programmable gates and programmable interconnects between gates, the beginnings of a new
technology and market. The XC2064 boasted a mere 64 configurable logic blocks (CLBs),
with two 3-input lookup tables (LUTs). More than 20 years later, Freeman was entered into
the National Inventors Hall of Fame for his invention.

Xilinx continued unchallenged and quickly growing from 1985 to the mid-1990s, when
competitors sprouted up, eroding significant market-share. By 1993, Actel was serving about
18 percent of the market.

1.2.2 The 1990s

The 1990s were an explosive period of time for FPGAs, both in sophistication and the volume
of production. In the early 1990s, FPGAs were primarily used in telecommunications and
networking. By the end of the decade, FPGAs found their way into consumer, automotive,
and industrial applications.

FPGAs got a glimpse of fame in 1997, when Adrian Thompson, a researcher working at the
University of Sussex, merged genetic algorithm technology and FPGAs to create a sound
recognition device. Thomsons algorithm configured an array of 10 x 10 cells in a Xilinx
FPGA chip to discriminate between two tones, utilizing analogue features of the digital chip.
The application of genetic algorithms to the configuration of devices like FPGAs is now
referred to as Evolvable hardware.

2
1.3 Modern developments

A recent trend has been to take the coarse-grained architectural approach a step further by
combining the logic blocks and interconnects of traditional FPGAs with embedded
microprocessors and related peripherals to form a complete system on a programmable
chip. This work mirrors the architecture by Ron Perlof and Hana Potash of Burroughs
Advanced Systems Group which combined a reconfigurable CPU architecture on a single
chip called the SB24. That work was done in 1982.

Examples of such hybrid technologies can be found in the Xilinx Virtex-II PRO and Virtex-4
devices, which include one or more PowerPC processors embedded within the FPGAs logic
fabric. The Atmel FPSLIC is another such device, which uses an AVR processor in
combination with Atmels programmable logic architecture. The Actel SmartFusion devices
incorporate an ARM architecture Cortex-M3 hard processor core (with up to 512kB of flash
and 64kB of RAM) and analog peripherals such as a multi-channel ADC and DACs to their
flash-based FPGA fabric.

In 2010, an extensible processing platform was introduced for FPGAs that fused features of
an ARM high-end microcontroller (hard-core implementations of a 32-bit processor, memory,
and I/O) with an FPGA fabric to make FPGAs easier for embedded designers to use. By
incorporating the ARM processor-based platform into a 28 nm FPGA family, the extensible
processing platform enables system architects and embedded software developers to apply a
combination of serial and parallel processing to address the challenges they face in designing
todays embedded systems, which must meet ever-growing demands to perform highly
complex functions. By allowing them to design in a familiar ARM environment, embedded
designers can benefit from the time-to-market advantages of an FPGA platform compared to
more traditional design cycles associated with ASICs.

An alternate approach to using hard-macro processors is to make use of soft processor cores
that are implemented within the FPGA logic. MicroBlaze and Nios II are examples of popular
softcore processors.

As previously mentioned, many modern FPGAs have the ability to be reprogrammed at run
time, and this is leading to the idea of reconfigurable computing or reconfigurable systems -
CPUs that reconfigure themselves to suit the task at hand. The Mitrion Virtual Processor from
Mitrionics is an example of a reconfigurable soft processor, implemented on FPGAs.
However, it does not support dynamic reconfiguration at runtime, but instead adapts itself to a
specific program.
3
Additionally, new, non-FPGA architectures are beginning to emerge. Software-configurable
microprocessors such as the Stretch S5000 adopt a hybrid approach by providing an array of
processor cores and FPGA-like programmable cores on the same chip.

4
 CHAPTER 02

FPGA ARCHITECTURE

2.1 Introduction

The basic structure of Xilinx FPGAs is array-based, meaning that each chip comprises a two
dimensional array of logic blocks that can be interconnected via horizontal and vertical
routing channels. rst FPGA family; called the XC2000 series, in about 1985 and now offers
three more generations: XC3000, XC4000, and XC5000. Although the XC3000 devices are
still widely used

Fig. 2.1: XILINX XCVLX330 FPGA

2.2 FPGA Implementation Technologies

Configuration bitstream can be stored in FPGA using various technologies. The majority of
FPGAs is based on SRAM (Static RAM).

2.2.1 SRAM-based FPGAs

SRAM-based FPGA stores logic cells configuration data in the static memory (organized as
an array of latches). Since SRAM is volatile and can't keep data without power source, such
FPGAs must be programmed (configured) upon start. There are two basic modes of
programming:
Master mode, when FPGA reads configuration data from an external source, such as an
external Flash memory chip.

5
 Slave mode, when FPGA is configured by an external master device, such as a processor.
This can be usually done via a dedicated configuration interface or via a boundary-scan
(JTAG) interface.

Fig.2.2 SRAM Memory Cell

SRAM-based FPGAs include most chips of Xilinx Virtex and Spartan families and Altera
Stratix and Cyclone.

2.2.1.1 SRAM-based FPGAs with an internal flash memory

This type of FPGA is generally like the previous, except that these chips contain internal flash
memory blocks, thus eliminating the need to have an external non-volatile memory.
One example of such FPGAs is the Xilinx Spartan-3AN family. Each model of Spartan-3AN
has an in-chip flash memory module with an SPI interface capable of storing two or more
configuration bitstreams. The bitstream can be chosen during startup.
Another example of such technology is the LatticeXP family by Lattice Semiconductors.
Using internal non-volatile memory can be also useful to prevent unauthorized bitstream
copying.

2.2.2 Flash-based FPGAs

The true flash-based FPGAs shouldn't be confused with the previous type. The SRAM-based
FPGAs with internal flash memory use flash only during startup to load data to the SRAM
configuration cells. On the contrary, true flash-based FPGA uses flash as a primary resource
for configuration storage, and doesn't require SRAM (a similar technology is used in CPLDs
complex programmable logic devices, but the FPGA architecture is very different from that
of CPLD). This technology has an advantage of being less power consumptive. Flash-based
FPGAs are also more tolerant to radiation effects.

6
 Fig.2.3: A floating-gate transistor used in flash memory
Flash-based FPGA families such as Igloo and ProASIC3 are manufactured by Actel.
As in the previous case, using flash-based FPGAs can be a solution to prevent unauthorized
bitstream copying.

2.2.3 Antifuse-based FPGAs

Antifuse-based FPGAs are different from the previous ones in that they can be programmed
only once.
The antifuse is a device that doesn't conduct current initially, but can be burned to conduct
current (the antifuse behavior is thus opposite to that of the fuse, hence the name). The
antifuse-based FPGA can't be then reprogrammed since there is no way to return a burned
antifuse into the initial state. Antifuse-based device families include Axcelerator produced by
Actel.

2.3 Conclusion
Modern SRAM-based FPGAs have highest densities, but consume a lot of power and need an
external non-volatile memory to store configuration bitstream. SRAM-based FPGAs with an
internal flash module doesn't need an external configuration memory. Flash-based and
Antifusebased FPGAs consume much less power than their SRAM-based counterparts.
Antifuse-based FPGAs can only be programmed once.

7
 CHAPTER 03

FPGA PROGRAMMING TECHNOLOGY

Electrically programmable switches are used to program FPGA. Properties of programmable

switch determine on- resistance, parasitic capacitance, volatility, re-programmability, size etc.

Various programming techniques are,

SRAM programming technology

Flash Programming Technology
Antifuse programming methodology

3.1 SRAM programming technology

Static RAM cells are used to control pass gates or multiplexers. To use pass gate as closed
switch, Boolean one is stored in SRAM cell. When zero is stored pass transistor provides high
resistance between two wire segments. Figure 3.1(a) depicts this usage of SRAM.

Fig. 3.1: SRAM Cell used to control (a) Pass Gate (b) Multiplexer

To use SRAM as multiplexer, state of control values stored in SRAM decides which of the
multiplexer inputs are connected to the output as shown in Figure 3.1 (b)

8
3.1.1 Advantage of SRAM programming
SRAM-based programming technology has become the dominant approach for FPGAs
because of its re-programmability and the use of standard CMOS process technology and
therefore leading to increased integration, higher speed and lower dynamic power
consumption of new process with smaller geometry.

3.1.2 Disadvantage of SRAM programming

Disadvantage is the space it consumes as minimum five transistors are required to implement
a memory cell. SRAM cells are volatile in nature and external devices are required to
permanently store the configuration data

3.2 Flash Programming Technology

An important alternative to the SRAM-based programming technology is the use of flash or

EEPROM based programming technology. This technology injects charge onto a gate that
floats above the transistor. This approach is used in flash or EEPROM memory cells. These
cells are non-volatile; they do not lose information when the device is powered down. With
modern IC fabrication processes, it has become possible to use the floating gate cells directly
as switches. Flash-based programming technology is also more area efficient than SRAM-
based programming technology.

Flash-based programming technology has its own disadvantages too. Unlike SRAM-based
programming technology, flash based devices cannot be reconfigured/reprogrammed an
infinite number of times. Also, flash-based technology uses non-standard CMOS process.

This flash-based programming technology offers several unique advantages, most importantly
non-volatility. This feature eliminates the need for the external resources required to store and
load configuration data when SRAM-based programming technology is used. Additionally, a
flash-based device can function immediately upon power-up instead of having to wait for the
loading of configuration data. The flash approach is more area efficient than SRAM-based
technology which requires up to six transistors to implement the programmable storage. The
programming circuitry, such as the high and low voltage buffers needed to program the cell,
contributes an area overhead not present in SRAM-based devices. In devices from Altera,
Xilinx and Lattice, on-chip flash memory is used to provide non-volatile storage while SRAM
cells are still used to control the programmable elements in the design.

9
3.3 Anti-fuse Programming Technology

An alternative to SRAM and floating gate-based technologies is anti-fuse programming

technology. This technology is based on structures which exhibit very high-resistance under
normal circumstances but can be programmably blown (in reality, connected) to create a
low resistance link. An anti-fuse is a two terminal device with an un-programmed state
presenting a very high resistance between its terminals. When a high voltage (from 11 to 20
volts, depending on the type of anti-fuse) is applied across its terminals the anti-fuse will
blow and create a low resistance link. This link is permanent. Programming an anti-fuse
requires extra circuitry to deliver the high programming voltage and a relatively high current
of 5 mA or more. This is done in through fairly sizable pass transistors to provide addressing
to each anti-fuse. Anti-fuse technology is used in the FPGAs from Actel, Quick logic, and
Cross point. A major advantage of the anti-fuse is its small size, little more than the cross-
section of two metal wires. But this advantage is limited by the large size of the necessary
programming transistors, which handle large currents, and the inclusion of isolation
transistors that are sometimes needed to protect low voltage transistors from high
programming voltages.

A second major advantage of an anti-fuse is its relatively low series resistance. The on-
resistance of the ONO anti-fuse is 300 to500 ohms, while the amorphous silicon anti-fuse is
50 to100 ohms. Additionally, the parasitic capacitance of an un-programmed amorphous anti-
fuse is significantly lower than for other programming technologies. The limitations of this
technology are, this technology does not make use of standard CMOS process. Also, anti-fuse
programming technology based devices cannot be reprogrammed. The ideal technology
should be re-programmable, non-volatile, and that uses a standard CMOS process. But it is
clear that none of the above technologies satisfy these conditions.

10
3.4 Comparison of Programming Technologies

Table 3.1: Comparison of Programming Technologies

In spites of all the advantages and disadvantages, the SRAM-based programming technology
is the most widely used programming technology. The main reason is its use of standard
CMOS process .Due to this reason it is expected that this technology will continue to
dominate the other two programming technologies.

11
 CHAPTER 04

APPLICATIONS OF FPGA

4.1 Introduction

FPGAs can be used in any problem which is computable. Specific applications of FPGAs
range from digital signal processing, software-defined radio, ASIC prototyping, medical
imaging, computer vision, speech recognition, cryptography, bioinformatics, computer
hardware emulation, radio astronomy, metal detection to a growing range of other areas.

FPGAs are also used in hardware acceleration, where one can use the FPGA to accelerate
certain parts of an algorithm and share part of the computation between the FPGA and a
generic processor.

FPGAs have been reserved for specific vertical applications where the volume of production
is small. For these low-volume applications, the premium that companies pay in hardware
costs per unit for a programmable chip is more affordable than the development resources
spent on creating an ASIC for a low-volume application. Today, new cost and performance
dynamics have broadened the range of viable applications.

4.2 Applications

FPGAs are used in several areas of industry and technology.

4.2.1 Instrumentation and control systems of Nuclear Power Plants

Field programmable gate arrays (FPGAs) are gaining increased attention worldwide for
application in nuclear power plant (NPP) instrumentation and control (I&C) systems,
particularly for safety and safety related applications, but also for non-safety ones. NPP
operators and equipment suppliers see potential advantages of FPGA based digital I&C
systems as compared to microprocessor based applications. This is because FPGA based
systems can be made simpler, more testable and less reliant on complex software (e.g.
operating systems), and are easier to qualify for safety and safety related applications. This
publication results from IAEA consultancy meetings covering the various aspects, including
design, qualification, implementation, licensing, and operation, of FPGA based I&C systems
in NPPs.

12
4.2.2 Single device motor control

Fig.4.1: Motor Control System

Motors and motor control are commonplace in any industrial design. Most motor controls are
designed with microcontroller technology. But microcontrollers can fall short of the
performance demands of sophisticated motor control algorithms. However, a flexible,
scalable, and high performance motor control system can be built in a single SoC FPGA.

4.2.3 Television broadcasting

Television broadcasters use a Serial Digital Interface (SDI) standard to transmit

uncompressed digital video on 75 ohm coaxial cable. FPGA solutions come with a core
transceiver that can function on all SDI rates on the same transceiver.

Fig. 4.2: TV Broadcast

New digital techniques help edit the video stream, improve or correct picture quality and
compress the image for transmission over cables or satellites links. The latest compression
standard, H.265 slashes the number of bits necessary to encode a movie or TV program.
FPGA are used to pack the power in to SoC while responding to the pressure for rapid
evolution.

13
4.2.4 Wireless data

Fig.4.3: Wireless Infrastructure

Many FPGA are equipped with built-in low-latency intellectual property (IP) for advanced
networks as well as productivity enhancing tools to allow manufacturers to leverage FPGAs
advantages of performance, power, price and productivity to focus their efforts on product
differentiation.
4.2.5 Automotive driver assistance cameras

One of the biggest areas of growth in the automobile industry is the explosion of technology
driven features. Most of the automobiles come with navigation systems, video entertainment
systems and cameras.

Fig.4.4: The FPGA in an Automobile Vision System

14
Driver assistance and backup cameras are some of the most important safety innovations.
Forward camera systems are made up of high speed video processing, complex sensor fusion
and real time data analysis that enable the automobile to perform corrective action in cases
like when the driver nods off and veers into another lane. Forward cameras do their job by
integrating with different sensors such as radar and laser sensors.

The integration of the entire camera system can be done by a single, low cost FPGA. The
system performance can be optimized by developing hardware parallel processing engines
using FPGA logic and integrating with software algorithms running on the hard processor
system of a SoC FPGA. The following FPGA figure shows a part of an automobile vision
system.
4.2.6 High performance computing

The high performance computing (HPC) market is one of the fastest growing areas of
computing today. It is important in many industries such as financial, medical imaging,
bioscience, military and many others that can benefit from the logic and memory resources in
FPGAs to develop application specific coprocessors [].

15
 CHAPTER 05

ADVANTAGES AND DISADVANTAGES OF FPGA

Generally FPGAs are used for lower speed, lower complexity and lower volume designs. But
today's FPGAs even run at 500 MHz with superior performance. With unprecedented logic
density increases and a host of other features, such as embedded processors, DSP blocks,
clocking, and high-speed serial at ever lower price, FPGAs are suitable for almost any type of
design.

5.1 Advantages of FPGA

5.1.1 Reusability

Reusability of FPGA is the main advantage. Prototype of the design can be implemented on
FPGA which could be verified for almost accurate results so that it can be implemented on an
ASIC. If design has faults, change the HDL code, generate bit stream, program to FPGA and
test again.

5.1.2 Long-time availability

FPGAs enable being independent from component manufacturers and distributors since the
functionality is not given by the device itself but in its configuration. The configuration can be
programmed to be portable between miscellaneous FPGAs without any adaptations.

5.1.3 Extremely short time to market

Through the use of FPGAs, the development of hardware prototypes is significantly

accelerated since a big part of the hardware development process is shifted into imp core
design, which can take place in parallel. Additionally, because of the early availability of
hardware prototypes, time-consuming activities like the start-up and debugging of the
hardware are brought forward concurrently to the overall development.

5.1.4 Fast and efficient systems

Available standard components address a broad user group and consequently often constitute
a compromise between performance and compatibility. With FPGAs, systems can be
developed that are exactly customized for the designated task and for this reason works highly
efficient.

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5.1.5 Performance gain for software applications

Complex tasks are often handled through software implementations in combination with high
performance processors. In this case FPGAs provide a competitive alternative, which by
means of parallelization and customization for the specific task even establishes an additional
performance gain.

5.1.6 Real time applications

FPGAs are perfectly suitable for applications in time-critical systems. In contrast to software
based solutions with real time operating systems, FPGAs provide real deterministic
behaviour. By means of the featured flexibility even complex computations can be executed
in extremely short periods.

5.1.7 Massively parallel data processing

The amount of data in contemporary systems is ever increasing which leads to the problem
that systems working sequential are no longer able to process the data on time. Especially by
means -of parallelization, FPGAs provide a solution to this problem which in addition scales
excellently.

5.1.8 Cost

The nonrecurring engineering (NRE) expense of custom ASIC design far exceeds that of
FPGA-based hardware solutions. The large initial investment in ASICs is easy to justify for
OEMs shipping thousands of chips per year, but many end users need custom hardware
functionality for the tens to hundreds of systems in development. The very nature of
programmable silicon means user has no fabrication costs or long lead times for assembly.
Because system requirements often change over time, the cost of making incremental changes
to FPGA designs is negligible when compared to the large expense of repining an ASIC.

5.1.9 Long-term maintenance

FPGA chips are field-upgradable and do not require the time and expense involved with ASIC
redesign. Digital communication protocols, for example, have specifications that can change
over time, and ASIC-based interfaces may cause maintenance and forward-compatibility
challenges. Being reconfigurable, FPGA chips can keep up with future modifications that
might be necessary. As a product or system matures, user can make functional enhancements
without spending time redesigning hardware or modifying the board layout.

17
5.1.10 Time to market

FPGA technology offers flexibility and rapid prototyping capabilities in the face of increased
time-to-market concerns. User can test an idea or concept and verify it in hardware without
going through the long fabrication process of custom ASIC design. Users can then implement
incremental changes and iterate on an FPGA design within hours instead of weeks.
Commercial off-the-shelf (COTS) hardware is also available with different types of I/O
already connected to a user-programmable FPGA chip. The growing availability of high-level
software tools decreases the learning curve with layers of abstraction and often offers valuable
IP cores (prebuilt functions) for advanced control and signal processing.

5.1.11 Simple design cycle

This is due to software that handles much of the routing, placement, and timing. Manual
intervention is less. The FPGA design flow eliminates the complex and time-consuming floor
planning, place and route, timing analysis.

FPGA based designs are inherently less risky in terms of technical feasibility and cost since
shorter design time and lower upfront costs are involved.

5.2 Comparing FPGA with microcontroller/processors

Unlike processors, FPGAs use dedicated hardware for processing logic and do not have an
operating system. Because the processing paths are parallel, different operations do not have
to compete for the same processing resources. That means speeds can be very fast, and
multiple control loops can run on a single FPGA device at different rates.
Hardware structure in the FPGA is not fixed so it is defined by the user. Although logic cells
are fixed in FPGA, functions they perform and the interconnections between them are
determined by the user. So operations that FPGAs can do are not predefined. Users can have
the processes done according to the written HDL code "in parallel" which means
simultaneously. Ability of parallel processing is one of the most important features that
separate FPGA from processor and make it superior in many areas.
Since the user can determine the hardware structure of FPGAs, can program FPGA to process
larger data with few clock cycles.
An FPGA device will require many clock cycles but since these are clocked with a much
higher clock frequencies in excess of 100MHz, the FPGAs offer the speed advantage over the
microcontroller.

18
FPGA is a programmable logic device, so the advantage is that user can control the hardware
resources by coding, while Micro-controller cannot do that because of it's fixed in hardware.
User can design own system by using HDL languages on FPGA.
Microcontrollers are bound by the architecture whereas FPGAs are not. The design developed
by the designer can reconfigurable as many times as possible. The design synthesis produces
the net list that can program the FPGAs. Also, pipelining and parallel processing may be
adopted in FPGAs to improve the throughput. However, this feature may not be possible with
microcontrollers.
If user application demands a certain specification of any module which can't be satisfied by
the existing design present in the available microcontrollers, user can use FPGA and program
it using VHDL/Verilog HDL language and design own hardware system as pre user own
specification so that application can be successfully implemented.

5.3 Disadvantages of FPGA

Power consumption in FPGA is more. Users dont have any control over the power
optimization. But in ASIC power is less. Users have to use the resources available in the
FPGA. Thus FPGA limits the design size.

SRAM programming is a programming technology of FPGA. FPGAs are only suitable for
low quantity productions. As discussed above FPGA based products are basically very
effective for -low to medium volume production as they are easy to programme and debug,
and have less NRE cost and faster time to market all these advantages are come through their
re-configurability. But the very same configurability is the major cause of its disadvantages.
Thus making it larger, slower and more power consuming than ASICS.

The flexible nature of an FPGA comes at a significant cost in area, delay and power
consumption: an FPGA requires approximately 20 to 35 times more area than a standard cell
ASIC, has a speed performances roughly 3 to 4 times slower than an ASIC and consumes
roughly 10 times as much dynamic power.

19
 REFERENCES

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[2]. C. Ebeling, L. McMurchie, S. A. Hauck and S. Bums, Placement and Routing Tools for
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[3]. Altera Corp., Quartus II Incremental Compilation for Hierarchical & Team-Based
Design, in The Quartus II Handbook, Version 7.1, Vol. 1, Ch. 2, 2007.

[4]. Cheung P.Y.K, Constantinides G.A, deSousa J.T. Introduction: Field Programmable
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