Split-Phase Control: Achieving Complete

Soft-Charging Operation of a Dickson

Switched-Capacitor Converter
Yutian Lei1 , Ryan May1,2 and Robert C.N. Pilawa-Podgurski1
1 Universityof Illinois at Urbana-Champaign, 2 Texas Instruments
lei10@illinois.edu

AbstractSwitched-capacitor (SC) converters are gaining pop-
ularity due to their high power density and suitability for on-chip
integration. Soft-charging techniques can be used to eliminate
the current transient during the phase switching instances, and
improve the power density and efciency of SC converters. In this
paper, we propose a split-phase control scheme that enables the
Dickson converter to achieve complete soft-charging operation,
which is not possible using the conventional two-phase control.
An analytical method is extended to understand and design split-
phase controlled Dickson converters. The proposed technique and
analysis are veried by both simulation and experimental results.
An 8-to-1 step-down Dickson converter is built to demonstrate
the reduction in output impedance and improvement in efciency
as a result of the split-phase controlled soft-charging operation.
I. I NTRODUCTION
second-stage buck converter is cascaded to the output of the
SC converter to act as a controlled current load. As a result,
the SC stage is allowed to operate with a larger capacitor
voltage ripple without adversely affecting the efciency, which
improves the energy utilization of the capacitors. The second-
stage buck converter operates with a low voltage stress, en-
abling an increase in the switching frequency, thereby reducing
the magnetic component size. The soft-charging technique can
result in signicant power density and efciency improvements
[12][14]. A formal method was presented in [15] to aid in
the design of such soft-charging SC converters.
Among the various SC converter topologies, the Dickson
converter [3], [16], [17] has efcient utilization of switches
but poor utilization of capacitors [18], and thus would benet
signicantly from soft-charging operation. However, it has

I NDUCTORS and transformers are essential in conven-

tional switch-mode power converters. Due to the relatively
low energy density of the magnetic components, they often
been demonstrated that the Dickson SC converter cannot
achieve full soft-charging operation with conventional, two-
phase control [15]. In this paper, the operation of the Dickson
dominate the size and cost of a converter. On the other converter is examined and the reasons for its inability to
hand, switched-capacitor (SC) converters use only capaci- achieve soft-charging are analyzed. Moreover, it is shown
tors to transfer energy and consequently can have higher that full soft-charging operation is possible for the Dickson
power density and greater suitability for on-chip integration converter, something that to date has not been demonstrated. A
compared to magnetic-based converters. They also tend to technique to achieve full soft-charging operation is proposed,
achieve a higher efciency at large voltage conversion ratios by splitting the original two switching phases into four [19].
compared to their magnetic counterparts [1]. These advantages Existing analytical methods are expanded to help understand
make SC converters desirable for a broad range of appli- and design split-phase Dickson converters. The proposed tech-
cations, including voltage balancing [2], CMOS integrated nique does not introduce any additional component to the
power conversion [3][5] and renewable energy harvesting [6]. original soft-charging operation, and can be realized with a
However, SC converters also have some drawbacks, which small additional control effort. The proposed technique and
limit their performance in some applications [7]. Since the analysis are conrmed by simulation as well as experimental
capacitors are directly charged/discharged by other capacitors measurements of a converter prototype.
or voltage sources, large transient current spikes can occur,
which reduce the efciency of the converter. Moreover, these
II. S OFT- CHARGING D ICKSON C ONVERTER
transient effects increase the device stress and can cause
undesirable Electromagnetic Interference (EMI) problems. To A 4-to-1 step-down Dickson SC converter is shown in Fig. 1
mitigate the current spikes, either large capacitors or higher and the two conventional switching phases are shown in Fig. 2.
switching frequency has to be employed, neither of which is a It should be claried that the phase in this paper refers to the
satisfactory solution. Interleaved designs [8][10] can reduce state of the switching circuit and should not be confused with
the current spike at the output and input terminals, but do not multi-phase, which is sometimes used to mean interleaved
solve the fundamental efciency concerns. designs [10]. For conventional (hard-charging) operation, the
Merged two-stage converters can eliminate the current output capacitance Co is large and the load acts as a voltage-
transient using soft-charging operation, while improving the source load. Thus, a large transient current occurs during
efciency at the same time [11], [12]. In this architecture, the the phase switching instances due to the capacitor voltages
output capacitor of the SC converter stage is removed and a mismatch. This is the characteristic of the slow switching limit
Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 1
U.S. Government work not protected by U.S. copyright
 C3 25
C1

Current (A)
S4 S1
Co 0
Vsc
S8 S7 S6 S5 Hardcharging
+ 25
Iload
Vin 0 5 10 15 20
S3 S2
C2 25

Current (A)
Fig. 1: 4-to-1 Dickson topology. 0

Twophase softcharging
25
C2 0 5 10 15 20
C3
+ 5
C1
Vin C3

Current (A)
C2 Iload C1 Iload
0
(a) Phase 1. (b) Phase 2.
Splitphase softcharging
Fig. 2: Two-phase operation of a 4-to-1 Dickson converter. 5
0 5 10 15 20
Time (s)

(SSL) of SC converters [1]. The current through one of the Fig. 3: Current waveform of capacitor C2 of the Dickson SC
capacitors (C2 ) is shown in Fig. 3. It can be seen that there is a converter. Simulation parameters: C1 = C2 = C3 = 10 F,
large impulse current at phase transitions in the conventional, fsw =100 kHz, Iload = 2 A.
hard-charging case (top plot). To minimize this impulse, large
capacitors or high switching frequency have to be employed
such that the converter operates in the fast switching limit where Vc is the smallest of the capacitor voltages. It can be
(FSL) [1]. In soft-charging operation, the output capacitance seen that (3) satises both (1) and (2). At the end of Phase
is removed and a constant current load is used so that the 1, assuming equal capacitor values, the capacitor voltages
output voltage can change instantaneously to compensate for become 
the difference in capacitor voltages. By eliminating the voltage VC 3 3Vc + Vc
VC = 2Vc Vc , (4)
mismatch and the resultant current impulse, the soft-charging 2

SC converter exhibit the same behavior as in FSL. Practical VC 1 Vc + Vc

implementations of the constant current load can be either a where Vc is the change in capacitor voltage due to charges
magnetic converter [11] or an LC lter [18], [20], but for the delivered to the load, and can be obtained by inspection or
purpose of clear illustration, an ideal constant current load is KCL [18]. Testing constraint (2), we have
used in this section.
VC 3 VC 2 = Vc + 2Vc = VC 1 . (5)
A. Conventional two-phase control It should be noted that the preceding example only shows
In addition to the current load, complete soft-charging op- a particular case chosen for simplicity, and a more rigorous
eration also requires that there is no voltage mismatch among proof is presented in [15], which more rigorously analyzes why
the parallel capacitor connections. For the two-phase control, the Dickson converter is unable to operate in soft-charging
by applying KVL to the circuits in Fig. 2, the following mode with only two phases.. Due to the charge ow in each
requirements can be found. phase, the voltages of the capacitors do not satisfy the KVL
for the next phase, and thus capacitor charge redistribution
Start of Phase 1: Vin VC3 = VC2 VC1 (1) loss is unavoidable, even with a current load at the output.
Start of Phase 2: VC3 VC2 = VC1 (2) For the Dickson converter, this is due to the asymmetry in the
capacitor connection, particularly for the outer most (C3 ) and
However, constraints (1) and (2) cannot be satised when
inner most capacitor (C1 ). As can be seen in Fig. 2, these two
the Dickson converter is operated with a conventional, two-
capacitors are in series with another capacitor in one phase
phase control scheme. This can be seen from the following
but not in the other phase. It can be shown that at the start of
simplied example. Let the capacitor voltages be VC3 , VC2
Phase 1, VC2 VC1 is always greater than Vin VC3 . Similarly,
and VC1 respectively. At the start of Phase 1, we have
at the start of Phase 2, VC3 VC2 is always greater than VC1 .
Vin 4Vc The resultant difference in capacitor voltages is present across
VC3 3Vc the switches during the phase transitions and creates large

VC2 = 2Vc , (3)
transient current. Therefore, as can be seen in the middle plot
VC1 Vc of Fig. 3, while the magnitude and width of the current impulse
Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 2
 TABLE II: Control of switches.

C3 C2 Switches S8 S7 S6 S5 S4 S3 S2 S1
+
C1 Two-phase q1 q2 q1 q2 q1 q2 q1 q2
Vin Iload C3 Iload Split-phase q3 q2 q1 q4 q1 q2 q1 q2
C2 C1

(a) Phase 1a. (b) Phase 2a. q1

q2
C1 C2
q3
C2 Iload C3 Iload q4
T
t=0 2 T

(c) Phase 1b. (d) Phase 2b. Fig. 5: Control diagrams.

Fig. 4: Split-phase operation of a 4-to-1 Dickson converter.
proposed split-phase operations are shown in Table II and
TABLE I: The RMS, average and peak values of current of
Fig. 5. It can be seen that the proposed switching sequence
capacitor C2 in a single half period. Simulation parameters
only delays the turn-on of two switches (S5 and S8 ). Thus,
are as in Fig. 3.
generating the extra phases in the split-phase operation does
Conguration RMS (A) Average (A) Peak (A) not increase the switching frequency of the switches, ensuring
Hard-charging 3.52 1.00 27.3 no added switching loss. Practical implementation of the
Soft-charging two-phase 1.91 1.00 15.8 control can be duty ratio based or hysteresis based. In addition,
Soft-charging split-phase 1.15 1.00 2.00 even though the technique is illustrated with a 4-to-1 Dickson
converter with only three ying capacitors, the technique is
applicable to Dickson converters with larger conversion ratios
are reduced with two-phase soft-charging operation, there is without introducing more secondary phases [19].
still signicant transient effect and associated losses.
III. A NALYSIS
B. Split-phase control While the preceding section presents an intuitive under-
To ensure that the capacitor network results in the same standing why the split-phase control enables full soft-charging
voltage at the output node, we propose the split-phase control operation of the Dickson converter, it is benecial to formulate
of the Dickson converter, with two secondary phases intro- a general analysis. The analytical method presented in [15]
duced [19], as shown in Fig. 4. Phase 1a and 2a are the same applies to an SC converter with two phases, but for the
as Phase 1 and 2 in the original operation, while the Phase proposed split-phase control, a total of four different circuit
1b conguration is a subset of Phase 1 and the Phase 2b states are present. Hence, the method in [15] is extended to a
conguration is a subset of Phase 2. The switching sequence higher number of phases and presented in this section.
is Phase 1b Phase 1a Phase 2b Phase 2a. In Phase 1b, Complete soft-charging is achieved if and only if the ideal
C2 discharges and C1 charges, and thus VC2 VC1 decreases capacitor network satises KVL at all times, including during
while Vin VC3 stays the same. The circuit will transition from phase transitions. The aim of the analysis is to nd the set of
Phase 1b to Phase 1a when VC2 VC1 equals Vin VC1 , i.e. charge ow vectors such that KVL is satised during phase
when (1) is satised. Similarly, the circuit will transition from transitions. The charge vectors need to satisfy KCL while the
Phase 2b to Phase 2a when (2) is satised. Therefore, with the charge vector and the voltage change vector are related by the
introduction of these buffer phases, KVL is satised during capacitor values.
phase transitions and current transient can be eliminated. The For a general SC circuit, a voltage vector can be dened
effect can be seen in the bottom plot of Fig. 3, which shows for the circuit elements as
the simulated split-phase results. With the proposed split-phase  T
v = vin vc T vout , (6)
operation, the current waveform has no transient component
at all, and is a constant value in each phase. To quantify the where vc is a column vector of the capacitor voltages. In each
improvement in the power transfer, the RMS, average and phase of Fig. 4, the circuit consists of a number of closed
peak values of capacitor current for a half-period duration are loops, where a KVL equation can be written for each loop.
calculated and tabulated in Table I. It can be seen that both These KVL equations can be lumped into a matrix-vector
the RMS values and peak values can be greatly reduced with product form [21] as
split-phase control. By eliminating the current transient, the
Ai vi = 0, (7)
converter efciency can be improved and the current stress of
the devices can be reduced. where Ai is called the reduced loop matrix for the ith phase.
The control signals for both the original two-phase and the In this paper, the entries of the loop matrices are positive if
Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 3
 the circuit element is traversed from the negative terminal to 5
the positive terminal and vice versa. At the end of phase i, the

Current (A)
voltage vector becomes vi + vi , giving
0
Ai (vi + vi ) = 0, (8)
Splitphase sequence 1
where v represents the change in voltage due to charge 5
0 5 10 15 20
being delivered to the load. From (7) and (8), we have
5
Ai vi = 0. (9)

Current (A)
Similarly, a charge ow vector is dened as the vector of 0
charge that ows into the positive terminal of each element in
the circuit and is given in the form of Splitphase sequence 2
 T 5
q = qin qc T qout . (10) 0 5 10 15 20

5
It should be noted that in some work, the charge vector is

Current (A)
normalized with respect the total charge delivered to the output
[1], but the unnormalized convention is used in this paper. In 0
each phase, KCL equations can be expressed by
Splitphase sequence 3
Bi qi = 0, (11) 5
0 5 10 15 20
where Bi represents the reduced incidence matrix [21]. More- Time (s)

over, for a capacitor, the change in voltage and the charge ow Fig. 6: Current waveform of capacitor C2 of the Dickson SC
is related by converter. Simulation parameters are as in Fig. 3.
q = Cvc , (12)
In addition, for periodic steady-state operation, there is also a
condition that the net charge that ows into a capacitor in a the proposed split-phase control, there are six total possible
period is zero: sequences and 3 representative phases are shown below. While

qic = 0. (13) sequence 1 is the same as found intuitively in Section II,

phases
sequence 2 is the reverse of sequence 1; and in sequence 3, the
two original phases (Phase 1a and 2a) are adjacent instead of
Combining the constraints given by equation (9) (11) (12) being separated. The duration of each phase obeys that given
and (13), the charge vectors (qi ) required for soft-charging by (15).
operation can be obtained. A detailed derivation of the charge Switching sequences:
ow vectors for the 4-phase Dickson converter in Fig. 4 is
provided in the appendix and only the result is given in 1) Phase 1b Phase 1a Phase 2b Phase 2a
this section. Assuming equal ying capacitor values, the nal 2) Phase 2a Phase 2b Phase 1a Phase 1b
charge vectors are found to be 3) Phase 1a Phase 2a Phase 1b Phase 2b
Figure 6 shows simulated current waveforms for these switch-
2 0 0 0
ing sequences. It can be seen that all three of the switch-
2 2a 1 1b 0 2b 1
q1a =
1 , q = 1 , q = 1 , q = 1 .
ing sequences result in a non-impulse current, showing that
1 2 1 0 complete soft-charging operation is achieved. While all six
3 3 1 1 sequences are equivalent from the point of achieving soft-
(14)
charging operation, they have some different implications in
From the denition in (10), the last entries in the charge practical implementations, which will be discussed in Section
vectors are the amount of charge delivered to the load. IV.
Assuming a constant current load, the last entry of each of
the charge vector is thus equivalent to the relative duration of
each phase. Since the total charge delivered to the load in a IV. S IMULATION AND E XPERIMENTAL R ESULTS
period is 8 units (3 + 3 + 1 + 1), we derive that for complete To illustrate the benet of the split-phase soft-charging
soft-charging operation of the Dickson converter with equal operation, the 4-to-1 step-down Dickson converter shown in
ying capacitance, the duty ratio of each phase is Fig. 1 is simulated using LTSpice with simulation parameters
3 3 1 1 given in Table III. Again, a constant current load at the output
T 1a = , T 2a = , T 1b = , T 2b = . (15) is used for simplicity. In the hard-charging operation, the duty
8 8 8 8
ratio is xed to 0.5 (as is convention) while the duty ratio of
Another powerful result that can be obtained from the anal- the split-phase operation is found analytically as in Section
ysis is that soft-charging operation can be achieved regardless III.
of the order of the switching phases, since the preceding The output referred impedance of a SC converter encapsu-
derivation does not depend on the sequence of the phases. With lates both the capacitor charge transfer loss and the conduction
Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 4
 TABLE III: Simulation parameters.

Vin 40 V
Iload 2A
Rds,on 10 m
RESR 1 m
C1 , C2 , C3 10 F
Co,hardcharging 100 F
Co,sof tcharging None

0
10
Two phase, hardcharging Fig. 8: Hardware prototype of the proposed converter.
Two phase, softcharging
Split phase, softcharging
Output impedance ()

TABLE IV: Design specications.

1
10
Vin 200 V DC
Iload 3A
Vout 25 V DC
fsw 50-500 kHz

2
10
4 5
10 10
Frequency (Hz)
Fig. 7: Simulated output impedance of the Dickson converter.
loss of the converter and is widely used to characterize
the performance of such converters [22][24]. The output
impedance for the Dickson converter is plotted in Fig. 7.
It can be seen that the conventional hard-charging Dickson
converter shows two regions of asymptotic behaviors as found
in previous literature [1]. At low frequencies (SSL), when
the power loss due to the current transient dominates, the
impedance decreases as switching frequency increases. The
impedance reaches a constant at high frequencies (FSL), when
the conduction loss dominates. As can be seen in Fig. 7,
with two-phase soft-charging operation, the impedance in the
SSL region is reduced signicantly. This means that the soft-
charging converter is able to use smaller ying capacitance
while having the same output impedance at the same switching
frequency. However, there is still non-negligible frequency
dependent behavior since complete soft-charing operation can-
not be achieved on a conventional Dickson converter. With
the proposed split-phase control however, it can be seen that
now the output impedance is independent of the switching
frequency, due to the complete elimination of the charge
TABLE V: Component listing of the proposed converter.
transfer losses. It should be noted that the impedance at high
frequencies is slightly higher than the FSL impedance of the
conventional two-phase operation. This is due to the fact that
in the added phases (Phase 1b and Phase 2b), there is one path
fewer that delivers current to the load, and hence a slightly
increased effective switch resistance. However, this increase
in conduction loss will be less noticeable as the converter
conversion ratio increases.
A hardware prototype has been implemented for the pro-
posed split-phase controlled soft-charging Dickson SC con-
Micro-controller
verter, with a voltage step-down ratio of 8 to 1. The prototype
Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL)
6 7
10 10
uses 12 GaN switches and 7 ying capacitors. A photo of the
prototype is shown in Fig. 8 while the design specication
and component listing are provided in Table IV and Table V
respectively. The same converter is used for hard-charging as
well as soft-charging operation. The difference is that in soft-
charging operation, there is an extra inductor added to act as
a current load. Since the same capacitor values are used for
both hard-charging and soft-charging operation, the prototype
focuses on the improvement in efciency at low switching
frequencies. It is also possible to optimize the hardware design
for power density improvement, or both. Even though the
additional inductor incurs an approximately 20% increase in
the components volume of the power stage, the total enclosed
box volume of the power stage increases to a lesser extent.
The voltage Vsc (as seen in Fig. 1) as well as the switching
functions are shown in Fig. 9. The switching signals are
slightly different from what is used in simulation (Fig. 5). This
is because using the original sequence (1b 1a 2b 2a)
results in negative Vds voltages across some of the switches,
and bidirectional blocking switches would have to be used.
Since it has been shown by the analysis in Section III, that
the switching sequence does not matter, the actual sequence
used in practice is sequence 2 in Section III (i.e. 2a 2b
Component Part number Parameters
S12 , S5 - S1 EPC2014 40 V, 16 m, 10 A
S11 - S6 EPC2007 100 V, 30 m, 6 A
C4 - C 7 C1812X224K2RACTU 250 V,2.2 F
C2 , C3 C3216X7S2A225K160AB 100 V, 2.2 F
C1 C3225X7R1H225K250AB 50 V, 2.2 F
Co C3216X5R1V226M160AC 35 V, 22 F
Inductor XAL5050-562 5.6 H
Level-shifting ADUM5210
STM32f051
5
 0
10
Hardcharging

Output impedance ()
Softcharging twophase
Softcharging splitphase

1
10
4 5 6
10 10 10
Frequency (Hz)

Fig. 10: Output impedance calculated from measured data.

Fig. 9: Output voltage (Vsc in Fig. 1) (upper) and switching
functions (lower). 100

1a 1b). This switching sequence results in no negative 95

Efficiency (%)
Vds voltage and the converter operates without issues using
the GaN FETs. 90
The output impedance is plotted against the switching
frequency in Fig. 10, and is calculated from the measured
85 Hardcharging
data using
Softcharging, twophase
Vin
Vout
Rout = N , Softcharging, splitphase
Iout 80
0 0.5 1 1.5 2
where N = 8 is the conversion ratio. It can be seen that Load current (A)
similar to the simulation results, the output impedance in hard- Fig. 11: Measured efciency of the Dickson converter in deep
charging operation increases as frequency decreases. Two- SSL region. Vin = 40 V, fsw = 100 kHz.
phase soft-charging operation reduces the impedance at low
switching frequencies while the proposed split-phase operation
results in the lowest output impedance. For example, to achieve achieve superior efciency and/or power density compared to
the same output impedance as the split-phase operation at 100 conventional SC converters. The existing analysis is extended
kHz, the hard-charging converter has to switch at over 500 to account for the split-phase and the desired duty ratio for
kHz. This means that the split-phase converter can reduce the each phase is found. Besides supporting simulation results,
capacitor values by a factor of 5 if switching at 500 kHz. the proposed technique was experimentally veried with an
Consequently, the reduced capacitor requirement more than 8-to-1 Dickson converter. The hardware prototype in soft-
compensates for the additional volume of the added inductor. charging operation has been shown to exhibit signicantly
In addition, the efciencies of the converter in the SSL lower output impedance and higher efciency in SSL region
region are plotted in Fig. 11. It can be seen that soft-charging than conventional SC converters.
operation brings signicant efciency improvement while the
proposed split-phase control has the highest efciency. The
split-phase soft-charging operation also has the smallest drop A PPENDIX
in efciency as the load increases, due to its smallest output For the 4-to-1 Dickson converter in Fig. 4, The reduced
impedance. The hardware results also conrm that indeed the loop matrices are
split-phase control is effective for a Dickson converter with    
1 1 0 0 1 0 1 1 0 1
high conversion ratios. It should be noted that both the output A1a = A =
0 0 1 1 1 2a 0 0 0 1 1
impedance measurements and the efciency measurements are  
A1b = 0 0 1 1 1 A2b = 0 1 1 0 1
obtained using reduced input voltage and output current than
(16)
the rated values. This is to prevent the converter from breaking
because of the heat produced by the inefcient hard-charging and the reduced incidence matrices are
 
operation in the SSL region. 0 1 0 1 1 0 1 1 0 0
B1a = 1 0 1 0 1 B2a = 0 1 0 1 1
1 1 0 0 0 1 0 0 0 0
V. C ONCLUSIONS
0 0 1 1 0 0 1 1 0 0
In this paper, we proposed a split-phase control method 0 0 0 1 1 0 0 1 0 1
B1b B2b = =
that enables the Dickson SC converter to operate in soft- 1 0 0 0 0 1 0 0 0 0
charging mode. With complete soft-charging operation, the 0 1 0 0 0 0 0 0 1 0
proposed converter has no current transient and thus can (17)
Paper O8-1 Workshop on Control and Modeling for Power Electronics (COMPEL) 6
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